diff --git a/bl5340_dvk_nrf5340_cpuapp.overlay b/bl5340_dvk_nrf5340_cpuapp.overlay new file mode 100644 index 0000000..9f7b4c1 --- /dev/null +++ b/bl5340_dvk_nrf5340_cpuapp.overlay @@ -0,0 +1,21 @@ +// To get started, press Ctrl+Space to bring up the completion menu and view the available nodes. + +// You can also use the buttons in the sidebar to perform actions on nodes. +// Actions currently available include: + +// * Enabling / disabling the node +// * Adding the bus to a bus +// * Removing the node +// * Connecting ADC channels + +// For more help, browse the DeviceTree documentation at https://docs.zephyrproject.org/latest/guides/dts/index.html +// You can also visit the nRF DeviceTree extension documentation at https://docs.nordicsemi.com/bundle/nrf-connect-vscode/page/guides/ncs_configure_app.html#devicetree-support-in-the-extension + +&uart0_default { + group1 { + psels = , + , + , + ; + }; +}; diff --git a/nrf5340_audio_dk_nrf5340_cpuapp.overlay b/nrf5340_audio_dk_nrf5340_cpuapp.overlay new file mode 100644 index 0000000..f982ac4 --- /dev/null +++ b/nrf5340_audio_dk_nrf5340_cpuapp.overlay @@ -0,0 +1,18 @@ +// To get started, press Ctrl+Space to bring up the completion menu and view the available nodes. + +// You can also use the buttons in the sidebar to perform actions on nodes. +// Actions currently available include: + +// * Enabling / disabling the node +// * Adding the bus to a bus +// * Removing the node +// * Connecting ADC channels + +// For more help, browse the DeviceTree documentation at https://docs.zephyrproject.org/latest/guides/dts/index.html +// You can also visit the nRF DeviceTree extension documentation at https://docs.nordicsemi.com/bundle/nrf-connect-vscode/page/guides/ncs_configure_app.html#devicetree-support-in-the-extension + +&uart0_default { + group1 { + psels = , ; + }; +}; diff --git a/nrf5340dk_nrf5340_cpuapp.overlay b/nrf5340dk_nrf5340_cpuapp.overlay new file mode 100644 index 0000000..2ba5c9f --- /dev/null +++ b/nrf5340dk_nrf5340_cpuapp.overlay @@ -0,0 +1,15 @@ +/* 1. We overwrite the pin control helper node */ +&uart0_default { + group1 { + psels = , + ; + }; +}; + +/* 2. Apply it to the UART peripheral */ +&uart0 { + status = "okay"; + pinctrl-0 = <&uart0_default>; + pinctrl-names = "default"; + current-speed = <115200>; +}; \ No newline at end of file diff --git a/prj.conf b/prj.conf index 8698ce3..9529e5c 100644 --- a/prj.conf +++ b/prj.conf @@ -1,2 +1,8 @@ CONFIG_SERIAL=y CONFIG_UART_INTERRUPT_DRIVEN=y + +# use internal 32kHz oscillator +CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC=y +# select desired accuracy (more calibrations would be nececcary if smaller) - I think the 32KHz oscillator is only needed for receive +CONFIG_CLOCK_CONTROL_NRF_K32SRC_250PPM=y +CONFIG_NFCT_PINS_AS_GPIOS=y \ No newline at end of file