tcl/target/stm32h7x: modify speed at OpenOCD initialization and

drop unneeded reset-init event

The speed is set to 1800 kHz at initialization, but increases to 4000 kHz
before flash programming, with debugging continuing at this higher speed.
So, setting 4000 kHz from the start makes sense.

Change-Id: I6bccb5837c624943212b727368b40153e42ccebb
Signed-off-by: HAOUES Ahmed <ahmed.haoues@st.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/9027
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
This commit is contained in:
HAOUES Ahmed
2025-10-30 10:40:58 +01:00
committed by Tomas Vanek
parent 03b79387cc
commit 1afb3e75f0
+1 -6
View File
@@ -126,7 +126,7 @@ if { [info exists QUADSPI] && $QUADSPI } {
}
# Clock after reset is HSI at 64 MHz, no need of PLL
adapter speed 1800
adapter speed 4000
adapter srst delay 100
if {[using_jtag]} {
@@ -198,11 +198,6 @@ $_CHIPNAME.cpu0 configure -event examine-end {
stm32h7x_dbgmcu_mmw 0x3000 0x00000003 0
}
$_CHIPNAME.cpu0 configure -event reset-init {
# Clock after reset is HSI at 64 MHz, no need of PLL
adapter speed 4000
}
# get _CHIPNAME from current target
proc stm32h7x_get_chipname {} {
set t [target current]