jtag/vdebug: implement a polling mechanism
This change adds a polling mechanism to the driver. When not busy the driver issues a wait, allowing the target to advance time. The wait period gets adjusted to match the polling setting. Change-Id: I67f481d05d7c5ce5352b5cb97de78dbaa97d82ae Signed-off-by: Jacek Wuwer <jacekmw8@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8221 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
This commit is contained in:
committed by
Antonio Borneo
parent
db8db90333
commit
2065bac380
@@ -47,19 +47,20 @@
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#include "jtag/interface.h"
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#include "jtag/commands.h"
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#include "transport/transport.h"
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#include "target/target.h"
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#include "target/arm_adi_v5.h"
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#include "helper/time_support.h"
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#include "helper/replacements.h"
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#include "helper/log.h"
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#include "helper/list.h"
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#define VD_VERSION 48
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#define VD_VERSION 50
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#define VD_BUFFER_LEN 4024
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#define VD_CHEADER_LEN 24
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#define VD_SHEADER_LEN 16
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#define VD_MAX_MEMORIES 20
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#define VD_POLL_INTERVAL 500
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#define VD_POLL_INTERVAL 1000
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#define VD_SCALE_PSTOMS 1000000000
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/**
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@@ -205,6 +206,7 @@ struct vd_client {
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uint32_t poll_max;
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uint32_t targ_time;
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int hsocket;
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int64_t poll_ts;
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char server_name[32];
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char bfm_path[128];
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char mem_path[VD_MAX_MEMORIES][128];
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@@ -839,6 +841,35 @@ static void vdebug_mem_close(int hsock, struct vd_shm *pm, uint8_t ndx)
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}
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/* function gets invoked through a callback every VD_POLL_INTERVAL ms
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* if the idle time, measured by VD_POLL_INTERVAL - targ_time is more than poll_min
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* the wait function is called and its time measured and wait cycles adjusted.
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* The wait allows hardware to advance, when no data activity from the vdebug occurs
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*/
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static int vdebug_poll(void *priv)
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{
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int64_t ts, te;
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ts = timeval_ms();
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if (ts - vdc.poll_ts - vdc.targ_time >= vdc.poll_min) {
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vdebug_wait(vdc.hsocket, pbuf, vdc.poll_cycles);
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te = timeval_ms();
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LOG_DEBUG("poll after %" PRId64 "ms, busy %" PRIu32 "ms; wait %" PRIu32 " %" PRId64 "ms",
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ts - vdc.poll_ts, vdc.targ_time, vdc.poll_cycles, te - ts);
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if (te - ts + vdc.targ_time < vdc.poll_max / 2)
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vdc.poll_cycles *= 2;
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else if (te - ts + vdc.targ_time > vdc.poll_max)
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vdc.poll_cycles /= 2;
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} else {
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LOG_DEBUG("poll after %" PRId64 "ms, busy %" PRIu32 "ms", ts - vdc.poll_ts, vdc.targ_time);
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}
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vdc.poll_ts = ts;
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vdc.targ_time = 0; /* reset target time counter */
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return ERROR_OK;
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}
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static int vdebug_init(void)
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{
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vdc.hsocket = vdebug_socket_open(vdc.server_name, vdc.server_port);
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@@ -858,6 +889,7 @@ static int vdebug_init(void)
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}
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vdc.trans_first = 1;
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vdc.poll_cycles = vdc.poll_max;
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vdc.poll_ts = timeval_ms();
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uint32_t sig_mask = VD_SIG_RESET;
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if (transport_is_jtag())
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sig_mask |= VD_SIG_TRST | VD_SIG_TCKDIV;
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@@ -876,6 +908,8 @@ static int vdebug_init(void)
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LOG_ERROR("0x%x cannot connect to %s", rc, vdc.mem_path[i]);
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}
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target_register_timer_callback(vdebug_poll, VD_POLL_INTERVAL,
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TARGET_TIMER_TYPE_PERIODIC, &vdc);
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LOG_INFO("vdebug %d connected to %s through %s:%" PRIu16,
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VD_VERSION, vdc.bfm_path, vdc.server_name, vdc.server_port);
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}
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@@ -885,6 +919,8 @@ static int vdebug_init(void)
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static int vdebug_quit(void)
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{
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target_unregister_timer_callback(vdebug_poll, &vdc);
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for (uint8_t i = 0; i < vdc.mem_ndx; i++)
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if (vdc.mem_width[i])
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vdebug_mem_close(vdc.hsocket, pbuf, i);
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@@ -1299,16 +1335,16 @@ static const struct command_registration vdebug_command_handlers[] = {
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{
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.name = "batching",
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.handler = &vdebug_set_batching,
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.mode = COMMAND_CONFIG,
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.mode = COMMAND_ANY,
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.help = "set the transaction batching no|wr|rd [0|1|2]",
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.usage = "<level>",
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},
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{
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.name = "polling",
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.handler = &vdebug_set_polling,
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.mode = COMMAND_CONFIG,
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.help = "set the polling pause, executing hardware cycles between min and max",
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.usage = "<min cycles> <max cycles>",
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.mode = COMMAND_ANY,
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.help = "set the min idle time and max wait time in ms",
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.usage = "<min_idle> <max_wait>",
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},
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COMMAND_REGISTRATION_DONE
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};
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@@ -17,7 +17,7 @@ set CPUTAPID 0x4ba06477
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transport select jtag
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# JTAG reset config, frequency and reset delay
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reset_config trst_and_srst
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reset_config trst_only
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adapter speed 1500000
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adapter srst delay 5
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@@ -4,9 +4,9 @@
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source [find interface/vdebug.cfg]
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set _CHIPNAME ibex
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set _HARTID 0x20
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set _CPUTAPID 0x249511c3
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set CHIPNAME ibex
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set HARTID 0x20
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set CPUTAPID 0x249511c3
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# vdebug select transport
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transport select jtag
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@@ -25,7 +25,7 @@ vdebug mem_path tbench.soc_domain_i.pulp_soc_i.gen_mem_l2_pri\[1\].sram_i.mem_ar
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vdebug mem_path tbench.soc_domain_i.pulp_soc_i.gen_mem_l2\[0\].sram_i.mem_array 0x1c010000 0x80000
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# need to explicitly define riscv tap, autoprobing does not work for icapture != 0x01
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jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x05 -irmask 0x1f -expected-id $_CPUTAPID
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jtag newtap $CHIPNAME cpu -irlen 5 -ircapture 0x05 -irmask 0x1f -expected-id $CPUTAPID
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jtag arp_init-reset
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@@ -30,4 +30,4 @@ tcl port disabled
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vdebug batching 1
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# Polling values
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vdebug polling 100 1000
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vdebug polling 100 500
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@@ -2,15 +2,15 @@
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# Cadence virtual debug interface
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# RISCV core
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if {![info exists _HARTID]} {
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set _HARTID 0x00
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if {![info exists HARTID]} {
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set HARTID 0x00
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}
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if {![info exists _CHIPNAME]} {
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set _CHIPNAME riscv
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if {![info exists CHIPNAME]} {
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set CHIPNAME riscv
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}
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set _TARGETNAME $_CHIPNAME.cpu
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set _TARGETNAME $CHIPNAME.cpu
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target create $_TARGETNAME riscv -chain-position $_TARGETNAME -coreid $_HARTID
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target create $_TARGETNAME riscv -chain-position $_TARGETNAME -coreid $HARTID
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riscv set_reset_timeout_sec 120
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riscv set_command_timeout_sec 120
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