tcl/target/gd32vf103: copy a few minor settings from riscv-openocd

These changes bring over some lines from the independently-developed
gd32vf103.cfg that I contributed[1] to the riscv-openocd fork of
OpenOCD. They're all minor, so I'm squashing them into one review. The
changes are as follows:

 - Add boundary scan TAP.
 - Mention inconsistency of CPU ID between vendor SDK and real hardware.
 - Specify that there's no MMU so we don't look for one at runtime.

Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
Change-Id: Ie8033eff436d6dbdc3eab156769a8908ccb547f6
Reviewed-on: https://review.openocd.org/c/openocd/+/6959
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

tcl/target/gd32vf103.cfg

@@ -23,11 +23,20 @@ if { [info exists WORKAREASIZE] } {
    set _WORKAREASIZE 0x1800
 }
 
+# Example OpenOCD configurations from GigaDevice/Nuclei expect a cpu IDCODE of
+# 0x1e200a6d instead. It's unclear if any units with that IDCODE exist in the
+# wild. Please report a bug if you have such a unit.
 jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x1000563d
+jtag newtap $_CHIPNAME bs -irlen 5 -expected-id 0x790007a3
 
 set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME riscv -chain-position $_TARGETNAME
 
+# Disable virtual address translation since we don't have an MMU. Nothing will
+# break without this line, but OpenOCD will do a few unnecessary register reads
+# to figure it out on its own.
+$_TARGETNAME riscv virt2phys_mode off
+
 proc default_mem_access {} {
 	riscv set_mem_access progbuf
 }