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drivers/ch347, doc: warn about CH347T problems

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Also suggest a possible solution if available.

CH347F related parts co-authored by ZhiYuanNJ <871238103@qq.com>

Change-Id: Id6557909fcb56a1e95e16277c1cd7df6769cf4dd
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/8741
Reviewed-by: ZhiYuanNJ <871238103@qq.com>
Tested-by: jenkins
This commit is contained in:
Tomas Vanek
2025-02-08 18:46:32 +01:00
parent 7d0e125896
commit 99cb670bec
2 changed files with 48 additions and 1 deletions
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doc/openocd.texi
+26
View File
@@ -2561,6 +2561,32 @@ and a specific set of GPIOs is used.
@deffn {Interface Driver} {ch347}
Driver for WCH CH347F and CH347T chips.
When using the CH347T, it must be configured to operate in mode 3 (UART + JTAG).
@b{WARNING:} WCH CH347T chips have rather poor performance
with respect to the USB HS connection. Upgrade firmware to the latest version!
@itemize @bullet
@item Chip version 2.41:
@itemize @minus
@item JTAG timing is very weird, some clock pulses are
much shorter then the requested clock frequency.
@item SWD is not implemented.
@end itemize
@item Chip version 4.41:
@itemize @minus
@item SWD clock is limited to 1 MHz maximum.
@item SWD reading AP reg CH347 erroneously drives
SWDIO to H for 392 ns after the last ACK bit. Some devices get so upset
that send wrong data with parity error. A resistor in the SWDIO circuit
mitigates the problem.
@item A long SWD operation causes that USB host disconnects the adapter.
@end itemize
@item Chip version 5.44:
@itemize @minus
@item Maximal SWD clock speed is 5 MHz
@item A long SWD operation causes that USB host disconnects the adapter.
@end itemize
@end itemize
This driver has these driver-specific command:
@deffn {Config Command} {ch347 vid_pid} [vid pid]+
src/jtag/drivers/ch347.c
+22 -1
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@@ -1402,13 +1402,34 @@ static int ch347_open_device(void)
firmware_version);
if (ch347.chip_variant == CH347T && ch347_device_descriptor.bcdDevice < BYTEWISE_MODE_VERSION) {
LOG_INFO("CH347 old version of the chip, JTAG only working in bitwise mode. For bytewise mode at least version %X.%X is needed.",
LOG_INFO("CH347T old version of the chip, JTAG only working in bitwise mode. For bytewise mode at least version %X.%X is needed.",
(BYTEWISE_MODE_VERSION >> 8) & 0xFF,
BYTEWISE_MODE_VERSION & 0xFF);
ch347.use_bitwise_mode = true;
} else {
ch347.use_bitwise_mode = false;
}
if (ch347.chip_variant == CH347T) {
if (swd_mode) {
if (ch347_device_descriptor.bcdDevice < 0x441)
LOG_WARNING("CH347T version older than 4.41 probably does not support SWD transport");
if (ch347_device_descriptor.bcdDevice == 0x441)
LOG_WARNING("If CH347T version 4.41 cannot connect or SWD fails often, insert a resistor to SWDIO circuit");
} else if (ch347_device_descriptor.bcdDevice == 0x241) {
LOG_WARNING("CH347T version 2.41 has very weird clock timing, may not work with a slower JTAG device");
}
if (ch347_device_descriptor.bcdDevice < 0x544)
LOG_INFO("Please upgrade CH347T firmware to a production version >= 5.44");
} else if (ch347.chip_variant == CH347F) {
if (ch347_device_descriptor.bcdDevice < 0x101)
LOG_INFO("Please upgrade CH347F firmware to a production version >= 1.1");
}
return ERROR_OK;
}