target: align switch and case statements

The coding style requires the 'case' to be at the same indentation
level of its 'switch' statement.

Align the code accordingly.

While there:
- add space around the operators;
- drop useless empty line.

Skip all riscv code, as it is going to be updated soon from the
external fork.

No changes are reported by
	git log -p -w --ignore-blank-lines --patience

Change-Id: I2691dfdd2b6734143e14160b46183623e9773539
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/9051
Tested-by: jenkins

src/target/arm_dpm.c

@@ -187,7 +187,6 @@ static int dpm_read_reg_u64(struct arm_dpm *dpm, struct reg *r, unsigned int reg
 			&value_r1);
 		break;
 	default:
-
 		break;
 	}
 
@@ -295,7 +294,6 @@ static int dpm_write_reg_u64(struct arm_dpm *dpm, struct reg *r, unsigned int re
 			((regnum - ARM_VFP_V3_D0) & 0xf)), value_r0);
 		break;
 	default:
-
 		break;
 	}
 

src/target/arm_simulator.c

@@ -209,7 +209,6 @@ static int pass_condition(uint32_t cpsr, uint32_t opcode)
 	case 0xe:
 	case 0xf:
 		return 1;
-
 	}
 
 	LOG_ERROR("BUG: should never get here");

src/target/dsp563xx.c

@@ -820,7 +820,6 @@ static int dsp563xx_write_register(struct target *target, int num, int force)
 				dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_SSH].valid = 0;
 				dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_SSL].valid = 0;
 			}
-
 			break;
 		}
 	}

src/target/esirisc_trace.c

@@ -428,6 +428,7 @@ static int esirisc_trace_analyze_full(struct command_invocation *cmd, uint8_t *b
 				}
 				break;
 			}
+
 			case ESIRISC_TRACE_EXT_ID_EXCEPTION: {
 				uint32_t eid, epc;
 
@@ -443,6 +444,7 @@ static int esirisc_trace_analyze_full(struct command_invocation *cmd, uint8_t *b
 						esirisc_trace_ext_id_strings[ext_id], eid, epc);
 				break;
 			}
+
 			case ESIRISC_TRACE_EXT_ID_COUNT: {
 				uint32_t count;
 
@@ -454,6 +456,7 @@ static int esirisc_trace_analyze_full(struct command_invocation *cmd, uint8_t *b
 						(count == 1) ? "time" : "times");
 				break;
 			}
+
 			case ESIRISC_TRACE_EXT_ID_END:
 				command_print(cmd, "--- end of trace ---");
 				return ERROR_OK;

src/target/image.c

@@ -844,7 +844,6 @@ static int image_mot_buffer_complete_inner(struct image *image,
 					bytes_read += 8;
 					count -= 4;
 					break;
-
 				}
 
 				if (full_address != address) {

src/target/mips32.c

@@ -1699,7 +1699,6 @@ COMMAND_HANDLER(mips32_handle_cp0_command)
 			retval = mips32_cp0_get_reg_by_number(CMD, ejtag_info);
 		else /* or set value by register name */
 			retval = mips32_cp0_set_reg_by_name(CMD, mips32, ejtag_info);
-
 		break;
 	case 3: /* 3 args => set cp0 reg/sel value*/
 		retval = mips32_cp0_set_reg_by_number(CMD, mips32, ejtag_info);

src/target/semihosting_common.c

@@ -399,7 +399,6 @@ int semihosting_common(struct target *target)
 			  semihosting->param);
 
 	switch (semihosting->op) {
-
 	case SEMIHOSTING_SYS_CLOCK:	/* 0x10 */
 		/*
 		 * Returns the number of centiseconds (hundredths of a second)

src/target/xscale.c

@@ -2739,7 +2739,6 @@ static int xscale_analyze_trace(struct target *target, struct command_invocation
 			default:/* Reserved */
 				LOG_WARNING("trace is suspect: invalid trace message byte");
 				continue;
-
 			}
 
 			/* If we don't have the current_pc yet, but we did get the branch target