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tcl/target/ti_k3.cfg: Add support for direct memory access via SWD

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Adds support for direct memory access via SWD emulation for AM64x and
J784s4 boards, configuring addresses and parameters required for
direct memory operations.

Change-Id: Iebc16612b3990b2ef19ddc4143b66ab1bcbfe0f3
Signed-off-by: Joao Lima <joao.lima@hbkworld.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/9021
Reviewed-by: Nishanth Menon <nm@ti.com>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This commit is contained in:
Joao Lima
2025-09-30 12:13:30 +00:00
committed by Antonio Borneo
parent c1cca2155b
commit f5478eb112
1 changed files with 21 additions and 1 deletions
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tcl/target/ti_k3.cfg
+21 -1
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@@ -176,6 +176,16 @@ switch $_soc {
# Uses the same JTAG ID
set _armv8_cores 0
}
# Setup DMEM access descriptions
# DAPBUS (Debugger) description
set _dmem_base_address 0x740002000
set _dmem_ap_address_offset 0x100
set _dmem_max_aps 10
# Emulated AP description
set _dmem_emu_base_address 0x760000000
set _dmem_emu_base_address_map_to 0x1d500000
set _dmem_emu_ap_list 1
}
am625 {
set _K3_DAP_TAPID 0x0bb7e02f
@@ -333,7 +343,7 @@ switch $_soc {
set ARMV8_CTIBASE {0x90420000 0x90520000 0x90620000 0x90720000
0x90820000 0x90920000 0x90a20000 0x90b20000}
# J721s2 has 4 clusters of 2 R5 cores each.
# J784s4 has 4 clusters of 2 R5 cores each.
set _r5_cores 8
set R5_DBGBASE {0x9d010000 0x9d012000
0x9d410000 0x9d412000
@@ -348,6 +358,16 @@ switch $_soc {
main1_r5.0 main1_r5.1
main2_r5.0 main2_r5.1}
# Setup DMEM access descriptions
# DAPBUS (Debugger) description
set _dmem_base_address 0x4c40002000
set _dmem_ap_address_offset 0x100
set _dmem_max_aps 8
# Emulated AP description
set _dmem_emu_base_address 0x4c60000000
set _dmem_emu_base_address_map_to 0x1d600000
set _dmem_emu_ap_list 1
# sysctrl CTI base
set CM3_CTIBASE {0x20001000}
# Sysctrl power-ap unlock offsets