Due to reports of newer targets using a updated version of the ICEPick tap
rather than add another tapid we ignore the tap version.
Also see Trac 49 for details.
Change-Id: Ic78414c54af2545c817e1bb2c860970c1b587259
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1373
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
Rename cortex_a8 target to use a more correct cortex_a name.
This also adds a deprecated_name var so that older scripts issue a warning
to update the target name.
cfg files have also been updated to the new target name.
Change-Id: I0eb1429c9281321efeb444b27a662a941a2ab67f
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1130
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Rename cortex_m3 target to use a more correct cortex_m name.
This also adds a deprecated_name var so that older scripts issue a warning
to update the target name.
cfg files have also been updated to the new target name.
Change-Id: Ia8429f38e88da677249c5caa560c50f8ce56ea10
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1129
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Sometimes the target may have breakpoint registers set from a previous
debug session, we can either sync them or as we have chosen here clear them.
Change-Id: I439a623ebbf010246a70e5596d04aa7d546da731
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1363
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Ensure FlexRAM usage is limited to half the FlexRAM size when programming.
Assume the FlexNVM sector size is equal to half the FlexRAM.
Fix sector erase checking which had an error introduced when the
kinetis_ftfx_command( ) signature was changed.
Change-Id: I88edd9c7d4a4ba474cad7b00052feaeedfa8ced8
Signed-off-by: Christopher Kilgour <techie@whiterocker.com>
Reviewed-on: http://openocd.zylin.com/1358
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Fix build when targeting closed src ftd2xx drivers.
configure is unable to find the dynamic linking loader lib (dl) as it
is included before ftd2xx library.
Change-Id: Ibe7308b66ed846288a31f7a27ff549b6f39baeec
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1355
Tested-by: jenkins
Reviewed-by: Luca Bruno <lucab@debian.org>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Seems commit fc2abe63fd caused a regression
in that the arm reg cmd no longer worked. The issue was caused because we
changed the value of ARM_MODE_THREAD which was being checked in arm_init_arch_info.
Change-Id: Id571d4ab336d1b0e2b93363147af245d24b65ca5
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1362
Tested-by: jenkins
Reviewed-by: Luca Bruno <lucab@debian.org>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The format of 'M' packet is 'M addr,length:XX...'. The data
follows ':' immediately. No need to '+2' to SEPARATOR in
unhexify(), because SEPARATOR points to data correctly.
Change-Id: I15b5758b540816cc727752e7bf68cd45e623f603
Signed-off-by: Hsiangkai Wang <hsiangkai@gmail.com>
Reviewed-on: http://openocd.zylin.com/1360
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
This patch adds flash programming support for internal flash of the
LPC43x2/3/5/7 part, tested on a LPC4337 (also tested on a LPC1768
and LPC2468). It should also work with LPC1800's with onchip flash.
The "base" parameter of the "flash bank" command is now significant
for the lpc4300 variant and required to determine the bank number
parameter needed by the IAP routines.
NOTE: I could only program flash successfully when the chip is powered
with "P2_7" pulled low to put it in ISP mode. When running from flash
(and not the ISP ROM), the target fails to halt and the sector erase
fails. This is similar to the behavior I remember when trying out the
spifi driver on a LPC4350... lots of power cycles to make progress, one
To burn, one to run. So I am not confident my config is set up correctly.
Change-Id: I8a75ef1b95cedd5b5898b2dedff477f502fd19f3
Signed-off-by: Matt Dittrich <mdittrich.dev@gmail.com>
Reviewed-on: http://openocd.zylin.com/1126
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested-by: jenkins
Reword info about creating SSH key - it's not required to add it to
Github account. Mention adding created SSH key to Gerrit account -
without this step it's not possible to access Gerrit in further
steps.
Change-Id: Ibd81521fbe47d4b4beae0b77cdc9d939fd3ee20c
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/1350
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
OSBDM: add new VID:PID implemented in OSJTAG/OSBDM firmware somewhere
between versions 30.13 and 31.21. PFLASH programming works with this
patch, tested on a Freescale Kinetis TWR-K20D72M using its onboard OSBDM
JTAG adapter.
Note: flash program testing required hacking kinetis_write() to force
longword programming, as the FTFL program section commands formulated by
kinetis_write() currently fail on this board's PK20DX256VLL7 processor.
Change-Id: Ib7b92ff2fe9ebf6158fb1489f554a19e96cd9651
Signed-off-by: R. Steve McKown <rsmckown@gmail.com>
Reviewed-on: http://openocd.zylin.com/1348
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Now all the functions with only fetch accesses are modified.
The same delay between scans has been added to mips32_pracc_fastdata_xfer(), it should work
at the same scan rates as the other pracc functions, but it needs higher scan_delays
to work.
Change-Id: Ifb31d8ea6de9d22674385782913d221a2494dbbf
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/1196
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Functions mips32_pracc_read_mem(), mips32_cp0_read() and mips32_pracc_read_regs() are now modified.
mips32_cp0_read() is very similar to mips32_read_u32() with one store access.
mips32_pracc_read_regs() is the only function that can not be executed from only one queue.
Now this function is modified to use reg8, it saves all the registers but does not restore reg8.
To remedy this, mips_ejtag_config_step() is called after mips32_save_context() in
mips_m4k_debug_entry(). Function mips_ejtag_config_step() is modified to use reg8 and
restore it from ejtag info instead of using DeSave for save/restore.
Change-Id: Icc224f6d7e41abdec94199483401cb512cc0b450
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/1195
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Each pracc function defines a variable ctx of type struct pracc_queue_info.
To simplify the code tree auxiliary functions are defined: pracc_queue_init(), pracc_add() and
pracc_queue_free().
The second parameter in pracc_add() is the store address if the instruction is a store at dmseg,
otherwise it should be 0.
The code is executed by mips32_pracc_queue_exec(). If ejtag_info->mode is 0 mips32_pracc_exec()
is called and it should work like with current code.
To generate the delay between scans the number of clock ticks are calculated with the help of
jtag_get_speed_khz(). Due to delays in the execution of each single ftdi instruction the number of ticks
are higher as it should be, specially at higher scan rates.
mips32_pracc_read_u32() should now work with the new code.
Change-Id: I471590a4fc89b56af10bd46c48767b4c64de154f
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/1194
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
This patch and the following patches define another way of doing processor access without the need to read back
the pracc address as needed in current pracc code.
Current pracc code is executed linearly and unconditionally. The processor starts execution at 0xff200200
and the fetch address is ever incremented by 4, including the last instruction in the delay slot of the branch to start.
Most of the processor accesses are fetch and some are store accesses.
After a previous patch regarding the way of restoring registers (reg8 and reg9), there are no load processor accesses.
The pracc address for a store depends only on the store instruction given before.
m4k core has a 5 stage pipeline and the memory access is done in the 3rth stage. This means that the store access
will not arrive immediately after a store instruction, it appears after another instruction enters the pipeline.
For reference: MD00249 mips32 m4k manual.
A new struct pracc_queue_info is defined to help each function in generating the code. The field pracc_list holds in the
lower half the list of instructions and in the upper half the store addressess, if any. In this way the list can be used by
current code or by the new one to generate the sequence of pracc accesses.
For every pracc access only one scan to register "all" is used by calling the new function mips_ejtag_add_scan_96().
This function does not call jtag_execute_queue(), all the scans needed can be queued before calling for execution.
The pracc bit is not checked before execution, is checked after the queue has been executed.
Without calling the wait function the code works much faster, but the scan frequency must be limited. For pic32mx
with core clock at 4Mhz works up to 600Khz and with 8Mhz up to 1200. To increase the scan frequency a delay
between scans is added by calling jtag_add_cloks().
A time delay in nano seconds is stored in scan_delay, a new field in ejtag_info, and a handler is provided for it.
A mode field is added to ejtag_info to hold the working mode. If a time delay of 2ms (2000000 ns) or higher is set,
current code is executed, if lower, new code is executed.
Initial default values are set in function mips32_init_arch_info. A reset does not change this settings.
Change-Id: I266bdb386b24744435b6e29d8489a68c0c15ff65
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/1193
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Without the explicit dir at the end the repository will be cloned to "code".
Change-Id: Icd8b55b4ba74f23b214c3844e2fb785377768119
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/1349
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Tested-by: jenkins
As requested, here is the target configuration that I'm using for an
STLink-V2-attached STM32W108C8. For some reason, it only seems to work
with "reset_config trst_only".
Change-Id: Icbff4f83343e1f505d8afdfc53ff6f8b7496cac9
Signed-off-by: Ben Nahill <bnahill@gmail.com>
Reviewed-on: http://openocd.zylin.com/1347
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The em357 driver only supported one page configuration (192k in 96 2048k)
pages. This is fine for em357 chips since that's the size they have, but
ST's STM32W chips (pretty much the same) have different flash
configurations available (64, 128, 192, 256k). I can't find anywhere
that would indicate the size of the chip anywhere in memory so the
selection must be manual, using the 'size' parameter. For backwards
compatibility, any size not known to be in use defaults to the 192k
configuration. I don't have any em357 devices to test, but I also found
that I had to re-assert the FPEC clock enable before performing an
erase. This is a single line and shouldn't break any configurations.
My testing so far has only been with a 64k device with 8k of RAM.
Change-Id: Ic0ac400a9696efaa09d1407dd4a4d456bc2c318b
Signed-off-by: Ben Nahill <bnahill@gmail.com>
Reviewed-on: http://openocd.zylin.com/1336
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
Disable polling the target before we issue a 'reset run'. This stops errors or
warnings if the target disables the SWD or JTAG interface as part of the
application code.
Change-Id: I5019dffdad41a8e210003ece1caf89069ee0f223
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1331
Tested-by: jenkins
We need to make sure that srst is asserted before we attempt to switch into
jtag or swd mode otherwise we receive a error (-9) - invalid device id.
Change-Id: I625166c751cfba8e8a5290f40122bb9afc9dbb39
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1315
Tested-by: jenkins
If parport_toggling_time is called before the adapter speed has been
configured then the call fails. Probably not the best fix, but does at least
enable parport_toggling_time to be used again.
This regression was added in commit 740b9e25b4
Change-Id: I90300916d6bda5ef053c557e5ac136c4f002bdd1
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1309
Tested-by: jenkins
Update to latest jimtcl commit 2c1eba991e21a6f0b531fb0f83e21f9e6ee7c515.
This fixes issues when building on certain versions of Mac OSX.
Change-Id: I551477752d7913c84e6deb60b889d0c14bd200a0
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1311
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
The final bit was incorrectly added as output data, even if no data was
to be written. Changed it to match handling of other bits.
Change-Id: I91e5ba0c932876bfb579c22e6c7ef0300baa1534
Signed-off-by: Yann Vernier <yann.vernier@orsoc.se>
Reviewed-on: http://openocd.zylin.com/1049
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Add command to fix CSW_SPROT in register AP_CSW.
This solves dap apmem access in non secure access.
Change-Id: I7cfcb6434d75f5cfd4a2630a059901cdeea010ce
Signed-off-by: Michel JAOUEN <michel.jaouen@stericsson.com>
Reviewed-on: http://openocd.zylin.com/1276
Tested-by: jenkins
Reviewed-by: mike brown
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
After calling mips32_cp0_read() nothing has been queued, the call to jtag_exec_queue() is unnecessary.
Change-Id: Ie25438045a8e9b6b1b170df7b52609d45f284b5a
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/1190
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
In current devel code there are 3 functions (related to m4k code) that need to restore register 8 from pracc stack:
mips32_pracc_read_u32()
mips32_cp0_read()
mips32_pracc_write_mem_generic()
And mips32_pracc_read_mem() needs to restore regs 8 and 9 from pracc stack.
Values in this registers should be the same as read by mips32_pracc_read_regs() when entering debug
mode and can be modified by mips32_pracc_write_regs() when leaving debug mode.
There is no need to read their values from the processor registers every time.
The fields reg8 and reg9 are added to struct mips_ejtag to store these register values
and the call to mips32_save_context() is shifted in mips_m4k_debug_entry() in order
to store them before any other function needs to restore these registers.
For the same reason in function mips_m4k_step() the call to mips_m4k_set_breakpoint(), if needed,
should be made after calling mips_m4k_debug_entry().
For single word write the number of pracc accesses are now 9 or 8, from 13 or 12 in current code,
single word read takes now 10 instead of 12.
This patch is really the first in a set of patches for an alternate m4k pracc code
much faster that current code. At least for me with pic32mx works fine.
Change-Id: Ibd9df5e8b9f78ce05a180949ba6a561c761b61d6
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/1146
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
In this function after loading the handler code and the jump code there is a call
to wait_for_pracc_rw() to verify that a pracc access is pending.
Next the address is read to verify that the handler is running, the address should be at
fastdata area.
Next, another call is made to wait_for_pracc_rw(). This call is not needed, we now already
that a pracc access is pending.
Better we call this function before loading the end address to be sure it is loaded correctly.
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Change-Id: If311450ea634786fc28cf1a8e18ed24ce5257d20
Reviewed-on: http://openocd.zylin.com/1142
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
By default pic32mx starts after any reset with 1 wait state for RAM access/exec.
It can be changed to 0 wait states by clearing the BMXWSDRM bit (bit 6) in BMXCON register.
With 0 wait states near doubles the execution speed. CRC check sum can be done much faster
increasing verify_image speed. Fast data transfer also works with a bit higher scan rate, up to 1500 Khz.
This option can be set at any time with
mww 0xbf882004 0x40
or cleared with
mww 0xbf882008 0x40.
Some numbers for FTDI/HS with current devel code and a elf file:
Core clock / wait states verify_image speed
------------------------------------|------------------------------
4 Mhz / 1 21 KiB/s
4 Mhz / 0 36 KiB/s
8 Mhz / 1 37 KiB/s
8 Mhz / 0 57 KiB/s
Change-Id: I4092ad0f3753f72f77108718d0ed3a3ab84e3b23
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/1141
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
To show up the fail try to step with the core clock set to 31.25Khz
and with a ftdi/hs adapter or with a wiggler, -not with ft2232-.
The scan frequency should be set to 300Khz or higher, at lower frequency probably will not fail.
The code exits with error because the pracc address is at 0x0.
It also fails when using the "all" register, but in this case the code works without any message because the
pracc address is at 0xff202004 when it fails.
I never saw this fail with the core clock set to 500Khz or higher, but ...
The workaround simply puts a 1 ms delay after the execution of the DERET instruction.
Change-Id: I38e8c01a9c39aedd3282140543b83a0844d8ad29
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/1139
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Fixes system hang for devices that don't ignore
transactions to bad addresses.
Change-Id: Ia98344d7efc12951ef79dbc82b8f792b70a22cee
Signed-off-by: Evan Hunter <ehunter@broadcom.com>
Reviewed-on: http://openocd.zylin.com/1115
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Moved JTAG code out of transport-neutral file (arm_adi_v5.c) into
transport specific file (adi_v5_jtag.c).
Added ap_block_read to dap_ops interface (arm_adi_v5.h) to support
the move.
Change-Id: I796d3984f138aad052b97c77ac9c12ffd1158f74
Signed-off-by: mike brown <mike@theshedworks.org.uk>
Reviewed-on: http://openocd.zylin.com/1277
Tested-by: jenkins
Reviewed-by: Michel JAOUEN <michel.jaouen@stericsson.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The command 'at91sam3 info' ignores PLLA DIV values >1. This patch fixes it.
Tested on a SAM3S4C chip.
Change-Id: I051f41bb3dcefe1ac785fbcb48477a807daa16a2
Signed-off-by: Thomas Schmid <thomas.schmid@gmail.com>
Reviewed-on: http://openocd.zylin.com/1307
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
The commit "gdbserver: use common hexify/unhexify routines" [3d62c3d]
mis-replaced a call to "str_to_hex" with a call to "unhexify". "hexify"
should have been used instead.
Change-Id: I5f5904b1b422f819a6308e2c0740ea43d22c7d0b
Signed-off-by: Christian Gudrian <christian.gudrian@gmx.de>
Reviewed-on: http://openocd.zylin.com/1308
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
This regression was caused due to the recent addition of R4 support and
the removal of the bulk_write_memory handler.
Change-Id: Ide692737f235c0e9906becb6f3502ba52c5907aa
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1246
Tested-by: jenkins
The only caller was arm_nandwrite(). Replace that call with
target_write_buffer() instead, which in turn may end up calling the same
bulk_write_memory target API function.
Change-Id: If34c7474df5cf14af3b732fb4774816818f28e79
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1214
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Remove dummy implementations from all targets except arm7_9 and mips, which
are the only ones with real implementations. Replace with a single default
implementation simply calling target_write_memory().
Change-Id: I9228104240bc0b50661be20bc7909713ccda2164
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1213
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This patch adds support for usbprog-jtag and usbvlab that are mostly compatible
to opendous except for IN and OUT endpoints and usb transfer mode.
Change-Id: I44557c2449fe7473295038efa6ae4fc8d80ec7bf
Signed-off-by: Stefan Mahr <stefan.mahr@sphairon.com>
Reviewed-on: http://openocd.zylin.com/687
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
If command parport_cable is not executed, parport_cable points to
const char array in read-only memory as default. On exit free()
will try to free this read-only memory. This patch uses strdup to
allocate memory when defining default setting.
Change-Id: I290e707ac6a37e9dc1b45c85ca51d8bd6aac6761
Signed-off-by: Stefan Mahr <stefan.mahr@sphairon.com>
Reviewed-on: http://openocd.zylin.com/1223
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Appending bits to TAP buffer doesn't check if there's enough space left.
This patch adds this check to fix TAP overflow error.
Change-Id: If80d5ab4a24983ad24f3cab31f9676d1590ebf5d
Signed-off-by: Stefan Mahr <stefan.mahr@sphairon.com>
Reviewed-on: http://openocd.zylin.com/1216
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
It was listed in the ft2232 based cables supported. Moreover, the
ft2232_channel option, which was added to support this cable, was explained.
Change-Id: I82ebc7bc10d6472f96ab150e78d623a617edccd2
Signed-off-by: Rodrigo Melo <rmelo@inti.gob.ar>
Reviewed-on: http://openocd.zylin.com/1098
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This config file add support to the opendous cable based on the chip ft2232H,
using the ft2232 interface driver.
Change-Id: I8171a0c475af8d61e081844ee86466a392138fb0
Signed-off-by: Rodrigo Melo <rmelo@inti.gob.ar>
Reviewed-on: http://openocd.zylin.com/1096
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
With this option a different channel of the ft2232 chip can be selected using
a previously existing layout. It was made for a partner called Salvador
Tropea.
Change-Id: Ia0dedb2f50e232d089e73788735edc8f47ee23e6
Signed-off-by: Rodrigo Melo <rmelo@inti.gob.ar>
Reviewed-on: http://openocd.zylin.com/1095
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The kinetis datasheets specify the flash registers as bytes rather
than as words, as the previous implementation did. This also makes
a few code sections slightly less endian-magical.
Change-Id: If8f4adfc7f4341085ae5b6eacbf7d74bbd74cf08
Signed-off-by: Alex Austin <alex.austin@spectrumdsi.com>
Reviewed-on: http://openocd.zylin.com/1192
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Add url to show where the http password is configured.
Also add note that password can also be saved to url git config.
Change-Id: I3c1a022580e5f73372b0c50e8d1d2f0b1498966f
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1207
Tested-by: jenkins
This config file add support to the opendous cable based on the chip ft2232H,
using the ftdi interface driver.
Change-Id: I4491f99d7b14f7078a04583ef0c4acd8692c4349
Signed-off-by: Rodrigo Melo <rmelo@inti.gob.ar>
Reviewed-on: http://openocd.zylin.com/1097
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Rather than use bold fonts etc, use the correct keywords so doxygen formats
better.
Change-Id: Id9d63f0fc3465665376d7a536c4d6da71998f40e
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1210
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
This fixes an issue if the device is manually probed after the initial probe
fails due to being unable to read flash size register. In this situation the
driver assumes the user has overridden the flash size when infact this may
not be the case.
It also seems on the older stm32f1 devices the flash register is not readable
when locked, this does not seem to apply to the newer parts - f0, f3, f4.
Change-Id: I125f872fcb2d962ca6705f97b62d957e2b31303b
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1187
Tested-by: jenkins
Reviewed-by: Johan Almquist <johan.almquist@assaabloy.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The stm32f0 and stm32f3 share the same option byte location, but the format
differs.
Adding an option_offset fixes the broken options_read cmd and incorrectly
setting Hardware Watchdog when unlocking a f3x device.
Change-Id: I82d66b6198294ea9eedb44ca8b2fb368c0cb15e8
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1184
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
This change adds a simple target configuration for Freescale
single/dual/quad core i.MX6 SoCs, only one core is configured by default.
Change-Id: I853dd27f4c6765b7f731be2ddea82e85d496c6a4
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Reviewed-on: http://openocd.zylin.com/1135
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
When the ftdi driver calls finally the mpsse_flush function, it first
initiate the USB in and finally the corresponding USB out transaction.
Because data in is requested too early the USB device will always answer
the first USB in by a NAK. That can prevented by a simple reordering of
the out and then the in transfer and can improve the Jtag performance for
high JTAG clock rates.
Change-Id: I17abf1487c914c92e2e447ee6d30562ef629f327
Signed-off-by: Peter Henn <Peter.Henn@web.de>
Reviewed-on: http://openocd.zylin.com/942
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
This patch change the default reset config from SYSRESETREQ to the working
VECTRESET.
Change-Id: I21a9a74b9c0c68cfa3a6e6dac9b123acc98a93cb
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/1186
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Move the global target back off timer to the target struct. This will
fix the wrong error handling with multi target devices like smp systems.
Change-Id: Ia327182ed5d13ca87323700017a8c40ecc6b25a3
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/1179
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The USB buffer will need space for both TMS and TDI buffers.
Each holds tap_buffer_size bytes maximum, so tap_buffer_size must be
smaller than half of usb buf_size.
Change-Id: Id8f39936a894cbd98deb89eec5a859aef1e2b783
Signed-off-by: Joerg Fischer <turboj@gmx.de>
Reviewed-on: http://openocd.zylin.com/1136
Tested-by: jenkins
Reviewed-by: simon qian <simonqian.openocd@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Because we were always running using target state TARGET_RUNNING target
algorithm's were a bit verbose compared to other targets.
This brings the hla target inline with the other targets.
Change-Id: I3a257fdc878b87660fac8b5eca22b421eee5b349
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1134
Tested-by: jenkins
The was missed when the armv7m was moved over to using the std arm
core_cache, probably because it is disabled by default.
Change-Id: I2f5a18ef6dd783b36e8c29f4c52379104bda4583
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1138
Tested-by: jenkins
Added support for new ST devices in the stm32lx portfolio, with device
id 0x427. These have 256k flash, but in a single bank compared to
device id 0x436 which is a dual bank flash.
Change-Id: Iafdfe990f24bd04b0d6e00385ee70690f3bf8d5f
Signed-off-by: Johan Almquist <johan.almquist@assaabloy.com>
Reviewed-on: http://openocd.zylin.com/1140
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This update adds support for the STM32Lx 384kb dual bank flash. Previously there was a problem when writing an
image that was larger than 192Kb. That lead to openocd printing out two error messages like
"Error: access denied / write protected" and "Error: invalid program address". The reason was that the stm32lx
driver tried to write half pages which overlapped into the next flash bank.
A new configuration file stm32lx_dual_bank.cfg can be used for stm32lx chips with dual bank flash (256kb or 384kb devices).
A sanity check was added for probed flash size values to fix the issue seen on some ST samples that answered incorrectly.
Change-Id: I69e25131983d88613be8606b438f98870c5f1e52
Signed-off-by: Johan Almquist <johan.almquist@assaabloy.com>
Reviewed-on: http://openocd.zylin.com/1125
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
It has been seen on some stm32 targets that the flash size register that
is probed by the driver may contain an invalid size.
This change enables the user to override the probed value.
Change-Id: I09359e59a96f9133d3d939670957d32a830a944e
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1132
Tested-by: jenkins
Reviewed-by: Johan Almquist <johan.almquist@assaabloy.com>
adapter_init (core.c) won't check speed configuration
of the selected interface if it's not needed (.speed = NULL).
When it's not needed, we can now omit adapter_khz in
init scripts and we don't have to implement dummy handlers
for speed_div and khz functions.
It also removes calls to adapter_khz in interface configuration
files when not used anymore.
Change-Id: I6eb1894385503fede542a368f297cec6565eed44
Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Reviewed-on: http://openocd.zylin.com/1131
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Make sure we restore the core mode after executing any algorithm.
We also now check that we actually need to swap the core mode, we may
already be in the correct mode.
Change-Id: Ia48af2c108e0f9868aae241bf25f60323503f092
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1107
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
This simplifies the armv7m_core_reg structure ready for the move to using
the generic struct arm_reg.
Change-Id: I8edb9d77cc54965d49cd2e754568ebcea4cf6964
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/967
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
To simplify things change over to using the generic core_mode struct rather
than maintaining a armv7m specific one.
Change-Id: Ibf32b785d896fef4f33307fabe0d8eb266f7086f
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/966
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The current implementation of hexify was not correctly handling signed chars.
This function is currently used by the ti-icdi driver and as such was causing
random write issues.
As a note perhaps a better long term fix would be to change to using uint8_t
buffers rather than char. This will require changes to the ti-icdi driver
aswell.
Change-Id: I572e69ff2b99227a7d412de056458c0393794b03
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1124
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
LOG_OUTPUT is not intended for general output so use the correct LOG_*
functions instead.
Change-Id: I48d0fe765637024dbafc68f2ea08219d3ff42754
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1104
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
ThreadX support was not working due to it being first in the list of RTOS - regression.
Auto-detect off, an RTOS was always be marked as successfully detected, even if symbols are not found.
Lines 223-227 were unnecessary as they are done in rtos_try_next()
Added lots of comments
Improved readability by separating: GDB not finding a symbol vs no more symbols being available
Regression caused by patch which was allowed only 52 minutes for review : http://openocd.zylin.com/895
Change-Id: Ib4decb01db595ddb3796837c6d8338ce6b9a91ca
Signed-off-by: Evan Hunter <ehunter@broadcom.com>
Reviewed-on: http://openocd.zylin.com/986
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
All the other drivers will only change the state if required.
This brings all the other drivers inline with this behaviour.
The original issue relates to problems on xscale commit 7989000e09
Change-Id: Ifc90ec2eef68a70a14f37c00931a07982bfa200c
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1114
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The makes sure the DWT component is always enabled so that watchpoints
work as expected.
This does need merging into the existing cortex_m logic, however at the
moment this is non trivial.
Change-Id: Ic6cccd1badb51f70a2ca8ea9ab6923788a94c1bf
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1122
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
An issue has been seen with the stm32lx flash driver that if a
power cycle/reset is applied after a erase, any ram loader will Hard Fault
on execution.
A similar issue is mentioned in the errata for the device.
Two solution's seem to workaround this issue:
1, Handle the exception, this means adding exception vectors to the loader
and changing the exception address using nvic vtor register.
2. falling back to using slower direct page writes - approx 50% slower.
Using solution 1 would mean restrictions are placed on the loader location.
Solution 2 was chosen mainly as it was simpler too implement.
Change-Id: I429f06b5a3e3b1d8de90071a88a7df11fc9b46a7
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1010
Tested-by: jenkins
Waiting 20secs is a bit much excessive, we could probably reduce to 5.
Change-Id: Iffb97adb99c2541a075fe78dbc88a53ddf340214
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1009
Tested-by: jenkins
Handle any leading bytes upto the next 128 byte page, enabling us to safely
use the faster page write.
Rather than use a separate word/byte write to program any trailing bytes
we use a combined write function.
Use memcpy for byte writes and change loader to using bytes.
Change-Id: Ie0164a30388f018dd00e752cf5ff87d4f96ced97
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1008
Tested-by: jenkins
As we use the two ST flash drivers for multiple stm32 variants update the
docs as to which targets use which driver.
Change-Id: I84943ff45482a22b3d3dd8491bb4242d79415939
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/990
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Fixed flash page size detection according to EFM32 GG/LG errata.
MEM_INFO_PAGE_SIZE register containts invalid value in devices with
revision number lower than 18 and should not be used.
Change-Id: Idb2832246efcbbec2fd98a5c458f72a36df386fb
Signed-off-by: Roman D <me@iamroman.org>
Reviewed-on: http://openocd.zylin.com/1116
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
When current tap state and end state are the same, transitions are added which is not what should happen.
The usbprog driver was already patched like this long time ago.
Change-Id: I339e87156bdc7b5c83c10c14025b749605d3871a
Signed-off-by: Roman Reichel <romanreichel@aol.de>
Reviewed-on: http://openocd.zylin.com/1113
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Limited (no page unprotect, no block writes) implementation of EFM32
flash support. Verified with EFM32 development kit and STLink V2 adapter
using SWD.
Change-Id: I3db2054d9aa628a1fe4814430425db3c9959c71c
Signed-off-by: Roman D <me@iamroman.org>
Reviewed-on: http://openocd.zylin.com/1106
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This is only minimal support to enable use to catch a Hard Fault in
the stm32l flash bootloader.
Change-Id: I21d6a11893e2f1d173ebff1a651d6f52bf6eec32
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1103
Reviewed-by: Peter Stuge <peter@stuge.se>
Tested-by: jenkins
Currently we have to supply the arg's to this cmd in a set order, this
change fixes that issue.
Change-Id: I14a15732e1917a91009e1ac14fba39ca1523c739
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/992
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Make sure we do not mask out the BFB2 boot bank bit, as this is used on
the larger XL devices.
Change-Id: Iacfdf874140e409e0c4ca9b9aee8f5c2f90dc9be
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/991
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The STM32F0 and F3 devices use a different default RDP to configure a
unlocked device, make sure we use that.
Change-Id: I170779461412c4c202c2cfc8d90baedb7e388150
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/984
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The user is able to use 2bytes of the options byte data for whatever
purpose they wish. Make sure we preserve this during an option erase/write.
Change-Id: Ibf951b11c59a148e671b1eb47fdc9b4f49ccae15
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/983
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Some debuggers (stlink) can't issue 16 bit writes and have to use a
loader to write flash memory.
Currently the loader is not used for option bytes, causing
stm32x_write_options to fail silently on such hardware.
Fix this by using stm32x_write_block to write option bytes as well.
Change-Id: I49c29d53ab5e162463cb349d4c89bef96467e587
Signed-off-by: Szymon Modzelewski <szmodzelewski@gmail.com>
Reviewed-on: http://openocd.zylin.com/480
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The current stm32lx driver will fail if no working area is
provided - fallback to using slow writes if this is the case.
Change-Id: I92b1535fec4aebc855c63ce2c54b10f168f3c07e
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1007
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The smallest pert in the family has 10k RAM, so use that as a default
for the working area.
Change-Id: I78be0d14a254c109ac15a7163552c6132f810416
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1005
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Switch to using the internal HSI when a reset init is called, this also
matches the std stm32l cfg.
Read (verify) speed is increased from 17 to 120 KiB/s.
Change-Id: Ic94ba85949ffdefa17b7be45eef14e30f941d107
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1004
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The stlink/v2 has the ability to check the target voltage if the firmware
is recent enough (>= J13).
As a debugging aid we check the voltage at startup and issue an error if
this is too low to debug reliably.
Change-Id: I98e251f3880e31049c4307051c30bedd3451cf87
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/980
Tested-by: jenkins
Reducing the select and MsgWaitForMultipleObjects timeouts to 1ms makes
a 2-300+% increase in the step time of gdb when using pipes under windows OS.
Change-Id: Id7e52cfb2b206347a9caea61672885a3e2b186de
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1050
Tested-by: jenkins
50d5441e2a commit added a regression when
using pipes with GDB, OpenOCD would appear to hang when exiting GDB.
This fixes that behaviour so we shutdown correctly.
Change-Id: I9b337c2bdd41b1966de1c7631118257afcbfa6bd
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/993
Tested-by: jenkins
Updated as per ST RM0033 rev 5
Change-Id: I627fdab69b440b75b8e4f7c474216538fa5273a4
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1001
Tested-by: jenkins
This is the new proprietary interface replacing the older FTDI based adapters.
It is currently fitted to the ek-lm4f232 and Stellaris LaunchPad.
Change-Id: I794ad79e31ff61ec8e9f49530aca9308025c0b60
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/922
Tested-by: jenkins
Other adapters (TI ICDI) that use this driver can use a larger
read/write buffer size than the original stlink could.
Change-Id: I9beb7748049097cbe29a2340799c450bd74e199d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/948
Tested-by: jenkins
Watchpoints were not being enabled when the hl adapter target was resumed.
This effects both stlink and icdi interfaces.
Change-Id: Ia9f8a9415be97a467cd099b63b6bc9f7f37d0c0d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/931
Tested-by: jenkins
Update rtos detection to use the new target name.
Change-Id: I4e55311bcfbc8af55708b43daf0c73b1c8145934
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/923
Tested-by: jenkins
As part of the switch to using the hla for the stlink interface we rename
the cmds to a more generic name.
Update scripts to match new names.
Also add handlers for deprecated names.
Change-Id: I6f00743da746e3aa13ce06acfdc93c8049545e07
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/921
Tested-by: jenkins
This enables us to change the target name without breaking any
target scripts.
Change-Id: I635f961e573264d3dab2560f3a803ef1986ccfde
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/919
Tested-by: jenkins
Print stlink info always rather than just when debug log enabled.
Change-Id: I2a29ef046925200e1c94624280c0b252fab5219a
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/925
Tested-by: jenkins
Even though the stlinkv1 and stlinkv2 use different usb classes they share
the same layout scheme.
Merge the two into a common layout, thus enabling us to support other
adapter layouts.
Change-Id: I7d02c44a7f94ebc7f2cb5428b02ee40294fb430d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/918
Tested-by: jenkins
Fix for bug introduced in in mips smp support code
in the resume logic that is checking for wrong return
value.
Change-Id: Ice3e0069f936b556fecc338ccc12ddba38deeaf6
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Reviewed-on: http://openocd.zylin.com/1048
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
As the other arg checks do not OR, it is assumed this is a copy/paste error
from the original code author.
Change-Id: I7dfc7396254a6f558887def951c57dfd4a0e6c2c
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/997
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Currently if the target supports srst_nogate we wait until target assert_reset
until we get a chance to assert the srst.
However sometimes we will not get this far if the target has already failed
the initial scan.
This has been tested on stm32.
Change-Id: I2c4486942a011534d3e2044788563669bf457b60
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/972
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Currently if the target supports srst_nogate we wait until target assert_reset
until we get a chance to assert the srst.
However sometimes we will not get this far if the target has already failed
the jtag_examine_chain.
This has been tested on targets that support this behaviour (STM32 and STR9).
Change-Id: Ibcf7584b137b472f31ba6ddd5cd99d848c5508d1
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/971
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
This adds the ability to request to the adapter how we want to connect to
the target, eg. while srst is asserted or not.
This ability can very handy for connecting to unresponsive targets.
A prerequisite is that the target supports srst_nogate.
Change-Id: I0f7c9475160048e8a963e16077754f5403ac8325
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/976
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
If target is disabled at init, then is examined using 'arp_examine', it
can get to cortex_a8_poll with the target state being unknown.
Change-Id: Ifffb345bf971d275d2eb1912648b29f0a75f6ccc
Signed-off-by: Evan Hunter <ehunter@broadcom.com>
Reviewed-on: http://openocd.zylin.com/954
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This change adds smp debug support for mips platforms. The change
leverages the exiting gdb smp support as mentioned in the OpenOCD
documentation for using gdb in smp environemnt. Added commands
smp_on, smp_off, smp_gdb to control the smp mode. The implementation
also provides a way to send Jc packet and toggle the gdb display core
context as well.
Change-Id: I0835a5aed1844b6ebf8291582912f20695346003
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Reviewed-on: http://openocd.zylin.com/937
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This is a minor change to log EJTAG version 4.x and 5.x
as valid versions when debug log is enabled.
Change-Id: Ie20458d033c6d22842cb4a31b56765d4ba2ff123
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Reviewed-on: http://openocd.zylin.com/936
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Fixes issue with big endian hosts and mis-aligned data on some hosts.
Fixes unaligned access exception on hosts that do not support unaligned
access when debugging some arm targets.
Signed-off-by: Jason Moehlman <jmoehlma@linux-software.com>
Change-Id: I6bc6fb1b3c3565b256674b9ef43ed2afd14f5178
Reviewed-on: http://openocd.zylin.com/996
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Other than a larger memory layout these new devices also have an extra
MER1 bit to perform the mass erase.
Change-Id: I7110a05bac95c1707160d1f5622181664291eb4a
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/985
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
No function writes to MIPS32_PRACC_PARAM_IN addresses and probably has no much sense.
Any attempt to write to those addresses should be an error.
Change-Id: Iebea5fa9954e2cd56ad34976dd7d25009c6e6388
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/975
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Current code needs 101 pracc accesses for this function, this code needs 12 less.
There is a singularity in this code, is the only function that restore
a register from param out instead from pracc stack. Obviously the register
was previously stored at param out. This save 2 pracc accesses.
Change-Id: Ie95b6f983a3198dafc0eab2dd5acc11f871a8d83
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/958
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
All the the loads are done with lui and ori instructions, there is
no need to save any register, they will be overwritten.
Like in the previous patch, for speed optimization in write code,
same instructions can be saved if the lower half word or the upper
half word is 0.
If the lower half word is 0, it can be loaded with only a lui instruction.
If the higher half word is 0 it can be done with an ori instruction with register 0.
This code saves 10 pracc accesses at a minimum, and 40 at a maximum,
obviously if register 2 to 31 are 0 or a half word is 0
Current code needs 91 pracc accesses.
Change-Id: I892c5b440191d0c7a474c96845d41c373b7fc637
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/957
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: jenkins
All the writes are done by the new function mips32_pracc_write_mem_generic().
The code is similar to the read generic code.
The reuse of register 15 as memory base address saves 3 pracc accesses.
The first write takes 13(12) pracc accesses and for additional writes 3(2).
Loading miniprograms should take 25% less time and loading fastdata transfer
handler code should be over 2x faster.
Change-Id: Ia3b24ba084af33be99da19f00a7fd4d1b291f350
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/956
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Really nothing new that not explained in previous patches.
The code is expanded as needed, there are no loops in pracc code.
For the first value pracc accesses are reduced from 39 to 16
and for aditional values from 10 to 3.
dump_image should work around 3x faster.
Change-Id: I37c9b13395c09eb52a91f10cdb6cbaedef8ab98b
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/955
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This function is highly optimized, there is not much to
improve.
Loading the base address for pracc access with the new
defined MIPS32_PRACC_BASE_ADDR saves one instruction.
The memory address is loaded in too steps. First the upper
address is loaded. The lower address is passed as an offset in
the memory load instruction.
The offset is signed, if the lower address is in the range of
0x8000 to 0xffff the offset is a negative value, and the upper
address must be incremented by 1.
Pracc accesses are now 12 instead of 14.
Change-Id: I286945b240ed5c5d5cc540780a41a8a5fa075da3
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/952
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
MIPS32_PRACC_BASE_ADDR is defined as 0xFF200000. Now is
possible to load the base address with a lui instruction and
only one pracc access.
Offsets to the pracc code addresses are defined to simplify the code
and probably make it a bit more readable or self-explained.
Change-Id: I853dd2d7fad52745931cc6e6be68c0ae156d897e
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/951
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: jenkins
The function mips_ejtag_read_debug() is defined in mips_ejtag.c
and is called only by mips_m4k_debug_entry() for reading the
CP0 debug register. The comment in this function is obviously wrong.
There is a generic function to read CP0 registers with similar code.
A call to mips32_cp0_read() should work in the same way.
The purpose of reading the debug register is to test if the DSS
bit is set and clear the SSt bit.
It is faster and easier if the SSt bit is cleared without any check.
Remark: DSS bit set only means that a debug single-step exception
ocurred, but it is not possible to step over a sdbbp instruction,
in this case DSS will not be set and the SSt bit not cleared by code.
Resume command at another address will step, so really the behavior
is not the same.
Change-Id: Ibd35f80e0f7669976d96f4ed813830cecf587971
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/950
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The code is a bit large compared to mips_ejtag_step_enable().
With the mips32 xori instruction the code can be
reused.
The number of pracc accesses are reduced from 18 to 7.
Change-Id: If3974ebd64da4461c22b089796646990e68e1b72
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/944
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
As for openocd 0.6.0-rc2 the function mips32_pracc_fastdata_xfer()
should now work at a scan frequency up to 1200Khz.
Mainly usefull to increase programming speed.
Also verify_image should be slightly faster.
Change-Id: I1e9b2be73690a4597e2f6ba069c1205026850f07
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/805
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The new sourceforge platform also supports http access, so use that rather
then repo.or.cz.
Change-Id: Ica89d9475847a2095c179b240053145795549802
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/982
Tested-by: jenkins
This reverts commit 452248af1d. This change
breaks all non-high speed adapters. The patch was not tested and did not get
any review.
Change-Id: Ib38fd242a202fd7c5a8711d9f857cd8f586df44e
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/973
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Commit c4ab127b40 introduces a copy&paste error which affects
the detection of the current thread.
As a result, the stack of the current thread won't be detected
correctly in most cases.
Change-Id: Ib46b8f64be8053d7e9103f427c66796963214419
Signed-off-by: Matthias Blaicher <matthias@blaicher.com>
Reviewed-on: http://openocd.zylin.com/974
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
An issue was observed when using an async algorithm with a target that had
not been previously reset beforehand. The target would enter a infinite
loop within target_run_flash_async_algorithm.
Add a timeout that will at least prevent this issue from happening. and also
suggest the user resets the target.
Change-Id: I5277e0d64e252d3d353e8d5bc9889a37fdc63060
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/949
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The order of the mrc/mcr command matches the ARM Architecture Reference
Manual. This patch corrects the help information for mrc/mcr.
Change-Id: I1f0e6a628a3644124591a6aa291b8a58cfd93b44
Signed-off-by: Karl Kurbjun <kkurbjun@gmail.com>
Reviewed-on: http://openocd.zylin.com/914
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
If we halt due to a breakpoint make sure that we do not remove it during a
step, only remove breakpoints we have created.
Change-Id: I060168e54e53637d4fbf3cbcf62072efdb353807
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/947
Tested-by: jenkins
This occurs when stepping past a breakpoint on a even address with
maskisr option set to auto
With -d3 the following log message appears in this case:
"Debug : Interrupt handlers didn't complete within time,
leaving target running"
Cause : Given a breakpoint is set on the lower half word and the PC is on
the upper half word. When another breakpoint is now set on the current PC
then resuming the core will not result in a break on the newly set
breakpoint. This has been observed on a STM32F1x, STM32F2x (CM3) but not
on a STM32F0x (CM0). It's not clear if this is a STM32F1/F2 only or a
general CM3 problem.
Change-Id: I384813f3bfdf935373b5e23cdb2d7f243c70cc00
Signed-off-by: Peter Horn <peter.horn@bluewin.ch>
Reviewed-on: http://openocd.zylin.com/864
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Added a new configuration file for LPC18xx based boards, such as
HitexLPC1850RevA Evaluation Board, and all other based on the
same microcontroller by NXP.
Change-Id: I68c3827be535b6d09a5c70b6d57191937d00354d
Signed-off-by: Gianluca Renzi <gianlucarenzi@eurekelettronica.it>
Reviewed-on: http://openocd.zylin.com/930
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This config file is intended as an example of how to
use the lpcspifi flash driver, but it should be functional
for most LPC1850 boards utilizing SPIFI flash.
Change-Id: I855854282336701fd210134497ce014017f3aaec
Signed-off-by: Gianluca Renzi <gianlucarenzi@eurekelettronica.it>
Reviewed-on: http://openocd.zylin.com/929
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Added in spi device table SPI Flash Winbond W25Q64CV 64Mbit
Its Device ID 0x001740ef is the same as Spansion S25FL064K (may
be a clone?)
Change-Id: I3cdbd182a0ccde75c78684cb9d54c76059bf34e0
Signed-off-by: Gianluca Renzi <gianlucarenzi@eurekelettronica.it>
Reviewed-on: http://openocd.zylin.com/928
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The ChibiOS code was derived from other RTOS support code which
does not honor the target vs. host endiness.
The other RTOS code still needs to be fixed.
Change-Id: Idf42cfaa30945289bf1756ad6491fff84913eda9
Signed-off-by: Matthias Blaicher <matthias@blaicher.com>
Reviewed-on: http://openocd.zylin.com/962
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The stacking of ChibiOS/RT depends on the usage of an FPU. If the
FPU is enabled the FPU registers are also saved on context switch.
This patch adds automatic detection of FPU for armv7m targets.
Note: With this patch, openocd will only output an error message
warning that the FPU is enabled.
For further FPU support, the correct stacking information
also needs to be added.
Change-Id: I0984cbd9180f247ba2fa610e74a6413cc54239ea
Signed-off-by: Matthias Blaicher <matthias@blaicher.com>
Reviewed-on: http://openocd.zylin.com/961
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
We already have the address of the ReadyList provided by gdb.
It is wrong to resolve that address a second time and it only
works by accident.
Change-Id: I82fa2360931c416290cd7f83e1883f86f90dedc2
Signed-off-by: Matthias Blaicher <matthias@blaicher.com>
Reviewed-on: http://openocd.zylin.com/959
Reviewed-by: Joel Bodenmann <joel@unormal.org>
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Seems ST have changed the ref manual (RM0313 rev1) and reverted to using
letters rather than numbers for the stm32f3x family.
Change-Id: I3a87ec9b0b2447d57dfef98603d30e28fe9ac927
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/926
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Peter Stuge <peter@stuge.se>
The rtos layer was incorrectly handling a qCRC packet as a qC packet.
Make sure we check for the qCRC packet and return unhandled so the gdb
server gets a chance to handle it.
This packet is used in the gdb compare-sections cmd.
Change-Id: I21f8e5fa7225fccd13d65cf9e40186895065a7e3
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/933
Tested-by: jenkins
Reviewed-by: Matthias Blaicher <matthias@blaicher.com>
Reviewed-by: Peter Stuge <peter@stuge.se>
All the packets received will be at start of the packet buffer, so use
more efficient strncmp.
Change-Id: Ib9c45d8f53425367006b1f880c1bde27f03a6cf9
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/932
Tested-by: jenkins
Reviewed-by: Matthias Blaicher <matthias@blaicher.com>
Reviewed-by: Peter Stuge <peter@stuge.se>
The meminfo command cannot exist if the malloc.h header is not
present.
Cannot get the mac address without sys/ioctl.h and SIOCGIFHWADDR
defined
Change-Id: Ifc0fb98c3a60c53ad2e19473e08b34c460529d0b
Signed-off-by: Edgar Grimberg <edgar.grimberg@gmail.com>
Reviewed-on: http://openocd.zylin.com/912
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Peter Stuge <peter@stuge.se>
rtos->current_thread is of type int64_t. All other commands already
respect this.
Change-Id: I9951946ff2a09c53cd78c6ab882c80cdd2ab7ac6
Signed-off-by: Matthias Blaicher <matthias@blaicher.com>
Reviewed-on: http://openocd.zylin.com/917
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
Use ARRAY_SIZE in helper/types.h to determine the size of the
symbol list.
Change-Id: Icc9838323510f8602efa5d0162a4daed33f863b9
Signed-off-by: Matthias Blaicher <matthias@blaicher.com>
Reviewed-on: http://openocd.zylin.com/935
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
linux_get_symbol_list_to_lookup allocates to few memory. On 64 bit
systems the error did not show due to char* being twice its size,
leaving accidentally enough space.
This patch makes linux_get_symbol_list_to_lookup behave identical
to all other RTOS.
Change-Id: I290ea241fb20b65585c8be14609a92fdbd2a307d
Signed-off-by: Matthias Blaicher <matthias@blaicher.com>
Reviewed-on: http://openocd.zylin.com/934
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
This reverts commit 1e7e594452.
For some reason the above commit added a reply to the restart command - this is
not required as per the gdb docs.
Newer versions of gdb (7.0 and above) will complain about this reply.
Change-Id: Ieeae3dcf44d798a91dfc6f7348da982c2ce1be31
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/910
Tested-by: jenkins
Reviewed-by: Joel Bodenmann <joel@unormal.org>
Seems after a reset the stlink is not clearing the vector catch (VC_CORERESET)
in the Debug Control Register.
This has the side effect if the user presses an external reset the core will
halt, this patch fixes that.
Change-Id: Ic3b2c3991b79cacbbd901c02b79613c2e204e71f
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/905
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Seems versions of gdb > 6.8 require an W stop reply after receiving a
kill packet.
Without this we receive the following error from gdb:
gdb/thread.c:72: internal-error: inferior_thread: Assertion `tp' failed.
Change-Id: I86765a321f0429c9b517fe13ded0ee2dbd4b2f87
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/911
Tested-by: jenkins
Reviewed-by: Joel Bodenmann <joel@unormal.org>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Flash algorithm for LPC17xx/LPC2xxx was trying to "reuse" previously
allocated working area on next flashing which is not possible -
working areas are freed automatically on reset. This caused all but
first flashing attempts to fail. As there is no point in storing pointer
to working area, it was converted to local variable.
Change-Id: I939946325ff9eecc4861c0f51ab0f73871a3d7b9
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/860
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Do some cleanup in lpc2000.c - concatenate short lines into single
longer lines, move variable declarations to "just before" they are
used, etc.
Change-Id: Ia7b9f0307dd4857ee8e15c8a6d4d7b5c4392fd80
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/861
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This patch adds ChibiOS/RT support. This patch requires at least
ChibiOS/RT development version starting from SVN revision 4734.
Note, that the Thread structures depend not only on the target
but also on the ChibiOS configuration at build time.
To correct this ChibiOS includes a new "memory signature" which
specifies the offsets.
Special thanks go to Peter Stuge and Spencer Oliver for their
continous input and feedback to this patch.
Change-Id: I842bf7ba6c2309a4efe93d29ea6cd0784a8b22a3
Signed-off-by: Matthias Blaicher <matthias@blaicher.com>
Reviewed-on: http://openocd.zylin.com/901
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
Commit 43902905bb fixed a bug but also
introduced a regression. The RTOS GDB packet handler is always called,
not only when an RTOS is actually configured, so it is important to
check if an RTOS has been configured or not before actually processing
the qSymbol packet.
Change-Id: I1aed54f6c2817e1ebf99ddcda051df4554ea5a3a
Signed-off-by: Peter Stuge <peter@stuge.se>
Reviewed-on: http://openocd.zylin.com/907
Tested-by: jenkins
Since stlink is a special case it presents the same CPU core under a
different name, so copy the configuration to account for that.
Change-Id: I9febf79b388301bde6211d185b5b8161cdadb9ff
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/652
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
With the current timeout setting i = 10 in drtc_run_timeout()
I get "Error: too many retries waiting for DTC status" when
loading a program into the FLASH of an STM32F1.
By experimentation a value of i = 22 was found to be the minimum
on my system. Therefore the value has been increased to i = 50.
Change-Id: Ib67fc648ccaad305871b81c2c39e49de53c330a0
Signed-off-by: Peter Horn <peter.horn@bluewin.ch>
Reviewed-on: http://openocd.zylin.com/863
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The erase time for the option byte page is not directly specified but is
assumed to be the same as the other pages (or mass erase) which is 20 to
40 ms. The current timeout value is 10 which means 10 ms plus the time to
poll the status flag that many times.
With faster interfaces or drivers (such as when using the ftdi driver
instead of the ft2232 driver) the adapter delay is not enough in some
cases, unless the jtag freq is reduced as a workaround. The result is a
"timed out waiting for flash" error when trying to write the options.
Increase the timeout to a minimum of 100 ms, which is in line with the
other erase timeouts. Also make defines of both the erase and the program
timeouts.
Change-Id: Ia86e71505033c52b60ef30092000689fbb547a18
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/902
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Working area pointers shouldn't be re-used, so there's no point in storing
them in the flash bank struct. Make all such pointers local.
Change-Id: Iab65b4e8b475fed7fc72fb8928f54590fa69d260
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/865
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Matthias Blaicher submitted a patch at http://openocd.zylin.com/#/c/891/
to fix the false positive; when no RTOS was detected OpenOCD used the
last RTOS in the list.
While reviewing the code affected by Matthias' patch a rewrite seemed
appropriate, to make the code readable.
Matthias has abandoned his change and this change also fixes the false
positive.
Change-Id: Ic3327ccd036da52ba0a7e21ef93018205e74149c
Signed-off-by: Peter Stuge <peter@stuge.se>
Reviewed-on: http://openocd.zylin.com/895
Reviewed-by: Matthias Blaicher <matthias@blaicher.com>
Tested-by: jenkins
The new code is almost functionally equivalent to the old.
The function now returns 0 instead of -1 if target->rtos has not yet
been allocated. All call sites only test for success, and in practise
that is also the only thing that matters; if the function successfully
iterated to the next RTOS or not.
Other than that the only difference is that the code is now readable.
Many thanks to Matthias Blaicher for the fix to the iteration error!
Change-Id: I3342826f653b5e46c99ad1f58eec26ff10795c33
Signed-off-by: Peter Stuge <peter@stuge.se>
Reviewed-on: http://openocd.zylin.com/894
Reviewed-by: Matthias Blaicher <matthias@blaicher.com>
Tested-by: jenkins
The new code is almost functionally equivalent to the old; besides
error handling the only difference is that the code is now readable.
Many thanks to Matthias Blaicher for pointing out an iteration error
in the rtos_try_next() change, which also affected this change.
Change-Id: If38b87439e9de2303b220b3a7e3200ceaa8391da
Signed-off-by: Peter Stuge <peter@stuge.se>
Reviewed-on: http://openocd.zylin.com/893
Tested-by: jenkins
Reviewed-by: Matthias Blaicher <matthias@blaicher.com>
In FLASHD_ErasePages AT91C_EFC_FCMD_EPA is used to erase sectors.
According to the datasheet FARG[15:2] defines the page from which
the erase will start.This page must be modulo 4, 8, 16 or 32
according to the number of pages to erase. FARG[1:0] defines the
number of pages to be erased. Previously (firstpage << 2) was used
to conform to this, seems it should not be shifted... Changed it
to (firstPage) | erasePages.
Change-Id: I791cc7fc4faf056623ad5a6c7e860315306098a1
Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>
Reviewed-on: http://openocd.zylin.com/830
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
If configure is executed without --enable-ft2232_ftd2xx then the bus blaster
or presto will fail to build with unresolved external ftd2xx_status_string.
Make sure we run the ftd2xx build test if --enable-usb_blaster_ftd2xx is enabled.
Change-Id: I09d270d6fcd083d77f6785b8969d9acb3dfef11d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/892
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
this avoid driving nSRST high after startup, by making sure the nOE is
initialized inactive/high.
This also matches the config used for the STM32-PerformanceStick.
Change-Id: I9376de575b7dc834310d57dbd58575d51f60183e
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/878
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested-by: jenkins
The cortino uses a direct srst connection rather than via any buffer.
As a result this fixes issues with the newer ftdi driver.
Change-Id: I28f6781bccae24de79aa6a03161f298a14fe2581
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/850
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
This hardware uses a output enable buffer that was not correctly defined.
Fixes issues when using the new ftdi driver.
Change-Id: Iba6235a71a6d3c7d16ab729f858b336a4574dfea
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/844
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested-by: jenkins
as well as not being required, as it is already included by jim-nvp.h.
It also makes the doxygen output a bit clearer to read.
Change-Id: Ia2bed7142b4a56b48b1ecf0734e63f860dcd1014
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/859
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The str9-comstick uses a direct srst connection rather than via any buffer.
As a result this fixes issues with the newer ftdi driver.
Change-Id: I0968e8459997a6a2b7bf0c46e89662cd57b4f496
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/842
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
adapter_init expects jtag_get_speed (via ftdi_khz) to return a valid
fallback speed if the adapter does not support rclk. The call was failing
and so was the rest of the adapter init.
The makes the new ftdi driver emulate the old ftdi driver.
Change-Id: Ic7fac7d201241eb181e98f1ba7111f159731f6e0
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/839
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
This patch fixes the bug reported here:
http://sourceforge.net/mailarchive/message.php?msg_id=28350157
When using Rlink under Linux, openocd exits with:
"Error: Read of endpoint 2 returned -75, expected 17"
The return value of -75 translates into EOVERFLOW. The cause is a wrong output buffer size argument passed to dtc_run_download().
Change-Id: I5d056705181ab6a6d4355524df06a0ea9c605961
Signed-off-by: Peter Horn <peter.horn@bluewin.ch>
Reviewed-on: http://openocd.zylin.com/862
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
Added a flash driver designed to allow program/erase of
memory-mapped SPI flash chips for LPC43xx/LPC18xx family
micros. This driver includes three algorithms - erase,
write, and SPIFI peripheral initialization (to allow
memory-mapped access after a reset). The driver has been
added to the flash driver table (drivers.c), and the
OpenOCD documentation has been updated to include the flash
driver configuration command.
Change-Id: I79f4ff8f1f07de4e5f2fe4f8c23aeb903f868514
Signed-off-by: George Harris <george@luminairecoffee.com>
Reviewed-on: http://openocd.zylin.com/783
Tested-by: jenkins
Reviewed-by: Aurelien Jacobs <aurel@gnuage.org>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Moved common SPI flash driver code (device table,
common commands) into flash/nor/spi.c and spi.h.
Updated flash/nor/stmsmi.c to reflect this refactor.
Change-Id: I141644b0af71d3835f29f06dd15b505a00e5b6ec
Signed-off-by: George Harris <george@luminairecoffee.com>
Reviewed-on: http://openocd.zylin.com/782
Tested-by: jenkins
Reviewed-by: Aurelien Jacobs <aurel@gnuage.org>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
This driver implements a bitbang jtag interface using gpio lines exported via
sysfs.
The aim of this driver implementation is to use system GPIOs but to avoid the
need for an additional kernel driver.
A config suitable for RaspberryPi is included.
Change-Id: Ib2acf720247a219768d1cbfeebd88057ed2d7b8b
Signed-off-by: Marc Reilly <marc@cpdesign.com.au>
Reviewed-on: http://openocd.zylin.com/762
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The stlink interface currently does not support 16bit read/writes.
Until a fix is included we issue a error that this is unsupported.
Change-Id: I4552cf2bd3b29e90ecc905325b743c08e2b92d67
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/808
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
In at91sam3.c for Atmel SAM3 flash support, there are arithmetic errors in the functions sam3_page_read() and sam3_page_write().
Address locations are computed incorrectly due to an extra addition operation. This leads to memory locations being skipped during
flash writes and reads.
Smaller programs are written successfully into flash, with memory gaps, while larger programs of legitimate size fail because the
skipped memory is not utilized and therefore unavailable.
The changes address this condition, and have been tested with an Atmel SAM3X-EK evaluation board.
Change-Id: I9ea3b9ed0130b71cbc32b2294e31a6a2bc71b47a
Signed-off-by: Chuen Chou <zhouquan27@gmail.com>
Reviewed-on: http://openocd.zylin.com/806
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
If the target does not support SYSRESETREQ we fall back to using VECTRESET.
This however does not reset the peripherals and we issue a warning to the user
to suggest using a reset-init script.
Also suggest that using hardware srst will give them the same functionality
as using SYSRESETREQ.
Change-Id: Ie1781c4b849fed66c52222e6539735537c879fb3
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/802
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
In function pic32mx_write_block() if the parameter
offset is not a multiple of row size the row offset
(offset % row_size) will be ignored by the flash
controller, shifting the code to the beginning of
the row.
Word programming gets it right.
Change-Id: I134913e3d533688f791bbcb0c6e8983524197f3c
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/796
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
So the user can view the current port number these cmds were changed to COMMAND_ANY.
However this means that the user can also attempt to change the port number after init,
even though this is not supported. Issue a warning that this is not supported.
Change-Id: I3d20dcd81277e7d994240a8e314f27672ff760c4
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/788
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The last bit of a scan is clocked during TAP movement so it's necessary
for the last field to have at least one bit. Strip trailing empty fields
and make sure the TAP is not affected if there's nothing to scan. Clients
probably shouldn't add empty fields so add a debug message to be able to
track and fix them.
Change-Id: I27552568bc11146570b9b99ed8a1ae81b5fb2c50
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/794
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
When there's no data to scan in or out, we still use the clock data out
command and fill the buffer with zeroes, so make sure the buffer is
checked for available space.
Change-Id: Ia6005c40c81f7fdb89379f1b5023fe383184d210
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/793
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Currently only the adapter speed is printed, which can be rather misleading
when DEBUG_INFO is disabled, all the user sees is
6000 kHz
instead lets print
adapter speed: 6000 kHz
Change-Id: I8f02a63f47344457e3c3d0a6774157fa18206440
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/797
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
DISTORTEC's JTAG-lock-pick Tiny 2 is a new interface using FT232HL chip
and layout similar to KT-LINK.
Change-Id: I2831b169cd448ca70397f2dd86c5b749dda3dabf
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/787
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Add single "scripts" folder to search path for Windows OpenOCD builds
that don't use cygwin
bin/openocd.exe
scripts/interface/dummy.cfg
scripts/target/at91eb40a.cfg
Do some refactoring of current code (thx to Andreas).
Change-Id: Idbb08d1368b06f25da44f4f9ab1511db992b1724
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/785
Tested-by: jenkins
Offset calculation into buffer was wrong and code would read outside buffer
if count was not a multiple of four.
Change-Id: Ied625b10221423d5a5f25d27ce1edd8c2c3eca8a
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/749
Reviewed-by: Peter Stuge <peter@stuge.se>
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The number if longwords or "sections" (Freescale term) written for a Kinetis
flash write (4, 8, or 16 bytes depending on the part density/granularity) are
now rounded up to ensure there are no truncations when the desired write is
not a multiple of the minimum write size.
Change-Id: I8db40a8769d8ac5393a46cbf4e5ff0df82faf916
Signed-off-by: Christopher Kilgour <techie@whiterocker.com>
Reviewed-on: http://openocd.zylin.com/738
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
For example in a pic32mx220, pic32mx unlock don't work
if adapter_khz is set to 5000 or more.
A short delay after asserting reset fix the problem.
Change-Id: I62e493edfcea585c36c8de77a969cebac7227b96
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/790
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
If the target supports SYSRESETREQ make sure we use that as the default
if srst is not fitted/configured.
Change-Id: I24c907493134506320e69c1218702930629c1cdc
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/792
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Always scan out all bits, but make sure only the allowed number of bytes
end up in the caller-provided buffer. Discard the rest by adding another
scan field when size < 4.
Rewrite the endianness callback to avoid reading outside allocated memory.
Make it directly usable as a callback without the need for a wrapper. Move
the shared callback to a more suitable home in arm7_9_common.
This fixes the regressions introduced in commits
991ed5a2b6cb90d32e38
and
c3074f377c
Change-Id: Ia8bde8c5a9844e89a1d6c0bc8534cd26f02f8d11
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/789
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The function wait_for_pracc_rw() fails if Pracc bit is 0.
The variable ejtag_ctrl is loaded with the content of the
control register in the first scan.
In the second scan Pracc bit is scanned out as 0, letting
the proccesor go. The result is unpredictable.
All the strange data corruption when scanning at certain
frequencies, or the strange delays needed when entering
or leaving fasdata area are retated to this bug.
Now the code works at any scan frequency, tested up to 15000Khz
and indepently of processor speed, tested at 31.25Khz and 4/8Mhz.
Change-Id: Iedfd81d06d6af4bc738a521f720e42323025b268
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/769
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Retest the condition when needed, instead of abusing the common_magic
field as a flag. There are only two options here. Either it's an armv7m or
it's another arm. is_arm(...) will return true even for armv7m, so it's
imperative to check in the right order.
Change-Id: Ic227f19f7babf1b0b0fe075f9a3abc4eabc7d5f1
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/779
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
By Initialising the param_table we remove the clang warning's.
We are also make sure we are not passing any rogue values to lpc2000_iap_call.
Change-Id: Idb3b0077d1dae5f03dedab1d46d01140fe9ffb10
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/777
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reorder to allocate all memory after COMMAND_PARSE_NUMBER call.
This removes a clang warning about un-released memory
Change-Id: I8dbeb664a6467077157015bd879bc0aefc5e8614
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/776
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
If the flash class was defined as FC_FLEX_RAM then this would always drop
through to the default handler.
This bug was found by clang, so untested.
Change-Id: I2d9fe6415dd216728a145519400f7b9ef1bd3c3a
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/773
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
This file is already included as olimex-arm-usb-ocd.cfg.
Change-Id: I0e66977c58e74ac93a0dc3a0c88a5e5af4992f8b
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/780
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
The embedded projects shop released a new highspeed version of
the openocd-usb adapter. These configuration files adds support
for it.
Change-Id: I9b23d7889f998712b9041af101e3f0b9aba85b28
Signed-off-by: Andrew Karpow <notandyk@gmail.com>
Reviewed-on: http://openocd.zylin.com/771
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
Check that the target is valid before calling any target functions.
Change-Id: I538fccc79d5ec89976e14beab02cb20490b299bb
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/766
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Gitweb changed their instructions, info about ssh keys is now on
separate page for all platforms (selector at top of the page).
Change-Id: I3eab5dfae06cfb73f4a76718f92518454021e557
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/768
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
make distcheck is used to make packages with OpenOCD release, this
command uses information from Makefile.am files to know which files
should be included in the package and which can be left only in
repository. This patch makes a few headers from recent JTAG drivers
and one txt file with info about target tcl config files included in
released packages.
Change-Id: I91202290633a30f53624a8c7d9a0ebf72c40772b
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/767
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Not just print it.
This enables scripts to analyze valuable config options of
arm946e-s cores, do internal BIST memory tests and more.
Be careful to flush caches before disabling it.
Do not forget that BIST test overwrites memory.
- cp15 rewritten from COMMAND_HANDLER to jim_handler.
Change-Id: I734da0be6db0a3127c2daa94ed75efef94da8ceb
Signed-off-by: Alexander Osipenko <sipych@gmail.com>
Reviewed-on: http://openocd.zylin.com/694
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Cache type register C0.C is read-only, and display
hard core configuration information.
This information is unlikely be changed in runtime.
- removed C0.C access when result is not used in
arm946e_invalidate_dcache()
- access C0.C only once per target, store result
in cp15_cache_info field of target structure
- fix cache index count calculation
Change-Id: I12bc4c967fdf07f54d755f2f2f42406c0ababc1a
Signed-off-by: Alexander Osipenko <sipych@gmail.com>
Reviewed-on: http://openocd.zylin.com/693
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Global variables 'dc' 'ic' had been used in the code
to keep target's state of D-cache and I-cache
on debug entry.
This may lead to incorrect operation in configurations
with multiple cores and unequal cache states.
Fix: move cache state to the appropriate bits of the
'cp15_control_reg' field (already present but unused).
Vaule of cp15 control register stored here on
arm946e_post_debug_entry(), and analyzed later
in arm946e_write_memory().
Change-Id: I71ef82be00c21d6fffb3726cec4974d1ece70dfe
Signed-off-by: Alexander Osipenko <sipych@gmail.com>
Reviewed-on: http://openocd.zylin.com/692
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Add cfg files for Hitex LPC1768 Stick
Website: http://www.hitex.com/?id=1602
This board has a FTDI2232D as JTAG interface, using the
same layout as the Hitex STM32-PerformanceStick but with
different USB PID.
Main MCU is a LPC1768 from NXP.
The interface config uses the ftdi driver instead of ft2232.
The corresponding ft2232 layout would be "stm32stick".
Change-Id: I1fd15588c5af35f7d51777d1ad958cc1dc72c6f7
Signed-off-by: Joerg Fischer <turboj@gmx.de>
Reviewed-on: http://openocd.zylin.com/763
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
For odd byte counts, stm32x_write() pads the last byte and writes it using
a discrete 16-bit access. The stlink debugger can't issue 16-bit writes so
it fails for odd byte writes.
This patch changes stm32x_write() to pad odd byte writes into a new buffer
and use the normal code path with a single block write. The fallback path,
when working area cannot be allocated, has to use 16-bit writes though
which means that sufficient working area is required for stlink and odd
byte writes.
Change-Id: I4c5dc456300b6e1056f76b0095be8aceee3e954f
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/756
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
part 2 - files that are currently untested but assumed to work, as other configs using the same layout work
fine
Change-Id: Ifaa1904227ebdc394362ccaf3ad3c5384a716657
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/754
Tested-by: jenkins
When testing a pic32mx220f032b with different values
for adapter_khz and cpu clocks i was getting a lot of
corrupted data from the chip. From time to time
openocd fails with segmentation faults or is aborted
due to memory corruption.
Change-Id: I134743f75c477b3d55dc74ae4474598e153b4a4a
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/690
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Do not call mips32_cp0_read() if not needed.
This will speed up execution of mips_m4k_write_memory()
by near 2x, with parameter count = 1.
Change-Id: I7829a7802b6475bc6d4ac3f0632d8d239d1072da
Signed-off-by: Salvador <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/624
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Remove a lot of the repetitive code in stm32f1x flash probe by converting
the large if-selector to a switch, moving the common checks outside it and
concentrating the failure handling to a single point.
Do the same with stm32f2x and stm32lx for consistency.
Change-Id: Ic0ecfb1533c49f5d2108cda5fd20c8372d7c71ef
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/746
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Rather than failing if the flash size reg cannot be read lets assume
we have the max flash size fitted.
It is quite common on early ST silicon to not correct support this register.
Change-Id: Ife058d60ae0027faad2c929ebd5b7fe2ef27234d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/743
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Revision X is not mentioned in the latest RM0038 rev5, however it has been
confirmed correct by ST using ST-LINK Utilty.
Change-Id: I65210e512ea25818a1d0d3b223502ebd7535b29d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/742
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
- Moved variant-independent code to lpc17xx.cfg, which will be included from
lpc17??.cfg files automatically.
- lpc1768.cfg filled with variant-dependent code.
Change-Id: I7dabe6ed7da7be640ed38c13aaaa096b8796d9a0
Signed-off-by: Vandra Akos <axos88@gmail.com>
Reviewed-on: http://openocd.zylin.com/675
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
FT232H chips are new highspeed devices from FTDI. Basically these are a half of FT2232H (or a quarter of FT4232H), so only one channel which can be used as OpenOCD
interface. The chips are supported by libftdi 0.20 or later and by ftd2xx 2.08.12 or later.
Change-Id: Ic9a2c279167c3419a24f0d6befacbb83c4ffeb25
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/736
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Salvador Arroyo <sarroyofdez@yahoo.es>
It's unnecessary and prevents reusing this function to fix
option byte writes.
Also try to disable flash writing after an error.
Change-Id: Ib5a7b768a1523e6b8da1555126fef4c1e60ab083
Signed-off-by: Szymon Modzelewski <szmodzelewski@gmail.com>
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/479
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The existing code tests the current debug_level for validity, allowing
the user to set it too high and never change it after that. The new
behaviour is to test the debug_level that the user has requested.
Change-Id: I85726a2e606c8d137e9b1cfe76fee865084844b1
Signed-off-by: Alan Bowman <alan.michael.bowman@gmail.com>
Reviewed-on: http://openocd.zylin.com/764
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Based on ft2232.c but uses the MPSSE layer for low-level access, greatly
simplifying the JTAG logic. Remove all libftdi/FTD2XX code and all layout
specific code. Layout specifications are instead handled in Tcl.
Use a signal abstraction to enable Tcl configuration files to define
outputs for one or several FTDI GPIO. These outputs can then be
controlled using the ftdi_set_signal command. Special signal names are
reserved for nTRST, nSRST and LED (for blink) so that they, if defined,
will be used for their customary purpose.
Depending on the type of buffer attached to the FTDI GPIO, the outputs
have to be controlled differently. In order to support tristateable
signals such as nSRST, both a data GPIO and an output-enable GPIO can be
specified for each signal. The following output buffer configurations are
supported:
* Push-pull with one FTDI output as (non-)inverted data line
* Open drain with one FTDI output as (non-)inverted output-enable
* Tristate with one FTDI output as (non-)inverted data line and another
FTDI output as (non-)inverted output-enable
* Unbuffered, using the FTDI GPIO as a tristate output directly by
switching data and direction as necessary
The data and output-enables are specified as 16-bit bitmasks,
corresponding to the concatenation of the high and low FTDI GPIO
registers. To specify an unbuffered output, use the same bitmask
for both data and output-enable.
The adapter configuration file must also specify default values for the
FTDI data and direction GPIO registers, and the channel being used (if
different from 0).
Change-Id: I287a41d4c696cf5fc74eb10d5e63578b0dc7f826
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/452
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
This is a higher-level libftdi replacement for use when implementing
protocol drivers for FT2232, FT2232H or FT4232H. It takes care of device
open/close and, unlike libftdi, also MPSSE command abstraction, command
queueing, buffer handling and return data parsing.
The FTDI device is accessed through libusb-1.0 in asynchronous mode.
Change-Id: I051adb574dcc39f8ca9cd7f6dbe6ae4aeea5f4c8
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/451
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Peter Stuge <peter@stuge.se>
The ADIv5 spec guarentees that tar_autoincr_block will be 10bits.
Make this the default for Cortex-M family until we detect a Cortex-M3/M4,
we then change autoincrement to 12bits.
Change-Id: Ie8c89134aa036879bdd8a3c312cee9715dbc6913
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/730
Tested-by: jenkins
Reviewed-by: simon qian <simonqian.openocd@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
openocd -f board/sheevaplug.cfg -c init -c exit
the calling shell will believe that openocd exited with an error due to exitval will be non-zero
This is not tested against incomming telnet
Change-Id: I63d15715a7b46f39a7de261a45039f8c3cad7a98
Signed-off-by: Stian Skjelstad <stian@nixia.no>
Reviewed-on: http://openocd.zylin.com/470
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Bill Traynor <wmat@alphatroop.com>
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
jim_target_md is supposed to print out results with command_print in
hexdump format. It was using command_print which appends a newline character
aftre every invocation. Using command_print_sameline instead
Change-Id: Iaff03021acc38d54b5a082cb58b82aa4449c0715
Signed-off-by: Vandra Akos <axos88@gmail.com>
Reviewed-on: http://openocd.zylin.com/669
Tested-by: jenkins
Reviewed-by: Alexander Osipenko <sipych@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
- Added a few lines of comment before the function explaining the usage and the
output generated by the command
- Added a few lines of comment in the body explaining what is happening to improve
code readability
- Renamed a few variables to improve readability:
* a -> addr
* b -> dwidth
* c -> count
- Added a new variable, named byte to contain the number of bytes to read, instead
of overwriting the count parameter, to avoid confusion between the two values.
Change-Id: I5828ec0f5aadaa39becec7b84f198756bb2c3d41
Signed-off-by: Vandra Akos <axos88@gmail.com>
Reviewed-on: http://openocd.zylin.com/665
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Interface drivers regularly need to keep track of where each part of a long
read buffer should be copied, once that data arrives. Both source and
destination are often at an arbitrary bit offset.
This queued bit-level copy can help with that, by allowing the driver to
perform postponed reads from the receive buffer already when building the
transmit buffer, and have those reads executed at a later time when data is
available.
For simplicity, it uses the linked list implementation list.h imported from
the Linux kernel.
Change-Id: I06862a0a6f057cbbcacfb021f17a795195faded2
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/450
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Peter Stuge <peter@stuge.se>
New flash description for ATSAM3SD8C used on SAM3S-EK2 development boards. Name used
is "at91sam3sd8c" and chipid is 0x29ab0a60. Mirrors description of other similar parts.
Change-Id: I7fc4b82e7969451645ab067223663f08b76d866b
Signed-off-by: Mike Crowe <mpcrowe@gmail.com>
Reviewed-on: http://openocd.zylin.com/684
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
jtag_interface.transports field was left uninitialized, which triggers warning message
on program startup.
Although hardware natively supports SWD interface, no software support
currently present, so the value choosen to be <jtag_only>.
Change-Id: I2da41790b1850950af416cec4362d5b7bf927b2b
Signed-off-by: Alexander Osipenko <sipych@gmail.com>
Reviewed-on: http://openocd.zylin.com/670
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
In the previous iteration, the page counter for erases would not be updated with
the erase size. This patch keeps the page counter synced with the sector counter.
Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>
Change-Id: I95e56a3257b2ad8301c9f28167b842fa6466334f
Reviewed-on: http://openocd.zylin.com/686
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
For multi core cpus with cores without an idcode this doesn't work
because the extra bit for every core and a n-bit shift in the data
stream.
Change-Id: Iba0ad9422ea55c01492b27b936d028719be31180
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/618
Tested-by: jenkins
Reviewed-by: Bill Traynor <wmat@alphatroop.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Updates the Kinetis NOR flash support to handle all known block and sector
sizes. Previously only 2kiB sectors were hard-coded, now all four known
combinations non-volatile sector sizes are supported.
The premise of separating Kinetis Program Flash (PFLASH) from FlexNVM is
also introduced. This means each "block" of flash (in Freescale terms) is
treated as a bank in OpenOCD. Correspondingly, the existing board
configuration for the TWR-K60M512 eval system is updated to recognize two
banks instead of one.
A board config for the TWR-K60F120M is also added.
Bank and sector erase and programming has been checked with both of the
mentioned eval boards.
Change-Id: Iae2d10ebf8f548d0a3698df5430bbbe1ccadc58a
Signed-off-by: Christopher Kilgour <techie@whiterocker.com>
Reviewed-on: http://openocd.zylin.com/663
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Jan Dakinevich <jan.dakinevich@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Some versions of Segger's software do not select JTAG interface by default.
Do it in the intial setup.
Firmware version check code still present, with updated set of unsupported.
Note from Segger:
Alright, we were not aware of that OpenOCD does not select the interface
before it starts communicating with the target. A debugger should always
select the appropriate target interface before it starts communicating with the target,
since otherwise it could also happen that a previous session with another debugger
had selected SWD and the interface was not switched again by OpenOCD.
Change-Id: I5b4eab7e0e3625ec32be75a36d89e16d17e899bf
Signed-off-by: Alexander Osipenko <sipych@gmail.com>
Reviewed-on: http://openocd.zylin.com/667
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
jlink_usb_io() function added for basic communication,
since jlink_usb_message() is more specific to JTAG transactions.
To verify the patch issue "jlink config" command.
Change-Id: Id7d10bd5e8985d4c77f2e0ca47fb6033db2877bf
Signed-off-by: Alexander Osipenko <sipych@gmail.com>
Reviewed-on: http://openocd.zylin.com/679
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
OpenOCD does not work with the latest firmware versions
of Segger J-Link.
Latest working version: V4.42c
Unsupported versions: 4.44 to 4.46f, 4.20 to 4.30
Older versions of firmware can be found here:
http://www.segger.com/j-link-older-versions.html
The firmware versions does not correspond directly with
"Software and documentation pack for Windows", it may be
distinguished by the "compile" date in the information string.
Print an warning message if unsupported firmware version detected.
Change-Id: Id7d1f965b8ce2fdbcd0026a85ddd093e2fa48720
Signed-off-by: Alexander Osipenko <sipych@gmail.com>
Reviewed-on: http://openocd.zylin.com/666
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The J-Link related commands and configuration commands were added
to the "8.2 Interface Drivers" section of the manual.
(previously they were enumerated as comments).
The 'jlink pid' was marked as Config all other as Command.
A draft of a compatibility note was added, but probably
a table would be more appropriate.
Change-Id: Ifbe230706815196aaad4e3729ed5089d5088b769
Signed-off-by: Liviu Ionescu <ilg@livius.net>
Reviewed-on: http://openocd.zylin.com/680
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Seems like an esthetic change, but it will allow easy support for
other lpc17xx devices.
Change-Id: I2cb953ce1afdd82f6ca65b38d5557a28416f895e
Signed-off-by: Vandra Akos <axos88@gmail.com>
Reviewed-on: http://openocd.zylin.com/674
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
When changing the path to the hooks folder, the path needs to be
surrounded by quotation marks, to avoid failures when the current
path contains spaces (not only legal, but a common case on
Mac OS X).
Change-Id: I8f180ab5f26fab00a7d78ebfe5713d4146c27452
Signed-off-by: Liviu Ionescu <ilg@livius.net>
Reviewed-on: http://openocd.zylin.com/683
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
Removed the superflous call to Jim_GetResult,
as we are reading in the result to a variable
anyways in the next instruction.
Change-Id: Idc96400737dc15e28304e97bcea79fa6c7a88ae1
Signed-off-by: Vandra Akos <axos88@gmail.com>
Reviewed-on: http://openocd.zylin.com/661
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Seems I5347352e7595686634bd0de13fcf6de6e55027b0 introduced an issue when
reading 8/16 bit data - the in buffer was always set to 32bits.
Change-Id: Ife2bb6a20fcb3ec0e486655512164f25ae9196b4
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/660
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Call jtag_tap_add before LOG_DEBUG otherwise abs_chain_position does
not get correctly set.
Change-Id: I47bd00cc83259c8bfd5551e08c3bb2ebeb5993f5
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/658
Tested-by: jenkins
Reviewed-by: Bill Traynor <wmat@alphatroop.com>
This patch add the Sony Ericsson J100I Phone to the board configurations.
Change-Id: I083ddf067c8ecdfdda0404fe9e9df980dbb86fe8
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/631
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This patch add the TI Calypso CPU to the configuration files.
Change-Id: Ieb462960391c4a2c630d7a83699c3b6e8162ace9
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/630
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
These events have been deprecated for a number of years, update any
remaining scripts to the new events.
Change-Id: Ic31ff388545ac8b3a500045699ca92c541b13f12
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/634
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested-by: jenkins
Reviewed-by: Bill Traynor <wmat@alphatroop.com>
User Guide: Chapter 6 'Config File Guidelines'. The directory listings
of interfaces, boards, and targets has been brought up to date.
Change-Id: I53f218a94cb81c5e90298b367259e833192af5f3
Signed-off-by: Bill Traynor <wmat@alphatroop.com>
Reviewed-on: http://openocd.zylin.com/646
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
this header is used in numerous files and adding to config.h
simplifies its use globally.
Change-Id: Id724a9950b90504721233022c7fb5768e9bc5548
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/649
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Commit 9ca1592cb9 started on documentation
for the -rtos option, but some of the documented values were incorrect so
we'll clean up the mess here.
Many thanks to Freddie Chopin for spotting this!
Change-Id: Iaa633bd40ff5f75dd6a69e74e79dafc1643ee21a
Signed-off-by: Peter Stuge <peter@stuge.se>
Reviewed-on: http://openocd.zylin.com/642
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested-by: jenkins
This enables us to better handle some of the low level functions that the
stlink does not support. It also enables us to share a few more of the
standard cortex_m3 functions if necessary.
Change-Id: I7a2c57450122012ec189245d8879d8967913e00e
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/637
Tested-by: jenkins
Use default_flash_blank_check, this will use the much faster
blank_check_memory handler if supported - 15x quicker on stm32f4.
Otherwise it will fall back to using the slower default_flash_mem_blank_check.
Change-Id: Ia231b3e95468c9e92594dbdbe1fa2d69e1506fc3
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/632
Tested-by: jenkins
jimtcl 0.73 has a issue when make clean is called.
we have only included that fix as this is close to a release to update
to jimtcl master.
Change-Id: I5791ff32a98bd76e52feb9475605cbecf58420e5
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/638
Tested-by: jenkins
This makes the newer v2 api behave as per the v1 api, eg. single stepping
masks all interrupts.
A better long term solution is to use same behaviour as a cortex-m3
target, see CORTEX_M3_ISRMASK_AUTO.
Change-Id: Iaf9f9adf225cf274faaac938050bb996582aa98f
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/621
Tested-by: jenkins
Some targets support connecting while the target's srst is asserted.
Tested on pic32 family.
Change-Id: I0d20c40af6d031d1306043893e95e61f484c0a87
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/608
Tested-by: jenkins
Some targets support connecting while the target's srst is asserted.
Tested on stm32 family.
Change-Id: I1197dd721a1e1cbf95ee77dfd8e1082b165b22a9
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/607
Tested-by: jenkins
Some targets support connecting while the target's srst is asserted.
Tested on stm32 family.
Change-Id: I9df43623025e37832155aeee7aa099b844b85f16
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/606
Tested-by: jenkins
cfi_spansion_write_block() passes an arm_algorithm struct to
target_run_algorithm() which in turn calls armv7m_start_algorithm()
which expect an armv7m_algorithm struct.
As armv7m_algorithm is bigger than arm_algorithm, when
armv7m_start_algorithm() writes in the struct, it overrun the buffer,
writting junk on the stack, which latter on generates a segfault.
This patch ensure we use a properly sized armv7m_algorithm struct
when the target is an armv7m.
Change-Id: I4ab67c15ae4bb72454414a81b92a4231dcdb2239
Signed-off-by: Aurelien Jacobs <aurel@gnuage.org>
Reviewed-on: http://openocd.zylin.com/623
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
seems 9933fa334d introduce a regression
if the target was anything other than armv4_5 or armv7m.
Just check that we have an arm target.
Change-Id: I67c05138e5be2952ee92e9bfa15e1d050844462a
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/615
Tested-by: jenkins
Reviewed-by: Aurelien Jacobs <aurel@gnuage.org>
check that the cfi driver supports the current target arch.
Change-Id: I8a95908684de67bf1657d1956f2573662a641cc1
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/614
Tested-by: jenkins
Reviewed-by: Aurelien Jacobs <aurel@gnuage.org>
This makes the code a bit easier to read as arm_algorithm can
refer to other arch's, not just armv4_5.
Change-Id: I78c99d40f34cda04e06f2daee75b48ff40a1d23d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/613
Tested-by: jenkins
Reviewed-by: Aurelien Jacobs <aurel@gnuage.org>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Use loaders that have been built for cortex-m0, making them usable for both
cortex-m0 and cortex-m3 families.
Change-Id: Ifd82be87eaec2cb96464290c80800cec3630d619
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/604
Tested-by: jenkins
The stm32f0 parts use a different address then the rest of the family.
Add a function that returns the correct FLASH_SIZE reg depending on variant.
Change-Id: Idb41580f7162f395b347cec034d6b745847326b7
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/601
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The busblaster.cfg was contributed on April 23, 2012 and is a
duplicate of dp_busblaster.cfg that was contributed on Oct. 23,
2011. Therefore, deleting the second version. Also, renaming
the original dp_busblaster.cfg to simply busblaster.cfg, as this
name is more concise.
Change-Id: Iccb1f10f53dbbb248b1ff4c6295eaf67c32247c1
Signed-off-by: Bill Traynor <wmat@alphatroop.com>
Reviewed-on: http://openocd.zylin.com/622
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
The newer versions of BeagleBone boards use the default vid/pid
pair for FT2232 debugging. Please see the following README:
http://beagleboard.org/static/beaglebone/latest/README.htm
On revision A3/A4 boards, the VID/PID were chosen to match the
TI XDS100v2 (0x0403/0xA6D0). On A5 and newer revisions when we've
given the authors of CCS the chance to update their software, the
generic FTDI VID/PID (0x0403/0x6010) will be used to simplify
installation of drivers for systems already having those drivers.
Change-Id: I44228eb2029162f23d084eb05bcfef39e615668d
Signed-off-by: Bill Traynor <wmat@alphatroop.com>
Reviewed-on: http://openocd.zylin.com/619
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
The working area used in the config was incorrect, we only have 8K on this
board not 16K as the original cfg was declaring.
Change-Id: Ie0309fb86d839bd3bc1ac9383905b581fac5c388
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/598
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
This enable the user or board config to override the parameters
passed to stm32_stlink.cfg.
Required to fix a incorrect working area bug with the stm32vldiscovery.
Change-Id: I40a4f7913ff37d577d44b1f23befccf0317080a1
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/597
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
reset_config is now supported by stlink, remove from the config as this
is a per board option.
Change-Id: I85208d2154502b8d3a098afe1d9a28d75820a7c0
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/582
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
This adds the ability to support srst reset for the stlink/v2.
stlink/v1 will fallback to using SYSRESETREQ which is a full reset - including peripherals.
To enable the use of the srst add the following to your cfg:
reset_config srst_only
Change-Id: I570de607c5f370fd6a4abf47360686c9be07bcdd
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/581
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The STLINK/V2 supports two api's.
This completes the support so STLINK_JTAG_API_V2 is usable.
Support for hardware srst still needs adding.
Change-Id: Ic4d0499be2a225d18abf96fd6f5ce5e295fb1f37
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/561
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The first available devkits for the at91sam3x8h had the ES device populated.
The ES device had an error in the CIDR, specifically in the last byte of
which the upper 3 bits identifies the chip family - cortex-m3, arm7tdmi etc.
The problem was fixed on the ES2 devices - Thanks to Pat Hickey for giving me
the heads-up.
Change-Id: I13dd7fbe0cffaf76f948188c9459dc3cf4435570
Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>
Reviewed-on: http://openocd.zylin.com/575
Tested-by: jenkins
Reviewed-by: Jim Norris <u17263@att.net>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Atmel introduced 6 new Cortex-M4 processors on 2011-10-26
SAM4S16C - 1024KB flash LQFP100/BGA100
SAM4S16B - 1024KB flash LQFP64/QFN64
SAM4S16A - 1024KB flash LQFP48/QFN48
SAM4S8C - 512KB flash LQFP100/BGA100
SAM4S8B - 512KB flash LQFP64/QFN64
SAM4S8A - 512KB flash LQFP48/QFN48
The SAM4S processors still suffer from the "6 waitstates needed
to program device" errata.
Other relevant changes are:
1. Address of flash memory starts at 0x400000.
2. EWP (Erase page and write page) only works for the first two 8KB "sectors"
3. Because of the EWP not working for all the sectors, normal page writes have
to be used. The default_flash_blank_check is used to check if lockregions
should be erased.
4. The EA (Erase All) command takes 7.3s to complete. (Previous timeout was
500 ms)
5. There are 128 lockable regions of 8KB each.
Implemented default blank checking, and page erase for load_image scenarios.
This is to compensate for the EWP flash commands only working on the
first 2 8KB sectors.
Change-Id: I7c5a52b177f7849a107611fd0f635fc416cfb724
Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>
Reviewed-on: http://openocd.zylin.com/528
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The value returned from target_write_buffer is still ignored.
Change-Id: Icb49d4d1313a5e4f7df68d3f122a5f81cfa0604a
Signed-off-by: Linus Tolke <linus@tigris.org>
Reviewed-on: http://openocd.zylin.com/596
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
In Section 2.7 USB ST-LINK based made these two changes:
"they only works with" to "they only work with"
"following method's" to "following methods"
Change-Id: Idfe6c11c3fa6f2157d01697cd7f480a9d495c8e2
Signed-off-by: Bill Traynor <wmat@alphatroop.com>
Reviewed-on: http://openocd.zylin.com/590
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
since gerrit 2.3 pushing changes to refs/for/ is deprecated in
favour of using refs/publish/.
Change-Id: I6244b9645da2144921583bd9778a95c563fac89f
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/567
Tested-by: jenkins
Use one board file per eval board, so that the filename matches the
exact board the user has / wants to use. Merging different boards into
one file is confusing.
Change-Id: I7c50233924a87a913723d7215c4851039c2971bc
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Reviewed-on: http://openocd.zylin.com/566
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Added the Flyswatter2 to section 2.3 USB FT2232 Based hardware
list.
Change-Id: I6a382644b5a0313d30afb5a97d0a9ea00f01efa9
Signed-off-by: Bill Traynor <wmat@alphatroop.com>
Reviewed-on: http://openocd.zylin.com/584
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
When following the Patch Guidelines step by step,
an error occurs at step 6.
"git pull --rebase origin/master" results in the error:
fatal: 'origin/master' does not appear to be a git repository
Removing the / seems to fix this.
Change-Id: I4e2fa23c60654abeaebd3b25a8c8375aa07b0abd
Signed-off-by: Bill Traynor <wmat@alphatroop.com>
Signed-off-by: Peter Stuge <peter@stuge.se>
Reviewed-on: http://openocd.zylin.com/574
Reviewed-by: David Anders <danders.dev@gmail.com>
Tested-by: jenkins
This patch fixes the link to the Zylin ZY1000 JTAG Probe webpage.
The ZY1000 product line was acquired by Ultimate Solutions, Inc. in May 2011.
Change-Id: If68cd45a0c47aa20b2e4bb62939b2c505c8c8c2e
Signed-off-by: Bill Traynor <wmat@alphatroop.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/571
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
add initial TCL support for the pandaboard-es which is
based on the omap4460 from Texas Instruments.
Change-Id: Ic63588721487feb95e7cb3d41cfaab0d2f181766
Signed-off-by: David Anders <danders.dev@gmail.com>
Reviewed-on: http://openocd.zylin.com/573
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
this patch adds the initial support for the omap4460 es1.0
version which is similar to the omap4430 and used on the
pandaboard-es.
Change-Id: If885f7d9f8809929bd799786b539e4f499fa3478
Signed-off-by: David Anders <danders.dev@gmail.com>
Reviewed-on: http://openocd.zylin.com/572
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
The target address for the partial data needs to be bumped past the
full page data. Otherwise, the partial data overwrites the start of
the flash block.
Change-Id: I1246b2fa8acbdb8193edcf7029309f11d1c6069c
Signed-off-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/555
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
* Added support to the FT2232 driver for the FT2232H-based
Digilent HS1 adapter.
Change-Id: Iab6cc15f299badaf115615b5d4d785ecb2273c27
Signed-off-by: Stephane Bonnet <bonnetst@hds.utc.fr>
Reviewed-on: http://openocd.zylin.com/558
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Fix following warning message logged by udev at start
udevd[421]: SYSFS{}= will be removed in a future udev
version, please use ATTR{}= to match the event device,
or ATTRS{}= to match a parent device, in
/etc/udev/rules.d/95-openocd.rules:81
Change-Id: I6de935c13a3327e3d718c110f97d19b9847ceca5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/552
Tested-by: jenkins
Reviewed-by: Luca Bruno
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Add swd_init_reset and swd_add_reset.
Add adapter_assert_reset and adapter_deassert_reset, and call them instead
of JTAG reset functions.
Change-Id: Ib2551c6fbb45513e0ae0dc331cfe3ee3f922298a
Signed-off-by: Simon Qian <simonqian.openocd@gmail.com>
Reviewed-on: http://openocd.zylin.com/526
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This functions are unfinished and work only with parameter count up to 1024.
Commands mdh and mdb from pic32mx context show values not related to memory
content if parameter count is bigger than 1024. Firt 1024 are ok.
Change-Id: Ie3f4d4a0f9d1d1a69bd3a18de2f72dd9249514cb
Signed-off-by: Salvador <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/550
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: jenkins
Now the the "Fast" version for memory blank check in pic32mx.c can be called:
default_flash_blank_check() instead of the "fallback" default_flash_mem_blank_check().
The command "verify_image", without working area, now don't show:
checksum mismatch - attempting binary compare
when there are no real errors in flash.
Change-Id: I256e8ae949289634e1de5c1c2861e4c4c4b7fdce
Signed-off-by: Salvador <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/549
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
we already have a link to the patch primer in the main index.
Change-Id: Ib90ade76a17f5d99da8fe481d8f87c68eca38f1c
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/546
Tested-by: jenkins
Small script to setup Gerrit with the local repository
Usage: tools/initial.sh <username>
Change-Id: I26527c35cfe040c7752efec06064d5dc9e3ec6a2
Signed-off-by: Ulf Samuelsson <ulf@emagii.com>
Signed-off-by: Attila Kinali <attila@kinali.ch>
Reviewed-on: http://openocd.zylin.com/290
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The stlink partially supports the cortex-m4 fp regs and requires these
defines to build.
Change-Id: Id3aa802ecc7006cb6d9f84b79ab3c21af24c1001
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/545
Tested-by: jenkins
This patch fix the register index on read/write register.
Change-Id: I7b52a927a48259d6f497ac0f474aff7ff1529e9a
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/525
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This adds support for the STM32F4 target and the STM3241G Eval Board, in
both standalone and using the onboard STLINK.
Change-Id: I62f8908b5880568b2b36c78a78f94c40861ff335
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/540
Tested-by: jenkins
The SAM3A/X processors that were released thus far is either
a SAM3A/X(4) - 256K, or a SAM3A/X(8) - 512K device. Thus
the config files are per variant, and not per device.
Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>
Change-Id: I84d26d044e810eb428b1d6287907ea3bf8364c73
Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>
Reviewed-on: http://openocd.zylin.com/522
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
we have already updated autoconf to use configure.ac instead of
configure.in, so update release.sh to use the new name.
Change-Id: I2dc2beaf2f85058c4627183bc093052677ccba1b
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/537
Tested-by: jenkins
Currently if we have multiple transport's defined we receive an warning similar to:
must select a transport.
allow transport 'jtag'
allow transport 'swd
This removes that warning and only prints this info if transport_init fails.
Change-Id: I87126390f234bc2f705e1f150a0dcc110dcab151
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/532
Tested-by: jenkins
The bug shows up with the command "mdw addres count" and only if count>1024 (count>0x400).
The first 1024 values shows as expected, but the rest of the values are wrong.
Name of variable bytesread" is changed to "wordsread" to reflect what really does.
Change-Id: Iad79393e72da2637551c5ae6e829e3873605c520
Signed-off-by: Salvador <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/527
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Add a warn message to inform the user that something is wrong
with the flash settings or command parameters.
Change-Id: Ia55868b2abf2a17845e51620b0f29b2809d841c2
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/280
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This patch let openocd running and only close the gdb connection
on error.
Change-Id: Ifb88e16834b51207cc4c82210eab904ed8d30b71
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/523
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This patch fix the compare for the list size and the register index.
Change-Id: I36d5e078f57d2a9f7823cfdf0d537762e00f6929
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/516
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
On operating systems with opportunistic malloc() (e.g. default setting in
GNU/Linux) malloc can sometimes allocate a huge memory region but later the
process will get killed on the first attempt to use this memory, so
checking for malloc's return value is not enough to prevent a crash.
This patch is compile-tested only.
Change-Id: I5e21663115c8e9a0ca9f3d71f7ba4bd09e5c3bb1
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/521
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
When gdb loads an elf file of a newer or older version of the firmware
being debugged, or when the firmware is not running yet, there's a high
probability of FreeRTOS variables to be read incorrectly, thus leading to
an attempt to allocate an enourmous amount of memory. Without this check
OpenOCD simply crashes and that's mad confusing.
Change-Id: I404a072e886d2d47d9d942cfaea8417eb8bd4a5d
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/520
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The {read,write}_mem32 interface functions was asking a 32 bits buffer
but they don't need 32 bits alignment.
This will change the interface to a 8 bits buffer to remove the
alignment mismatch warning. This was causing build errors on platforms
with strict aliasing rules.
Change-Id: I338be8df5686f07a64ddb4f17c1bb494af583999
Signed-off-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Reviewed-on: http://openocd.zylin.com/483
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This patch checks the received register length with the local
configured register length and disconnect on a length missmatch.
Change-Id: I6b112c6b55a9ffb4526f582a384ffa91dc8b792f
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/517
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This patch add floating point register read/write
functionality through the SCS debug interface.
Change-Id: Id20e109dd7cccba00671d55ca8aabeb4936cceb9
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/512
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This patch determine all cpu types and not only
the cortex M3 and the stm32 target use the common
target examine function from the cortex_m sources.
Change-Id: If689dd994b3855284b927fc4b206f420cf32b6c7
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/511
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This patch fix the slow flash write issue on pflash only devices.
The Family Reference Manual says:
For devices with FlexNVM: FlexRAM
For devices with program flash only: Programming acceleration RAM
So the acceleration RAM is available for the flash section command on
this device.
Change-Id: If6541a23a4457c5ed8858848a145f35cac63138b
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/509
Tested-by: jenkins
Reviewed-by: Tomas Frydrych <tf+openocd@r-finger.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This patch prepend the v1 mass storage protocol to the command
buffer and simplify the usb read/write handling.
Change-Id: I709602600e93cd1eb5848fa9f4d15659ba85eb35
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/506
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This driver provides support for the P&E Micro OSBDM adapter (sometimes
named as OSJTAG), mounted on the Freescale TWRK60N512 bord. Thus, it
provides a quick start when working with this board. The driver doesn't
use BDM commands, but work with OSBDM adapter using only JTAG commands.
Change-Id: Ibc3779538e666e07651d3136431e5d44344f3b07
Signed-off-by: Jan Dakinevich <jan.dakinevich@gmail.com>
Reviewed-on: http://openocd.zylin.com/492
Tested-by: jenkins
Reviewed-by: Tomas Frydrych <tf+openocd@r-finger.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Atmel introduced 7 new Cortex-M3 processors on 2012-02-28
SAM3X4C - 256KB flash
SAM3X4E - 256KB flash
SAM3X8C - 512KB flash
SAM3X8E - 512KB flash
SAM3X8H (Only on dev-kit - not in production...) - 512KB flash
SAM3A4C - 256KB flash
SAM3A8C - 256KB flash
The SAM3X/A processors still suffer from the "6 waitstates needed
to program device" errata.
The CIDR address for the SAM3X/A processors are different from the
other SAM3 processors. Unfortunately, the chip identification register
is not at a constant address across all of the SAM3 series'. As a
consequence, a simple heuristic is used to find where it's
at... If the contents at the first address is zero, then we know
that the second address is where the chip id register is.
We can deduce this because for those SAM's that have the chip id @ 0x400e0940,
the first address, 0x400e0740, is located in the memory map of the Power
Management Controller (PMC). Furthermore, the address is not used by the PMC.
So when read, the memory controller returns zero.
Another interesting change is the flash bank address for flash bank 1.
It is not fixed at 0x00100000 like the Sam3U. Bank 1 of the at91sam3a/x
series starts at 0x00080000 + half the total flash size. Thus for the 256KB
devices Bank 1 is located at 0x000A0000, and for the 512KB devices Bank 1 is
located at 0x000C0000.
The configuration files for the SAM3X/A processors will follow
Change-Id: I6c3a707c00e05d993a2ad1d5a423f23b37ffd553
Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>
Reviewed-on: http://openocd.zylin.com/505
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
arm7_9_prepare_reset_halt is long since gone and the functionality
is implemented in the target's assert_reset handler.
Change-Id: Ib03c730cb39d68e5e3bb42f92af13daf8074e4e2
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/515
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
even the AT91EB40a's flash is covered by CFI and nobody ever submitted
any other drivers based on eCos code. It's just possible that this
idea was missing documentation and "marketing", but it's in git if
somebody wants to resurrect it.
Change-Id: I66449aa6e0997301f9d67f28098789bfc891d6e9
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/502
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
target_call_event_callbacks needs to be called after debug entry otherwise
we will get a console pc mismatch.
Change-Id: I278137736d5e85ca9662c306f6ac81336d8eb6cf
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/499
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
The SUPC (Supply Controller) registers are on different base addresses on different
SAM3 chips:
SAM3U: 0x400e1210
SAM3N: 0x400e1410
SAM3S: 0x400e1410
This creates a problem with the sam3_reg_list array which is const, but would need
to be changed at runtime to account for this variability. As this register is not
used anywhere, it's simplest to just remove it.
Change-Id: I987eb371648d826aa6d5e9de18d38c7bb66d6fca
Signed-off-by: Attila Kinali <attila@kinali.ch>
Reviewed-on: http://openocd.zylin.com/495
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Lock region count and sector sizes did not match datasheet.
(see 6500C-ATARM-8FE11 "SAM3S Series Datasheet", Table 7-1)
Change-Id: Ic511802f96ed03856467a24a6736349205a0576a
Signed-off-by: Attila Kinali <attila@kinali.ch>
Reviewed-on: http://openocd.zylin.com/493
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
implement stlink_usb_send and use it to fix stlink_usb_write_mem
using two calls to stlink_usb_recv is inappropriate since each
call issues a SG command on stlink-v1, resulting in errors
Change-Id: I24ef9f2dda284e041dc4a532b59968a77eebe702
Signed-off-by: Szymon Modzelewski <szmodzelewski@gmail.com>
Reviewed-on: http://openocd.zylin.com/498
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
I committed in the wrong order
This reverts commit 79230a8e3c5b85601fca730dfc09ecc52e693afa
Change-Id: Iace872ac4844891f4f38fca87448a2ebd9f17593
Reviewed-on: http://openocd.zylin.com/497
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
This patch moves the bulk of the stlink read/write code into the
stlink_usb_xfer set of functions and implements stlink_usb_recv
in terms of the generic stlink_usb_xfer
stlink_usb_xfer will be needed to implement stlink_usb_send
without code duplication
stlink_usb_xfer:
-sends the stlink command
-performs a read or write (as requested)
-checks the status (v1 only)
Change-Id: I0137d52620bd4883d46c9977a9e73f67622000a1
Signed-off-by: Szymon Modzelewski <szmodzelewski@gmail.com>
Reviewed-on: http://openocd.zylin.com/477
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The assert introduced in 00c8648351 checks
whether the programming offset equals to page_size of the flash, while it
wants to check whether the offset is a multiple of the page_size.
Change-Id: I794d021951a28c1cc520b5eea5d500f097721b06
Signed-off-by: Attila Kinali <attila@kinali.ch>
Reviewed-on: http://openocd.zylin.com/482
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Currently stm32lx flash driver will remove the readout protection if set
during a probe.
This may not be what the user wants, so let them decide.
Change-Id: I8575e3b339b10a4f7bac57cca9586dcab513d347
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/465
Tested-by: jenkins
implement stlink_usb_send and use it to fix stlink_usb_write_mem
using two calls to stlink_usb_recv is inappropriate since each
call issues a SG command on stlink-v1, resulting in errors
Change-Id: I52ff9ee8f5d9ae0d47356477468eb98952205c99
Signed-off-by: Szymon Modzelewski <szmodzelewski@gmail.com>
Reviewed-on: http://openocd.zylin.com/478
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Split out functions specific to the AM335x SOC into the target directory and simplified the board config
file. This should allow one to quickly create new configs for boards based on the TI processor family.
Change-Id: I0c3db97950dfa832f1f1918fc10c180f068bba74
Signed-off-by: Neil Jensen <neil30al@gmail.com>
Reviewed-on: http://openocd.zylin.com/489
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Simplified the configuration and removed things that were not necessary for debugging. Also added reset
configuration.
Signed-off-by: Neil Jensen <neil30al@gmail.com>
Change-Id: I96f991c3051aa68278212cd6509484cbce40ccb7
Reviewed-on: http://openocd.zylin.com/488
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
when -ignore-version is used we should mask of the upper 4bits not 8bits.
Change-Id: I9ffe24c2aeeb414677357a647609fdf018890194
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/473
Tested-by: jenkins
This enable the stm32f2x flash driver to use the asynchronous
algorithm support.
Speed increase is as follows:
before - wrote 1048576 bytes from file stm32f4x.bin in 30.453804s (33.625 KiB/s)
after - wrote 1048576 bytes from file stm32f4x.bin in 23.679497s (43.244 KiB/s)
This also fixes a bug that was in the old flash loader.
The old loader waited while bit16 of the status reg was 0, the new
loader waits until this bit is 0 as stated in the flash spec.
Bizarrely this bug did not effect programming on any tested parts.
Change-Id: I3efc94d42cbe81283673a8f4203700638080af6e
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/460
Tested-by: jenkins
This enable the Stellaris flash driver to use the asynchronous
algorithm support.
Speed increase is as follows:
before - wrote 65536 bytes from file test.bin in 5.486040s (11.666 KiB/s)
after - wrote 65536 bytes from file test.bin in 2.274001s (28.144 KiB/s)
Change-Id: I9004c9aadffa1ae3b0cbf908e6549b5b1f794508
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/403
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Currently the stm32f1x flash driver uses an asynchronous algorithm
as part of the block flash programming. This greatly speeds up flash
programming as the target is always running.
Moving the async code to the target enable other targets to use this
added functionality.
Change-Id: I8e53f094c2ef7848a7f86ddb9a35b6edbfc8454a
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/402
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Moved ti_beaglebone.cfg to the board configuration directory. This was
originally placed in the wrong location.
Signed-off-by: Neil Jensen <neil30al@gmail.com>
Change-Id: I05d10b62b1a21618635ee1773c30d77dc756ec82
Reviewed-on: http://openocd.zylin.com/481
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
Added support for the Beaglebone board based on the am335x processor
family. After much trial and error, I was able to configure the
Icepick-D and connect to the processor, halt execution, and run a sample
program. This is a unified config file (it doesn't use any include
statements) and further work needs to be done to split out the icepick-d
configuration to be more generic.
Change-Id: Ia1b8e9f01f56bd4f8c575ba3d0160c248583a15e
Signed-off-by: Neil Jensen <neil30al@gmail.com>
Reviewed-on: http://openocd.zylin.com/471
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This is a much cleaner solution to the problem of allocating as much
working area as possible than what is currently being done in most/all flash
drivers (which is: try an arbitrary sized chunk, if it fails, pick a smaller
number, rinse and repeat).
Use this function to find out how much working area is available, limit or
restrict that amount at will and then simply allocate it.
Change-Id: Ib7d5d0b7485aed3e0a4fad60c1bedb7dfd16146f
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/446
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The existing allocator couldn't reuse a freed allocation if the sizes
didn't match exactly. That led to problems when for example a flash write
routine had allocated all of the working area to speed up operation. A
subsequent verify pass couldn't allocate space for the checksum algorithm
even though all previous allocations had been freed.
This allocator is marginally more complex, but solves the above problem by
splitting larger free areas to fulfill smaller requests and by merging
released areas into adjacent free areas.
An initial free area, covering the entire specified address range, is set
up on first allocation, and all allocations are split off from (and
ultimately merged into) that one. It can also easily be adapted to support
several disjoint working areas for the same target, by setting up several
initial free areas and slightly modifying the merge code.
Change-Id: I6faaf9801312bb19a4fa4474694a0cd1c6e0ab54
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/445
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The stm32 family supports using SYSRESETREQ as a software reset, lets
use it.
Change-Id: I171ffa8d888a2d0c28b266051030311521e9bca9
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/472
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
This brings the stlink driver inline with the rest of OpenOCD.
If the user configures the tap as -expected-id 0 then the IDCODE will be
treated as a wildcard and ignored.
Change-Id: I99160c69b2b40f5b1f608bb59ab6630894502fd8
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/476
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
A period or comma must follow the closing brace of an @xref.
Change-Id: Ida5dc3600eca328d95b0a8f6b5c9fe0a0f3ba820
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/475
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
This sets the default stellaris working area to 2k rather than
the current 8k. 2K is the smallest RAM size in the stellaris family.
Change-Id: I1407f758eb0926cc094b824a6d25199b313c45de
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/458
Tested-by: jenkins
automake 1.11.2 throws `pkglibdir' is not a legitimate directory for `DATA'
if nobase_dist_pkglib_DATA is used.
We work around this issue by defining our own location.
Change-Id: I3c29e2df0b67e745283c50d358e31699bd60dc74
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/457
Tested-by: jenkins
I used the CPUID instead of adding a new argument to the flash bank command
Fixed Type in comments
Add the failsafe return value in device_id
Change-Id: Ieb5a46fc002b5390a0c81bc8b49f6c687036ae1d
Signed-off-by: Jonathan Dumaresq <jdumaresq@cimeq.qc.ca>
Reviewed-on: http://openocd.zylin.com/438
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The ref manuals for the stm32f2x (RM0033 Rev4) and stm32f4x (RM0090 rev1)
are unclear to the address of the flash size register (F_ID).
According to contacts @ ST this is the correct address, the manuals will be
updated in due coarse.
Change-Id: If9fb83b3100458d17038cf27c2b23355e1dc5a9e
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/448
Reviewed-by: Peter Stuge <peter@stuge.se>
Tested-by: jenkins
Added the file imx28.cfg to the target directory
Added the file imx28evk.cfg to the board directory
Change-Id: I02a74a03f3773892f830d13660ffdded34f3261d
Signed-off-by: James Robinson <jmr13031@gmail.com>
Reviewed-on: http://openocd.zylin.com/428
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This patch adds init_board concept information to OpenOCD manual.
Additionally a link from init_targets chapter to new chapter about
init_board is added.
Change-Id: I09b9aaa1cf68b94f35701224f641cae9811a5bcf
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/440
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
STM32L ref manual (RM00038 Rev5) states the SW-DP id should be 0x4ba00477.
The correct value from silicon is 0x2ba01477 - the typo has been confirmed by ST.
Change-Id: Ie35a1f13dc5dedc1b148fb219c6974bfa48b537c
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/441
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
This enables the user to override the transport used for st-link.
If JTAG is selected it will also change the default id used to the JTAG id
rather than the SW-DP id.
Change-Id: I4fe352e4932e2f4ec278168e99ba2d2d50fd850a
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/443
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
This adds init_board procedure that behaves exactly the same as
init_targets - it can be overriden by "next level" scripts. This
procedure is executed after init_targets, allowing common stuff (jtag
chain, memory, flash, ...) to be configured in target script (via
init_target) and leaving rest (like additional memory, reset
configuration, reset-init handlers, ...) to be done in init_board.
This makes init_targets scheme more complete and easier to use - current
board scripts will not need new init_targets, because everything can be
"packed" in init_boards. Moreover it solves the problem of variables
being set in init_targets (executed after init), which were not
accessible by "linear" scripts (parsed before init). All that has to be
done is to enclose all code in board config file in init_board
procedure.
Change-Id: I0736b1ff9873a687966407d62b58ccf29a8e597b
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/427
Reviewed-by: Chris Morgan <chmorgan@gmail.com>
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
This issue was caused by uncrustify not correctly converting the doxygen
comments.
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Change-Id: Ie6dc3b057a08603b670cb27312e5f0d989426e6c
Reviewed-on: http://openocd.zylin.com/431
Tested-by: jenkins
These checks are specific to linux kernel.
Change-Id: Ia9b837b5609922a897822f1d55f96f04c0f1f838
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/424
Tested-by: jenkins
We may enable this again - but at the moment is causing extra issues
with reformatting the codebase.
Change-Id: I5a2aaaa32ad784e011dff3079ff45501452c1819
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/414
We may enable this again - but at the moment is causing extra issues
with reformatting the codebase.
Change-Id: Ic64310a20605a0ef3206caa15c8e6c8ee655bfda
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/413
Tested-by: jenkins
This config has been updated for 0.59
Change-Id: If0dc87dd5de052c1228743a196a3198dbd4bc279
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/406
Tested-by: jenkins
This patch add a validation for the supported jtag api version.
Change-Id: I0b51350e58e351d6662f4039c0a9e9d0d79ba4ec
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/405
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Correct the offset to the read pointer when clearing it on error.
Also restrict the instruction set to armv6-m so the flash driver can be
used on Cortex-M0 parts with the same flash controller.
Change-Id: I380f9dabcc41fb6e4d43a7e02f355e2381913f39
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/399
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Jonathan Dumaresq <jdumaresq@cimeq.qc.ca>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Replace the big stack-allocated buffer with a much bigger heap-allocated.
There was no explanation for the apparently arbitrary chunk size, and
performance was improved by increasing it, leveling out at about 4k.
Change-Id: I3b06d4469092ec8d89d0ce05bff0b7cf213c5062
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/404
Tested-by: jenkins
Reviewed-by: Marti Bolivar <mbolivar@leaflabs.com>
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
This patch test the device version and differentiate between
v1 and v2 devices.
Change-Id: Ie79bf2c5534211493b004329fb6d5b9d4ea5453b
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/396
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This patch add jtag support to the stlink driver add
two new transport types, JTAG and SWIM.
Change-Id: I7089d74250330be5c6a01c24066307641df7d11e
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/393
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This only effects the older Stellaris LM3S811 kits (rev B and below).
Change-Id: Ie068cce7748fede9e7113ea63a69c96222c809fa
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/401
Tested-by: jenkins
for some reason the following commit was incorrect
769064de4b
Only the Sandstorm and Fury class should write this register.
Change-Id: Ie18f1da6e9b59fb99cca47aa93c7f2fee447ccea
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/400
Tested-by: jenkins
For example, when blocks 2 and 3 were erased, openocd reported "erased blocks 2 to 4". That should be "2 to 3", I think.
Change-Id: Icece63dedd3dd931b70fa73616819a19572e39de
Signed-off-by: Timo Ketola <timo@exertus.fi>
Reviewed-on: http://openocd.zylin.com/385
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
SPAS register (OOB size) is left wrong after reset with respect to 2KiB page NAND chip. That will lead to ECC errors after 'reset halt'.
Change-Id: If5a4685cb8d6be35879453951611ef1059da219c
Signed-off-by: Timo Ketola <timo@exertus.fi>
Reviewed-on: http://openocd.zylin.com/384
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This patch is based on Erik Ahlén's work on i.MX35 NFC support. Basically it redefines the CCM.RCSR register which is in a different address in i.MX25.
Change-Id: Ia6faf9cb5efae5e564b72ef9a9b7c7f8bfde3ce0
Signed-off-by: Timo Ketola <timo@exertus.fi>
Reviewed-on: http://openocd.zylin.com/383
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
stellaris_set_flash_timing should only be used for Sandstorm and Fury
device classes.
Change-Id: Ib5eff9d954c039f2c5726a8ecc3ee45d1694cfd3
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/389
Tested-by: jenkins
read the target class during probe and save for later use.
Change-Id: Ib3ad20edc7d206b7f434bdcc6b947e6a5f06dd1f
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/388
Tested-by: jenkins
This makes the stlink target use the std armv7m_arch_state giving
consistent OpenOCD output.
Added debug entry handler so we get debug entry reason.
Change-Id: Ia3c1380fd5033a8e541b0d45a7c3559f1b05957d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/379
Tested-by: jenkins
Nothing more than a name change, just to make reading
the code a bit simpler.
Change-Id: I73a16b7302b48ce07d9688162955aae71d11eb45
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/390
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
This makes use of the newly introduced usage field in the flash bank
structure.
Also remove the assertion if usage field is null and
lets print a DEBUG_LOG message instead.
Change-Id: I384bf0e2c444fcc99deef73aec9ef01149a91c76
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/391
Tested-by: jenkins
This move will enable use to share with regmaps with the stlink target.
Change-Id: If8f41c7c53323d5074cb22ec3440530c1e402004
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/377
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
This patch remove the hardcoded default layout and return an error
if no layout was specified in the configuration file.
Change-Id: I0e7833faa2dc194e727122840bcbdacd321cc4fd
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/369
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This patch add layout api funtions and implementation
to read/write 8bit memory.
Change-Id: I8d145eb07e5afa9ce1830578e57d80a80d21e7dc
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/366
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This allows us to detect a device arrata where the device id returned is
incorrect.
This issue only effects stm32f4x Rev A silicon.
Change-Id: Ic9f4985f9abf562f97322dcf484199f0a4eb01bb
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/354
Tested-by: jenkins
The stm32 drivers have been using 0x7ff as the DEV_ID mask, this should
have been 0xfff.
Change-Id: I232469620969d6dd1b9a2a2aa15ec18b947dbb05
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/352
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
There is no need to use a while loop here. This patch simple copy
the last bytes with the system function.
Change-Id: Ibda72dca449746efeba5a1af2e45c5990f9cf347
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/364
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This uses the same controller as the stm32f2x family.
Change-Id: I931a9ceb0cd1219514d14b8b59475179e543dd0f
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/338
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
These error messages will prompt patches to be submitted for missing
.usage or empty fields. All of the below must be resolved before next
release.
The Jim defined commands are excluded from this checklist because the
help text can be set later than during command registration.
strlen(.usage) == 0 means that the command expects no arguments.
Updates to this patch in Gerrit to fix problems below are most
welcome. Anyone can push updated versions of a patch to Gerrit. If
there are no further updates to this patch within a week, it will be
pushed to the master branch to prompt more fixes.
These were caught by launching OpenOCD.
Error: BUG: command 'command' does not have the '.usage' field filled out
Error: BUG: command 'script' does not have the '.usage' field filled out
Error: BUG: command 'power_restore' does not have the '.usage' field filled out
Error: BUG: command 'srst_deasserted' does not have the '.usage' field filled out
Error: BUG: command 'measure_clk' does not have the '.usage' field filled out
Error: BUG: command 'exit' does not have the '.usage' field filled out
Error: BUG: command 'shutdown' does not have the '.usage' field filled out
Error: BUG: command 'gdb_sync' does not have the '.usage' field filled out
Error: BUG: command 'interface_list' does not have the '.usage' field filled out
Error: BUG: command 'target' does not have the '.usage' field filled out
Error: BUG: command 'target init' does not have the '.usage' field filled out
Error: BUG: command 'flash' does not have the '.usage' field filled out
Error: BUG: command 'flash init' does not have the '.usage' field filled out
Error: BUG: command 'flash banks' does not have the '.usage' field filled out
Error: BUG: command 'nand' does not have the '.usage' field filled out
Error: BUG: command 'nand drivers' does not have the '.usage' field filled out
Error: BUG: command 'nand init' does not have the '.usage' field filled out
Error: BUG: command 'pld' does not have the '.usage' field filled out
Error: BUG: command 'pld init' does not have the '.usage' field filled out
Error: BUG: command 'mflash' does not have the '.usage' field filled out
Error: BUG: command 'mflash init' does not have the '.usage' field filled out
Error: BUG: command 'dummy' does not have the '.usage' field filled out
Error: BUG: command 'dummy foo' does not have the '.usage' field filled out
Error: BUG: command 'scan_chain' does not have the '.usage' field filled out
Error: BUG: command 'jtag' does not have the '.usage' field filled out
Error: BUG: command 'jtag init' does not have the '.usage' field filled out
Error: BUG: command 'arm' does not have the '.usage' field filled out
Error: BUG: command 'arm reg' does not have the '.usage' field filled out
Error: BUG: command 'etm' does not have the '.usage' field filled out
Error: BUG: command 'arm7_9' does not have the '.usage' field filled out
Error: BUG: command 'at91eb40a.cpu' does not have the '.usage' field filled out
Error: BUG: command 'at91eb40a.cpu arm' does not have the '.usage' field filled out
Error: BUG: command 'arm reg' does not have the '.usage' field filled out
Error: BUG: command 'at91eb40a.cpu etm' does not have the '.usage' field filled out
Error: BUG: command 'at91eb40a.cpu arm7_9' does not have the '.usage' field filled out
Error: BUG: command 'target_request' does not have the '.usage' field filled out
^C
oyvind@fierce:~/openocd$ openocd -c "interface dummy" -f board/at91eb40a.cfg 2>&1 | grep -w BUG
Error: BUG: command 'command' does not have the '.usage' field filled out
Error: BUG: command 'script' does not have the '.usage' field filled out
Error: BUG: command 'power_restore' does not have the '.usage' field filled out
Error: BUG: command 'srst_deasserted' does not have the '.usage' field filled out
Error: BUG: command 'measure_clk' does not have the '.usage' field filled out
Error: BUG: command 'exit' does not have the '.usage' field filled out
Error: BUG: command 'shutdown' does not have the '.usage' field filled out
Error: BUG: command 'gdb_sync' does not have the '.usage' field filled out
Error: BUG: command 'interface_list' does not have the '.usage' field filled out
Error: BUG: command 'target' does not have the '.usage' field filled out
Error: BUG: command 'target init' does not have the '.usage' field filled out
Error: BUG: command 'flash' does not have the '.usage' field filled out
Error: BUG: command 'flash init' does not have the '.usage' field filled out
Error: BUG: command 'flash banks' does not have the '.usage' field filled out
Error: BUG: command 'nand' does not have the '.usage' field filled out
Error: BUG: command 'nand drivers' does not have the '.usage' field filled out
Error: BUG: command 'nand init' does not have the '.usage' field filled out
Error: BUG: command 'pld' does not have the '.usage' field filled out
Error: BUG: command 'pld init' does not have the '.usage' field filled out
Error: BUG: command 'mflash' does not have the '.usage' field filled out
Error: BUG: command 'mflash init' does not have the '.usage' field filled out
Error: BUG: command 'dummy' does not have the '.usage' field filled out
Error: BUG: command 'dummy foo' does not have the '.usage' field filled out
Error: BUG: command 'scan_chain' does not have the '.usage' field filled out
Error: BUG: command 'jtag' does not have the '.usage' field filled out
Error: BUG: command 'jtag init' does not have the '.usage' field filled out
Error: BUG: command 'arm' does not have the '.usage' field filled out
Error: BUG: command 'arm reg' does not have the '.usage' field filled out
Error: BUG: command 'etm' does not have the '.usage' field filled out
Error: BUG: command 'arm7_9' does not have the '.usage' field filled out
Error: BUG: command 'at91eb40a.cpu' does not have the '.usage' field filled out
Error: BUG: command 'at91eb40a.cpu arm' does not have the '.usage' field filled out
Error: BUG: command 'arm reg' does not have the '.usage' field filled out
Error: BUG: command 'at91eb40a.cpu etm' does not have the '.usage' field filled out
Error: BUG: command 'at91eb40a.cpu arm7_9' does not have the '.usage' field filled out
Error: BUG: command 'target_request' does not have the '.usage' field filled out
Change-Id: I2c3e529530a15d2295a1950ffc59e8f2fc661012
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/299
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Change this 2 functions to make it accessible for other tcl interfaces.
Change-Id: Idee07fcc779941b037a05a40c021e3fb0b1a4a7a
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/277
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Change this functions to make it accessible for other
target implementations.
Change-Id: Ib41fc793cfb4de5439af026c2e8b52e7a9507c85
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/278
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This will give us the ability to add special data structures and new
interfaces without rewriting the complete jtag engine.
Change-Id: I21a6e1daa96c5f4d111bbb734c7c1fbc2eaee227
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/244
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This fixes a long standing bug: see Trac #4
Increased help text recursion limit and added LOG_DEBUG so we can
catch future errors like this.
Change-Id: I5fac95c4486eaddaf1e88a27ecb1835168f87711
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/291
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
This affects all configurations including target/at91sam3XXX.cfg
Change-Id: I2c1e1edf0986d30e63f109604a38bf402ded369e
Signed-off-by: Ulf Samuelsson <ulf@emagii.com>
Reviewed-on: http://openocd.zylin.com/292
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
this particular edge case of the JTAG API will no
longer be supported.
the in_value buffer must be provided by the caller when
the callback needs the buffer.
Change-Id: I552c72a64af6875f4aa4fa9b923194dcf3b57b64
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/265
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
simplifies the API and there is only one remaining user at this point.
Is the implementation busted where the check does not actually happen
now?
Change-Id: I776a43766f5576a08df320f6fe41a2750d101bde
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/264
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Add verification of the flash unlock sequence and return an error if the
flash is still locked.
Add mass erase subcommand.
Change-Id: Id586b1eaf983a3f25b933847dd6608c15bf0b07e
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/281
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
use AC_CHECK_HEADER rather than AC_CHECK_HEADERS so that we do not
generate a unrequired HAVE_LIBUSB_1_0_LIBUSB_H define.
Change-Id: I23a93d3813716dce797ca1514fdcb84533454c31
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/259
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Renamed all functions, enums, structs and defines from mx2/imx27 to mxc. This is in preparation of adding support for mx35 NFC(v2).
Change-Id: I92ad23f0cfab605215bbf0d5846c5c288423facf
Signed-off-by: Erik Ahlén <erik.ahlen@avalonenterprise.com>
Reviewed-on: http://openocd.zylin.com/267
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
we have changed the indent to 4 to match OpenOCD coding style.
Change-Id: I4870a3410eb20fc2f6df6a3e5891d4d4e598131a
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/285
Tested-by: jenkins
The C coding style guide says that tab width is 4 characters but checkpatch.pl expands tabs to 8 characters which produces false negatives.
Change-Id: Ibdabbb55269b7cf6bcd38042cccb8bd235e42ce2
Signed-off-by: Erik Ahlén <erik.ahlen@avalonenterprise.com>
Reviewed-on: http://openocd.zylin.com/275
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
disable asynchronous callbacks and reads as minidriver requires
reads and callbacks to be synchronous.
Could possibly be fixed by some design work.
Change-Id: I7ca79a551085b2e8ba6928e1762d1baed6e95d4b
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/260
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Tested-by: Øyvind Harboe <oyvindharboe@gmail.com>
jlink modified to use the new usb abstaction layer.
During the configuration process we can select if use
libusb0 or libusb-1.0 library for this driver.
Change-Id: I70bc9ee2f89b7597e0f64ea80cad7f1b9070f01b
Signed-off-by: Mauro Gamba <maurillo71@gmail.com>
Reviewed-on: http://openocd.zylin.com/236
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Handle default case of single DDR chip
Propagate global variable for multi DDR chip
Change-Id: I315380f91ee7fcc2976437aa5836d88a7964fc9d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/251
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Commit 1794e5ee54 renamed the file to
have all lowercase characters according to most references to the
file, but the commit didn't change the existing reference to the
old filename.
Change-Id: I380e52e947a8091d48cf010e3919bf2caed7fdff
Signed-off-by: Peter Stuge <peter@stuge.se>
Reviewed-on: http://openocd.zylin.com/248
Tested-by: jenkins
Before this patch, at91sam3u4c.cfg includes "at91sam3uxx.cfg" which
doesn't exist - the filename was at91sam3uXX.
However, many operating systems have case sensitive file names!
Change-Id: I8b2f987f1f4214269b80ef5cba8177ce05ad90b6
Signed-off-by: Harald Welte <laforge@gnumonks.org>
Reviewed-on: http://openocd.zylin.com/247
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Compile error is encountered when _DEBUG_GDB_IO_ is set,
due to duplicate variables.
Fixed by renaming the variable.
Change-Id: I729c06e317fdb899142c9ceaf543b7f580088807
Signed-off-by: James Zhao <jamzhao@gmail.com>
Reviewed-on: http://openocd.zylin.com/243
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Add a test if the pointer to the target_init function in the target struct
is set before the function pointer is used.
Change-Id: Ie4ea542f64f35efce8c5bce2ced9b881bf283ec1
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/241
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
when last==first==0 then mass erase is executed, it's faster.
the page marking was wrong in this case.
Change-Id: I5c579d59b5c4778cf057cb5986e086abdd4209b2
Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com>
Reviewed-on: http://openocd.zylin.com/232
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
the flash module clock was set according to a spreadsheet from freescale, now it's set according to the configuration file used by the Freescale Flash Programmer.
both work, but i think it's better to use the one used by a software that's made by Freescale (should be correct...)
Change-Id: I382197a3eb43dd47ff4b9b83d5e05008d5613fc6
Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com>
Reviewed-on: http://openocd.zylin.com/223
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
the unlocking procedure erases the flash mem (even if it wasn't locked), so it should be marked as erased after unlocking.
Change-Id: I5cc6a1e1d6cf4e1f243de532eff54111ffd66187
Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com>
Reviewed-on: http://openocd.zylin.com/222
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
if JTAG debug request fails then halting with a reset should be attempted.
the failure was ignored previously.
Change-Id: Ibec08e2e97f962d164a110c21aaa80bfc17b7f1a
Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com>
Reviewed-on: http://openocd.zylin.com/221
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
i had assumed two possible halt/debug states:
- halted + debug mode
- running + not debug mode
turns out this one also exists
- halted + NOT in debug mode
added code to handle this in an appropiate way.
Change-Id: Ia0ddcd55d1890c90d100a9e6f5e84ed8dda812a3
Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com>
Reviewed-on: http://openocd.zylin.com/220
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
now the flash algorithm running on the 568013 checks the buffer_empty bit (instead of the command_finished bit) before trying to write a new word to the flash mem.
this should speed up the flashing procedure. since it is open loop, this change may reduce the risk of failure. flashing will fail if JTAG speed is such that the flash module cannot keep up.
also, the USTAT register is only read once, as suggested in the flow chart provided by freescale (per. ref. manual @ 6-11)
the last step of the flow chart, exiting after commands are complete, is not implemented.
the algorithm will stay waiting for more data. it is up to the PC side to *not* send more data.
Change-Id: I47fe4b50de7da85f80868f5986a89a7e2152616c
Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com>
Reviewed-on: http://openocd.zylin.com/219
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
moved reset_jtag to the top, since it will be needed in future changes.
also send a define to the .h
Change-Id: I53ef9c02ffa70e7d0416364525a6fbfef855e222
Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com>
Reviewed-on: http://openocd.zylin.com/216
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
added logging of target error codes to enable automatic error handling from tcl.
the plan is to use a computer to execute a series of tcl commands, the changes allow simple parsing of return messages to detect errors.
Change-Id: Ia98d3bd036e1b6065b475ffff6c1d30baeaf7417
Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com>
Reviewed-on: http://openocd.zylin.com/215
Tested-by: jenkins
Tested-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
This fixes an issue when init is called before init_targets has been
executed.
Make sure init_targets is called before init.
Change-Id: Icd5bd4c2a8eea2e399d9de4e331a77560e9672ac
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/235
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
Fix error introduced in recent commit.
Correct the name of the board file.
Change-Id: I46bca8329812fb24bc4f8d316be9e7cba9b56496
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/234
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Initial support for SPEAr320 chip and for evaluation
board named EVAL_SPEAr320CPU.
Change-Id: I85524655769bcc610294a26db47a7a399256fbb7
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/231
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Initial support for SPEAr300 chip and for evaluation
board named EVALSPEAr300.
Currently supports only those parts in common with
SPEAr310.
Change-Id: I8075aa721cf3dfaac561ee51e5df4ce9a2992e3e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/230
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The code to autodetect DDR was wrong and not complete.
Replaced with a parameter passed to TCL proc.
Split DDR configuration in the two cases of single and
dual DDR chip, using single chip as default.
Change-Id: If39aa518670398e8e4f207d7db6e812a49743e15
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/229
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
DDR controller activation should not be in DDR chip
specific code, but in generic DDR controller part.
Change-Id: If1b178228352b48b0097d7b9b300005fb5bb4fb6
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/228
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The support for SPEAr3xx family members does not require
dedicated files for each member.
Join the initialization scripts in a single file.
Change-Id: I45e9dc64809a6f52c4592e3e0eef5529394887c6
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/227
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The initialization of RAS enable and clock is required by
all SPEAr3xx devices
Change-Id: Iea4cd0902e4da219475d7f35b4c25fc87ec6b902
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/226
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The configuration script check for libusb-1.0 availability first and only
if not found check for libusb-0. So if both libraries are installed on the
system the build script will use libusb-1.0
It's possible to force compiling with libusb-0 with the --enable-libusb0 switch.
If the driver support only libusb0 the script check anly for it.
Change-Id: I7eb045d4e2bd553abefad53f3f4023ff46b0f5f6
Signed-off-by: Mauro Gamba <maurillo71@gmail.com>
Reviewed-on: http://openocd.zylin.com/33
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This reverts commit 0ef5a90d93c5a026bcf70132e60e957ae339d1e1
Causes older versions of gcc to break - need to look into a better fix.
This passed through the jenkins build as we originally did not build this module - we do now.
Change-Id: Iafeac8442b2249269ff45a52ccd3e2870920f635
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/214
Tested-by: jenkins
The calculation for reg_packet_size in gdb_get_registers_packet() could
generate a wrong result in the case of multiple registers whose size is
not a multiple of 8.
The current calculation sums the sizes for all registers then rounds the result
up to the next multiple of 8.
Instead it should round each register size up individually and sum the results for all registers.
Change-Id: Idfb5e5eeee0e69a6889dbe9769c0bf17feacb63b
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/200
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
gdb_memory_map() correctly calculates the target specific number of flash banks, but then uses the total number (all targets) instead of the target specific number to construct its GDB response, causing a crash.
Change-Id: I3f8639b3e90303a59753ebe140ce4fff96fd5db0
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/199
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Don't call a variable num_pages if it holds the flash size. Also rearrange
flash size to num_pages calculation to avoid divide-by-zero if there will
be a device with < 1024 byte pages someday.
Change-Id: I2febea39694a2f9750de141f52ec88ae1599c086
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/211
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
in_mask and in_idx are just another encoding of the same state information
that is already kept in bitq_in_state.bit_pos so derive them from that
instead of maintaining them separately.
Change-Id: I4ac6bbe923698a8c1090a785b8babcbb90f82931
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/207
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
in_buff is only ever set to field->in_value and that pointer is still
available when the parsing is restarted so it could just as well be used
directly, removing the need for the static variable.
Change-Id: I3dd7a8315ed5c5bdc3bfb74044f89492bca9816c
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/206
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
field->in_value is already checked so it must be non-null here, which means
the else clause can never execute so the entire buffer allocation and
handling code is completely dead.
Change-Id: Id465012a7e607349401d554fc7a8e5db7e967998
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/205
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Check whether the destination is in the program flash or NVM regions,
in the former case, use the normal longword mechanism, not the fast NVM
write.
Change-Id: I7366b7c8919928ee690252df83b99701776aee82
Signed-off-by: Tomas Frydrych <tomas@sleepfive.com>
Reviewed-on: http://openocd.zylin.com/194
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This is a successor to the Flyswatter cable and is very close to the original.
The new revision is based on FT2232H.
Change-Id: Icc6efcf0e4f9d8a10b65df8679b4973f6b375a9f
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: David Anders <danders@tincantools.com>
Reviewed-on: http://openocd.zylin.com/193
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Before this commit, openocd used to segfault when probing flash
of an at91sam7x512 (which contains 2 banks of flash). This was due
to the way it systematically insert a new flash bank without setting
its name.
Then, when get_flash_bank_by_name_noprobe() is called, it is doing
a strcmp() on the non-initialized bank->name.
This commit prevents allocation of second probed bank if it is already
allocated (for example, if it is set in a target config file). If a
new bank really needs to be allocated, it ensures that a default name
is set.
Change-Id: I38d15bef1fda2ec746efad37171975136cf7b371
Signed-off-by: Aurelien Jacobs <aurel@gnuage.org>
Reviewed-on: http://openocd.zylin.com/171
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
there are no comments about what the rules w.r.t. null pointers
are and it is inconsistent.
It's simply a bug in the app if we ask about the properties of a null
pointer w.r.t. what kind of target it is. It's equally wrong to say
that it is an arm target as that it isn't an arm target.
Change-Id: I0925a6a5c8b38e594ffa7c3ca4390487b5e9b718
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/168
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The CPLD on the xds100v2 expects to see a rising edge on PWR_RST to
enable the outputs. This patch creates that transition correctly by
fixing the direction register for PWR_RST.
THe CPLD will also loop back the data if the LOOPBACK signal is
asserted. Set this signal to an output and keep it clear.
This was tested with a TI DM3730 Beagleboard xM.
Change-Id: I4ea216bef6ae5c40e935741af5c69dc844d5d494
Signed-off-by: Kyle Manna <kyle.manna@fuel7.com>
Reviewed-on: http://openocd.zylin.com/189
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
* Add flash waitstate support for Atmel SAM3 chips.
* Set default waitstates to 6, to workaround a silicon bug in the SAM3 family
This code has been tested on SAM3U4, SAM3N4 and SAM3N1
based on Change-Id: I477446f9bfb3e910ea3e2414a6e9a75beb14a214
by Jim Norris <u17263@att.net>
Change-Id: I8d360080f6968979ca5e197ad638282cadd18fb7
Signed-off-by: Attila Kinali <attila@kinali.ch>
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/128
Tested-by: jenkins
This corrects permissions on the FTDI chip on the xds100v2 debugger
enabling normal users to access it.
Change-Id: I0f6618692ebdee6284eee28f9e612e68782c4d78
Signed-off-by: Kyle Manna <kyle.manna@fuel7.com>
Reviewed-on: http://openocd.zylin.com/188
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
add support for checking target against the device CLASS rather
then just the PARTNO.
This change also adds the new LM4F family (Blizzard).
Change-Id: Ia9d1e33f1f1c2817c0039a2232ecf932fae072f9
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/161
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
The main difference with at91sam7x256 is the declaration of the second
bank of flash.
Change-Id: I87a20dcbb639b797799139ccf46cc73934fa3b9e
Signed-off-by: Aurelien Jacobs <aurel@gnuage.org>
Reviewed-on: http://openocd.zylin.com/173
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
stick to convention of "retval" being used as error value to
be propagated and use "flash_flags" local variable for flash
flags read from how.
Change-Id: I63f1f2248b4f4538d6cd7634ae277f7c0aadc346
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/178
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Drop useless double-space occurences, drop trailing whitespace, and fix
some other minor whitespace-related issues.
Change-Id: I6b4c515492e2ee94dc25ef1fe4f51015a4bba8b5
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/137
Tested-by: jenkins
verify promise of code that more code can be pasted with an
assert at the end condition of the code passage that builds
string.
Change-Id: I76a4e5f91b9142fff932e1493cb43c29eb6a0f80
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/143
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
execute from openocd root dir after commiting change but before
pushing to gerrit.
tools/checkpatch.sh
This is the same script used by the jenkins build server to validate
a change.
Change-Id: Ib40d44b160e1c50a5e47ab55fc48a554381ea763
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/167
Tested-by: jenkins
Also, drop author name from interface/hilscher_* files, that info is in the
git log, and none of the other files contain author names either.
Change-Id: Idf0eb4279c4bff31d15c166619c0bf8b1c5bb877
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Reviewed-on: http://openocd.zylin.com/138
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This patch adds support for a KaRo TX27 CPU module on a StarterkitV base board.
The register settings have been extracted from a RedBoot distribution
that is distributed along with the hardware by KaRo.
This setup has been tested with a JTAGKey. The testing has been focussed
on loading a program into memory and start execution.
Although the flash seems to be correctly detected, no effort has been put
in testing the NAND programming yet.
Change-Id: Ib17763f1e3ecacd0eb9b5fdc32f8cba7a5e59be5
Signed-off-by: Mark Vels <mark.vels@team-embedded.nl>
Reviewed-on: http://openocd.zylin.com/158
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
fixes clang warning. Basically the next address pointer is not
used for anything in the fn, except to be examined in debug.
Change-Id: I253519b8e49e54490bbe7da8ec3d2dd31f49052a
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/155
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
found by clang, would have done something undefined and mysterious
later on.
Change-Id: If7d7aca8514575d229ed0b17378bf8b1bbf347c4
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/133
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
return error when target can not be found instead of ERROR_OK,
split fn.
Change-Id: Iba5232d3862a490d0995c3bfece23685bd6856e3
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/131
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
There are many "force an error till we get a good number" comments in
target/board files. This refers to the use-case where a config script
sets _CPUTAPID to 0xffffffff (which presumely gets overridden later):
if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
# Force an error until we get a good number.
set _CPUTAPID 0xffffffff
}
However, the same comment was also copy-pasted in many files which do
_not_ set _CPUTAPID to 0xffffffff, where the comment doesn't make any
sense at all. Drop those comments. Also, add one missing comment, and
fix small whitespace and grammar issues.
Change-Id: Ic4ba3b5ccba87ed40cea0d6a7d66609fbdfa3c71
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Reviewed-on: http://openocd.zylin.com/136
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
The STM3220G-EVAL board has an STM32F207IGH6. ("...H6", not "...T6").
Change-Id: Iaf3dae6830c5c0685a1dcd1588d391434bc51be7
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
Reviewed-on: http://openocd.zylin.com/120
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
"Value stored to 'retval' is never read": Check and propagate error
"Dereference of null pointer": Probably bogus, maybe triggered by the null
check on armv7a, so remove the check since it can't be null anyway.
Change-Id: I3bc44e52af1589ff40e6a42deda0ce7f3a25e397
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/119
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Also fix a spelling error and remove the declaration for a non-existent
function from the header.
Change-Id: I13177e2d81aa167c05c1cc766f06924211e6d735
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/118
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Propagate errors unchanged.
Free allocated working area in the error return path.
Remove duplicated cleanup code by rewriting the logic.
As a side-effect, fixes a scan-build warning.
Change-Id: I80e3c0015be672778f916e998c8c2e4f23d7588c
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/117
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
This fixes commit Evaluate 'script' in the global scope. It caused
Windows builds behave differently than before because path was evaluated twice
and backslashes from Windows' paths got unescaped and effectively wiped out.
Configs could only be passed with "-f ../dir/config.cfg" or "-f
..\\dir\\config.cfg" instead of usual "-f dir/config.cfg" (or using backslash)
as previously.
Change-Id: I13b4abac6dbe6d770cc11a4e61c9421ef340da83
Author: Steve Bennett <steveb@workware.net.au>
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/40
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
GCC doesn't understand that these are in fact initialized if they are
used.
Change-Id: I01988adb0547f785b48d869ddbe44cc17dca4739
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/116
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
The fix is inline with the Linux coding style that forbids
assignment in if condition
Change-Id: I0b9d0b419d9c8b7a8c755e048d5faf72d1658ba2
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/87
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
The BusBlaster from Dangerous Prototypes is based on the FTDI FT2232H IC.
It has a CPLD between the FT2232H and the JTAG header allowing it to
emulate various debugger types. It comes configured as a JTAGkey compatible
device.
Change-Id: Iab56907bf67ded87001e628d93012f1e16287d90
Signed-off-by: Richard Barlow <richard@richardbarlow.co.uk>
Reviewed-on: http://openocd.zylin.com/53
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
The fix is inline with the Linux coding style that forbids
assignment in if condition
Change-Id: I10338a249bcfeff87d8596f7e17f209e26b41678
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/86
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
The fix is inline with the Linux coding style that forbids
assignment in if condition
Change-Id: I42a371d6adfdf3b3fb867705211c47d89776ee2a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/85
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Total of 5 warnings:
3x "Dead store": removed dead assignment to variable;
1x "Dereference of null pointer": this is not an error, but a
limited visibility of clang, since pointer erase_region_info
is initialized inside cfi_fixup_non_cfi();
1x "Branch condition evaluates to a garbage value":
this is a real coding bug that could issue SIGSEGV, since
"goto cleanup" can be executed before initialization
of "source".
Change-Id: Id3c323c82bb15cbd3bb8fc04b23541f11145f109
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/84
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Fix a few errors with set and unused variables detected by GCC 4.7.0
Change-Id: I59b748e18e514ee9f0cde7883b4ed5116198bd4a
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/36
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The Toshiba TMPA900 series (TMPA900/901) only has internal RAM regions
RAM-0 (16kB) and RAM-1 (8kB) which we can use as working area.
This is probably a copy-paste error from tmpa910.cfg, which has the
correct values and sizes for the TMPA910 series (TMPA910/911/912/913):
there are RAM-0, RAM-1, and RAM-2 (each 16kB).
Also, change "built-in RAM" to "internal RAM" to match what the
datasheet uses.
Change-Id: I993cd6b7fadc28cf34e5cc18426bb2bb42597670
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Reviewed-on: http://openocd.zylin.com/34
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
The code in xscale_receive() that tries to skip invalid reads (i.e.
reads that don't have the DBG_SR[0] 'valid' bit set) seems to be
wrong, as it only looks at the first word's valid flag rather than
each word's own valid flag. Am I reading the code correctly? If so,
the attached patch should fix it.
If this looks correct, I'll generate a proper patch and commit message.
Matt
Change-Id: I74ebe2ad7a36d340a9dd3b8487578b6ea7f3cf1e
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/32
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Using the ICEPick reset seems to allow the processor to be halted sooner
and the halt on gdb connection makes the connect process more robust.
Change-Id: I0586f6e6becc60a729030509ef58907a19d545ec
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/23
Tested-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
by immediately polling again when we have received a message from
the target instead of waiting 100ms, we can hope for much better
performance. More than 100x? :-)
Change-Id: Ieaf0c6c8b6e5addc482895670ffbf9a743e07a29
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/27
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Tested-by: Øyvind Harboe <oyvindharboe@gmail.com>
1) Add a couple more steps when setting up the Gerrit account.
Change-Id: I5d81feac4650d4d28653d14cfc0baf14270424c1
Signed-off-by: Jim Norris <u17263@att.net>
Reviewed-on: http://openocd.zylin.com/28
Reviewed-by: Peter Stuge <peter@stuge.se>
Tested-by: Peter Stuge <peter@stuge.se>
The DLP Design DLP-USB1232H UART/SPI/JTAG module is based on an FTDI FT2232H
chip. Among other things, it can used as JTAG programmer if connected to
the JTAG target properly. I have successfully wired the module to an
Olimex STM32-H103 eval board and flashed a firmware onto that using OpenOCD.
The setup details and schematics are documented at:
http://randomprojects.org/wiki/DLP-USB1232H_and_OpenOCD_based_JTAG_adapter
Change-Id: I5eb9255a61eeece233009bee77d7dc3b5d1afb8b
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Reviewed-on: http://openocd.zylin.com/20
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
This is a Toshiba TMPA900CMXBG (ARM9) based SO-DIMM CPU module with 64MB
DDR SDRAM, 256MB NAND flash, and on-board Ethernet.
The board file provides a tonga2_init function which sets up the
PLL/clocks and memory (SDRAM and SRAM), which allows writing a boot-loader
into RAM via JTAG.
Change-Id: I60522b97997bdf50e1f25aebab910d93a98522fb
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Reviewed-on: http://openocd.zylin.com/19
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
Let the target algorithm be running in the background and buffer data
continuously through a FIFO. This reduces or removes the effect of latency
because only a very small number of queue executions needs to be done per
buffer fill. Previously, the many repeated target state changes, register
accesses (really inefficient) and algorithm uploads caused the flash
programming to be latency bound in many cases. Now it should scale better
with increased throughput.
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Access the different flash banks' registers using a bank specific register
base and a register specific offset. This is equivalent but feels more
natural.
Some accesses were discovered that maybe should not be hard coded to bank0
registers. Add a note about that.
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Split armv7m_run_algorithm into two pieces and use them to reimplement it.
The arch_info parameter is used to keep context between the two calls, so
both calls must refer to the same armv7m_algorithm struct. Ugly but works
for a proof-of-concept.
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
On supported targets, this may be used to start a long running algorithm in
the background so the target may be interacted with during execution and
later wait for its completion.
The most obvious use case is a double buffered flash algorithm that can
upload the next block of data while the algorithm is flashing the current.
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Gumstix Verdex is a PXA270-based series of computer-on-modules. This
configuration file is based off the voipac.cfg configuration with
a different flash memory configuration. This has been tested flyswatter
adapter to reflash a Gumstix Verdex XL6P board.
The missing value for ES1.2 silicon revision is mentioned in
sprugn4m.pdf, and the recent TI Beagleboard XM is powered by it,
so let support the revision.
Target events are added to get better gdb support. The run
algorithm functionality are implemented to support feature
fast flash write functionality. The new r/w buffer api is now
used to support the special memory address handling. The output
of the md command was fixed.
Most serial adaptors are identified by udev with SUBSYSTEM=tty and
without DEVTYPE. This patch fix udev rules to work with any listed
tty-based adaptor. It has been tested with a FTDI-based Bus Pirate.
Signed-off-by: Luca Bruno <lucab@debian.org>
This is a proof of concept to get access to the debug port of a
secured kinetis cpu. On full flash erase the cpu is automatically
secured and the debug port is not accessible.
To get this to work the srst line is needed and the necessary
configuration should be added to the configuration file.
The driver sends ascii encoded bitbang commands over unix sockets or TCP to
another process. This driver is useful for debugging software running on
processors which are being simulated.
added an attempt to use the non-reseting halting sequence. if it fails, then the full sequence will be attempted. this makes things a bit faster most of the time.
changed the location of a function, avoiding a forward def
added an alternative way to enter debug mode, which does not require restarting the chip.
this will not always work, but in general it will (failure 0.3%), and failure is not a dramatic issue, simply have to use the full sequence.
the user can only access "halt", which uses the full sequence, so the user should not have any problems.
restarting the chip requires reconfiguring the flash module. the doc is very poor, so i'd rather have the two methods, and live with the 0.3%.
sometimes the master tap will be enabled, since tap switching is required during halt/lock/unlocking procedures.
now irscan handles this, avoiding unnecessary warnings and preventing errors.
got new info regarding setting the chip to debug mode, and locking/unlocking flash memory.
the newer implementation is a bit slower, but always works.
the previous implementation would randomly (as once every 25k-70k times) get the chip into a state where the freescale tool would be necessary. this is fixed now.
added functions to play around with the jtag state machine. they are not the happiest, but are necessary to be able to execute the halting/locking/unlocking sequences.
Conflicts:
src/target/dsp5680xx.c
the user can execute halt, but no enter_debug_mode. modified the error handling to suite this.
the new implementation of unlocking will use enter_debug_mode, and should not get the same errors as the user would, because not being able to enter debug mode is actually success when checking for locked flash.
crc check was always performed on newly flashed data, now it is optional
flash mem can be locked by writing a specific word to a specific address in flash.
to verify flash, target must be halted, and this will (when the new halt sequence is implemented) require reseting the chip. if the target is reset after writing the lock words, then it will lock, hence the CRC will fail because it is not possible to read stuff from the target.
also added a function that resets the jtag state machine.
this is not used yet, but will be soon.
it is implemented to allow strict control over JTAG state machine, necessary to implement to halt and unlocking sequences.
Currently the board/redbee-*.cfg files incorrectly include the
interface definition. Move the interfaces to interface/,
and create a single board/redbee.cfg that is common to both boards.
Intended usage is now:
openocd -f interface/redbee-econotag.cfg -f board/redbee.cfg
buspirate has never supported building on native windows (mingw).
configure will now check this is not the case.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
AC_CHECK_FILE will die when cross-compiling. So don't use it to test the existence of guess-rev.sh.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Due to build warnings introduced in newer versions of ftd2xx we
use strings to report errors rather than result codes. This also
gives us the same behaviour as libftdi.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Scripts sourced via 'script' should evaluate in the global
scope to make it easy to set and reference global variables.
Signed-off-by: Steve Bennett <steveb@workware.net.au>
i had started my code from dsp5683xx, i renamed a bunch of stuff to names i consider to be better.
i believe no one is using this code, so nobody should be affected. (it's not too late to do this change)
After correcting the reply size counter, it should be safe to rely on it
for the number of bytes expected in the USB read, instead of reading the
endpoint maximum. This doesn't make things go any faster but it's nicer and
removes the local buffer.
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Add a helper function for running the queue if it would overflow otherwise.
Use it to simplify the queue fill level checks and optimize in a few cases
that would previously run the queue prematurely.
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
After the reply_index handling is fixed, there's no need to special case
the out scan.
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
dtc_queue.reply_index was wrongly being increased during out scans, causing
the queue to be sent before the out buffer was full. This patch increases
raw upload speed by 50% or so.
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Indentation was inconsistent and some lines not indented at all. Quickfix
using Eclipse's auto-indentation.
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Function mips_m4k_write_memory() does endianess byte swap,
but this procedure break one byte access (temporary array
overwrites content in buffer).
As a fix, this endianess swap and buffer affecting
is preformed only on hword and word accesses (not on byte access).
Pprogram that loads another program into memory is actually writing the
D- side cache.
The instructions it has loaded can't be executed until they reach the
I-cache.
After the instructions have been written, the loader should arrange to
write back any containing D-cache line and invalidate any locations
already in the I-cache.
For the MIPS Architecture Release2 cores, we can use synci command
that does this job.
For Release1 we must use "cache" instruction.
This patch adds MIPS32 CP0 coprocessor R/W routines,
as well as adequate commands to use these routines via
telnet interface.
Now is becomes possible to affect CP0 internal registers
and configure CPU directly from OpenOCD.
For all architectures we use distinct common magic number,
and this should be a uint32_t type.
Otherwise, comparison with macros will yield compilation
warning.
if tap enable/disable failed then a warning was written to the log, but JIM_OK was returned. if using openocd via a TCP interface to the TCL port, there is no way to catch that the command failed (it didn't enable the tap, so it failed)
now it return an error if it fails.
There are some older atmel nor chips which have negated logic for
TopBottom detection. This patch adds a special handling for the old
chips. This is the same mechanism as implemented in linux kernel.
Signed-off-by: Andreas Bießmann <andreas.devel@gmail.com>
before doing anything with the flash module (FM) the clock divider must be set.
if erase_check was the first thing done with the FM after reset then an error would be generated because the clk divider was not set.
now erase_check sets the clk divider.
reorganized code to get rid of compiler warnings
the warning were related to allignment, i do not get these warning on my build system (i've tried setting the compiler flag but it doesn't work, still working on why) so i cannot detect them (yet.)
make dist should use git2cl to generate ChangeLog from git history,
populating the placeholder file in released tarball.
Signed-off-by: Luca Bruno <lucab@debian.org>
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Some devices, eg. The Tempest class return the wrong device class
when queried. Add the ability to manually override the device class.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
This corrects two issues found with openocd.
d7f71e7fe9 removed some code that was
being used.
The above then caused even more code to get removed by commit 1cfb2287a6.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
For the time being we support the old stm32 script names - this will
be removed before the next release cycle.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
The lm3s variant is not required as this is handled in the
target script - see tcl/target/stellaris.cfg.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Issue warning when the old cmd is used and redirect to new supported one.
These deprecated cmds will be removed at some point.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Use consistent names for the stm32 family flash drivers, eg.
stm32x -> stm32f1x
stm32f2xxx -> stm32f2x
this makes it easier to add support for newer stm32 families.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
We now make use of the new jimtcl --disable-install-jim
Now we can install openocd without jimtcl bring installed.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Update jimtcl version to commit 6233a6c5d39928f1bfafa8f41cb1ddf0c5a83de0
This enable to to build jimtcl as a submodule but not install it.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
When building official releases from tarball, git commit info is not
available in the building environment. Thus, automake should not try to
append the git commit to the version string.
Signed-off-by: Luca Bruno <lucab@debian.org>
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
For libftd2xx1.0.4, which uses a different directory structure
than libftd2xx0.4.16
Without this fix the build fails with version 1.0.4 of the driver.
Note that this does not fix --with-ftd2xx-lib=shared
Signed-off-by: Steve Bennett <steveb@workware.net.au>
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
This patch extends the cortex_m3 maskisr command by a new option 'auto'.
The 'auto' option handles interrupts during stepping in a way they are
processed but don't disturb the program flow during debugging.
Before one had to choose to either enable or disable interrupts. The former
steps into interrupt handlers when they trigger. This disturbs the flow during
debugging, making it hard to follow some piece of code when interrupts occur
often.
When interrupts are disabled, the flow isn't disturbed but code relying on
interrupt handlers to be processed will stop working. For example a delay
function counting the number of timer interrupts will never complete, RTOS
task switching will not occur and output I/O queues of interrupt driven
I/O will stall or overflow.
Using the 'maskisr' command also typically requires gdb hooks to be supplied
by the user to switch interrupts off during the step and to enable them again
afterward.
The new 'auto' option of the 'maskisr' command solves the above problems. When
set, the step command allows pending interrupt handlers to be executed before
the step, then the step is taken with interrupts disabled and finally interrupts
are enabled again. This way interrupt processing stays in the background without
disturbing the flow of debugging. No gdb hooks are required. The 'auto'
option is the default, since it's believed that handling interrupts in this
way is suitable for most users.
The principle used for interrupt handling could probably be used for other
targets too.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
In order to compare data read from the target with some marcros or data
defined on the host, we must transform this read data from target
endianess to host endianess.
target_read_memory() gets bytes from target to the host, but keeps them in _target_
endianess. This is OK if we just want to temporary keep this data on the
host, like keeping breakpoint->orig_instr. But if we want to use this
data for any ispections and comparisons on the host side, we must
transform it to _host_ endianess, by using target_buffer_get_u32()
function.
Currently this transformation is missing, and check current_instr ==
MIPS32_SDBBP will never pass if target and host endianess differ,
because current_instr will be kept in _target_ endianess and
MIPS32_SDBBP will be kept in _host_ endianess,
The patch fix this issue by using target_buffer_get_u32() to transform current_instr to
_host_ endianess before comparison.
The actual release is 411e92fea9621630eb350e0c2bb43543e553b84f as we
had a few issues relating to its use within openocd.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Use "git revert <commit>" to revert this commit, then build and
repair and post patch to the mailing list.
Warnings generated with:
nios2-elf-gcc (GCC) 3.4.6 (Altera Nios II 9.1 b222)
openocd/src/target/dsp5680xx.c: In function 'eonce_rx_upper_data':
openocd/src/target/dsp5680xx.c:252: warning: cast increases required
alignment of target type
openocd/src/target/dsp5680xx.c: In function 'eonce_rx_lower_data':
openocd/src/target/dsp5680xx.c:268: warning: cast increases required
alignment of target type
openocd/src/target/dsp5680xx.c: In function 'eonce_pc_store':
openocd/src/target/dsp5680xx.c:508: warning: dereferencing type-punned
pointer will break strict-aliasing rules
openocd/src/target/dsp5680xx.c: In function 'dsp5680xx_read':
openocd/src/target/dsp5680xx.c:736: warning: cast increases required
alignment of target type
openocd/src/target/dsp5680xx.c:737: warning: cast increases required
alignment of target type
openocd/src/target/dsp5680xx.c: In function 'dsp5680xx_write_8':
openocd/src/target/dsp5680xx.c:823: warning: cast increases required
alignment of target type
openocd/src/target/dsp5680xx.c: In function 'dsp5680xx_write':
openocd/src/target/dsp5680xx.c:938: warning: cast increases required
alignment of target type
openocd/src/target/dsp5680xx.c:941: warning: cast increases required
alignment of target type
openocd/src/target/dsp5680xx.c: In function 'dsp5680xx_f_wr':
openocd/src/target/dsp5680xx.c:1355: warning: cast increases required
alignment of target type
This patch extends the cortex_m3 maskisr command by a new option 'auto'.
The 'auto' option handles interrupts during stepping in a way they are
processed but don't disturb the program flow during debugging.
Before one had to choose to either enable or disable interrupts. The former
steps into interrupt handlers when they trigger. This disturbs the flow during
debugging, making it hard to follow some piece of code when interrupts occur
often.
When interrupts are disabled, the flow isn't disturbed but code relying on
interrupt handlers to be processed will stop working. For example a delay
function counting the number of timer interrupts will never complete, RTOS
task switching will not occur and output I/O queues of interrupt driven
I/O will stall or overflow.
Using the 'maskisr' command also typically requires gdb hooks to be supplied
by the user to switch interrupts off during the step and to enable them again
afterward.
The new 'auto' option of the 'maskisr' command solves the above problems. When
set, the step command allows pending interrupt handlers to be executed before
the step, then the step is taken with interrupts disabled and finally interrupts
are enabled again. This way interrupt processing stays in the background without
disturbing the flow of debugging. No gdb hooks are required. The 'auto'
option is the default, since it's believed that handling interrupts in this
way is suitable for most users.
The principle used for interrupt handling could probably be used for other
targets too.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
We use configure.gnu to pass options to the jimtcl submodule.
Make sure a distclean removes any generated files
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
A new variable "nobase_dist_pkglib_DATA" is introduced to install
the OpenULINK firmware image to $PREFIX/lib/openocd/OpenULINK/ulink_firmware.hex
Also, the variable "EXTRA_DIST" is used to include the OpenULINK firmware source
in the OpenOCD source distribution.
So far image_load command tries to load ELF binaries to address
discovered by reading p_paddr member of a Program header of an ELF
segment.
However, ELF specifications says for p_paddr : ...Because System V
ignores physical addressing for application programs, this member has
unspecified contents for executable files and shared objects.
ARM ELF specifiaction goes even further, demanding that this member
be set to zero, using the p_vaddr as a segment load address.
To avoid the cases to wrong addr where p_paddr is zero,
we are now using p_vaddr to as a load destination in case that *all*
p_paddr == 0. Basically, this patch re-implements the approach present in
BDF's elf.c, which is used by GDB also (so that we can be consistent).
This is only for the case of a make distcheck.
During a normal release build these flags will be created by configure.gnu
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
- Do not specify -e twice.
- Use "which" instead of calling commands that might not exist.
- Fix bashism ("==" is C not sh)
- Carefully quote potentially empty variables
- Check command arguments before doing anything
- Rewrite argument checking to be more easily extensible
- Consistent indentation
- UNIX style error messages
The following mini6410/tiny6410 functions are available:
init_6410 - initialize clock, timer, DRAM
init_6410_flash - initializes NAND flash support
install_6410_uboot - copies u-boot image into RAM and runs it
there was a check in clearing the status register that
called exit() if the target was running. target_write_memory()
has such a check and will report the error correctly.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
only set jtag global pointer if jtag->init() succeeds. Less code,
more clear what the rules are.
Fix nit that error value from init() was not propagated unmodified.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
- works on Cortex-M3 with ThreadX and FreeRTOS
Compared to original patch a few nits were fixed:
- remove stricmp usage
- unsigned compare fix
- printf formatting fixes
- fixed a bug with overrunning a memory buffer allocated with malloc.
Update devices as per the latest programming manual.
We now use the full DEVID to identify the target. Previously we used
a 8bit id but that has now been changed in the manual.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Freescale iMX53 doesn't seem to like unaligned accesses to his memory
mapped registers.
Anyway this patch makes dump_image/load_image 4X faster for every
access through APB.
Signed-off-by: Luca Ellero <lroluk@gmail.com>
With newer versions of autoconf >= 2.68 we receive warnings about the
incorrect use of AC_LANG_PROGRAM. This fixes those warnings.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
accidentally invoked return jtag_execute_queue() in the
middle of a fn. Hmm.... I would have expected gcc or
at least lint to catch this.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
the patchup code would get false positives when checking
whether a dbgbase had to be corrected.
The solution is to have autodetect default, with manual override
in scripts.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Could this cause confusion as data sent to write would be flipped
and then if the caller subsequently used the data, e.g. a
compare mismatch might happen?
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Really a Cortex-A specific option, but there is no
system in place to support target specific options
currently and there has been no need for such a system
until now.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
production processor versions increment, thus the version
bits should be ignored for future proofing. e.g.
Engineering sample version == 0x00, production version 0x01
The patch below fixes step <address> on mips_m4k.
Spencer Oliver <spen@spen-soft.co.uk>:
The current code is used on all other arch's - is
there a underlying issue with those aswell ?
I don't think dsp563xx_once_read_register() would ever
be called with len==0, but it would have been broken in
that case.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Problem is, trying to print "Hello, world!\n" just prints endless H's, because r1 is never incremented.
One way to fix it would be to add a "++" after "r1".
Fix a bunch of typos.
Most are in code comments, so nothing should break. UNKOWN_COMMAND and
CMD_UNKOWN are not used elsewhere, so correcting the spelling should
also not break anything.
only flush write queue just before waiting for more data,
rather than when fetching more data from the buffer.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Found by inspection: the correct thing in the context is to use
usleep() rather than jtag_sleep(). Relates to JTAG over TCP/IP
only.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
short sleeps are handled via usleep, longer sleeps we round up
to nearest ms.
There was a bug in jtag_sleep() in that it would round *down*
to nearest ms, thus making all <1ms sleeps 0. Found by inspection
rather than symptom.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Soft breakpoints are currently broken if the MMU is enabled due to incorrect
cache flushing. Until this is fixed, force the use of hardware breakpoints.
Signed-off-by: Aaron Carroll <aaronc@ok-labs.com>
as said in the datasheet Section 3.3.2 Organization of buffers
All buffers are big enough to hold 2 KByte of data.
this will double the speed of download
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
this will allow us to use multiple jlink at the same time as when
the USB-Address is specified the PID change from 0x0101 to
(0x101 + usb_adress)
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
The default pid of the segger is 0x0101
But when you change the USB Address it will also
pid = ( usb_address > 0x4) ? 0x0101 : (0x101 + usb_address)
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
useful for debugging without access to hardware to e.g.
regression test, reproduce memory corruption problems,
etc.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
This patch fix a possible read buffer overflow in ft2232_execute_queue.
Also the correct read queue size for libftdi and libftd2xx was added and
and tested.
In function ft2232_write a uninitialized value was initialized because we
don't know if this value was set in the ftdi api call.
it will allow to be at the highest speed of the jlink without touching the
board or cpu config
tested on sam-ice v5 and at91rm9200-ek
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
This patch add rudimentary gdb support. The gdb register list
order is corrected. All registers are now 32bit width. Events are
send to signalize gdb the current target status. Resume and step
function was corrected to consider a modified pc register. Read/write
memory now support L memory type, this means a memory with alternating
y/x memory words. The memspace variable, used by gdb, is now observed
before a default memory access is initiated. Dummy functions for breakpoint
and watchpoint are added.
Use the http protocol for git2cl module, as it makes it easier for the
firewall safe mirror to keep all submodules firewall safe.
Signed-off-by: Edgar Grimberg <edgar.grimberg@gmail.com>
This patch tries to make some order in "apsel" mess.
"dap apsel" command was quite useless (and broken) by itself.
With this patch we can use it to select between AHB or APB memory access
(previous patch 05ab8bdb81 was somehow broken).
- moves member apsel (in struct adiv5_dap) to ap_current
- adds apsel member
this strange choice is made trying to keep coherence in "dap apsel" command
and to keep compatibility with other code (for example cortex_a8).
Signed-off-by: Luca Ellero <lroluk@gmail.com>
This patch move the dsp563xx_target_create function to the
related code block. Also the target examine function was added
and the register cache is initialized in a separate function. The
missing functionality to invalidate the x memory context on memory
writes was also added.
This patch change the return value on a jtag communication error
to TARGET_UNKNOWN because this function should return the current
target status and not a error code from the underlying api call.
Also the validity of the jtag_status is extended to all static
bits in this value.
Based on the lpc3180 driver, but released as a separate driver for two reasons:
1) I don't have an lpc3180 to test it against, so it might unintentionally break compatibility.
2) It's using a different OOB layout than lpc3180.
Rewritten so that it no longer borrows code from the NXP CDL library. Instead borrowing code from the u-boot port to lpc32xx, written by Kevin Wells.
Tested on lpc3250 (Hitex LPC3250-Stick). OOB layout is compatible with LPCLinux.
I've been working on Rodrigo on adding support to flash
Freescale dsp56800e devices and have been looking at the
dsp563xx code. I think the define for the JTAG CLAMP
instruction in dsp563xx_once.c is incorrect. It should
be 0x05 according the Freescale AN2074 (and is also
0x05 in the dsp568xx according to AN1935). It won't
actually change anything in OpenOCD since this define
is not used anywhere (as far as I can tell).
dap_ap_select was used in the code at various points, but that can lead to
confusion, without any knowledge of what AP is really selected at some
points.
Some bugs derive from this (for example md/mw doesn't work well after
issueing "dap apsel" command).
Moving it to arm_adi_v5.c (using mem_ap_sel* functions instead of mem_ap_*)
make the code more clear and more easier to maintain.
In the future it should be made "static" to avoid its use outside arm_adi_v5
One further benefit is the various goto has been removed as well
Signed-off-by: Luca Ellero <lroluk@gmail.com>
This patch adds read/write capability to memory addresses not
accessible through AHB-AP (for example "boot ROM code").
To select AHB or APB, a "dap apsel" command must be issued:
dap apsel 0 -> following memory accesses are through AHB
dap apsel 1 -> following memory accesses are through APB
NOTE: at the moment APB memory accesses are very slow, compared
to AHB accesses. Work has to be done to get it faster (for
example LDR/STR instead od LDRB/STRB)
Signed-off-by: Luca Ellero <lroluk@gmail.com>
Save, select and restore AP in cortex_a9_step and cortex_a9_init_debug_access.
Fixes a bug where the wrong AP is selected after a reset.
Signed-off-by: Aaron Carroll <aaronc@cse.unsw.edu.au>
PandaBoard REV EA1 (Panda Early Adopter Program) has a different ID.
This patch add alternate REV EA1 TAP id to configuration file
Signed-off-by: Luca Ellero <lroluk@gmail.com>
Hello,
this patch add commands to access to x,y and p memory. For run time optimization some local jtag
function was changed to static inline.
Regards,
Mathias
Also i have checked the input of this function and in many cases
a simple byte copy is possible.
I have added this check now and is it possible the buffer is
copied byte by byte and not bit by bit.
With byte boundary input the test looks like this:
buf_set_buf 0x02000000 iteration test:
runtime (seconds): old: 6.828559 new: 0.436191 diff: 6.392368
runtime (seconds): old: 6.853636 new: 0.430389 diff: 6.423247
runtime (seconds): old: 6.794985 new: 0.423065 diff: 6.371920
Without:
buf_set_buf 0x02000000 iteration test:
runtime (seconds): old: 6.370869 new: 5.552624 diff: 0.818245
runtime (seconds): old: 6.420730 new: 5.665887 diff: 0.754843
runtime (seconds): old: 6.583306 new: 5.599021 diff: 0.984285
Regards,
Mathias
Hello,
this patch adds the missing cpu registers and the correct read/write register functions and fixed
most of the halt/step/resume issues. The complete missing error propagation was added.
+ fix tab/spaces
Regards,
Mathias
* Write to the PRM reset control register should have been 'phys';
* Setup empty reset-assert handlers for the M3's, since the board-level reset
takes care of them;
* Remove the dbginit cruft, because it gets called implicitly on reset.
Signed-off-by: Aaron Carroll <aaronc@cse.unsw.edu.au>
If a handler for the reset-assert event it present, skip the usual reset
handling. This is needed, for example, for board-level resets.
Signed-off-by: Aaron Carroll <aaronc@cse.unsw.edu.au>
ARM11 broke with aa61a3b3d8
as the code only checked for arm 7/9.
CFI probably needs work for non-ARM targets but perhaps
not adding working area memory to e.g. MIPS will give
the default slow CFI support.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
ARM Cortex-A9 multi-core chips expose a single TAP/DAP which connects
to both cores. The '-coreid' option selects which core the target
should connect to.
Note that at present, OpenOCD can connect to either core, but not both
simulatenously, until ADI contexts can be shared.
Signed-off-by: Aaron Carroll <aaronc@cse.unsw.edu.au>
ahbap_debugport_init was queueing reads to a local stack variable but
didn't execute the queue before returning. Since the result of the reads
are not used anyway, it's better to pass NULL as the destination instead of
a dummy variable. I changed this throughout the function, even for the
reads that were actually executed.
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Added a Perl script to contrib that uses the header files in StellarisWare complete Firmware Development Package provided by TI/Luminary to generate a new list of device IDs
Used Perl script and revision 6734 of TI/Luminary StellarisWare to update device IDs
Hi,
I took the stm32x NOR flash driver and adapted it for the Ember EM357
chip. This chip is very similar to em351 and stm32w so the driver
should be easily extended to support those as well if anyone can get
their hands on some of those for testing.
changelog:
Added NOR flash driver em357
Best regards,
Erik Botö
Find the flash controller by position since it is before the core,
not after it.
This fixes the problem that str9xpec enable_turbo (or any other
str9xpec command) did not work. (See my post in
http://forum.sparkfun.com/viewtopic.php?f=18&t=25542)
Signed-off-by: Santeri Salko <santeri.salko@gmail.com>
LOG_DEBUG() arguments are only evaluated when DEBUG logging
is enabled, do not use arguments that have side effects
like foo++.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Remove extra \n from LOG_DEBUG, LOG_INFO, and LOG_WARNING messages
Remove LOG_INFO_N
LOG_INFO_N was only used once and had a \n at the end
Change LOG_USER_N calls that end with \n to LOG_USER
Add a working area that is preserved between calls to
mips_m4k_bulk_write_memory - this gives us a speed increase
of approx 3kb/sec during flash writes to the pic32mx.
This area is released during a resume/reset.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
We only use the struct working_area member 'free' as a
true/false type so might as well use a bool data type.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Do not propagate error number to user. This is for internal
programming purposes only. Error messages to the user is
reported as text via LOG_ERROR().
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk>
min_time was effectively ignored, I needed it to program a Lattice MachXO
which uses a RUNTEST to wait for an erase operation, amongst other things.
With this patch pauses happen and I can program the device with an SVF
generated in LSC ispVM (with "Rev D Standard" checked to suppress
nonstandard LOOP statements)
Every NAND driver keeps private copy of "target"
structure.
Prepare infostructure to move private "target"
copy in common/shared struct nand_device.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Table of NAND devices reports operating voltage.
Replace comma with proper decimal dot.
Øyvind: "." is correct for UK/US, but incorrect for
many other languages. OpenOCD is not localized at this
point, so sticking to "." for US/UK should be OK.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
From struct nand_flash_controller :
- remove unused field register_commands;
- remove field controller_ready, exported but
never referenced.
Remove dead code pointed by controller_ready.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
This patch fixes the issue where the OMAP CPU (and possibly others) was mistaken
for iMX51 and therefore had misadjusted debug base.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
I received a number of "-Wshadow" related warnings (treated as errors) while
trying to build on OS X Leopard. In addition, there were two miscellaneous
other warnings in the flash drivers. Attached are two patches which correct
these issues and the commit messages to accompany them.
My system has the following configuration (taken from uname -a):
Darwin 9.8.0 Darwin Kernel Version 9.8.0: Wed Jul 15 16:55:01 PDT 2009;
root:xnu-1228.15.4~1/RELEASE_I386 i386
=== Werror_patch.txt Commit Message ===
compilation: fixes for -Wshadow warnings on OS X
These changes fix -Wshadow compilation warnings on OS X 10.5.8
Compiled with the following configure command:
../configure --prefix=/usr/local --enable-maintainer-mode --enable-jlink
--enable-ft2232_libftdi
=== flash_patch.txt Commit Message ===
compilation: fixes for flash driver warnings on OS X
These changes fix two compilation warnings on OS X 10.5.8:
../../../../src/flash/nor/at91sam3.c:2767: warning: redundant redeclaration
of 'at91sam3_flash'
../../../../src/flash/nor/at91sam3.c:101: warning: previous declaration of
'at91sam3_flash' was here
and
../../../../src/flash/nor/stmsmi.c:205: warning: format not a string literal
and no format arguments
Compiled with the following configure command:
../configure --prefix=/usr/local --enable-maintainer-mode --enable-jlink
--enable-ft2232_libftdi
===
Andrew
error numbers are only reported at DEBUG log levels and
used internally, they are not part of the user interface.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
This piggy backs on JTAG so it's not yet pretty, but that
seems unavoidable so far given today's OpenOCD internals.
SWD init and data transfer are unfinished and untested, but
that should cause no regressions, and will be addressed by
the time drivers start using this infrastructure. Checking
in whould get the code working better sooner, and turn up any
structural/architectural issues while they're easier to fix.
The debug adapter drivers will provide simple SWD driver
structs with methods that kick in as needed (instead of JTAG).
So far just one adapter driver has been updated (not yet
ready to use or circulate).
The biggest issues are probably
- fault handling, where the ARM Debug Interface V5 pipelining
needs work in both JTAG and SWD modes and
- missing rewrite of block I/O code to work on both of our
Cortex-ready transports (Current code is hard-wired to JTAG);
relates also to the pipelining issue.
- omitted support to activate/deactivate SWO/SWV trace (this is
technically trivial, but configuring what to trace is NOT.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
----
doc/openocd.texi | 17 ++
src/jtag/core.c | 3
src/jtag/interface.h | 4
src/jtag/jtag.h | 2
src/jtag/swd.h | 114 +++++++++++++++++++
src/jtag/tcl.c | 2
src/target/adi_v5_swd.c | 281 ++++++++++++++++++++++++++++++++++++++++++++++--
src/target/arm_adi_v5.c | 8 +
src/target/arm_adi_v5.h | 3
9 files changed, 425 insertions(+), 9 deletions(-)
The flash bank name is a required element in adding flash banks,
however other than looking at the config file there is no way of
getting the name used in openocd.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
add supoort for xl family boot bank option.
The option byte handling will be cleaned up in a later patch.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
This patch adds the initial dual flash bank support for devices such
as the stm32xl family.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
As the stm32 flash loader now uses the preprocessor change extension
so that it used by default.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Define a proc which PCBs can easily override.
Also demonstrates how to add multiple TAP exepcted-id's
using arguments.
Added 0x3f0f0f0f as expected TAP-id. Old LPC2148 silicon
I happened to have on my desk?
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
this allows configuration scripts to export a init_targets proc
rather than setting up the target directly.
This allows for new conventions in how to set up target vs. board
script and how to transfer default settings between board and
target scripts.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
the error values is not part of the interface to the user,
so they should never be printed in LOG_INFO or LOG_USER.
Printing them in LOG_DEBUG() rarely makes much sense but
is OK.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Only Tcl comments are now supported. For classic style
commands comments were supported at the end of the line.
Move in the direction of letting the script language
decide syntax, rather than have special rules for some
commands.
Before this patch goes in, the scripts should be updated
to use ;# instead of # for end of line comments.
> mdw 0 1 2
mdw ['phys'] address [count]
zy1000.cpu mdw address [count]
Command handler execution failed
in procedure 'mdw'
> mdw 0 1 #2
mdw ['phys'] address [count]
zy1000.cpu mdw address [count]
Command handler execution failed
in procedure 'mdw'
> mdw 0 1 ;#2
0x00000000: ffffffff
> mdw 0 1
0x00000000: ffffffff
> mdw 0
0x00000000: ffffffff
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
End of line comments fixed with ';' before '#'.
Added few additional 'space' to keep indentation in
multi-line comments.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
the unprotect fn in stm32 needs to unprotect more sectors
than was requested aligned to some boundary.
Print warning when this happens.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
some chips unprotect more than the range asked for. The
protect fn, must unprotect/protect minimally the range given.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Some flash's do not support buffer writes, so we now check
they are supported before trying to use them.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
The existing code used incorrect timeout values for the various cfi
operations. We now calculate the timeouts and convert to
msecs if necessary.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
LPC2xxx do not require reset_config srst_pulls_trst. This can cause various "strange" problems when flashing the chip, because "reset halt" actually allows the chip to run for some short period of time and execute some code.
Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>
If the JTAG speed has not been set, then it has no defined
value, add code to propagate the error.
No change to actual behavior as no new failure paths have
been introduced. This is a no-op patch to make subsequent patches
smaller.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* added support for targeting particular tap
* improved file reading
* improved command line parsing
* added progress meter
* more readable time measurement output
Hi everyone,
Since a call went out for patches... been sitting on this for months. For some
reason, the xscale trace buffer is automatically disabled as soon as a break
occurs and the trace data is collected. This patch was a result of the
frustration of always re-enabling it, or else hitting a breakpoint and checking
the trace data, only to discover that I forgot to re-enable it before resuming.
Don't see why it should work this way. There is no run-time penalty, AFAIK.
Along the way, I also cleaned up a little by removing the ugly practice of
recording wrap mode by setting the fill count variable to "-1", replacing it
with an enum that records the trace mode.
I've been using this for months. Comments, criticisms gratefully received.
Mike
Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
Due to commit e40aee2954d2beabe1d8c530d9ff1e564fb01f48 we now honour the
targets 'reset_config' setting. Previously we ignored the srst setting
for luminary targets.
Luminary targets have never supported using srst to reset into debug mode
so remove the option from the target configs files.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Currently the cmd 'cortex_m3 reset_config' will overide the default
target's 'reset_config'.
Chnage the behaviour to use the target 'reset_config' if configured and
fallback if not.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Rename Atmel target scripts which had wrong name ("at91" missing for ARM7 AT91SAM7..., "at" missing for AVR ATmega...)
Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>
it's a lie that is somewhere in the vicinity of the
truth. Certainly 64MHz confuses gprof and produces
zero output and no error messages.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Update subproject jimtcl to fix issue with make install.
see jimtcl commit 373b721510fd2d0754a41cc70a3b7cfd02e929bd
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
As we default to building jimtcl the help text should show that.
No change in functionality or configure args required.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
STMicroelectronics controller SMI is not SPEAr specific.
Rename it and change name to every symbol in the code.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Modified spearsmi driver to include support for STR75x
Added missing initialization in tcl file for STR750
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
If flash chip is not listed in the table, or if no flash is
connected, pointer must be properly initialized.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
This is a recent jimtcl feature but it currently breaks mingw
builds as this system does not have termios.h etc.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
When passing CFLAGS for example through to the jimtcl subconfigure the
quotes were not being preserved.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
This allows us to add options to jimtcl configure.
The default autoconf AC_CONFIG_SUBDIRS does not currently support this.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Rather than having to configure/build jimtcl openocd
will do this as part of its own build.
To use an external jimtcl lib specify disable-internal-jimtcl
to the configure step.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
flash programming via flash write_image or gdb load would
produce a bogus error message that the flash chip was to
small.
The solution is to limit the current flash programming
run to the current chip.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
SMI interface hides the real SPI bus between SPEAr and
external flash.
Added comments to highlight the SPI operation, to help a
future rework in SPI generic and SPEAr specific drivers.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Add support and documentation for STMicroelectronics
SPEAr Serial Memory Interface (SMI).
Code tested on SPEAr3xx only.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
this never panned out and there are enough mistakes in
the code that probably nobody used this.
Use the tcl server and implement a standalone http
app instead works fine.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Add comments to assembly flash loader for STM32. Add tiny improvement in
size of the algorithm (40 vs 48 bytes) and tiny speed improvement (~1.5%,
as time is wasted on waiting for end of operation anyway).
Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>
gdb connect can fail when the flash has not been probed.
During gdb connect, the flash layout is reported, but this
can not be automatically detected for a target that is
powered up and OpenOCD supports connecting to gdb server
even if the target is powered down.
The solution is to turn of the gdb_memory_map feature.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
If the CPU crashed at some point, poll will discover this.
Previously the poll fn would clear the error and print a warning,
rather than propagating the error.
The new behavior is to report the error back up, but still
clear the error.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Document "-n" option in manual;
Modify "echo" command definition as COMMAND_HANDLER to
easily add help message
Add help message aligned with manual.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
With the new JIMTCL, "puts" only writes to stdout.
To write on telnet port too, "echo" must be used.
This patch gives to "echo" similar commandline option of "puts".
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
add missing error handling.
Output warning when assuming maximum flash size in the
family when failing to read.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Initial support for ST SPEAr310 and for the evaluation
board EVALSPEAr310 Rev. 2.0.
Scripts are split in generic for SPEAr3xx family and
specific for SPEAr310. This should easily allow adding
new members of the family.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
This patch introduces support for Cortex A8 based Freescale i.MX51 CPU. This CPU
has the Debug Access Port located at a different address (0x60008000) than TI
OMAP3 series of CPUs.
i.MX51 configuration file based on OMAP3 configuration file and an email from
Alan Carvalho de Assis <acassis@gmail.com>.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Implement autodetection of debug base. Also, implement a function solving
various hardware quirks (like iMX51 ROM Table location bug).
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
This patch implements "dap_lookup_cs_component()", which allows to lookup CS
component by it's identification.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
This patch adds function called "dap_detect_debug_base()", which should be
called to get location of the ROM Table. By walking ROM Table, it's possible to
discover the location of DAP.
Sadly, some CPUs misreport this value, therefore I had to introduce an fixup
table, which will be used in case such CPU is detected.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
So far most of the people have been using existing ARM966E in the
place of ARM946E, because they have practically the same scan chains.
However, ARM946E has caches, which further complicates JATG handling
via scan-chain. this was preventing single-stepping for ARM946E when
SW breakpoints are used.
This patch thus introduces :
1) Correct cache handling on memory write
2) Possibility to flush whole cache and turn it off during debug, or
just to flush affected lines (faster and better)
3) Correct SW breakpoint handling and correct single-stepping
4) Corrects the bug on CP15 read and write, so CP15 values
are now correctly R/W
measure_clk indicates ca. 3-4MHz, so 1MHz should be safe.
Added self_test proc used to test that rclk worked.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
help would not show help for commands when the command
interpreter was in the wrong mode, which means that
e.g. "help newtap" didn't work, it wouldn't show the
"jtag newtap" help as it was a configuration command.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Collect variable definitions.
Report syntax error to command dispatcher.
Propagate error when unable to open file.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Provide new helper proc that can set up either an SWD or JTAG DAP
based on the transport which is in use -- mostly for SWJ-DP.
Also update some SWJ-DP based chips/targets to use it. The goal
is making SWD-vs-JTAG transparent in most places. SWJ-DP based chips
really need this flexible configuration to cope with debug adapters
that support different transports, without needing new target configs
for each transport or adapter.
For JTAG-DP, callers will use "jtag newtap" directly, as today; only
one chip-level transport option exists.
For SW-DP (e.g. LPC1[13]xx or EFM32, they'll use "swd newdap" directly
(part of an upcoming SWD transport patch). Again, only one transport
option exists, so hard-wiring is appropriate there.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
When usng gdb pipes we need to keep openocd output at a minimum,
otherwise the gdb stdin will overflow and fail.
Make the calls to gdb_port and log_output synchronous to stop this.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
commit 50d5441e2a caused
native windows build to fail.
Firstly this patch fixes the build issue, but it also disables support
for named pipes under Windows. Windows does not support posix named
pipes.
A cross-platfom access layer will need creating before support can be
enabled again.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Stick with the name "gdb_port" even if this command
can be used for other things(disable, named pipes,
anonymous stdin/out pipe). "port" is correct for
probably more than 90% of use cases, if not more.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
This will allow switching to using named pipes.
Split this out as a seperate commit to make changes
easier to follow.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
depending on whether the connection is over a socket
or pipe, the read is done differently.
pipes can return -1 when writing 0 bytes, make 0 byte
writes a successful no-op. 0 byte writes falls out
naturally of tcl server code.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
pipes have different fd's for in/out. This makes the
code more orthogonal and prepares for adding pipes.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
there was special support to support pressing 'x' to quit
openocd. ctrl-c is sufficient. The main server loop is already
complicated enough.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
There is an explicit command "log_output" that can
be used to redirect log output to a file, no need
for a hack in the first place.
Before enabling pipes, use "log_output foo" to redirect
log output to the "foo" files.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
ep93xx and at91rm9200 are conditionally built only on arm and were not
updated to reflect changes in command registration handler.
This patch makes them properly compile again, fixing a build failure
experienced on Debian armel.
Signed-off-by: Luca Bruno <lucab@debian.org>
Signed-off-by: Zachary T Welch <zwelch@codesourcery.com>
In previous patch, I have introduced again the symbol
"ocd_mem2array", now replaced by "mem2array".
Fix the error.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
short story: if the JTAG clock is too high, then the
behavior will be flaky and kludging the code may
seem to make things beter, but really it's just a red
herring.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
TCL procedures mrw and mmw, originally in DaVinci target code,
are duplicated in other TCL scripts.
Moved in a common helper file, and added help/usage description.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
capture of progress output would get polling
results. This will break in the example below
where polling output would override the tcl
return value.
capture {sleep 10000; set abc def}
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
by using ctrl-z instead of line end, multi-line tcl scripts
can be handled.
Testing: send ctrl-z a couple of times to make telnet enter the
mode where it sends ctrl-z unencoded.
Programs that talk to the tcl_server can send ctrl-z to
indicate end of tcl-let to be executed without having
to worry about telnet protocols.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
with this buffering disabled fancier logging scripts will
be able to process each line as it is output.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
used /dev/mem and mmem() to memory map JTAG registers
into user space and used new configure options to exclude
eCos specific code.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Hi everyone (again),
Watchpoints on xscale are quirky, so I thought a little explanation in the
user's manual was warranted.
Comments gratefully received.
Last one, Øyvind :-)
Thanks,
Mike
Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
Hi everyone,
A while back I sent in a patch that adds support for watchpoint lengths greater
than four on xscale. It's been working well, until the other day, when it
caused an unexpected debug exception. Looking into this I realized there is a
case where it breaks: when the length arg is greater than the base address.
This is a consequence of the way the hardware works. Don't see a work-around,
so I added code to xscale_add_watchpoint() to check for and disallow this
combination.
Some more detail... xscale watchpoint hardware does not support a length
directly. Instead, a mask value can be specified (not to be confused with the
optional mask arg to the wp command, which xscale does not support). Any bits
set in the mask are ignored when the watchpoint hardware compares the access
address to the watchpoint address. So as long as the length is a power of two,
setting the mask to length-1 effectively specifies the length. Or so I thought,
until I realized that if the length exceeds the base address, *all* bits of the
base address are ignored by the comaparator, and the watchpoint range
effectively becomes 0 .. length.
Questions, comments, criticisms gratefully received.
Thanks,
Mike
Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
Hi everyone,
Added more LOG_ERROR messsages to watchpoint and breakpoint code, given that the
infrastructure no longer interprets returned error codes. Also changed
existing LOG_INFO and LOG_WARNING to LOG_ERROR for cases where an error is
returned.
Note that the check of the target state is superflous, since the infrastruture
code currently checks this before calling target code. Is this being
reconsidered as well? Also, should we stop returning anything other than
ERROR_OK and ERROR_FAIL?
Comments gratefully received.
Thanks,
Mike
Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
do not try to interpret "retval" into a string, just
amend a bit about the context of the already reported
error.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
the new Marvell PXA270M processor has a new TAPID: 0x89265013.
Attached you will find a patch for target/pxa270.cfg that will handle this.
I have also attached a board/colibri.cfg file to support the Colibri
PXA270 module by Toradex.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Hi everyone,
Version 2 of this patch. Code added to breakpoints.c was removed from previous
patch, and item 3 added, per discussion with Øyvind regarding error reporting.
Item 4 added, which I just noticed.
I tried to use a software breakpoint in thumb code on the xscale for the first
time recently, and was surprised to find that it didn't work. The result was
this patch, which does four things:
1): fix trivial cut-n-paste error that caused thumb breakpoints to not work
2): call xscale_set_breakpoint() from xscale_add_breakpoint()
3): log error on data abort in xscale_write_memory()
4): fixed incorrect error code returned by xscale_set_breakpoint() when no
breakpoint register is available; added comment
Item 2 not only makes the xscale breakpoint code consistent with other targets,
but also alerts the user immediately if an error occurs when writing the
breakpoint instruction to target memory (previously, xscale_set_breakpoint() was
not called until execution resumed). Also, calling xscale_breakpoint_set() as
part of the call chain starting with handle_bp_command() and propagating the
return status back up the chain avoids the situation where OpenOCD "thinks" the
breakpoint is set when in reality an error ocurred.
Item 3 provides a helpful message for a common reason for failure to set sw
breakpoint.
This was thoroughly tested, mindful of the fact that breakpoint management is
somewhat dicey during single-stepping.
Comments and criticisms of course gratefully received.
Mike
Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Hi everyone,
I figured since I was poking around in the breakpoint code on other arches, I'd
add this change to those arches that don't do it already. This patch propagates
the return code of <arch>_set_breakpoint() up the call stack. This ensures that
the higher layer breakpoint infrastructure is aware that an error ocurred, in
which case the breakpoint is not recorded.
Normally I wouldn't touch code that I can't test, but the code is very
uniform across architectures, and the change is rather benign, so I figured
after careful inspection that it is safe. If the maintainers or others think
this is imprudent, the patch can be dropped.
Also changed the error code to something more appropriate in two cases where
hardware resources are unavailable.
Comments and criticisms of course gratefully received.
Mike
Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
you can now set a variable in a script like set version [version].
Also version takes an optional argument "git" to show git version
of source. If git is not installed during the build, then this
will yield an error that is ignored during the build and "version git"
returns an empty string.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Commands that output progress output and no return value
will have the progress output captured.
Commands that do not output progress output(tcl commands)
will return the tcl return value instead.
The advantage here is that it is no longer necessary to
consider which command one is capturing, it works for
either.
Example #1: capture progress output:
set foo [capture help]
Example #2: capture tcl return value
set foo [capture {set abc def}]
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
for non_cfi cfi chips free() was invoked on rodata.
The mystery is why this bug has survived for so long.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
sizeof() is a bit less scary than seing assumption
about size of type, no bug as such.
Use NULL instead of 0 for pointers. More obvious that
it is a pointer from code inspection.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Hi everyone,
This simple patch fixes a problem I noticed on the xscale where incorrect values
are sometimes reported by the reg command. The problem can occur when
requesting the value of registers in the xscale-specific register cache. With a
couple of exceptions, none of the registers in the xscale register cache are
automatically retrieved on debug entry. This is probably fine, as they are
unlikely to be needed on a regular basis during a typical debug session, and
they can be retrieved when explicitly requested by name using the reg command.
The problem is that once this is done, the register remains marked as valid for
the remainder of the OpenOCD session, and the reg command will henceforth always
report the same value because it is obtained from the cache and is never again
retrieved from the debug handler on the target.
The fix is to mark all registers in the xscale register cache as invalid on
debug entry (before the two exceptions are retrieved), thus forcing retrieval
(when requested) from the target across resumptions in execution, and avoiding
the reporting of stale values.
Small addition change by Øyvind: change 'i' to unsigned to fix compiler
warning for xscale_debug_entry() fn.
Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
I a mail conversation with Øyvind we stated that speed may not be set at
all on case CLOCK_MODE_KHZ and CLOCK_MODE_RCLK. Also there isn't proper
error propagation adapter_khz_to_speed or jtag_rclk_to_speed.
So jtag_get_speed may need some rewrite for error propagation.
CC: Øyvind Harboe <oyvind.harboe@zylin.com>
Signed-off-by: Alexander Stein <alexander.stein@informatik.tu-chemnitz.de>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Do not fail startup if communication with target is
not possible.
OpenOCD supports launching without a target connected
or the target powered down.
The user will typically power up the target and issue
a "reset init" + load his application after OpenOCD
is started then.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Someone called David Carne popped up on IRC and offered a fix (as he's not
on this list so can;t post here). I am just passing it on. (thanx David)
10:54 < davidc__> Basically; the Numonyx M29W160ET has an incorrect CFI PRI
block; it describes the erase blocks backwards
10:54 < davidc__> the linked patch has a fixup for that part [really trivial]:
This new cmd adds the ability to choose the Cortex-M3
reset method used.
It defaults to using SRST for reset if available otherwise
it falls back to using NVIC VECTRESET. This is known to work
on all cores.
Move any luminary specific reset handling to the stellaris cfg file.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
- Update all Luminary config's to use a common target/stellaris.cfg.
- Add Luminary ek-lm3s6965 config.
- Increase working area for boards with more ram.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
bitq.c: In function ‘bitq_scan_field’:
bitq.c:224: error: declaration of ‘pause’ shadows a global declaration
/usr/include/unistd.h:429: error: shadowed declaration is here
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Using the bundled JTAG/SWD debug support in JTAG mode
is optional on *all* of the EK boards.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Mention AVR32 AP7000 support.
Clarify ARM semihosting update was for V7M (not ARM9 etc).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
These don't need to use the on-board debuggers in JTAG mode.
Off-board is OK, as would be SWD mode.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
committed so as to ease cooperation and to let it be improved
over time.
So far it supports:
- halt/resume
- registers inspection
- memory inspection/modification
I'm still getting up to speed with OpenOCD internals and AVR32 so code is a little
bit messy and I'd appreciate any feedback.
if a tap could not be _enabled_, the error message was
'failed to disable tap'. Fixed that. Also, display the failing
tap's name.
Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
Clear the enable bits for all clocks that are not set explicitly.
This is done to increase robustness by removing pre-existing
state.
Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
The PLL pre- and postdividers seem to have enable bits, although
these are not mentioned in the chip documentation.
Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
The patch improves flash erase for STR9x in case of a full bank erase.
Then the chip erase command is used instead which improves speed significantly.
Also I think it might help if e.g. STR912 enters some state where flash banks are locked, and a chip erase command is the key for unlocking the flash.
ocd_ prefix is used internally in OpenOCD as a kludge more
or less to deal with the two kinds of commands that OpenOCD
has.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
The strange thing here with this board is that 16MHz kinda
works, but only 2MHz is really stable.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
This patch adds support for the omapl138 target and preliminary support for the da850evm. The
target cfg file is based on the icepick routing done by the target/ti_dm6446.cfg file.
I have performed limited testing with this setup. I am posting this patch in the interest of
sharing cfg files and in the hopes that the experts on this list can correct errors I have made or
point out enhancements.
The testing I have performed is debugging uboot with gdb where I also use the following local.cfg
and gdbinit files. Debugging appears to work in so much as 'ni' works.
local.cfg:
gdb_memory_map disable
gdbinit:
target remote localhost:3333
set remote hardware-breakpoint-limit 2
set remote hardware-watchpoint-limit 2
monitor poll on
Comments welcome.
Best Regards,
Ben Gardiner
if polling is off, then "reset run + halt" would fail
since halt incorrectly assumed the target was in the
reset state as it is the internal poll implementation
that moves the sw tracking of the target state out
of the reset state.
To reproduce:
> reset run; halt
JTAG tap: zy1000.cpu tap/device found: 0x1f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x1)
BUG: arm7/9 does not support halt during reset. This is handled in arm7_9_assert_reset()
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
back-off algorithm for polling. Double polling
interval up to 5000ms when it fails.
when polling succeeds, reset backoff.
This avoids flooding logs(as much) when working
with conditions where the target polling will fail.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Clarify that ICDI is the generic logic, but this config is
for the JTAG-only (no-SWD) mode.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Hi everyone. I noticed some incorrect information in the user manual
regarding how the vector table is handled on the xscale, so for your
consideration, here's a short patch that corrects it, and adds a
little more detail I thought might be helpful.
The documentation states that OpenOCD does not attempt to synchronize
the vector tables in memory with those stored in the "mini instruction
cache". In fact, on each resume it does copy from memory to the cache
all entries in the high and low tables that were not previously
defined using the 'xscale vector_table' command. (In
src/target/xscale.c, see xscale_update_vectors(), which is invoked by
xscale_resume().) I take advantage of this during Linux boot-up. The
extra detail describes in general terms how I do this.
Corrections, comments are of course gratefully received.
Thanks,
Mike
Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
It is useful to know that the printed errors are *all* the
errors there were.
Added missing error handling(found by inspection).
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
it can be useful to throttle performance: test
differences in behavior, test performance effect
of long roundtrips.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
srst_pulls_trst is only true on some (broken) LPC2148 boards, a fact
which is already documented in doc/openocd.texi, so it shouldn't be
set unconditionally in the target tcl.
This patch was needed to reflash when an Abort exception occured very
early after reset, before OpenOCD tried to halt the CPU.
This flash driver works on more than just two chips.
(Though it does need work still, e.g. to protect more than 64K.
(On non-'3748-A0 chips where errata allow that.))
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make it scriptable, so code can be conditionalized based on
what transport is in use for the session.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
For the above targets the exit_point is
optional when used with run_algorithm, so remove it.
This makes updating the algorithm less error prone.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
As the mips32 uses instruction breakpoints for algorithms we do not really
need to check the pc on exit.
This now matches the behaviour of the arm codebase.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
As the armv7m uses instruction breakpoints for algorithms we do not really
need to check the pc on exit.
This now matches the behaviour of the arm4_5 codebase.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Update the arm_checksum_memory and arm_blank_check_memory
algorithms to use a breakpoint instruction on v5 arch.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Set up more of the Luminary-specific signals, and stop cloning
a few of the JTAG defaults. More comments too.
Still leaves the "dap info 0" bugs unresolved (presumably coupled
to this particular adapter family) where TPIU, ITM, DWT, and other
debug modules wrongly display as extra NVICs.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This adds a nand driver support for the nuc910 target.
Note that ECC is not currently supported by this driver, although
it is supported by the peripheral.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Provide $defines for more of the signals involved in the
Luminary ICDI hardware, and comment some of what's going on.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
There's no point in an lm3s811-specific target file,
so remove it in favor of the generic "stellaris.cfg".
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use addition for offsetting, not masking. Shorten some lines.
Make "component_start" print-only (unused otherwise; don't save).
Still doesn't resolve the issue where multiple components
are wrongly displaying as NVICs on some Cortex-M3 parts because
many PIDs appear to be zeroes ... maybe adapter related??
Signed-off-by: David Brownell <db@helium.(none)>
waiting for ZY1000 fifo to idle is now queued as
an asynchronous command. This radically improves
performance when waitIdle() is interspersed with
writes as no readback is required over TCP/IP.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Mask the upper bits after 32-bit reads.
Alsoo revert the ugly changes to use PRIx32; just cast to unsized
integers when printing (two chars not eight).
Signed-off-by: David Brownell <db@helium.(none)>
This reverts the incorrect change made to the arm9 cmd group in commit
d1eca9a74c.
The code now matches the docs and the release notes.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* Bugfix and simplify legacy jtag-only defaulting
* Make "dummy" declare its jtag-only nature
* likewise update ft2232
* warn if selection is _required_ (multi-transport adapters),
fixes the "only ft2232 works" bug for at least dummy, with
other drivers going the "legacy" path (submit patches).
Signed-off-by: David Brownell <db@helium.(none)>
String compare against addresses in range 0 or so due
to not checking if there was an active session first.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Classic manifestation of weakness of dangling {
formatting :-) Hard to spot these sort of mistakes visually.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
The gdb server incorrectly reports the memory map if we have
multiple targets with multiple flash banks.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Commit 93f2afa45f dropped the sentinel off the end
of the command_registrants[] array. The loop immediately
following the initialization will walk right off the end.
Signed-off-by: Stacey Sheldon <stac@solidgoldbomb.org>
This adds the guts of a transport framework with initialization,
which should work with current JTAG-only configurations (tested
with FT2232).
Each debug adapter can declare the transports it supports, and
exactly one transport is initialized. (with its commands) in
any given OpenOCD session.
* Define a new "struct transport with init hooks and a few
"transport" subcommands to support it:
"list" ... list the transports configured (just "jtag" for now)
"select" ... makes the debug session use that transport
"init" ... initializes the selected transport (internal)
* "interface_transports" ... declares transports the current interface
can support. (Some will do this from C code instead, when there are
no hardware versioning (or other) issues to prevent it.
Plus some FT2232 tweaks, including a few to streamline upcoming
support for an SWD transport (initially for Luminary adapters).
Eventually src/jtag should probably become src/transport, moving
jtag-specific stuff to transport/jtag.
Signed-off-by: David Brownell <db@helium.(none)>
The code did not transfer the last word in no-ack transfers.
The strange thing is that this did not lead to any
observable errors.
This gaffe was introduced in commit 1f5883ea56
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Review allocation of error numbers in openocd
to avoid overlap.
Put brackets around negative numbers to avoid
issues during macro expansion.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Memory read/writes to virtual memory, requires that the CPU is
halted.
Use 'phys' option to write to memory while target is running.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
when locking the debug access fails on the first try, it's a
bit noisy, so print out message that it succeeded on second try.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Add "static" qualifier to private functions.
Move duplicated global declarations from "target/avrt.c"
and "nor/avrf.c" to "target/avrt.h".
Remove unused declarations form "nor/avrf.c".
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Add "static" qualifier to private functions.
Remove private prototypes from include file.
Remove empty definition of JIM_STATIC.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
This fn is an implementation detail of jtag_execute_queue()
that is not to be exposed externally.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
normal code should not call jtag_get_error(), but rather check
the return code from jtag_execute_queue().
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
When an interactive command fails, the Jim stack trace prints references to
the line in "command.c" where the interpreter was invoked. Since that
location has no relation to the actual command that failed, the information
serves only to add confusion.
By not adding the useless source info to Jim the noise can be reduced,
while still printing a useful trace for nested commands.
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Add "static" qualifier to private functions.
Function Jim_InterpolateTokens() is private, but has not
been changed to "static".
This function is called only once, so compiler inlines it.
After inline, there is a warning for variable uninitialized.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
(error: declaration of ‘stat’ shadows a global declaration; /usr/local/lib/gcc/i686-w64-mingw32/4.4.2/../../../../i686-w64-mingw32/include/sys/stat.h:279: error: shadowed declaration is here)
Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>
(error: declaration of ‘byte’ shadows a global declaration; /usr/local/lib/gcc/i686-w64-mingw32/4.4.2/../../../../i686-w64-mingw32/include/rpcndr.h:50: error: shadowed declaration is here)
Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>
(error: declaration of ‘pHDev’ shadows a global declaration; ../../../../src/jtag/drivers/rlink.c:102: error: shadowed declaration is here)
Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>
in jim.c (error: declaration of ‘boolean’ shadows a global declaration; /usr/local/lib/gcc/i686-w64-mingw32/4.4.2/../../../../i686-w64-mingw32/include/rpcndr.h:52: error: shadowed declaration is here)
Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>
This warning was only reproducable with
Cygwin.
Cygwin now builds without warnings for the basic
case.
Signed-off-by: Oyvind Harboe <oyvind.harboe@zylin.com>
copy & paste error + added FIFO throttling to work around
lockup bug in FPGA.
The arm11 optimisation was introduced post v0.4.0, so this
is not a regression compared to previous release.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Helper ./src/helper/membuf.c is only used in at91sam3.c
1) Replace membuf with LOG_*
2) The original code in sam3_GetDetails() invalidates
all the buffered output of sam3_GetInfo(). The new
code skips sam3_GetInfo() if its output should not
be printed.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
if step/continue fails, then the error should be
reported to the calling fn.
The calling fn decides if the connection has to be
aborted or if packet processing can continue.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
I think this fixed an error message where the error
message would show the *previous* uc code rather than
the current unsupported uc code.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
when the verify failed, it didn't return an error,
which breaks e.g. tcl scripts that rely on this for
exceptions to work.
Found by -Wshadow
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
this batch of fixes should be pretty straightforward
rename of 'index' and an 'i' local variable shadowing.
'index' conflicts with a global name.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Here is a patch to fix a startup in C100 (arm1136). Basically make sure
that UART is configured before using it.
Michal
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
found by code inspection. There are many other places in
CFI where LOG_ERROR() should be called similarly...
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
when a write/unlock/erase failed during write_image, then
an error was not propagated back up so e.g. flash write
image from tcl scripts would not throw an exception.
Also flash filling speed was printed even when the
operation failed. Output is now less confusing.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
failure to write to memory was not propagated.
This is an interesting case of broken error handling:
with exceptions we wouldn't have had this at all,
and I also wonder if there is a GCC option to warn
about these kinds of potential bugs.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Parameter "type" of function armv4_5_mmu_translate_va()
is now not used.
Remove the parameter and the "enum" listing its values.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Function armv4_5_mmu_translate_va() now properly signals
errors in the return value.
Remove former error handling by setting variable "type" to
value "-1".
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Function arm920t_write_memory() default return value
should be ERROR_OK.
All cases of local errors are handled immediately and
not further propagated.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Commit 0538081246
introduces a compile time warning:
arm920t.c: In function ‘arm920t_write_memory’:
arm920t.c:567: warning: ‘retval’ may be used uninitialized in this function
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
any read/write operation to memory can fail.
block write algorithm error propagation was broken
in that it would continue after an error was reported
writing data to ram or the algorithm failing.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
GDB and OpenOCD has two different error number
spaces and no mapping exists between them.
If a specific error number is to be reported
to GDB then this has to be done at the calling
site, rather than as a generic routine that
tries to map "retval" to GDB error number speak.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
JTAG_MOVESTATE is misleading, this cmd is only used
for reset.
JTAG_PATHMOVE should be used otherwise.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Hello,
"stm32x mass_erase" return ERROR_OK even if something goes wrong.
Here is a summary of changes :
* in stm32x_mass_erase : return ERROR_FLASH_OPERATION_FAILED when error
detected in FLASH_SR register;
* in COMMAND_HANDLER(stm32x_handle_mass_erase_command) : return the
returned value of stm32x_mass_erase().
I don't know if there is reason to always return ERROR_OK ?
Gaëtan
ETM analyze produced no output when the trace buffer was empty.
This patch provides users with a clue.
Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
When a flash cmd is called using the flash name the autoprobe
function is not called. autoprobe is called if flash_command_get_bank
falls through to get_flash_bank_by_num.
This makes both get_flash_bank_by_name and get_flash_bank_by_num
behave the same.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
This adds a virtual flash bank driver that allows virtual banks to
be defined that refer to an existing flash bank.
For example the real address for bank0 on the pic32 is 0x1fc00000
but the user program will either be in kseg0 (0xbfc00000) or
kseg1 (0x9fc00000).
This also means that gdb will be aware of all the read only flash
addresses.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Every time command "flash probe #" is executed, memory
structures are re-allocated without preventive free()
of former areas, causing memory leak.
Also, memory allocation does not check return value,
determining segmentation fault in case of out of memory.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
It might be possible to get this target going without
RCLK, but it would require more careful analysis and
usage of the reset events.
Enable fast memory accesses.
Tested on an at91sam9260 custom board w/external DRAM
and flash.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
- As this is a complete unit, including jtag we might as welli nclude
the jtag cfg.
- Add missing id for the str750 that is also in the jtag chain.
- Reduce jtag startup speed to 500kHz.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
We request a id register read at the end of ahbap_debugport_init
but we never actually run the queue. In some cases this causes a
segfault.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
This patch add support of iMX27 nand flash controller. This is based on
driver for imx31 nand flash controller.
OOB functionality is not fully working. As in mx31 controller, mx2 NFC
has a bug that swap two bytes between SPARE and MAIN buffer.
I used this driver for several months and no problems appear.
I was finally able to figure out the cause of this problem. There are two
parts to the patch. The first patch modifies the configuration file I
originally generated for the Atmel AT91SAM9G20 board and achieves the
following:
+++ Splits the reset-init handler into a reset-start handler for some of the
initial configuration activities and keeps the remainder in the reset-init
handler as was the case before. This was the real issue that was causing
the timing problems I identified before. This solution was confirmed with
an o-scope on actual target hardware.
+++ Adds a new instruction in the reset-start handler to disable fast memory
accesses in the reset-start handler. When the target jtag clock is started
out at 2 kHz during system clock initialization, memory writes (i.e.
register write to enable external reset pin -- basically to RSTC_MR) are
naturally slow and cause GDB keep-alive issues (refer to PATCH 2/2 for
additional fixes).
+++ Modifies the configuration file to use srst_only reset action. The
reset-start/reset-init handler split also now allows the correct behavior to
be used in the configuration file (previously had to use both SRST and TRST
even though only SRST is actually used and connected on the evaluation
board).
+++ Adds external NandFlash configuration support to take advantage of flash
driver added earlier. Doesn't fix any bugs but adds functionality that was
marked as TBD before and thrown in when I did other work on the
configuration file.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
This second half of the patch is proposed to clean up some GDB keep alive
issues on arm7_9 targets that start up with very slow clocks. If an attempt
is made to write to key registers on the processor with a slow jtag speed,
GDB timeout warnings appear on the console (at least mine) when "reset halt"
or "reset init" commands are issued from the gdb client:
*** BEFORE PATCH ***
(gdb) monitor reset init
fast memory access is disabled
2 kHz
keep_alive() was not invoked in the 1000ms timelimit. GDB alive packet not
sent! (1026). Workaround: increase "set remotetimeout" in GDB
JTAG tap: at91sam9g20.cpu tap/device found: 0x0792603f (mfg: 0x01f, part:
0x7926, ver: 0x0)
target state: halted
target halted in ARM state due to breakpoint, current mode: Supervisor
cpsr: 0x000000d3 pc: 0x00000000
MMU: disabled, D-Cache: disabled, I-Cache: disabled
keep_alive() was not invoked in the 1000ms timelimit. GDB alive packet not
sent! (1027). Workaround: increase "set remotetimeout" in GDB
keep_alive() was not invoked in the 1000ms timelimit. GDB alive packet not
sent! (1006). Workaround: increase "set remotetimeout" in GDB
keep_alive() was not invoked in the 1000ms timelimit. GDB alive packet not
sent! (1006). Workaround: increase "set remotetimeout" in GDB
keep_alive() was not invoked in the 1000ms timelimit. GDB alive packet not
sent! (1006). Workaround: increase "set remotetimeout" in GDB
keep_alive() was not invoked in the 1000ms timelimit. GDB alive packet not
sent! (1004). Workaround: increase "set remotetimeout" in GDB
RCLK - adaptive
dcc downloads are enabled
fast memory access is enabled
NAND flash device 'NAND 256MiB 3,3V 8-bit' found
(gdb)
I added additional keep alive steps in areas that troubleshooting revealed
were causing problems. I only did this however for non-fast write memory
accesses. I don't think most people would be using fast memory accesses to
write to memory when the jtag and system clocks are slow anyway.
If you disagree with my feeling, think there is a more elegant way to handle
the problem, or think the patch will cause other unforeseen problems with
other targets, let me know. As you can see below, the patch does eliminate
the problem on my development station and I suspect that it will benefit
others.
*** AFTER PATCH ***
(gdb) monitor reset init
fast memory access is disabled
2 kHz
JTAG tap: at91sam9g20.cpu tap/device found: 0x0792603f (mfg: 0x01f, part:
0x7926, ver: 0x0)
target state: halted
target halted in ARM state due to breakpoint, current mode: Supervisor
cpsr: 0x000000d3 pc: 0x00000000
MMU: disabled, D-Cache: disabled, I-Cache: disabled
RCLK - adaptive
dcc downloads are enabled
fast memory access is enabled
NAND flash device 'NAND 256MiB 3,3V 8-bit' found
(gdb)
Gary Carlson
Gary Carlson, MSEE
Principal Engineer
Carlson-Minot Inc.
tcl "puts" didn't work because the logging code sensored strings
that did not include a '\n'. The correct thing is to sensor
empty strings, which are used to keep gdb connection alive.
The tcl "puts" code broke apart strings which do contain '\n' in
order to implement the -nonewline argument, which is how it
got hurt by the bug in log.c
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Page reads using hwecc4_infix layout segfaulted for check_bad_blocks because
the read assumed a valid data buffer, which check_bad_blocks does not use
(it only passes a 6 byte buffer for the start of OOB).
This version copes with undersized or missing data or oob buffers and uses
random read commands within the page to skip unwanted areas of data/OOB for
speed.
NOTE: Running check_bad_blocks with this layout will be reading infix
OOB locations, not manufacturer bad block markers. This means that if you
check blocks written in infix layout they will appear good, but manufacturer-
marked bad blocks may also appear good.
If you want to scan for manufactuer-marked bad blocks, you need to enable
raw_access before running check_bad_blocks, or use the non-infix layout.
Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk>
CC: David Brownell <dbrownell@users.sourceforge.net>
nand_build_bbt() was ignoring the return value from nand_read_page() and
blindly continuing.
It now passes the return value up to the caller if the read fails.
Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk>
The gdb_memory_map cmd for example fell through and returned
ERROR_COMMAND_SYNTAX_ERROR on success - behaviour is now as expected.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Remove few LOG_DEBUG() messages, together with code and
variables required to build such messages.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Final step to force bus_width size during CFI flash
read.
Added CFI specific implementation cfi_read() that uses
only accesses at bus_width size.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Final target is to force bus_width size during CFI flash
read.
In this first step I need to replace default flash read
with flash specific implementation.
This patch introduces:
- flash_driver_read() layer;
- default_flash_read(), backward compatible;
- read() callback in struct flash_driver;
- proper initialization in every flash_driver instance.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
During cfi_write(), head and tail of destination area
could be not aligned to bus_width.
Since write operation must be at bus_width size, source
buffer size is extended and buffer padded with current
values read from flash.
Force using bus_width to read current value from flash.
Do not use cfi_add_byte() anymore, to allow removing this
function later on.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
NOR flash structure requires each access to be bus_width wide.
Fix read of flash ID accordingly to rule above.
Add case (chip_width == 4), allowed by CFI spec and coherent
with current value of CFI_MAX_CHIP_WIDTH but currently not
used by any target.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Since NOR flash devices does not handle "byte enable lanes",
each read/write access involves the whole "chip_width".
When multiple devices are in parallel, usually all chips are
enabled during each access.
All such cases are compatible with flash accesses at
"bus_width" size.
Access at "bus_width" size is mandatory for write access to
avoid transferring of garbage values to flash.
During read access the flash controller should take care,
and discard unneeded bytes. Anyway, it is good practice to
use "bus_width" size also for read.
Every memory access that does not respect "bus_width" size
is marked with a "FIXME" comment.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Review and simplify computation of bufferwsize.
Add comments about variables' meaning.
The same code is present 3 times in the file.
Current patch updates all the 3 instances.
Step 1)
Replace "switch(bank->chip_width) {...}".
Illegal values of bank->chip_width are already dropped.
For legal values, the code is equivalent to:
bufferwsize = buffersize / bank->chip_width;
Step 2)
The above code replacement plus the following line:
bufferwsize /= (bank->bus_width / bank->chip_width);
is merged in a single formula:
bufferwsize = (buffersize / bank->chip_width) /
(bank->bus_width / bank->chip_width);
and simplified as:
bufferwsize = buffersize / bank->bus_width;
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Arguments chip_width and bus_width of command "flash bank" are
not fully checked.
While bus_width is later on redundantly checked in several other
parts (e.g. in cfi_command_val()) and generates run-time error,
chip_width is never checked, nor related to actual bus_width
value.
Added check to avoid:
- (chip_width == 0), that would mean no memory chip at all,
avoiding also division by zero e.g. in cfi_get_u8();
- (bus_width == 0), that would mean no bus at all;
- unsupported cases of chip_width or bus_width value not power
of 2;
- unsupported case of chip width wider than bus.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
1. fix some errors in jtag.txt(in my personal opinion, please review).
2. remove a broken link
Signed-off-by: Jun Ma <sync.jma@gmail.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
reproducable when "./configure --enable-maintainer-mode CFLAGS=-D_DEBUG_GDB_IO_"
Signed-off-by: Jun Ma <sync.jma@gmail.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Last block was being skipped, fix by changing the loop test from "<" to "<="
First block argument was ignored, always started from block 0 (and counted
the wrong blocks as bad if first was nonzero). Now we use it.
Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
The last_block argument to nand_erase() is checked against nand->num_blocks,
but the highest valid block number is (total - 1), the test for invalid should
be ">=" rather than ">".
Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
flash cmds can now be passed either the bank name or the bank number.
For example.
flash info stm32.flash
flash info 0
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
gdb-attach does a reset init to make sure that the CFI probe
will succeed upon first gdb connect.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Hi,
This is my first post to the list. First, I would like to thank
everyone for their work on OpenOCD, it is a great tool to work with. I
have been using it to debug code on hardware for the Rockbox project
(www.rockbox.org).
The target that I primarily work with has a Spansion/Fujitsu NOR flash
(MBM29SL800TE). I attached a patch that adds support for this flash. I
hope it can be included in the main repository. If there is something
that needs to be changed with the patch before inclusion please let me
know.
-Karl Kurbjun
The ST/Numonix M29W128G has an issue when a 0xff cmd is sent,
it cause an internal undefined state. The workaround according
to the Numonyx is to send another 0xf0 reset cmd
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Increase working area for stm3210e_eval.cfg.
Add new configs for the following boards:
STM321000B-EVAL, STM32100C-EVAL, STM32100B-EVAL
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
c->sin.sin_port does not contain a valid port number so just use
service->port as this is always correct.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
There are a million reasons why cached protection state might
be stale: power cycling of target, reset, code executing on
the target, etc.
The "flash protect_check" command is now gone. This is *always*
executed when running a "flash info".
As a bonus for more a more robust approach, lots of code could
be deleted.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
This stops GDB from launching with an empty memory map,
making gdb load w/flashing fail for no obvious reason.
The error message points in the direction of the gdb-attach
event that can be set up to issue a halt or "reset init"
which will put GDB in a well defined stated upon attach
and thus have a robust flash autoprobe.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
No segmentationfault when sending commands to tcl-server.
modified: src/server/server.c
modified: src/server/tcl_server.c
modified: src/server/tcl_server.h
Various commands, e.g. "arm mcr xxxx" would fail if invoked upon startup
since it there was no command context defined for the jim interpreter
in that case.
A Jim interpreter is now associated with a command context(telnet,
gdb server's) or the default global command context.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Remove/fix lots of bugs in handling of non-contigious sections
and out of order sections.
Fix a gaffe introduced in previous commit to src/flash/nor/core.c
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Remove bogus error messages when trying to allocate a
large chunk of target memory and then falling back to
a smaller one.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
target memory allocation can be implemented not to show
bogus error messages.
E.g. when trying a big allocation first and then a
smaller one if that fails.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
make wait for srst deassert more long latency friendly
(JTAG over TCP/IP), print actual time if it was more than
1ms.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
The current timeout for STM32 flash block erase and flash mass erase is
10 (ms), which is too tight, and fails around 50% of the time for me.
The data sheet for STM32F107VC specifies a maximum erase time of 40 ms
(for both operations).
I'd also consider it a bug that the code does not detect a timeout, but
just assumes that the operation has completed. The attached patch does
not address this bug.
The attached patch increases the timeouts from 10 to 100 ms. Please apply.
/Tobias
The ecosflash driver is no longer used by any of the config
scripts. It is more useful to get more testing of CFI.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Fix a bug where write_image would fail if the sections
in the image were not in ascending order. This has previously
been fixed in gdb load.
Solved by sorting the image sections before running flash
write_image erase unlock foo.elf.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
this is done for unlocking and it is a simple omission that
it wasn't done for sectors.
The unnerving thing is that nobody has complained about this
until now....
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
This patch adds definition file for the Voipac VPACLink JTAG adaptor. The
adaptor is combined JTAG/UART device.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
This patch adds support for the length argument to the xscale implementation of
the wp command. Per discussion with David, the length argument specifies the
range of addresses over which a memory access should generate a debug exception.
This patch utilizes the "mask" feature of the xscale debug hardware to implement
the correct functionality of the length argument. Some limitations imposed by
the hardware are:
- The length must be a power of two, with a minumum of 4.
- Two data breakpoint registers are available, allowing for two watchpoints.
However, if the length of a watchpoint is greater than four, both registers
are used (the second for a mask value), limiting the number of watchpoints
to one.
This patch also removes a useless call to xscale_get_reg(dbcon) in
xscale_set_watchpoint() (value had already been read from the register cache,
and the same previously read value is then modified and written back).
I have been using and testing this patch for a couple days.
Questions, corrections, criticisms of course gratefully received.
Flash probing must succeed for e.g. gdb load and automatic
hardware/software breakpoints to work.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
If the flash has not yet been probed and GDB connects while the target is
running, the flash probe triggered by GDB's memory map read will fail. In
that case the returned memory map will be empty, causing a subsequent load
from within GDB to fail. There's not much you can do from GDB to recover,
other than a restart; a 'mon reset init' and manual 'mon flash probe' won't
help since GDB has already made up its mind about the memory map.
It seems there's no reason to require the target to be halted when probing
the flash. Remove the check to let a valid memory map be provided to GDB
even when connecting to a running target.
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The The patch labeled "CFI CORE: bug-fix protect single sector" was merged
rged without some requested bugfixes. Most significantly it broke invariants
in the code, invalidating descriptions and changing the calling convention
for underlying drivers. (It (Also wasn't CFI-specific...)
Fix that, and Include an update from Antonio Borneo for the degenerate
"nothing to do" case, (although that's still in the wrong location. which
is presumably why that is it was working in some cases but not all.)
src/flash/nor/core.c | 21 ++++++++++++++++-----
1 file changed, 16 insertions(+), 5 deletions(-)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Arguments for "flash bank" command are already
parsed and put in "bank" struct.
Removed code to parse them again.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Syntax of "flash bank" command requires:
- chip_width as CMD_ARGV[3]
- bus_width as CMD_ARGV[4]
Actual code swaps the arguments.
Bug has no run time impact since wrong variables
are only used to check value and both are checked
against same constraint.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
This patch fixes the xscale_analyze_trace() function. This function was
defective for a trace collected in 'fill' mode (hiccups with repeated
instructions) and completely broken when buffer overflowed in 'wrap' mode. The
reason for the latter case is that the checkpoint registers were interpreted
incorrectly when two checkpoints are present in the trace (which will be true in
'wrap' mode once the buffer fills). In this case, checkpoint1 register will
contain the older entry, and checkpoint0 the newer. The original code assumed
the opposite. I eventually gave up trying to understand all the logic of the
function, and rewrote it. I think it's much cleaner and understandable now. I
have been using and testing this for a few weeks now. I'm confident it hasn't
regressed in any way.
Also added capability to handle (as best as possible) the case where an
instruction can not be read from the loaded trace image; e.g., partial image.
This was a 'TODO' comment in the original xscale_analyze_trace().
Outside of xcsale_analyze_trace(), these (related) changes were made:
- Remove pc_ok and current_pc elements from struct xscale_trace. These elements
and associated logic are useless clutter because the very first entry placed
in the trace buffer is always an indirect jump to the address at which
execution resumed. This type of trace entry includes the literal address in
the trace buffer, so the initial address of the trace is immediately
determined from the trace buffer contents and does not need to be recorded
when trace is enabled.
- Added num_checkpoints to struct xscale_trace_data, which is necessary in order
to correctly interpret the checkpoint register contents.
- In xscale_read_trace()
- Fix potential array out-of-bounds condition.
- Eliminate partial address entries when parsing trace (can occur in wrap mode).
- Count and record number of checkpoints in trace.
- Added small, inlined utility function xscale_display_instruction() to help
make the code more concise and clear.
TODO:
- Save processor state (arm or thumb) in struct xscale_trace when trace is
enabled so that trace can be analyzed correctly (currently assumes arm mode).
- Add element to struct xscale_trace that records (when trace is enabled)
whether vector table is relocated high (to 0xffff0000) or not, so that a
branch to an exception vector is traced correctly (curently assumes vectors
at 0x0).
Some tcl script has underline between the words "flash bank"
resulting in 'invalid command name "flash_bank"'.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
+ virt2phys() can now convert virtual address to real
+ read_memory() and write_memory() are renamed to read_phys_memory()
and write_phys_memory()
+ new read_memory() and write_memory() try to resolve real address if
mmu is enambled than perform real address reading/writing
+ if address is bellow 0xc000000 than TTB0 is used for page table
dereference, if above - than TTB1. Linux style of user/kernel address
separation
+ if above fails (i.e address is unspecified) than mode is checked
whether it is Supervisor (than TTB1) or User (than TTB0)
- Software breakpoints doesn't work. You should invoke
"gdb_breakpoint_override hard" before you start debugging
+ cortex_a8_mmu(), cortex_a8_enable_mmu_caches(),
cortex_a8_disable_mmu_caches() are implemented
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
I'm not sure what caused this significant character to get deleted.
it may be related to intermittent Editor or terminal flakes I've
been seeing lately (sigh). This fix is trivial.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Fixing one bug can easily uncover another .... in this case,
making sure that we properly invalidate some cached NOR state when
resuming arbitrary target code turned up an issue when the code
wasn't quite arbitrary (and we couldn't know that, but some parts
of OpenOCD assumed the cache would not be invalidated.
Specifically: some flash drivers (like CFI) update that state in loops
with downloaded algorithms, thus invalidating the state as it's probed.
+ Add a new target state flag, to record whether the target is
running downloaded algorithm code.
+ Use that flag to add a special case: "trust" downloaded algorithms
not to corrupt that cached state, bypassing cache invalidation.
Also update some of the documentation to stipulate that this flavor of
trustworthiness is now *required* ... not just a fortuitous acident.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
For some reason there are *two* schemes for interposing logic into
the run_algorithm() code path... One is a standard procedural wapper
around the target method invocation.
the other (superfluous) one hacked the method table by splicing
a second procedural wrapper into the method table. Remove it:
* Rename its slightly-more-featureful wrapper so it becomes
the standard procedural wrapper, leaving its added logic
(where it should have been in the first place.
Also add a paranoia check, to report targets that don't
support algorithms without traversing a NULL pointer, and
tweak its code structure a bit so it's easier to modify.
* Get rid of the superfluous/conusing method table hacks.
This is a net simplification, making it simpler to analyse what's
going on, and then interpose logic . ... by ensuring there's only one
natural place for it to live.
------------
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Without this, a system using gcc (GCC) 4.2.4 (Ubuntu 4.2.4-1ubuntu4)
aborts builds after reporting:
tcl.c: In function ‘handle_irscan_command’:
tcl.c:1168: warning: passing argument 1 of ‘buf_set_u32’ discards qualifiers from pointer target type
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Problem: halt at a breakpoint, enable trace buffer ('xscale trace_buffer enable
fill'), then resume. Wait for debug exception when trace buffer fills (if not
sooner due to another breakpoint, vector catch, etc). Instead, never halts.
When halted explicitly from OpenOCD and trace buffer dumped, it contains only
one entry; a branch to the address of the original breakpoint. If the above
steps are repeated, except that the breakpoint is removed before resuming, the
trace buffer fills and the debug exception is generated, as expected.
Cause: related to how a breakpoint is stepped over on resume. The breakpoint is
temporarily removed, and a hardware breakpoint is set on the next instruction
that will execute. xscale_debug_entry() is called when that breakpoint hits.
This function checks if the trace buffer is enabled, and if so reads the trace
buffer from the target and then disables the trace (unless multiple trace
buffers are specified by the user when trace is enabled). Thus you only trace
one instruction before it is disabled.
Solution: kind of a hack on top of a hack, but it's simple. Anything better
would involve some refactoring. This has been tested and trace now works as
intended, except that the very first instruction is not part of the trace when
resuming from a breakpoint.
TODO: still many issues with trace: doesn't work during single-stepping (trace
buffer is flushed each step), 'xscale analyze_trace' works only marginally for
a trace captured in 'fill' mode, and not at all for a trace captured in 'wrap'
mode.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Clean up the jtag/tcl.c file, which was one of the biggest and
messiest ones in that directory. Do it by splitting out all the
generic adapter commands to a separate "adapter.c" file (leaving
the "tcl.c" file holding only JTAG utilities).
Also rename the little-used "jtag interface" to "adapter_name", which
should have been at least re-categorized earlier (it's not jtag-only).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The command "flash bank" has updated syntax.
Add the mandatory parameter <target> to the usage message
that prints in case of error.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
While "flash bank" syntax has been changed long ago,
several tcl script are still not fully update.
Fix following cases related with "cfi" driver:
- syntax error: the mandatory <name> parameter is missing
- warning: the <target> parameter is a number, instead of
the target name
- the comment line above the command does not report
actual syntax
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
first cut peek/poke over tcp/ip, used for debug/research
purposes only. Long term JTAG over TCP/IP might be an
offshoot. The performance is usable for development/testing
purposes.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
I don't know when "poll off" broke, but "poll off" didn't
stop background polling of target. The polling status flag
simply wasn't checked in the handle_target timer callback.
All target polling(including power/reset state) is now stopped
upon "poll off".
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
For testing and checking the build this can be useful,
it doesn't have any practical application outside development.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
The init cleanup patch overlooked a message which was
wrongly specific to the "usbjtag" layout. Fix.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This patch fixes xscale software breakpoints by cleaning the dcache and
invalidating the icache after the bkpt instruction is inserted or removed. The
icache operation is necessary in order to flush the fetch buffers, even if the
icache is disabled (see section 4.2.7 of the xscale core developer's manual).
The dcache is presumed to be enabled; no harm done if not. The dcache is also
invalidated after cleaning in order to safeguard against a future load of
invalid data, in the event that cache_clean_address points to memory that is
valid and in use.
Also corrected a confusing typo I noticed in a comment.
TODO (or not TODO...?): the xscale's 2K "mini dcache" is not cleaned. This
cache is not used unless the 'X' bit in the page table entry is set. This is a
proprietary xscale extension to the ARM architecture. If a target's OS or
executive makes use of this for memory regions holding code, the breakpoint
problem will persist. Flushing the mini dcache requires that 2K of valid
cacheable memory (mapped with 'X' bit set) be designated by the user for this
purpose. The debug handler that gets downloaded to the target will also need to
be extended.
In the ft2232 driver, initialization for many layouts punts to a routine
called usbjtag_init(), instead of a routine specific to each layout.
That routine is a mess built around a "what type layout am I" core.
That's a bad design ... in this case, especially so, since it bypasses
the layout-specific dispatch which was just done, and obfuscates the
initialization which is at least somewhat generic, instead of being
specific to the "usbjtag" layout.
Split and document out the generic parts of usbjtag_init(), and make
the rest of those layouts have layout-specific init methods. Also,
rename usbjtag_reset() ... that also was not specific to the "usbjtag"
layout, and thus contributed to the previous code structure confusion.
(Eventually, all layout-specific code (and method tables) should probably
live in files specific to each layout. These changes will facilitate
those and other cleanups to this driver.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
the handling of caches, should be moved into the breakpoint
specific callbacks rather than being plonked into generic
memory write fn's.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Note that the FT4232 chips have four channels not two, and
Elaborate on uses of the additional channels.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The implementation is now more straightforward as the
scan_fields have been greatly simplified over time.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
By a bit of code inspection it seems like all of these
instances of jtag_get_end_state() can be unambigously
replaced by constants.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Fix problem with the xscale icache and dcache commands. Both commands were
enabling or disabling the mmu, not the caches
I didn't look any further after my earlier patch fixed the trivial problem
with command argument parsing. Turns out the underlying code was broken.
The resolution is straightforward when you look at the arguments to
xscale_enable_mmu_caches() and xscale_disable_mmu_caches(). I finally
took a deeper look after dumping the cp15 control register (XSCALE_CTRL)
and seeing that the cache bits weren't changing, but the mmu bit was
(which caused all manner of grief, as you can imagine). This has been
tested and works OK now.
src/target/xscale.c | 17 +++++++++++------
1 files changed, 11 insertions(+), 6 deletions(-)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
So don't use the name "swjdp" for all DAPs; rename to
plain old "dap", which *is* always correct.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Not sure how the original "move code to adi_v5_swd.c" patch left
some code in the "arm_adi_v5.c" file, but a recent patch was only
a partial fix -- it didn't remove all the duplication.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
jtag_get/set_end_state() is now deprecated.
There were lots of places in the code where the end state was
unintentionally modified.
The big Q is whether there were any places where the intention
was to modify the end state. 0.5 is a long way off, so we'll
get a fair amount of testing.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
A fn was copied instead of moved to a new file. The linker
can discard exact copies of fn's without warning.
This is a C++'ism.
However on my Ubuntu 9.10 machine, it fails.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
The PIC32MX does not support the ejtag software reset - it is
optional in the ejtag spec.
We perform the equivalent using the microchip specific MTAP cmd's.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
The mips_m4k_assert_reset has now been restructured
so the variant ejtag_srst is not required anymore.
The ejtag software reset will be used if the target does not
have srst connected.
Remove ejtag_srst from docs.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
by ack'ing memory writes immediately and reporting either
at next memory write or stepi/continue time. GDB will then
send off a new packet that is ready by the time the previous
packet has been written to target memory.
On faster adapters this can be as much as 10% improvement.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Unused. If something should happen after context restore, then the
calling code can just do it afterwards.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Unclutter arm_adi_v5.c by moving most transport-specific code
to a transport-specific files adi_v5_{jtag,swd}.c ... it's not
a full cleanup, because of some issues which need to be addressed
as part of SWD support (along with implementing the DAP operations
on top of SWD transport):
- The mess where mem_ap_read_buf_u32() is currently coded to
know about JTAG scan chains, and thus needs rewriting before
it will work with SWD;
- Initialization is still JTAG-specific
Also move JTAG_{DP,ACK}_* constants from adi_v5.h to the JTAG
file; no other code should care about those values.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add PARPORTADDR tcl variable making it easier to
change parallel port address in scripts.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Until this time only basic SLC functionality exists when you want to use SLC to access external nand flash.
Basic functionality can be selected with command:
lpc3180 select 0 slc
It is anyway very slow to write/read to/from nand flash.
With the new command, SLC speed improved about 20 times, and hardware ECC info also read/written from/to nand flash OOB area:
lpc3180 select 0 slc bulk
Speed improvement achieved by using working are in SRAM of the LPC3250 chip and controlling DMA controller to interact between SRAM and SLC peripheral.
Here are the patches, and if they are ok than take them.
Tested with hitex LPC3250 usb stick.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Fixes bug that prevented users from specifying a base address of
0x80000000 or higher in image commands (flash write_image, etm image,
xscale trace_image).
image.base_address is an offset from the start address contained in
the image file (if there is one), or from 0 (for binary files). As a
signed 32-bit int, it couldn't be greater than 0x7fffffff, which is a
problem when trying to write a binary file to flash above that
address. Changing it to a 64-bit long long keeps it as a signed
offset, but allows it to cover the entire 32-bit address space.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
The SRST configuration options are not specific to JTAG, so this
command may be needed with non-JTAG debug sessions. Just move
the command to a different group.
(The TRST options are, however, clearly JTAG-specific, but for
compatibility, they're now left alone. The flags they control
could later be disabled in non-JTAG sessions.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Globally rename "jtag_nsrst_assert_width" as "adapter_nsrst_assert_width",
and move it out of the "jtag" command group ... it needs to be used with
non-JTAG transports
Includes a migration aid (in jtag/startup.tcl) so that old user scripts
won't break. That aid should Sunset in about a year.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Globally rename "jtag_nsrst_delay" as "adapter_nsrst_delay", and move it
out of the "jtag" command group ... it needs to be used with non-JTAG
transports
Includes a migration aid (in jtag/startup.tcl) so that old user scripts
won't break. That aid should Sunset in about a year.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Globally rename "jtag_khz" as "adapter_khz", and move it out of the "jtag"
command group ... it needs to be used with non-JTAG transports
Includes a migration aid (in jtag/startup.tcl) so that old user scripts
won't break. That aid should Sunset in about a year. (We may want to
update it to include a nag message too.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The default config script will now dynamically setup the BMX registers
in the reset init script.
This will also work if the user overrides the default working area.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
These routines apply to non-JTAG debug adapters too. To
reduce confusion, give them better (non-misleading) names.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Streamline use of the layout: have the "ft2232_layout" command
look it up and save the result, instead of having a few different
chunks of code looking it up later, and saving just its name (which
is already part of the layout). This
- is cleaner
- reports errors sooner
- facilitates earlier adapter-specific setup
- removes unused "default to "usbjtag" logic
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Simple patch that fixes the broken xscale icache and dcache commands.
This broke when the helper functions and macros were changed.
[ dbrownell@users.sourceforge.net: don't use strcasecmp ]
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Remove undesirable
- backslashes at end-of-line;
- initializations of BSS data to zero/NULL;
- overlong lines (80+ characters)
- whitespace issues
- brackets around single-line statements
And other minor issues reported by the Linux "checkpatch" utility
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This patch greatly simplifies the Versaloon driver:
- reducing the code size from more than 50K to less than 28K
- adding support for IR/DR scan with unlimited size
- using tap_get_tms_path and tap_get_tms_path_len.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This includes a driver and matching config file. This support needs to be
enabled through the initial "configure" (use "--enable-buspirate").
Signed-off-by: Michal Demin <michaldemin@gmail.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
We'll need to be able to work with debug adapter interfaces (drivers)
even when they're not used for JTAG ... for example, while there are
multi-transport drivers which support JTAG *and* several other
transports (or just one more, like SWD) there are also adapters
with more limited goals (and no JTAG support at all).
Start decoupling the two concepts ("debug adapter driver", "jtag")
by having two command groups, which initialize separately.
This will help us support OpenOCD sessions using only non-JTAG
transports, in which JTAG commands should not be registered.
Update docs to mention that the JTAG, SVF, and XSVF commands
won't work without a JTAG transport.
Note that at least commands working with SRST are still inappropriately
coupled to JTAG ... inappropriate because (a) SRST is not part of the
JTAG standard, for all that many platforms (like ARM) expect it; and also
(b) because they're used with non-JTAG debug and programming interfaces,
too. They should perhaps become generic "interface" operations at some
point. (Similarly with the clock rate to be used by a given adapter.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add flash algorithm support for the PIC32MX.
Still a few things todo but this dramatically decreases
the programing time, eg. approx programming for 2.5k test file.
- without fastload: 60secs
- with fastload: 45secs
- with fastload and algorithm: 2secs.
Add new devices to supported list.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Cannot protect or unprotect single sector in cfi flash.
When first==last the procedure fails.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
The table of command registration functions shouldn't be
in writable memory, where stray pointers can clobber it.
Also, it shouldn't be initialized at runtime; that just
consumes needless code space.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
At the end I have added comments /* FIXME: to be removed */
There are 3 lines in which my simplification is not complete due to
data dependency with LOG_DEBUG() messages visible in the patch.
Such log_debug has been introduced on Jan 22, 2007 with commit
4fc97d3f27 during development activity
in this file/procedure.
From my point of view, these logs can be removed, since not part of a
consistent flow of information.
Alternatively, could be borrowed in the new cfi_send_command(), but
this will increase verbosity.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
How many bits to shift out before/after enabled tap not
in bypass is calculated outside the loop. This is more of
a demonstration of principle and to clarify code than
a performance optimisation as such. Follows up a bit
on the simplification work in jtag interface.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
In the code a single field was all that was ever used. Makes
jtag_add_ir_scan() simpler and leaves more complicated stuff
to jtag_add_plain_ir_scan().
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
jtag_add_dr/ir_scan() now takes the tap as the first
argument, rather than for each of the fields passed
in.
The code never exercised the path where there was
more than one tap being scanned, who knows if it even
worked.
This simplifies the implementation and reduces clutter
in the calling code.
use jtag_add_ir/dr_plain_scan() for more fancy situations.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
JEDEC standard reports Vpp integer part encoded as 4 bit HEX value.
To print it using decimal digits, %u is required.
Other voltage values are coded as BCD, so %x is appropriate.
Code already prints one nibble at a time, so no need for field width
and precision in format string.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Talk more about "debug adapters" instead of only "dongles". Not all
adapters are discrete widgets; some are integrated onto boards. If
we only talk about "dongles" we rule out many valid setups, and help
confuse some users (who may be using Dongle-free environments).
Also start bringing out the point that JTAG isn't the only transport
protocol, even though OpenOCD historically presumes "all is JTAG".
(Not all debug adapters are JTAG adapters, or JTAG-only adapters.)
Plus a few minor fixes (spelling etc) in the vicinity of those changes,
and updates about FT2232H clocking issues (they can go faster than the
older chips, and can support adaptive clocking).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The FT2232H really wants libftdi 0.17 or newer; some notable
bugs got fixed in that version.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Get rid of needless and undesirable code duplication for
all the DAP commands (resolving a FIXME) ... there's no
need for coreas to have private copies of that stuff.
Stick a pointer to the DAP in "struct arm", letting common
code get to it.
Also rename the "swjdp_info" symbol; just call it "dap".
This is an overall code shrink.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This partially corrects an inappropriate name choice (and its
associated FIXME).
There are still too many variables named "swjdp", bug little
current code actually relies on them referencing an SWJ-DP instead
of some other flavor of DAP. Only the two new dap_to{swd,jtag}()
calls could behave differently on an SWJ-DP instead of a SW-DP or
a JTAG-DP.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
When the beginning or end of the specified range of sectors
already has the requested protection status, don't ask the
flash driver to change those sectors.
This will among other things turn command sequences like
this into the NOPs one would expect:
flash protect_check 0
flash info 0
... reports everything as unprotected ...
flash protect 0 0 1 off
That speeds things up (by whatever work was just avoided).
Also, with Stellaris (which can't unprotect flash at page level)
this can eliminate some undesirable/false error reports. (And
finishes fixing a bug currently listed in our bug database...)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The NOR infrastructure caches some per-sector state, but
it's not used much ... because the cache is not trustworthy.
This patch addresses one part of that problem, by ensuring
that state cached by NOR drivers gets invalidated once we
resume the target -- since targets may then modify sectors.
Now if we see sector protection or erase status marked as
anything other than "unknown", we should be able to rely
on that as being accurate. (That is ... if we assume the
drivers initialize and update this state correctly.)
Another part of that problem is that the cached state isn't
much used (being unreliable, it would have been unsafe).
Those issues can be addressed in later patches.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Give a more accurate failure message when trying to unprotect; don't
complain about pages being write protected, just say that unprotect is
not supported by the hardware ... referencing the new "recover" command,
which is the way to achieve that.
Likewise, when trying to protect, talk about "pages" (matching hardware
doc) not "sectors" (an concept that's alien to these chips).
Also make the helptext for the "recover" command mention that it
also erases the device.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make ADIv5 internals use the two new transport-neutral calls for reading
and writing DP registers; and do the same for external callers. Also,
bugfix some of their call sites to handle the fault returns, instead of
ignoring them.
Remove most of the JTAG-specific calls, using their code as the bodies
of the JTAG-specific implementation for the new methods.
NOTE that there's a remaining issue: mem_ap_read_buf_u32() makes calls
which are JTAG-specific. A later patch will need to remove those, so
JTAG-specific operations can be removed from this file, and so that SWD
support will be able to properly drop in as just a transport layer to the
ADIv5 infrastructure. (The way read results are posted may need some more
attention in the transport-neutrality interface.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make ADIv5 internals use the two new transport-neutral calls for reading
and writing DP registers. Also, bugfix some of their call sites to
handle the fault returns, instead of ignoring them.
Remove the old JTAG-specific calls, using their code as the bodies
of the JTAG-specific implementation for the new methods.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make ADIv5 use one of the new transport-neutral interfaces: call
dap_run(), not jtagdp_transaction_endcheck().
Also, make that old interface private; and bugfix some of its call
sites to handle the fault returns, instead of ignoring them.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
To support both JTAG and SWD, ADIv5 needs DAP operations which are
transport-neutral, instead being of JTAG-specific. This patch:
- Defines such a transport-neutral interface, abstracting access
to DP and AP registers through a conceptual queue of operations.
- Builds the first implementation of such a transport with the existing
JTAG-specific code.
In contrast to the current JTAG-only interface, the interface adds
support for two previously-missing (and unused) DAP operations:
- aborting the current AP transaction (untested);
- reading the IDCODE register (tested) ... required for SWD init.
The choice of transports may be fixed at the chip, board, or JTAG/SWD
adapter level. Or if all the relevant hardware supports both transport
options, the choice may be made at runtime, This patch provides basic
infrastructure to support whichever choice is made.
The current "JTAG-only" transport choice policy will necessarily continue
for now, until SWD support becomes available in OpenOCD. Later patches
start phasing out JTAG-specific calls in favor of transport-neutral calls.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add doxygen for target_resume() ... referencing the still-unresolved
confusion about what the "debug_execution" parameter means (not all
CPU support code acts the same).
The 'handle_breakpoints" param seems to have resolved the main issue
with its semantics, but it wasn't part of the function spec before.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Fix some issues with the generic LPC1768 config file:
- Handle the post-reset clock config: 4 MHz internal RC, no PLL.
This affects flash and JTAG clocking.
- Remove JTAG adapter config; they don't all support trst_and_srst
- Remove the rest of the bogus "reset-init" event handler.
- Allow explicit CCLK configuration, instead of assuming 12 MHz;
some boards will use 100 Mhz (or the post-reset 4 MHz).
- Simplify: rely on defaults for endianness and IR-Capture value
- Update some comments too
Build on those fixes to make a trivial config for the IAR LPC1768
kickstart board (by Olimex) start working.
Also, add doxygen to the lpc2000 flash driver, primarily to note a
configuration problem with driver: it wrongly assumes the core clock
rate never changes. Configs that are safe for updating flash after
"reset halt" will thus often be unsafe later ... e.g. for LPC1768,
after switching to use PLL0 at 100 MHz.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Correct a mistake made copying the ID of the Cortex-M3 ETM module
from the TRM, so that "dap info" on a CM3 with an ETM will now
correctly describe ROM table entries for such modules. (They are
included on LPC17xx and some other cores.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The recent "add armv7m semihosting support" patch introduced two
build errors:
arm_semihosting.c: In function ‘do_semihosting’:
arm_semihosting.c:71: error: ‘spsr’ may be used uninitialized in this function
arm_semihosting.c:71: error: ‘lr’ may be used uninitialized in this function
This fixes those build errors. The behavior is, however, untested.
(Also, note the two new REVISIT comments.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
after clocking out a tms sequence, then the TAP will be
in some state. This state is now handed to the drivers.
TAP_INVALID is a possible state after a TMS sequence if
switching to SWD.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
core_type check is not required as the core function will be
null for cores that do not support the mcr/mrc functions.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
windows api does not define a posix sleep, use usleep that
has an openocd wrapper to the win32 native function.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
do_semihosting and arm_semihosting now check the core type and
use the generic arm structure.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Move semihosting cmd to the arm cmd group.
Targets that support semihosting will setup the
setup_semihosting callback function.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
- Add arm cmd group to armv7m cmd chain.
- arm cmd's now check the core type before running a cmd.
- todo: add support for armv7m registers for reg cmd.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
- add mips support for target algorithms.
- added handlers for target_checksum_memory and target_blank_check_memory.
- clean up long lines
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
- armv7m_run_algorithm now requires all algorithms to use
a software breakpoint at their exit address
- updated all algorithms to support this
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
The Redbee USB is a small form-factor usb stick from Redwire, LLC
(www.redwirellc.com/store), built around a Freescale MC13224V
ARM7TDMI + 802.15.4 radio (plus antenna).
It includes an FT2232H for debugging, with Channel B connected to the
mc13224v's JTAG interface (unusual) and Channel A connected to UART1.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The Redbee Econotag is an open hardware development kit from
Redwire, LLC (www.redwirellc.com/store), for the Freescale
MC13224V ARM7TDMI + 802.15.4 radio.
It includes both an MC13224V and an FT2232H (for JTAG and UART
support). It has flexible power supply options.
Additional features are:
- inverted-F pcb antenna
- 36 GPIO brought out to 0.1" pin header
(includes all peripheral pins)
- Reset button
- Two push buttons (on kbi1-5 and kbi0-4)
- USB-A connector, powered from USB
- up to 16V external input
- pads for optional buck inductor
- pads for optional 32.768kHz crystal
- 2x LEDS on TX_ON and RX_ON
[ dbrownell@users.sourceforge.net: shrink lines; texi ]
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The MC13224V is a FreeScale ARM7TDMI based IEEE802.15.4 platform for
Zigbee and similar low-power wireless applications. Using PIP
(Platform In Package) technology, it integrates: an RF balun and
matching network; a buck converter (only an external inductor is
necessary); 96KB of SRAM; and 128KB of non-volatile memory.
It has an integrated bootloader and can boot from a variety of sources:
external SPI or I2C non-volatile memory, an image loaded over UART1,
or the internal non-volatile memory. The image loaded from one of these
sources is executed directly from SRAM starting at location 0x00400000.
Open source development code at http://mc1322x.devl.org
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Stellaris chips have a procedure for restoring the chip to
what's effectively the "as-manufactured" state, with all the
non-volatile memory erased. That includes all flash memory,
plus things like the flash protection bits and various control
words which can for example disable debugger access. clearly,
this can be useful during development.
Luminary/TI provides an MS-Windows utility to perform this
procedure along with its Stellaris developer kits. Now OpenOCD
users will no longer need to use that MS-Windows utility.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Define two new DAP operations which use the new jtag_add_tms_seq()
calls to put the DAP's transport into either SWD or JTAG mode, when
the hardware allows.
Tested with the Stellaris 'Recovering a "Locked" Device' procedure,
which loops five times over both of these.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Implement the new TMS_SEQ command on FT2232 hardware.
Also, swap a bogus exit() call with a clean failure return.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
For support of SWD we need to be able to clock out special bit
sequences over TMS or SWDIO. Create this as a generic operation,
not yet called by anything, which is split as usual into:
- upper level abstraction ... here, jtag_add_tms_seq();
- midlayer implementation logic hooking that to the lowlevel code;
- lowlevel minidriver operation ... here, interface_add_tms_seq();
- message type for request queue, here JTAG_TMS.
This is done slightly differently than other operations: there's a flag
saying whether the interface driver supports this request. (In fact a
flag *word* so upper layers can learn about other capabilities too ...
for example, supporting SWD operations.)
That approach (flag) lets this method *eventually* be used to eliminate
pathmove() and statemove() support from most adapter drivers, by moving
all that logic into the mid-layer and increasing uniformity between the
various drivers. (Which will in turn reduce subtle bugginess.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
FT2232-family chips have two or more MPSSE modules. FTDI documentation
calls these channels. JTAG adapter drivers thus need to be able to choose
which channel to use. (For example, one channel may connect to a board's
microcontroller, while another connects to a CPLD.)
Since each channel has its own USB interface, libftdi (somewhat confusingly)
identifies channels using INTERFACE_* symbols. Most boards use INTERFACE_A
for JTAG, which is the default in OpenOCD. But some wire up a different one.
Note that there are two facets of what makes a wiring "layout":
- The mapping between debug signals map and channel signals ... embedded
in C functions.
- Label used in Tcl configuration scripts ... part of the "layout" structure.
By letting the channel be part of the layout struct, we permit sharing the C
functions between Tcl-visible layouts, when those signal mappings are reused.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
I have successfully programmed the AT90CAN128, based on the mega128
with some small modifications.
[ dbrownell@users.sourceforge.net: patch cleanup ]
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Highlight more of the internal JTAG-specific utilities, so it's
easier to identify code needing changes to become transport-neutral.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
zy1000 performance for GDB load went from 100kBytes/s
to 300kBytes/s @ 8 MHz by implementing the inner loop
of unack arm11 memory writes directly on top of the hw
fifo.
Profiling info:
78.57 0.77 0.77 arm11_run_instr_data_to_core_noack_inner
5.10 0.82 0.05 memcpy
4.08 0.86 0.04 jtag_tap_next_enabled
3.06 0.89 0.03 gdb_input
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
This allows minidrivers to e.g. hardware accelerate memory
writes.
Same trick as is used for arm7/9 dcc writes.
Added error propagation for memory transfer failures in
code rearrangement.
Also the JTAG end state is not updated until after
the memory write run is complete.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Use labeled initializers in the table of layouts instead of
positional ones. This ls cleaner and less error prone, plus
it simplifies patches which add members to these structure.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Be a closer match to what I've actually done for the past few cycles.
In particular, hold off pushing repository updates until after the
packages are published, as part of opening the merge window, and
mention the utility commands which actually create the archives.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
When using an AP to access a memory (or a memory-mapped register),
some extra TCK (assuming JTAG) cycles should be added to ensure
the AP has enugh time to complete that access before trying to
collect the response.
The previous code was adding these cycles *before* trying to
access (read or write) data to that address, not *after*. Fix
by putting the delays in the right location.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This removes context-sensitivity from the programming interface and makes
it possible to know what a block of code does without needing to know the
previous history (specifically, the DAP's "trans_mode" setting).
The mode was only set to ATOMIC briefly after DAP initialization, making
this patch be primarily cleanup; almost everything depends on COMPOSITE.
The transactions which shouldn't have been queued were already properly
flushing the queue.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
I have no idea what the scan_inout_check() was *expecting* to achieve by
issuing a read of the DP_RDBUFF register. But in any case, that code was
clearly never being called ("invalue" always NULL) ... so remove it, and
the associated comment.
Also rename it as ap_write_check(), facilitating a cleanup of its single
call site by removing constant parameters.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
adi_jtag_dp_scan_u32() now wraps adi_jtag_dp_scan(), removing
code duplication. Include doxygen for the former. Comment
some particularly relevant points. Minor fault handling fixes
for both routines: don't register a callback that can't run,
or return ERROR_OK after an error.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Pass up fault codes from various routines, so their callers
can clean up after failures, and remove the FIXME comments
highlighting those previously goofy code paths.
dap_ap_{read,write}_reg_u32()
dap_ap_write_reg()
mem_ap_{read,write}_u32()
mem_ap_{read,write}_atomic_u32()
dap_setup_accessport()
Make dap_ap_write_reg_u32() just wrap dap_ap_write_reg(),
instead of cloning its core code (and broken fault handling).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Handling of AP (and AP register bank) selection, and cached AP
registers, is pretty loose ... start tightening it:
- It's "AP bank" select support ... there are no DP banks. Rename.
+ dap_dp_bankselect() becomes dap_ap_bankselect()
+ "dp_select_value" struct field becomes "ap_bank_value"
- Remove duplicate AP cache init paths ... only use dap_ap_select(),
and don't make Cortex (A8 or M3) cores roll their own code.
- For dap_ap_bankselect(), pass up any fault code from writing
the SELECT register. (Nothing yet checks those codes.)
- Add various bits of Doxygen
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Keep a handle to the PC in "struct arm", and use it.
This register is used a fair amount, so this is a net
minor code shrink (other than some line length fixes),
but mostly it's to make things more readable.
For XScale, fix a dodgy sequence while stepping. It
was initializing a variable to a non-NULL value, then
updating it to handle the step-over-active-breakpoint
case, and then later testing for non-NULL to see if
it should reverse that step-over-active logic. It
should have done like ARM7/ARM9 does: init to NULL.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Generalize the core of watchpoint setup so that it can handle
breakpoints too. Create breakpoint add/remove routines which
will use that, and hook them up to target types which don't
provide their own breakpoint support (nothing, yet).
This suffices for hardware-only breakpoint support. The ARM11
code will be able to switch over to this without much trouble,
since it doesn't yet handle software breakpoints. Switching
Cortex-A8 will be a bit more involved.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Address some FIXME comments by getting rid of globals, moving
per-core parameters in the existing per-core data structure.
This will matter most whenever there are multiple ARM11 cores,
e.g. ARM11 MPcore chips, but in general is just cleanup.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This sets up a few of the core "struct arm" data structures so they
can be used with ARMv7-M cores. Specifically, it:
- defines new ARM core_modes to match the microcontroller modes
(e.g. HANDLER not IRQ, and two types of thread mode);
- Establishes a new microcontroller "core_type", which can be
used to make sure v7-M (and v6-M) cores are handled right;
- adds "struct arm" to "struct armv7m" and arranges for the
target_to_armv7m() converter to use it;
- sets up the arm.core_cache and arm.cpsr values
- makes the Cortex-M3 code maintain arm.map and arm.core_mode.
This is currently set up as a parallel data structure, primarily to
minimize special cases for the semihosting support with microcontroller
profile cores.
Later patches can rip out the duplicative ARMv7-M support and start
reusing core ARM code.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Specifically the Linux issue of needing "udev" rules, and MS-Windows
needing driver configuration.
Also, update the existing udev note to use the correct name of that
rules file in the source tree.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The recent patch to fixbreakpoints and dcache handling added
a bunch of overlong lines (80+ chars) ... shrink them, and do
the same to a few lines which were already overlong.
Also add a few FIXME comments to nudge (a) replacement of some
magic numbers with opcode macros, which will be much better at
showing what's actually going on, and (b) correct return codes.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Get rid of new nasty warning:
NOTE! Severe performance degradation without fast memory access enabled...
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Fix an unused variable warning seen when building the parport driver
under FreeBSD.
Using information from Xiaofan Chen <xiaofanc@gmail.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Breakpoints did not work because the data cache was not flushed
properly.
As a bonus add capability to write to memory marked as read only
by the MMU, which allows software breakpoints in such memory
regions.
For folk who don't know the ARM920 JTAG interface very well, the
two modes of scan chain 15 access to CP15 are confusing.
Make those parts of the ARM920 code less opaque, by:
- Adding comments referencing the relevant parts of the TRM,
catching up to similar updates in the User's Guide.
- Replacing magic numbers in physical access clients with
symbolic equivalents.
No functional change.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Cortex-M targets don't support ARM instructions.
Leave the NVIC.VTOR setup alone, but comment how the whole
routine looks like one big bug...
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
When a DSP563xx-aware GDB asks OpenOCD for target registers,
the result should be a GDB with register data ... not an
OpenOCD crash.
(Note that mainline GDB doesn't currently support this core,
so for now, this requires a GDB with FreeScale patches.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Removed remaining support for various commands, like advice for
migrating old-style TAP declarations.
The documentation no longer describes them either ... so if users have
been delaying config updates, they may need to consult older releases.
ALL this stuff has been clearly marked as "do not use" for at least a
year now, so anyone still using it hasn't been holding up their end.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Issue warning to user when unlocking or writing the option bytes.
The new settings will not take effect until a target reset.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Issue warning to user when unlocking or writing the option bytes.
The new settings will not take effect until a target reset.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
This is a copy and paste of arm926ejs. Not tested, but
ready for testing at least. There is a good chance that
it will work if the generic armv4_5 fn's are robust enough...
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Copy of the 926ejs function. I have tested it only using
my rtems application (where virtual address mapping == physical).
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Sometimes MS-Windows users try to use filesystem names which include
the "#" character. That's generally unwise, since it begins Tcl
comments.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
reset init would get stuck in an infinite loop when
e.g. khz was too high. Added timeout. This is a copy
of paste of a number of such bugfixes in the arm11
code.
Arm11 code reviewed for further such infinite loop bugs
and I couldn't find any more. Xing fingers it's the last
one...
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Not all cores and boards support adaptive clocking, so qualify
all advice to use it to depend on core and board support.
It's primarily ARM cores which support this; and many of the
newer ones (like Cortex-M series) don't.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The Doxygen output was previously titled "OpenOCD Reference Manual",
which was quite misleading ... the User's Guide is the reference
manual which folk should consult about how to use the software.
Just rename it to match how it's been discussed previously, and to
bring out its intended audience: developers of this software. As a
rule, Doxygen is only for folk who work with the code it documents.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Provide doxygen for many of the public ADIv5 interfaces (i.e. the ones
called from Cortex core support code).
Add FIXMEs (and a TODO) to help resolve implementation issues which
became more apparent when trying to document this code:
- Error-prone context-sensitivity (queued/nonqueued) in many procedures.
- Procedures that lie by ignoring errors and wrongly claiming success.
Also, there was no point in a return from dap_ap_select(); it can't fail,
and no caller checks its return status. Clean that up, make it void.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Init the ARMv7-M magic number. Define predicate verifying it.
Use it to resolve a lurking bug/FIXME: make sure the ARMv7-M
specific DAP ops reject non-ARMv7-M targets.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Have the User's Guide and BUG handling notes both reference
the fact that we now have a bug database at SourceForge.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Segger publishes some documentation on this protocol;
reference it, so future maintainers can know it exists.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Moved board specific settings from target/at91r40008.cfg to a new
file board/ethernut3.cfg.
Set correct CPUTAPID. Reset delay increased, see MIC2775 data sheet.
Increased work area size from 16k to 128k.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Remove long-obsolete text about "erase_check" affecting "flash info" output.
Move parts of that text to "protect_check", where it's still relevant; and
update the "flash info" description to mention the issue.
(This is still awkward. It might be best to make "protect_check" mirror
"erase_check" by dumping what it finds, so "flash info" doesn't dump any
potentially-stale cache info.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
For STR7x flash, the device cannot be queried for the protect status.
The solution is to remove the protection on reset init. The driver
also initialises the sector protect field to unprotected.
[dbrownell@users.sourceforge.net: line length shrinkage]
Signed-off-by: Edgar Grimberg <edgar.grimberg@zylin.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The default state of the STR7 flash after a reset init is unlocked.
The information in the flash driver now reflects this.
The information about the lock status cannot be read from the
flash chip, so the user is informed that flash info might not
contain accurate information.
[dbrownell@users.sourceforge.net: line length shrinkage]
Signed-off-by: Edgar Grimberg <edgar.grimberg@zylin.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The semihosting interface has a strange convention for read/write where
the unused amount of buffer must be returned. We failed to return the
total buffer size when the local read() call returned 0.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Test cases ran on v0.4.0-rc1 for a number of targets:
AT91FR40162
LPC2148
SAM7
STR710
STR912
The goal of the testing session was to prove basic functionality of OpenOCD for different targets.
Signed-off-by: Edgar Grimberg <edgar.grimberg@zylin.com>
srst_asserted and power_restore can now be overriden to do
nothing. By default they will "reset init" the targets and
halt gdb.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
When the TAR cache was explicitly invalidated, don't bother
printing it; the actual hardware status is more informative.
Provide some doxygen for the MEM-AP setup routine.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Sometimes we saw two strange blank spaces at the beginning
of the telnet lines.
progress
ogress
>
This patch fixes this problem:
progress
progress
>
The code changes are *reasonably* clean, but perhaps it could be
made a bit more elegant, but I didn't want to change things after
I finished diagnosis/testing & submitting the patch.
The problem was that logging can send the text and the newline
separately in two different requests and the telnet code would
incorrectly remove the prompt from the end of a line.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
If the MEM-AP cache is invalid, don't display it; just report that
invalidity as an error. (This bug has been observed with "mdw 0 32"
after just a "reset halt". Some code is being wrongly bypassed...)
If it's valid, display that cache at DEBUG level, not ERROR. Also,
don't assume it's an AHB-AP; it could be another flavor of MEM-AP.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Reject invalid AP numbers (256+) as Tcl operation parameters.
Shrink one of the overlong lines.
Add my copyright to the ADIv5 code (multiple contributions).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make messages reference "DAP" if they're actually transport-agnostic, or
"JTAG-DP" when they're JTAG-specific. Saying SWJ-DP is often wrong (on
most Cortex-A8 chips) and is confusing even if correct (since we don't
yet support SWD).
Rename a JTAG-specific routine to jtagdp_transaction_endcheck() to highlight
that it's JTAG-specific, and that identify DAP clients undesirably depending
on JTAG. (They will all need to change for SWD support.)
Shrink a few overlong lines of code. Copy a comment from code removed
in a previous patch (for the ARMv7-M "dap baseaddr" command).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make the ARMv7-M DAP code reuse the command handler for "dap baseaddr".
For some reason, this DAP command wasn't converted earlier.
This is a code shrink and simplification; it also removes a needless
transport dependency on JTAG.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Building with clang took a few very small changes. The change to
helper/log.h is because clang doesn't like an expression where the
result is unused. In helper/system.h, I just defined true and false
since clang doesn't have them builtin.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The "-f" is a shortcut for "-c" ... and providing any "-c" options
means the "openocd.cfg" file isn't implicitly used. Both the User's
Guide and the manual page were weak on these points, which has led
to some confusion.
Also update the manual page to include highlights of the search path
mechanism, including the facts that it exists and that "-s" adds to it.
Stop saying only the current directory is involved; the OpenOCD
script library is quite significant.
(Missing: complete manpage coverage of the search path, including a
FILES section listing all components and saying where the script
library is found.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The term "DPM" is probably not well known ("Device Power Management"?),
so identify its source in the current ARM architecture specification.
It's relevant to ARMv6, ARMv7-A, and ARMv7-R ... but not "M" profiles.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Cygwin would fail to reopen a previously written file if the mode is
not given.
Simplified converting the open flags and made sure the win32 O_BINARY
bit is set.
Added define for systems that do not support O_BINARY.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
SYS_FLEN would be called before a write on a descriptor to check its size.
Currently lseek would fail with -1 when given the stdout/stderr descriptor.
Changing to use fstat seems to be the standard way of handling this.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
ARMv7-M defines a "lockup" state that's entered in certain double
fault sequences which can't be recovered from without external help.
OpenOCD has previously ignored this.
Issue a diagnostic saying the chip has locked up, and force exit
from this state by halting the core. It's not clear this is the
best way to handle lockup; but there should now be less confusion.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add space missing after the invalid ACK value. On init, say
which AP is being used, and don't assume it's an AHP-AP.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
isspace() parameter must be an integer, else a 'char' gets
used as an array index (sigh).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
More SVF fixes:
* Treat all content between parentheses as part of the same
parameter; don't (wrongly) treat whitespace as a delimiter.
* Use isspace() to catch that whitespace; it's not all single
spaces, newlines etc are also valid.
* When parsing bitstrings, strip leading whitespace too.
So for example, these are equivalent and should (now) be OK:
"TDI( 1234 )"
"TDI( 1 2 3 4 )"
"TDI(00 12 34 )"
"TDI(
00 12
34)"
[dbrownell@users.sourceforge.net: comment updates; trivial cleanup]
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
If the target and openocd are idling, the log should normally
be silent at level 3. (Given no verbose logging options.)
Signed-off-by: Edgar Grimberg <edgar.grimberg@zylin.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
See http://forum.sparkfun.com/viewtopic.php?p=90983#90983 for discussion;
basically, the SVF parser wrongly expects "TDI (123)" but the space is
optional and it should accept "TDI(123)" too.
In the same way, "TDI(123)TDO(456)" should work too.
Rather than update the command parsing, this just makes sure the expected
spaces are present.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The breakpoint/watchpoint message was wrong for Feroceon and
Dragonite, which have only one working watchpoint unit.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Summarize most ARM11 and Cortex-A8 updates as "acting much more
like other ARMs", and mention code sharing.
Clarify a few other points, including support for "reset-assert"
on all ARMs except Cortex-M (which doesn't exactly need it).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This fixes a bug whereby GDB's breakpoints weren't activated.
The root cause is a confused interface to resume(). Fix by
almost ignoring the "handle breakpoints" parameter; it only
seems related to the case of skipping breakpoint-at-PC.
Update a few coments to clarify what's happening.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Doxygen: don't be needlessly verbose; alphabetically sort members
TODO: add random bits; clarify which manuals are referenced
ARM disassembler: mention a few opcodes that still aren't handled
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Highlight the needs to properly jumper development boards; to
make the OpenOCD configuration match the jumpering; and to have
a usable "reset-init" method when debugging early boot code.
Specific mention of the "ATX Mode" that seems useful on
many i.MX boards, forcing NAND boot.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Update the comments about DP registers and some of the bitfields.
Remove inappropriate (and unused) DP_ZERO declaration.
Add some (currently unused) #defines needed for SWD protocol support,
based on previous patches from Andreas Fritiofson and Simon Qian.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
If GDB halts unexpectedly, print reason: srst assert or power
out detected.
If polling fails, then things are a bit trickier. We do not
want to spam telnet or the log with polling failed messages.
Leave that case be w/a comment in a code for now.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Rather than issuing a halt and then stepi/resume, just
wait for target to halt.
Issue a sterner warning via gdb console that any gdb
register changes will be ignored in this case.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
The "cm3-ftest.cfg" can be used to verify that OpenOCD handles
certain faults correctly:
- Test #1: it ignores faults that it wasn't told to catch
- Test #2: if vector_catch is told to catch, it catches
The "fault.c" generates ASM code to trigger faults, while the
config script loads and runs pre-compiled code.
This covers most, but not all, of the vector_catch options.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Don't give the same names to both flash chips on two OMAP boards.
For OSK, enable DCC downloads (removing a warning).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Report each region of same-size sectors separately, instead of
incorrectly reporting that every sector has the same size.
This is a longstanding bug on NOR flash chips with non-uniform
sector sizes. It was largely hidden by other bugs in flash
handling. When some of those were recently fixed, this one was
exposed as a regression on str710.
[oyvind.harboe@zylin.com: update the loop to behave on str7 ]
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make the test case easily adjustable in size. str710
has very peculiar flash sector layout, nice for testing,
but a larget test_rom.elf is required.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Skip over a bkpt instruction if found on resume/step.
Only software breakpoints known to OpenOCD are currently handled.
So this handles the special case of either a user added bkpt
or library added, eg. semi-hosting support.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Folk almost certainly want to have OpenOCD compute the checksum
when they modify the vector table. However, that almost guarantees
that "verify_image" will fail.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Put the memory map logic into its own subroutine.
This will make it a bit easier to package bugfixes,
and simplifies the query packet handling.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make most methods static; net minor object code shrink.
Likewise various data symbols; no net change.
Shrink some overlong lines.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The default script search path on Windows is out of date with
the current layout (from installation and documentation), which
makes the standard script library not be found after a normal
./configure && make && make install
under msys/MinGW. The same should hold true for cygwin native builds
(not verified).
Update search path to ../share/openocd/scripts not ../lib/openocd,
relative to the openocd executable.
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The "NOR: last_addr also needs correction when checking alignment"
patch omitted a necessary update to the key diagnostic; fix.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
It is conceivable that there could be commands in the
queue when a speed change request comes in. Flush the
hw queue before changing speed. Not observed, found by
inspection.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
According to OpenOCD error handling rules the error is
logged at where it occurs(same site where an exception
would have been thrown).
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
The very first command after init command should be "read target voltage".
This is a tweak for the Old Versaloon firmware. Without this, in most
most cases, it works. Under Ubuntu9.04, there is a chance that the USB
will fail. The problem disappears if I read target voltage first.
For the lastest Versaloon firmware, it's OK.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The LPC3180 NAND driver was crashing on some large page chips.
Fix:
- Crash and related functionality (don't memset too much OOB data)
- Some debug messages
- Command handling now works
[dbrownell@users.sourceforge.net: whitespace/linelength/message cleanup]
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Don't just complain about an invalid ACK; say what the
value was, to help troubleshooting.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Until we manage breakpoints at runtime (patches not ready for 0.4)
the only way this code should touch them is to disable them at server
startup (a previous debug session may have left them active).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add doxygen and other comments for what's more or less the lowest
level JDAG-DP primitive, to access JTAG_DP_{A,D}PACC registers.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Teach most remaining ARM cores how to use the "reset-assert" event.
Same model as elsewhere: iff a handler is provided for that event,
use that instead of trying to assert SRST (which may be unavailable,
or inappropriate since it resets too much). Else no change.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Identical to the existing 2412/2443 support except for the base address
and NFCONF value (bit 2 is reserved and should be written as 1 ref UM).
Tested on a s3c6410 board, but controller is identical in 6400/6410
except for 8bit MLC ECC support in 6410 which isn't supported by the
driver.
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Using the erase bank command will cause a time out error. Replacing
this with the erase sector bank will provide a slower but safer and
stable method to erase the flash.
Signed-off-by: Laurentiu Cocanu <laurentiu.cocanu@zylin.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Shrink some overlong lines. Add my 2009 copyright.
Move a declaration to the beginning of its block.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Capture various bits of useful information that have come up on the
list but haven't yet gotten into the documentation:
- Watchdog timers firing during JTAG debug need attention;
- Some chips have special registers to help JTAG debug;
- Cortex-M3 stepping example with IRQs and maskisr;
- Clarifications re adaptive clocking: not all ARMs do it, and
explain it a bit better.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add a NOR flash mechanism where erase_address ranges can be padded
out to sector boundaries, triggering a diagnostic:
> flash erase_address 0x0001f980 16
address range 0x0001f980 .. 0x0001f98f is not sector-aligned
Command handler execution failed
in procedure 'flash' called at file "command.c", line 647
called at file "command.c", line 361
>
> flash erase_address pad 0x0001f980 16
Adding extra erase range, 0x0001f800 to 0x0001f97f
Adding extra erase range, 0x0001f990 to 0x0001fbff
erased address 0x0001f980 (length 16) in 0.095975s (0.163 kb/s)
>
This addresses what would otherwise be something of a functional
regression. An earlier version of the interface had a dangerous
problem: it would silently erase data outside the range it was
told to erase. Fixing that bug turned up some folk who relied on
that unsafe behavior. (The classic problem with interface bugs!)
Now they can get that behavior again. If they really need it,
just specify "pad".
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This updates three aspects of debugger/exception interactions:
- Save the user's "vector_catch" setting, and restore it after reset.
Previously, it was obliterated (rather annoyingly) each time.
- Don't catch BusFault and HardFault exceptions unless the user says
to do so. Target firmware may need to handle them.
- Don't modify SHCSR to prevent escalating BusFault to HardFault.
Target firmware may expect to handle it as a HardFault.
Those simplifications fix several bugs. In one annoying case, OpenOCD
would cause the target to lock up on ome faults which triggered after
the debugger disconnected.
NOTE: a known remaining issue is that OpenOCD can still leave DEMCR
set after an otherwise-clean OpenOCD shutdown.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
DCC downloads should be enabled for any self repecting
openocd config file for arm7/9. Print out note about
it otherwise.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Allow targets to run checks post reset. Used to check
that e.g. DCC downloads have been enabled.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
It looks like a bugfix from normal breakpoints was not
copied over.
Do not use clever mathematics and assumptions to convert from
GDB enum for break/watchpoints to OpenOCD enum.
Drop connection upon unknown breakpoint type, this code path
was not really considered by the previous code I think.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Added interface config file for JTAG/RS232 debug board originally
integrated to Neo 1973 and Neo FreeRunner phones.
Adapter was tested with i.MX31, S3C2410 and AT91SAM9260 processors.
Signed-off-by: Vladimir Zapolskiy <vzapolskiy@gmail.com>
Use correct tcl syntax to throw exception.
the syntax is "return -code error" not "return -error"
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
we don't need to know the build path of command.c when
reading normal user level error messages.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
flush JTAG FIFO before reset. Fixes RCLK problems observed
w/lpc2148, but really fixes a wider range of problems.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Add file comments to a few files. Make the GDB server use
more conventional (pointer-free) hex digit conversion.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The usual: expand several helptexts to be more correct and to use
full sentences; make the usage messages use the same EBNF as the
User's Guide; use function names for their addresses.
Also add a comment about that odd jtag_command_handlers_to_move[] thing.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The usual: same EBNF as in the User's Guide, full sentence helptext,
function names *are* their addresses.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Presto: add doxygen file comment.
Parport: note a couple gaps in layout config.
Both: use the uniform EBNF for usage, bugfix helptexts, use function
name as its address not "&name".
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The "parport_port" commands generally don't *require* a port_number;
they're of the "apply any parameter, then print result" variety. Update
the User's Guide accordingly.
Some of those commands are intended to be write-once: parport_port,
and parport_cable. Say so.
Use proper EBNF for the parport_write_on_exit parameter.
Parport address 0xc8b8 is evidently mutant. Say so in the "parport.cfg"
file, to avoid breaking anyone with that mutant config. But update the
User's Guide to include a sane example for the LP2 port.
Finally document the "presto_serial" command.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make "usage" messages use the same EBNF as the User's Guide;
no angle brackets. Improve and correct various helptexts.
Don't use "&function"; a function's name is its address.
Fix some whitespace glitches, shrink a few overlong lines.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make "usage" messages use the same EBNF as the User's Guide;
no angle brackets. Improve and correct various helptexts.
Don't use "&function"; a function's name is its address.
Remove a couple instances of pointless whitespace; shrink a
few overlong lines; fix some bad indents.
Add TODO list entry re full support for NAND/NOR bank names.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
- add target_to_mips32 and target_to_m4k to match test of codebase.
- mips32_arch_state now shows if processer is running mips16e isa.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Make "usage" messages use the same EBNF as the User's Guide;
no angle brackets. Improve and correct various helptexts.
Specifically for the port commands, clarify that the number
is optional, and omitting it causes the current number to be
displayed.
Don't use "&function"; a function's name is its address.
Remove a couple instances of pointless whitespace; shrink a
few overlong lines.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Recent Apple gcc versions use __APPLE__ instead of __DARWIN__; accept
that too.
Also use #warning, not #warn; neither is standard, but most CPP versions
require it to be spelled out.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make "usage" messages use the same EBNF as the User's Guide;
no angle brackets. Improve and correct various helptexts.
Don't use "&function"; a function's name is its address.
Remove a couple instances of pointless whitespace, shrink
a few overlong lines.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Usage messages should use the same EBNF as the User's Guide;
no angle brackets. Be more complete too ... some params were
missing. Improve and correct various helptexts.
Make user's guide refer to the NAND "driver" name, not the
controller name; that's a bit more precise.
Don't use "&function"; its name is its address. Line up struct
initializers properly. Remove some blank lines.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Update/bugfix the "hello" example; emphasize using EBNF syntax,
matching the User's Guide. Correct the Texinfo style guide to
say EBNF, not BNF.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Usage messages should use the same EBNF as the User's Guide;
no angle brackets. Be more complete too ... some params were
missing.
Don't use "&function"; its name is its address.
Unrelated: fix typo in one "target.c" usage message.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make "usage" messages use the same EBNF as the User's Guide;
no angle brackets. Improve and correct various helptexts.
Don't use "&function"; a function's name is its address.
Remove a couple instances of pointless whitespace.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The issues is on Win32, which ignores case in filesystem
and thus doesn't tolerate the quilt "patches" directory.
Rename, and add "patches" to .gitignore so that developers
can choose to use quilt for local patch management.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
It can invalidate ECC codes, and in general is not guaranteed
to work. (However on some chips it _appears_ to behave.) Just
don't do it; don't write in those cases.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Usage syntax messages have the same EBNF as the User's Guide;
there should be no angle brackets in either place.
Uupdate some helptext to be more accurate.
Don't use "&function"; functions are like arrays, their address
is their name.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Usage syntax messages have the same EBNF as the User's Guide;
there should be no angle brackets in either place.
Fix the User's Guide to say where the magic CP15 bits are defined;
and add comments in case someone provides mcr/mrc methods.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Deprecate the "pass an instruction opcode" flavor of cp15
access in favor of the "arm mcr ..." and "arm mrc ..."
commands, which offer fewer ways to break things.
Use the same EBNF syntax in the code as for the user's guide.
Update User's Guide to say where to find those magic values
(which table in the ARM920 TRM).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Deprecate the "pass an instruction opcode" flavor of cp15 access
in favor of the "arm mcr ..." and "arm mrc ..." commands, which
offer fewer ways to break things.
Use the same EBNF syntax in the code as for the user's guide.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Usage syntax messages have the same EBNF as the User's Guide;
there should be no angle brackets in either place.
Uupdate some helptext to be more accurate.
Fix the User's Guide in a few places to be more consistent (mostly
to use brackets not parentheses) and to recognize that parameter may
be entirely optional (in which case the command just displays output,
and changes nothing). Also reference NXP, not Philips, for LPC chips.
Don't use "&function"; functions are like arrays, their address
is their name.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Provide helptext which was sometimes missing; update some of it
to be more accurate.
Usage syntax messages have the same EBNF as the User's Guide;
there should be no angle brackets in either place.
Fix the User's Guide in a few places to be more consistent (mostly
to use brackets not parentheses) and to recognize that parameter may
be entirely optional (in which case the command just displays output,
and changes nothing). Also reference NXP, not Philips, for LPC chips.
Don't use "&function"; functions are like arrays, their address
is their name. Shrink some overlong lines.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Provide helptext which was sometimes missing; update some of it
to be more accurate.
Usage syntax messages have the same EBNF as the User's Guide;
there should be no angle brackets in either place.
Don't use "&function"; functions are like arrays, their address
is their name. Shrink some overlong lines, remove some empties.
Add a couple comments about things that should change: those
extra TCK cycles for MEM-AP reads are in the wrong place (that
might explain some problems we've seen); the DAP command tables
should be shared, not copied.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Provide helptext which was sometimes missing; update some of it
to be more accurate.
Usage syntax messages have the same EBNF as the User's Guide;
no angle brackets in either place.
Don't use "&function"; functions are like arrays, their address
is their name. Shrink some overlong lines, remove some empties.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Provide helptext which was sometimes missing; update some of it
to be more accurate.
Usage syntax messages have the same EBNF as the User's Guide.
Don't use "&function"; functions are like arrays, their address
is their name. Shrink some overlong lines; remove some empties.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Provide helptext which was sometimes missing; update some of it
to be more accurate (mostly they display something w/no args).
Usage syntax messages have the same EBNF as the User's Guide.
In some cases, *exactly* what the user's guide shows... e.g.
talking about "offset" not "address" for trace_image.
Don't use "&function"; functions are like arrays, their name
is their address.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
If fastdata access fails, then fallback to default mips_m4k_write_memory
Remove unnecessary fastdata loader verify check
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Don't save that state unless its only user, an assertion,
is compiled. Saving it broke a cygwin build.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Starting the daemon with with just a bare "openocd" I saw:
Can't find openocd.cfg
That's not an error; don't treat it as if it were. There may
be an error later -- like, "no interface set up" -- but let
messages only report real errors, not fake ones.
JTAG has only two possible JTAG ack codes for APACC and DPACC
register reads/writes. Define them, and remove empty "else"
clause in the code which now uses those codes.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
I think some of these assumptions are not well-founded.
Related, that swjdp_transaction_endcheck() is a bit iffy.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
add reset-init script to allow ram execution from reset, this is required for ejtag fastdata access.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
The gdb_port command can be invoked during normal execution
to report the port used for gdb, whereas it was listed as
CONFIG stage only, which caused an error when excuting
it to return the reported error.
Also in line with the grander goal of making more commands
available during all "modes" (perhaps retiring config mode),
there is no particular reason to limit gdb_port to the
config stage.
Regression was introduced in:
b3bf1d12b2 aka
v0.4.0-rc1-32-gb3bf1d1
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
New versions of udev (148+) emit the following warnings:
udevd[425]: BUS= will be removed in a future udev version,
please use SUBSYSTEM= to match the event device, or
SUBSYSTEMS= to match a parent device, in /lib/udev/rules.d/60-openocd.rules:1
udevd[425]: SYSFS{}= will be removed in a future udev version,
please use ATTR{}= to match the event device, or
ATTRS{}= to match a parent device, in /lib/udev/rules.d/60-openocd.rules:4
udevd[425]: SYSFS{}= will be removed in a future udev version,
please use ATTR{}= to match the event device, or
ATTRS{}= to match a parent device, in /lib/udev/rules.d/60-openocd.rules:7
...
See also http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=560141
[dbrownell@users.sourceforge.net: add IDs for Stellaris ICDI, Olimex Tiny-H]
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add doxyegen description for this driver.
Correct the helptext (configures *or* displays based on #params),
and usage (use the same BNF as the User's Guide).
Remove superfluous #include
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Remove superfluous #include.
Correct the helptext (configures *or* displays based on #params),
and usage (use the same BNF as the User's Guide).
Add doxygen -- file-level description and a @todo for doing
RTCK correctly.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The command processing conversion a while back lost the
"rtck" enable/disable command; restore it.
NOTE that having such a command is wrong; there's a standard
way to enable adaptive clocking ("speed 0").
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Build fixes: it failed abysmally with PPDEV enabled. Swapped
a build-time error with a FIXME comment in the affected macros.
Cleanup: remove "&" before function pointers, and excess indent,
for the interface struct declaration.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Rename DAP_IR_* as JTAG_DP_* since those symbols are specifically
for JTAG-DP (or SWJ-DP in JTAG mode), and won't work with SWD.
Define the JTAG ABORT and IDCODE instructions for completeness;
add a comment about where to (someday) use ABORT.
Fix messaging which assumes everything is an SWJ-DP; say "JTAG-DP"
instead, it's at least more appropriate for all JTAG transports.
Shrink the affected lines.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Fix: don't print the BASE address except if it's a MEM-AP;
that's an unlikely error, but there's no point getting it wrong.
Tweaks: comments, capitalization.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make some private functions "static". Remove their public declarations,
and what is now an obviously unused function. Shrinks this object's size
(about 5% on x86_64) while making the code's scope easier to understand.
Shrink the affected lines.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Instead of magic numbers, use their AP_REG_* constants. Rename
the ROM address symbol as BASE to match ARM's documentation.
Comment various other symbols in the header; add some missing ones.
Remove an unused struct. Add some doxygen for stuff including the
DAP structure and initialization.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Shrink some lines, add some comments, simplify some tests.
During debug startup, log the core revision level too.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Most commands are usable only at runtime; so don't bother saying
that, it's noise. Moreover, tokens like EXEC are cryptic. Be
more clear: highlight only the commands which may (also) be used
during the config stage, thus matching the docs more closely.
There are
- Configuration commands (per documentation)
- And also some commands that valid at *any* time.
Update the docs to note that "help" now shows this mode info.
This also highlighted a few mistakes in command configuration,
mostly commands listed as "valid at any time" which shouldn't
have been. This just fixes ones I noted when sanity testing.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This makes it so that the usage/help command properly uses the whole command,
including subcommand, in the search for help information. This previously
caused erroneous output from the usage command handler.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
I wanted to make it so I can be ignorant of a commands invocation string, so
I tried to use CMD_CURRENT (aka cmd->current) which is supposed to house a
pointer to the current command. It turns out that this wasn't being set.
This patch adds the current command structure to the command invocation
structure before sending it along to the command handler.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The relevant cable config is already in OpenOCD, but not a config for
the JTAG adapter. I have tested with FlashLINK on ARM926.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This adds the .settings folder and the .cproject file put down
by Eclipse from the eyes of Git.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Handlers for commands
- arm7_9 semihosting <enable | disable>
- $_TARGETNAME arp_reset assert 1
didn't check if target has already been examined, and could
segfault when using the NULL pointer "arm7_9->eice_cache".
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The handler for "arm9tdmi vector_catch ..." did not check
if target has already been examined. Without this fix it
segfaults when using NULL pointer "arm7_9->eice_cache".
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Print "ssize_t" as "%ld" (+ cast to long) not as "%zu".
Official MinGW (gcc 3.4.5) doesn't understand "z" flag.
Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Most of this patch updates documentation and comments for various
Luminary boards, supporting two bug fixes by helping to make sense
of the current mess:
- Recent rev C lm3s811 eval boards didn't work. They must use
the ICDI layout, which sets up some signals that the older
boards didn't need. This is actually safe and appropriate
for *all* recent boards ... so just make "luminary.cfg" use
the ICDI layout.
- "luminary-lm3s811.cfg", was previously unusable! No VID/PID;
and the wrong vendor string. Make it work, but reserve it
for older boards where the ICDI layout is wrong.
- Default the LM3748 eval board to "luminary.cfg", like the
other boards. If someone uses an external JTAG adapter, all
boards will use the same workaround (override that default).
The difference between the two FT2232 layouts is that eventually
the EVB layout will fail cleanly when asked to enable SWO trace,
but the ICDI layout will as cleanly be able to enable it. Folk
using "luminary.cfg" with Rev B boards won't see anything going
wrong until SWO support is (someday) added.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Otherwise the new alignment checking algorithm thinks that the
address is not aligned, because it is way beyond the last sector.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This config is only lightly tested, and doesn't work well yet;
but it's a start.
* Notably missing is PLL configuration, since each DaVinci
does that just a bit differently; and thus DDR2 setup.
* The SRST workaround needed for the goof in the CPLD's VHDL
depends on at least the not-yet-merged patch letting ARM9
(and ARM7) chips perform resets that don't use SRST.
So this isn't yet suitable for debugging U-Boot.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Resolve a regression when using newish automagic "write_image"
modes, by always padding to the end of affected sectors.
Also document some issues associated with those automagic options,
in the User's Guide and also some related code comments.
We might need similar padding at the *beginning* of some sectors,
but this is a minimalist fix for the problems which have currently
been reported (plus doc updates).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The 10-pin JTAG layout used with these adapters is used by
a variety of platforms including AVR.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This updates the board configuration for the SAM9-L9260 board with the
configuration for the on-board NAND and dataflash. Included are commands
for configuring the AT91SAM9 NAND flash driver.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
It's less accepting of signed char ... insisting that e.g. tolower()
not receive one as a parameter.
It's probably good to phase out such usage, given the number of bugs
that lurk in the vicinity (assumptions that char is unsigned), so fix
these even though such usage is actually legal.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Misc:
- Introduce some "struct reg" temporaries, for clarity
- Shorten lines
- Add some missing whitespace
- Clean up comments
- Add notes about some fault handling issues
- Most of these errata workarounds are for *OLD* chip revisions
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
And add my copyright. MPCore is untested, but it's the
only other ARM11 core to care about.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Command "reset halt" checks if PC properly resets, issueing warning:
"PC was not 0. Does this target need srst_pulls_trst?".
Checking PC against 0 is not always correct.
Removed PC value check, as suggested by Øyvind Harboe.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: U-PROPRIET-28D9DF\PROPRIETAIRE <PROPRIETAIRE@propriet-28d9df.(none)>
This creates the TCL interface for configuring an AT91SAM9 NAND flash
controller and implements the necessary functions to correctly work with
a NAND flash device connected to the chip. This includes updates to the
driver list and the Makefile.am to support building the driver and also
houses the documentation update in openocd.texi.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
In conjunction with manual register setup, this lets the ETM trigger
cause entry to debug state. It should make it easier to test and
bugfix the ETM code, by enabling non-trace usage and isolating bugs
specific to thef ETM support. (One current issue being that trace
data collection using the ETB doesn't yet behave.)
For example, many ARM9 cores with an ETM should be able to implement
four more (simple) breakpoints and two more (simple) watchpoints than
the EmbeddedICE supports. Or, they should be able to support complex
breakpoints, incorporating ETM sequencer, counters, and/or subroutine
entry/exit criteria int criteria used to trigger debug entry.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Change handling of the CYCLE_ACCURATE, BRANCH_OUTPUT, and
TRACE_* flags; also the CONTEXTID size values.
- Convert to symbols matching the actual register bits, instead of
some random *other* bits (and then correcting that abuse).
- Get rid of a now-needless enum.
- Keep those values in etm->control, and remove etm->tracemode.
These values all affect the trace data that's recorded by a trace
pod or in the ETB. I modified the file format used to dump ETB
data; since it's fairly clear nobody can use this mechanism now,
this can't cause anyone trouble.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Provide better comments for the ETM_CTRL bits; use the correct bit
for half/full clock mode; and define a few more of the bits available
from the earliest ETM versions.
The new bit defintions use ETM_CTRL_* names to match their register
(instead of ETM_PORT_* or ETMV1_*). For clarity, and better matching
to docs, they are defined with bitshifting not pre-computed masks.
Stop abusing typdefs for ETM_CTRL values; such values are not limited
to the enumerated set of individual bit values.
Rename etm->portmode to etm->control ... and start morphing it into a
single generic shadow of ETM_CTRL. Eventually etm->tracemode should
vanish, so we can just write etm->control to ETM_CTRL.
Restore an "if" that somehow got dropped.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This command was misplaced; it's not generic to all traceport drivers,
only the ETB supports this kind of configuration. So move it, and
update the relevant documentation.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Much to my surprise, I observed a "flash erase_address ..."
command erasing data which I said should not be erased.
The issue turns out to be generic NOR flash code which was
silently, and rather dangerously, morphing partial-sector
references into unrequested whole-sector ones.
This patch removes that low-level morphing. If desired, it
can and should be done in higher level code. (We might need
to fix some stuff in the GDB server code.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
It's currently allocating a big buffer but writing it out in
units of sizeof(host's pointer) ... sub-optimal.
Plus fix a couple minor coding style goofs.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Word count == size/4; cope. And increase buf_min so it's large
enough to cover the overhead in my tests.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
We can actually do the right thing if the MMU is off; save
the error message for the phys-but-MMU-enabled path, which
is what isn't yet supported.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Try to right-size the SRAM buffers, by not:
- using them for very small writes
- giving up when a large buffer isn't available
- allocating buffers much larger than their data
Also don't:
- bother loading the code unless we allocate the writebuffer too
- be so verbose with messaging:
* be more concise
* reduce importance (e.g. DEBUG not WARNING)
* remove duplication
The minimum buffer size is something of a guess. It's eight
times smaller than before, almost the same size as the code
being downloaded. It probably deserves some tuning.
Also, note an erratum affecting flash protection on some chips;
and narrow many over-wide lines affected by the above changes.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Refactored the write page raw function into two new functions
for writing data to a NAND device and then another function to
finish up a write to a NAND device. This includes some new
updates to introduce more error checking to existing code.
[dbrownell@users.sourceforge.net: fix fault handling, whitespace]
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Added a new function to encapsulate reading a page of data from
a NAND device using either the read_block_data function of a NAND
controller or to use direct reading of data from the NAND device.
This also adds some performance enhancements and uses the read_data
function if the read_block_data function fails safely (because it
can't allocate a buffer in the working area).
[dbrownell@users.sourceforge.net: fix fault handling, whitespace]
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Tweak the "scan_chain" output by removing column separators. Also
remove the "current instruction" state ... which changes constantly.
Now its style resembles the "targets" output, and can even fit on
one line in standard terminals and in the PDF docs.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Someday revisit various issues: Tempest parts support writing
more than one word at a time; for some target firmware it might
be necessary to save and restore flash IRQ configuration. (The
safest policy is likely to always reset after flash updates.)
Plus swap some undesirable TAB characters with SPACE.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Fix potential memory leak: make sure the per-bank data
structures are only allocated in probe(), and that calling
probe() multiple times is a NOP. Use it for auto_probe().
Require probe() to have done its thing: don't make access
routines cope with it not having been called. Shrink a
bunch of failure paths; and in some cases, correct them.
Don't needlessly insist on a halted target for probe().
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
No point in reading and discarding a status value when fetching
part description data. Or having that needless "#if 0" code.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Previously "reading" clock info (and part info) also, as a side
effect, wrote the flash timing register. Instead, be more safe:
"reading" should only read. Write paths still refresh timing,
coping with changes the application code may have made.
Also rename the routine which sets flash timing, indicating what
it's really doing; it's got nothing to do with a "mode".
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
By exhausting data on input, the performance will be more
consistent + the code more clearly distinguishes between
polling and processing. A test showed gdb packet load
performance go from ~1550kByte/s to 1650kBytes/s + being
more stable.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Remove more remnants of the old "jtag_device" syntax.
Don't [format "%s.cpu" $_CHIPNAME] ... it's needless complexity.
Remove various non-supported "-variant" target options; they're not
needed often at all.
Flag some of the board files as needing to have and use target files
for the TAP and target declarations.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
That syntax has been obsolete forever and is now gone; remove a few
remaining references. Shows how seldom this stuff gets used.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Teach ARM11 how to use:
- the new "reset-assert" event
- vector catch to implement "reset halt"
- use SRST more like other cores do
- ... including leaving post-SRST delays up to config scripts
This gives OMAP2420 the ability to reset, and doesn't seem to
cause new iMX31 problems.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Common target.cfg file for LM3S CPU family
[dbrownell@users.sourceforge.net: rename, generalize more]
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
I added the remaining devices and device IDs to stellaris.c, and
removed several devices that don't exist on the Stellaris web page.
Additionally, I found a few devices with duplicate IDs ... the DID1
Version Number for LM3Sxxx parts have DID1 Version = 0x0, and for
LM3Sxxxx have DID1 Version = 0x1. So I extended the comparison to
use the VER and FAM fields from DID1 also.
ID=0x33: LM3S812 (DID1v0) and LM3S2616 (DID1v1)
ID=0x39: LM3S808 (DID1v0) and LM3S2276 (DID1v1)
These are the parts I removed from the file for lack of documentation
(no data sheet to confirm part ID):
LM3S318,
LM3S1101, LM3S1108,
LM3S1615, LM3S1616,
LM3S2016,
LM3S2101, LM3S2108,
LM3S3759, LM3S3768,
LM3S5757, LM3S5767, LM3S5768, LM3S5769,
LM3S6815, LM3S6816,
LM3S6915, LM3S6916,
LM3S6111, LM3S6118.
Also, sort devices according to part number.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add a "-ignore-version" to "jtag newtap" which makes the IDCODE
comparison logic optionally ignore version differences.
Update the "scan_chain" command to illustrate this by showing
the "*" character instead of the (ignored) version nibble.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make these ".h" files adopt the same policy the ".c" files already
follow: don't use <subsystem/...h> syntax for private interfaces.
If we ever get reviewed/supported "public" interfaces they should
come exclusively from some include/... directory; that'll be the
time to switch to <...> syntax for any subsystem's own interfaces.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Don't include <helper/jim.h> from target.h ... not everything
which touches targets needs to be able to talk to Jim. Plus,
most files include this header by another path.
Also, switch the affected files to use the classic sequence
for #included files: all <framework/headers.h> first, then
the "local_headers.h". This helps prevent growth of problematic
layering, by minimizing entanglement.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
For some routines that only returned ERROR_OK and where the
caller never checked ... don't bother. Remove some noise,
and bugfix some comments.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Abstract the DPM breakpoint and watchpoint data structures to
have a shared core for housekeeping.
Abstract the code updating the watchpoint registers so that it
can be used to update breakpoint registers. Then do so, when
something has set up the breakpoint state used by this code.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Properly detect all of these, including the "2" variants;
and bugfix parameter display for LDC and STC.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
ITR register handling seemed to be giving me problems, so I updated
the comments to better say what the code is trying to do ... and to
note the preconditions (one of which seems to be an issue) as listed
in the ARM1136 TRM.
Also removed the unused "ARM11_TAP_DEFAULT" from the ITR scan code;
all the callers already specify an exit path, since this register
isn't usable with such vague semantics.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This fixes the issue under native win32 of the socket interface not being
enabled (via WSAStartup) before init is called from a script.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
I neglected to copy Magnus' copyright when I moved several
declarations from the ARMv7-M header.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Bugfix the read side of flash protection:
- read the right register(s)!
- handle more than 64K
- record the results in the right places
- don't display garbage.
Partially bugfix the write side:
- use 2KB lock regions instead of 1KB pages (!)
- validate input range
- don't try to _remove_ protection (it's write-once)
- #define values we'll need to commit writes.
- ... still doesn't handle pages over 64KB mark, or commit writes
And minor cleanup and fixes:
- get rid of some forward decls
- properly locate a doxygen comment
- fix some bad indentation
- remove superfluous #include
- add a new part ID (many are still missing)
- make the downloaded algorithm code be read-only
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
These were all basically "can't happen" cases ... like having
state be corrupted by an alpha particle after the previous check
for whether a value was in-range.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Most of these happened to be in the target.h file.
Some of those are associated with symbols that could be
removed at some point ... e.g. NVP_ASSERT/true and its
sibling NVP_DEASSERT/false.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The exception being declarations for drivers. Those should
be split out in some clean way -- like driver add/remove calls
made by initialization code -- but that's for another day.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
It's as if despite integers being 32-bits, GCC refuses to
convert a "uint32_t" to one of them.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Low latency low CPU processing power systems(embedded)
will benefit greatly from being able to inline certain
jtag_add_xxx() fn's. The trick is that this has to be
done in such a way as to allow implementing an OpenOCD
API with a shared library(eventually) on a PC hosted
OpenOCD.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Some versions of GCC don't understand that if you mask with 0x3
then have cases 0-3, it's not possible for a variable assigned in
all those branches to have no value at end-of-case. Feh.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
When starting up, say how many hardware breakpoints and watchpoints
are available on various targets.
This makes it easier to tell GDB how many of those resources exist.
Its remote protocol currently has no way to ask OpenOCD for that
information, so it must configured by hand (or not at all).
Update the docs to mention this; remove obsolete "don't do this" info.
Presentation of GDB setup information is still a mess, but at least
it calls out the three components that need setup.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Provide and use debug_reason_name() instead of expecting targets
to call Jim_Nvp_value2name_simple(). Less dependency on Jim, and
the code becomes more clear too.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Have various ARM cores delegate to arm_arch_state() to display
basic information, instead of duplicating that logic.
This shrinks the code, makes them all report when semihosting
is active, and highlights which data are specific to this core.
(Like ARM720 not having separate instruction and data caches.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add a brief "setup with no customization" note showing the
how easily things can work if standard OpenOCD config scripts
already exist. We've had some new users comment that this
information is needlessly hard to find, so that starting to
use OpenOCD is more difficult than it should be.
Plus describe a few other issues that come up when setting
up an OpenOCD server.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Move most declarations in <target/armv4_5.h> to <target/arm.h>
and update users.
What's left in the older file is stuff that I think should be
removed ... the old register cache access stuff, which makes it
awkward to support microcontroller profile (Cortex-M) cores.
The armv4_5_run_algorithm() declaration was moved too, even
though it's not yet as generic as it probably ought to be.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Rename some (mostly) generic ARM functions:
armv4_5_arch_state() --> arm_arch_state()
armv4_5_get_gdb_reg_list() --> arm_get_gdb_reg_list()
armv4_5_init_arch_info() --> arm_init_arch_info()
Cores using the microcontroller profile may want a different
arch_state() routine though.
(Also fix strange indentation in arm_arch_state: use tabs only!
And update a call to it, removing assignment-in-conditional.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Move the ARM opcode macros from <target/armv4_5.h>, and a few
Thumb2 ones from <target/armv7m.h>, to more appropriate homes
in a new <target/arm_opcodes.h> file.
Removed duplicate opcodes from that v7m/Thumb2 set. Protected
a few macro argument references by adding missing parentheses.
Tightening up some of the line lengths turned up a curious artifact:
the macros for the Thumb opcodes are all 32 bits wide, not 16 bits.
There's currently no explanation for why it's done that way...
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Get rid of mrc_opcode() in favor of ARMV4_5_MRC() or, where
arm*20t should have used it, ARMV4_5_MCR() instead.
Basically, *writing* coprocessor registers shouldn't have
used the *read* opcode ... and both should stick to standard
opcode constructors, not rearranging parameter sequence any
more than already needed.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The SRS and RFE instructions speed exception entry/exit by
making it easy to save and restore PC and SPSR. This handles
both ARM and Thumb2 encodings.
Fix minor PLD goofage; that "should never reach this point"
can't happen, so remove it.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The low two bits are defined as should-be-zero-or-presereved.
We'll take the zero option, it's easier to enforce.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Behave like OMAP3530: force global software reset. Given the
patch to teach ARM11 how to use these events, and use VCR to
catch the reset vector, this works better than either the
current reset logic or than using SRST.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Rename the existing 'flash banks' implementation as 'flash list', and
replace the broken 'flash_banks' TCL wrapper with a new command handler.
Adds documentation for the new 'flash list' command in the user guide.
The 'flash banks' command produces a list that needs to be formatted
properly for GDB's 'mem info' to work properly. The flash_banks TCL
wrapper provided this formatting, but wrappers no longer work for
second-level commands as they did in the past. With this patch,
the 'flash_banks' command can be used with the new command syntax
and display the required information.
Fall back to software breakpoint when vector catch isn't available.
Possible enhancements:
- add extra optional command parameter to select high vectors
- add extra optional command parameter to select hardware breakpoint
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Rename nand.h as flash/nand/core.h, chase consumers. The public APIs
need to be sorted out with imp.h, but this allows other changes to
begin improving the separation between policy and mechanism.
Moves #include <target/target.h> and #include "driver.h" into the
internal headers or source files, removing it from <flash/nand/core.h>.
Moves commands into nand/tcl.c and core implementation to 'nand/core.c'
and 'nand/fileio.c'. Eliminates 'flash/nand.c'.
Adds 'nand/imp.h' to share routines between TCL commands and core.
This work parallels the NOR directory, encapsulating the NAND drivers
into a separate file. This takes an extra step by encapsulating the
type of data structure used to manage the drivers, allowing it to be
changed from an array to a dynamic list in the future.
Remove an undesirable use of the CPSR symbol ... it needs to vanish.
Flag mode-to-number stuff as obsolete; say why ... should also vanish.
Get rid of no-longer-used mode and state typedefs.
Comment a few of the implicit ties to "classic ARM".
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
As with Cortex-A8, the WFAR register holds useful information
that should be recorded and, where relevant, displayed.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Tweak scanchain 7 debug messaging:
- show register addresses in decimal, matching ARM docs;
- remove some pointless noise
Avoid some needless roundtrips:
- skip SCAN_N when SCREG already holds that number (speeds up
polling and other common operations)
- avoid zeroing vcr twice on resume
Show the IR opcode as a label ("RESTART") too; and in decimal,
matching ARM docs.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Move the bulk of the flash.h file into flash/nor/core.h, leaving an
empty husk that will be removed in the next patch.
The NOR driver structure is an implementation detail, so move it into
its own private header file <flash/nor/driver.h> along with helper
declaration for finding them by name.
Splits the exec mode commands out of flash.c into the flash/nor/ files.
The routines used by these high-level commands are moved into nor/core.c,
with their internal declarations placed in nor/imp.h.
Fixes distribution of <flash/nor/core.h> header.
Clean up arm_semihosting() entry a bit, comment some issues and just
which SVC opcodes are getting intercepted. Microcontroller profile
cores will need a new entry, since they use BKPT instead (and don't
have either SVC mode or an SPSR register).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Store a flag and errno in in "struct arm".
Have "poll" output report when semihosting is active.
Shrink some of the affected lines.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
List it in the concept index, in the section about target software
changes a project might want to consider, and in the section about
debug messaging.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The newly moved flash TCL routines access the internals of the module
too much. Fix the layering issues by adding new core NOR flash APIs:
<flash/nor/core.h>:
- flash_driver_find_by_name() - self-descriptive
<flash/nor/imp.h>:
- flash_bank_add() - encapsulates adding banks to bank list
- flash_bank_list() - encapsulates retreiving bank list
This allows the externs in flash/nor/imp.h to be removed, and
these mechanisms may now be re-used by other flash module code.
Moves the top-level 'flash' command handlers into flash/nor/tcl.c,
with flash/nor/imp.h providing an internal implementation header
to share non-public API components.
After previous efforts, only one Jim routine remained in jtag/core.c,
and moving it to jtag/tcl.c painlessly finishes separating these layers.
The headers need separating, but the implementation is clean.
When calling module_register_commands, the return value needs to be
checked for failures. Instead of duplicating code, use an array of
function pointers to the identical registration functions to iterate
over during startup.
Semihosting enables code running on an ARM target to use the
I/O facilities on the host computer. The target application must
be linked against a library that forwards operation requests by
using the SVC instruction that is trapped at the Supervisor Call
vector by the debugger. The "hosted" library version provided
with CodeSourcery's Sourcery G++ Lite for ARM EABI is one example.
This is currently available for ARM9 processors, but any ARM
variant should be able to support this with little additional work.
Tested using binaries compiled with Sourcery G++ Lite 2009q1-161
and ARM RVCT 3.0.
[dbrownell@users.sourceforge.net: doc tweaks, NEWS]
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Updates the ARM NAND I/O code to look at and update the op
field of arm_nand_data to reflect the last operation performed.
It uses this field to copy the correct code to the target in the
case where the struct is used for reads and writes.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Modify the arm_nand_data struct to better support both read and
write operations while using the same struct. An additional
field was added, and initialized, to record the last operation
so that the correct code can be loaded to the working area.
[dbrownell@users.sourceforge.net: merge init patch, tweak GPL note]
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Created a new function that handles sending a command and the address
information for pages to a NAND device.
[dbrownell@users.sourceforge.net: tweaked line lengths, name 'oob_only']
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Punt to the armv4_5_arch_state() for all the common stuff, to
shrink code and so we will get any improvements it provides.
Don't hide watchpoint status if we happen to be in "abort" mode.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
No point in both ARM11 and Cortex-A8 having private copies
of the logic sorting out e.g. DBG_REASON_WATCHPOINT.
Add and use a shared routine for this ... there's actually
a bunch more debug entry logic that could be shared, this
is just a start on that. Note that this routine fixes a
bug observed in the ARM11 code, where some abort mode quirks
were displayed as being an unknown debug reason; and also
silences needless ARM11 chatter.
Likewise with private copies of DSCR ... add one to the DPM
struct. Save it as part of setting DBG_REASON_* so later
patches can switch over to using that copy.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
For the bits now defined in "arm_dpm.h", switch to the
shared DSCR_* symbol and remove the ARM11_DSCR_* version.
Define DSCR_INT_DIS and use it instead of the ARM11_DSCR_*
sibling symbol. (Note: for both ARM11 and Cortex-A8, this
should arguably be enabled by default when single stepping.)
Remove some other unused declarations in "arm11.h".
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Move the symbols for these bits from "armv7a.h" to "arm_dpm.h",
where they can be seen and used not just by Cortex-A but also
by the ARM11 (armv6) code.
Change them from bit numbers to bit masks ... this matches the
usage in ARM11 code, and also makes it easier to read.
Rename DSCR_EXT_INT_EN as DSCR_ITR_EN to match the docs; it's
enabling ITR functionality, not external interrupts, so this
changes the name to be less misleading. (There *IS* a bit
affecting interrupts, and this isn't it.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This makes Beagle work again, instead of losing horribly because
the JTAG event handlers are no longer able to e.g. "runtest". I
get the previous quirky behavior ... comes up OK but "reset halt"
somewhat mysteriously makes it all better. (Instead of nothing
being able to work at all...) However, I'm still seeing:
The 'init' command must be used before 'init'.
That seems to come from invoking "jtag init", sometime after it
gets mapped to "ocd_jtag init", according to debug message traces.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
To prevent regression in the behavior of 'init', we allow it to run in
any mode. If provided with -c init and with -c noinit, then the second
init at startup caused a spurious mode failure. Let 'init' handle it.
Use a separate variable for iterating GDB service port numbers than
the one set by the user. Restores the behavior of returning the
original port number and only incrementing the port used on success.
now compiles again after include files were moved about
to reduce -I usage and stop using quotes but rather
angle brackets for include files.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Before we can -I the top-level src/ directory alone, references to
"hello.h" must be updated. This is an internal header, so it does
not need angle brackets.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "xsvf.h"
the following form should be used.
#include <xsvf/xsvf.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "svf.h"
the following form should be used.
#include <svf/svf.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "pld.h"
the following form should be used.
#include <pld/pld.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "telnet_server.h"
the following form should be used.
#include <server/telnet_server.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "server.h"
the following form should be used.
#include <server/server.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "httpd.h"
the following form should be used.
#include <server/httpd.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "gdb_server.h"
the following form should be used.
#include <server/gdb_server.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "s3c24xx_regs.h"
the following form should be used.
#include <flash/nand/s3c24xx_regs.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "ocl.h"
the following form should be used.
#include <flash/nor/ocl.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "nand.h"
the following form should be used.
#include <flash/nand.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "mflash.h"
the following form should be used.
#include <flash/mflash.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "flash.h"
the following form should be used.
#include <flash/flash.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "arm_nandio.h"
the following form should be used.
#include <flash/arm_nandio.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "trace.h"
the following form should be used.
#include <target/trace.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "target_request.h"
the following form should be used.
#include <target/target_request.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "target.h"
the following form should be used.
#include <target/target.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "register.h"
the following form should be used.
#include <target/register.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "mips_ejtag.h"
the following form should be used.
#include <target/mips_ejtag.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "mips32_pracc.h"
the following form should be used.
#include <target/mips32_pracc.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "mips32.h"
the following form should be used.
#include <target/mips32.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "image.h"
the following form should be used.
#include <target/image.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "etm.h"
the following form should be used.
#include <target/etm.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "embeddedice.h"
the following form should be used.
#include <target/embeddedice.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "breakpoints.h"
the following form should be used.
#include <target/breakpoints.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "avrt.h"
the following form should be used.
#include <target/avrt.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "armv7m.h"
the following form should be used.
#include <target/armv7m.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "armv7a.h"
the following form should be used.
#include <target/armv7a.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "armv4_5_mmu.h"
the following form should be used.
#include <target/armv4_5_mmu.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "armv4_5_cache.h"
the following form should be used.
#include <target/armv4_5_cache.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "armv4_5.h"
the following form should be used.
#include <target/armv4_5.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "arm_jtag.h"
the following form should be used.
#include <target/arm_jtag.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "arm_dpm.h"
the following form should be used.
#include <target/arm_dpm.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "arm_adi_v5.h"
the following form should be used.
#include <target/arm_adi_v5.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "arm9tdmi.h"
the following form should be used.
#include <target/arm9tdmi.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "arm966e.h"
the following form should be used.
#include <target/arm966e.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "arm7tdmi.h"
the following form should be used.
#include <target/arm7tdmi.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "arm7_9_common.h"
the following form should be used.
#include <target/arm7_9_common.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "arm11.h"
the following form should be used.
#include <target/arm11.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "algorithm.h"
the following form should be used.
#include <target/algorithm.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "minidriver.h"
the following form should be used.
#include <jtag/minidriver.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "jtag.h"
the following form should be used.
#include <jtag/jtag.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "interface.h"
the following form should be used.
#include <jtag/interface.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "commands.h"
the following form should be used.
#include <jtag/commands.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "types.h"
the following form should be used.
#include <helper/types.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "time_support.h"
the following form should be used.
#include <helper/time_support.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "replacements.h"
the following form should be used.
#include <helper/replacements.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "membuf.h"
the following form should be used.
#include <helper/membuf.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "log.h"
the following form should be used.
#include <helper/log.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "jim.h"
the following form should be used.
#include <helper/jim.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "ioutil.h"
the following form should be used.
#include <helper/ioutil.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "fileio.h"
the following form should be used.
#include <helper/fileio.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "configuration.h"
the following form should be used.
#include <helper/configuration.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "command.h"
the following form should be used.
#include <helper/command.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "binarybuffer.h"
the following form should be used.
#include <helper/binarybuffer.h>
The exception is from .c files in the same directory.
Includes the src directory in the search path, so header files may be
migrated from:
#include "foo.h"
to
#include <module/foo.h>
which is more conducive for installation.
Moves JTAG interface drivers to src/jtag/drivers/,
Adds src/jtag/drivers/Makefile.am.
Builds libocdjtagdrivers.la.
Flattens the rlink driver files into the drivers/ directory, adding
the 'rlink_' prefix or '.rlink' suffix as appropriate.
Remove the remaining extra copy of DSCR, and the register cache
of which it was a part. That cache wasn't a very safe, or even
necessary, idea; it was essentialy letting debugger-private state
be manipulated by Tcl code that couldn't know how to do it right.
This makes the "reg" output of an ARM11 resemble what most other
ARM cores produce ... forward motion in the "make ARM11 work like
the rest of the ARM cores" Jihad!
Just store a clean copy of DSCR in the per-CPU struct, so we
trivially pass a pointer to a recent copy. This replaces the
previous "last_dscr" and cleans up most of the related calling
conventions ... but it doesn't remove the other DSCR copy.
Don't expose the WDTR register through the register cache any
more. If anyone wants Tcl scripts to be able to use DCC based
communication with app code in the target, this wouldn't do it.
Bugfix: don't trust the Tcl-accessible version of DSCR to
flag whether WDTR needs to be restored when resuming.
Don't expose the RDTR register through the register cache any
more. If anyone wants Tcl scripts to be able to use DCC based
communication with app code in the target, this wouldn't do it.
Bugfix: don't trust the Tcl-accessible version of DSCR to
flag whether RDTR needs to be restored when resuming.
Streamline arm11_on_enter_debug_state() entry:
- It should handle the standard updates:
* target->debug_reason
* target->state
- Don't waste time re-reading DSCR; just pass it in
Also rename the routine to "arm11_debug_entry()", matching the
convention used elsewhere in OpenOCD.
The new stubs for httpd and ioutil gave errors like:
ioutil_stubs.c: In function ‘ioutil_init’:
ioutil_stubs.c:27: error: implicit declaration of function ‘LOG_DEBUG’
ioutil_stubs.c:28: error: ‘ERROR_OK’ undeclared (first use in this function)
ioutil_stubs.c:28: error: (Each undeclared identifier is reported only once
ioutil_stubs.c:28: error: for each function it appears in.)
Fix.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add httpd_stubs.c to provide no-op implementations of httpd_start()
and httpd_stop().
Allows these routines to be called unconditionally and ensures the
libocdserver ABI remains unchanged regardless of whether this feature
was built-in or not.
Prints a DEBUG message when the stub implementation is included.
Add ioutil_stubs.c to provide an empty ioutil_init() routine.
Add ioutil.h to prevent applications from needing to declare it.
Allows unconditionally calling that function during startup, and the
resulting libocdhelper library API is now more stable.
Prints a DEBUG message when the stub implementation is included.
Save and display the address of the instruction which triggered the
watchpoint. Because of pipelining, that's well behind the PC value
when debug entry completes. (Example in a subroutine that had been
returned from...)
Remove unused A8 stuff, mostly watchpoint hooks from the header.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Except for USR/SYS mode, the labels for the shadowed SP and LR
registers were reversed. LR is r14; SP is r13. Fix.
This would not affect GDB users; GDB references are positional.
Only folk working directly with OpenOCD register values would
have noticed this bug.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Actually this should handle both breakpoints and watchpoints ... but
the DPM framework only handles watchpoints for now. Works on Beagle.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This is a NOP unless the underlying core exposes two new methods, and
neither of the two cores using this (ARM11xx, Cortex-A8) do so yet.
This patch only updates those cores so they pass a flag saying whether
or not to update breakpoint and watchpoint status before resuming; and
removing some now-needless anti-segfault code from ARM11. Cortex-A8
didn't have that code ... yes, it segfaulted when setting watchpoints.
NOTE: this uses a slightly different strategy for setting/clearing
breakpoints than the ARM7/ARM9/etc code uses. It leaves them alone
unless it's *got* to change something, to speed halt/resume cycles
(including single stepping).
ALSO NOTE: this under-delivers for Cortex-A8, where regions with size
up to 2 GBytes can be watched ... it handles watchpoints which ARM11 can
also handle (size 1/2/4 bytes). Should get fixed later.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
In embedded hosts, the Jim interpreter can come from the
existing context rather than be created by OpenOCD.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
We don't need this code, now that the DPM code handles it.
Neither do we need the ARMv7-A CP15 operations; remove their
remnants too. And disable a mostly-needless diagnostic.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Instead of having separate ARM11 and Cortex-A8 implementations of
this code, have one shared implementation which just builds on the
existing "run instruction via R0" support.
This enables followup patches to remove that now-unused code from
those two drivers. (Patches to move the "mrc" and "mcr" code into
"struct arm" are due too ... MIPS and other cores do not support
those ARM-specific concepts.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Switch "mrc" and "mcr" commands to be toplevel ARM operations,
as they should initially have been.
Correct the usage message for both commands: it matches ARM
documentation (as one wants!) instead of reordering them to
match the funky mrc() and mcr() method usage (sigh).
For Cortex-A8: restore a line that got accidentally dropped,
so the secure monitor mode shadow registers will show again.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The ARMv7-A code uses read_cp15() to access fault registers.
Instead, use DPM operations directly, passing in the relevant
MRC instructions.
This eliminates per-operation overhead (though it'll be hard
to observe, this is uncommon) and helps eliminate read_cp15().
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
There were two chunks of Cortex-A8 code which called the
ARMv7-A CP15 operations; get rid of them, helping prepare
to remove those methods completely:
- post_debug_entry() can use the mrc() method to read
its two registers.
- write_memory() can use dpm->instr_write_data_r0() to
flush the ICache and DCache ... doing it this way is
actually faster since it reduces per-write overhead.
Note that the mrc() method parameters are re-ordered with
respect to the ARM instruction documentation, so that part
can be confusing.
Cleaned up the layout and comments in those areas a bit.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
There is no particular reason to invoke jtag_interface_quit()
on the atexit() handler, it just makes the code more obtuse
and stops other legitimate usage of atexit().
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Ensures that the correct information gets displayed, depending on the
mode of the command being denied. Fixes misreporting all commands as
needing to run "before 'init'".
Clean up two aspects to this routine: bad naming, since it
doesn't restore the context, just the banked registers; and
excess indentation for the bulk of the code.
Also make some of its call sites stash the function's return
code; someday they should use it for error checking.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This "loop over all registers" routine shared the same mess as
full_context() in terms of dozens of needless number_to_mode()
calls. Fix that, and comments, with related cleanup.
The misnamed xscale_restore_context() had a related bug. It
was restoring the *WRONG REGISTERS* ... always from whatever
the current mode was, instead of using the copy from whichever
register bank it was trying to restore. (But it marked the
intended register as having been restored...) Fixed that.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Finish removing references to the 'interp' global variable from the
command module, encapsulating all reference via command_context.
Eliminates use of the global entirely, so it can be removed. Hurrah!
Adds a log_capture_state structure to pass to the log capture
callback used by the command module. Ensures that the capture occurs
in the proper context.
The 'help' text will become more verbose, so its entire text will be
far more than desired when you only borked your syntax. The usage
still allows the commands to be looked up for more help.
command_done() does not need to return an error, but it needed
Doxygen comment. Provide some for copy_command_context as well.
Note: this audit revealed some potential bugs with the command context
implementation. There was a reason that commands were added at the
end of the list. Shallow copying of command_context means that
the list is shared between them. And commands added at the top-level
before the pre-existing commands will not be available in the shared
context as they were before. Yikes!
Fortunately, this does not seem to occur in general use, as
'add_help_text' gets registered in startup.tcl and claims the first slot
in my own test cases. Thus, it seems that we have been masking the issue
for now, but it shows the need for further architectural improvement in
the core command module.
With the ability to defer 'init', users can access the help system while
still in CONFIG mode. This patch omits commands from the help and usage
list when they cannot be run in the current command mode, making it much
easier to see what can be done at a given time.
Adds 'noinit' command to prevent OpenOCD from running 'init' at the end
up startup, allowing it to be given from telnet or TCL. This provides
the old behavior by default, and users can add this command to their
scripts to get the new behavior.
Moves the telnet and TCL server startup to server_init(), moving their
respective command registration in to server_register_commands().
Adds proper error checking for these particular startup processes.
Moves the core server startup to openocd_main(), improving related error
checking and preparing to defer 'init'.
Rework gdb_init to create flexible APIs (gdb_target_add_{one,all}) and
static helper (gdb_target_start) for starting GDB services. Eliminates
duplicated code and provides general mechanisms for adding GDB services.
The 'init' command is updated to call the new API, and later patches can
decouple its policy of adding all targets therein.
Provides the new capability to use both piped and TCP servers when
multiple targets are defined. The first target fills the pipe, and
others will be started on TCP ports (unless disabled, i.e. gdb_port=0).
Add missing COMMAND_REGISTRATION_DONE.
For now the command syntax for zy1000 needs to be compatible
across 0.3/0.4, the world outside OpenOCD interfaces to
zy1000 using the old syntax. Post 0.4 release(0.4.1 even)
I'll switch to subcommand scheme.
Switch to subcommands post 0.3 lifecycle.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Streamline the loop by continuing as soon as we know there's no
work to be done; this lets us un-indent almost everything.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
When fetching all the registers, XScale was doing various stupid
things like calling number_to_mode() a few dozen times instead of
just once, and mapping access to each register three times (again,
instead of just once). Stop that.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use the new mapping interfaces in the debug entry path.
SPSR and the banked registers now have smaller and faster
accessors ... use them.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Code other than main() may invoke "init". When it does so,
customized handlers may need to run ... so make sure the
command context state is updated before they do so.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Those commands presume support for the "classic" set of CPU
modes (FIQ, supervisor, IRQ, etc) ... which aren't supported
by the ARMv7-M or ARMv6-M architectures. They also presume
a "struct arm" base type, which this code doesn't use.
We haven't cleaned up the register handling enough to be able
to share any of those "base" methods.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Eliminate the monolithic tcl_target_func by registering each of its
commands using the new chained command registration mechanism.
Also chains the target's commands under the CPU command, though these
may not work properly without some further modification.
The 'target' command group was implemented using its own command
dispatching, which can be eliminated by using the new chained command
registration mechanism. This patch splits the jim_target() function
into individual handlers, which makes them to be visible to the help and
usage commands. These one-trick handlers are much easier to understand.
Splits bulk of the jtag_tap_configure into jtag_tap_configure_event,
removing three or four levels of indentation in the process.
The resulting code was stylistically improved in other ways, but it
should be functionally identical.
Moves the tertiary jim handlers and required static helpers to the top
of tcl.c, defining them in a new registration array that is chained in
both the top-level context and under the jtag command. The top-level
commands can be removed at some point in the future to reduce clutter.
Explodes the 'jtag' into separate command handlers, which are easier
to understand and extend. Makes the code much easier to understand,
though further simplifications are possible. This patch tries to
minimize the noise when viewed with 'git diff -w'.
Gives these commands improved built-in help and usage information.
Two 'rm' commands were implemented and registered. This removes the
version that would have never been called prior to refactoring the
command registration.
Adds checks for memory allocation failures. Started to use calloc()
instead of malloc()/memset(), but I got carried away. This kind of work
should be done throughout the tree, but it's almost hopeless at present.
Splits the check for a command's ability to run into a helper.
This also fixes a bug whereby commands that specified COMMAND_EXEC
were allowed to run during the configuration stage. This allowed
problematic commands to be called before 'init', defeating the intention
of specifying that command mode. With this change, the run_command()
helper denies access to handlers that should run only after 'init'
during the configuration stage.
Presently, commands registration taks a static handler data pointer.
This patch adds support for commands that require a dynamic pointer,
such as those registered in a dynamic context (e.g. subcommands for a
user-created 'foo.cpu' command). The command_set_handler_data will
update a command (group) to use a new context pointer, while the
CMD_DATA macro allows command handlers to access the value.
Jim handlers should find this value in interp->cmdPrivData.
Updates command registration to provide top-level handlers for all
commands, rather than falling back onto the 'unknown' command. Instead,
that same handler is registered for placeholders, providing the same
functionality under the root verb command name instead. This permits
users to implement their own 'unknown' function, and it resolves some
mind-bending breakage related to function object lookup while recursing.
Changes 'ocd_bounce' to call 'ocd_command' and 'ocd_help' from the
wrapper directly, rather than bouncing through their wrappers. This
prevents endless recursion caused by the above changes, whereby the
'command' wrapper's type check would blow the stack to hell and gone.
Adds 'ocd_bouncer' in startup.tcl that is called as a helper for
all command handlers, shrinking the embedded C wrapper to a mere stub.
Jim handlers are called directly, simple handlers get called with the
wrapper to capture and discard their output on error, and placeholders
call help directly (though the unknown handler still does this too).
It attempts to improve the quality of the error messages as well.
Adds the 'command' group handler, with the 'type' command producing
a string that tells whether the given command is 'native' (for Jim-based
command handlers), 'simple' (for simple built-in commands), 'group'
for command group placeholders, and 'unknown' if not found in the
command registration tables (e.g. core built-ins functions).
There is no DEBUG() macro; don't call one! Always at
least *parse* debug code, to help prevent such errors.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
In target_type.h it's documented that the target must be
halted for add_breakpoint() ... and with slight ambiguity,
also for its add_watchpoint() sibling. So rather than
verifying that constraint in the CPU drivers, do it in the
target_add_{break,watch}point() routines.
Add minor paranoia on the remove_*point() paths too: save
the return value, and print it out in in the LOG_DEBUG message
in case it's nonzero.
Note that with some current cores, like all ARMv7 ones I've
looked at, there's no technical issue preventing watchpoint or
breakpoint add/remove operations on active cores. This model
seems deeply wired into OpenOCD though.
ALSO: the ARM targets were fairly "good" about enforcing that
constraint themselves. The MIPS ones were relied on other code
to catch such stuff, but it's not clear such code existed ...
keep an eye out for new issues on MIPS.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use the new "reset-assert" event; else SRST; else fail.
Tested on an OMAP3, using the event.
NOTE: still doesn't handle "reset halt". For some reason
neither VCR nor PRCR seemed effective; they held the value
that was written, but VCR didn't trigger debug entry when
the reset vector fired (maybe the vector needs configuring?)
and PRCR refused to hold the chip in reset until deassert()
could force the core into debug state.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This defines a "reset-assert" event and a supporting utility
routine, and documents both how targets should implement it
and how config scripts should use it. Core-specific updates
are needed to make this work.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
When writing to a chip's "reset yourself" register, the ARM11 code
was reporting a spurious failure. Just don't bother checking for
correctly incremented pointers given single-unit writes ... it's
a bit faster that way too. (Reads should likely do the same thing.
For that matter, such checks are usually just a waste...)
Shrink an overlong parameter name, and associated lines'o'code.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The command refactoring caused subcommand handlers to produce duplicate
output when run. The problem was introduced by failing to ensure all
such invocations went through a top-level "catcher" script, prefixing
the command name with the 'ocd_' prefix and consuming its results.
The fix is to ensure such a top-level "catcher" script gets created
for each top-level command, regardless of whether it has a handler.
Indeed, this patch removes all command registrations for sub-commands,
which would not have worked in the new registration scheme anyway.
For now, dispatch of subcommands continues to be handled by the new
'unknown' command handler, which gets fixed here to strip the 'ocd_'
prefix if searching for the top-level command name fails initially.
Some Jim commands may be registered with this prefix, and that situation
seems to require the current fallback approach. Otherwise, that prefix
could be stripped unconditionally and the logic made a little simpler.
The same problem must be handled by the 'help' command handler too,
so its lookup process works as intended.
Overall, the command dispatching remains more complicated than desired,
but this patch fixes the immediate regressions.
Move device argument parsing after check for number of arguments;
otherwise, calling this command without any arguments would access
argv[0] before checking whether it even existed.
Fixed the header file to properly specify the doxygen documentation for the
items defined in it.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This updates the functions in the file to all have doxygen comments
describing what they do.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Created a function for copying code to the working area on
a target. The NAND write and read functions are updated to
include use of this function.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Implementation of the NAND read function for ARM NAND I/O that
includes running a local algorithm on a device to increase the
performance of block reads.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Just make these fail, instead of letting them write over
potentially random memory. Users should be able to work
around the lack of real implementations by disbling the
MMU by hand ... until someone provides a Real Fix.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Command upgrading introduced two off-by-one bugs in the flash commands.
This patch fixes the 'flash {protect,erase_sector}' commands to check
that they have been passed the correct number of arguments.
Ammended during commit to fix help text for 'erase_address' too.
Several of the sites now using target_type_name() really
ought to be using an instance-specific name. Create a
function called target_name(), accessing the instance's
own (command) name.
Use it in several places that really should be displaying
instance-specific names. Also in several places which
were already doing so, but which had no wrapper to call.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
There are two names that may matter on a per-target basis.
One is a per-instance name (for example, "at91sam7s.cpu").
The other is the name of its type (for example, "arm7tdmi"),
which is shared among multiple targets.
Currently target_get_name() returns the type name, which is
misleading and is rarely appropriate for target diagnostics.
Rename that as target_type_name().
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Removes redundant assignment of start_ms from log_register_commands().
Eliminates command_context parameter and return value.
Adds Doxygen comment block for this API call.
Alliteration aside, this should provide the final piece of the puzzle
for developers that want to get started writing a new target type.
In this way, it also seeks to complement the 'dummy' interface driver
and 'faux' NOR flash driver.
Removes hello and foo commands from top-level registration. Instead,
the dummy interface driver and faux flash driver have been augmented
to register these commands as sub-commands.
Factors log capture while running script commands, eliminating
duplicated code between script_command and jim_capture. Factors
setting a command's Jim "retval" into a new helper as well.
Using these new helpers in the new unknown command handler's
fixes possible regressions caused by these bits being missing.
The add_usage_text command uses the same C handler, which was updated
to support its new polymorphic role. This patch updates the two script
commands that needed this support: 'find' and 'script'.
Updates httpd_start() to use register_commands() for 'readform' and
'writeform' commands. Adds server/httpd.h to export the new signatures
for this function (and httpd_stop), which allows removing the obsoleted
declarations inside openocd.c.
Adding jim_handler field to command_registration allows removing the
register_jim helper. All command registrations now go through the
register_command{,s}() functions.
Converts callback to an array of command_registration records.
Moves oocd_trace driver definition to end of file to eliminate
useless forward declaration.
Uses chaining of command_registration structures to eliminate all
target_type register_callback routines. Exports the command_handler
registration arrays for those target types that are used by others.
Changes the jtag_interface->register_callbacks field to a list of
commands to be registered. Changes callback to invocation of
register_commands() with that command registration list. Removes all
JTAG interface driver register_command callback functions, which the
previous commits had converted into identical calls.
Use register_commands() with command registration array.
---
This module was broken by previous changes, but no one has complained.
Are there still users for this modules?
Use the new command registration chaining capabilities to eliminate
the foo_register_commands helper, folding its remaining command
handler setup into the hello_command_handlers registration array.
Adds the ability to chain registration structures. Modules can define a
command with the 'chain' and 'num_chain' fields defined in their
registration table, and the register_commands() function will initialize
these commands. If the registration record creates a new command, then
the chained commands are created under it; otherwise, they are created
in the same context as the other commands (i.e. the parent argument).
Use register_commands() to register low-level command handlers,
adding a builtin_command_handlers declaration that is easy to understand.
Splits help and usage information into their appropriate fields.
Adds the usage command, to display usage information for commands.
The output for this command will remain erronenously empty until
commands are updated to use these new coventions.
The register_commands API takes multiple commands in one call, allowing
modules to declare and pass a much simpler (and more explicit) array of
command_registration records.
Add a structure to encapsulate command registration information, rather
than passing them all as parameters. Enables further API changes that
require additional required or optional parameters.
Updates the register_command API and COMMAND_REGISTER macro to use it,
along with their documentation.
Provides a migration path for the widely used register_command API,
which needs to be updated to provide new functionality.
This macro allows the API to change without having to update all of its
callers at the same time.
There was a lot of needless handshaking overhead in the current
Cortex-A8 DCC/ITR operations, since the status read by each step
was discarded rather than letting the next step know it.
This shrinks the handshaking by: (a) passing status along from
previous steps, avoiding re-fetching; which enables the big win
(b) relying on a useful invariant: that the DSCR_INSTR_COMP bit
is set after every call to a DPM method.
A "reg sp_usr" call previously took 17 flushes; now it takes just 9.
This visibly speeds common operations like entry to debug state and
stepping, as well as "arm reg" and so on.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This replaces two versions of register access functions. One
was commented out, and seemed to have uncertain intent. The
other was fairly new, and helped motivate the DPM framework
once I observed that the ARM11 was doing the very same ops.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This implements the DPM interface for Cortex-A8 cores. It
also adds a synchronization operation to the DPM framework,
which is needed by the Cortex-A8 after CPSR writes.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make various functions static, add some comments, report
vector catch as a flavor of DBG_REASON_BREAKPOINT, get
rid of needless/undesirable ARMV4_5_CORE_REG_MODE, etc.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The previous implementation was unnecessarily complex. Get rid of the loops,
let vsnprintf() tell us directly how much storage we need and allocate that. A
second pass writes the actual string. Also add a va_end() that was missing.
This should be much faster for large strings and less wasteful for small ones.
A quirk that has been retained is that some callers patch in a newline at the
end of the returned string and depend on alloc_vprintf to allocate at least
one byte extra.
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Signed-off-by: Zachary T Welch <zw@superlucidity.net>
Rewrite rlink_init routine to use jtag_usb_open helper. Eliminates
some spurious calls to exit().
Wraps a tremendously long line of comment to fit 80 columns too.
Begins to consolidate code used by several USB JTAG interfaces.
This first patch provides the required build system changes and
a common jtag_usb_open routine, which will replace the guts for
probing the busses and devices for possible VID/PID matches.
The following patches convert each driver to use it.
This finishes the basic switchover to the new register code,
for everything except the debug registers. (And maybe we
shouldn't have a cache for *those* which works this way...)
The context save/restore code now uses the new code, but
it's in a slightly different sequence. That should be fine
since the R0/PC/CPSR stuff is all that really matters (and
if we can update those, we can update the rest).
Now there's no longer a way any code can be confused about
which copy of "r1" (etc) to use.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
As with single stepping, the previous stuff was needed because
the ARM11 code wasn't using the standard ARM base type and
register access ... but now those mechanisms work, so we can
switch out that special-purpose glue, in favor of the more
thoroughly tested/capable "standard" code.
Fixes a bug in the resume() implementation: it wasn't handling
two of its arguments correctly, preventing the "flash erase_check"
algorithm from working. (This code needs a *subsequent* update
for correct register handling, though... removing the confusion
about which "r2", for example, to use.)
This should resolve some "FIXME" comments too, for Thumb and
processor mode support. It also gets rid of a nasty exit()
call; servers should only have *clean* shutdown paths.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The previous stuff was needed because the ARM11 code wasn't using
the standard ARM base type and register access ... but now those
mechanisms work, so we can switch out that special-purpose glue.
This should resolve all the "FIXME -- handle Thumb single stepping"
comments too, and properly handle the processor's mode. (Modulo
the issue that this code doesn't yet handle two-byte breakpoints.)
Clarify the comments about the the hardware single stepping. When
we eventually share breakpoint code with Cortex-A8, we can just make
that be the default on cores which support it. We may still want an
override command, not just to facilitate testing but to cope with
"instruction address mismatch" not quite being true single-step.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This provides "standard" ARM register support -- with twenty or
more shadow registers on top of what this code now handles, but
properly associated with the various core modes -- parallel to
the current register code. That is, the current code is stilil
managing the "current" registers; the new code shadows them.
You can see all the registers with "arm reg", modify the shadows
like "r8_fiq" or "sp_abt" with "reg", and see them get properly
written back when you step. (Just don't do that with any of the
registers managed by the "old" code ...)
It also switches to using more standard code, relying on those
standard registers, in two places: (a) the poll status display,
which now shows core state (ARM/Thumb/...) and mode (Supervisor,
IRQ, etc); and (b) GDB register access.
So it's not a full migration, there are warts -- every place that
touches the old register cache is a potential bug -- but it's a
small more-or-less-comprehensible step that's even somewhat useful.
Later patches complete the migration.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This was a private mechanism to snapshot registers before leaving
debug state, and then on reentry to optionally display what changed.
It was coupled to the private register cache, which won't be sticking
around in that form for much longer. Remove (instead of teaching
it how to handle *all* the registers).
(The idea is interesting, but we ought to be able to implement
this in a generic way. Ideally through Tcl scripts that can
automatically be invoked following debug entry...)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This is a very thin layer over some of the current ARM11
debug TAP utilities. The layer isn't yet hooked up.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
First version of interface for sharing code between ARMv6 and ARMv7a
debug modules ... now the architecture includes debug support. (Not
the same as for the trimmed-down v7m or v6m though!) This is a first
version of an interface that will let the ARM11 and Cortex-A8 support
share code, features, and bugfixes. Based on existing code from both
of those cores.
The ARM v7-AR architecture specification calls this commonality the
"Debug Programmer's Model (DPM)", which seemed to be an appropriate
acronym -- a TLA even! -- for use in our code. Made it so. :)
The initial scope of this just supports register access, and is geared
towards supporting top level "struct arm" mechanisms. Later, things
like breakpoint and watchpoint support should be included.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add $HOME/.openocd as the first default script search directory, allowing
the user to override the standard scripts.
Update the user guide with information on where OpenOCD expects to find
configuration files and scripts. Also fixed some minor formatting issues.
Add entry to NEWS as well.
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
For now there's no point in saving this stuff after examine()
checks it out as OK. Ditto exporting symbols that aren't
used outside of the module which defines them. In fact, those
two things needlessly complicate the code...
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make this code look more like the rest of the OpenOCD code.
- Use calloc() directly, not NEW() ... and fix some potential
memory leaks while we're at it.
- Remove FNC_INFO ... it's a NOP that just clutters things,
and it's trivial for developers to add tracing as needed.
- Replace FNC_INFO_NOTIMPLEMENTED with LOG_WARNING calls;
ditto. And stop having those call sites wrongly succeed!
- Waste less space with the CHECK_RETVAL() macro.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This will allow data to be allocated in read only
memory instead of on the stack. Speeds things up
and reduces stack usage.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
buf_set_u32() operated on an uninitialized stack
variable with non-byte boundaries, which led to
warnings about reading uninitialized stack.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Start using the arm_reg_current() call. This shrinks and speeds
the affected code. It can also prevent some coredumps coming from
invalid CPSR values ... the ARMV4_5_CORE_REG_MODE() macro returns
bogus registers if e.g. "Secure Monitor" mode isn't supported by
the current CPU.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
We don't need to use size_t in these places; so it's easy
to be rid of the need for this #ifdef and its MS-derived
portability problems.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
With -O3 when inlining aggressively the total stack usage will
be the sum of many fn's, which can easily get out of hand.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Have arm_set_cpsr() handle the two core state flags, updating
the CPU state. This eliminates code in various debug_entry()
paths, and marginally improves handling of the J bit.
Catch and comment a few holes in the handling of the J bit on
ARM926ejs cores ... it's unlikely our users will care about
Jazelle mode, but we can at least warn of Impending Doom. If
anyone does use it, these breadcrumbs may help them to find
the right path through the code.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Define arm_reg_current() ... returning handle to a given register,
and encapsulating the current mode's register shadowing. It's got
one current use, for reporting the current register set to GDB.
This will let later patches clean up much ARMV4_5_CORE_REG_MODE()
nastiness, saving a bit of code.
Define and use arm_set_cpsr() ... initially it updates the cached
CPSR and sets up state used by arm_reg_current(), plus any SPSR
handle. (Later: can also set up for T and J bits.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Stash a pointer to the CPSR in the "struct arm", to help get rid
of the (common) references to its index in the register cache.
This removes almost all references to CPSR offsets outside of the
toplevel ARM code ... except a pair related to the current ARM11
"simulator" logic (which should be removable soonish).
This is a net minor code shrink of a few hundred bytes of object
code, and also makes the code more readable.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Minor cleanup of ARM11 register handling: remove disabled
register hooks. This should all be handled by shared code,
and this stuff is just clutter.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add this to ease debugging why the standard scripts aren't
found on the default script search path in some build/install
enviroments. Especially on Windows it's not straight forward
where openocd actually looks for the scripts.
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Implementations need to access the register struct they modify;
make it easier and less error-prone to identify the instance.
(This removes over 10% of the ARMV4_5_CORE_REG_MODE nastiness...)
Plus some minor fixes noted when making these updates: ARM7/ARM9
accessor methods should be static; don't leave CPSR wrongly marked
"dirty"; note significant XScale omissions in register handling;
and have armv4_5_build_reg_cache() record its result.
Rename "struct armv4_5_core_reg" as "struct arm_reg"; it's used
for more than those older architecture generations.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Remove two commands that were documented as "debug commands"
and where "you probably don't want to use this". We never
intended to support them, and at least one problem report
boiled down to using this when it shouldn't have been used.
Update the docs on the existing register commands to talk a
bit more about register access and cache behavior. (Those
debug commands existed largely to *bypass* the cache.) And
fix some minor doc goofs that snuck in with recent changes,
renaming "armv4_5" as "arm" and "arm9tdmi" as "arm9".
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Rewrite means for scripts to register help text for commands. These
cause the new commands to be stored in the command heirarchy, with
built-in commands; however, they will never be invoked there because
they do not receive a command handler. The same trick is used for
the Jim commands.
Remove the old helpers that were used to register commands.
For the startup.tcl code to use built-in commands, the context must be
associated with the interpreter temporarily. This will be required to
add help text.
Rewrites 'help' command in C, using new 'cmd_help' for display. Adds the
built-in 'help' COMMAND_HANDLER to provide better output than the
TCL-based script command (e.g. heirarchical listing of commands).
The help string is stored in the command structure, though it conitnues
to be pushed into the Jim environment. The current idiomatic usage
suggests the addition of a usage field as well, to provide two levels
of detail for users to consume (i.e. terse usage list, or verbose help).
Creates a helper function, cmd_help, which displays the help string
for a single command. Presently, it is called from the loop in help.
The routine has been extended to allow indentation of command groups,
so an improved help command can improve the display of information.
Refactors the command registration to use helpers to simplify the code.
The unregistration routines were made more flexible by allowing them
to operate on a single command, such that one can remove all of a
commands children in one step (perhaps before adding back a 'config'
subcommand that allows getting the others back). Eliminates a bit
of duplicated code and adds full API documentation for these routines.
The previous version never wrote dirty registers
for non-current CPU modes ... fix that.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
We *should* be able to read and write registers in any core mode,
instead of being stuck with whatever mode the core was when we
entered debug state. This patch makes them work.
Note that the current restore_context() only handles the current
mode; writing to other-mode registers is a NOP without a followup
patch fixing that. Also, that SPSR access needed some bugfixes;
it was confused with CPSR.
Secure monitor mode also seems dubious; there's probably more to
be done before that's sufficiently understood by the debugger.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Create a generic register_cache_invalidate(), and use it to
replace three all-but-identical core-specific routines:
- armv4_5_invalidate_core_regs()
- armv7m_invalidate_core_regs
- mips32_invalidate_core_regs() too.
Make cache->num_regs be unsigned, avoiding various errors.
Net code shrink and simplification.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Move bulk of for-loop to a new static command helper function.
Adds handle_nand_list_drivers command handler, registered as
'nand drivers'.
Improves command help text and error reporting.
Move variables to point of first use, reducing their scope.
Add driver_name temporary to help arguments be changed later.
Eliminates the useless 'found' variable, changing the code to terminate
the loop immediate and return its success.
After adding support for referencing banks by name, renames
the COMMAND_HELPERs appropriately:
flash_command_get_bank_by_num -> flash_command_get_bank
nand_command_get_device_by_num -> flash_command_get_device
Add get_flash_bank_by_name (and get_nand_device_by_name) helpers
to retrieves struct flash_bank * (struct nand_device *) given a
driver name and an (optional) driver-specific bank index.
These are used to extend flash_command_get_bank_by_num (and
nand_command_get_device_by_num) to allow all flash (nand) commands to
reference defined banks by name, not just by number.
To avoid some code duplication, add the flash/common.[ch] files to hold
functionality common to both types driver. The first two methods are
helpers for the above routines to find a bank specified by a "name" or
"name.index" string. get_flash_name_index() finds the '.index' portion,
while flash_driver_name_matches() performs the string portion matching.
Just pre-allocate memory for the cached register value.
Shrinks heap overhead; increases locality-of-reference.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Combine register names with other per-register data into a
single template structure. This saves space, and makes it
easier to change how registers get handled (by shrinking
the number of places that care about cache indices).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The examine() method has some conceptual breakage. Cope
with it by manually splitting out the run-once parts from
the after-each-reset parts ... this gets rid of memory
leaks and speeds up resets after the first one.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
We don't want an ARMv7-specific core state enumeration just to
add ThumbEE state. Update the generic stuff to handle that,
and replace the V7-specific bits with it.
For Cortex-A8: on debug entry, check both the T and J bits
instead of just the T bit. When the J bit is set, set the
right state and warn appropriately.
(And while we're at it, move the generic arm struct to the front
of the v7a structure, for somewhat better code generation.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The only way ARMv7-A modes differ from ARMv4/ARMv5 flavors
is that v7-A is allowed to include "Secure monitor" support.
That's now handled by our standard top-level ARM code ... so
phase out the stuff that's specific to ARMv7-A.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Removing the fast command eliminates the fast_and_dangerous global,
which was used only by arm7_9_common as an initializer. The command
is not called in the tree; instead, more explicit commands are used.
The jim_global_long function was not used anywhere in the tree.
Adds the foo/bar commands to provide more working examples of command
argument parsing, including the new handle_command_parse_bool helper.
Updates hello command help text to provide useful information.
This patch changes the behavior of all boolean parsing callers to
accept any one of "true/enable/on/yes/1" or "false/disable/off/no/0".
Since one particular pair will be most appropriate in any given
situation, the specific macros should continue to be used in
order to display the most informative error messages possible.
Rewrite arm11_handle_bool to provide a generic on/off command helper.
Refactors COMMAND_PARSE_BOOL to use new command_parse_bool helper,
which gets reused by the new command_parse_bool_any helper.
This later helper is called by the new command helper function to
accepts any on/off, enable/disable, true/false, yes/no, or 0/1 parameter.
Updates all command parsing of simple "enable" and "disable" arguments.
A few case in the tree use a tri-state or extended arguments, which
cannot use this simple macro.
Simlifies the xscale icache/dcache command handler logic.
Adds several macros similar to COMMAND_PARSE_NUMBER, but for parsing
boolean command arguments. Two flavors are provided to provide
drop-in compatibility with existing code, allow for the elimination
of a lot of code bloat while improving the error checking and reporting.
COMMAND_PARSE_ON_OFF parses "on"/"off" command parameters.
COMMAND_PARSE_ENABLE parses "enable"/"disable" command parameters.
Both print the error and return an error out of the calling function.
Change the layout to show the "Secure Monitor" registers too,
when they're present.
Instead of lining registers for each of six (or seven) modes up
in adjacent vertical columns, display each mode's registers (or
shadows) in a single block, avoiding duplicate value displays.
This also lets us shrink the line length to fits in standard 80
character lines ... six or seven 18-character columns can't fit.
Relabel "r13" as "sp", so it's more meaningful.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
When we read the CPSR on debug entry, update the CPSR cache in all
cases, not just when the current processor state is User or System.
Plus minor cleanup of how the (too-many) other registers' cache
entries get updated.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
If the core doesn't provide an optimized version of this
method, provide one without core-specific optimizations.
Use this to make Cortex-A8 support the "arm reg" command.
Related: make the two register access methods properly static,
have the "set" log a "not halted" error too, and make sure
that the "valid" flag is set on successful reads.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
ARMv7-A doesn't need to duplicate all the standard ARM code
for register handling.
- Switch Cortex-A8 to use the standard register code
- Remove duplicated infrastructure from ARMv7-A
- Have ARMv7-A arch_state() show CPSR, like other ARMs
Add comments to show where the Cortex-A8 isn't actually doing
the right thing for register reads/writes, unless core happens
to be in the right mode to start with. (Looks like maybe there
may be generic confusion between saved/current PSR values in all
the ARM code ...)
Make related ARMv7-A and Cortex-A8 symbols properly static.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Teach the "armv4_5" register code to understand about the
secure monitor mode:
- Add the other three shadowed registers to the arrays
- Support another internal mode number (sigh) in mappings
- Catch malloc/calloc failures building that register cache
This should kick in for Cortex-A8 and ARM1176.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
It's used to flag cores with the "TrustZone" extension,
and is used in subsequent patches to set up support for
the registers shadowed by its new secure monitor mode.
The ARM1176 and Cortex-A8 both support this new mode.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The previous changes to move the startup TCL code resulted in segfaults
during startup. This seemingly innocuous patch fixes the problem.
I would explain why changing from 'foo[]' to '*foo' caused this issue,
but the difference seems superficial. For now, this hot fix will do,
but this issue might bear further scrutiny.
Moves definitions for each layer into their own file, eliminating
layering violations in the built-in TCL code. Updates src/Makefile.am
rules to include all files in the final startup.tcl input file, and
others Makefile.am rules to distribute the new files in our packages.
The recent migration broke them, the fixes broken them in a new way,
but this should restore them to working order. Eliminates the
temporary variable, as the CMD_NAME macro can once again be use
in routines that increment CMD_ARGV without nasty side-effects.
Also, this is on the path to increasing the word size for
bit vectors from 8 to something wider(32? natural host machine
width?)
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Add a new is_arm_mode() predicate, and use it to replace almost
all calls to current armv4_5_mode_to_number().
Eventually those internal mode numbers should vanish... along
with their siblings in the armv7a.c file.
Remove a handful of superfluous checks ... e.g. the mode number
was just initialized, or (debug entry methods) already validated.
Move one of the macros using internal mode numbers into the only
file which uses that macro. Make the tables manipulated with
those numbers be read-only and, where possible, static so they're
not confused with part of the generic ARM interface.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add and use arm_mode_name() to map from PSR bits to user
meaningful names. It uses a new table which, later, can
be used to hold other mode-coupled data.
Add definitions for the "Secure Monitor" mode, as seen on
some ARM11 cores (like ARM1176) and on Cortex-A8. The
previous mode name scheme didn't understand that mode.
Remove the old mechanism ... there were two copies, caused
by Cortex-A8 needing to add "Secure Monitor" mode support.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
All ARM cores need to provide obsolete FPA registers in their
GDB register dumps. (Even though cores with floating point
support now generally use some version of VFP...)
Clean up that support a bit by sharing the same dummy registers,
and removing the duplicate copies. Eventually we shouldn't need
to export those dummies.
(This makes the ARMv7-M support include the armv4_5 header, and
cleans up related #includes, but doesn't yet use anything from
there except those dummies.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add --disable-doxygen-html and --enable-doxygen-pdf options to the
configure script, allowing user to change the defaults. These
update the proess of munging the Doxygen configuration file to
use the settings thusly provided. Add options in README.
A single PDF file for the developer manual allows accessing a single
index, browsing, and searching. It takes significantly more time to
build this way, but this patch allows others to look at the results.
Migration Tip: If you have previously built the HTML Doxygen
documentatation, rename your 'doxygen' directory to 'doxygen/html'
to prevent needlessly rebuilding those files.
Adds the command_invocation structure to encapsulate parameters for
all COMMAND_HANDLER routines. Rather than passing several arguments
to each successive subroutine, a single pointer may be passed around.
Changes the CMD_* macros to reference the new fields.
Updates run_command to create an instance and pass it to the handler.
Add additional macros to allow command handling to be migrated easily:
CMD_CTX, CMD_ARGC, and CMD_ARGV. Updates CMD_NAME to use CMD_ARGV.
In addition to making the remaining patches of this series cleaner,
this introduces easily sed-able symbols that could allow us to retire
these once the command handler infrastructure matures (i.e. pre-1.0).
No need to indirect from registered integers to pointers.
Just stash the pointers directly in the register struct,
and don't even bother registering.
This is a small code shrink, speeds register access just
a smidgeon, and gets rid of another rude exit() path.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The code is now much more explicit. It flushes every
N writes. For now flush every time, but tinkering with
the bridge FIFO size and how often we flush clearly
points in the direction of the Avalon write FIFO full
being the culprit.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Shifting by more than 32 is undefined for 32 bit integers according
to the C standard. Robust solution is conditional code.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
And move the rest of the vector_catch stuff into the C file;
it's not part of the module interface.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Also, switch integrity check over to the correct magic number,
and remove duplicate v4/v5 #define.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Have ARM11 register the "standard" ARM commands. For now, only
disassembly really works.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Rename the "armv4_5" command prefix to straight "arm" so it makes
more sense for newer cores. Add a simple compatibility script.
Make sure all the commands give the same "not an ARM" diagnostic
message (and fail properly) when called against non-ARM targets.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Fix bug noted by Øyvind: terminate the IR length autoscan when
the IR is too long, or otherwise broken.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use size_t instead of uint32_t when specifying file sizes. Update all
consumers up through the layers to use size_t when required. These
changes should be safe, but the higher-levels will need to be updated
further to receive the intended benefits (i.e. large file support).
Add error checking for fileio_read and file_write. Previously, all
errors were being silently ignored, so this change might cause some
problems for some people in some cases. However, it gives us the chance
to handle any errors that do occur at higher-levels, rather than burying
our heads in the sand.
Uses unsigned type to pass line numbers.
Use uint64_t to pass sleep routines their milliseconds. Updates sleep
routines to use this type and improve whitespace.
Tweak "standard" ARM disassembler diagnostics to fail if the target
is not "an ARM" (vs. not "an ARMV4/5"), so it makes more sense for
cores inheriting this as the "generic" disassembler.
Also, to use the Thumb2 entry instead of the original Thumb entry.
This makes it work better for both newer cores (which support those
added instructions) and for BL and BLX instructions on older cores.
(Those instructions are 32-bits, which requires curious state-aware
code to go through a 16-bit decode interface...)
Plus minor cleanups, notably to have fewer exit paths and to make
sure they all return failure codes.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
They're really too big to inline, at least for code that's
not in any performance-critical loops.
Also move the associated string table to the rodata section.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The "improve inline binarybuffer helpers" mis-handled bytes
with the high bit set; treat them as unsigned, not signed.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Don't include it in more headers than necessary; just
use it in the few files that actually need it.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The ARRAY_SIZE macro was defined in several target files, so move it
to types.h.
This patch also removes two other identical macros: DIM (from jtag.h)
and asizeof (from arm11.h).
Eliminate redundant check that gets covered by using unsigned type.
Created to eliminate noise from subsequent patches, but this kind of
conversion will be beneficial in similar ways throughout the tree.
The container_of macro is useful as a general solution. It belongs
in types.h, rather than target.h where it was introduced. Requires
the offsetof macro, which comes from <stddef.h> (moved as well).
Add the 'nand verify' command to perform a dump and fake-write
simultaneously, checking the read bits against those generated by the
write process. Appropriate user documentation for this command has
been added to the user guide as well.
The algorithm presently makes a relatively naive comparison. Some chips
that use ECC may not verify correctly using this implementation, but the
new documentation provides details about this limitation.
In some cases, the FILEIO_NONE access mode may be useful as a parameter
to indicate that file access should be disabled. High-level routines can
use it to skip file access calls, as 'fileio_open' will fail presently
if called to open a file using this mode.
This patch eliminates duplicated code in the the NAND 'dump' and 'write'
by using the new static helper functions.
These changes also fix a possible memory leak in nand dump command, in
the case that the dump file failed to open.
Overall, the changes should be functionally equivalent, but the
resulting code will be easier to improve and extend further.
This patch provides helpers APIs that will eliminate duplicated code in
the the NAND 'dump' and 'write' commands by factoring their common code
into static helper functions. These helpers may be useful for creating
new commands, as shown in the final patch to 'verify' flash from a file.
Several previously unreported error conditions now generate messages and
propogate the return codes, such as when the file fails to open and bad
arguments are given. These changes will fix a possible memory leak in
nand dump command, in the case that the dump file failed to open.
Overall, the changes should be functionally equivalent, but the
resulting code will be easier to improve and extend consistently.
Rewrite buf_cmp to use memcpy for bulk of comparison. Add static
helper to perform comparison of trailing byte, which uses another
static helper to perform a maksed comparison. The masked comparison
helper is used by the buf_cmp_mask to simplify its loop.
Improve types to use void *, unsigned, and return bool.
Don't include "target.h" from more headers than necessary. This
avoids needless interdependencies and duplicated include paths.
Don't needlessly include it in source files, either.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Same deal: "register.h" got needlessly included all over the
place because of being in a few widely included headers.
So take it out of the header files which included it, and put
it in files which use it ... reduce needless interdependencies.
Also, don't need that extra "types.h" inclusion.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Lots of files still include it, often through needless
duplicate inclusion of "log.h"; sigh.
This cleans up the inclusion graph a bunch, so there are
fewer inclusion paths, but it doesn't change much otherwise.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Most files in the tree seem to have ended up including this,
and *quite* needlessly ... only code implementing or using
downloadable algorithms actually needs these declarations.
So take it out of the header files which included it, and put
it in files which use it ... reduce needless interdependencies.
Also: "algorithm.h" doesn't need to include "types.h" again;
it already comes from a different header.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Most files in the tree seem to have ended up including this,
and *quite* needlessly ... only code implementing or using
breakpoints actually needs these declarations.
So take it out of the header files which included it, and put
it in files which use it ... reduce needless interdependencies.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Now the ARM11 cores can use the renamed arm_checksum_memory()
and arm_blank_check_memory() routines ... do so.
Sanity checked with "flash erase_check" of both NOR banks on an
OMAP2420 ... the algorithm code dumped four lines of of "poll"
status after each of almost 520 blocks (yes, *very* annoying) but
gave plausible results after producing that spam.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Three changes: remove ARM11_HANDLER() in favor of normal structure
initialization syntax; fix goofy indentation in that structure; and
don't needlessly export arm11_register_commands(), it's only called
through that method table.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The arm7_9_checksum_memory() and arm7_9_blank_check_memory()
routines are not actually specific to the ARM7 and ARM9 core
generations ... they can work for any core which can run
algorithms using basic ARM (not Thumb) instructions.
Rename them; move the declarations to a more generic site;
likewise move the code (and tidy it a bit in the process).
NOTE: the blank_check() method falsely returned a success
status (0) on one error path, when the algorithm failed.
Fixed this bug.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Previously this flag was stored in "target_type", so that for example
if there were two ARM7TDMI targets in a scan chain, both would claim
to have been examined although only the first one actually had its
examine() method called.
Move this state to where it should have been in the first place, and
hide a method that didn't need exposure ... the flag is write-once.
Provide some doxygen. The examine() method is confusing, since it
isn't separating one-time setup from the after-each-reset stuff. And
the ARM7/ARM9 version is, somewhat undesirably, not leaving the debug
state alone after reset ... probably more of an issue for trace setup
than for watchpoints and breakpoints.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Removes unused arm_jtag_buf_* helpers from arm_jtag.[ch]. These could
reappear if patches are provided to conver the tree to use them, but
this code should not be in the master tree until that series is ready.
Purge an unused routine from the tree and remove a layering violation.
If this code is needed, it should reappear somwhere in src/jtag/,
where struct scan_field gets defined.
It's completely unused; the obnoxious "DANGER!!!" comments
don't even explain what it was doing (shorthand SVN magic).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This fixes an issue due to the new command handler syntax caused by the mw handler playing with the args pointer before
using the CMD_NAME macro. Fix is to move this call above the lines changing args.
Create src/openocd.h to hold declarations previously made internally
by src/main.c and src/server/server.c. This ensures all functions
are verified to be in-sync at compile time (rather than at link),
making it easier to track down bugs.
Changed some printf format strings..
[dbrownell@users.sourceforge.net: shrink lines, fix indents]
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Kick in ETM (and ETB) support for ARM11. Tested on OMAP 2420,
so update that configuration. (That's an ARM1136ejs, ETB,
OpenGL ES1.1, C55x DSP, etc.)
Also update the other ARM11 ETM + ETB targets in the tree
to set up these modules. (Not tested.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
These aren't desirable, given "standard" ETM support.
Also remove the now-unused arm11_find_target().
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
No point in having two identical examine methods for the
ARM7TDMI and ARM9TDMI drivers; move, rename, shrink, share.
Add a bit of doxygen; stop needlessly exporting a method.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Return NULL from etm_build_reg_cache() not ERROR_OK; and share
code on that fault path.
Let ETM code handle any tracking of its cache -- not callers.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This will enable reusing many common ARM utilities, in
particular the ETM and ETB support. The ARM11 support
can still be much simplified after this patch, though.
Note: none of those common utilities kick in yet...
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
We have too many different registers, and too many version and
context dependent interpretations, for this type of bitfield
management to be scalable.
(Anyone who really wants bitfield interpretation *can* do that
in Tcl code...)
There are ... quite a few copies of the same ARM dummy registers.
There should eventually be one copy; this many is craziness.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Various cores with an ETB have its TAP misnamed ... either as a
boundary scan TAP or as the iMX "Secure JTAG Controller" (which
is, among other things, a JRC that could be used to shorten
scan chains).
Use the correct name for these TAPs, which we can recognize since
their IDs were assigned by ARM and these chips all document the
presence of an ETB. The 0x2b900f0f is ETB11; the 0x1b900f0f
is an older module, just called "ETB".
Also shrink the ETB's IR configuration; the default IR-Capture
value is fine, and the mask can specify that all four bits are
safe to check (per ARM documentation).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Remove the last external user of arm7_9_get_arch_pointers(), and
that annoying downcast utility. Add an is_arm7_9() predicate.
Stop returning specious success codes on various failure paths
in the ARM7/ARM9 commands which used that downcast utility.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This documentation update provides an introduction to the command
handling facilities provided by command.[ch]. A primer walks the user
through the elements of a pointedly pedantic module: src/hello.c.
A summary of the API is provided in the OpenOCD Architecture section.
The hello module provides the 'hello' command, printing a greetings
to the command console. It can grow to serve as pedagogical example
of services that OpenOCD developers should use: a runnable style guide.
The number of command arguments will always be 0 or more, so use
the right type in handlers. This has a cascading effect up through
the layers, but the new COMMAND_HANDLER macros prevented total chaos.
By using CALL_COMMAND_HANDLER, parameters can be reordered, added, or
even removed in inherited signatures, without requiring revisiting
all of the various call sites.
The FLASH_BANK_COMMAND_HANDLER provides an extended command handler
using the __COMMAND_HANDLER macro, whereby changing that macro is
sufficient to update flash handlers with the new signature. It also
enforces uniform style and scope when implementing this handler.
This patch adds new typedefs for command handler callback functions.
Users of this type signature were updated to use these new types.
It uses the new __COMMAND_HANDLER macro to prevent duplication.
The COMMAND_HANDLER and COMMAND_HELPER macros allow commands to be
defined in a manner that decouples them from the exact order and type of
their parameters. Once converted, incremental changes to the command
handler type can be addressed in incremental patches that do not need to
touch the entire tree.
These macros' implementation, __COMMAND_HANDLER, is used to define the
new command_handler_t type, and additional patches will use it to derive
new macros to define extended command types (e.g. flash, nand, pld).
The CALL_COMMAND_HANDLER provides a means of calling helpers or nested
handlers from withing a command handler.
This patch uses C99 varadic macro expansion. Please report compilers
that cannot handle this code.
The "remove (forward) declarations" patch goofed indentation on the
"cortexa8_target" struct; fix.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
To be more informative (and consistent with flash and pld trees), change
'device' parameter name to 'nand' in NAND source files. This change
eliminates confusing 'device->device->' instance from the code, and
it simplifies the forthcoming command handler patches.
ARM11 and newer cores include updated ETM modules. Recognize
their version codes and some key config differences. Sanity
checked on an OMAP2, with an ETM11RV r0p1 (ETMv3.1).
This still handles only scan chain 6, with at most 128 registers.
Newer cores (mostly, Cortex) will need to use the DAP instead.
Note that the newer ETM modules don't quite fit the quirky config
model of the older ones ... having more port widths is easy, but
the modes aren't the same. That still needs to change.
Fix a curious bug ... how did the register cache NOT get saved??
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This trivial patch allows the config script to find the correct
FTDI2xx libraries under Windows XP x64 using msys.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add the khz and speed_div functions to the parport interface driver.
Add the parport_toggling_time function that tells the parport driver
how long (in nanoseconds) it takes for the hardware to toggle TCK.
[dbrownell@users.sourceforge.net: tweak doc for clarity, mention
multimeter, and whitespace fixes]
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Now that nothing uses the old ETM handle any more, remove it.
Add minimal header tweaks, letting non-ARM7 and non-ARM9 cores
access ETM facilities.
Now ARM11 could support standard ETM (and ETB) access as soon as
it derives from "struct arm" ... its scanchain 6 is used access
the ETM, just like ARM7 and ARM9.
The Cortex parts (both M3 and A8) will need modified access methods
(via ETM init parameters), so they use the DAP. Our first A8 target
(OMAP3) needs that for both ETM and ETB, but the M3 ETM isn't very
useful without SWO trace support (it's painfully stripped down), so
that support won't be worth adding for a while.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make ETM itself use the new toplevel ETM handle, instead
of the to-be-removed lower level one. As of this patch,
nothing should be using the old ARM7/ARM9-specific handle.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make both useful ETM port drivers (etb, etm_dummy) use the new
toplevel ETM handle, instead of the to-be-removed lower level one.
Do the same for the "oocd-trace" prototype too; and fix its
error reporting paths: return failure codes, don't exit(), etc
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make ARM7 and ARM9 cores use the new toplevel ETM handle to
trigger ETM setup, not the to-be-removed lower level one.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Rename "struct armv4_5_common_s" as "struct arm". It needs
a bit more work to be properly generic, and to move out of
this header, but it's the best start we have on that today.
Add and initialize an optional ETM pointer, since that will
be the first thing that gets generalized.
The intent being: all ARMs should eventually derive from
this "struct arm", so they can reuse the current ETM logic.
(And later, more.) Currently the ARM cores that *don't* so
derive are only ARMv7-M (and thus Cortex-M3) and ARM11.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Eliminate duplicate code for linking commands into a list.
Adds a check to ensure the command does not already exist;
if it does, return that one instead of creating a duplicate.
Add help for commands regardless of whether a handler is involved.
With this, all sorts of new commands can be found in 'help' text.
Hopefully, all of them have been documented....
Sadly, the lsort function appears to handle nested lists poorly, such
that sub-commands do not group with their parents.
The command_name function returns a malloced string for a given
command and its parents. This can be used to display a message
to the user, but it is used internally to handle registration
and syntax errors. This helps permit arbitrary command nesting.
Add 'const' keyword to 'char *' parameters to allow command handlers to
pass constant string arguments. These changes allow the 'args' command
handler to be changed to 'const' in a subsequent patch.
Subsequent patches expect all command handlers to use a uniform
parameter naming scheme. In the entire tree, these two files used
standard 'argv' instead of our non-standard 'args'. This patch opts
to reduces the noise required to unify the command handlers, using
dominant 'args' form.
A future patch may be used to convert us back to the standard argv, but
that requires coordination with all developers to minimize disruptions.
Separates various groups of files to be built in logical succession.
In each layer, the core module (target.c, nand.c, etc.) is built _after_
their helper modules (e.g. image.c, nand_ecc.c) but _before_ any of
their drivers (e.g. arm966e.c, mx3_nand.c).
This allows problems introduced at the bottom of the stack to result
in build failures as soon as possible, as the helpers and core should
wrap portions of them.
Various cleanups of ETM related code.
- Saner error return paths
- Simplify arm7_9 init ... no need for extra zeroing!
- Shrink some lines
- Tweak some diagnostics
- Use shorter name for ETM struct type.
- Don't exit()
and similar. The diagnostics look forward to having
this ETM code work with more than just ARM7/ARM9.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The "ARM720 uses the new inheritance/nesting scheme" patch
wrongly scrubbed a calloc() from arm720t_target_create().
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Start switching MMU handling over to a more sensible scheme.
Having an mmu() method enables MMU-aware behaviors. Not having
one kicks in simpler ones, with no distinction between virtual
and physical addresses.
Currently only a handful of targets have methods to read/write
physical memory: just arm720, arm920, and arm926. They should
all initialize OK now, but the arm*20 parts don't do the "extra"
stuff arm926 does (which should arguably be target-generic).
Also simplify how target_init() loops over all targets by making
it be a normal "for" loop, instead of scattering its three parts
to the four winds.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
General rule, this is all board-specific and doesn't belong
in target config files. Some of these were just cosmetic.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Here's a patch for the double-reset problem on STM32. I've tested
downloading and debugging with GDB and Eclipse, and everything seems
to work fine.
This effectively sets reset_config to none. trst_only would also
be ok, but that's better left to a board configuration file since
not all boards wire it up.
The NVIC is used to trigger reset, which at least on this chip also
pulses nSRST so the whole system does get rest -- exactly once.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
First cut of these commands. Øyvind tinkered a bit with
the number parsing to bring it up to speed + rebased it.
Ready for testing.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
- improve some names -- a "default" prefix is not descriptive
- add doxygen @todo entries for some issues
- avr8 isn't ever going to need those MMU hooks
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Contrary to my previous assessment, some opportunities to remove forward
declarations were overlooked. Remove them by moving the definitions
of the command registration and interface structure to the end of files.
Remove useless forward declarations.
Moves command registrations to end of files.
Moves flash structure definitions to end of files.
Signed-off-by: Zachary T Welch <zw@superlucidity.net>
Remove useless forward declarations.
Moves command registrations to end of files.
Moves flash structure definitions to end of files.
Signed-off-by: Zachary T Welch <zw@superlucidity.net>
Remove useless forward declarations.
Moves command registrations to end of files.
Moves flash structure definitions to end of files.
Signed-off-by: Zachary T Welch <zw@superlucidity.net>
Remove useless forward declarations.
Moves command registration to end of file.
Moves flash structure definitions to end of files.
Changes a few references to global flash structure to local refs.
Signed-off-by: Zachary T Welch <zw@superlucidity.net>
Remove useless forward declarations.
Moves command registrations to end of files.
Moves flash structure definitions to end of files.
Signed-off-by: Zachary T Welch <zw@superlucidity.net>
Remove useless forward declarations.
Moves command registration to end of files.
Moves flash structure definition to end of files.
Signed-off-by: Zachary T Welch <zw@superlucidity.net>
Remove useless forward declarations.
Moves command registration to end of file.
Moves flash structure definition to end of file.
Signed-off-by: Zachary T Welch <zw@superlucidity.net>
This patch introduced a bug preventing flash writes from working
on Cortex-M3 targets like the STM32. Moreover, it's the wrong
approach for handling no-MMU targets.
The right way to handle no-MMU targets is to provide accessors
for physical addresses, and use them everywhere; and any code
which tries to work with virtual-to-physical mappings should use
a identity mapping (which can be defaulted).
And ... we can tell if a target has an MMU by seeing if it's
got an mmu() method. No such methood means no MMU.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
It's been about a year since these were deprecated and, in most
cases, removed. There's no point in carrying that documentation,
or backwards compatibility for "jtag_device" and "jtag_speed",
around forever. (Or a few remnants of obsolete code...)
Removed a few obsolete uses of "jtag_speed":
- The Calao stuff hasn't worked since July 2008. (Those Atmel
targets need to work with a 32KHz core clock after reset until
board-specific init-reset code sets up the PLL and enables a
faster JTAg clock.)
- Parport speed controls don't actually work (tops out at about
1 MHz on typical HW).
- In general, speed controls need to live in board.cfg files (or
sometimes target.cfg files), not interface.cfg ...
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Rename the "Drivers, Options, and Commands" sections to be
just "Driver List" matching the earlier reference. Add an
example of parallel CFI flash.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Removes 'extern' keywords from function prototypes in the flash headers.
Wraps long lines to fit into 80 columns.
Adds multiple inclusion protection for s3c2xx_nand.h.
Removes the 'extern' keyword from function declarations.
Wraps long prototypes to fit into 80 columns.
Fixes documentation for jtag_tap_s::{,has}idcode fields.
The "$ocd_HOSTOS" variable was wrongly documented. Fix its
documentation, and its value on Linux.
Shrink a few of the too-long lines.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add comments (Doxygen and normal), remove unused code,
shrink some overlong lines. Get rid of a forward decl.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This patch changes the duration_* API in several ways. First, it
updates the API to use better names. Second, string formatting has
been removed from the API (with its associated malloc). Finally, a
new function added to convert the time into seconds, which can be
used (or formatted) by the caller. This eliminates hidden calls to
malloc that require associated calls to free().
This patch also removes the useless extern keyword from prototypes,
and it eliminates the duration_t typedef (use 'struct duration').
These API also allows proper error checking, as it is possible for
gettimeofday to fail in certain circumstances.
The consumers have all been chased to use this new API as well, as
there were relatively few cases doing this type of measurement.
In most cases, the code performs additional checks for errors, but
the calling code looks much cleaner in every case.
Reduces confusion about location of associated routines and
reduces clutter in the arm11 header.
Removes extra whitespace around the lines touched by these changes.
Make several functions be static. Shrink some of the overlong
lines. Use pure tab indents in some places that mixed in spaces.
This gives a minor object code shrink (about 2% on amd64).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The semantics of "-work-area-virt 0" (or phys) changed with
the patch to require specifying physical or virtrual work
area addresses. Specifying zero was previously a NOP. Now
it means that address zero is valid.
This patch addresses three related issues:
- MMU-less processors should never specify work-area-virt;
remove those specifications. Such processors include
ARM7TDMI, Cortex-M3, and ARM966.
- MMU-equipped processors *can* specify work-area-virt...
but zero won't be appropriate, except in mischievous
contexts (which hide null pointer exceptions).
Remove those specs from those processors too. If any of
those mappings is valid, someone will need to submit a
patch adding it ... along with a comment saying what OS
provides the mapping, and in which context. Example,
say "works with Linux 2.6.30+, in kernel mode". (Note
that ARM Linux doesn't map kernel memory to zero ...)
- Clarify docs on that "-virt" and other work area stuff.
Seems to me work-area-virt is quite problematic; not every
operating system provides such static mappings; if they do,
they're not in every MMU context...
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Resolve serious bug inserted by the "target: require working
area for physical/virtual addresses to be specified" patch.
It forced use of (invalid) virtual addresses when the MMU
was disabled, and vice versa.
Observed to break at least Cortex-M3, ARM926, ARM7TDMI whenever
work areas are used, such as during bulk writes to flash, DDR2,
SRAM, and so on.
Also, fix overlong lines and whitespace goofs.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Move various embedded target structs to the beginnings of
their containers ... pretty much the way C++ or Obj-C
would for single inheritance.
This shrinks code that accesses those embedded structs by
letting common offsets use smaller instructions. Sample
before/after sizes (on amd64):
17181 312 0 17493 4455 arm920t.o
16810 312 0 17122 42e2 arm920t.o
Where the "after" is the smaller number, with this patch
over the ones leveraging that embedding knowledge.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Remove most remaining uses of target->arch_info from ARM
infrastructure, where it hasn't already been updated.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use target_to_armv7a() etc, replacing needless pointer traversals.
Stop using X->arch_info scheme in most ARMv7-A and Cortex-A8 code.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use target_to_arm7_9(), replacing needless pointer traversals.
Also: remove now-useless contents of arm7tdmi struct; it's
almost ready to be removed.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use target_to_arm720(), replacing needless pointer traversals
and simplifying a bunch of nasty code. Stop setting arch_info
for arm720 type parts, it's not used any longer.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use target_to_xscale(), replacing needless pointer traversals
and simplifying a bunch of code.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Replace needless pointer traversals and simplify. Also remove most
remaining contents from arm9tdmi struct; it's almost removable.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use target_to_arm926(), replacing needless pointer traversals
and simplifying a bunch of code.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use target_to_arm920(), replacing needless pointer traversals
and simplifying. Stop setting arm9tdmi->arch_info for arm920
type parts, it's not used any longer.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use new target_to_cm3() and target_to_armv7m() inlines,
instead of a series of x->arch_info conversions. Remove
arch_info, since nothing uses it.
Also fix an omission: the Cortex-M3 commands didn't verify
that they were operating on that kind of target. Add comment
about the ARMv7M version of that omission.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Provide a cleaner way to handle single inheritance of targets
in C, using the same model Linux does: structs containing other
structs, un-nested via calls to a "container_of()" macro that
are packaged in typesafe inline functions.
Targets already use this containment idiom, but make it much
more complicated because they un-nest using embedded "void *"
pointers ... in chains of up to five per target, which is all
pure needless complication. (Example: arm92x core, arm9tdmi,
arm7_9, armv4_5 ... on top of the base "target" class.)
Applying this scheme consistently simplifies things, and gets
rid of many error-prone untyped pointers. It won't change any
part of the type model though -- it just simplifies things.
(And facilitates more cleanup later on.)
Rule of thumb: where there's an X->arch_info void* pointer,
access to that pointer can and should be removed. It may be
convenient to set up pointers to some of the embedded structs;
and shrink their current "*_common" names (annoyingly long).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The forward decls are just code clutter; remove them, by moving
their references after definitions. This is another file which
never needed even one internal forward declaration.
Also shrink a few overly-long lines with function declarations
or definitions; get rid of arm7tdmi_register_commands(), it's
not needed (just delegated); minor whitespace declutter.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Unneeded exports cause confusion about the module interfaces.
Make all functions static. Add a short header comment.
The forward decls are just code clutter; remove them, by moving
their references after definitions. This is another file which
never needed even one internal forward declaration.
Remove unneeded indirection for the write_memory() method. Make
a table static, remove a can't-happen case with nasty exit().
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Unneeded exports cause confusion about the module interfaces.
Make most functions static.
The forward decls are just code clutter; remove them, by moving
their references after definitions. This is another file which
never needed even one internal forward declaration.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The forward decls are just code clutter; remove them, by moving
their references after definitions. This is another file which
never needed even one internal forward declaration.
Also shrink a few overly-long lines with function declarations
or definitions.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Unneeded exports cause confusion about the module interfaces.
Make most functions static.
The forward decls are just code clutter; remove them, by moving
their references after definitions. This is another file which
never needed even one internal forward declaration.
Also remove needless arm966e_init_target(), in favor of the
arm9tdmi routine to which it delegates its work.
This saved over 100 bytes of code on x86_32.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
An init_target() wrapper isn't needed, and target_create()
can shrink a bit. Add a header comment and some doxygen.
Remove arm926ejs_catch_broken_irscan() which has been a NOP
for quite a few months now, and in any case duplicates logic
in the JTAG core to validate IR capture data. But force the
capture mask to 0x0f, so those tests are most effective.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Unneeded exports cause confusion about the module interfaces.
Make most functions static. Add a short header comment.
The forward decls are just code clutter; remove them, by moving
their references after definitions. This is another file which
never needed even one internal forward declaration.
This saved almost 900 bytes of code on x86_32; it seems the
compiler can leverage its knowledge that these functions are
not called from the outside world...
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This eliminates redundant code for parsing and retreiving the bank
specified from a script command argument. This patch was written to
replace existing functionality; however, the parsing logic can be
updated later to allow flash commands to accept bank names as well as
their numbers.
This helper eliminates significant amount of redundant code in command
handler functions throughout the system. It wraps the lower-level
parse_* macros to implement a policy for reporting parse errors to the
active command context (cmd_ctx). If errors do occur, this macro causes
the calling function to abort with the proper return code.
The arm920t has a concept of read modify write cycles
that may have to be represented in the mrcmcr interface
eventually.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Highlight that the "-expected-id" probably comes from vendor
documentation, and that it *should* be used where possible.
Don't use ircapture/irmask in examples, to help discourage
use of those params when they're not required. Explain a
bit better about why/when those params get used.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Fail watchpoint_add() if it's the same address but the
parameters are different ... don't just assume having
the same address means the same watchpoint! (Note that
overlapping watchpoints aren't detected...)
Handle unrecognized return codes more sanely; don't exit()!
And describe command params right.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Expose most DWT registers via Tcl; there are a few more, but
those are mostly for profiling along with the ITM. Having
this set available enables operations which aren't possible
with just the standard watchpoint operations.
The cycle counter may be interesting. Turn it on after reset
by setting the LSB of the dwt_ctrl register, and it counts
CPU clocks. You can program the comparator 0 watchpoint to
trigger on a given cycle count, rather than a data address.
Likewise, comparator 1 may be able to match data values given
address matches from one or two other comparators. (Not all
hardware supports this capability though; try it. That is
something the standard watchpoint methods should eventually
handle, for the single address case.)
Minor cleanup: remove needless functional indirection for
exposing the v7m architctural registers.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
There's no reason to read which interrupts are enabled from
the NVIC; that state isn't used. Plus, it's highly dynamic
since firmware can change it at any time; remove the support
for those state records.
Remove duplicate definition of DWT_CTRL address; shrink a line.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Fix the watchpoint error checks, and do them in add(), not later
in set() when it's mostly too late. Support the full range of
watchpoint sizes (1 to 32K bytes each), and check alignments.
Minor cleanup of DWT access: shrink lines, use "+" for address
calculations, comment a few issues. Add debug message reporting
DWT capabilities, matching the message for FBP, and some minor
code and spec review comments.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add Doxygen for the exported ARMv7-M interfaces.
Make the non-exported stuff static. Remove functions and
data which are now observably unused.
Add comment about a small speedup that the run_algorithm()
logic could use. Shrink a few too-long lines.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
improve default target->read/write_phys_memory, produce
more sensible error messages if the mmu interface
functions have not been implemented yet vs. will
not be implemented(e.g. cortex m3).
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
The quit entry point was not being invoked. Just a source
of confusion at this point. XScale ran 100x reset upon
quit, but that code made no sense, wasn't commented
and never invoke.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Previous patch somehow made GCC lose some of its cookies;
work around, zero-init that struct.
Clean up code from the previous patch.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Config for Intel's "Lubbock" PXA255 development board. Even more
so than the PXA255 itself, this is obsolete. AFAIK this was the
first generally available development platform for PXA255. Intel
stopped providing these after other devel boards became available.
One interesting thing about this board from the OpenOCD perspective
is probably its flash configuration. Each bank is 32 bits wide,
built from two 16-bit StrataFlash chips wired in parallel. This
doubles throughput ... it reads/writes 32 bits in the time a single
chip takes to write just 16 bits.
This conf mostly works, given XScale bugfixes, but has some issues
(notably: no access to the on-board SDRAM) flagged by FIXMEs.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Because the dseg segment is serviced exclusively by the EJTAG features, there
are no physical address per se. Instead the lower 21 bits of the virtual address select
the appropriate reference in either EJTAG memory or registers. References are not mapped through the
TLB, nor do the accesses appear on the external system memory interface.
Both of this memory segments are Uncached.
On debug exception (break) CPU jumps to the beginning of dmseg. This some kind of memory shared
between CPU and EJTAG dongle.
There CPU stops (correct terminology is : stalls, because it stops it's pipeline), and is waiting for some action of dongle.
If the dongle gives it instruction, CPU executes it, augments it's PC to 0xFFFF FFFF FF20 0001 - but it again points to dmseg area,
so it stops waiting for next instruction.
This will all become clear later, after reading following prerequisite chapters.
@section impflags Important flags
@subsection pnnw PNnW
Indicates read or write of a pending processor access:
- 0 : Read processor access, for a fetch/load access
- 1 : Write processor access, for a store access
This value is defined only when a processor access is pending.
Processor will do the action for us : it can for example read internal state (register values),
and send us back the information via EJTAG memory (dmseg), or it can take some data from dmseg and write it into the registers or RAM.
Every time when it sees address (i.e. when this address is the part of the opcode it is executing, wether it is instruction or data fetch)
that falls into dmseg, processor stalls. That acutally meand that CPU stops it's pipeline and it is waitning for dongle to take some action.
CPU is now either waiting for dongle to take some data from dmseg (if we requested for CPU do give us internal state, for example),
or it will wait for some data from dongle (if it needs following instruction because it did previous, or if the operand address of the currently executed opcode
falls somewhere (anywhere) in dmseg (0xff..ff20000 - 0xff..ff2fffff)).
Bit PNnW describes character of CPU access to EJTAG memory (the memry where dongle puts/takes data) - CPU can either READ for it (PNnW == 0) or
WRITE to it (PNnW == 1).
By reading PNnW bit OpenOCD will know if it has to send (PNnW == 0) or to take (PNnW == 1) data (from dmseg, via dongle).
@subsection pracc PrAcc
Indicates a pending processor access and controls finishing of a pending processor access.
When read:
- 0 : No pending processor access
- 1 : Pending processor access
A write of 0 finishes a processor access if pending;
otherwise operation of the processor is UNDEFINED
if the bit is written to 0 when no processor access is
pending. A write of 1 is ignored.
A successful FASTDATA access will clear this bit.
As noted above, on any access to dmseg, processor will stall. It waits for dongle to do some action - either to take or put some data.
OpenOCD can figure out which action has to be taken by reading PrAcc bit.
Once action from dongle has been done, i.e. after the data is taken/put, OpenOCD can signal to CPU to proceed with executing the instruction.
This can be the next instruction (if previous was finished before pending), or the same instruction - if for example CPU was waiting on dongle
to give it an operand, because it saw in the instruction opcode that operand address is somewhere in dmseg. That prowoked the CPU to stall (it tried operand fetch to dmseg and stopped),
and PNnW bit is 0 (CPU does read from dmseg), and PrAcc is 1 (CPU is pending on dmseg access).
@subsection spracc SPrAcc
Shifting in a zero value requests completion of the Fastdata access.
The PrAcc bit in the EJTAG Control register is overwritten with zero when the access
succeeds. (The access succeeds if PrAcc is one and the operation address is in the legal dmseg segment
Fastdata area.)
When successful, a one is shifted out. Shifting out a zero indicates a Fastdata access failure.
Shifting in a one does not complete the Fastdata access and the PrAcc bit is unchanged. Shifting out a
one indicates that the access would have been successful if allowed to complete and a zero indicates
MIPS32_LW(8,0,9), /* lw $8,0($9), Load $8 with the word @mem[$9] */
MIPS32_SW(8,0,11), /* sw $8,0($11) */
MIPS32_ADDI(10,10,NEG16(1)), /* $10-- */
MIPS32_ADDI(9,9,4), /* $1 += 4 */
MIPS32_ADDI(11,11,4), /* $11 += 4 */
MIPS32_B(NEG16(8)), /* b loop */
MIPS32_NOP,
/* end: */
MIPS32_LW(11,0,15), /* lw $11,($15) */
MIPS32_LW(10,0,15), /* lw $10,($15) */
MIPS32_LW(9,0,15), /* lw $9,($15) */
MIPS32_LW(8,0,15), /* lw $8,($15) */
MIPS32_B(NEG16(27)), /* b start */
MIPS32_MFC0(15,31,0), /* move COP0 DeSave to $15 */
};
@endcode
We have to pass this code to CPU via dongle via dmseg.
After debug exception CPU will find itself stalling at the begining of the dmseg. It waits for the first instruction from dongle.
This is MIPS32_MTC0(15,31,0), so CPU saves C0 and continues to addr 0xFF20 0001, which falls also to dmseg, so it stalls.
Dongle proceeds giving to CPU one by one instruction in this manner.
However, things are not so simple. If you take a look at the program, you will see that some instructions take operands. If it has to take
operand from the address in dmseg, CPU will stall witing for the dongle to do the action of passing the operand and signal this by putting PrAcc to 0.
If this operand is somewhere in RAM, CPU will not stall (it stalls only on dmseg), but it will just take it and proceed to nex instruction. But since PC for next instruction
points to dmseg, it will stall, so that dongle can pass next instruction.
Some instuctions are jumps (if these are jumps in dmseg addr, CPU will jump and then stall. If this is jump to some address in RAM, CPU will jump and just proceed -
will not stall on addresses in RAM).
To have information about CPU is currently (does it stalls wanting on operand or it jumped somewhere waiting for next instruction),
OpenOCD has to call TAP ADDRESS instruction, which will ask CPU to give us his address within EJTAG memory :
if ((retval = mips32_pracc_exec_write(&ctx, address)) != ERROR_OK)
return retval;
}
else
{
/* Check to see if its reading at the debug vector. The first pass through
* the module is always read at the vector, so the first one we allow. When
* the second read from the vector occurs we are done and just exit. */
if ((address == MIPS32_PRACC_TEXT) && (pass++))
{
break;
}
if ((retval = mips32_pracc_exec_read(&ctx, address)) != ERROR_OK)
return retval;
}
if (cycle == 0)
break;
}
@endcode
and using presented R (mips32_pracc_exec_read()) and W (mips32_pracc_exec_write()) functions it reads in the code (RO) and reads and writes operands (RW).
@section fdimpl OpenOCD FASTDATA Implementation
OpenOCD FASTDATA write function, mips32_pracc_fastdata_xfer() is called from bulk_write_memory callback, which writes a count items of 4 bytes
to the memory of a target at the an address given. Because it operates only on whole words, this should be faster than target_write_memory().
In order to implement FASTDATA write, mips32_pracc_fastdata_xfer() uses the following handler :
@code
uint32_t handler_code[] = {
/* caution when editing, table is modified below */
MIPS32_MFC0(15,31,0), /* move COP0 DeSave to $15 */
};
@endcode
In the begining and the end of the handler we have fuction prologue (save the regs that will be clobbered) and epilogue (restore regs),
and in the very end, after all the xfer have been done, we do jump to the MIPS32_PRACC_TEXT address, i.e. Debug Exception Vector location.
We will use this fact (that we came back to MIPS32_PRACC_TEXT) to verify later if all the handler is executed (because when in RAM,
processor do not stall - it executes all instructions untill one of them do not demand access to dmseg (if one of it's opernads is there)).
This handler is put into the RAM and executed from there, and not instruction by instruction, like in previous simple write
(mips_m4k_write_memory()) and read (mips_m4k_read_memory()) functions.
N.B. When it is executing this code in RAM, CPU will not stall on instructions, but execute all until it comes to the :
@code
MIPS32_LW(9,0,8) /* start addr in t1 */
@endcode
and there it will stall - because it will see that one of the operands have to be fetched from dmseg (EJTAG memory, in this case FASTDATA memory segment).
This handler is loaded in the RAM, ath the reserved location "work_area". This work_area is configured in OpenOCD configuration script and should be selected
in that way that it is not clobbered (overwritten) by data we want to write-in using FASTDATA.
What is executed instruction by instruction which is passed by dongle (via EJATG memory) is small jump code, which jumps at the handler in RAM.
CPU stalls on dmseg when receiving these jmp_code instructions, but once it jumps in RAM, CPU do not stall anymore and executes bunch of handler instructions.
Untill it comes to the first instruction which has an operand in FASTDATA area. There it stalls and waits on action from probe.
It happens actually when CPU comes to this loop :
@code
MIPS32_LW(9,0,8), /* start addr in t1 */
MIPS32_LW(10,0,8), /* end addr to t2 */
/* loop: */
/* 8 */ MIPS32_LW(11,0,0), /* lw t3,[t8 | r9] */
/* 9 */ MIPS32_SW(11,0,0), /* sw t3,[r9 | r8] */
MIPS32_BNE(10,9,NEG16(3)), /* bne $t2,t1,loop */
@endcode
and then it stalls because operand in r8 points to FASTDATA area.
OpenOCD first verifies that CPU came to this place by :
@code
/* next fetch to dmseg should be in FASTDATA_AREA, check */
and then passes to CPU start and end address of the loop region for handler in RAM.
In the loop in handler, CPU sees that it has to take and operand from FSTDATA area (to write it to the dst in RAM after), and so it stalls, putting PrAcc to "1".
OpenOCD fills the data via this loop :
@code
for (i = 0; i < count; i++)
{
/* Send the data out using fastdata (clears the access pending bit) */
if ((retval = mips_ejtag_fastdata_scan(ejtag_info, write_t, buf++)) != ERROR_OK)
return retval;
}
@endcode
Each time when OpenOCD fills data to CPU (via dongle, via dmseg), CPU takes it and proceeds in executing the endler. However, since handler is in a assembly loop,
CPU comes to next instruction which also fetches data from FASTDATA area. So it stalls.
Then OpenOCD fills the data again, from it's (OpenOCD's) loop. And this game continues untill all the data has been filled.
After the last data has beend given to CPU it sees that it reached the end address, so it proceeds with next instruction. However, rhis instruction do not point into dmseg, so
CPU executes bunch of handler instructions (all prologue) and in the end jumps to MIPS32_PRACC_TEXT address.
On it's side, OpenOCD checks in CPU has jumped back to MIPS32_PRACC_TEXT, which is the confirmation that it correclty executed all the rest of the handler in RAM,
and that is not stuck somewhere in the RAM, or stalling on some acces in dmseg - that would be an error :
FASTDATA register is 1-bit width register. It takes in SPrAcc bit which should be shifted first,
followed by 32 bit of data.
Scan width of FASTDTA is 33 bits in total : 33 bits are shifted in and 33 bits are shifted out.
First bit that is shifted out is SPrAcc that comes out of Fastdata register and should give us status on FATSDATA write we want to do.
@section fdcheck OpenOCD misses FASTDATA check
Download flow (probe -> target block transfer) :
1) Probe transfer target execution to a loop in target memory doing a fixed number of "loads" to fastdata area of dmseg (and stores to the target download destination.)
2) Probe loops attempting to satisfy the loads "expected" from the target.
On FASTDATA access "successful" move on to next "load".
On FASTDATA access "failure" repeat until "successful" or timeout.
(A "failure" is an attempt to satisfy an access when none are pending.)
Note: A failure may have a recoverable (and even expected) cause like slow target execution of the load loop. Other failures may be due to unexpected more troublesome causes like an exception while in debug mode or a target hang on a bad target memory access.
Shifted out SPrAcc bit inform us that there was CPU access pendingand that it can be complete.
Basically, we should do following procedure :
- Download (dongle -> CPU) :
You shift "download" DATA and FASTDATA[SPrAcc] = 0 (33 bit scan) into the target. If the value of FASTDATA[SPrAcc] shifted out is "1" then an access was pending when you started the scan and it is now complete.
If SPrAcc is 0 then no access was pending to the fastdata area. (Repeat attempt to complete the access you expect for this data word. Timeout if you think the access is "long overdue" as something unexpected has happened.)
- Upload (CPU -> dongle) :
You shift "dummy" DATA and FASTDATA[SPrAcc] = 0 (33 bit scan) into the target. If the value of FASTDATA[SPrAcc] shifted out is "1" then an access was pending when you started the scan and it is now complete. The "upload" is the DATA shifted out of the target.
If SPrAcc is 0 then no access was pending to the fastdata area. (Repeat attempt to complete the access you expect for this data word. Timeout if you think the access is "long overdue" as something unexpected has happened.)
Basically, if checking first (before scan) if CPU is pending on FASTDATA access (PrAcc is "1"), like this
@code
wait(ready);
do_scan();
@endcode
which is inefficient, we should do it like this :
@code
BEGIN :
do_scan();
if (!was_ready)
goto BEGIN;
@endcode
by checking SPrAcc that we shifted out.
If some FASTDATA write fails, OpenOCD will continue with it's loop (on the host side), but CPU will rest pending (on the target side)
waiting for correct FASTDATA write.
Since OpenOCD goes ahead, it will eventually finish it's loop, and proceede to check if CPU took all the data. But since CPU did not took all the data,
it is still turns in handler's loop in RAM, stalling on Fastdata area so this check :
LOG_ERROR("mini program did not return to start");
@endcode
fails, and that gives us enough information of the failure.
In this case, we can lower the JTAG frquency and try again, bacuse most probable reason of this failure is that we tried FASTDATA upload before CPU arrived to rise PrAcc (i.e. before it was pending on access).
However, the reasons for failure might be numerous : reset, exceptions which can occur in debug mode, bus hangs, etc.
If lowering the JTAG freq does not work either, we can fall back to more robust solution with patch posted below.
To summarize, FASTDATA communication goes as following :
-# CPU jumps to Debug Exception Vector Location 0xFF200200 in dmseg and it stalls, pending and waiting for EJTAG to give it first debug instruction and signall it by putting PrAcc to "0"
-# When PrAcc goes to "0" CPU execute one opcode sent by EJTAG via DATA reg. Then it pends on next access, waiting for PrAcc to be put to "0" again
-# Following this game, OpenOCD first loads handler code in RAM, and then sends the jmp_code - instruction by instruction via DATA reg, which redirects CPU to handler previously set up in RAM
-# Once in RAM CPU does not pend on any instruction, but it executes all handler instructions untill first "fetch" to Fastdata area - then it stops and pends.
-# So - when it comes to any instruction (opcode) in this handler in RAM which reads (or writes) to Fastdata area (0xF..F20.0000 to 0xF..F20.000F), CPU stops (i.e. stalls access).
I.e. it stops on this lw opcode and waits to FASTDATA TAP command from the probe.
-# CPU continues only if OpenOCD shifted in SPrAcc "0" (and if the PrAcc was "1"). It shifts-out "1" to tell us that it was OK (processor was stalled, so it can complete the access),
and that it continued execution of the handler in RAM.
-# If PrAcc was not "1" CPU will not continue (go to next instruction), but will shift-out "0" and keep stalling on the same instruction of my handler in RAM.
-# When Fastdata loop is finished, CPU executes all following hadler instructions in RAM (prologue).
-# In the end of my handler in RAM, I jumps back to begining of Debug Exception Vector Location 0xFF200200 in dmseg.
-# When it jumps back to 0xFF200200 in dmseg processor stops and pends, waiting for OpenOCD to send it instruction via DATA reg and signal it by putting PrAcc to "0".
LOG_WARNING("Verification will fail since checksum in image (0x%8.8"PRIx32") to be written to flash is different from calculated vector checksum (0x%8.8"PRIx32").",
original_value,checksum);
LOG_WARNING("To remove this warning modify build tools on developer PC to inject correct LPC vector checksum.");
Some files were not shown because too many files have changed in this diff
Show More
Reference in New Issue
Block a user
Blocking a user prevents them from interacting with repositories, such as opening or commenting on pull requests or issues. Learn more about blocking a user.
