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Freddie Chopin
0e6c42eb42 The openocd-0.7.0-rc1 release candidate.
Change-Id: I2992c31b56b88062cdd8a8208506a61f6367fcbf
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-21 09:42:33 +02:00
Freddie Chopin
4bfa4858d1 Add "lpc1800" alias for "lpc4300" flash driver
Change-Id: I6d2bb9105cc778bd1d21580022529d684c3b21b0
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/1351
Tested-by: jenkins
2013-04-21 07:30:41 +00:00
Matt Dittrich
ad1c9cdbcb flash/nor: add lpc4300 variant to lpc2000 driver
This patch adds flash programming support for internal flash of the
LPC43x2/3/5/7 part, tested on a LPC4337 (also tested on a LPC1768
and LPC2468). It should also work with LPC1800's with onchip flash.
The "base" parameter of the "flash bank" command is now significant
for the lpc4300 variant and required to determine the bank number
parameter needed by the IAP routines.

NOTE: I could only program flash successfully when the chip is powered
with "P2_7" pulled low to put it in ISP mode.  When running from flash
(and not the ISP ROM), the target fails to halt and the sector erase
fails. This is similar to the behavior I remember when trying out the
spifi driver on a LPC4350... lots of power cycles to make progress, one
To burn, one to run.  So I am not confident my config is set up correctly.

Change-Id: I8a75ef1b95cedd5b5898b2dedff477f502fd19f3
Signed-off-by: Matt Dittrich <mdittrich.dev@gmail.com>
Reviewed-on: http://openocd.zylin.com/1126
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested-by: jenkins
2013-04-21 07:29:59 +00:00
Freddie Chopin
906d6aaa19 Improve HACKING
Reword info about creating SSH key - it's not required to add it to
Github account. Mention adding created SSH key to Gerrit account -
without this step it's not possible to access Gerrit in further
steps.

Change-Id: Ibd81521fbe47d4b4beae0b77cdc9d939fd3ee20c
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/1350
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2013-04-21 07:29:29 +00:00
Spencer Oliver
ff1108ad38 telnet: add telnet history support
adapted from Yoshinori Sato's patch:
2f07f4600a

Change-Id: I084b86d316b0aa6e9593f007c024961dbda805e9
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1310
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-21 07:28:32 +00:00
R. Steve McKown
d7646942f2 Support newer OSBDM firmware
OSBDM: add new VID:PID implemented in OSJTAG/OSBDM firmware somewhere
between versions 30.13 and 31.21.  PFLASH programming works with this
patch, tested on a Freescale Kinetis TWR-K20D72M using its onboard OSBDM
JTAG adapter.

Note: flash program testing required hacking kinetis_write() to force
longword programming, as the FTFL program section commands formulated by
kinetis_write() currently fail on this board's PK20DX256VLL7 processor.

Change-Id: Ib7b92ff2fe9ebf6158fb1489f554a19e96cd9651
Signed-off-by: R. Steve McKown <rsmckown@gmail.com>
Reviewed-on: http://openocd.zylin.com/1348
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-21 07:27:31 +00:00
Andreas Fritiofson
79d6d3cda9 stm32f30x: Add boundary scan TAP ID to match silicon
Change-Id: I74ef3cfc437540aedd99da46ac3e0c6cd9c5cd8d
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1354
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-21 07:19:35 +00:00
Salvador Arroyo
9695564e63 mips: m4k alternate pracc code. Patch 4
Now all the functions with only fetch accesses are modified.
The same delay between scans has been added to mips32_pracc_fastdata_xfer(), it should work
at the same scan rates as the other pracc functions, but it needs higher scan_delays
to work.

Change-Id: Ifb31d8ea6de9d22674385782913d221a2494dbbf
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/1196
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-20 19:32:29 +00:00
Salvador Arroyo
d5e564625f mips: m4k alternate pracc code. Patch 3
Functions mips32_pracc_read_mem(), mips32_cp0_read() and mips32_pracc_read_regs() are now modified.
mips32_cp0_read() is very similar to mips32_read_u32() with one store access.
mips32_pracc_read_regs() is the only function that can not be executed from only one queue.
Now this function is modified to use reg8, it saves all the registers but does not restore reg8.
To remedy this, mips_ejtag_config_step() is called after mips32_save_context() in
mips_m4k_debug_entry(). Function mips_ejtag_config_step() is modified to use reg8 and
restore it from ejtag info instead of using DeSave for save/restore.

Change-Id: Icc224f6d7e41abdec94199483401cb512cc0b450
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/1195
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-20 19:32:25 +00:00
Salvador Arroyo
37c28903a1 mips: m4k alternate pracc code. Patch 2
Each pracc function defines a variable ctx of type struct pracc_queue_info.
To simplify the code tree auxiliary functions are defined: pracc_queue_init(), pracc_add() and
pracc_queue_free().
The second parameter in pracc_add() is the store address if the instruction is a store at dmseg,
otherwise it should be 0.
The code is executed by mips32_pracc_queue_exec(). If ejtag_info->mode is 0 mips32_pracc_exec()
is called and it should work like with current code.
To generate the delay between scans the number of clock ticks are calculated with the help of
jtag_get_speed_khz(). Due to delays in the execution of each single ftdi instruction the number of ticks
are higher as it should be, specially at higher scan rates.
mips32_pracc_read_u32() should now work with the new code.

Change-Id: I471590a4fc89b56af10bd46c48767b4c64de154f
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/1194
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-20 19:32:19 +00:00
Salvador Arroyo
109f37c161 mips: m4k alternate pracc code. Patch 1
This patch and the following patches define another way of doing processor access without the need to read back
the pracc address as needed in current pracc code.
Current pracc code is executed linearly and unconditionally. The processor starts execution at 0xff200200
and the fetch address is ever incremented by 4, including the last instruction in the delay slot of the branch to start.
Most of the processor accesses are fetch and some are store accesses.
After a previous patch regarding the way of restoring registers (reg8 and reg9), there are no load processor accesses.
The pracc address for a store depends only on the store instruction given before.
m4k core has a 5 stage pipeline and the memory access is done in the 3rth stage. This means that the store access
will not arrive immediately after a store instruction, it appears after another instruction enters the pipeline.
For reference: MD00249 mips32 m4k manual.
A new struct pracc_queue_info is defined to help each function in generating the code. The field pracc_list holds in the
lower half the list of instructions and in the upper half the store addressess, if any. In this way the list can be used by
current code or by the new one to generate the sequence of pracc accesses.
For every pracc access only one scan to register "all" is used by calling the new function mips_ejtag_add_scan_96().
This function does not call jtag_execute_queue(), all the scans needed can be queued before calling for execution.
The pracc bit is not checked before execution, is checked after the queue has been executed.
Without calling the wait function the code works much faster, but the scan frequency must be limited. For pic32mx
with core clock at 4Mhz works  up to 600Khz and with 8Mhz up to 1200. To increase the scan frequency a delay
between scans is added by calling jtag_add_cloks().
A time delay in nano seconds is stored in scan_delay, a new field in ejtag_info, and a handler is provided for it.
A mode field is added to ejtag_info to hold the working mode. If a time delay of 2ms (2000000 ns) or higher is set,
current code is executed, if lower, new code is executed.
Initial default values are set in function mips32_init_arch_info. A reset does not change this settings.

Change-Id: I266bdb386b24744435b6e29d8489a68c0c15ff65
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/1193
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-20 19:32:10 +00:00
Freddie Chopin
1936646fc2 Improve clone command in README
Without the explicit dir at the end the repository will be cloned to "code".

Change-Id: Icd8b55b4ba74f23b214c3844e2fb785377768119
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/1349
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Tested-by: jenkins
2013-04-20 07:59:04 +00:00
Ben Nahill
28cf4e463b stm32w: Added sample target configuration for STM32W108 with STLink-V2
As requested, here is the target configuration that I'm using for an
STLink-V2-attached STM32W108C8. For some reason, it only seems to work
with "reset_config trst_only".

Change-Id: Icbff4f83343e1f505d8afdfc53ff6f8b7496cac9
Signed-off-by: Ben Nahill <bnahill@gmail.com>
Reviewed-on: http://openocd.zylin.com/1347
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-19 20:36:11 +00:00
Ben Nahill
2cb486213e topic: STM32W support added to em357 driver
The em357 driver only supported one page configuration (192k in 96 2048k)
pages. This is fine for em357 chips since that's the size they have, but
ST's STM32W chips (pretty much the same) have different flash
configurations available (64, 128, 192, 256k). I can't find anywhere
that would indicate the size of the chip anywhere in memory so the
selection must be manual, using the 'size' parameter. For backwards
compatibility, any size not known to be in use defaults to the 192k
configuration. I don't have any em357 devices to test, but I also found
that I had to re-assert the FPEC clock enable before performing an
erase. This is a single line and shouldn't break any configurations.

My testing so far has only been with a 64k device with 8k of RAM.

Change-Id: Ic0ac400a9696efaa09d1407dd4a4d456bc2c318b
Signed-off-by: Ben Nahill <bnahill@gmail.com>
Reviewed-on: http://openocd.zylin.com/1336
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2013-04-17 21:40:51 +00:00
Spencer Oliver
3f0e9c8ad2 program: do not poll target after reset run
Disable polling the target before we issue a 'reset run'. This stops errors or
warnings if the target disables the SWD or JTAG interface as part of the
application code.

Change-Id: I5019dffdad41a8e210003ece1caf89069ee0f223
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1331
Tested-by: jenkins
2013-04-17 09:52:40 +00:00
Spencer Oliver
b2189fa936 stlink: fix connect under reset issues
We need to make sure that srst is asserted before we attempt to switch into
jtag or swd mode otherwise we receive a error (-9) - invalid device id.

Change-Id: I625166c751cfba8e8a5290f40122bb9afc9dbb39
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1315
Tested-by: jenkins
2013-04-17 09:52:25 +00:00
Spencer Oliver
0a33b7b2aa parport: fix parport_toggling_time regression
If parport_toggling_time is called before the adapter speed has been
configured then the call fails. Probably not the best fix, but does at least
enable parport_toggling_time to be used again.

This regression was added in commit 740b9e25b4

Change-Id: I90300916d6bda5ef053c557e5ac136c4f002bdd1
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1309
Tested-by: jenkins
2013-04-17 09:51:59 +00:00
Andreas Fritiofson
46bcaec696 ft2232: remove ft2232_large_scan memory leak
This is a very long outstanding issue see:
http://lists.berlios.de/pipermail/openocd-development/2011-June/019404.html

As this driver is deprecated the fix is added to purely to reduce the warnings
reported by clang.

Change-Id: I3a16a704e0e8db27efda50fdcfdd35abf5ebed0f
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1278
Tested-by: jenkins
2013-04-17 09:50:31 +00:00
Spencer Oliver
305832c49d libusb: disable debug messages by default
Change-Id: I15dec0f521502139b57adaff576516af7883a74b
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1314
Tested-by: jenkins
2013-04-17 09:49:45 +00:00
Spencer Oliver
3ad44cc1f5 jimtcl: update embedded jimtcl
Update to latest jimtcl commit 2c1eba991e21a6f0b531fb0f83e21f9e6ee7c515.
This fixes issues when building on certain versions of Mac OSX.

Change-Id: I551477752d7913c84e6deb60b889d0c14bd200a0
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1311
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
2013-04-17 09:49:27 +00:00
Peter Dietzsch
460eb952d8 cfg: Added cfg script for at91sam4sd32x targets
Change-Id: I3b8a54d89a180bfded3dae3f1fe3d940540e6e7d
Signed-off-by: Peter Dietzsch <peter.dietzsch@ib-dt.de>
Reviewed-on: http://openocd.zylin.com/1333
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2013-04-15 16:56:49 +00:00
Peter Dietzsch
665ac60ef0 flash: Added support for at91sam4sd32c
Change-Id: I7223980602d7595a3dd7a3ceaac3f58d4f73f88d
Signed-off-by: Peter Dietzsch <peter.dietzsch@ib-dt.de>
Reviewed-on: http://openocd.zylin.com/1332
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2013-04-15 16:56:38 +00:00
Yann Vernier
441914978d ft2232: fix input scan ending in drshift/irshift
The final bit was incorrectly added as output data, even if no data was
to be written. Changed it to match handling of other bits.

Change-Id: I91e5ba0c932876bfb579c22e6c7ef0300baa1534
Signed-off-by: Yann Vernier <yann.vernier@orsoc.se>
Reviewed-on: http://openocd.zylin.com/1049
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-04-11 16:14:18 +00:00
Michel JAOUEN
50c9315212 arm_adi_v5: fix for csw nonsecure access.
Add command to fix CSW_SPROT in register AP_CSW.
This solves dap apmem access in non secure access.

Change-Id: I7cfcb6434d75f5cfd4a2630a059901cdeea010ce
Signed-off-by: Michel JAOUEN <michel.jaouen@stericsson.com>
Reviewed-on: http://openocd.zylin.com/1276
Tested-by: jenkins
Reviewed-by: mike brown
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-04-11 16:06:31 +00:00
Salvador Arroyo
74db7f9681 mips: code cleanup in cp0 command handlers
After calling mips32_cp0_read() nothing has been queued, the call to jtag_exec_queue() is unnecessary.

Change-Id: Ie25438045a8e9b6b1b170df7b52609d45f284b5a
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/1190
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-04-02 15:14:50 +00:00
Salvador Arroyo
37a6e40250 mips: change in restoring debug working register
In current devel code there are 3 functions (related to m4k code) that need to restore register 8 from pracc stack:
mips32_pracc_read_u32()
mips32_cp0_read()
mips32_pracc_write_mem_generic()

And mips32_pracc_read_mem() needs to restore regs 8 and 9 from pracc stack.

Values in this registers should be the same as read by mips32_pracc_read_regs() when entering debug
mode and can be modified by mips32_pracc_write_regs() when leaving debug mode.
There is no need to read their values from the processor registers every time.

The fields reg8 and reg9 are added to struct mips_ejtag to store these register values
and the call to mips32_save_context() is shifted in mips_m4k_debug_entry() in order
to store them before any other function needs to restore these registers.
For the same reason in function mips_m4k_step() the call to mips_m4k_set_breakpoint(), if needed,
should be made after calling mips_m4k_debug_entry().
For single word write the number of pracc accesses are now 9 or 8, from 13 or 12 in current code,
single word read takes now 10 instead of 12.

This patch is really the first in a set of patches for an alternate m4k pracc code
much faster that current code. At least for me with pic32mx works fine.

Change-Id: Ibd9df5e8b9f78ce05a180949ba6a561c761b61d6
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/1146
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-04-02 15:14:41 +00:00
Salvador Arroyo
2dde122b66 mips: mips32_pracc_fastdata_xfer() little modification
In this function after loading the handler code and the jump code there is a call
to wait_for_pracc_rw() to verify that a pracc access is pending.
Next the address is read to verify that the handler is running, the address should be at
fastdata area.
Next, another call is made to wait_for_pracc_rw(). This call is not needed, we now already
that a pracc access is pending.
Better we call this function before loading the end address to be sure it is loaded correctly.

Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Change-Id: If311450ea634786fc28cf1a8e18ed24ce5257d20
Reviewed-on: http://openocd.zylin.com/1142
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-04-02 15:13:06 +00:00
Salvador Arroyo
1d040adb0d pic32mx: 0 wait state option
By default pic32mx starts after any reset with 1 wait state for RAM access/exec.
It can be changed to 0 wait states by clearing the BMXWSDRM bit (bit 6) in BMXCON register.
With 0 wait states near doubles the execution speed. CRC check sum can be done much faster
increasing verify_image speed. Fast data transfer also works with a bit higher scan rate, up to 1500 Khz.
This option can be set at any time with
mww 0xbf882004 0x40
or cleared with
mww 0xbf882008 0x40.
Some numbers for FTDI/HS with current devel code and a elf file:

Core clock / wait states	             verify_image speed
------------------------------------|------------------------------

        4 Mhz    /    1                            21 KiB/s
        4 Mhz    /    0                            36 KiB/s
        8 Mhz    /    1                            37 KiB/s
        8 Mhz    /    0                            57 KiB/s

Change-Id: I4092ad0f3753f72f77108718d0ed3a3ab84e3b23
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/1141
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
2013-04-02 15:12:44 +00:00
Salvador Arroyo
c185a5b724 pic32mx: false pending at low core clock
To show up the fail try to step with the core clock set to 31.25Khz
and with a ftdi/hs adapter or with a wiggler, -not with ft2232-.
The scan frequency should be set to 300Khz or higher, at lower frequency probably will not fail.

The code exits with error because the pracc address is at 0x0.

It also fails when using the "all" register, but in this case the code works without any message because the
pracc address is at 0xff202004 when it fails.

I never saw this fail with the core clock set to 500Khz or higher, but ...

The workaround simply puts a 1 ms delay after the execution of the DERET instruction.

Change-Id: I38e8c01a9c39aedd3282140543b83a0844d8ad29
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/1139
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-04-02 15:12:03 +00:00
Henrik Nilsson
70fb53f90b Added support for ARMv7-M in arm io.
Added support for ARMv7-M targets in arm_nandwrite and
arm_nandread.

Change-Id: Iab1d78d401f735e191c6a8519f3619035a300fae
Signed-off-by: Henrik Nilsson <henrik.nilsson@bytequest.se>
Reviewed-on: http://openocd.zylin.com/1188
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-02 15:11:02 +00:00
Evan Hunter
704fc7eb3d Add abort when JTAG-DP transaction times out.
Fixes system hang for devices that don't ignore
transactions to bad addresses.

Change-Id: Ia98344d7efc12951ef79dbc82b8f792b70a22cee
Signed-off-by: Evan Hunter <ehunter@broadcom.com>
Reviewed-on: http://openocd.zylin.com/1115
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-04-02 15:10:25 +00:00
mike brown
2a8a89edcb arm_adi_v5: fix mem_ap_read_buf_u32() JTAG nastiness..
Moved JTAG code out of transport-neutral file (arm_adi_v5.c) into
transport specific file (adi_v5_jtag.c).
Added ap_block_read to dap_ops interface (arm_adi_v5.h) to support
the move.

Change-Id: I796d3984f138aad052b97c77ac9c12ffd1158f74
Signed-off-by: mike brown <mike@theshedworks.org.uk>
Reviewed-on: http://openocd.zylin.com/1277
Tested-by: jenkins
Reviewed-by: Michel JAOUEN <michel.jaouen@stericsson.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-04-02 15:09:40 +00:00
Evan Hunter
0875e64ddb gdb server: Fix buffer overrun - sprintf appends a terminating null to the data which was overrunning the supplied buffer.
Fixes regression introduced in commit 07dcd5648d

Signed-off-by: Evan Hunter <ehunter@broadcom.com>
Change-Id: Iec64233c0da5a044fb984c4b1803309cb636efe9
Reviewed-on: http://openocd.zylin.com/1312
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-04-02 15:05:44 +00:00
Spencer Oliver
900f2998c8 ti_icdi: add icdi_usb_query result check
Change-Id: I0b40586677a77ee6ae46fe120a677616bde22d1e
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1279
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-03-31 09:04:35 +00:00
Spencer Oliver
fe97fab6a0 docs: update incorrect urls
These were missed when git was moved to the new SF platform during Nov 2012.

Change-Id: I7b4ae9dea010d95f9bf4c26841b5b724f41768be
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1248
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2013-03-28 23:24:40 +00:00
Spencer Oliver
8fa4d71d5c docs: remove unnecessary whitespace
Change-Id: I11bad3de145d941b61e9bd4920bc3281ece91ab3
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1245
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-03-28 23:02:40 +00:00
Spencer Oliver
b7e0cd48f0 docs: fix html anchor xref links
makeinfo has a long outstanding bug that means @anchors are not correctly
formatted for split html, see:
http://lists.gnu.org/archive/html/bug-texinfo/2012-06/msg00000.html

The issue relates to using spaces or hyphens in the @anchor name.
Issue also reported via Trac #44

Change-Id: Id72e23375dd167674b2ae5b314e8242b90a72a5f
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1244
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-03-28 23:01:54 +00:00
Thomas Schmid
1da9e595ec at91sam3: Wrong PLLA frequency calculations
The command 'at91sam3 info' ignores PLLA DIV values >1. This patch fixes it.
Tested on a SAM3S4C chip.

Change-Id: I051f41bb3dcefe1ac785fbcb48477a807daa16a2
Signed-off-by: Thomas Schmid <thomas.schmid@gmail.com>
Reviewed-on: http://openocd.zylin.com/1307
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2013-03-24 14:25:29 +00:00
Christian Gudrian
0fd0b8ee7c rtos: fixed handling of qThreadExtraInfo packets
The commit "gdbserver: use common hexify/unhexify routines" [3d62c3d]
mis-replaced a call to "str_to_hex" with a call to "unhexify". "hexify"
should have been used instead.

Change-Id: I5f5904b1b422f819a6308e2c0740ea43d22c7d0b
Signed-off-by: Christian Gudrian <christian.gudrian@gmx.de>
Reviewed-on: http://openocd.zylin.com/1308
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2013-03-24 14:24:50 +00:00
Spencer Oliver
9c450c704c target: fix broken Cortex-R4 support
This regression was caused due to the recent addition of R4 support and
the removal of the bulk_write_memory handler.

Change-Id: Ide692737f235c0e9906becb6f3502ba52c5907aa
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1246
Tested-by: jenkins
2013-03-15 18:00:49 +00:00
Andreas Fritiofson
a7e3418258 target: Retire target_bulk_write_memory()
The only caller was arm_nandwrite(). Replace that call with
target_write_buffer() instead, which in turn may end up calling the same
bulk_write_memory target API function.

Change-Id: If34c7474df5cf14af3b732fb4774816818f28e79
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1214
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-03-15 15:56:35 +00:00
Andreas Fritiofson
4315142ea0 target: Add default implementation of bulk_write_memory
Remove dummy implementations from all targets except arm7_9 and mips, which
are the only ones with real implementations. Replace with a single default
implementation simply calling target_write_memory().

Change-Id: I9228104240bc0b50661be20bc7909713ccda2164
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1213
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-03-15 15:56:25 +00:00
Evan Hunter
13288a44be arch: Added ARMv7R and Cortex-R4 support
Rewrite to merge Cortex-A and Cortex-R code

Change-Id: I4541557980d43d1bba6e8d1bfeb04f536ed25a00
Signed-off-by: Evan Hunter <ehunter@broadcom.com>
Reviewed-on: http://openocd.zylin.com/358
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-03-15 15:54:05 +00:00
Evan Hunter
4e47519f6c adi_v5: search for Debug and Memory AP support
Adds dap_find_ap() function.

Change-Id: I6643025624009b12d4936de67a605da52c07be49
Signed-off-by: Evan Hunter <ehunter@broadcom.com>
Reviewed-on: http://openocd.zylin.com/909
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-03-15 15:53:36 +00:00
Evan Hunter
927e53f8d5 cortex_a : optimize apb read/write access.
Rewrite: Adheres more closely to 'fast read/write' examples in TRM.
up to 50x faster

Change-Id: Ieb4da57d8367628f3e7306827a5b1f0ab550e641
Signed-off-by: Evan Hunter <ehunter@broadcom.com>
Reviewed-on: http://openocd.zylin.com/903
Tested-by: jenkins
Reviewed-by: Michel JAOUEN <michel.jaouen@stericsson.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-03-15 15:50:42 +00:00
Stefan Mahr
700e7605fe jtag: add support for some probes that are mostly compatible with opendous
This patch adds support for usbprog-jtag and usbvlab that are mostly compatible
to opendous except for IN and OUT endpoints and usb transfer mode.

Change-Id: I44557c2449fe7473295038efa6ae4fc8d80ec7bf
Signed-off-by: Stefan Mahr <stefan.mahr@sphairon.com>
Reviewed-on: http://openocd.zylin.com/687
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-03-13 12:55:42 +00:00
Stefan Mahr
30fde70c03 jtag: usb_blaster: fix allocation of usb_blaster_device_desc
usb_blaster_device_desc was allocated, but never freed.

Change-Id: I764bd092c71b8c260b98aab0e7a1710fd7bfa9fd
Signed-off-by: Stefan Mahr <stefan.mahr@sphairon.com>
Reviewed-on: http://openocd.zylin.com/1224
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: jenkins
2013-03-13 12:54:46 +00:00
Stefan Mahr
fac9057f02 jtag: parport: avoid freeing read-only memory section
If command parport_cable is not executed, parport_cable points to
const char array in read-only memory as default. On exit free()
will try to free this read-only memory. This patch uses strdup to
allocate memory when defining default setting.

Change-Id: I290e707ac6a37e9dc1b45c85ca51d8bd6aac6761
Signed-off-by: Stefan Mahr <stefan.mahr@sphairon.com>
Reviewed-on: http://openocd.zylin.com/1223
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-03-13 12:54:40 +00:00
Stefan Mahr
02192f6b8c jtag: opendous: fix tap buffer overflow
Appending bits to TAP buffer doesn't check if there's enough space left.
This patch adds this check to fix TAP overflow error.

Change-Id: If80d5ab4a24983ad24f3cab31f9676d1590ebf5d
Signed-off-by: Stefan Mahr <stefan.mahr@sphairon.com>
Reviewed-on: http://openocd.zylin.com/1216
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-03-13 12:36:57 +00:00
Andreas Fritiofson
9b6de72c2b target: Remove read_memory_imp
Change-Id: Idc6ef3b075ccbb5945df8fea746011cb17175d8f
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1219
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-03-13 12:36:09 +00:00
Andreas Fritiofson
5914310f88 target: Remove write_memory_imp
Change-Id: I5d933bc19443bba8a0193c90471fdd0614324a92
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1218
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-03-13 12:36:04 +00:00
Andreas Fritiofson
80b80ef9b4 target: Remove soft_reset_halt_imp
Change-Id: I12c907584ef73de570eba2dcfeb8477cabc6098f
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1217
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-03-13 12:36:01 +00:00
Rodrigo Melo
dd9145b52e doc: opendous interface based on ft2232H
It was listed in the ft2232 based cables supported. Moreover, the
ft2232_channel option, which was added to support this cable, was explained.

Change-Id: I82ebc7bc10d6472f96ab150e78d623a617edccd2
Signed-off-by: Rodrigo Melo <rmelo@inti.gob.ar>
Reviewed-on: http://openocd.zylin.com/1098
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-03-13 12:33:29 +00:00
Rodrigo Melo
680230c63c interface: opendous_ftdi config file added
This config file add support to the opendous cable based on the chip ft2232H,
using the ft2232 interface driver.

Change-Id: I8171a0c475af8d61e081844ee86466a392138fb0
Signed-off-by: Rodrigo Melo <rmelo@inti.gob.ar>
Reviewed-on: http://openocd.zylin.com/1096
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-03-13 12:32:56 +00:00
Rodrigo Melo
101c602b5e ft2232: ft2232_channel option added
With this option a different channel of the ft2232 chip can be selected using
a previously existing layout. It was made for a partner called Salvador
Tropea.

Change-Id: Ia0dedb2f50e232d089e73788735edc8f47ee23e6
Signed-off-by: Rodrigo Melo <rmelo@inti.gob.ar>
Reviewed-on: http://openocd.zylin.com/1095
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-03-13 12:32:45 +00:00
Drasko DRASKOVIC
8a4835bd26 doc: Added MIPS target document
This document explains MIPS EJTAG operations
implementations within OpenOCD.

Change-Id: Ieaf01f8bc5a97d7b0f2c847bac5fbb2ccf8ba088
Signed-off-by: Drasko DRASKOVIC <drasko.draskovic@gmail.com>
Reviewed-on: http://openocd.zylin.com/904
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-03-13 12:29:54 +00:00
Alex Austin
3533ce0106 Kinetis: Flash command function matches datasheet
The kinetis datasheets specify the flash registers as bytes rather
than as words, as the previous implementation did.  This also makes
a few code sections slightly less endian-magical.

Change-Id: If8f4adfc7f4341085ae5b6eacbf7d74bbd74cf08
Signed-off-by: Alex Austin <alex.austin@spectrumdsi.com>
Reviewed-on: http://openocd.zylin.com/1192
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-03-13 12:29:17 +00:00
Alex Austin
aa3f7887ea Kinetis: Symbolic names for Addresses and Commands
Change-Id: I2165b66c37bd1608139b5dd00f48124161e13ef0
Signed-off-by: Alex Austin <alex.austin@spectrumdsi.com>
Reviewed-on: http://openocd.zylin.com/1191
Tested-by: jenkins
Reviewed-by: Christopher Kilgour <techie@whiterocker.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-03-13 12:28:31 +00:00
Spencer Oliver
7074321ade docs: add gerrit http password url
Add url to show where the http password is configured.
Also add note that password can also be saved to url git config.

Change-Id: I3c1a022580e5f73372b0c50e8d1d2f0b1498966f
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1207
Tested-by: jenkins
2013-03-13 12:25:55 +00:00
Spencer Oliver
2467da4b4a tcl: add flash programming helper
This adds a program proc that simplifies using OpenOCD as a standalone
programmer.

Change-Id: I6ece492cd878c170b734e8bb2e09fe8c4557d5a6
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1199
Tested-by: jenkins
Reviewed-by: Jörg Fischer <turboj@gmx.de>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2013-03-12 08:44:22 +00:00
Øyvind Harboe
a84d237acf rtos: fixes warning
Change-Id: I45db15b16b52c71009d8830985f42ac88eabe160
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/1209
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2013-03-12 08:42:55 +00:00
Spencer Oliver
07dcd5648d gdb: use stdio functions to convert parameters
This reduces the number of gdb conversion routines we have to maintain.

Change-Id: Ia43d6cac86cbe4f76fe0875b9d9c16ac340296db
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1128
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-03-07 21:11:44 +00:00
Rodrigo Melo
7aaf4f75b3 interface: opendous_ftdi config file added
This config file add support to the opendous cable based on the chip ft2232H,
using the ftdi interface driver.

Change-Id: I4491f99d7b14f7078a04583ef0c4acd8692c4349
Signed-off-by: Rodrigo Melo <rmelo@inti.gob.ar>
Reviewed-on: http://openocd.zylin.com/1097
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-03-07 19:06:51 +00:00
Spencer Oliver
e65db159e0 docs: use doxygen keywords for formatting
Rather than use bold fonts etc, use the correct keywords so doxygen formats
better.

Change-Id: Id9d63f0fc3465665376d7a536c4d6da71998f40e
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1210
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2013-03-07 12:38:24 +00:00
Spencer Oliver
1fd8ac0ee6 cfg: add Netgear DG834v3 configuration
Change-Id: I3f4880d8b07b9623544b94d316b37e6d0ae97020
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1189
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-03-06 21:57:29 +00:00
Spencer Oliver
468a4b65ea flash: fix stm32 failed probe using incorrect flash size
This fixes an issue if the device is manually probed after the initial probe
fails due to being unable to read flash size register. In this situation the
driver assumes the user has overridden the flash size when infact this may
not be the case.

It also seems on the older stm32f1 devices the flash register is not readable
when locked, this does not seem to apply to the newer parts - f0, f3, f4.

Change-Id: I125f872fcb2d962ca6705f97b62d957e2b31303b
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1187
Tested-by: jenkins
Reviewed-by: Johan Almquist <johan.almquist@assaabloy.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-03-06 21:10:40 +00:00
Spencer Oliver
f14cf545eb stm32: update stm32f1x driver for f0x and f3x option bytes
The stm32f0 and stm32f3 share the same option byte location, but the format
differs.

Adding an option_offset fixes the broken options_read cmd and incorrectly
setting Hardware Watchdog when unlocking a f3x device.

Change-Id: I82d66b6198294ea9eedb44ca8b2fb368c0cb15e8
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1184
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-03-06 21:10:28 +00:00
Spencer Oliver
1d1f1b95a7 ti-icdi: catch failed icdi_send_cmd
warnings detected by clang.

Change-Id: I1532bcc12a8ab7446646dfb2a7afa8894ff03679
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1180
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-03-06 20:24:24 +00:00
Vladimir Zapolskiy
0581ab7855 cfg: add basic support of Freescale i.MX6 series targets
This change adds a simple target configuration for Freescale
single/dual/quad core i.MX6 SoCs, only one core is configured by default.

Change-Id: I853dd27f4c6765b7f731be2ddea82e85d496c6a4
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Reviewed-on: http://openocd.zylin.com/1135
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-03-06 19:06:06 +00:00
Spencer Oliver
dcfa3ac7c7 target: use common target_name to access target::cmd_name member
Change-Id: I203b89ef25a072c3b00b504483d5f2a83477fad6
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1182
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-03-06 19:04:31 +00:00
Peter Henn
ef83a9ee93 speed up ftdi by reorder to out-in
When the ftdi driver calls finally the mpsse_flush function, it first
initiate the USB in and finally the corresponding USB out transaction.
Because data in is requested too early the USB device will always answer
the first USB in by a NAK. That can prevented by a simple reordering of
the out and then the in transfer and can improve the Jtag performance for
high JTAG clock rates.

Change-Id: I17abf1487c914c92e2e447ee6d30562ef629f327
Signed-off-by: Peter Henn <Peter.Henn@web.de>
Reviewed-on: http://openocd.zylin.com/942
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
2013-03-06 19:03:37 +00:00
Mathias K
0f1d00bda6 Change reset configuration.
This patch change the default reset config from SYSRESETREQ to the working
VECTRESET.

Change-Id: I21a9a74b9c0c68cfa3a6e6dac9b123acc98a93cb
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/1186
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-03-05 15:09:23 +00:00
Mathias K
5d80b36552 Move back off timer to target struct
Move the global target back off timer to the target struct. This will
fix the wrong error handling with multi target devices like smp systems.

Change-Id: Ia327182ed5d13ca87323700017a8c40ecc6b25a3
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/1179
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-03-05 15:08:52 +00:00
Mathias K
c4e0109644 Add the target name to debug output for better understanding and error identification.
Change-Id: I1054debea6cd3a6548aadeae2d84000a0039814e
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/1178
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-03-05 15:08:27 +00:00
Freddie Chopin
57aa19f846 Update HACKING info
Inform about possibility of discarding negative review in Gerrit when specific conditions are met.

Change-Id: I432b6c93cefc368fa22ce1096bea4cd174e03816
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/747
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Tested-by: Øyvind Harboe <oyvindharboe@gmail.com>
2013-02-28 06:22:51 +00:00
Spencer Oliver
3d62c3df6d gdbserver: use common hexify/unhexify routines
Change-Id: I9989b625666e9c60ec9867cf6f4d94f41c998c3f
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1105
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2013-02-26 20:49:49 +00:00
Joerg Fischer
80f78acf73 Fix buffer overflow in versaloon interface
The USB buffer will need space for both TMS and TDI buffers.
Each holds tap_buffer_size bytes maximum, so tap_buffer_size must be
smaller than half of usb buf_size.

Change-Id: Id8f39936a894cbd98deb89eec5a859aef1e2b783
Signed-off-by: Joerg Fischer <turboj@gmx.de>
Reviewed-on: http://openocd.zylin.com/1136
Tested-by: jenkins
Reviewed-by: simon qian <simonqian.openocd@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-02-25 11:59:17 +00:00
Spencer Oliver
b00b9f2d7d target: hla correctly use target events
Because we were always running using target state TARGET_RUNNING target
algorithm's were a bit verbose compared to other targets.

This brings the hla target inline with the other targets.

Change-Id: I3a257fdc878b87660fac8b5eca22b421eee5b349
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1134
Tested-by: jenkins
2013-02-25 11:57:46 +00:00
Spencer Oliver
17b57f8865 armv7m: update to use correct register core_cache
The was missed when the armv7m was moved over to using the std arm
core_cache, probably because it is disabled by default.

Change-Id: I2f5a18ef6dd783b36e8c29f4c52379104bda4583
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1138
Tested-by: jenkins
2013-02-25 11:57:09 +00:00
Johan Almquist
15d6602e8a stm32: add support for stm32l1x 256k high density single bank devices
Added support for new ST devices in the stm32lx portfolio, with device
id 0x427. These have 256k flash, but in a single bank compared to
device id 0x436 which is a dual bank flash.

Change-Id: Iafdfe990f24bd04b0d6e00385ee70690f3bf8d5f
Signed-off-by: Johan Almquist <johan.almquist@assaabloy.com>
Reviewed-on: http://openocd.zylin.com/1140
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-02-25 11:56:42 +00:00
Johan Almquist
bfe1a6c892 stm32: add support for the STM32Lx 384kb dual bank flash
This update adds support for the STM32Lx 384kb dual bank flash. Previously there was a problem when writing an
image that was larger than 192Kb. That lead to openocd printing out two error messages like
"Error: access denied / write protected" and "Error: invalid program address". The reason was that the stm32lx
driver tried to write half pages which overlapped into the next flash bank.
A new configuration file stm32lx_dual_bank.cfg can be used for stm32lx chips with dual bank flash (256kb or 384kb devices).
A sanity check was added for probed flash size values to fix the issue seen on some ST samples that answered incorrectly.

Change-Id: I69e25131983d88613be8606b438f98870c5f1e52
Signed-off-by: Johan Almquist <johan.almquist@assaabloy.com>
Reviewed-on: http://openocd.zylin.com/1125
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-02-25 11:56:34 +00:00
Spencer Oliver
bd5df8520b stm32: enable flash bank size override
It has been seen on some stm32 targets that the flash size register that
is probed by the driver may contain an invalid size.

This change enables the user to override the probed value.

Change-Id: I09359e59a96f9133d3d939670957d32a830a944e
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1132
Tested-by: jenkins
Reviewed-by: Johan Almquist <johan.almquist@assaabloy.com>
2013-02-25 11:56:18 +00:00
Franck Jullien
87668aebf1 jtag_interface: .speed can be NULL when not needed
adapter_init (core.c) won't check speed configuration
of the selected interface if it's not needed (.speed = NULL).

When it's not needed, we can now omit adapter_khz in
init scripts and we don't have to implement dummy handlers
for speed_div and khz functions.

It also removes calls to adapter_khz in interface configuration
files when not used anymore.

Change-Id: I6eb1894385503fede542a368f297cec6565eed44
Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Reviewed-on: http://openocd.zylin.com/1131
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-02-08 22:33:19 +00:00
Spencer Oliver
feddedb6db armv7m: use ARM_MODE_THREAD core mode for algoorithm's
This makes sure we are using privileged mode when executing any loaders.

Change-Id: I18bf32ec92e1c76a66ab25e3712652bc3650b332
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1108
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-02-02 16:22:25 +00:00
Spencer Oliver
f4f87cb472 armv7m: restore core mode after executing algorithm
Make sure we restore the core mode after executing any algorithm.

We also now check that we actually need to swap the core mode, we may
already be in the correct mode.

Change-Id: Ia48af2c108e0f9868aae241bf25f60323503f092
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1107
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-02-02 16:22:19 +00:00
Spencer Oliver
98709ab461 armv7m: use generic arm read/write_core_reg
Change-Id: I0c15acc1278d2972269d294078495e6b069c830b
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/969
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-02-02 16:22:12 +00:00
Spencer Oliver
e6b27756da armv7m: use generic register core_cache
This removes the armv7m::core_cache and uses the generic arm::core_cache.

Change-Id: If854281b31486cea8be005008f6a71a691b4c208
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/968
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-02-02 16:22:04 +00:00
Spencer Oliver
85ed6ea59f armv7m: remove unused armv7m_regtype
This simplifies the armv7m_core_reg structure ready for the move to using
the generic struct arm_reg.

Change-Id: I8edb9d77cc54965d49cd2e754568ebcea4cf6964
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/967
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-02-02 16:21:50 +00:00
Spencer Oliver
fc2abe63fd armv7m: use generic arm::core_mode
To simplify things change over to using the generic core_mode struct rather
than maintaining a armv7m specific one.

Change-Id: Ibf32b785d896fef4f33307fabe0d8eb266f7086f
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/966
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-02-02 16:21:41 +00:00
Spencer Oliver
bf3f35092e helper: hexify correctly handle signed chars
The current implementation of hexify was not correctly handling signed chars.

This function is currently used by the ti-icdi driver and as such was causing
random write issues.

As a note perhaps a better long term fix would be to change to using uint8_t
buffers rather than char. This will require changes to the ti-icdi driver
aswell.

Change-Id: I572e69ff2b99227a7d412de056458c0393794b03
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1124
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2013-01-31 14:50:24 +00:00
Freddie Chopin
4a5c9a4965 rtos: fix error message
Probably a copy&paste error or remainings of some older version.

Change-Id: Ifb81a9a1fe8242f3b114cd0686dd264fbaad4920
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/1123
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2013-01-27 18:44:05 +00:00
Spencer Oliver
08fc741733 rtos: do not use LOG_OUTPUT
LOG_OUTPUT is not intended for general output so use the correct LOG_*
functions instead.

Change-Id: I48d0fe765637024dbafc68f2ea08219d3ff42754
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1104
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-01-27 14:29:34 +00:00
Evan Hunter
b5c616b90e rtos: Fix regression preventing use of first RTOS & clean up rtos_qsymbol()
ThreadX support was not working due to it being first in the list of RTOS - regression.
Auto-detect off, an RTOS was always be marked as successfully detected, even if symbols are not found.
Lines 223-227 were unnecessary as they are done in rtos_try_next()
Added lots of comments
Improved readability by separating: GDB not finding a symbol vs no more symbols being available

Regression caused by patch which was allowed only 52 minutes for review : http://openocd.zylin.com/895

Change-Id: Ib4decb01db595ddb3796837c6d8338ce6b9a91ca
Signed-off-by: Evan Hunter <ehunter@broadcom.com>
Reviewed-on: http://openocd.zylin.com/986
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-01-27 14:29:18 +00:00
Spencer Oliver
f54a639b28 jtag: only change state if necessary
All the other drivers will only change the state if required.
This brings all the other drivers inline with this behaviour.

The original issue relates to problems on xscale commit 7989000e09

Change-Id: Ifc90ec2eef68a70a14f37c00931a07982bfa200c
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1114
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-01-27 14:16:52 +00:00
Hsiangkai Wang
f807d6ab3d libusb: idProduct of USB device may be zero
There is no constraint about idProduct in USB spec.  So, pids[i] may be 0 for USB devices.

Change-Id: I19d8974f4e7082e8b7e1f2d33c019ac4e61bc1e2
Signed-off-by: Hsiangkai Wang <hsiangkai@gmail.com>
Reviewed-on: http://openocd.zylin.com/1091
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-01-27 14:14:21 +00:00
Spencer Oliver
3eb7d77601 hla: enable DWT component and fix watchpoints
The makes sure the DWT component is always enabled so that watchpoints
work as expected.

This does need merging into the existing cortex_m logic, however at the
moment this is non trivial.

Change-Id: Ic6cccd1badb51f70a2ca8ea9ab6923788a94c1bf
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1122
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-01-27 14:07:59 +00:00
Spencer Oliver
d631b2e5ac flash: add stm32lx loader Hard Fault workaround
An issue has been seen with the stm32lx flash driver that if a
power cycle/reset is applied after a erase, any ram loader will Hard Fault
on execution.

A similar issue is mentioned in the errata for the device.
Two solution's seem to workaround this issue:
1, Handle the exception, this means adding exception vectors to the loader
   and changing the exception address using nvic vtor register.
2. falling back to using slower direct page writes - approx 50% slower.

Using solution 1 would mean restrictions are placed on the loader location.
Solution 2 was chosen mainly as it was simpler too implement.

Change-Id: I429f06b5a3e3b1d8de90071a88a7df11fc9b46a7
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1010
Tested-by: jenkins
2013-01-21 16:46:09 +00:00
Spencer Oliver
6efcd943b2 flash: reduce stm32lx loader timeout
Waiting 20secs is a bit much excessive, we could probably reduce to 5.

Change-Id: Iffb97adb99c2541a075fe78dbc88a53ddf340214
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1009
Tested-by: jenkins
2013-01-21 16:45:56 +00:00
Spencer Oliver
aef50bc563 flash: cleanup stm32lx driver
Handle any leading bytes upto the next 128 byte page, enabling us to safely
use the faster page write.

Rather than use a separate word/byte write to program any trailing bytes
we use a combined write function.

Use memcpy for byte writes and change loader to using bytes.

Change-Id: Ie0164a30388f018dd00e752cf5ff87d4f96ced97
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1008
Tested-by: jenkins
2013-01-21 16:45:20 +00:00
Spencer Oliver
9cdb6b438d docs: update stm32f1x/stm32f2x driver info
As we use the two ST flash drivers for multiple stm32 variants update the
docs as to which targets use which driver.

Change-Id: I84943ff45482a22b3d3dd8491bb4242d79415939
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/990
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-01-21 16:43:30 +00:00
Spencer Oliver
86cc37183a flash: stm32f2x support write protection
Change-Id: I42662681104bb06e28148229464ae144c4a54538
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/989
Tested-by: jenkins
2013-01-21 16:43:09 +00:00
Spencer Oliver
061f828a50 flash: add stm32f2x flash lock/unlock cmds
Change-Id: I35344cc47fa4f0a49c034455c5abf479faa0344a
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/988
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-01-21 16:42:38 +00:00
Spencer Oliver
b2be4934d7 build: replace deprecated AM_CONFIG_HEADER with AC_CONFIG_HEADERS
automake-1.13 has now deprecated AM_CONFIG_HEADER, use the correct
AC_CONFIG_HEADERS instead.

Change-Id: I8adaec64cbad7f7318ff69091176c30b707cbb0b
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1117
Tested-by: jenkins
Reviewed-by: Mikko Viitamäki <mikko.viitamaki@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-01-20 09:43:57 +00:00
Roman D
3ad078cb60 flash: EFM32 GG/LG page size detection fix
Fixed flash page size detection according to EFM32 GG/LG errata.
MEM_INFO_PAGE_SIZE register containts invalid value in devices with
revision number lower than 18 and should not be used.

Change-Id: Idb2832246efcbbec2fd98a5c458f72a36df386fb
Signed-off-by: Roman D <me@iamroman.org>
Reviewed-on: http://openocd.zylin.com/1116
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-01-18 09:19:21 +00:00
Roman Reichel
df7a6b08a6 opendous: Inhibit unnecessary state transitions
When current tap state and end state are the same, transitions are added which is not what should happen.
The usbprog driver was already patched like this long time ago.

Change-Id: I339e87156bdc7b5c83c10c14025b749605d3871a
Signed-off-by: Roman Reichel <romanreichel@aol.de>
Reviewed-on: http://openocd.zylin.com/1113
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-01-16 11:21:49 +00:00
Roman D
7ae9154846 flash: EFM32 flash implementation
Limited (no page unprotect, no block writes) implementation of EFM32
flash support. Verified with EFM32 development kit and STLink V2 adapter
using SWD.

Change-Id: I3db2054d9aa628a1fe4814430425db3c9959c71c
Signed-off-by: Roman D <me@iamroman.org>
Reviewed-on: http://openocd.zylin.com/1106
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-01-14 10:25:55 +00:00
Andreas Fritiofson
76afadeb7b doc: Add documentation for the ftdi driver
Change-Id: I1ade2eb187b404141051d9f59ba06e8e6e5d51aa
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1099
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-01-03 16:21:49 +00:00
Spencer Oliver
48e01a4969 hla: support setting DCB_DEMCR on resume
This is only minimal support to enable use to catch a Hard Fault in
the stm32l flash bootloader.

Change-Id: I21d6a11893e2f1d173ebff1a651d6f52bf6eec32
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1103
Reviewed-by: Peter Stuge <peter@stuge.se>
Tested-by: jenkins
2013-01-02 18:13:18 +00:00
Spencer Oliver
6bd9e3b94f flash: allow stm32f1x options_write args in any order
Currently we have to supply the arg's to this cmd in a set order, this
change fixes that issue.

Change-Id: I14a15732e1917a91009e1ac14fba39ca1523c739
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/992
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-12-31 19:08:25 +00:00
Spencer Oliver
bf2b0a0361 flash: use correct stm32f1x option read mask
Make sure we do not mask out the BFB2 boot bank bit, as this is used on
the larger XL devices.

Change-Id: Iacfdf874140e409e0c4ca9b9aee8f5c2f90dc9be
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/991
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-12-31 19:08:17 +00:00
Spencer Oliver
9060ae7de5 stm32f1x: fix stm32f0/f3 broken unlock
The STM32F0 and F3 devices use a different default RDP to configure a
unlocked device, make sure we use that.

Change-Id: I170779461412c4c202c2cfc8d90baedb7e388150
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/984
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-12-31 19:08:10 +00:00
Spencer Oliver
aebe7596f6 stm32f1x: preserve user option byte data
The user is able to use 2bytes of the options byte data for whatever
purpose they wish. Make sure we preserve this during an option erase/write.

Change-Id: Ibf951b11c59a148e671b1eb47fdc9b4f49ccae15
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/983
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-12-31 19:08:01 +00:00
Szymon Modzelewski
b9dbf569b4 flash: stm32f1x: write option bytes using the loader
Some debuggers (stlink) can't issue 16 bit writes and have to use a
loader to write flash memory.

Currently the loader is not used for option bytes, causing
stm32x_write_options to fail silently on such hardware.

Fix this by using stm32x_write_block to write option bytes as well.

Change-Id: I49c29d53ab5e162463cb349d4c89bef96467e587
Signed-off-by: Szymon Modzelewski <szmodzelewski@gmail.com>
Reviewed-on: http://openocd.zylin.com/480
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-12-31 19:07:51 +00:00
Andreas Fritiofson
cf1418e9a8 doc: Clarify the topic field in the commit comment template
Change-Id: Iea1f3b665b011ca3748800048039d3f6b33d7756
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1101
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Tomasz CEDRO <cederom@tlen.pl>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-12-30 20:07:39 +00:00
Spencer Oliver
9b045f62f4 flash: stm32lx fallback to slow memory writes when no working area
The current stm32lx driver will fail if no working area is
provided - fallback to using slow writes if this is the case.

Change-Id: I92b1535fec4aebc855c63ce2c54b10f168f3c07e
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1007
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-12-30 11:36:40 +00:00
Spencer Oliver
80649fc3d5 cfg: increase stm32l-discovery working area
This part has 16k ram so make it all available.

Change-Id: Ifeb7bc850bfe4f68d0affb8f6a0931b4327e7257
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1006
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-12-30 11:35:16 +00:00
Spencer Oliver
84043a95e1 cfg: stm32l use minimum family ram size for working area
The smallest pert in the family has 10k RAM, so use that as a default
for the working area.

Change-Id: I78be0d14a254c109ac15a7163552c6132f810416
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1005
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-12-30 11:34:46 +00:00
Spencer Oliver
54a8640df0 cfg: enable stlink stm32l HSI
Switch to using the internal HSI when a reset init is called, this also
matches the std stm32l cfg.

Read (verify) speed is increased from 17 to 120 KiB/s.

Change-Id: Ic94ba85949ffdefa17b7be45eef14e30f941d107
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1004
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-12-30 11:34:14 +00:00
Spencer Oliver
f82798c814 flash: add new stm32l HD variant
Updated as per latest RM0038 Rev 6.

Change-Id: Ia11309a1cdc3b8986f808b33a5c565bdc0ba58b0
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1003
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-12-30 11:33:04 +00:00
Spencer Oliver
977db554c4 flash: format stm32f2x driver defines
Change-Id: Ie903996368a8d4313df87839d5ba3f2a102796a3
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/987
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-12-30 08:47:34 +00:00
Spencer Oliver
928289773c stlink: print target voltage if supported
The stlink/v2 has the ability to check the target voltage if the firmware
is recent enough (>= J13).

As a debugging aid we check the voltage at startup and issue an error if
this is too low to debug reliably.

Change-Id: I98e251f3880e31049c4307051c30bedd3451cf87
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/980
Tested-by: jenkins
2012-12-24 11:19:53 +00:00
Spencer Oliver
e0d4d46dbe stlink: add generic open error routine
Change-Id: I1cd18896ab2a37255471a2d160befed8dd8fb544
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/979
Tested-by: jenkins
2012-12-24 11:18:52 +00:00
Spencer Oliver
95025349fa helper: improve windows gdb pipe performance
Reducing the select and MsgWaitForMultipleObjects timeouts to 1ms makes
a 2-300+% increase in the step time of gdb when using pipes under windows OS.

Change-Id: Id7e52cfb2b206347a9caea61672885a3e2b186de
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1050
Tested-by: jenkins
2012-12-24 11:01:03 +00:00
Spencer Oliver
0466ee7e4a gdb: fix correct shutdown when using pipes
50d5441e2a commit added a regression when
using pipes with GDB, OpenOCD would appear to hang when exiting GDB.

This fixes that behaviour so we shutdown correctly.

Change-Id: I9b337c2bdd41b1966de1c7631118257afcbfa6bd
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/993
Tested-by: jenkins
2012-12-24 11:00:52 +00:00
Spencer Oliver
c3e537a340 flash: add stm32f2x rev X
Updated as per ST RM0033 rev 5

Change-Id: I627fdab69b440b75b8e4f7c474216538fa5273a4
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1001
Tested-by: jenkins
2012-12-24 10:59:55 +00:00
Spencer Oliver
69359b1c52 doc: replace luminary with TI urls's
Change-Id: Ic8a768f5a498e78b96421c6137238593c159fd72
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/970
Tested-by: jenkins
2012-12-23 21:46:40 +00:00
Spencer Oliver
67801c061f docs: update docs to include info on TI ICDI
Change-Id: I3009920f512f76901d187318ee50284db34ab6f7
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/924
Tested-by: jenkins
2012-12-23 21:46:31 +00:00
Spencer Oliver
adb8ec32dc icdi: add TI icdi interface
This is the new proprietary interface replacing the older FTDI based adapters.
It is currently fitted to the ek-lm4f232 and Stellaris LaunchPad.

Change-Id: I794ad79e31ff61ec8e9f49530aca9308025c0b60
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/922
Tested-by: jenkins
2012-12-23 21:46:20 +00:00
Spencer Oliver
c7a6f065d2 hla: add ability to configure read/write buffer size
Other adapters (TI ICDI) that use this driver can use a larger
read/write buffer size than the original stlink could.

Change-Id: I9beb7748049097cbe29a2340799c450bd74e199d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/948
Tested-by: jenkins
2012-12-23 21:46:10 +00:00
Spencer Oliver
561984c8f6 hla: fix watchpoints not being set
Watchpoints were not being enabled when the hl adapter target was resumed.
This effects both stlink and icdi interfaces.

Change-Id: Ia9f8a9415be97a467cd099b63b6bc9f7f37d0c0d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/931
Tested-by: jenkins
2012-12-23 21:46:02 +00:00
Spencer Oliver
bd1502eb0f rtos: rename stm32_stlink target to hla_target
Update rtos detection to use the new target name.

Change-Id: I4e55311bcfbc8af55708b43daf0c73b1c8145934
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/923
Tested-by: jenkins
2012-12-23 21:45:54 +00:00
Spencer Oliver
6c467da586 stlink: rename stlink cmd names
As part of the switch to using the hla for the stlink interface we rename
the cmds to a more generic name.

Update scripts to match new names.

Also add handlers for deprecated names.

Change-Id: I6f00743da746e3aa13ce06acfdc93c8049545e07
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/921
Tested-by: jenkins
2012-12-23 21:45:42 +00:00
Spencer Oliver
549d9bc72c target: add deprecated target name support
This enables us to change the target name without breaking any
target scripts.

Change-Id: I635f961e573264d3dab2560f3a803ef1986ccfde
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/919
Tested-by: jenkins
2012-12-23 21:45:23 +00:00
Spencer Oliver
1bba393e3c stlink: print version info
Print stlink info always rather than just when debug log enabled.

Change-Id: I2a29ef046925200e1c94624280c0b252fab5219a
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/925
Tested-by: jenkins
2012-12-23 21:38:09 +00:00
Spencer Oliver
a047d87196 stlink: use common layout
Even though the stlinkv1 and stlinkv2 use different usb classes they share
the same layout scheme.

Merge the two into a common layout, thus enabling us to support other
adapter layouts.

Change-Id: I7d02c44a7f94ebc7f2cb5428b02ee40294fb430d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/918
Tested-by: jenkins
2012-12-23 21:37:50 +00:00
Muranaka Masaki
b7ea4a6162 flash: fm3 mb9bfxx7 mb9bfxx8 support
Patch submitted by Trac #55

Change-Id: I08b0d79d24fe9108ca0bbfbc9b45c60359b6d180
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/981
Tested-by: jenkins
2012-12-14 20:48:40 +00:00
Evan Hunter
26902bb317 rtos: Add Cortex-R4 support for ThreadX
Change-Id: I0b55af690ed917ca783d90d11dcf012f49792ed7
Signed-off-by: Evan Hunter <ehunter@broadcom.com>
Reviewed-on: http://openocd.zylin.com/994
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-12-14 20:45:22 +00:00
Kamal Dasu
db42a373b7 mips_m4k: Fixed mips_m4k_resume code for smp targets
Fix for bug introduced in in mips smp support code
in the  resume logic that is checking for wrong return
value.

Change-Id: Ice3e0069f936b556fecc338ccc12ddba38deeaf6
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Reviewed-on: http://openocd.zylin.com/1048
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-12-11 13:11:07 +00:00
is2t
1e07f7bb6a LPC1788 target configuration file.
Change-Id: I68bd6b7c19d9d1bee13d0921c32b4490e68ab8f2
Signed-off-by: is2t <devel@is2t.com>
Reviewed-on: http://openocd.zylin.com/1002
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-12-11 12:42:32 +00:00
Spencer Oliver
71d43007c6 jtag: fix reset_config copy/paste error
As the other arg checks do not OR, it is assumed this is a copy/paste error
from the original code author.

Change-Id: I7dfc7396254a6f558887def951c57dfd4a0e6c2c
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/997
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-12-10 16:18:45 +00:00
Spencer Oliver
2d75ff3151 stlink: enable connect under reset
Currently if the target supports srst_nogate we wait until target assert_reset
until we get a chance to assert the srst.
However sometimes we will not get this far if the target has already failed
the initial scan.

This has been tested on stm32.

Change-Id: I2c4486942a011534d3e2044788563669bf457b60
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/972
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-12-10 16:17:25 +00:00
Spencer Oliver
67a848424b jtag: enable connect under reset
Currently if the target supports srst_nogate we wait until target assert_reset
until we get a chance to assert the srst.
However sometimes we will not get this far if the target has already failed
the jtag_examine_chain.

This has been tested on targets that support this behaviour (STM32 and STR9).

Change-Id: Ibcf7584b137b472f31ba6ddd5cd99d848c5508d1
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/971
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-12-10 16:16:35 +00:00
Spencer Oliver
c91dbd41ba jtag: add connect_type reset_config mode flag
This adds the ability to request to the adapter how we want to connect to
the target, eg. while srst is asserted or not.

This ability can very handy for connecting to unresponsive targets.
A prerequisite is that the target supports srst_nogate.

Change-Id: I0f7c9475160048e8a963e16077754f5403ac8325
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/976
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-12-10 16:13:52 +00:00
Evan Hunter
539a9cf208 cortex_a: Fix target entry state route.
If target is disabled at init, then is examined using 'arp_examine', it
can get to cortex_a8_poll with the target state being unknown.

Change-Id: Ifffb345bf971d275d2eb1912648b29f0a75f6ccc
Signed-off-by: Evan Hunter <ehunter@broadcom.com>
Reviewed-on: http://openocd.zylin.com/954
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-12-09 21:30:18 +00:00
Kamal Dasu
6d76fc1328 mips_m4k: Added SMP debug support for mips architectures
This change adds smp debug support for mips platforms. The change
leverages the exiting gdb smp support as mentioned in the OpenOCD
documentation for using gdb in smp environemnt. Added commands
smp_on, smp_off, smp_gdb to control the smp mode. The implementation
also provides a way to send Jc packet and toggle the gdb display core
context as well.

Change-Id: I0835a5aed1844b6ebf8291582912f20695346003
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Reviewed-on: http://openocd.zylin.com/937
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-12-09 21:28:21 +00:00
Kamal Dasu
6565988064 mips_ejtag: Adding EJTAG 4.x and 5.x as valid versions
This is a minor change to log EJTAG version 4.x and 5.x
as valid versions when debug log is enabled.

Change-Id: Ie20458d033c6d22842cb4a31b56765d4ba2ff123
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Reviewed-on: http://openocd.zylin.com/936
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-12-09 21:27:47 +00:00
Spencer Oliver
27ad96e0d9 helper: fix code formatting
Change-Id: Ide2d704c9ef4f5563649d5db53bbdd3641868b70
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/995
Tested-by: jenkins
2012-12-03 16:37:03 +00:00
Aymeric Vincent
1a8223f28b Make NetBSD a recognized system
Change-Id: I7fcb540553da7833a8b6a82335a7296539a8f491
Signed-off-by: Aymeric Vincent <vincent.aymeric@gmail.com>
Reviewed-on: http://openocd.zylin.com/998
Reviewed-by: Peter Stuge <peter@stuge.se>
Tested-by: jenkins
2012-11-30 17:16:45 +00:00
Jason Moehlman
3e81c4b6df arm: Mis-aligned data issue fix.
Fixes issue with big endian hosts and mis-aligned data on some hosts.
Fixes unaligned access exception on hosts that do not support unaligned
access when debugging some arm targets.

Signed-off-by: Jason Moehlman <jmoehlma@linux-software.com>
Change-Id: I6bc6fb1b3c3565b256674b9ef43ed2afd14f5178
Reviewed-on: http://openocd.zylin.com/996
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-11-30 11:02:05 +00:00
Spencer Oliver
7155349bd0 stlink: format src defines
Change-Id: I7c3fd6e84681e007f1983ad9b8c85369cf9f3ba1
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/978
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-11-23 21:41:34 +00:00
Spencer Oliver
9785f51f19 flash: add stm32f42x/stm32f43x support
Other than a larger memory layout these new devices also have an extra
MER1 bit to perform the mass erase.

Change-Id: I7110a05bac95c1707160d1f5622181664291eb4a
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/985
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-11-19 22:16:16 +00:00
Salvador Arroyo
78807eb6ec mips: patch mips32_pracc_exec_write()
No function writes to MIPS32_PRACC_PARAM_IN addresses and probably has no much sense.
Any attempt to write to those addresses should be an error.

Change-Id: Iebea5fa9954e2cd56ad34976dd7d25009c6e6388
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/975
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-11-16 12:42:36 +00:00
Salvador Arroyo
5bb5620c48 mips: optimize mips32_pracc_read_regs() code
Current code needs 101 pracc accesses for this function, this code needs 12 less.
There is a singularity in this code, is the only function that restore
a register from param out instead from  pracc stack. Obviously the register
was previously stored at param out. This save 2 pracc accesses.

Change-Id: Ie95b6f983a3198dafc0eab2dd5acc11f871a8d83
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/958
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-11-16 12:42:25 +00:00
Salvador Arroyo
18077654af mips: optimize mips32_pracc_write_regs() code.
All the the loads are done with lui and ori instructions, there is
no need to save any register, they will be overwritten.
Like in the previous patch, for speed optimization in write code,
same instructions can be saved if the lower half word or the upper
half word is 0.
If the lower half word is 0, it can be loaded with only a lui instruction.
If the higher half word is 0 it can be done with an ori instruction with register 0.
This code saves 10 pracc accesses at a minimum, and 40 at a maximum,
obviously if register 2 to 31 are 0 or a half word is 0
Current code needs 91 pracc accesses.

Change-Id: I892c5b440191d0c7a474c96845d41c373b7fc637
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/957
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: jenkins
2012-11-16 12:42:03 +00:00
Salvador Arroyo
f3e01106d9 mips: optimize write code for speed
All the writes are done by the new function mips32_pracc_write_mem_generic().
The code is similar to the read generic code.
The reuse of register 15 as memory base address saves 3 pracc accesses.
The first write takes 13(12) pracc accesses and for additional writes 3(2).
Loading miniprograms should take 25% less time and loading fastdata transfer
handler code should be over 2x faster.

Change-Id: Ia3b24ba084af33be99da19f00a7fd4d1b291f350
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/956
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-11-16 12:41:47 +00:00
Salvador Arroyo
83f3f2c4c7 mips: optimize read code for speed
Really nothing new that not explained in previous patches.
The code is expanded as needed, there are no loops in pracc code.
For the first value pracc accesses are reduced from 39 to 16
and for aditional values from 10 to 3.
dump_image should work around 3x faster.

Change-Id: I37c9b13395c09eb52a91f10cdb6cbaedef8ab98b
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/955
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-11-16 12:41:30 +00:00
Salvador Arroyo
c09cd75d9b mips: optimize mips32_pracc_read_u32() function
This function is highly optimized, there is not much to
improve.
Loading the base address for pracc access with the new
defined MIPS32_PRACC_BASE_ADDR saves one instruction.
The memory address is loaded in too steps. First the upper
address is loaded. The lower address is passed as an offset in
the memory load instruction.
The offset is signed, if the lower address is in the range of
0x8000 to 0xffff the offset is a negative value, and the upper
address must be incremented by 1.
Pracc accesses are now 12 instead of 14.

Change-Id: I286945b240ed5c5d5cc540780a41a8a5fa075da3
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/952
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-11-16 12:41:14 +00:00
Salvador Arroyo
6644018337 mips: optimize CP0 read/write code
MIPS32_PRACC_BASE_ADDR is defined as 0xFF200000. Now is
possible to load the base address with a lui instruction and
only one pracc access.
Offsets to the pracc code addresses are defined to simplify the code
and probably make it a bit more readable or self-explained.

Change-Id: I853dd2d7fad52745931cc6e6be68c0ae156d897e
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/951
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: jenkins
2012-11-16 12:40:55 +00:00
Salvador Arroyo
9aad563d15 mips: code clean up in mips_m4k_debug_entry() function
The function mips_ejtag_read_debug() is defined in mips_ejtag.c
and is called only by mips_m4k_debug_entry() for reading the
CP0 debug register. The comment in this function is obviously wrong.
There is a generic function to read CP0 registers with similar code.
A call to mips32_cp0_read() should work in the same way.
The purpose of reading the debug register is to test if the DSS
bit is set and clear the SSt bit.
It is faster and easier if the SSt bit is cleared without any check.
Remark: DSS bit set only means that a debug single-step exception
ocurred, but it is not possible to step over a sdbbp instruction,
in this case DSS will not be set and the SSt bit not cleared by code.
Resume command at another address will step, so really the behavior
is not the same.

Change-Id: Ibd35f80e0f7669976d96f4ed813830cecf587971
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/950
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-11-16 12:40:34 +00:00
Salvador Arroyo
47d5f44fe0 mips: optimize mips_ejtag_step_disable() code
The code is a bit large compared to mips_ejtag_step_enable().
With the mips32 xori instruction the code can be
reused.
The number of pracc accesses are reduced from 18 to 7.

Change-Id: If3974ebd64da4461c22b089796646990e68e1b72
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/944
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-11-16 12:40:14 +00:00
Salvador Arroyo
115b7be426 Pic32mx.cfg: Change system clock to 8Mhz after reset-init.
As for openocd 0.6.0-rc2 the function mips32_pracc_fastdata_xfer()
should now work at a scan frequency up to 1200Khz.
Mainly usefull to increase programming speed.

Also verify_image should be slightly faster.

Change-Id: I1e9b2be73690a4597e2f6ba069c1205026850f07
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/805
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-11-16 12:25:19 +00:00
Spencer Oliver
0355d98793 doc: update to new sourceforge git url
The new sourceforge platform also supports http access, so use that rather
then repo.or.cz.

Change-Id: Ica89d9475847a2095c179b240053145795549802
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/982
Tested-by: jenkins
2012-11-16 10:32:29 +00:00
Freddie Chopin
08ddb19fd3 Revert "mpsse: Always perform a general reset of the MPSSE in mpsse_open()"
This reverts commit 452248af1d. This change
breaks all non-high speed adapters. The patch was not tested and did not get
any review.

Change-Id: Ib38fd242a202fd7c5a8711d9f857cd8f586df44e
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/973
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-11-12 11:57:25 +00:00
Matthias Blaicher
aa8e480ec4 rtos: Fix error in reading the current thread in ChibiOS/RT
Commit c4ab127b40 introduces a copy&paste error which affects
the detection of the current thread.

As a result, the stack of the current thread won't be detected
correctly in most cases.

Change-Id: Ib46b8f64be8053d7e9103f427c66796963214419
Signed-off-by: Matthias Blaicher <matthias@blaicher.com>
Reviewed-on: http://openocd.zylin.com/974
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-11-12 09:47:40 +00:00
Spencer Oliver
5c2c269336 target: add async algorithm timeout
An issue was observed when using an async algorithm with a target that had
not been previously reset beforehand. The target would enter a infinite
loop within target_run_flash_async_algorithm.

Add a timeout that will at least prevent this issue from happening. and also
suggest the user resets the target.

Change-Id: I5277e0d64e252d3d353e8d5bc9889a37fdc63060
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/949
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-11-06 17:38:37 +00:00
Karl Kurbjun
a72a42230b ARM v4/v5 target files: mrc and mcr help information is incorrect.
The order of the mrc/mcr command matches the ARM Architecture Reference
Manual.  This patch corrects the help information for mrc/mcr.

Change-Id: I1f0e6a628a3644124591a6aa291b8a58cfd93b44
Signed-off-by: Karl Kurbjun <kkurbjun@gmail.com>
Reviewed-on: http://openocd.zylin.com/914
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-11-06 17:30:57 +00:00
Spencer Oliver
68956e028a cortex: autostep correctly handle user breakpoint
If we halt due to a breakpoint make sure that we do not remove it during a
step, only remove breakpoints we have created.

Change-Id: I060168e54e53637d4fbf3cbcf62072efdb353807
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/947
Tested-by: jenkins
2012-11-06 16:27:19 +00:00
Peter Horn
79fa75e199 cortex_m: Fix single stepping will not return to debug mode sometimes
This occurs when stepping past a breakpoint on a even address with
maskisr option set to auto

With -d3 the following log message appears in this case:

"Debug : Interrupt handlers didn't complete within time,
 leaving target running"

Cause : Given a breakpoint is set on the lower half word and the PC is on
the upper half word. When another breakpoint is now set on the current PC
then resuming the core will not result in a break on the newly set
breakpoint. This has been observed on a STM32F1x, STM32F2x (CM3) but not
on a STM32F0x (CM0). It's not clear if this is a STM32F1/F2 only or a
general CM3 problem.


Change-Id: I384813f3bfdf935373b5e23cdb2d7f243c70cc00
Signed-off-by: Peter Horn <peter.horn@bluewin.ch>
Reviewed-on: http://openocd.zylin.com/864
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-11-06 16:26:54 +00:00
Gianluca Renzi
ed3632d9c7 Added support for NXP LPC1850 Microcontroller
Added a new configuration file for LPC18xx based boards, such as
HitexLPC1850RevA Evaluation Board, and all other based on the
same microcontroller by NXP.

Change-Id: I68c3827be535b6d09a5c70b6d57191937d00354d
Signed-off-by: Gianluca Renzi <gianlucarenzi@eurekelettronica.it>
Reviewed-on: http://openocd.zylin.com/930
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-11-06 14:34:37 +00:00
Gianluca Renzi
051ec13abc Generic LPC1850 board w/ SPIFI flash.
This config file is intended as an example of how to
use the lpcspifi flash driver, but it should be functional
for most LPC1850 boards utilizing SPIFI flash.

Change-Id: I855854282336701fd210134497ce014017f3aaec
Signed-off-by: Gianluca Renzi <gianlucarenzi@eurekelettronica.it>
Reviewed-on: http://openocd.zylin.com/929
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-11-06 14:34:16 +00:00
Gianluca Renzi
d8d1c62cc3 Added support for SPI Flash Winbond W25Q64CV
Added in spi device table SPI Flash Winbond W25Q64CV 64Mbit
Its Device ID 0x001740ef is the same as Spansion S25FL064K (may
be a clone?)

Change-Id: I3cdbd182a0ccde75c78684cb9d54c76059bf34e0
Signed-off-by: Gianluca Renzi <gianlucarenzi@eurekelettronica.it>
Reviewed-on: http://openocd.zylin.com/928
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-11-06 14:33:45 +00:00
Spencer Oliver
e22a6d2e06 cortex_m: fix define formatting
Change-Id: Ibdec882b2afc7e16f2361f86715463e030a54964
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/963
Tested-by: jenkins
2012-11-05 12:37:42 +00:00
Matthias Blaicher
c4ab127b40 rtos: Make ChibiOS code aware of endiness
The ChibiOS code was derived from other RTOS support code which
does not honor the target vs. host endiness.

The other RTOS code still needs to be fixed.

Change-Id: Idf42cfaa30945289bf1756ad6491fff84913eda9
Signed-off-by: Matthias Blaicher <matthias@blaicher.com>
Reviewed-on: http://openocd.zylin.com/962
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-11-05 11:34:45 +00:00
Matthias Blaicher
e89cae8dbc rtos: Add FPU detection to ChibiOS/RT
The stacking of ChibiOS/RT depends on the usage of an FPU. If the
FPU is enabled the FPU registers are also saved on context switch.

This patch adds automatic detection of FPU for armv7m targets.

Note: With this patch, openocd will only output an error message
      warning that the FPU is enabled.

      For further FPU support, the correct stacking information
      also needs to be added.

Change-Id: I0984cbd9180f247ba2fa610e74a6413cc54239ea
Signed-off-by: Matthias Blaicher <matthias@blaicher.com>
Reviewed-on: http://openocd.zylin.com/961
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-11-05 11:33:49 +00:00
Matthias Blaicher
8104b58dbc rtos: Fix wrong ReadyList lookup in ChibiOS
We already have the address of the ReadyList provided by gdb.
It is wrong to resolve that address a second time and it only
works by accident.

Change-Id: I82fa2360931c416290cd7f83e1883f86f90dedc2
Signed-off-by: Matthias Blaicher <matthias@blaicher.com>
Reviewed-on: http://openocd.zylin.com/959
Reviewed-by: Joel Bodenmann <joel@unormal.org>
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-11-05 09:37:56 +00:00
Sergey Borshch
fc302a0252 fix memory leaks
if add_connection() fails, memory allocated in copy_command_context() is lost.

Signed-off-by: Sergey Borshch <sb-sf@users.sourceforge.net>
Change-Id: I91a2757f29612038031eb8953100faa3b850d3a6
Reviewed-on: http://openocd.zylin.com/836
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-10-31 10:24:08 +00:00
Evan Hunter
6663a788a5 Ensure Cortex-M reset wakes device from sleep (wfi/wfe)
Change-Id: Idb52ca3123bb3e2f7863ba1b82ac9b176d7cb094
Signed-off-by: Evan Hunter <ehunter@broadcom.com>
Reviewed-on: http://openocd.zylin.com/833
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-10-31 10:15:02 +00:00
Peter Stuge
452248af1d mpsse: Always perform a general reset of the MPSSE in mpsse_open()
Per AN_135 FTDI MPSSE Basics Version 1.1, section 4.2 step 7.
http://www.ftdichip.com/Support/Documents/AppNotes/AN_135_MPSSE_Basics.pdf

This allows to stop and restart OpenOCD reliably, without needing
to power cycle the interface.

Change-Id: Ibeafe5ecfe7b2f6f82712cbc85116904407ddb36
Signed-off-by: Peter Stuge <peter@stuge.se>
Reviewed-on: http://openocd.zylin.com/939
Tested-by: jenkins
2012-10-30 11:57:17 +00:00
Peter Stuge
d2f61e1a45 ftdi/flyswatter2.cfg: Define the LED signal
Change-Id: Ic5d85c0d855bcffba54de7df6cff4d726656af97
Signed-off-by: Peter Stuge <peter@stuge.se>
Reviewed-on: http://openocd.zylin.com/940
Tested-by: jenkins
2012-10-28 05:25:17 +00:00
Peter Stuge
9064fa9081 ftdi/flyswatter2.cfg: Fix the signal layout
Change-Id: If6612af25fa3562f49e9c8ccff01b6ef0af5ceb0
Signed-off-by: Peter Stuge <peter@stuge.se>
Reviewed-on: http://openocd.zylin.com/938
Tested-by: jenkins
2012-10-28 04:33:27 +00:00
Spencer Oliver
6d8a865eef flash: update stm32 flash driver versions
Seems ST have changed the ref manual (RM0313 rev1) and reverted to using
letters rather than numbers for the stm32f3x family.

Change-Id: I3a87ec9b0b2447d57dfef98603d30e28fe9ac927
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/926
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-10-28 01:41:41 +00:00
Spencer Oliver
d2e8ce1478 gdb: fix broken qCRC packet handling
The rtos layer was incorrectly handling a qCRC packet as a qC packet.
Make sure we check for the qCRC packet and return unhandled so the gdb
server gets a chance to handle it.

This packet is used in the gdb compare-sections cmd.

Change-Id: I21f8e5fa7225fccd13d65cf9e40186895065a7e3
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/933
Tested-by: jenkins
Reviewed-by: Matthias Blaicher <matthias@blaicher.com>
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-10-28 01:41:14 +00:00
Spencer Oliver
538a86c339 gdb: use strncmp rather than strstr
All the packets received will be at start of the packet buffer, so use
more efficient strncmp.

Change-Id: Ib9c45d8f53425367006b1f880c1bde27f03a6cf9
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/932
Tested-by: jenkins
Reviewed-by: Matthias Blaicher <matthias@blaicher.com>
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-10-28 01:40:21 +00:00
Edgar Grimberg
6f65045b37 ioutil: make the file compile on MacOS
The meminfo command cannot exist if the malloc.h header is not
present.
Cannot get the mac address without sys/ioctl.h and SIOCGIFHWADDR
defined

Change-Id: Ifc0fb98c3a60c53ad2e19473e08b34c460529d0b
Signed-off-by: Edgar Grimberg <edgar.grimberg@gmail.com>
Reviewed-on: http://openocd.zylin.com/912
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-10-28 01:38:58 +00:00
Andreas Fritiofson
077d77140c adi_v5_jtag.c: Avoid infinite recursion in jtagdp_transaction_endcheck()
Change-Id: I81163d9c2ff97ed768f8a3ac1505a8d2b5016b91
Signed-off-by: Peter Stuge <peter@stuge.se>
Reviewed-on: http://openocd.zylin.com/908
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-10-28 01:33:57 +00:00
Matthias Blaicher
442a684303 rtos: fix gdb qC command answer
rtos->current_thread is of type int64_t. All other commands already
respect this.

Change-Id: I9951946ff2a09c53cd78c6ab882c80cdd2ab7ac6
Signed-off-by: Matthias Blaicher <matthias@blaicher.com>
Reviewed-on: http://openocd.zylin.com/917
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-10-28 01:32:35 +00:00
Matthias Blaicher
3a6ac23716 rtos: Use ARRAY_SIZE instead of coding it by hand
Use ARRAY_SIZE in helper/types.h to determine the size of the
symbol list.

Change-Id: Icc9838323510f8602efa5d0162a4daed33f863b9
Signed-off-by: Matthias Blaicher <matthias@blaicher.com>
Reviewed-on: http://openocd.zylin.com/935
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-10-28 01:25:39 +00:00
Matthias Blaicher
a4dc39beb4 rtos: Fix wrong allocation in linux_get_symbol_list_to_lookup
linux_get_symbol_list_to_lookup allocates to few memory. On 64 bit
systems the error did not show due to char* being twice its size,
leaving accidentally enough space.

This patch makes linux_get_symbol_list_to_lookup behave identical
to all other RTOS.

Change-Id: I290ea241fb20b65585c8be14609a92fdbd2a307d
Signed-off-by: Matthias Blaicher <matthias@blaicher.com>
Reviewed-on: http://openocd.zylin.com/934
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-10-27 17:25:04 +00:00
Spencer Oliver
4a5dc0988a Revert "gdb_server : 'R' command replied by OK"
This reverts commit 1e7e594452.

For some reason the above commit added a reply to the restart command - this is
not required as per the gdb docs.

Newer versions of gdb (7.0 and above) will complain about this reply.

Change-Id: Ieeae3dcf44d798a91dfc6f7348da982c2ce1be31
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/910
Tested-by: jenkins
Reviewed-by: Joel Bodenmann <joel@unormal.org>
2012-10-24 12:01:22 +00:00
Spencer Oliver
27f0497efa docs: mention extended-remote support
Change-Id: Idd7cc0364856082cbbfee5015e49cd7d237d68ef
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/913
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-10-18 16:10:55 +00:00
Spencer Oliver
7165e05cf6 stlink: fix vector catch not being cleared
Seems after a reset the stlink is not clearing the vector catch (VC_CORERESET)
in the Debug Control Register.

This has the side effect if the user presses an external reset the core will
halt, this patch fixes that.

Change-Id: Ic3b2c3991b79cacbbd901c02b79613c2e204e71f
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/905
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-10-18 14:39:04 +00:00
Spencer Oliver
98a41bca6e gdb: fix extended-remote restart
Seems versions of gdb > 6.8 require an W stop reply after receiving a
kill packet.

Without this we receive the following error from gdb:
gdb/thread.c:72: internal-error: inferior_thread: Assertion `tp' failed.

Change-Id: I86765a321f0429c9b517fe13ded0ee2dbd4b2f87
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/911
Tested-by: jenkins
Reviewed-by: Joel Bodenmann <joel@unormal.org>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-10-17 18:21:53 +00:00
Spencer Oliver
443197aff0 flash: fix at91sam3/4 driver typos
Change-Id: I06efdfcc48279b06035e9e173945304310054864
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/896
Tested-by: jenkins
Reviewed-by: Olivier Schonken <olivier.schonken@gmail.com>
2012-10-17 09:25:11 +00:00
Freddie Chopin
15615dcff2 Fix serious bug in LPC2xxx/LPC17xx flash algorithm.
Flash algorithm for LPC17xx/LPC2xxx was trying to "reuse" previously
allocated working area on next flashing which is not possible -
working areas are freed automatically on reset. This caused all but
first flashing attempts to fail. As there is no point in storing pointer
to working area, it was converted to local variable.

Change-Id: I939946325ff9eecc4861c0f51ab0f73871a3d7b9
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/860
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-10-17 09:23:39 +00:00
Freddie Chopin
19b351d8c8 Cleanup lpc2000.c
Do some cleanup in lpc2000.c - concatenate short lines into single
longer lines, move variable declarations to "just before" they are
used, etc.

Change-Id: Ia7b9f0307dd4857ee8e15c8a6d4d7b5c4392fd80
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/861
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-10-17 09:21:49 +00:00
Matthias Blaicher
14e12c3969 rtos: Add ChibiOS/RT support
This patch adds ChibiOS/RT support. This patch requires at least
ChibiOS/RT development version starting from SVN revision 4734.

Note, that the Thread structures depend not only on the target
but also on the ChibiOS configuration at build time.
To correct this ChibiOS includes a new "memory signature" which
specifies the offsets.

Special thanks go to Peter Stuge and Spencer Oliver for their
continous input and feedback to this patch.

Change-Id: I842bf7ba6c2309a4efe93d29ea6cd0784a8b22a3
Signed-off-by: Matthias Blaicher <matthias@blaicher.com>
Reviewed-on: http://openocd.zylin.com/901
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-10-16 06:32:03 +00:00
Spencer Oliver
d8e4a7370f cfi: remove typos and code cleanup
No change to code, just fix some formatting issues.

Change-Id: I177430a99bfecbf90a1ddf623321c29d4db516b0
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/906
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-10-12 21:41:53 +00:00
Spencer Oliver
2bda1ee49d flash: update stellaris flash data to latest dev package 9453
Change-Id: I16107a093d4ed7342583f5c32ad16aa98f81d122
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/856
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-10-12 21:41:39 +00:00
Matthias Blaicher
9ff4071568 rtos: Don't crash on qSymbol GDB packet when no RTOS is configured
Commit 43902905bb fixed a bug but also
introduced a regression. The RTOS GDB packet handler is always called,
not only when an RTOS is actually configured, so it is important to
check if an RTOS has been configured or not before actually processing
the qSymbol packet.

Change-Id: I1aed54f6c2817e1ebf99ddcda051df4554ea5a3a
Signed-off-by: Peter Stuge <peter@stuge.se>
Reviewed-on: http://openocd.zylin.com/907
Tested-by: jenkins
2012-10-09 10:23:51 +00:00
Paul Fertser
a136b08fc3 rtos: support FreeRTOS over stlink
Since stlink is a special case it presents the same CPU core under a
different name, so copy the configuration to account for that.

Change-Id: I9febf79b388301bde6211d185b5b8161cdadb9ff
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/652
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-10-08 20:36:18 +00:00
Peter Horn
006a108494 rlink: Fix DTC command timeout
With the current timeout setting i = 10 in drtc_run_timeout()
I get "Error: too many retries waiting for DTC status" when
loading a program into the FLASH of an STM32F1.

By experimentation a value of i = 22 was found to be the minimum
on my system. Therefore the value has been increased to i = 50.



Change-Id: Ib67fc648ccaad305871b81c2c39e49de53c330a0
Signed-off-by: Peter Horn <peter.horn@bluewin.ch>
Reviewed-on: http://openocd.zylin.com/863
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-10-08 20:32:20 +00:00
Andreas Fritiofson
3f8ca97daf dsp5680xx_flash: Remove unused flash bank structure
Change-Id: I947b6730b3741a71303e440daefa4fcf583cb9cf
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/867
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-10-08 10:31:26 +00:00
Andreas Fritiofson
9e001244da stm32f1x: Increase options erase timeout
The erase time for the option byte page is not directly specified but is
assumed to be the same as the other pages (or mass erase) which is 20 to
40 ms. The current timeout value is 10 which means 10 ms plus the time to
poll the status flag that many times.

With faster interfaces or drivers (such as when using the ftdi driver
instead of the ft2232 driver) the adapter delay is not enough in some
cases, unless the jtag freq is reduced as a workaround. The result is a
"timed out waiting for flash" error when trying to write the options.

Increase the timeout to a minimum of 100 ms, which is in line with the
other erase timeouts. Also make defines of both the erase and the program
timeouts.

Change-Id: Ia86e71505033c52b60ef30092000689fbb547a18
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/902
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-10-08 10:29:39 +00:00
Andreas Fritiofson
8415353f2b flash/nor/stellaris: Remove unnecessary write_algorithm check
The pointer must be non-null here since we returned if allocation failed.

Change-Id: I9b75099ed3b3870c815d1df5760ed1f3fe1d20d6
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/866
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-10-08 10:25:50 +00:00
Andreas Fritiofson
4da4e1cfb7 flash/nor: make all working area pointers local
Working area pointers shouldn't be re-used, so there's no point in storing
them in the flash bank struct. Make all such pointers local.

Change-Id: Iab65b4e8b475fed7fc72fb8928f54590fa69d260
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/865
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-10-08 10:25:15 +00:00
Spencer Oliver
9fe0457c51 readme: update missing configure args
Change-Id: I495a4557f161290f8f99788de27958f7dc08d6f6
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/900
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-10-07 13:28:01 +00:00
Spencer Oliver
cbfc443c7b Revert "target: remove unused working area 'user' field"
This reverts commit 63a23e6fc8

Change-Id: I62778fb3b1dabc6470d582bea9ca64d593999233
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Change-Id: Iaf5a2cf5bdc4a62ba68ad9403e1c1229112970de
Reviewed-on: http://openocd.zylin.com/899
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-10-07 13:26:58 +00:00
Peter Stuge
43902905bb rtos: Rewrite rtos_qsymbol() and fix auto-detect false positive
Matthias Blaicher submitted a patch at http://openocd.zylin.com/#/c/891/
to fix the false positive; when no RTOS was detected OpenOCD used the
last RTOS in the list.

While reviewing the code affected by Matthias' patch a rewrite seemed
appropriate, to make the code readable.

Matthias has abandoned his change and this change also fixes the false
positive.

Change-Id: Ic3327ccd036da52ba0a7e21ef93018205e74149c
Signed-off-by: Peter Stuge <peter@stuge.se>
Reviewed-on: http://openocd.zylin.com/895
Reviewed-by: Matthias Blaicher <matthias@blaicher.com>
Tested-by: jenkins
2012-10-05 21:03:35 +00:00
Peter Stuge
44e6d7720b rtos: Rewrite rtos_try_next() for readability
The new code is almost functionally equivalent to the old.

The function now returns 0 instead of -1 if target->rtos has not yet
been allocated. All call sites only test for success, and in practise
that is also the only thing that matters; if the function successfully
iterated to the next RTOS or not.

Other than that the only difference is that the code is now readable.

Many thanks to Matthias Blaicher for the fix to the iteration error!

Change-Id: I3342826f653b5e46c99ad1f58eec26ff10795c33
Signed-off-by: Peter Stuge <peter@stuge.se>
Reviewed-on: http://openocd.zylin.com/894
Reviewed-by: Matthias Blaicher <matthias@blaicher.com>
Tested-by: jenkins
2012-10-05 21:03:04 +00:00
Peter Stuge
16cd4e6fce rtos: Rewrite rtos_create() for readability
The new code is almost functionally equivalent to the old; besides
error handling the only difference is that the code is now readable.

Many thanks to Matthias Blaicher for pointing out an iteration error
in the rtos_try_next() change, which also affected this change.

Change-Id: If38b87439e9de2303b220b3a7e3200ceaa8391da
Signed-off-by: Peter Stuge <peter@stuge.se>
Reviewed-on: http://openocd.zylin.com/893
Tested-by: jenkins
Reviewed-by: Matthias Blaicher <matthias@blaicher.com>
2012-10-05 20:19:01 +00:00
Olivier Schonken
5952843fc5 Modified Sector Erase for AT91SAM4S
In FLASHD_ErasePages AT91C_EFC_FCMD_EPA is used to erase sectors.
According to the datasheet FARG[15:2] defines the page from which
the erase will start.This page must be modulo 4, 8, 16 or 32
according to the number of pages to erase. FARG[1:0] defines the
number of pages to be erased. Previously (firstpage << 2) was used
to conform to this, seems it should not be shifted... Changed it
to (firstPage) | erasePages.

Change-Id: I791cc7fc4faf056623ad5a6c7e860315306098a1
Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>
Reviewed-on: http://openocd.zylin.com/830
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-10-04 15:53:19 +00:00
Spencer Oliver
bd5f5c6a66 build: fix broken ftd2xx bus blaster
If configure is executed without --enable-ft2232_ftd2xx then the bus blaster
or presto will fail to build with unresolved external ftd2xx_status_string.

Make sure we run the ftd2xx build test if --enable-usb_blaster_ftd2xx is enabled.

Change-Id: I09d270d6fcd083d77f6785b8969d9acb3dfef11d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/892
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-10-04 13:42:56 +00:00
Spencer Oliver
c9d9573c29 lpc1768-stick: avoid driving srst high at startup
this avoid driving nSRST high after startup, by making sure the nOE is
initialized inactive/high.

This also matches the config used for the STM32-PerformanceStick.

Change-Id: I9376de575b7dc834310d57dbd58575d51f60183e
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/878
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested-by: jenkins
2012-10-02 22:17:36 +00:00
Spencer Oliver
8d4ad82da7 cfg: cortino tested and working
Change-Id: I13534742c76ebbb05b47bf98768c997068da747a
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/851
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-10-02 22:03:38 +00:00
Spencer Oliver
28749c15bb cfg: fix incorrect cortino reset config
The cortino uses a direct srst connection rather than via any buffer.
As a result this fixes issues with the newer ftdi driver.

Change-Id: I28f6781bccae24de79aa6a03161f298a14fe2581
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/850
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-10-02 22:03:08 +00:00
Spencer Oliver
7cf1a1f04f cfg: ftdi icdi enable srst open drain config
Change-Id: I21a115121f167dc88cd9bf2d1ca1ac9f3e1110d7
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/848
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-10-02 22:01:43 +00:00
Spencer Oliver
8cbcd56c0e cfg: update ti/stellaris url's
Change-Id: I96f17c5ea2be506a6b88434616ca52c3e392868a
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/879
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-10-02 21:59:48 +00:00
Spencer Oliver
f8388cd4bb cfg: lm3s811ek config tested and working
Change-Id: I5402b5521d6e1ef0a569f5cad02c003681f5444b
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/847
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-10-02 21:59:21 +00:00
Spencer Oliver
3eb80331ce cfg: fix incorrect stm32-performance stick config
This hardware uses a output enable buffer that was not correctly defined.
Fixes issues when using the new ftdi driver.

Change-Id: Iba6235a71a6d3c7d16ab729f858b336a4574dfea
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/844
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested-by: jenkins
2012-10-02 16:00:44 +00:00
Spencer Oliver
a3c09f9624 cfg: stm32-performance stick config tested and working
Change-Id: I9852d11e369e501af240a2b8e9f74306aee4e4a0
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/845
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-10-02 12:09:00 +00:00
Spencer Oliver
eaed9db414 gdbserver: code cleanup
Change-Id: Iab2966be8dd145f33f41902e2d55afe03d0f5856
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/857
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-10-02 11:39:45 +00:00
Spencer Oliver
f232512a21 docs: enable local structs in doxygen output
Change-Id: I9c811d49690524f1ce5372326de67ec4ac7b09f4
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/858
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-10-02 11:37:07 +00:00
Spencer Oliver
8a271d9dd1 build: remove unnecessary jim.h include
as well as not being required, as it is already included by jim-nvp.h.
It also makes the doxygen output a bit clearer to read.

Change-Id: Ia2bed7142b4a56b48b1ecf0734e63f860dcd1014
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/859
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-10-02 11:36:39 +00:00
Spencer Oliver
ebece4a981 cfg: add ti ek-lm3s9d92 config
Change-Id: Ib09ca3e57de363a24d704b184ba8546bad08f56f
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/853
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-10-02 11:34:54 +00:00
Spencer Oliver
a046475f03 cfg: add ti ek-lm3s8962 config
Change-Id: I753cec80a904130088b00b3f81b6dd61808662d6
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/852
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-10-02 11:34:41 +00:00
Spencer Oliver
c06af3af91 sysfsgpio: remove ignoring return value build warning
fixes following gcc warning:
error: ignoring return value of write, declared with attribute warn_unused_result

Change-Id: I96ea6649078449208a77690caea2cb237c388e6e
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/854
Tested-by: jenkins
Reviewed-by: Marc Reilly <marc@cpdesign.com.au>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-10-02 11:33:42 +00:00
Spencer Oliver
46c1114c1e cfg: str9-comstick tested and working
Change-Id: Ia6c45477381e78cb9508b4731438161e18be1f38
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/843
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-10-02 11:28:32 +00:00
Spencer Oliver
2076ba093d cfg: add STM32F3-DISCOVERY board support
Change-Id: I4a02e0504fc04ffc1238d9bb77ec05c1f781e7e8
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/810
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested-by: jenkins
2012-10-02 11:27:59 +00:00
Spencer Oliver
0b98ca3610 flash: add stm32f3 rev 2 flash support
Change-Id: Ibab5112f5f70a609136d01ebc50530a334640d03
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/809
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-10-02 11:27:30 +00:00
Spencer Oliver
5ed9eb6160 cfg: fix incorrect str9-comstick reset config
The str9-comstick uses a direct srst connection rather than via any buffer.
As a result this fixes issues with the newer ftdi driver.

Change-Id: I0968e8459997a6a2b7bf0c46e89662cd57b4f496
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/842
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-10-02 11:27:02 +00:00
Spencer Oliver
baf1797406 ftdi: incorrectly using output register for direction
fix a simple copy/paste bug.

Change-Id: I5caaa4d16d30f26a453bd6a00c95261fd6e716c5
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/849
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-10-02 11:23:48 +00:00
Spencer Oliver
a5768e9722 ftdi: correct ftdi_initialize error text
Change-Id: If230c0b5b3a18fd273106b743404079d0cbc9ddc
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/840
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-10-02 11:23:08 +00:00
Spencer Oliver
e4df550ad9 ftdi: fix adapter_init rclk fallback
adapter_init expects jtag_get_speed (via ftdi_khz) to return a valid
fallback speed if the adapter does not support rclk. The call was failing
and so was the rest of the adapter init.

The makes the new ftdi driver emulate the old ftdi driver.

Change-Id: Ic7fac7d201241eb181e98f1ba7111f159731f6e0
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/839
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-10-02 11:22:27 +00:00
Spencer Oliver
abccd76ea4 cfg: fix incorrect stm32f3 TAPID
Change-Id: Id66d4e03a77c47a49086ee753bed01b3944064e1
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/855
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-10-02 09:37:56 +00:00
Peter Horn
1ab99c3fe5 Fix: Error while reading from USB endpoint
This patch fixes the bug reported here:

http://sourceforge.net/mailarchive/message.php?msg_id=28350157


When using Rlink under Linux, openocd exits with:

"Error: Read of endpoint 2 returned -75, expected 17"

The return value of -75 translates into EOVERFLOW. The cause is a wrong output buffer size argument passed to dtc_run_download().

Change-Id: I5d056705181ab6a6d4355524df06a0ea9c605961
Signed-off-by: Peter Horn <peter.horn@bluewin.ch>
Reviewed-on: http://openocd.zylin.com/862
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-09-29 17:08:52 +00:00
Spencer Oliver
0b118583f7 jtag: remove libftdi enum-compare warning
See Trac #52 for details.

Change-Id: Idb509ead2b51bfcceeb00d0224a4d1c395b28a04
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/801
Tested-by: jenkins
Reviewed-by: Olivier Schonken <olivier.schonken@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-09-27 14:11:24 +00:00
Evan Hunter
4dd8f8aa40 Add extra Coresight component ROM identifiers for the Cortex-M4
Signed-off-by: Evan Hunter <ehunter@broadcom.com>
Change-Id: Iaf2d69cf10c341d3a516986677f69a4389b29b1a
Reviewed-on: http://openocd.zylin.com/841
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-09-27 14:07:19 +00:00
George Harris
516719b6b8 Added SPIFI flash driver, algorithms, and docs
Added a flash driver designed to allow program/erase of
memory-mapped SPI flash chips for LPC43xx/LPC18xx family
micros. This driver includes three algorithms - erase,
write, and SPIFI peripheral initialization (to allow
memory-mapped access after a reset). The driver has been
added to the flash driver table (drivers.c), and the
OpenOCD documentation has been updated to include the flash
driver configuration command.

Change-Id: I79f4ff8f1f07de4e5f2fe4f8c23aeb903f868514
Signed-off-by: George Harris <george@luminairecoffee.com>
Reviewed-on: http://openocd.zylin.com/783
Tested-by: jenkins
Reviewed-by: Aurelien Jacobs <aurel@gnuage.org>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-09-26 16:17:42 +00:00
George Harris
15e19011ea SPI nor drivers refactor
Moved common SPI flash driver code (device table,
common commands) into flash/nor/spi.c and spi.h.
Updated flash/nor/stmsmi.c to reflect this refactor.

Change-Id: I141644b0af71d3835f29f06dd15b505a00e5b6ec
Signed-off-by: George Harris <george@luminairecoffee.com>
Reviewed-on: http://openocd.zylin.com/782
Tested-by: jenkins
Reviewed-by: Aurelien Jacobs <aurel@gnuage.org>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-09-26 16:17:21 +00:00
Marc Reilly
fe52282c37 drivers: new jtag bitbang driver using sysfs gpio
This driver implements a bitbang jtag interface using gpio lines exported via
sysfs.

The aim of this driver implementation is to use system GPIOs but to avoid the
need for an additional kernel driver.

A config suitable for RaspberryPi is included.

Change-Id: Ib2acf720247a219768d1cbfeebd88057ed2d7b8b
Signed-off-by: Marc Reilly <marc@cpdesign.com.au>
Reviewed-on: http://openocd.zylin.com/762
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-09-26 16:16:17 +00:00
Freddie Chopin
a4830e7a6a Restore -dev suffix, archive NEWS file, add new blank NEWS file - start
new cycle for version 0.7.0.

Change-Id: I549bd815b62292ea4da6ed5c445c7c8a55521d9d
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-09-07 11:04:05 +02:00
Freddie Chopin
370d02b857 The openocd-0.6.0 release.
Change-Id: I72eeabfc704d2a979ac0b4492771690631d2300f
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-09-07 10:24:36 +02:00
Spencer Oliver
552e027f68 stlink: issue error for stm32 option writing
The stlink interface currently does not support 16bit read/writes.
Until a fix is included we issue a error that this is unsupported.

Change-Id: I4552cf2bd3b29e90ecc905325b743c08e2b92d67
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/808
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-09-07 06:17:07 +00:00
Chuen Chou
e26ddb627b flash: fix sam3 page read/write address computation error
In at91sam3.c for Atmel SAM3 flash support, there are arithmetic errors in the functions sam3_page_read() and sam3_page_write().
Address locations are computed incorrectly due to an extra addition operation. This leads to memory locations being skipped during
flash writes and reads.

Smaller programs are written successfully into flash, with memory gaps, while larger programs of legitimate size fail because the
skipped memory is not utilized and therefore unavailable.

The changes address this condition, and have been tested with an Atmel SAM3X-EK evaluation board.

Change-Id: I9ea3b9ed0130b71cbc32b2294e31a6a2bc71b47a
Signed-off-by: Chuen Chou <zhouquan27@gmail.com>
Reviewed-on: http://openocd.zylin.com/806
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-09-07 06:16:57 +00:00
Spencer Oliver
8a197f0bbc configure: use consistent help text
Change-Id: I5e1d7c88e9310e6415f3663d7a657f516bd24660
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/803
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-09-06 19:19:22 +00:00
Spencer Oliver
37f8f0bf9a docs: add user mailing list and irc info
Change-Id: I7000b5ab2967f8dc4cea8983978fce824ea1f98e
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/807
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-09-06 19:19:09 +00:00
Spencer Oliver
39f3501afb cortex_m: suggest using hardware srst if VECTRESET used
If the target does not support SYSRESETREQ we fall back to using VECTRESET.
This however does not reset the peripherals and we issue a warning to the user
to suggest using a reset-init script.

Also suggest that using hardware srst will give them the same functionality
as using SYSRESETREQ.

Change-Id: Ie1781c4b849fed66c52222e6539735537c879fb3
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/802
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-09-06 19:19:03 +00:00
Freddie Chopin
9fbfb6103a Restore -dev tag.
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-29 09:58:04 +02:00
Freddie Chopin
6d9803ef1d The openocd-0.6.0-rc2 release candidate.
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-29 08:59:33 +02:00
Salvador Arroyo
4288886c83 Pic32mx: make row programming work with any offset
In function pic32mx_write_block() if the parameter
offset is not a multiple of row size the row offset
(offset % row_size) will be ignored by the flash
controller, shifting the code to the beginning of
the row.
Word programming gets it right.

Change-Id: I134913e3d533688f791bbcb0c6e8983524197f3c
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/796
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-29 06:43:08 +00:00
Spencer Oliver
210ff60284 server: warn if user changes server port after init
So the user can view the current port number these cmds were changed to COMMAND_ANY.
However this means that the user can also attempt to change the port number after init,
even though this is not supported. Issue a warning that this is not supported.

Change-Id: I3d20dcd81277e7d994240a8e314f27672ff760c4
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/788
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-29 06:42:52 +00:00
Spencer Oliver
9a8aa4ec63 stlink: fix typo
Change-Id: I5fe7b695b00faef966e7621614bbd60b6e694a4f
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/800
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-29 06:41:48 +00:00
Spencer Oliver
897817b331 stlink: improve swd hardware reset
Treat SWD wait result as success, otherwise hardware reset will sometimes fail.

Change-Id: I0dbdbe9e75924fe0dde547a72883c60c3db7b15e
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/799
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-29 06:41:10 +00:00
Andreas Fritiofson
6055d952c3 ftdi: fix overflow if last field of a scan is empty
The last bit of a scan is clocked during TAP movement so it's necessary
for the last field to have at least one bit. Strip trailing empty fields
and make sure the TAP is not affected if there's nothing to scan. Clients
probably shouldn't add empty fields so add a debug message to be able to
track and fix them.

Change-Id: I27552568bc11146570b9b99ed8a1ae81b5fb2c50
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/794
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-29 06:31:59 +00:00
Andreas Fritiofson
d9a02fda07 mpsse: check available buffer space even for discarded data scans
When there's no data to scan in or out, we still use the clock data out
command and fill the buffer with zeroes, so make sure the buffer is
checked for available space.

Change-Id: Ia6005c40c81f7fdb89379f1b5023fe383184d210
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/793
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-29 06:31:39 +00:00
Spencer Oliver
d7f5a00cdc adapter: remove superfluous line breaks
Change-Id: I8e68b9d6f571ef7715a2f4cad0aa78fe4e3b48e8
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/798
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-29 06:29:06 +00:00
Spencer Oliver
0288ea0920 adapter: add 'adapter speed:' prefix to output
Currently only the adapter speed is printed, which can be rather misleading
when DEBUG_INFO is disabled, all the user sees is
6000 kHz
instead lets print
adapter speed: 6000 kHz

Change-Id: I8f02a63f47344457e3c3d0a6774157fa18206440
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/797
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-29 06:28:39 +00:00
Freddie Chopin
9a9f745eba Update NEWS
Added some missing items to NEWS file prior to final 0.6.0 release.

Change-Id: I69255c85fa8f4b6f06eae7c56f78072e3ec2d6f8
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/784
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-08-29 06:27:40 +00:00
Freddie Chopin
38e547b9c7 Add JTAG-lock-pick Tiny 2 config files
DISTORTEC's JTAG-lock-pick Tiny 2 is a new interface using FT232HL chip
and layout similar to KT-LINK.

Change-Id: I2831b169cd448ca70397f2dd86c5b749dda3dabf
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/787
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-08-29 06:26:39 +00:00
Freddie Chopin
07158a7f8a Add another scripts search path for Windows builds
Add single "scripts" folder to search path for Windows OpenOCD builds
that don't use cygwin
bin/openocd.exe
scripts/interface/dummy.cfg
scripts/target/at91eb40a.cfg

Do some refactoring of current code (thx to Andreas).

Change-Id: Idbb08d1368b06f25da44f4f9ab1511db992b1724
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/785
Tested-by: jenkins
2012-08-29 06:26:21 +00:00
Andreas Fritiofson
73d87c6210 kinetis: bugfix in kinetis_write() fallback path
Offset calculation into buffer was wrong and code would read outside buffer
if count was not a multiple of four.

Change-Id: Ied625b10221423d5a5f25d27ce1edd8c2c3eca8a
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/749
Reviewed-by: Peter Stuge <peter@stuge.se>
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-29 06:26:02 +00:00
Christopher Kilgour
4c3972c1df kinetis: ensure flash writes are not truncated
The number if longwords or "sections" (Freescale term) written for a Kinetis
flash write (4, 8, or 16 bytes depending on the part density/granularity) are
now rounded up to ensure there are no truncations when the desired write is
not a multiple of the minimum write size.

Change-Id: I8db40a8769d8ac5393a46cbf4e5ff0df82faf916
Signed-off-by: Christopher Kilgour <techie@whiterocker.com>
Reviewed-on: http://openocd.zylin.com/738
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-29 06:25:41 +00:00
Spencer Oliver
09f9596ae0 jtag: fix clang ulink memory leaks
Memory leaks discovered by clang 3.1

Change-Id: I8a784ba9726deac508424eddb27e9c8409e2773f
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/795
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-29 06:25:19 +00:00
Salvador Arroyo
a25e61ecd3 Patch: Make pic32mx unlock work at higher scan frequencies
For example in a pic32mx220, pic32mx unlock don't work
if adapter_khz is set to 5000 or more.

A short delay after asserting reset fix the problem.

Change-Id: I62e493edfcea585c36c8de77a969cebac7227b96
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/790
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-29 06:25:01 +00:00
Spencer Oliver
2ce4e31bbc cfg: update for target's that support cortex_m AIRCR SYSRESETREQ
If the target supports SYSRESETREQ make sure we use that as the default
if srst is not fitted/configured.

Change-Id: I24c907493134506320e69c1218702930629c1cdc
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/792
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-29 06:24:36 +00:00
Spencer Oliver
4be685c616 stlink: stlink_interface_init_target use hex prefix
Change-Id: I782da74687bcf111c1f04c53b2c1120d6a034441
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/791
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-29 06:24:14 +00:00
Andreas Fritiofson
0989cd4d5d arm7_9: Fix broken halfword/byte memory reads
Always scan out all bits, but make sure only the allowed number of bytes
end up in the caller-provided buffer. Discard the rest by adding another
scan field when size < 4.

Rewrite the endianness callback to avoid reading outside allocated memory.
Make it directly usable as a callback without the need for a wrapper. Move
the shared callback to a more suitable home in arm7_9_common.

This fixes the regressions introduced in commits
991ed5a2b6
cb90d32e38
and
c3074f377c

Change-Id: Ia8bde8c5a9844e89a1d6c0bc8534cd26f02f8d11
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/789
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-29 06:23:47 +00:00
Salvador Arroyo
47728f9215 Severe bug in Pracc code
The function  wait_for_pracc_rw() fails if Pracc bit is 0.
The variable ejtag_ctrl is loaded with the content of the
control register in the first scan.
In the second scan Pracc bit is scanned out as 0, letting
the proccesor go. The result is unpredictable.

All the strange data corruption when scanning at certain
frequencies, or the strange delays needed when entering
or leaving fasdata area are retated to this bug.

Now the code works at any scan frequency, tested up to 15000Khz
and indepently of processor speed, tested at 31.25Khz and 4/8Mhz.

Change-Id: Iedfd81d06d6af4bc738a521f720e42323025b268
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/769
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-24 16:53:25 +00:00
Spencer Oliver
63a23e6fc8 target: remove unused working area 'user' field
working_area::user has never been used so lets remove it.

Change-Id: I1200311b34248549c1fe30c9f675e6129b7bebee
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/781
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-24 16:52:52 +00:00
Andreas Fritiofson
349b459e98 cfi: fix type-punning warnings in cfi_spansion_write_block
Retest the condition when needed, instead of abusing the common_magic
field as a flag. There are only two options here. Either it's an armv7m or
it's another arm. is_arm(...) will return true even for armv7m, so it's
imperative to check in the right order.

Change-Id: Ic227f19f7babf1b0b0fe075f9a3abc4eabc7d5f1
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/779
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-24 16:52:27 +00:00
Martin Nowak
f97a159411 build: fix clang warnings
Change-Id: I3c6a63a18034535f0a8c2c62ba8a708f09d7839b
Signed-off-by: Martin Nowak <dawg@dawgfoto.de>
Reviewed-on: http://openocd.zylin.com/765
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-24 16:51:00 +00:00
Spencer Oliver
78f4f95648 target: catch dap_lookup read error
Issue found by clang-3.1

Change-Id: I2e922ec83117e75db5bec1e82edaa75a9e6e7464
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/778
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-24 16:50:43 +00:00
Spencer Oliver
640141eea3 flash: remove lpc2000 clang warnings
By Initialising the param_table we remove the clang warning's.
We are also make sure we are not passing any rogue values to lpc2000_iap_call.

Change-Id: Idb3b0077d1dae5f03dedab1d46d01140fe9ffb10
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/777
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-24 16:50:25 +00:00
Spencer Oliver
2d57e80801 tcl: fix potential memory leaks
Reorder to allocate all memory after COMMAND_PARSE_NUMBER call.
This removes a clang warning about un-released memory

Change-Id: I8dbeb664a6467077157015bd879bc0aefc5e8614
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/776
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-24 16:50:18 +00:00
Spencer Oliver
60a932b368 build: fix memory leaks
Fix the memory leaks found by clang-3.1

Change-Id: Iaae68627ef599c324c9c9ee5737c22e92512862d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/775
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-24 16:49:56 +00:00
Spencer Oliver
fb525cdd76 flash: fix FC_FLEX_RAM class code path
If the flash class was defined as FC_FLEX_RAM then this would always drop
through to the default handler.

This bug was found by clang, so untested.

Change-Id: I2d9fe6415dd216728a145519400f7b9ef1bd3c3a
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/773
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
2012-08-24 16:49:43 +00:00
Spencer Oliver
0e4dee1164 helper: command.c cleanup
Change-Id: I66643960e38625e843b5f54d1c072e4eee78284d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/772
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-24 16:49:30 +00:00
Aurelien Jacobs
939f923927 ftdi: Olimex ARM-USB-TINY validated
Flashing a CFI flash and debugging with gdb work fine.

Change-Id: Ib2578ee6f41c1003968198439033d00d805122f7
Signed-off-by: Aurelien Jacobs <aurel@gnuage.org>
Reviewed-on: http://openocd.zylin.com/770
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-24 16:49:01 +00:00
Andreas Fritiofson
c58c24c42f configure.ac: Fix misspelled variable
Nothing checks it against 0, so it hasn't caused any problems.

Change-Id: I5e349299c37fb72bab811d78992f6de3731a986a
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/774
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-24 16:48:44 +00:00
Spencer Oliver
aec561c7c6 cfg: remove duplicate Olimex ARM-USB-OCD config
This file is already included as olimex-arm-usb-ocd.cfg.

Change-Id: I0e66977c58e74ac93a0dc3a0c88a5e5af4992f8b
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/780
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-08-14 17:49:50 +00:00
Andrew Karpow
66b9bff3b3 cfg: added new openocd-usb highspeed adapter
The embedded projects shop released a new highspeed version of
the openocd-usb adapter. These configuration files adds support
for it.

Change-Id: I9b23d7889f998712b9041af101e3f0b9aba85b28
Signed-off-by: Andrew Karpow <notandyk@gmail.com>
Reviewed-on: http://openocd.zylin.com/771
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-08-09 22:30:48 +00:00
Freddie Chopin
8b344453ed Restore "-dev" tag.
Change-Id: Ibb7669ea73872d75a5c2f32f2264e57b1d0f20c7
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-02 18:01:20 +02:00
Freddie Chopin
3cbabd9fff The openocd-0.6.0-rc1 release candidate.
Change-Id: Idd85159050a39c2136ee8a31f939a2b3e35cff1b
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-02 17:18:27 +02:00
Spencer Oliver
a7f320e919 target: add valid smp target check
Check that the target is valid before calling any target functions.

Change-Id: I538fccc79d5ec89976e14beab02cb20490b299bb
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/766
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-02 14:30:09 +00:00
Freddie Chopin
7d11ee207b Update link and instructions about ssh keys in HACKING
Gitweb changed their instructions, info about ssh keys is now on
separate page for all platforms (selector at top of the page).

Change-Id: I3eab5dfae06cfb73f4a76718f92518454021e557
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/768
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-08-02 13:16:23 +00:00
Freddie Chopin
0527d336a5 Add missing files (header and .txt) for release.
make distcheck is used to make packages with OpenOCD release, this
command uses information from Makefile.am files to know which files
should be included in the package and which can be left only in
repository. This patch makes a few headers from recent JTAG drivers
and one txt file with info about target tcl config files included in
released packages.

Change-Id: I91202290633a30f53624a8c7d9a0ebf72c40772b
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/767
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-08-02 13:16:06 +00:00
Alexander Osipenko
168fcf58c5 arm946e: add icache/dcache manipulation commands.
Provide cache operations coherent with internal target state.
Functions similar to xscale target.

Change-Id: Ic6b9a894154f6e4f5672b5d7f5035c9774ee9499
Signed-off-by: Alexander Osipenko <sipych@gmail.com>
Reviewed-on: http://openocd.zylin.com/695
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-01 21:20:32 +00:00
Alexander Osipenko
f1e9cef410 arm946e: cp15 command returns value to the script
Not just print it.

This enables scripts to analyze valuable config options of
arm946e-s cores, do internal BIST memory tests and more.

Be careful to flush caches before disabling it.
Do not forget that BIST test overwrites  memory.

 - cp15 rewritten from COMMAND_HANDLER to jim_handler.

Change-Id: I734da0be6db0a3127c2daa94ed75efef94da8ceb
Signed-off-by: Alexander Osipenko <sipych@gmail.com>
Reviewed-on: http://openocd.zylin.com/694
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-01 21:19:53 +00:00
Alexander Osipenko
63687807cc arm946e: cleanup C0.C cache type reg access
Cache type register C0.C is read-only, and display
hard core configuration information.
This information is unlikely be changed in runtime.

 - removed C0.C access when result is not used in
   arm946e_invalidate_dcache()
 - access C0.C only once per target, store result
   in cp15_cache_info field of target structure
 - fix cache index count calculation

Change-Id: I12bc4c967fdf07f54d755f2f2f42406c0ababc1a
Signed-off-by: Alexander Osipenko <sipych@gmail.com>
Reviewed-on: http://openocd.zylin.com/693
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-01 21:18:37 +00:00
Alexander Osipenko
9c9c06b8ae arm946e: don't use global variables for context
Global variables 'dc' 'ic' had been used in the code
to keep target's state of D-cache and I-cache
on debug entry.

This may lead to incorrect operation in configurations
with multiple cores and unequal cache states.

Fix: move cache state to the appropriate bits of the
'cp15_control_reg' field (already present but unused).
Vaule of cp15 control register stored here on
arm946e_post_debug_entry(), and analyzed later
in arm946e_write_memory().

Change-Id: I71ef82be00c21d6fffb3726cec4974d1ece70dfe
Signed-off-by: Alexander Osipenko <sipych@gmail.com>
Reviewed-on: http://openocd.zylin.com/692
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-01 21:16:37 +00:00
Vandra Akos
ee8df96b2b added target configs for the lpc17xx devices
lpc1751, lpc1752, lpc1754, lpc1756, lpc1758, lpc1759
lpc1763, lpc1764, lpc1765, lpc1766, lpc1767, lpc1768, lpc1769

Change-Id: I740b66930cd379c9390f3c1031cdbada747a6ce4
Signed-off-by: Vandra Akos <axos88@gmail.com>
Reviewed-on: http://openocd.zylin.com/676
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested-by: jenkins
2012-08-01 21:15:01 +00:00
Joerg Fischer
8fe2bed92c cfg: Add Hitex LPC1768-Stick using ftdi driver
Add cfg files for Hitex LPC1768 Stick
Website: http://www.hitex.com/?id=1602

This board has a FTDI2232D as JTAG interface, using the
same layout as the Hitex STM32-PerformanceStick but with
different USB PID.

Main MCU is a LPC1768 from NXP.

The interface config uses the ftdi driver instead of ft2232.
The corresponding ft2232 layout would be "stm32stick".

Change-Id: I1fd15588c5af35f7d51777d1ad958cc1dc72c6f7
Signed-off-by: Joerg Fischer <turboj@gmx.de>
Reviewed-on: http://openocd.zylin.com/763
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-01 21:12:27 +00:00
Andreas Fritiofson
c89eb70a20 flash: stm32f1x: Pad odd byte writes early to avoid 16-bit writes
For odd byte counts, stm32x_write() pads the last byte and writes it using
a discrete 16-bit access. The stlink debugger can't issue 16-bit writes so
it fails for odd byte writes.

This patch changes stm32x_write() to pad odd byte writes into a new buffer
and use the normal code path with a single block write. The fallback path,
when working area cannot be allocated, has to use 16-bit writes though
which means that sufficient working area is required for stlink and odd
byte writes.

Change-Id: I4c5dc456300b6e1056f76b0095be8aceee3e954f
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/756
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-01 21:12:07 +00:00
Freddie Chopin
b8862229d0 cfg: Add config file variants using the ftdi driver instead of ft2232
part 4 - files that are currently untested

Change-Id: Ic4a08fdefc99e7a9d50885c888c3fca60ffa39bd
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/750
Tested-by: jenkins
2012-08-01 21:10:58 +00:00
Freddie Chopin
2b6a75538a cfg: Add config file variants using the ftdi driver instead of ft2232
part 3 - files that are currently untested but verified with schematics

Change-Id: Ia00c3b6437bffcfa0d178e779926ad9309e289fe
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/755
Tested-by: jenkins
2012-08-01 21:10:30 +00:00
Freddie Chopin
b56bad824b cfg: Add config file variants using the ftdi driver instead of ft2232
part 2 - files that are currently untested but assumed to work, as other configs using the same layout work
fine

Change-Id: Ifaa1904227ebdc394362ccaf3ad3c5384a716657
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/754
Tested-by: jenkins
2012-08-01 21:09:54 +00:00
Freddie Chopin
7b67ec988c cfg: Add config file variants using the ftdi driver instead of ft2232
part 1 - files that were tested an verified as working fine

Change-Id: If5986853a1cf118a9eb3b4c13b036d0f71c39624
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/534
Tested-by: jenkins
2012-08-01 21:08:35 +00:00
Spencer Oliver
40801d21ff telnet: cleanup comments
seems comments were mangled during the last cleanup.

Change-Id: If759f62032705c7baffd3973e9717eb7e8a5d17c
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/752
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-07-30 06:52:44 +00:00
Spencer Oliver
246f8492da doc: add missing ulink v1 to supported interfaces
Change-Id: Ic497a3f9076ec1799ca715a99bc2e634bd1af40d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/761
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-07-30 06:50:36 +00:00
Salvador Arroyo
5e1f5f4731 Bugfixes in mips32_pracc.c
When testing a pic32mx220f032b with different values
for adapter_khz and cpu clocks i was getting a lot of
corrupted data from the chip. From time to time
openocd fails with segmentation faults or is aborted
due to memory corruption.

Change-Id: I134743f75c477b3d55dc74ae4474598e153b4a4a
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/690
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-07-30 06:41:00 +00:00
Salvador
09cd5661e6 Speed up mips_m4k_write_memory()
Do not call mips32_cp0_read() if not needed.
This will speed up execution of mips_m4k_write_memory()
by near 2x, with parameter count = 1.

Change-Id: I7829a7802b6475bc6d4ac3f0632d8d239d1072da
Signed-off-by: Salvador <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/624
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-07-30 06:39:03 +00:00
Andreas Fritiofson
9a8edbfa8b flash: reduce code duplication in stm32 flash probe
Remove a lot of the repetitive code in stm32f1x flash probe by converting
the large if-selector to a switch, moving the common checks outside it and
concentrating the failure handling to a single point.

Do the same with stm32f2x and stm32lx for consistency.

Change-Id: Ic0ecfb1533c49f5d2108cda5fd20c8372d7c71ef
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/746
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-07-30 06:33:58 +00:00
Spencer Oliver
38e44d1361 flash: fix stm32 flash driver typo's
Change-Id: I37f3fee063d7f8729e057dcfe8904651790439e6
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/745
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-07-30 06:28:33 +00:00
Spencer Oliver
055abd0b9c flash: handle zero when reading stm32 flash size reg
Some variants read 0 for the flash size register, rather than
failing lets assume we have max flash fitted.

Change-Id: Ie1fb4e73606f49268a6fd5921c3aef75bc4790d3
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/744
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-07-30 06:27:39 +00:00
Spencer Oliver
531fbf0ef2 flash: stm32l handle flash size read failure
Rather than failing if the flash size reg cannot be read lets assume
we have the max flash size fitted.

It is quite common on early ST silicon to not correct support this register.

Change-Id: Ife058d60ae0027faad2c929ebd5b7fe2ef27234d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/743
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-07-30 06:26:23 +00:00
Spencer Oliver
fe583e78c2 flash: add stm32l Revision X support
Revision X is not mentioned in the latest RM0038 rev5, however it has been
confirmed correct by ST using ST-LINK Utilty.

Change-Id: I65210e512ea25818a1d0d3b223502ebd7535b29d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/742
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-07-30 06:25:04 +00:00
Vandra Akos
ba00ef3c40 lpc1768.cfg abstracted and moved to lpc17xx.cfg
- Moved variant-independent code to lpc17xx.cfg, which will be included from
lpc17??.cfg files automatically.
- lpc1768.cfg filled with variant-dependent code.

Change-Id: I7dabe6ed7da7be640ed38c13aaaa096b8796d9a0
Signed-off-by: Vandra Akos <axos88@gmail.com>
Reviewed-on: http://openocd.zylin.com/675
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-07-30 06:18:51 +00:00
Andreas Fritiofson
52125f1d13 cfg: remove deprecated stm32 target configs
These were deprecated in commit 69ac20a.

Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Change-Id: I047872f8cd61b42aaca6588ab75566219e4a3f5d
Reviewed-on: http://openocd.zylin.com/741
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-07-30 06:18:34 +00:00
Freddie Chopin
951d185049 Add support for FT232H chips
FT232H chips are new highspeed devices from FTDI. Basically these are a half of FT2232H (or a quarter of FT4232H), so only one channel which can be used as OpenOCD
interface. The chips are supported by libftdi 0.20 or later and by ftd2xx 2.08.12 or later.

Change-Id: Ic9a2c279167c3419a24f0d6befacbb83c4ffeb25
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/736
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Salvador Arroyo <sarroyofdez@yahoo.es>
2012-07-30 06:15:10 +00:00
Andreas Fritiofson
0900d5a3cd flash: don't write to FLASH_CR in stm32x_write_block
It's unnecessary and prevents reusing this function to fix
option byte writes.

Also try to disable flash writing after an error.

Change-Id: Ib5a7b768a1523e6b8da1555126fef4c1e60ab083
Signed-off-by: Szymon Modzelewski <szmodzelewski@gmail.com>
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/479
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-07-30 06:14:16 +00:00
Alan Bowman
8cf671ea7b Test the incoming debug_level, rather than the current.
The existing code tests the current debug_level for validity, allowing
the user to set it too high and never change it after that.  The new
behaviour is to test the debug_level that the user has requested.

Change-Id: I85726a2e606c8d137e9b1cfe76fee865084844b1
Signed-off-by: Alan Bowman <alan.michael.bowman@gmail.com>
Reviewed-on: http://openocd.zylin.com/764
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-07-27 09:50:34 +00:00
Alex Austin
10fd274cfe Revert "When calling openocd from a shell like this:"
This reverts commit e8641695c6

Original premise was wrong. Proper command is "shutdown", not "exit".

Change-Id: I07f5fe0dda9c24abe53628da986bfda0e406bb4a
Signed-off-by: Alex Austin <alex.austin@spectrumdsi.com>
Reviewed-on: http://openocd.zylin.com/757
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-07-22 19:18:22 +00:00
Tom Rini
5e4ee571cc board: Add TI AM335x Evaluation Module
This patch adds the TI AM335x Evaluation Module (ti_am335xevm) board
configuration file.

Change-Id: Id3529e54972f8acd8c790ad55c8d0f4058a1a1f6
Signed-off-by: Tom Rini <trini@ti.com>
Reviewed-on: http://openocd.zylin.com/753
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-07-19 18:48:06 +00:00
Freddie Chopin
af9918deec Add config file for Lattice LC4032ZE CPLD (ispMACH 4000ZE family)
Change-Id: Iefec12b30ff737317c454b472200fd7e7edde619
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/748
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-07-17 08:29:32 +00:00
Salvador Arroyo
aaf5991d79 MPSSE: Add FT232H to supported chips
Change-Id: I1ce1db7eb87a7cdeafc1f8b8b34594f6fa3bf1f8
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/677
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-07-17 04:59:56 +00:00
Andreas Fritiofson
f5e97b5e1b Add FTDI JTAG driver using MPSSE layer
Based on ft2232.c but uses the MPSSE layer for low-level access, greatly
simplifying the JTAG logic. Remove all libftdi/FTD2XX code and all layout
specific code. Layout specifications are instead handled in Tcl.

Use a signal abstraction to enable Tcl configuration files to define
outputs for one or several FTDI GPIO. These outputs can then be
controlled using the ftdi_set_signal command. Special signal names are
reserved for nTRST, nSRST and LED (for blink) so that they, if defined,
will be used for their customary purpose.

Depending on the type of buffer attached to the FTDI GPIO, the outputs
have to be controlled differently. In order to support tristateable
signals such as nSRST, both a data GPIO and an output-enable GPIO can be
specified for each signal. The following output buffer configurations are
supported:

* Push-pull with one FTDI output as (non-)inverted data line
* Open drain with one FTDI output as (non-)inverted output-enable
* Tristate with one FTDI output as (non-)inverted data line and another
  FTDI output as (non-)inverted output-enable
* Unbuffered, using the FTDI GPIO as a tristate output directly by
  switching data and direction as necessary

The data and output-enables are specified as 16-bit bitmasks,
corresponding to the concatenation of the high and low FTDI GPIO
registers. To specify an unbuffered output, use the same bitmask
for both data and output-enable.

The adapter configuration file must also specify default values for the
FTDI data and direction GPIO registers, and the channel being used (if
different from 0).

Change-Id: I287a41d4c696cf5fc74eb10d5e63578b0dc7f826
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/452
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-07-17 04:44:41 +00:00
Andreas Fritiofson
b598efb613 Add MPSSE communications layer for FTDI chips
This is a higher-level libftdi replacement for use when implementing
protocol drivers for FT2232, FT2232H or FT4232H. It takes care of device
open/close and, unlike libftdi, also MPSSE command abstraction, command
queueing, buffer handling and return data parsing.

The FTDI device is accessed through libusb-1.0 in asynchronous mode.

Change-Id: I051adb574dcc39f8ca9cd7f6dbe6ae4aeea5f4c8
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/451
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-07-17 01:34:01 +00:00
Spencer Oliver
2aab7d3ce2 target: Cortex-M use consistent arm dap access
Purely cosmetic but use the same style as Cortex-A target, this makes
searching refs easier.

Change-Id: I732ad9701f561e2312c5d191f5aaffd3a2f2393d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/731
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-07-11 19:28:48 +00:00
Spencer Oliver
24c0f9470a stlink: fix arm semihosting support
Add missing arm cmd handlers that enable semi hosting support to work as
expected.

Change-Id: I063d82c48b82b4f6aed4efc4b08ea752d78e9047
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/734
Tested-by: jenkins
Reviewed-by: Alan Bowman <alan.michael.bowman@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-07-11 10:34:59 +00:00
Spencer Oliver
1df6e59178 flash: add stm32f3x support
add support for the new stm32f3x family from stmicro:
http://www.st.com/stm32f3

Change-Id: Icd1db95bb2767d9c0ecef24deefa92b4fdaa4f14
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/735
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-07-11 10:32:39 +00:00
Stefan Mahr
07251ab8d8 jtag: fix opendous reset command
This cast to uint16_t is not (host) endianess save.
Depending on compiler usb_out_buffer[1] may be undefined.

Change-Id: If686e5d5da39541329c340bbdef472ee7ab0281c
Signed-off-by: Stefan Mahr <stefan.mahr@sphairon.com>
Reviewed-on: http://openocd.zylin.com/732
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-07-11 08:18:00 +00:00
Spencer Oliver
5b170456f7 target: detect correct Cortex-M tar auto increment size
The ADIv5 spec guarentees that tar_autoincr_block will be 10bits.
Make this the default for Cortex-M family until we detect a Cortex-M3/M4,
we then change autoincrement to 12bits.

Change-Id: Ie8c89134aa036879bdd8a3c312cee9715dbc6913
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/730
Tested-by: jenkins
Reviewed-by: simon qian <simonqian.openocd@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-07-11 08:17:42 +00:00
Spencer Oliver
2c14497d0a jtag: remove redundant id check
commit 5b0a131594 removed the need to check
for 0xffffffff.

Change-Id: Ib4d99bf1797ccd868ec15631dbc16079571a8dd6
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/728
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-07-11 08:17:08 +00:00
Stian Skjelsad
e8641695c6 When calling openocd from a shell like this:
openocd -f board/sheevaplug.cfg -c init -c exit

the calling shell will believe that openocd exited with an error due to exitval will be non-zero

This is not tested against incomming telnet

Change-Id: I63d15715a7b46f39a7de261a45039f8c3cad7a98
Signed-off-by: Stian Skjelstad <stian@nixia.no>
Reviewed-on: http://openocd.zylin.com/470
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Bill Traynor <wmat@alphatroop.com>
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-07-11 08:16:04 +00:00
Vandra Akos
9ce207a52a target.c, jim_target_md using command_print_sameline
jim_target_md is supposed to print out results with command_print in
hexdump format. It was using command_print which appends a newline character
aftre every invocation. Using command_print_sameline instead

Change-Id: Iaff03021acc38d54b5a082cb58b82aa4449c0715
Signed-off-by: Vandra Akos <axos88@gmail.com>
Reviewed-on: http://openocd.zylin.com/669
Tested-by: jenkins
Reviewed-by: Alexander Osipenko <sipych@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-07-11 08:08:01 +00:00
Vandra Akos
30aacc0564 target/target.c, jim_target_md refractored
- Added a few lines of comment before the function explaining the usage and the
output generated by the command
 - Added a few lines of comment in the body explaining what is happening to improve
code readability
 - Renamed a few variables to improve readability:
    * a -> addr
    * b -> dwidth
    * c -> count
 - Added a new variable, named byte to contain the number of bytes to read, instead
of overwriting the count parameter, to avoid confusion between the two values.

Change-Id: I5828ec0f5aadaa39becec7b84f198756bb2c3d41
Signed-off-by: Vandra Akos <axos88@gmail.com>
Reviewed-on: http://openocd.zylin.com/665
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-07-11 08:07:22 +00:00
Andreas Fritiofson
6d639b09f0 Add a bit-level transfer queue
Interface drivers regularly need to keep track of where each part of a long
read buffer should be copied, once that data arrives. Both source and
destination are often at an arbitrary bit offset.

This queued bit-level copy can help with that, by allowing the driver to
perform postponed reads from the receive buffer already when building the
transmit buffer, and have those reads executed at a later time when data is
available.

For simplicity, it uses the linked list implementation list.h imported from
the Linux kernel.

Change-Id: I06862a0a6f057cbbcacfb021f17a795195faded2
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/450
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-07-06 14:58:25 +00:00
Mike Crowe
edf0c3376d topic: flash: description/id added for ATSAM3SD8C
New flash description for ATSAM3SD8C used on SAM3S-EK2 development boards.  Name used
is "at91sam3sd8c" and chipid is 0x29ab0a60.  Mirrors description of other similar parts.

Change-Id: I7fc4b82e7969451645ab067223663f08b76d866b
Signed-off-by: Mike Crowe <mpcrowe@gmail.com>
Reviewed-on: http://openocd.zylin.com/684
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-06-26 18:53:02 +00:00
Alexander Osipenko
321948b41f J-Link: Initialize .transports to suppress warning.
jtag_interface.transports field was left uninitialized, which triggers warning message
on program startup.

Although hardware natively supports SWD interface, no software support
currently present, so the value choosen to be <jtag_only>.

Change-Id: I2da41790b1850950af416cec4362d5b7bf927b2b
Signed-off-by: Alexander Osipenko <sipych@gmail.com>
Reviewed-on: http://openocd.zylin.com/670
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-06-26 13:56:12 +00:00
Olivier Schonken
24a1e7b0fc Changed SAM4S Erase for effective Sector erase
In the previous iteration, the page counter for erases would not be updated with
the erase size.  This patch keeps the page counter synced with the sector counter.

Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>
Change-Id: I95e56a3257b2ad8301c9f28167b842fa6466334f
Reviewed-on: http://openocd.zylin.com/686
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-06-26 13:51:59 +00:00
Mathias K
5b0a131594 Fix idcode end of chain flag.
For multi core cpus with cores without an idcode this doesn't work
because the extra bit for every core and a n-bit shift in the data
stream.

Change-Id: Iba0ad9422ea55c01492b27b936d028719be31180
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/618
Tested-by: jenkins
Reviewed-by: Bill Traynor <wmat@alphatroop.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-06-26 12:01:28 +00:00
Christopher Kilgour
aeb3c4f37e kinetis: update support for all program flash granularities
Updates the Kinetis NOR flash support to handle all known block and sector
sizes.  Previously only 2kiB sectors were hard-coded, now all four known
combinations non-volatile sector sizes are supported.

The premise of separating Kinetis Program Flash (PFLASH) from FlexNVM is
also introduced.  This means each "block" of flash (in Freescale terms) is
treated as a bank in OpenOCD.  Correspondingly, the existing board
configuration for the TWR-K60M512 eval system is updated to recognize two
banks instead of one.

A board config for the TWR-K60F120M is also added.

Bank and sector erase and programming has been checked with both of the
mentioned eval boards.

Change-Id: Iae2d10ebf8f548d0a3698df5430bbbe1ccadc58a
Signed-off-by: Christopher Kilgour <techie@whiterocker.com>
Reviewed-on: http://openocd.zylin.com/663
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Jan Dakinevich <jan.dakinevich@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-06-26 11:53:37 +00:00
Alexander Osipenko
4b6af97978 J-Link: Forcibly select JTAG transport
Some versions of Segger's software do not select JTAG interface by default.
Do it in the intial setup.

Firmware version check code still present, with updated set of unsupported.

Note from Segger:
Alright, we were not aware of that OpenOCD does not select the interface
before it starts communicating with the target.  A debugger should always
select the appropriate target interface before it starts communicating with the target,
since otherwise it could also happen that a previous session with another debugger
had selected SWD and the interface was not switched again by OpenOCD.

Change-Id: I5b4eab7e0e3625ec32be75a36d89e16d17e899bf
Signed-off-by: Alexander Osipenko <sipych@gmail.com>
Reviewed-on: http://openocd.zylin.com/667
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-06-26 10:11:03 +00:00
Alexander Osipenko
17ea1b31a1 JLink: added jlink_usb_io() function
jlink_usb_io() function added for basic communication,
since jlink_usb_message() is more specific to JTAG transactions.

To verify the patch issue "jlink config" command.

Change-Id: Id7d10bd5e8985d4c77f2e0ca47fb6033db2877bf
Signed-off-by: Alexander Osipenko <sipych@gmail.com>
Reviewed-on: http://openocd.zylin.com/679
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-06-26 10:10:06 +00:00
Alexander Osipenko
b79f9ad172 J-Link Unsupported firmware version check
OpenOCD does not work with the latest firmware versions
of Segger J-Link.

Latest working version: V4.42c
Unsupported versions: 4.44 to 4.46f, 4.20 to 4.30

Older versions of firmware can be found here:
  http://www.segger.com/j-link-older-versions.html

The firmware versions does not correspond directly with
"Software and documentation pack for Windows", it may be
distinguished by the "compile" date in the information string.

Print an warning message if unsupported firmware version detected.

Change-Id: Id7d1f965b8ce2fdbcd0026a85ddd093e2fa48720
Signed-off-by: Alexander Osipenko <sipych@gmail.com>
Reviewed-on: http://openocd.zylin.com/666
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-06-26 10:07:55 +00:00
Liviu Ionescu
e571746735 docs: J-Link commands added to the manual
The J-Link related commands and configuration commands were added
to the "8.2 Interface Drivers" section of the manual.
(previously they were enumerated as comments).
The 'jlink pid' was marked as Config all other as Command.
A draft of a compatibility note was added, but probably
a table would be more appropriate.

Change-Id: Ifbe230706815196aaad4e3729ed5089d5088b769
Signed-off-by: Liviu Ionescu <ilg@livius.net>
Reviewed-on: http://openocd.zylin.com/680
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-06-26 10:06:12 +00:00
Vandra Akos
d50ce65962 lpc1768.cfg pulled out constants from flash init as variables
Seems like an esthetic change, but it will allow easy support for
other lpc17xx devices.

Change-Id: I2cb953ce1afdd82f6ca65b38d5557a28416f895e
Signed-off-by: Vandra Akos <axos88@gmail.com>
Reviewed-on: http://openocd.zylin.com/674
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-06-26 10:02:03 +00:00
Mirela Tauciuc
7800045671 AT91SAM7 Flash: fixed redundant assignation warning
Change-Id: Iffacdce9ce90c4ea7e0c8647860a0056b952f387
Signed-off-by: Mirela Tauciuc <mirela.tauciuc@gmail.com>
Reviewed-on: http://openocd.zylin.com/691
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-06-26 07:53:22 +00:00
Liviu Ionescu
a21affa429 tools: initial.sh fixed to accept spaces in current path
When changing the path to the hooks folder, the path needs to be
surrounded by quotation marks, to avoid failures when the current
path contains spaces (not only legal, but a common case on
Mac OS X).

Change-Id: I8f180ab5f26fab00a7d78ebfe5713d4146c27452
Signed-off-by: Liviu Ionescu <ilg@livius.net>
Reviewed-on: http://openocd.zylin.com/683
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-05-29 19:10:06 +00:00
Spencer Oliver
1b2cb095ba docs: update interface support in README
Change-Id: Id4b982ee426dedc85b643a71c1cdba67d0dd0ffd
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/682
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-05-29 18:03:59 +00:00
Spencer Oliver
8fb5e8e58f docs: include static members in doxygen output
Change-Id: I1867e8d7a3bed1a399c0790f63fee68fb6b299c4
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/672
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
2012-05-28 12:00:21 +00:00
Spencer Oliver
9b3224e887 build: remove src file execute permission
Change-Id: I42a250cdfcd03424a63cd1a255f9cf4a3c6e3ccd
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/671
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
2012-05-28 11:59:37 +00:00
Vandra Akos
445a54a669 Jim_GetResult was called twice
Removed the superflous call to Jim_GetResult,
as we are reading in the result to a variable
anyways in the next instruction.

Change-Id: Idc96400737dc15e28304e97bcea79fa6c7a88ae1
Signed-off-by: Vandra Akos <axos88@gmail.com>
Reviewed-on: http://openocd.zylin.com/661
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-05-25 12:11:57 +00:00
Spencer Oliver
c3074f377c target: fix segfault in arm7_9 8/16bit read
Seems I5347352e7595686634bd0de13fcf6de6e55027b0 introduced an issue when
reading 8/16 bit data - the in buffer was always set to 32bits.

Change-Id: Ife2bb6a20fcb3ec0e486655512164f25ae9196b4
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/660
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
2012-05-25 12:09:11 +00:00
Spencer Oliver
3d2dd4a3a3 jtag: fix incorrect LOG_DEBUG abs_chain_position
Call jtag_tap_add before LOG_DEBUG otherwise abs_chain_position does
not get correctly set.

Change-Id: I47bd00cc83259c8bfd5551e08c3bb2ebeb5993f5
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/658
Tested-by: jenkins
Reviewed-by: Bill Traynor <wmat@alphatroop.com>
2012-05-25 12:08:42 +00:00
Mathias K
423bfc49f9 board: Add Sony Ericsson J100I Phone
This patch add the Sony Ericsson J100I Phone to the board configurations.

Change-Id: I083ddf067c8ecdfdda0404fe9e9df980dbb86fe8
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/631
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-05-25 12:06:41 +00:00
Mathias K
d6334188ec config: Add TI Calypso CPU configuration
This patch add the TI Calypso CPU to the configuration files.

Change-Id: Ieb462960391c4a2c630d7a83699c3b6e8162ace9
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/630
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-05-25 12:06:22 +00:00
Bill Traynor
f901445524 jtag: fix osbdm.c typo
Fixing up tiny spelling error of "receive" vs. "recieve".

Change-Id: Ib143d7fdb24ac1f2b7bd4ae90cadaf2e12760ff7
Signed-off-by: Bill Traynor <wmat@alphatroop.com>
Reviewed-on: http://openocd.zylin.com/659
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-05-23 00:15:35 +00:00
Spencer Oliver
ffabd98d4a jtag: fix opendous typo
Change-Id: Ia88c32f2394bde2048bdd73625e7664c93a9a87d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/656
Tested-by: jenkins
Reviewed-by: Bill Traynor <wmat@alphatroop.com>
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-05-22 22:53:30 +00:00
Spencer Oliver
6b6e28ff02 jtag: remove opendous clang warnings
Change-Id: I0285c99507931e7d13aad36f4fc559c29a52faca
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/655
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-05-22 22:53:07 +00:00
Spencer Oliver
b908538998 stlink: check read_reg result
Change-Id: I284824aa6f5eae8f6e910a482e9f7435e649fc0d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/657
Reviewed-by: Peter Stuge <peter@stuge.se>
Tested-by: jenkins
2012-05-22 12:05:19 +00:00
Spencer Oliver
5cc004180b target: target.h typo and comment cleanup
Change-Id: Ib751803754672bf556f4f65bd3f5621f6bbb7f0c
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/654
Tested-by: jenkins
Reviewed-by: Bill Traynor <wmat@alphatroop.com>
2012-05-21 20:33:15 +00:00
Spencer Oliver
1dd462a6d6 target: enable TARGET_EVENT_EXAMINE_* events
Change-Id: I33efc0994b7bfe0faa2f4e8457fcc3c8e43d3571
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/635
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested-by: jenkins
Reviewed-by: Bill Traynor <wmat@alphatroop.com>
2012-05-21 16:20:07 +00:00
Spencer Oliver
25b855d2d2 target: enable TARGET_EVENT_RESUME_* events
Change-Id: I7d8378f9f34c6674db8c8b29d1a961389578e921
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/640
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested-by: jenkins
Reviewed-by: Bill Traynor <wmat@alphatroop.com>
2012-05-21 16:19:52 +00:00
Spencer Oliver
bb3793c9a4 target: remove legacy target events
These events have been deprecated for a number of years, update any
remaining scripts to the new events.

Change-Id: Ic31ff388545ac8b3a500045699ca92c541b13f12
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/634
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested-by: jenkins
Reviewed-by: Bill Traynor <wmat@alphatroop.com>
2012-05-21 16:19:28 +00:00
Spencer Oliver
482660031a target: remove duplicate target events
Change-Id: Iba9ae441f3e6d48a7dfafe59ed093fef56a34723
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/633
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested-by: jenkins
Reviewed-by: Bill Traynor <wmat@alphatroop.com>
2012-05-21 16:19:02 +00:00
Spencer Oliver
e1c40cb1c1 target: disable armv6m unaligned memory access
Change-Id: I42704cf80939ab9c9d4f402d2cd51c196e2fadb3
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/645
Tested-by: jenkins
2012-05-21 16:17:10 +00:00
Bill Traynor
8f842ea40a UserGuide: Updated list of supported interfaces, boards, and targets.
User Guide: Chapter 6 'Config File Guidelines'.  The directory listings
of interfaces, boards, and targets has been brought up to date.

Change-Id: I53f218a94cb81c5e90298b367259e833192af5f3
Signed-off-by: Bill Traynor <wmat@alphatroop.com>
Reviewed-on: http://openocd.zylin.com/646
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-05-21 16:16:33 +00:00
Spencer Oliver
7bfcc10839 build: add helper/types.h to config.h
this header is used in numerous files and adding to config.h
simplifies its use globally.

Change-Id: Id724a9950b90504721233022c7fb5768e9bc5548
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/649
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
2012-05-21 16:15:26 +00:00
Spencer Oliver
a34b38d621 NEWS: add headline items
Change-Id: Ie78b0a171af76cf647deef501245caf54209d9f8
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/639
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
2012-05-21 16:14:25 +00:00
Christopher Kilgour
87a9ee3625 flash/nor/driver.h: typo fix
Change-Id: Ie260f3c38b648e66958c014658bb6860171a7cc9
Signed-off-by: Christopher Kilgour <techie@whiterocker.com>
Reviewed-on: http://openocd.zylin.com/653
Tested-by: jenkins
Reviewed-by: Bill Traynor <wmat@alphatroop.com>
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-05-21 08:49:15 +00:00
Spencer Oliver
f019c4f7d6 stlink: add myself to copyright header
Change-Id: I39e23b38ee630b80bccb5ff6b5819efa0fcb120a
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/651
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
2012-05-19 20:31:12 +00:00
Spencer Oliver
7572059832 stlink: remove superfluous stlink_usb.h
Change-Id: I34bc59b35fafd3fa659549e350b91310c5b33dd4
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/650
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
2012-05-19 20:31:04 +00:00
Spencer Oliver
323aeaf90b contrib: enable cortex-m0 and cortex-m4 libdcc support
Change-Id: Ib8ff645d1e5b8baca02de8ea95b629d88b203969
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/644
Tested-by: jenkins
2012-05-19 20:29:48 +00:00
Spencer Oliver
8cb0dae823 remote_bitbang: fix native windows build
Change-Id: Ied29ade0346c4595ffc1dafa788e2d5a595e0de3
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/648
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
2012-05-19 20:27:56 +00:00
Alexander Osipenko
47a276cfae remote_bitbang: missed closing brace in macro REMOTE_BITBANG_RAISE_ERROR
Change-Id: I591308bd98810ef6361106c207c55b83c3a83890
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/647
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
2012-05-19 20:27:16 +00:00
Peter Stuge
064475459b docs: Fix incorrect -rtos option values
Commit 9ca1592cb9 started on documentation
for the -rtos option, but some of the documented values were incorrect so
we'll clean up the mess here.

Many thanks to Freddie Chopin for spotting this!

Change-Id: Iaa633bd40ff5f75dd6a69e74e79dafc1643ee21a
Signed-off-by: Peter Stuge <peter@stuge.se>
Reviewed-on: http://openocd.zylin.com/642
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested-by: jenkins
2012-05-14 16:23:42 +00:00
Spencer Oliver
9ca1592cb9 docs: add initial target rtos support info
Change-Id: Idd39ce17922602aedd4626496ed8f5422bb76e07
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/641
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-05-14 14:45:10 +00:00
Spencer Oliver
0eaa8e7db0 jtag: add opendous and estick support
Change-Id: I49c25d226f05fdcaca6cbfc35c2ab47e8464abec
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/611
Tested-by: jenkins
2012-05-14 09:41:49 +00:00
Spencer Oliver
ec5e4bae25 stlink: add armv7m stlink handling
This enables us to better handle some of the low level functions that the
stlink does not support. It also enables us to share a few more of the
standard cortex_m3 functions if necessary.

Change-Id: I7a2c57450122012ec189245d8879d8967913e00e
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/637
Tested-by: jenkins
2012-05-14 09:38:59 +00:00
Spencer Oliver
f9ea791e9b flash: blank check use default_flash_blank_check
Use default_flash_blank_check, this will use the much faster
blank_check_memory handler if supported - 15x quicker on stm32f4.

Otherwise it will fall back to using the slower default_flash_mem_blank_check.

Change-Id: Ia231b3e95468c9e92594dbdbe1fa2d69e1506fc3
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/632
Tested-by: jenkins
2012-05-14 09:38:26 +00:00
Spencer Oliver
e858451505 flash: fix protect check for pic32mx1x/2x family
Change-Id: Ib2692d8b79e52cd40f429008047494aa7f552984
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/612
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
2012-05-14 09:37:50 +00:00
Spencer Oliver
cad5991135 jimtcl: update jim to fix make clean bug
jimtcl 0.73 has a issue when make clean is called.
we have only included that fix as this is close to a release to update
to jimtcl master.

Change-Id: I5791ff32a98bd76e52feb9475605cbecf58420e5
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/638
Tested-by: jenkins
2012-05-14 09:35:31 +00:00
Spencer Oliver
c102e448c3 stlink: fix stlink api2 single step
This makes the newer v2 api behave as per the v1 api, eg. single stepping
masks all interrupts.

A better long term solution is to use same behaviour as a cortex-m3
target, see CORTEX_M3_ISRMASK_AUTO.

Change-Id: Iaf9f9adf225cf274faaac938050bb996582aa98f
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/621
Tested-by: jenkins
2012-05-14 09:34:15 +00:00
Spencer Oliver
61672009c4 stlink: add stlink_api cmd
This enables the manual selection of the stlink api version.

Change-Id: I0ec8c5b0a101b6456f426d2fec65971da56db4e7
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/617
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
2012-05-14 09:34:00 +00:00
Spencer Oliver
18df479f0a stlink: stlink/v1 use v2 api if supported
The api v2 is supported on the stlink/v1 if it has a least v11 firmware.

Change-Id: Idfdb5a7f5a5881326017451ae9b6004eeaa46a96
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/616
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
2012-05-14 09:33:49 +00:00
Spencer Oliver
57260831dd mips: support connecting under reset
Some targets support connecting while the target's srst is asserted.
Tested on pic32 family.

Change-Id: I0d20c40af6d031d1306043893e95e61f484c0a87
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/608
Tested-by: jenkins
2012-05-14 09:32:57 +00:00
Freddie Chopin
caeb057205 Use hardware reset and connect under reset on boards with ST-LINK/V2, as
now it is supported.

Change-Id: Id3b2ca9a2270974a5f453323f9057ecece400c94
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/609
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-05-14 09:32:20 +00:00
Spencer Oliver
a09bb27e23 cfg: add stm320518-eval onboard stlink config
Change-Id: Ie92a87ce077c538fdd04af37c798e0a8054b423a
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/610
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
2012-05-14 09:32:03 +00:00
Spencer Oliver
d469c686d9 stlink: support connecting under reset
Some targets support connecting while the target's srst is asserted.
Tested on stm32 family.

Change-Id: I1197dd721a1e1cbf95ee77dfd8e1082b165b22a9
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/607
Tested-by: jenkins
2012-05-14 09:31:45 +00:00
Spencer Oliver
6637cf9229 cortex-m3: support connecting under reset
Some targets support connecting while the target's srst is asserted.
Tested on stm32 family.

Change-Id: I9df43623025e37832155aeee7aa099b844b85f16
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/606
Tested-by: jenkins
2012-05-14 09:31:17 +00:00
Aurelien Jacobs
9d31589d19 cfi: fix write_bank segfault with spansion flash on armv7m
cfi_spansion_write_block() passes an arm_algorithm struct to
target_run_algorithm() which in turn calls armv7m_start_algorithm()
which expect an armv7m_algorithm struct.
As armv7m_algorithm is bigger than arm_algorithm, when
armv7m_start_algorithm() writes in the struct, it overrun the buffer,
writting junk on the stack, which latter on generates a segfault.

This patch ensure we use a properly sized armv7m_algorithm struct
when the target is an armv7m.

Change-Id: I4ab67c15ae4bb72454414a81b92a4231dcdb2239
Signed-off-by: Aurelien Jacobs <aurel@gnuage.org>
Reviewed-on: http://openocd.zylin.com/623
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-05-14 09:30:18 +00:00
Spencer Oliver
e95f8d93f2 cfi: fix cfi arch check regression
seems 9933fa334d introduce a regression
if the target was anything other than armv4_5 or armv7m.

Just check that we have an arm target.

Change-Id: I67c05138e5be2952ee92e9bfa15e1d050844462a
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/615
Tested-by: jenkins
Reviewed-by: Aurelien Jacobs <aurel@gnuage.org>
2012-05-14 09:29:43 +00:00
Spencer Oliver
ca53849045 cfi: check supported arch
check that the cfi driver supports the current target arch.

Change-Id: I8a95908684de67bf1657d1956f2573662a641cc1
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/614
Tested-by: jenkins
Reviewed-by: Aurelien Jacobs <aurel@gnuage.org>
2012-05-14 09:29:16 +00:00
Spencer Oliver
d2d4f776d8 build: use generic name for arm_algorithm vars
This makes the code a bit easier to read as arm_algorithm can
refer to other arch's, not just armv4_5.

Change-Id: I78c99d40f34cda04e06f2daee75b48ff40a1d23d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/613
Tested-by: jenkins
Reviewed-by: Aurelien Jacobs <aurel@gnuage.org>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-05-14 09:29:02 +00:00
Spencer Oliver
e1e1d4742c build: add missing erase_check loader src
Change-Id: I1534c1ea1606fda9eb6ffa6a11a708f8c8a3d46a
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/605
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-05-14 09:28:03 +00:00
Spencer Oliver
1b0c22dd56 armv7m: update crc/erase_check loaders for cortex-m0
Use loaders that have been built for cortex-m0, making them usable for both
cortex-m0 and cortex-m3 families.

Change-Id: Ifd82be87eaec2cb96464290c80800cec3630d619
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/604
Tested-by: jenkins
2012-05-14 09:27:20 +00:00
Spencer Oliver
4257cb728c contrib: fix Neo1973 udev permission typo
Change-Id: I6d5ad0cc28e0cb52104ead9e974b8b1ed92d9cdc
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/636
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-05-11 13:31:16 +00:00
Spencer Oliver
47cf0aabc8 flash: use correct stm32f0 flash size register
The stm32f0 parts use a different address then the rest of the family.
Add a function that returns the correct FLASH_SIZE reg depending on variant.

Change-Id: Idb41580f7162f395b347cec034d6b745847326b7
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/601
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-05-08 14:06:43 +00:00
Spencer Oliver
7fca524606 cfg: increase stm32f0discovery board working area
Change-Id: Iea166ee27fc60bbfdeb851fdcf71509f3984f72f
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/602
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-05-08 14:05:45 +00:00
Spencer Oliver
85c0375337 cfg: increase stm32f0 default working area
The smallest stm32f0 has 4k sram, so use this as the default.

Change-Id: I9097be9608da92b1b9da504e5bacc1280c86907a
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/603
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-05-08 14:05:11 +00:00
Bill Traynor
dcb222e072 cfg: Deleted duplicate busblaster.cfg and renamed original.
The busblaster.cfg was contributed on April 23, 2012 and is a
duplicate of dp_busblaster.cfg that was contributed on Oct. 23,
2011.  Therefore, deleting the second version.  Also, renaming
the original dp_busblaster.cfg to simply busblaster.cfg, as this
name is more concise.

Change-Id: Iccb1f10f53dbbb248b1ff4c6295eaf67c32247c1
Signed-off-by: Bill Traynor <wmat@alphatroop.com>
Reviewed-on: http://openocd.zylin.com/622
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-05-08 14:03:42 +00:00
Bill Traynor
f7a37efc3f cfg: Fixed product link to Flyswatter2
Fixed the product link to the Flyswatter2 debugger:
http://www.tincantools.com/product.php?productid=16153

Change-Id: I7d65e8c94d4521e61b9ae72a5ce14b140b775697
Signed-off-by: Bill Traynor <wmat@alphatroop.com>
Reviewed-on: http://openocd.zylin.com/620
Reviewed-by: Peter Stuge <peter@stuge.se>
Tested-by: jenkins
2012-05-07 20:14:09 +00:00
Bill Traynor
388d041e0f cfg: add default pid/vid pair to beaglebone board cfg.
The newer versions of BeagleBone boards use the default vid/pid
pair for FT2232 debugging.  Please see the following README:
http://beagleboard.org/static/beaglebone/latest/README.htm
On revision A3/A4 boards, the VID/PID were chosen to match the
 TI XDS100v2 (0x0403/0xA6D0). On A5 and newer revisions when we've
 given the authors of CCS the chance to update their software, the
generic FTDI VID/PID (0x0403/0x6010) will be used to simplify
installation of drivers for systems already having those drivers.

Change-Id: I44228eb2029162f23d084eb05bcfef39e615668d
Signed-off-by: Bill Traynor <wmat@alphatroop.com>
Reviewed-on: http://openocd.zylin.com/619
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-05-07 19:58:15 +00:00
Spencer Oliver
908ee4dc96 build: remove clang unused variable assignment warnings
Change-Id: Ibe5254704d6cd879a318a82c4f50d9da3c14276c
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/600
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-05-04 08:15:40 +00:00
Spencer Oliver
85735925c7 build: remove clang unused variable increments warnings
Change-Id: Ib755474aa46f7233495fae1947bc27cd0b2d6b4f
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/599
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-05-04 08:15:30 +00:00
Spencer Oliver
ee38fff78b cfg: fix incorrect stm32vldiscovery working area
The working area used in the config was incorrect, we only have 8K on this
board not 16K as the original cfg was declaring.

Change-Id: Ie0309fb86d839bd3bc1ac9383905b581fac5c388
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/598
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-04-30 13:06:34 +00:00
Spencer Oliver
8002ed268d cfg: allow stm32discovery parameter override
This enable the user or board config to override the parameters
passed to stm32_stlink.cfg.

Required to fix a incorrect working area bug with the stm32vldiscovery.

Change-Id: I40a4f7913ff37d577d44b1f23befccf0317080a1
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/597
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-04-30 13:06:29 +00:00
Spencer Oliver
ff6c3dd13c cfg: remove unused stlink options
reset_config is now supported by stlink, remove from the config as this
is a per board option.

Change-Id: I85208d2154502b8d3a098afe1d9a28d75820a7c0
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/582
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-04-30 13:05:23 +00:00
Spencer Oliver
cc4a934d37 stlink: support srst reset
This adds the ability to support srst reset for the stlink/v2.
stlink/v1 will fallback to using SYSRESETREQ which is a full reset - including peripherals.

To enable the use of the srst add the following to your cfg:
reset_config srst_only

Change-Id: I570de607c5f370fd6a4abf47360686c9be07bcdd
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/581
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-04-30 13:05:09 +00:00
Spencer Oliver
2d8c7c510b stlink: export write_debug_reg
Change-Id: I3944911d4a71dba4af48470ceb3e4850784a0e7d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/580
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-04-30 13:04:54 +00:00
Spencer Oliver
5d1cabb142 stlink: add hardware srst functions to stlink/v2
Change-Id: Ib82b6a1116b9f396f1933cc5526733334254fd62
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/579
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
2012-04-30 13:04:38 +00:00
Spencer Oliver
9cc733ae31 flash: update stm32f0x version info
Change-Id: Iab0962021e6243d1df3e7c647654a51b4bf50d72
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/578
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-04-30 13:04:22 +00:00
Spencer Oliver
0ce2e9a259 stlink: default to latest api available
Change-Id: Ic04128f4020055587bb87250f41e5c804d9c2b01
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/577
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-04-30 13:04:07 +00:00
Spencer Oliver
6f3a9bdf67 stlink: add improved STLINK_JTAG_API_V2 support
The STLINK/V2 supports two api's.
This completes the support so STLINK_JTAG_API_V2 is usable.

Support for hardware srst still needs adding.

Change-Id: Ic4d0499be2a225d18abf96fd6f5ce5e295fb1f37
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/561
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-04-30 13:03:47 +00:00
Spencer Oliver
8117ad8ce9 stlink: support stlink api result
The stlink api does support results for some functions - add support.

Change-Id: I39cb495408c46af8bc343b198a1e0bd4c7aee6d8
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/560
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-04-30 13:02:49 +00:00
Olivier Schonken
fdbf70601d SAM3X - Added support for at91sam3x8h-ES, fixed CIDR for ES2 and production
The first available devkits for the at91sam3x8h had the ES device populated.
The ES device had an error in the CIDR, specifically in the last byte of
which the upper 3 bits identifies the chip family - cortex-m3, arm7tdmi etc.

The problem was fixed on the ES2 devices - Thanks to Pat Hickey for giving me
the heads-up.

Change-Id: I13dd7fbe0cffaf76f948188c9459dc3cf4435570
Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>
Reviewed-on: http://openocd.zylin.com/575
Tested-by: jenkins
Reviewed-by: Jim Norris <u17263@att.net>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-04-26 10:58:42 +00:00
Olivier Schonken
d1cd97777b topic: Added support for the SAM4S variants
Atmel introduced 6 new Cortex-M4 processors on 2011-10-26
SAM4S16C - 1024KB flash LQFP100/BGA100
SAM4S16B - 1024KB flash LQFP64/QFN64
SAM4S16A - 1024KB flash LQFP48/QFN48
SAM4S8C - 512KB flash LQFP100/BGA100
SAM4S8B - 512KB flash LQFP64/QFN64
SAM4S8A - 512KB flash LQFP48/QFN48

The SAM4S processors still suffer from the "6 waitstates needed
to program device" errata.

Other relevant changes are:
1. Address of flash memory starts at 0x400000.
2. EWP (Erase page and write page) only works for the first two 8KB "sectors"
3. Because of the EWP not working for all the sectors, normal page writes have
to be used.  The default_flash_blank_check is used to check if lockregions
should be erased.
4. The EA (Erase All) command takes 7.3s to complete. (Previous timeout was
500 ms)
5. There are 128 lockable regions of 8KB each.

Implemented default blank checking, and page erase for load_image scenarios.
This is to compensate for the EWP flash commands only working on the
first 2 8KB sectors.

Change-Id: I7c5a52b177f7849a107611fd0f635fc416cfb724
Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>
Reviewed-on: http://openocd.zylin.com/528
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-04-26 10:58:14 +00:00
Linus Tolke
f28a5d9217 topic: Fixed a clang Dead assignment warning.
The value returned from target_write_buffer is still ignored.

Change-Id: Icb49d4d1313a5e4f7df68d3f122a5f81cfa0604a
Signed-off-by: Linus Tolke <linus@tigris.org>
Reviewed-on: http://openocd.zylin.com/596
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-04-24 20:31:19 +00:00
Linus Tolke
63e5386fa6 topic: Ignored TAGS files.
Allow use of TAGS.

Change-Id: I5e71e8986671642b49cc9a62d37cc8c0dfa37181
Signed-off-by: Linus Tolke <linus@tigris.org>
Reviewed-on: http://openocd.zylin.com/595
Reviewed-by: Peter Stuge <peter@stuge.se>
Tested-by: jenkins
2012-04-24 19:22:29 +00:00
Allen Martin
f908bae6bf cfg: Add interface config for Dangerous Prototypes Bus Blaster
This is a FT2232 based USB JTAG dongle

Change-Id: Ibed773a23b6446df62fe4eac16c27fb2d741f4c3
Signed-off-by: Allen Martin <amartin@nvidia.com>
Reviewed-on: http://openocd.zylin.com/589
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-04-23 10:00:12 +00:00
Bill Traynor
6ba7331501 UserGuide: Fixing link to USBprog tool.
In section '2.8 USB Other' updated the link to the USBprog tool:
http://shop.embedded-projects.net/

Change-Id: I7fa453934ac6a7889e01b22b7e0cb07f42ee168d
Signed-off-by: Bill Traynor <wmat@alphatroop.com>
Reviewed-on: http://openocd.zylin.com/591
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-04-23 09:13:23 +00:00
Bill Traynor
941fb511cf UserGuide: Updated link to Versaloon-Link tool.
In section '2.8 USB Other' updated the URL to the Versaloon-Link to:
http://www.versaloon.com

Change-Id: Idd92333cb3d87d1b89dfb282134332387df5a0fc
Signed-off-by: Bill Traynor <wmat@alphatroop.com>
Reviewed-on: http://openocd.zylin.com/592
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-04-23 09:11:52 +00:00
Bill Traynor
0a581ccdb1 UserGuide: Fixed link to Wiggler2 project.
In section '2.9 IBM PC Parallel Printer Port based' fixed link to
the Wiggler2 project and removed the alternate URL text to retain
style consistency with the other URLs in the document:
http://www.ccac.rwth-aachen.de/~michaels/index.php/hardware/armjtag

Change-Id: I879db1c6eaf683ca6475a0f466f987087c9d60d0
Signed-off-by: Bill Traynor <wmat@alphatroop.com>
Reviewed-on: http://openocd.zylin.com/593
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-04-23 09:10:59 +00:00
Bill Traynor
b9ecc64c80 UserGuide: Fixed link to ST flashlink.
In section '2.9 IBM PC Parallel Printer Port Based' fixed link to
ST's flashlink PDF and removed alternate URL text:
http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/
DATA_BRIEF/DM00039500.pdf

Change-Id: I99702dd00d4145784baee1f63b5998bf79e06678
Signed-off-by: Bill Traynor <wmat@alphatroop.com>
Reviewed-on: http://openocd.zylin.com/594
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-04-23 09:09:16 +00:00
Bill Traynor
fa39842d28 UserGuide: Fixing two typos.
In Section 2.7 USB ST-LINK based made these two changes:
"they only works with" to "they only work with"
"following method's" to "following methods"

Change-Id: Idfe6c11c3fa6f2157d01697cd7f480a9d495c8e2
Signed-off-by: Bill Traynor <wmat@alphatroop.com>
Reviewed-on: http://openocd.zylin.com/590
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-04-23 09:05:04 +00:00
Spencer Oliver
26f1354eda docs: update gerrit publish refs
since gerrit 2.3 pushing changes to refs/for/ is deprecated in
favour of using refs/publish/.

Change-Id: I6244b9645da2144921583bd9778a95c563fac89f
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/567
Tested-by: jenkins
2012-04-20 15:34:00 +00:00
Uwe Hermann
28e43783e5 Split olimex_stm32_h107.cfg.
Use one board file per eval board, so that the filename matches the
exact board the user has / wants to use. Merging different boards into
one file is confusing.

Change-Id: I7c50233924a87a913723d7215c4851039c2971bc
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Reviewed-on: http://openocd.zylin.com/566
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-04-20 15:33:24 +00:00
Bill Traynor
c9e59b30ab UserGuide: Fixed link to Raisonance RLINK.
In section 2.6 USB JLINK based, fixed link to RLINK:
http://www.mcu-raisonance.com/~rlink-debugger-programmer__microcontrollers__tool
~tool__T018:4cn9ziz4bnx6.html

Change-Id: I15f7a1b68b851054e07eefc07a50b4590ebce677
Signed-off-by: Bill Traynor <wmat@alphatroop.com>
Reviewed-on: http://openocd.zylin.com/588
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-04-20 15:31:59 +00:00
Bill Traynor
e6e8bf46e4 UserGuide: Update Section 2.3 USB FT2232 Based
Updated the link for the usbjtag project to the correct URL:
http://elk.informatik.fh-augsburg.de/hhweb/doc/openocd/usbjtag/usbjtag.html

Added a NOTE to indicate the axm0432_jtag as no longer being
available from the axman.com page.

Change-Id: I70727303dad58d9dc0c5f9b7cce219288b762042
Signed-off-by: Bill Traynor <wmat@alphatroop.com>
Reviewed-on: http://openocd.zylin.com/583
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-04-20 15:06:32 +00:00
Bill Traynor
818cc61775 UserGuide: Add ref. to Flyswatter2
Added the Flyswatter2 to section 2.3 USB FT2232 Based hardware
list.

Change-Id: I6a382644b5a0313d30afb5a97d0a9ea00f01efa9
Signed-off-by: Bill Traynor <wmat@alphatroop.com>
Reviewed-on: http://openocd.zylin.com/584
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-04-20 15:05:02 +00:00
Bill Traynor
008336becc UserGuide: Fixed link to USB-JTAG project.
Updated the URL to Kolja Waschk's USB-Blaster compatible adapter:
http://ixo-jtag.sourceforge.net/

Change-Id: If9d2875b5ba5d3bfaaf524cd253a5fab53e05371
Signed-off-by: Bill Traynor <wmat@alphatroop.com>
Reviewed-on: http://openocd.zylin.com/585
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-04-20 15:03:54 +00:00
Bill Traynor
b4eba5819f UserGuide: Fixed link to IAR J-Link.
In Section 2.5 USB JLINK based, fixed the URL for IAR J-Link:
http://www.iar.com/en/products/hardware-debug-probes/iar-j-link/

Change-Id: If613d2e915a0a704569d74094e612e34bcc849d3
Signed-off-by: Bill Traynor <wmat@alphatroop.com>
Reviewed-on: http://openocd.zylin.com/586
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-04-20 15:02:59 +00:00
Bill Traynor
c2207e852e HACKING: Fix instruction for git pull --rebase
When following the Patch Guidelines step by step,
an error occurs at step 6.

"git pull --rebase origin/master" results in the error:

fatal: 'origin/master' does not appear to be a git repository

Removing the / seems to fix this.

Change-Id: I4e2fa23c60654abeaebd3b25a8c8375aa07b0abd
Signed-off-by: Bill Traynor <wmat@alphatroop.com>
Signed-off-by: Peter Stuge <peter@stuge.se>
Reviewed-on: http://openocd.zylin.com/574
Reviewed-by: David Anders <danders.dev@gmail.com>
Tested-by: jenkins
2012-04-18 23:21:27 +00:00
Bill Traynor
6a1236a7ac zy1000: fixed link to Zylin ZY1000 JTAG Probe
This patch fixes the link to the Zylin ZY1000 JTAG Probe webpage.
The ZY1000 product line was acquired by Ultimate Solutions, Inc. in May 2011.

Change-Id: If68cd45a0c47aa20b2e4bb62939b2c505c8c8c2e
Signed-off-by: Bill Traynor <wmat@alphatroop.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/571
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-04-18 22:07:15 +00:00
David Anders
43d4ae4763 pandaboard: add initial TCL support for pandaboard-es
add initial TCL support for the pandaboard-es which is
based on the omap4460 from Texas Instruments.

Change-Id: Ic63588721487feb95e7cb3d41cfaab0d2f181766
Signed-off-by: David Anders <danders.dev@gmail.com>
Reviewed-on: http://openocd.zylin.com/573
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-04-18 20:32:08 +00:00
David Anders
28c0f2befc omap4460: add initial TCL support for the omap4460 es1.0
this patch adds the initial support for the omap4460 es1.0
version which is similar to the omap4430 and used on the
pandaboard-es.

Change-Id: If885f7d9f8809929bd799786b539e4f499fa3478
Signed-off-by: David Anders <danders.dev@gmail.com>
Reviewed-on: http://openocd.zylin.com/572
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-04-18 20:00:27 +00:00
Spencer Oliver
7e2fb7ce9a cfg: add stm32f0discovery board config
Change-Id: I4fccdbd4e0a3bc70cd425c910ad1007519098e20
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/570
Reviewed-by: Peter Stuge <peter@stuge.se>
Tested-by: jenkins
2012-04-18 10:50:16 +00:00
Uwe Hermann
b6068f5a48 Glyn Tonga2: Faster JTAG speed after CPU/RAM init.
Change-Id: Ib08dae0035355138c468483a7ee2d73aadedf430
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Reviewed-on: http://openocd.zylin.com/564
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-04-13 08:57:29 +00:00
Spencer Oliver
3c270bb0a9 stlink: correctly format printed hex addresses
Change-Id: I4a139989927249bb5e9dcc4804965c85c37cc09b
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/559
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-04-13 08:53:10 +00:00
Mathias K
d90eb2b93d STM32L: Write partial-page flash data after full-page data
The target address for the partial data needs to be bumped past the
full page data. Otherwise, the partial data overwrites the start of
the flash block.

Change-Id: I1246b2fa8acbdb8193edcf7029309f11d1c6069c
Signed-off-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/555
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-04-13 08:51:36 +00:00
Stephane Bonnet
57dce9560a ft2232: Support for Digilent HS1 USB adapter
* Added support to the FT2232 driver for the FT2232H-based
  Digilent HS1 adapter.

Change-Id: Iab6cc15f299badaf115615b5d4d785ecb2273c27
Signed-off-by: Stephane Bonnet <bonnetst@hds.utc.fr>
Reviewed-on: http://openocd.zylin.com/558
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-04-10 20:19:47 +00:00
Wjatscheslaw Stoljarski (Slawa)
108a458ab8 cfg: add icnova_imx53_sodimm board config
Add board config for In-Circuit ICnova iMX53 SODIMM

Change-Id: I3802ab1695baa75c1f170cf1af0e38ada284c0b8
Signed-off-by: Wjatscheslaw Stoljarski (Slawa) <wjatscheslaw.stoljarski@kiwigrid.com>
Reviewed-on: http://openocd.zylin.com/543
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-04-10 12:25:52 +00:00
Wjatscheslaw Stoljarski (Slawa)
e3b3273433 cfg: add imx53loco board config
Add board config for iMX53QSB (loco)

Change-Id: I8659dcd71a56d5fe855eaf62be0a415198b558c5
Signed-off-by: Wjatscheslaw Stoljarski (Slawa) <wjatscheslaw.stoljarski@kiwigrid.com>
Reviewed-on: http://openocd.zylin.com/542
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-04-10 12:24:00 +00:00
Antonio Borneo
f1e59308d1 contrib/openocd.udev: fix warning
Fix following warning message logged by udev at start

udevd[421]: SYSFS{}= will be removed in a future udev
version, please use ATTR{}= to match the event device,
or ATTRS{}= to match a parent device, in
/etc/udev/rules.d/95-openocd.rules:81

Change-Id: I6de935c13a3327e3d718c110f97d19b9847ceca5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/552
Tested-by: jenkins
Reviewed-by: Luca Bruno
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-04-10 12:22:59 +00:00
Simon Widmer
fad7240689 Support for KaRo TX25 CPU Module on a StarterkitV base board
This patch adds support for the KaRo TX25 module on a StarterkitV base board.
For board details, check http://www.karo-electronics.com/tx25.html

Change-Id: I2c80c5467bc476955b55196728aa3c37c8185e6c
Author: Simon Widmer <simonxwidmer@gmail.com>
Signed-off-by: Mark Vels <mark.vels@team-embedded.nl>
Reviewed-on: http://openocd.zylin.com/557
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-04-10 12:15:16 +00:00
Simon Qian
7743e0fb43 topic: add reset functions for SWD
Add swd_init_reset and swd_add_reset.
Add adapter_assert_reset and adapter_deassert_reset, and call them instead
of JTAG reset functions.

Change-Id: Ib2551c6fbb45513e0ae0dc331cfe3ee3f922298a
Signed-off-by: Simon Qian <simonqian.openocd@gmail.com>
Reviewed-on: http://openocd.zylin.com/526
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-04-10 12:14:00 +00:00
Spencer Oliver
a2935397b4 doxygen: remove warnings
Change-Id: I020845a8df7b67f3b6c1a233b3ee07a5d14fa685
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/556
Tested-by: jenkins
2012-04-10 12:12:39 +00:00
Salvador
e2535e7901 Finish off functions mips32_pracc_read_mem16() and mips32_pracc_read_mem8()
This functions are unfinished and work only with  parameter count up to 1024.

Commands mdh and mdb from pic32mx context show values not related to memory
content if parameter count is bigger than 1024. Firt 1024 are ok.

Change-Id: Ie3f4d4a0f9d1d1a69bd3a18de2f72dd9249514cb
Signed-off-by: Salvador <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/550
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: jenkins
2012-04-10 12:10:57 +00:00
Salvador
18e6e02cdc Minor bug fixes in Mips32 code
Now the the "Fast" version for memory blank check in pic32mx.c can be called:
default_flash_blank_check()  instead of the "fallback"  default_flash_mem_blank_check().

The command "verify_image", without working area, now don't show:
 checksum mismatch - attempting binary compare
when there are no real errors in flash.

Change-Id: I256e8ae949289634e1de5c1c2861e4c4c4b7fdce
Signed-off-by: Salvador <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/549
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-04-10 12:09:55 +00:00
Spencer Oliver
a6cf60c9c2 docs: add gerrit server url
Change-Id: If39b522594a4ee3758fb85309af01f7a98c9f939
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/553
Tested-by: jenkins
2012-04-04 08:51:58 +00:00
Spencer Oliver
2c25ab4588 docs: remove unused primer ref
we already have a link to the patch primer in the main index.

Change-Id: Ib90ade76a17f5d99da8fe481d8f87c68eca38f1c
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/546
Tested-by: jenkins
2012-04-04 08:51:43 +00:00
Ulf Samuelsson
8e5ea23201 tools/initial.sh
Small script to setup Gerrit with the local repository

Usage: tools/initial.sh <username>

Change-Id: I26527c35cfe040c7752efec06064d5dc9e3ec6a2
Signed-off-by: Ulf Samuelsson <ulf@emagii.com>
Signed-off-by: Attila Kinali <attila@kinali.ch>
Reviewed-on: http://openocd.zylin.com/290
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-04-04 08:51:17 +00:00
Uwe Hermann
1748aab2c9 Initial config for the Voltcraft DSO-3062C.
This is a digital oscilloscope which uses a Samsung S3C2440 internally.

http://randomprojects.org/wiki/Voltcraft_DSO-3062C

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Change-Id: I5e28c3a8f30665a162e34c831294e4e658a16ebb
Reviewed-on: http://openocd.zylin.com/548
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-04-02 00:02:56 +00:00
Wim Lewis
d40cb56d49 Add value "openbsd" for ocd_HOSTOS.
Change-Id: I9b0dd87d85c0792730f507176001d39c44da7117
Signed-off-by: Wim Lewis <wiml@hhhh.org>
Reviewed-on: http://openocd.zylin.com/547
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-03-31 04:02:24 +00:00
Spencer Oliver
d1a6dfbb87 jimtcl: update to version 0.73
Change-Id: I9c943abb3ec5148b9cb24d0823f7787066948201
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/536
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-03-30 22:25:55 +00:00
Spencer Oliver
738e259d59 armv7m: fix broken stlink build
The stlink partially supports the cortex-m4 fp regs and requires these
defines to build.

Change-Id: Id3aa802ecc7006cb6d9f84b79ab3c21af24c1001
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/545
Tested-by: jenkins
2012-03-30 20:13:00 +00:00
Mathias K
90ea965fca stm32: Update register read/write to the register definition.
This patch fix the register index on read/write register.

Change-Id: I7b52a927a48259d6f497ac0f474aff7ff1529e9a
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/525
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-03-30 16:10:02 +00:00
Mathias K
861df4574d armv7m: detect floating point feature
This patch add fp feature detection on cortex-m4.

Change-Id: I99e9d1bf5534630a22b8ad9c878165683db2d0ba
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/524
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-03-30 16:08:32 +00:00
Spencer Oliver
8cb4fc1420 build: correctly quote m4 parameters
Change-Id: I8fbef892caa78dba5324a8bc28d2a4a4854b1f48
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/544
Tested-by: jenkins
2012-03-30 16:03:01 +00:00
Spencer Oliver
067ac78b61 cfg: add support for STM3220G-EVAL onboard STLINK
Change-Id: Icd7a1baf6f2623e5b57d29c4602a2762af730936
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/541
Tested-by: jenkins
2012-03-30 16:02:36 +00:00
Spencer Oliver
e9976aa3a8 cfg: add STM32F4x and STM3241G-EVAL config files
This adds support for the STM32F4 target and the STM3241G Eval Board, in
both standalone and using the onboard STLINK.

Change-Id: I62f8908b5880568b2b36c78a78f94c40861ff335
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/540
Tested-by: jenkins
2012-03-30 16:02:14 +00:00
Spencer Oliver
4e31b87943 scripts: use adapter_nsrst_delay not deprecated jtag_nsrst_delay
Change-Id: Idf98526d64dcba4d8a5b6910bd3c539756753e8e
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/539
Tested-by: jenkins
2012-03-30 16:01:51 +00:00
Olivier Schonken
90d33c5c87 Added tcl config scripts for SAM3A/X targets and devboard
The SAM3A/X processors that were released thus far is either
a SAM3A/X(4) - 256K, or a SAM3A/X(8) - 512K device.  Thus
the config files are per variant, and not per device.

Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>

Change-Id: I84d26d044e810eb428b1d6287907ea3bf8364c73
Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>
Reviewed-on: http://openocd.zylin.com/522
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-03-30 15:56:19 +00:00
Spencer Oliver
d26098b664 docs: update release docs to use configure.ac
Change-Id: I7b52ad1c3744a82832c5b55898bf47607e24d03e
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/538
Tested-by: jenkins
2012-03-30 15:55:21 +00:00
Spencer Oliver
222afb3d0e tools: update release scripts to use configure.ac
we have already updated autoconf to use configure.ac instead of
configure.in, so update release.sh to use the new name.

Change-Id: I2dc2beaf2f85058c4627183bc093052677ccba1b
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/537
Tested-by: jenkins
2012-03-30 15:55:01 +00:00
Salvador Arroyo
c68a267ee1 topic: Flash support for Pic32mx1xx/2xx
Change-Id: I496cb745fb1eb5c9159471838013b8d19418f5c0
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/500
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-03-30 15:54:22 +00:00
Chris Morgan
8fc35a696f Create a init_board procedure for the ea dev board.
Signed-off-by: Chris Morgan <chmorgan@gmail.com>
Change-Id: I082b0d3092c7f3b2ee6b68af64d48c78b31f1dbf
Reviewed-on: http://openocd.zylin.com/510
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-03-30 15:53:06 +00:00
Spencer Oliver
4aa63d59bd transport: remove interface multiple transport warning
Currently if we have multiple transport's defined we receive an warning similar to:
must select a transport.
allow transport 'jtag'
allow transport 'swd

This removes that warning and only prints this info if transport_init fails.

Change-Id: I87126390f234bc2f705e1f150a0dcc110dcab151
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/532
Tested-by: jenkins
2012-03-30 15:51:37 +00:00
Salvador
1274df07f1 Bug in src/target/mips32_pracc.c
The bug shows up with the command "mdw addres count" and only if count>1024 (count>0x400).
The first 1024 values shows as expected, but the rest of the values  are wrong.
Name of variable  bytesread" is changed to "wordsread" to reflect what really does.

Change-Id: Iad79393e72da2637551c5ae6e829e3873605c520
Signed-off-by: Salvador <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/527
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-03-30 15:50:55 +00:00
Mathias K
f1c0133321 Add warn message if no flash bank found for the current image address.
Add a warn message to inform the user that something is wrong
with the flash settings or command parameters.

Change-Id: Ia55868b2abf2a17845e51620b0f29b2809d841c2
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/280
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-03-19 19:50:18 +00:00
Mathias K
b0cab3d809 gdb_server: Simple close the connection and not exit openocd.
This patch let openocd running and only close the gdb connection
on error.

Change-Id: Ifb88e16834b51207cc4c82210eab904ed8d30b71
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/523
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-03-19 17:11:48 +00:00
Mathias K
0ba480d924 gdb_server: Fix wrong index/length compare.
This patch fix the compare for the list size and the register index.

Change-Id: I36d5e078f57d2a9f7823cfdf0d537762e00f6929
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/516
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-03-19 17:09:13 +00:00
Paul Fertser
e26d076190 rtos: add sanity checking for FreeRTOS's quantity of priorities
On operating systems with opportunistic malloc() (e.g. default setting in
GNU/Linux) malloc can sometimes allocate a huge memory region but later the
process will get killed on the first attempt to use this memory, so
checking for malloc's return value is not enough to prevent a crash.

This patch is compile-tested only.

Change-Id: I5e21663115c8e9a0ca9f3d71f7ba4bd09e5c3bb1
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/521
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-03-19 17:07:44 +00:00
Paul Fertser
fe11baeebb rtos: fix segfault in FreeRTOS handling
When gdb loads an elf file of a newer or older version of the firmware
being debugged, or when the firmware is not running yet, there's a high
probability of FreeRTOS variables to be read incorrectly, thus leading to
an attempt to allocate an enourmous amount of memory. Without this check
OpenOCD simply crashes and that's mad confusing.

Change-Id: I404a072e886d2d47d9d942cfaea8417eb8bd4a5d
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/520
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-03-19 17:07:26 +00:00
Alexandre Pereira da Silva
7151398cff stlink: fix alignment build warning
The {read,write}_mem32 interface functions was asking a 32 bits buffer
but they don't need 32 bits alignment.
This will change the interface to a 8 bits buffer to remove the
alignment mismatch warning. This was causing build errors on platforms
with strict aliasing rules.

Change-Id: I338be8df5686f07a64ddb4f17c1bb494af583999
Signed-off-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Reviewed-on: http://openocd.zylin.com/483
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-03-14 22:23:43 +00:00
Mathias K
4a29a4a86d gdb_server: sanity check the gdb register size
This patch checks the received register length with the local
configured register length and disconnect on a length missmatch.

Change-Id: I6b112c6b55a9ffb4526f582a384ffa91dc8b792f
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/517
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-03-14 20:57:21 +00:00
Mathias K
5d02d2de43 armv7m: Add a dummy register at the end of the register list.
Signed-off-by: Mathias K <kesmtp@freenet.de>
Change-Id: I0bfad091bd8adabd949fc0a74ef3a08a514eb307
Reviewed-on: http://openocd.zylin.com/519
Reviewed-by: Peter Stuge <peter@stuge.se>
Tested-by: jenkins
2012-03-14 20:55:22 +00:00
Mathias K
dbb8de15e3 stm32: Add floating point register read/write.
This patch add floating point register read/write
functionality through the SCS debug interface.

Change-Id: Id20e109dd7cccba00671d55ca8aabeb4936cceb9
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/512
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-03-14 20:55:08 +00:00
Mathias K
e2073cc18a stm32: determine all cpu types and use common examine
This patch determine all cpu types and not only
the cortex M3 and the stm32 target use the common
target examine function from the cortex_m sources.

Change-Id: If689dd994b3855284b927fc4b206f420cf32b6c7
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/511
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-03-14 20:35:59 +00:00
Mathias K
6f5b9e9304 flash: Fix flash write algorithm on pflash only devices.
This patch fix the slow flash write issue on pflash only devices.
The Family Reference Manual says:

For devices with FlexNVM: FlexRAM
For devices with program flash only: Programming acceleration RAM

So the acceleration RAM is available for the flash section command on
this device.

Change-Id: If6541a23a4457c5ed8858848a145f35cac63138b
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/509
Tested-by: jenkins
Reviewed-by: Tomas Frydrych <tf+openocd@r-finger.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-03-14 20:33:23 +00:00
Mathias K
cfdfe5119d Automatically prepend v1 mass storage protocol.
This patch prepend the v1 mass storage protocol to the command
buffer and simplify the usb read/write handling.


Change-Id: I709602600e93cd1eb5848fa9f4d15659ba85eb35
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/506
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-03-14 20:33:03 +00:00
Drasko DRASKOVIC
8e198e9471 mips: Forced to running state to enable (subsequent) target halt.
Change-Id: I9aff8fb3ac703b50194088dd4e68cec8f9bb2ada
Signed-off-by: Drasko DRASKOVIC <drasko.draskovic@gmail.com>
Reviewed-on: http://openocd.zylin.com/513
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-03-14 20:31:04 +00:00
Spencer Oliver
35e7377160 cfg: correct pic32mx config typo's
Change-Id: Ibe5b6b0efefc7cfc75d789eb7e9c7ee239526ae2
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/508
Tested-by: jenkins
2012-03-14 20:30:45 +00:00
Øyvind Harboe
39650e2273 ecosboard: delete bit-rotted eCos code
Change-Id: Iff7943eb9da3f41dcc45492acd0f36cf63b3497f
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/503
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Tested-by: jenkins
2012-03-13 19:11:11 +00:00
Jan Dakinevich
34d1f82c75 jtag: basic support for P&E Micro OSBDM (aka OSJTAG) adapter
This driver provides support for the P&E Micro OSBDM adapter (sometimes
named as OSJTAG), mounted on the Freescale TWRK60N512 bord. Thus, it
provides a quick start when working with this board. The driver doesn't
use BDM commands, but work with OSBDM adapter using only JTAG commands.

Change-Id: Ibc3779538e666e07651d3136431e5d44344f3b07
Signed-off-by: Jan Dakinevich <jan.dakinevich@gmail.com>
Reviewed-on: http://openocd.zylin.com/492
Tested-by: jenkins
Reviewed-by: Tomas Frydrych <tf+openocd@r-finger.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-03-13 17:04:07 +00:00
Olivier Schonken
736e8bb773 topic: Added support for the SAM3X/A variants
Atmel introduced 7 new Cortex-M3 processors on 2012-02-28
SAM3X4C - 256KB flash
SAM3X4E - 256KB flash
SAM3X8C - 512KB flash
SAM3X8E - 512KB flash
SAM3X8H (Only on dev-kit - not in production...) - 512KB flash
SAM3A4C - 256KB flash
SAM3A8C - 256KB flash

The SAM3X/A processors still suffer from the "6 waitstates needed
to program device" errata.

The CIDR address for the SAM3X/A processors are different from the
other SAM3 processors.  Unfortunately, the chip identification register
is not at a constant address across all of the SAM3 series'. As a
consequence, a simple heuristic is used to find where it's
at... If the contents at the first address is zero, then we know
that the second address is where the chip id register is.
We can deduce this because for those SAM's that have the chip id @ 0x400e0940,
the first address, 0x400e0740, is located in the memory map of the Power
Management Controller (PMC). Furthermore, the address is not used by the PMC.
So when read, the memory controller returns zero.

Another interesting change is the flash bank address for flash bank 1.
It is not fixed at 0x00100000 like the Sam3U.  Bank 1 of the at91sam3a/x
series starts at 0x00080000 + half the total flash size.  Thus for the 256KB
devices Bank 1 is located at 0x000A0000, and for the 512KB devices Bank 1 is
located at 0x000C0000.

The configuration files for the SAM3X/A processors will follow

Change-Id: I6c3a707c00e05d993a2ad1d5a423f23b37ffd553
Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>
Reviewed-on: http://openocd.zylin.com/505
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-03-13 17:02:56 +00:00
Spencer Oliver
ea39d4b281 docs: add stm32 dual bank example
Change-Id: I1dfe134e2c7694fc978d14b4b21bdf9c82ca4b16
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/507
Tested-by: jenkins
2012-03-13 17:02:22 +00:00
Spencer Oliver
7d1f9bafc7 target: remove unused declaration
arm7_9_prepare_reset_halt is long since gone and the functionality
is implemented in the target's assert_reset handler.

Change-Id: Ib03c730cb39d68e5e3bb42f92af13daf8074e4e2
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/515
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-03-13 16:32:09 +00:00
Øyvind Harboe
ed12a6521f flash: retire unused eCos flash driver
even the AT91EB40a's flash is covered by CFI and nobody ever submitted
any other drivers based on eCos code. It's just possible that this
idea was missing documentation and "marketing", but it's in git if
somebody wants to resurrect it.

Change-Id: I66449aa6e0997301f9d67f28098789bfc891d6e9
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/502
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-03-11 21:14:21 +00:00
Øyvind Harboe
0999bdb830 target_request: fix warning, do not set local variable to value it already has
Change-Id: If29b0efdc326ee1ce4c07ec9d8777744d674f367
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/490
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-03-11 21:12:10 +00:00
Szymon Modzelewski
27b3d9c434 flash: stm32f1x: add a couple missing stm32x_get_flash_reg
Change-Id: I163de2c1bd962e7ea9ca6c741c1c62224c210677
Signed-off-by: Szymon Modzelewski <szmodzelewski@gmail.com>
Reviewed-on: http://openocd.zylin.com/486
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-03-06 13:33:54 +00:00
Fredrik Hederstierna
5c5af2467b flash: Additional check for NULL in str9xpec enable_turbo
Change-Id: Ifde8783b27c64e4a4bbea180cfa2c86f6a9fe49a
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/496
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-03-06 13:32:48 +00:00
Spencer Oliver
dfe8f3a441 stlink: fix incorrect pc console output
target_call_event_callbacks needs to be called after debug entry otherwise
we will get a console pc mismatch.

Change-Id: I278137736d5e85ca9662c306f6ac81336d8eb6cf
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/499
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-03-06 13:32:22 +00:00
Jim Norris
0ab3f83667 Add new configuration files for the Diolan LPC-4350-DB1 development
board with the NXP LPC4350 processor.

Change-Id: I0843e96af9ca05d3e598e2e16eb19fc0581ab46d
Signed-off-by: Jim Norris <u17263@att.net>
Reviewed-on: http://openocd.zylin.com/501
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-03-06 13:31:59 +00:00
Attila Kinali
4b4ce4f27e SAM3: Remove unused reference to SUPC registers
The SUPC (Supply Controller) registers are on different base addresses on different
SAM3 chips:
SAM3U: 0x400e1210
SAM3N: 0x400e1410
SAM3S: 0x400e1410

This creates a problem with the sam3_reg_list array which is const, but would need
to be changed at runtime to account for this variability. As this register is not
used anywhere, it's simplest to just remove it.

Change-Id: I987eb371648d826aa6d5e9de18d38c7bb66d6fca
Signed-off-by: Attila Kinali <attila@kinali.ch>
Reviewed-on: http://openocd.zylin.com/495
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-03-06 13:31:13 +00:00
Attila Kinali
9e137265de SAM3: Add missing architecture names for SAM3S and SAM3N
Change-Id: Ie2177487d4315219eb364db360cb7f88d2720783
Signed-off-by: Attila Kinali <attila@kinali.ch>
Reviewed-on: http://openocd.zylin.com/494
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-03-06 13:30:48 +00:00
Attila Kinali
00937cd049 SAM3S: correct flash sector sizes.
Lock region count and sector sizes did not match datasheet.
(see 6500C-ATARM-8FE11 "SAM3S Series Datasheet", Table 7-1)

Change-Id: Ic511802f96ed03856467a24a6736349205a0576a
Signed-off-by: Attila Kinali <attila@kinali.ch>
Reviewed-on: http://openocd.zylin.com/493
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-03-06 13:30:22 +00:00
Jaap de Jong
428d1559ee config: fix typo in at91 config
Change-Id: I596cbac3439456fcb02111caee6e8c290c12a6d5
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/504
Reviewed-by: Peter Stuge <peter@stuge.se>
Tested-by: jenkins
2012-03-06 10:30:54 +00:00
Szymon Modzelewski
c59a4419fc stlink-v1: fix memory writes
implement stlink_usb_send and use it to fix stlink_usb_write_mem

using two calls to stlink_usb_recv is inappropriate since each
call issues a SG command on stlink-v1, resulting in errors

Change-Id: I24ef9f2dda284e041dc4a532b59968a77eebe702
Signed-off-by: Szymon Modzelewski <szmodzelewski@gmail.com>
Reviewed-on: http://openocd.zylin.com/498
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-02-29 14:39:15 +00:00
Spencer Oliver
3ddb3b3c3d Revert "stlink-v1: fix memory writes"
I committed in the wrong order

This reverts commit 79230a8e3c5b85601fca730dfc09ecc52e693afa

Change-Id: Iace872ac4844891f4f38fca87448a2ebd9f17593
Reviewed-on: http://openocd.zylin.com/497
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-02-29 14:18:58 +00:00
Szymon Modzelewski
592be6504c stlink-v1: code cleanup
This patch moves the bulk of the stlink read/write code into the
stlink_usb_xfer set of functions and implements stlink_usb_recv
in terms of the generic stlink_usb_xfer

stlink_usb_xfer will be needed to implement stlink_usb_send
without code duplication

stlink_usb_xfer:
-sends the stlink command
-performs a read or write (as requested)
-checks the status (v1 only)

Change-Id: I0137d52620bd4883d46c9977a9e73f67622000a1
Signed-off-by: Szymon Modzelewski <szmodzelewski@gmail.com>
Reviewed-on: http://openocd.zylin.com/477
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-02-29 13:42:03 +00:00
Attila Kinali
cea4842207 Fix assert to check flash programming offset
The assert introduced in 00c8648351 checks
whether the programming offset equals to page_size of the flash, while it
wants to check whether the offset is a multiple of the page_size.

Change-Id: I794d021951a28c1cc520b5eea5d500f097721b06
Signed-off-by: Attila Kinali <attila@kinali.ch>
Reviewed-on: http://openocd.zylin.com/482
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
2012-02-29 11:21:07 +00:00
Spencer Oliver
14f51c0a32 flash: add stm32lx High Density Devices
Change-Id: Ieed9de4b078e1ebf659054a758b4f69acdf5b83e
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/466
Tested-by: jenkins
2012-02-29 11:20:31 +00:00
Spencer Oliver
38dc253001 flash: change stm32lx driver probe behaviour
Currently stm32lx flash driver will remove the readout protection if set
during a probe.

This may not be what the user wants, so let them decide.

Change-Id: I8575e3b339b10a4f7bac57cca9586dcab513d347
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/465
Tested-by: jenkins
2012-02-29 11:19:58 +00:00
Szymon Modzelewski
6dfd56a743 stlink-v1: fix memory writes
implement stlink_usb_send and use it to fix stlink_usb_write_mem

using two calls to stlink_usb_recv is inappropriate since each
call issues a SG command on stlink-v1, resulting in errors

Change-Id: I52ff9ee8f5d9ae0d47356477468eb98952205c99
Signed-off-by: Szymon Modzelewski <szmodzelewski@gmail.com>
Reviewed-on: http://openocd.zylin.com/478
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-02-29 11:19:18 +00:00
Spencer Oliver
30a4271b41 flash: add new devices to pic32mx flash driver
update as per DS61145 rev J

Change-Id: I2b5da84248ff2f44c7ca9d2ed1c52db453714c05
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/461
Tested-by: jenkins
2012-02-27 21:12:41 +00:00
Neil Jensen
21a0f9b48b cfg: Beaglebone/AM335x refactor
Split out functions specific to the AM335x SOC into the target directory and simplified the board config
file.  This should allow one to quickly create new configs for boards based on the TI processor family.

Change-Id: I0c3db97950dfa832f1f1918fc10c180f068bba74
Signed-off-by: Neil Jensen <neil30al@gmail.com>
Reviewed-on: http://openocd.zylin.com/489
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-02-27 10:01:44 +00:00
Neil Jensen
3a7ca6a621 cfg: beaglebone cleanup
Simplified the configuration and removed things that were not necessary for debugging.  Also added reset
configuration.

Signed-off-by: Neil Jensen <neil30al@gmail.com>
Change-Id: I96f991c3051aa68278212cd6509484cbce40ccb7
Reviewed-on: http://openocd.zylin.com/488
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-02-27 10:01:01 +00:00
Spencer Oliver
5793056d96 jtag: use correct tap -ignore-version mask
when -ignore-version is used we should mask of the upper 4bits not 8bits.

Change-Id: I9ffe24c2aeeb414677357a647609fdf018890194
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/473
Tested-by: jenkins
2012-02-26 01:14:39 +00:00
Spencer Oliver
d431af34fe jtag: fix cmd scan_chain expected_ids bug
This fixes scan_chain to correctly print all the expected_ids.

Change-Id: I93738980d85e0fe369d40c58b19339424d37ec34
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/474
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-02-26 01:12:01 +00:00
Spencer Oliver
94db77a0e6 flash: add stm32f2x async flash loader
This enable the stm32f2x flash driver to use the asynchronous
algorithm support.

Speed increase is as follows:
before - wrote 1048576 bytes from file stm32f4x.bin in 30.453804s (33.625 KiB/s)
after - wrote 1048576 bytes from file stm32f4x.bin in 23.679497s (43.244 KiB/s)

This also fixes a bug that was in the old flash loader.
The old loader waited while bit16 of the status reg was 0, the new
loader waits until this bit is 0 as stated in the flash spec.
Bizarrely this bug did not effect programming on any tested parts.

Change-Id: I3efc94d42cbe81283673a8f4203700638080af6e
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/460
Tested-by: jenkins
2012-02-26 01:05:48 +00:00
Spencer Oliver
90cee35696 flash: add stellaris async flash loader
This enable the Stellaris flash driver to use the asynchronous
algorithm support.

Speed increase is as follows:
before - wrote 65536 bytes from file test.bin in 5.486040s (11.666 KiB/s)
after - wrote 65536 bytes from file test.bin in 2.274001s (28.144 KiB/s)

Change-Id: I9004c9aadffa1ae3b0cbf908e6549b5b1f794508
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/403
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-02-26 00:46:48 +00:00
Spencer Oliver
bee7184ce4 target: add target async algorithm support
Currently the stm32f1x flash driver uses an asynchronous algorithm
as part of the block flash programming. This greatly speeds up flash
programming as the target is always running.

Moving the async code to the target enable other targets to use this
added functionality.

Change-Id: I8e53f094c2ef7848a7f86ddb9a35b6edbfc8454a
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/402
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-02-26 00:44:25 +00:00
Neil Jensen
dec6b91380 cfg: beaglebone
Moved ti_beaglebone.cfg to the board configuration directory.  This was
originally placed in the wrong location.

Signed-off-by: Neil Jensen <neil30al@gmail.com>
Change-Id: I05d10b62b1a21618635ee1773c30d77dc756ec82
Reviewed-on: http://openocd.zylin.com/481
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-02-24 09:11:49 +00:00
Neil Jensen
e6580a3cff cfg: Beaglebone Support
Added support for the Beaglebone board based on the am335x processor
family.  After much trial and error, I was able to configure the
Icepick-D and connect to the processor, halt execution, and run a sample
program.  This is a unified config file (it doesn't use any include
statements) and further work needs to be done to split out the icepick-d
configuration to be more generic.

Change-Id: Ia1b8e9f01f56bd4f8c575ba3d0160c248583a15e
Signed-off-by: Neil Jensen <neil30al@gmail.com>
Reviewed-on: http://openocd.zylin.com/471
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-02-23 14:11:04 +00:00
Andreas Fritiofson
2eb564b756 target: add function to get number of bytes available in working area
This is a much cleaner solution to the problem of allocating as much
working area as possible than what is currently being done in most/all flash
drivers (which is: try an arbitrary sized chunk, if it fails, pick a smaller
number, rinse and repeat).

Use this function to find out how much working area is available, limit or
restrict that amount at will and then simply allocate it.

Change-Id: Ib7d5d0b7485aed3e0a4fad60c1bedb7dfd16146f
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/446
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-02-23 14:04:01 +00:00
Andreas Fritiofson
813f4a5411 target: rewrite working area allocator
The existing allocator couldn't reuse a freed allocation if the sizes
didn't match exactly. That led to problems when for example a flash write
routine had allocated all of the working area to speed up operation. A
subsequent verify pass couldn't allocate space for the checksum algorithm
even though all previous allocations had been freed.

This allocator is marginally more complex, but solves the above problem by
splitting larger free areas to fulfill smaller requests and by merging
released areas into adjacent free areas.

An initial free area, covering the entire specified address range, is set
up on first allocation, and all allocations are split off from (and
ultimately merged into) that one. It can also easily be adapted to support
several disjoint working areas for the same target, by setting up several
initial free areas and slightly modifying the merge code.

Change-Id: I6faaf9801312bb19a4fa4474694a0cd1c6e0ab54
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/445
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-02-23 14:02:23 +00:00
Spencer Oliver
f0ef9960b6 cfg: enable stm32f2x SYSRESETREQ support
The stm32 family supports using SYSRESETREQ as a software reset, lets
use it.

Change-Id: I171ffa8d888a2d0c28b266051030311521e9bca9
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/472
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
2012-02-22 20:55:43 +00:00
Spencer Oliver
f6b50b8ea2 stlink: support expected-id 0
This brings the stlink driver inline with the rest of OpenOCD.

If the user configures the tap as -expected-id 0 then the IDCODE will be
treated as a wildcard and ignored.

Change-Id: I99160c69b2b40f5b1f608bb59ab6630894502fd8
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/476
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
2012-02-22 20:55:23 +00:00
Spencer Oliver
897981c318 docs: fix more texinfo warnings
A period or comma must follow the closing brace of an @xref.

Change-Id: Ida5dc3600eca328d95b0a8f6b5c9fe0a0f3ba820
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/475
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
2012-02-22 20:55:11 +00:00
Stian Skjelsad
2f944a3410 Sometime in the past, nand_fileio_finish started to return ERROR_OK (with the value of zero) on success.
Change-Id: Ifb743c1617e2a6071a87c901fae8165969efcdbf
Signed-off-by: Stian Skjelstad <stian@nixia.no>
Reviewed-on: http://openocd.zylin.com/468
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-02-22 20:54:09 +00:00
Mathias K
631b80fd08 stlink: add error status check
This patch add the status check.

Change-Id: I0fdb9bf66dad5ae416c7aa4c6e19116f846571f9
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/463
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-02-17 14:04:36 +00:00
Jonathan Dumaresq
445770c081 Fix Typo in cfg file
Change-Id: Id91ef70988212185f9ec653cbf5dc4e1defb1b9e
Signed-off-by: Jonathan Dumaresq <jdumaresq@cimeq.qc.ca>
Reviewed-on: http://openocd.zylin.com/464
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-02-17 14:02:50 +00:00
Mathias K
d8b912755d Fix typo that result in recursion.
Change-Id: Ie1102b4960bcb5acb254eae69b94fe87ab33dd0b
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/462
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-02-16 17:19:57 +00:00
Spencer Oliver
0a98914700 stlink: add arm semi-hosting support
Change-Id: Ib275d451a9201580f08ced090e50cf45eb3ab3e2
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/459
Tested-by: jenkins
2012-02-16 08:58:06 +00:00
Spencer Oliver
fd39a5e8ad cfg: change default stellaris working area
This sets the default stellaris working area to 2k rather than
the current 8k. 2K is the smallest RAM size in the stellaris family.

Change-Id: I1407f758eb0926cc094b824a6d25199b313c45de
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/458
Tested-by: jenkins
2012-02-16 08:57:22 +00:00
Spencer Oliver
ddb2bb28fa docs: fix texinfo warnings
A period or comma must follow the closing brace of an @xref.

Change-Id: I272f1e7fac8f1fee4844f485b0b8e2e4e9cf352d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/456
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-02-16 08:57:07 +00:00
Spencer Oliver
737a52d7b2 build: fix automake 1.11.2 issues
automake 1.11.2 throws `pkglibdir' is not a legitimate directory for `DATA'
if nobase_dist_pkglib_DATA is used.

We work around this issue by defining our own location.

Change-Id: I3c29e2df0b67e745283c50d358e31699bd60dc74
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/457
Tested-by: jenkins
2012-02-16 08:56:42 +00:00
Jonathan Dumaresq
b0ef9cf117 Add stm32f0x target
Change-Id: I4abfef4459b7e2780d17bdd7623fd1ef797cc8ea
Signed-off-by: Jonathan Dumaresq <jdumaresq@cimeq.qc.ca>
Reviewed-on: http://openocd.zylin.com/437
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-02-16 08:56:18 +00:00
Jonathan Dumaresq
7c4f3b1ff5 Add stm32f0x probe and info working
I used the CPUID instead of adding a new argument to the flash bank command
Fixed Type in comments

Add the failsafe return value in device_id
Change-Id: Ieb5a46fc002b5390a0c81bc8b49f6c687036ae1d
Signed-off-by: Jonathan Dumaresq <jdumaresq@cimeq.qc.ca>
Reviewed-on: http://openocd.zylin.com/438
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-02-16 08:56:03 +00:00
Mathias K
ec73356159 Add bootloader mode.
This patch add the bootloader define.


Change-Id: I280a8a35c3514910dd381de3ab8ad59c9bd74ca1
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/455
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-02-16 08:54:55 +00:00
Spencer Oliver
338f5a1d48 flash: fix incorrect stm32f2x/stm32f4x flash size register
The ref manuals for the stm32f2x (RM0033 Rev4) and stm32f4x (RM0090 rev1)
are unclear to the address of the flash size register (F_ID).

According to contacts @ ST this is the correct address, the manuals will be
updated in due coarse.

Change-Id: If9fb83b3100458d17038cf27c2b23355e1dc5a9e
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/448
Reviewed-by: Peter Stuge <peter@stuge.se>
Tested-by: jenkins
2012-02-13 17:21:24 +00:00
Spencer Oliver
de545ee93a docs: correct small typo
Change-Id: I5e8bea591274b4032d3e04c4be7e9110138d5bc2
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/447
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-02-13 12:34:06 +00:00
Lars Poeschel
87bf0db125 add icnova_sam9g45_sodimm support
This adds support for in-circuit icnova sam9g45 sodimm: http://www.ic-board.de/product_info.php?info=p214_ICnova-SAM9G45-SODIMM.html|ICnova
The NAND flash is not yet working.

Change-Id: I94ca5203f8d8a55dec1e4e87cd0631bd2b8393f9
Signed-off-by: lars@kiwigrid.com
Reviewed-on: http://openocd.zylin.com/418
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-02-13 12:04:00 +00:00
James Robinson
5d43ffd5bc topic: Add support for i.MX28EVK
Added the file imx28.cfg to the target directory
Added the file imx28evk.cfg to the board directory

Change-Id: I02a74a03f3773892f830d13660ffdded34f3261d
Signed-off-by: James Robinson <jmr13031@gmail.com>
Reviewed-on: http://openocd.zylin.com/428
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-02-13 12:03:26 +00:00
Freddie Chopin
7d48be5bd3 Add init_board documentation
This patch adds init_board concept information to OpenOCD manual.
Additionally a link from init_targets chapter to new chapter about
init_board is added.

Change-Id: I09b9aaa1cf68b94f35701224f641cae9811a5bcf
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/440
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-02-13 11:06:55 +00:00
Spencer Oliver
5bcb78f181 cfg: add revb ek-lm3s811 board config
Add board config for older (revb) ek-lm3s811

Change-Id: I75aca1714de3e88b60d00fa0f99f2c4b076b569c
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/444
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-02-10 16:59:06 +00:00
Spencer Oliver
60c2ea144b cfg: fix incorrect STM32L SW-DP id
STM32L ref manual (RM00038 Rev5) states the SW-DP id should be 0x4ba00477.
The correct value from silicon is 0x2ba01477 - the typo has been confirmed by ST.

Change-Id: Ie35a1f13dc5dedc1b148fb219c6974bfa48b537c
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/441
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-02-10 14:24:00 +00:00
Spencer Oliver
19edcec872 cfg: add stm32ldiscovery board config
Change-Id: I392fdc4c588783fda1c7d4d6413b86ae9aa3f6b9
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/442
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-02-10 14:23:45 +00:00
Spencer Oliver
d608dcaa62 cfg: add ST-LINK TRANSPORT config override
This enables the user to override the transport used for st-link.
If JTAG is selected it will also change the default id used to the JTAG id
rather than the SW-DP id.

Change-Id: I4fe352e4932e2f4ec278168e99ba2d2d50fd850a
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/443
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-02-10 14:23:09 +00:00
Freddie Chopin
4db24acb93 Add init_board procedure executed after init_targets
This adds init_board procedure that behaves exactly the same as
init_targets - it can be overriden by "next level" scripts. This
procedure is executed after init_targets, allowing common stuff (jtag
chain, memory, flash, ...) to be configured in target script (via
init_target) and leaving rest (like additional memory, reset
configuration, reset-init handlers, ...) to be done in init_board.

This makes init_targets scheme more complete and easier to use - current
board scripts will not need new init_targets, because everything can be
"packed" in init_boards. Moreover it solves the problem of variables
being set in init_targets (executed after init), which were not
accessible by "linear" scripts (parsed before init). All that has to be
done is to enclose all code in board config file in init_board
procedure.

Change-Id: I0736b1ff9873a687966407d62b58ccf29a8e597b
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/427
Reviewed-by: Chris Morgan <chmorgan@gmail.com>
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-02-09 18:09:02 +00:00
Freddie Chopin
394dcc8e34 Add missing init_targets documentation
Add init_targets procedure documentation to OpenOCD manual explaining
the concept.

Change-Id: I82933ed90397cbcdc5c72801182573ca69b1d265
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/439
Reviewed-by: Chris Morgan <chmorgan@gmail.com>
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-02-09 18:07:22 +00:00
Spencer Oliver
f86986a9ef cfg: add stm32vldiscovery board config
Change-Id: I6343d1e61153ba71c71f8a473171972abb8e400d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/432
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-02-07 22:39:04 +00:00
Spencer Oliver
dbbe2a5388 docs: add original stlink (STLINK-V1) usage note
Add a note to the docs about the original stlink being broken under linux.

Change-Id: Ib440d78e5c7d31eeace99f611a76fcf701bfb8bc
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/433
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-02-07 22:38:33 +00:00
Freddie Chopin
4291873994 Export _TARGETNAME from generic LPC2xxx script
Make _TARGETNAME variable global so it could be used by scripts sourcing it.

Change-Id: Iaf1c3b53875734658b1b8f136c9bb958988b56bf
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/421
Tested-by: jenkins
Reviewed-by: Chris Morgan <chmorgan@gmail.com>
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-02-07 06:32:33 +00:00
Spencer Oliver
7719e2188e doxygen: use correct comment syntax
This issue was caused by uncrustify not correctly converting the doxygen
comments.

Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Change-Id: Ie6dc3b057a08603b670cb27312e5f0d989426e6c
Reviewed-on: http://openocd.zylin.com/431
Tested-by: jenkins
2012-02-06 12:55:03 +00:00
Spencer Oliver
374127301e build: cleanup src/target directory
Change-Id: Ia055b6d2b5f6449a38afd0539a8c66e7d7e0c059
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/430
Tested-by: jenkins
2012-02-06 11:00:36 +00:00
Spencer Oliver
de0130a0aa build: cleanup src/jtag/drivers directory
Change-Id: I99c08ec0132d5a15250050e718310f1ddd9fe546
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/425
Tested-by: jenkins
2012-02-06 10:59:07 +00:00
Spencer Oliver
2af5b97ba3 checkpatch: remove __packed and __aligned checks
These checks are specific to linux kernel.

Change-Id: Ia9b837b5609922a897822f1d55f96f04c0f1f838
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/424
Tested-by: jenkins
2012-02-06 10:57:55 +00:00
Spencer Oliver
38f8e5eefa build: cleanup src/jtag directory
Change-Id: I7caf57ca3d9dfbe152504472a6bb26c2a28b92e8
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/423
Tested-by: jenkins
2012-02-06 10:57:27 +00:00
Spencer Oliver
3da783f628 checkpatch: increase line length to 120
Change-Id: I963385d0a4880f2b1e55208c8dfe65c1870ac6e1
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/422
Tested-by: jenkins
2012-02-06 10:54:27 +00:00
Spencer Oliver
9f0cba528a build: cleanup src/flash/nor directory
Change-Id: Ic299de969ce566282c055ba4dd8b94892c4c4311
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/420
Tested-by: jenkins
2012-02-06 10:54:14 +00:00
Spencer Oliver
fab0dcd7e6 build: cleanup src/flash/nand directory
Change-Id: I21bb466a35168cf04743f5baafac9fef50d01707
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/419
Tested-by: jenkins
2012-02-06 10:53:08 +00:00
Spencer Oliver
1e9f8836a1 build: cleanup src/flash directory
Change-Id: I33c32a884095cff139546f760bc8fa6586e8c5b0
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/417
Tested-by: jenkins
2012-02-06 10:51:49 +00:00
Spencer Oliver
7b032df3aa build: cleanup src/rtos directory
Change-Id: I24bc62d12409dbfc20a0a986acf6b3f2c913e36d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/416
Tested-by: jenkins
2012-02-06 10:50:26 +00:00
Spencer Oliver
8b00e56e64 build: cleanup src/helper directory
Change-Id: I71a312df783995e9083c345c25e73902d5aef59e
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/415
Tested-by: jenkins
2012-02-06 10:49:52 +00:00
Spencer Oliver
9ad57e96b3 checkpatch: remove volatile check
We may enable this again - but at the moment is causing extra issues
with reformatting the codebase.

Change-Id: I5a2aaaa32ad784e011dff3079ff45501452c1819
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/414
2012-02-06 10:48:42 +00:00
Spencer Oliver
2f6f7c442d checkpatch: remove typedef check
We may enable this again - but at the moment is causing extra issues
with reformatting the codebase.

Change-Id: Ic64310a20605a0ef3206caa15c8e6c8ee655bfda
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/413
Tested-by: jenkins
2012-02-06 10:47:44 +00:00
Spencer Oliver
b48d1f6637 build: cleanup src/server directory
Change-Id: I6410df28c5999f5cbee2d3bcaa02469a29ea4c15
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/412
Tested-by: jenkins
2012-02-06 10:47:01 +00:00
Spencer Oliver
91e054a9ea build: cleanup src/transport directory
Change-Id: If73da1a7272602314f042c3e3c0e61050530998d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/411
Tested-by: jenkins
2012-02-06 10:46:16 +00:00
Spencer Oliver
f7772ccb49 build: cleanup src/xsvf directory
Change-Id: I5325980b240fba841d8cce81985f4da369ad9052
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/410
Tested-by: jenkins
2012-02-06 10:45:43 +00:00
Spencer Oliver
e3b114e285 build: cleanup src/svf directory
Change-Id: If9186964e2597f8ca1f01885fc28418df7d92964
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/409
Tested-by: jenkins
2012-02-06 10:43:34 +00:00
Spencer Oliver
c4f2a018a5 build: cleanup src/pld directory
Change-Id: I9edb027c76e5d7fe21d557a11e6a9691fa581e86
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/408
Tested-by: jenkins
2012-02-06 10:42:40 +00:00
Spencer Oliver
250dc58056 build: cleanup src/ directory
Change-Id: Ia6ed99ce75625ad6ef5e0d3c3bbdc1c1bec21df3
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/407
Tested-by: jenkins
2012-02-06 10:41:23 +00:00
Spencer Oliver
dd4247dba5 build: update uncrustify config
This config has been updated for 0.59

Change-Id: If0dc87dd5de052c1228743a196a3198dbd4bc279
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/406
Tested-by: jenkins
2012-02-06 10:40:25 +00:00
Mathias K
bce7009e31 STLINK: add check for the supported jtag API version
This patch add a validation for the supported jtag api version.

Change-Id: I0b51350e58e351d6662f4039c0a9e9d0d79ba4ec
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/405
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-01-30 20:17:04 +00:00
Andreas Fritiofson
81b4ef6ee5 stm32f1x: fix bug in flash loader and restrict instruction set to armv6-m
Correct the offset to the read pointer when clearing it on error.

Also restrict the instruction set to armv6-m so the flash driver can be
used on Cortex-M0 parts with the same flash controller.

Change-Id: I380f9dabcc41fb6e4d43a7e02f355e2381913f39
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/399
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Jonathan Dumaresq <jdumaresq@cimeq.qc.ca>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-01-30 20:01:42 +00:00
Andreas Fritiofson
61f3d4b7e4 target: increase chunk size in dump_image
Replace the big stack-allocated buffer with a much bigger heap-allocated.
There was no explanation for the apparently arbitrary chunk size, and
performance was improved by increasing it, leveling out at about 4k.

Change-Id: I3b06d4469092ec8d89d0ce05bff0b7cf213c5062
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/404
Tested-by: jenkins
Reviewed-by: Marti Bolivar <mbolivar@leaflabs.com>
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-01-30 19:09:53 +00:00
Mathias K
fce4ac5714 STLINK: add stlink v1 configuration
Change-Id: I6b9de16879ff928d60e3c4a64731449275291cc2
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/397
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-01-27 19:25:58 +00:00
Mathias K
571db43791 STLINK: Test device version (v1/v2) on usb transfers and add sg support
This patch test the device version and differentiate between
v1 and v2 devices.

Change-Id: Ie79bf2c5534211493b004329fb6d5b9d4ea5453b
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/396
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-01-27 19:25:41 +00:00
Mathias K
6bbb1479b3 STLINK: swd transport renamed and jtag+swim transport added
This patch add jtag support to the stlink driver add
two new transport types, JTAG and SWIM.

Change-Id: I7089d74250330be5c6a01c24066307641df7d11e
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/393
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-01-27 19:25:26 +00:00
Spencer Oliver
f2ee4eff73 cfg: correct Stellaris LM3S811 config typo
This only effects the older Stellaris LM3S811 kits (rev B and below).

Change-Id: Ie068cce7748fede9e7113ea63a69c96222c809fa
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/401
Tested-by: jenkins
2012-01-27 19:24:36 +00:00
Spencer Oliver
1340f952a7 flash: fix stellaris class regression
for some reason the following commit was incorrect
769064de4b

Only the Sandstorm and Fury class should write this register.

Change-Id: Ie18f1da6e9b59fb99cca47aa93c7f2fee447ccea
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/400
Tested-by: jenkins
2012-01-27 19:24:19 +00:00
Spencer Oliver
15f546e92f stlink: add missing memory check handlers
Change-Id: I502575ab77c0c87ffebb56ec3d78905f7fcf7cc5
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/398
Tested-by: jenkins
2012-01-27 19:23:57 +00:00
Fujitsu FM3 Application Team
9663ee3243 flash: cleanup/reformat fm3 flash driver
Signed-off-by: Fujitsu FM3 Application Team <openocd.fseu@de.fujitsu.com>
Change-Id: Iaf0bacfa5438a0213a65a3d60e7d461965a5a1ac
Reviewed-on: http://openocd.zylin.com/249
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-01-23 11:48:13 +00:00
Timo Ketola
f50ca7c184 NAND: Misleading report of erased blocks
For example, when blocks 2 and 3 were erased, openocd reported "erased blocks 2 to 4". That should be "2 to 3", I think.

Change-Id: Icece63dedd3dd931b70fa73616819a19572e39de
Signed-off-by: Timo Ketola <timo@exertus.fi>
Reviewed-on: http://openocd.zylin.com/385
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-01-23 11:47:06 +00:00
Timo Ketola
3c63eff2d9 i.MX25: Set OOB size (MXC NFC)
SPAS register (OOB size) is left wrong after reset with respect to 2KiB page NAND chip. That will lead to ECC errors after 'reset halt'.

Change-Id: If5a4685cb8d6be35879453951611ef1059da219c
Signed-off-by: Timo Ketola <timo@exertus.fi>
Reviewed-on: http://openocd.zylin.com/384
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-01-23 11:46:43 +00:00
Timo Ketola
536ca77e38 i.MX25: Add support for i.MX25 NAND Flash Controller
This patch is based on Erik Ahlén's work on i.MX35 NFC support. Basically it redefines the CCM.RCSR register which is in a different address in i.MX25.

Change-Id: Ia6faf9cb5efae5e564b72ef9a9b7c7f8bfde3ce0
Signed-off-by: Timo Ketola <timo@exertus.fi>
Reviewed-on: http://openocd.zylin.com/383
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-01-23 11:46:10 +00:00
Spencer Oliver
a559f8a791 cfg: add missing Stellaris Blizzard info
Change-Id: I1d6fb9a2ec8d87267a266f68c01ce032450e45d5
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/392
Tested-by: jenkins
2012-01-23 11:44:50 +00:00
Spencer Oliver
769064de4b flash: update stellaris_set_flash_timing for target class
stellaris_set_flash_timing should only be used for Sandstorm and Fury
device classes.

Change-Id: Ib5eff9d954c039f2c5726a8ecc3ee45d1694cfd3
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/389
Tested-by: jenkins
2012-01-23 11:41:49 +00:00
Spencer Oliver
8959fccc19 flash: cleanup stellaris device class detection
read the target class during probe and save for later use.

Change-Id: Ib3ad20edc7d206b7f434bdcc6b947e6a5f06dd1f
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/388
Tested-by: jenkins
2012-01-23 11:41:26 +00:00
Spencer Oliver
7f1ab30b88 stlink: better handle target reset/events
This makes the stlink target use the std armv7m_arch_state giving
consistent OpenOCD output.

Added debug entry handler so we get debug entry reason.

Change-Id: Ia3c1380fd5033a8e541b0d45a7c3559f1b05957d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/379
Tested-by: jenkins
2012-01-23 11:40:39 +00:00
Spencer Oliver
c527882121 stlink: enable cortex special reg writes
Change-Id: I5aa02e8de6dd5ac5a6ca628ba4068decb200c689
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/378
Tested-by: jenkins
2012-01-23 11:39:07 +00:00
Spencer Oliver
3a550e5b5f cleanup: rename armv4_5 to arm for readability
Nothing more than a name change, just to make reading
the code a bit simpler.

Change-Id: I73a16b7302b48ce07d9688162955aae71d11eb45
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/390
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-01-23 11:38:26 +00:00
Spencer Oliver
9db465810a flash: print bank usage on failure
This makes use of the newly introduced usage field in the flash bank
structure.

Also remove the assertion if usage field is null and
lets print a DEBUG_LOG message instead.

Change-Id: I384bf0e2c444fcc99deef73aec9ef01149a91c76
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/391
Tested-by: jenkins
2012-01-23 11:29:52 +00:00
Spencer Oliver
23ece85f33 flash: add missing stellaris device classes
This adds missing classes to the stellaris flash driver.

Change-Id: I90f2218479e5eb60950046fef04429b9529f7ddf
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/382
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-01-18 21:46:48 +00:00
Timo Ketola
28b1fbd5ee doc: Update patch procedure
Change-Id: I3e50357b4ddaf483712bbac68b6427b31529f666
Signed-off-by: Timo Ketola <timo@exertus.fi>
Reviewed-on: http://openocd.zylin.com/387
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-01-18 21:46:15 +00:00
Spencer Oliver
3528457ba8 target: move regmaps to armv7m.c
This move will enable use to share with regmaps with the stlink target.

Change-Id: If8f41c7c53323d5074cb22ec3440530c1e402004
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/377
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-01-18 21:45:42 +00:00
Spencer Oliver
0c2f8b6eb8 cmd: add missing usage vars
we should have caught them all - hopefully.

Change-Id: I35435317fccaf5ad0216244d69f76db6857bb582
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/381
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-01-18 21:45:02 +00:00
Spencer Oliver
eae6353ca4 build: fix broken make distcheck
0a4b27ec4b commit forgot to update required
distcheck files.

Change-Id: I3a5b94d4548c02cb9c1fc371a6fdcc2a3854e9c7
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/380
Tested-by: jenkins
2012-01-16 09:28:01 +00:00
Michel JAOUEN
c25ffd013e u8500: linux rtos config
Change-Id: I21a9dcc5fb260095aed2217e467b74ebecb39afb
Signed-off-by: Michel JAOUEN <michel.jaouen@stericsson.com>
Reviewed-on: http://openocd.zylin.com/349
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-01-15 22:17:42 +00:00
Michel JAOUEN
0a4b27ec4b rtos : linux awareness
Change-Id: I41294ccaa4a3cd253919c8b1b558205903bcb695
Signed-off-by: Michel JAOUEN <michel.jaouen@stericsson.com>
Reviewed-on: http://openocd.zylin.com/348
Tested-by: jenkins
Reviewed-by: Heythem Bouhaja <heythem.bouhaja-nonst@stericsson.com>
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-01-15 22:17:16 +00:00
Michel JAOUEN
433ca26f1a rtos : create qsymbol interface and add str_to_hex interface
Change-Id: I1b26f7efd3ad4a060f772dd12408e77a03d93cea
Signed-off-by: Michel JAOUEN <michel.jaouen@stericsson.com>
Reviewed-on: http://openocd.zylin.com/347
Tested-by: jenkins
Reviewed-by: Evan Hunter <evan@ozhiker.com>
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-01-15 22:15:22 +00:00
Michel JAOUEN
885341a2db rtos : receive reset info
Change-Id: I03c64f50eed9bec43303bf47ac1f226a0e8dbd53
Signed-off-by: Michel JAOUEN <michel.jaouen@stericsson.com>
Reviewed-on: http://openocd.zylin.com/346
Tested-by: jenkins
Reviewed-by: Evan Hunter <evan@ozhiker.com>
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-01-15 22:14:10 +00:00
Michel JAOUEN
2bc51d1abc rtos : ps command
Change-Id: I1b00b6d72f425826c33b0df7dd63114ce642ce93
Signed-off-by: Michel JAOUEN <michel.jaouen@stericsson.com>
Reviewed-on: http://openocd.zylin.com/345
Tested-by: jenkins
Reviewed-by: Evan Hunter <evan@ozhiker.com>
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-01-15 22:13:03 +00:00
Michel JAOUEN
ebac7c963a rtos : smp support
Change-Id: I583cddf5e62ed77f108786a085569ab8699ad50d
Signed-off-by: Michel JAOUEN <michel.jaouen@stericsson.com>
Reviewed-on: http://openocd.zylin.com/344
Tested-by: jenkins
Reviewed-by: Evan Hunter <evan@ozhiker.com>
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-01-15 22:11:48 +00:00
Michel JAOUEN
ff3028ce1b rtos : current_threadid move to rtos context
Change-Id: I49d9d6d64c418be601d8723cb3eea9c3716ecb6b
Signed-off-by: Michel JAOUEN <michel.jaouen@stericsson.com>
Reviewed-on: http://openocd.zylin.com/343
Tested-by: jenkins
Reviewed-by: Evan Hunter <evan@ozhiker.com>
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-01-15 22:09:27 +00:00
Michel JAOUEN
1db60b9c43 rtos :introduce possible overload by rtos of gdb_thread_packet
Change-Id: I17381b581556fa75098a84699dbbf69423fe20eb
Signed-off-by: Michel JAOUEN <michel.jaouen@stericsson.com>
Reviewed-on: http://openocd.zylin.com/342
Tested-by: jenkins
Reviewed-by: Evan Hunter <evan@ozhiker.com>
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-01-15 22:08:42 +00:00
Michel JAOUEN
ca173ff4d4 rtos : remove unused parameter
Change-Id: I98c9f28a0085bd4713b694181ab544777091eac6
Signed-off-by: Michel JAOUEN <michel.jaouen@stericsson.com>
Reviewed-on: http://openocd.zylin.com/341
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-01-15 22:07:24 +00:00
John
fa5b0833d5 cfg: fix typo in str730.cfg
Change-Id: Ie0222b68b3d8dd21726ac4f0cd4106da0e0456dd
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/376
Reviewed-by: Peter Stuge <peter@stuge.se>
Tested-by: jenkins
2012-01-13 10:25:36 +00:00
Mathias K
c46cbe3aa7 stlink: handle wrong initialization file if no layout was specified
This patch remove the hardcoded default layout and return an error
if no layout was specified in the configuration file.

Change-Id: I0e7833faa2dc194e727122840bcbdacd321cc4fd
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/369
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-01-12 22:32:21 +00:00
Mathias K
c2ab3b4d5e stlink: add none 32bit memory read/write functions
This patch add none 32bit memory read/write  functions.

Change-Id: Ie3a761cf006249b30d0691d1ea167d69a012c36a
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/367
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-01-12 22:31:42 +00:00
Mathias K
37b575367b stlink: add read/write 8bit memory
This patch add layout api funtions and implementation
to read/write 8bit memory.

Change-Id: I8d145eb07e5afa9ce1830578e57d80a80d21e7dc
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/366
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-01-12 22:29:46 +00:00
Spencer Oliver
c2c4f440af build: fix broken commit
fixes commit 04fe2ca554

Change-Id: Id7fcb82fa1a445f1df21b8d98e945f7c0e08ec93
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/375
Tested-by: jenkins
2012-01-12 22:27:52 +00:00
Spencer Oliver
aa29f083a7 stlink: correctly signal stlink_interface_open failure
give the user a error msg on open failure.

Change-Id: If4a57bac7f3e1746c2a05c7a96747a38da188041
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/368
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
2012-01-12 20:46:53 +00:00
Spencer Oliver
0cccdde3c7 flash: stm32f2x incorrectly using 512 as max family size
Change-Id: I2bac348c6d0baabd3d88335c5aa0a318ef66653a
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/353
Tested-by: jenkins
2012-01-12 20:46:17 +00:00
Spencer Oliver
04fe2ca554 flash: detect stm32f4x device id errata
This allows us to detect a device arrata where the device id returned is
incorrect.

This issue only effects stm32f4x Rev A silicon.

Change-Id: Ic9f4985f9abf562f97322dcf484199f0a4eb01bb
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/354
Tested-by: jenkins
2012-01-12 20:45:36 +00:00
Spencer Oliver
2a34cc8eb6 cmd: add missing usage var
Change-Id: I0f05d643b0801b19cc3beb88f0d12d7e4c83ef9c
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/356
Tested-by: jenkins
2012-01-12 20:45:01 +00:00
Spencer Oliver
0aefdbd446 stlink: add dummy speed handlers
Change-Id: I0445be7867637728145941b06225dc0acc5380e8
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/355
Tested-by: jenkins
2012-01-12 20:43:48 +00:00
Spencer Oliver
ad0847ca38 flash: use correct device_id mask
The stm32 drivers have been using 0x7ff as the DEV_ID mask, this should
have been 0xfff.

Change-Id: I232469620969d6dd1b9a2a2aa15ec18b947dbb05
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/352
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-01-12 20:42:40 +00:00
Mathias K
afe95871c5 optimize: replace while loop by memcpy
There is no need to use a while loop here. This patch simple copy
the last bytes with the system function.

Change-Id: Ibda72dca449746efeba5a1af2e45c5990f9cf347
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/364
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-01-12 20:41:51 +00:00
Spencer Oliver
5f83378a9c build: remove unused variables
detected by clang.

Change-Id: Id9effcc5437870f37fecd33803f7753c6eca53d6
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/361
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
2012-01-12 20:40:26 +00:00
Bruno FLEURETTE
32d3063cf5 flash: pre-check flash unlock for stm32f2x
add checking of the current flash lock status before performing the unlock sequence (which would fail in an unlocked state)

Change-Id: I693294c9cd2f59e69cb5bf3338120052fd680b1e
Signed-off-by: Bruno FLEURETTE <bruno.fleurette@gmail.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/363
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
2012-01-12 20:39:41 +00:00
Spencer Oliver
06d1580ff7 xsvf: fix clang warning
clang reports 'Function call argument is an uninitialized value'.

Change-Id: I50f4a7932b59930a5f1e3ece70b12c59e85ea3c6
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/360
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-01-12 20:38:51 +00:00
Spencer Oliver
cd22bedf6f target: fix missing semihosting return path
bug nicely caught by clang.

Change-Id: I7abf0fdd76666fb3eb1c83e3edfd01e0da485ffe
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/359
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-01-12 20:38:24 +00:00
Spencer Oliver
80df024c80 flash: support stm32f4x flash
This uses the same controller as the stm32f2x family.

Change-Id: I931a9ceb0cd1219514d14b8b59475179e543dd0f
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/338
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
2012-01-09 09:50:10 +00:00
Spencer Oliver
e024bcc3d9 flash: use stm32f2x flash size register
Use the flash size register to calculate flash info.

Change-Id: Ia230db8a08d440710c030a9e5001f20561c9f420
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/337
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
2012-01-09 09:49:54 +00:00
Spencer Oliver
a77ba6a8b4 docs: add initial st-link info
Change-Id: I213bf26dec582fd8e273e604d43a6e849599dd50
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/340
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
2012-01-09 09:49:33 +00:00
Spencer Oliver
63c4af0104 contrib: add stlink udev rules
Change-Id: I3f11de8abfaf8821311a7aa0fd237006de3c2792
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/333
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
2012-01-09 09:49:16 +00:00
Spencer Oliver
327fafc6a2 cfg: add stlink pseudo stm32 targets
Change-Id: I71253c2090162b1214bbbb37396735bb9128f920
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/334
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-01-09 09:49:01 +00:00
Spencer Oliver
51f06253ad cfg: use consistent chipname
Change-Id: I41e0788f830d5ece13e6231a99d5b4013c9c678f
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/331
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-01-09 09:48:34 +00:00
Spencer Oliver
c3beb69c47 docs: fix doxygen build
This fixes issues with newer versions of doxygen

Change-Id: Id5d3287857cb154e26064b4ce37f6b72117d5254
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/350
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-01-09 09:48:01 +00:00
Øyvind Harboe
3cbed17e18 rtos: fix bug in error handling
checking for != ERROR_FAIL is broken.

Change-Id: Id7085afac653bb9c38d08928227a9ea402d8e6e9
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/351
Tested-by: jenkins
Reviewed-by: Michel JAOUEN <michel.jaouen@stericsson.com>
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-01-09 08:58:24 +00:00
Spencer Oliver
e8b094b846 docs: whitespace fixes
Change-Id: I9c6c7017ce3077bb131a05ea9b53a115506c94d9
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/339
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-01-07 16:37:56 +00:00
Mathias K
16b6b5e7a8 Change return value on error.
On wrong parameters a error is signalized to the calling function.

Change-Id: I484443fdb39938e20382edc9246d5ec546a5c960
Signed-off-by: Mathias K <kesmtp@freenet.de>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/282
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-01-04 17:56:46 +00:00
Spencer Oliver
42cb62cf3b stlink: update to use ERROR_COMMAND_SYNTAX_ERROR
Change-Id: I21b669b09df65b56659d2f057cf389ba7b1cecfa
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/335
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Tested-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-01-04 17:32:37 +00:00
Øyvind Harboe
ae7ab8b09d flash: introduce .usage field for nand and nor flash driver structure
Change-Id: I47e7ec8fa8c70d2addc3aa52d7c97e9e1e7bb662
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/301
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-01-04 17:15:03 +00:00
Øyvind Harboe
4668bd264c retire ERROR_INVALID_ARGUMENTS and replace with ERROR_COMMAND_SYNTAX_ERROR
Change-Id: I6dee51e1fab1944085391f274a343cdb9014c7a4
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/300
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-01-04 17:13:46 +00:00
Mathias K
54d6330b78 command: print BUG warning when usage is missing
These error messages will prompt patches to be submitted for missing
.usage or empty fields. All of the below must be resolved before next
release.

The Jim defined commands are excluded from this checklist because the
help text can be set later than during command registration.

strlen(.usage) == 0 means that the command expects no arguments.

Updates to this patch in Gerrit to fix problems below are most
welcome. Anyone can push updated versions of a patch to Gerrit. If
there are no further updates to this patch within a week, it will be
pushed to the master branch to prompt more fixes.

These were caught by launching OpenOCD.

Error: BUG: command 'command' does not have the '.usage' field filled out
Error: BUG: command 'script' does not have the '.usage' field filled out
Error: BUG: command 'power_restore' does not have the '.usage' field filled out
Error: BUG: command 'srst_deasserted' does not have the '.usage' field filled out
Error: BUG: command 'measure_clk' does not have the '.usage' field filled out
Error: BUG: command 'exit' does not have the '.usage' field filled out
Error: BUG: command 'shutdown' does not have the '.usage' field filled out
Error: BUG: command 'gdb_sync' does not have the '.usage' field filled out
Error: BUG: command 'interface_list' does not have the '.usage' field filled out
Error: BUG: command 'target' does not have the '.usage' field filled out
Error: BUG: command 'target init' does not have the '.usage' field filled out
Error: BUG: command 'flash' does not have the '.usage' field filled out
Error: BUG: command 'flash init' does not have the '.usage' field filled out
Error: BUG: command 'flash banks' does not have the '.usage' field filled out
Error: BUG: command 'nand' does not have the '.usage' field filled out
Error: BUG: command 'nand drivers' does not have the '.usage' field filled out
Error: BUG: command 'nand init' does not have the '.usage' field filled out
Error: BUG: command 'pld' does not have the '.usage' field filled out
Error: BUG: command 'pld init' does not have the '.usage' field filled out
Error: BUG: command 'mflash' does not have the '.usage' field filled out
Error: BUG: command 'mflash init' does not have the '.usage' field filled out
Error: BUG: command 'dummy' does not have the '.usage' field filled out
Error: BUG: command 'dummy foo' does not have the '.usage' field filled out
Error: BUG: command 'scan_chain' does not have the '.usage' field filled out
Error: BUG: command 'jtag' does not have the '.usage' field filled out
Error: BUG: command 'jtag init' does not have the '.usage' field filled out
Error: BUG: command 'arm' does not have the '.usage' field filled out
Error: BUG: command 'arm reg' does not have the '.usage' field filled out
Error: BUG: command 'etm' does not have the '.usage' field filled out
Error: BUG: command 'arm7_9' does not have the '.usage' field filled out
Error: BUG: command 'at91eb40a.cpu' does not have the '.usage' field filled out
Error: BUG: command 'at91eb40a.cpu arm' does not have the '.usage' field filled out
Error: BUG: command 'arm reg' does not have the '.usage' field filled out
Error: BUG: command 'at91eb40a.cpu etm' does not have the '.usage' field filled out
Error: BUG: command 'at91eb40a.cpu arm7_9' does not have the '.usage' field filled out
Error: BUG: command 'target_request' does not have the '.usage' field filled out
^C
oyvind@fierce:~/openocd$ openocd -c "interface dummy" -f board/at91eb40a.cfg 2>&1 | grep -w BUG
Error: BUG: command 'command' does not have the '.usage' field filled out
Error: BUG: command 'script' does not have the '.usage' field filled out
Error: BUG: command 'power_restore' does not have the '.usage' field filled out
Error: BUG: command 'srst_deasserted' does not have the '.usage' field filled out
Error: BUG: command 'measure_clk' does not have the '.usage' field filled out
Error: BUG: command 'exit' does not have the '.usage' field filled out
Error: BUG: command 'shutdown' does not have the '.usage' field filled out
Error: BUG: command 'gdb_sync' does not have the '.usage' field filled out
Error: BUG: command 'interface_list' does not have the '.usage' field filled out
Error: BUG: command 'target' does not have the '.usage' field filled out
Error: BUG: command 'target init' does not have the '.usage' field filled out
Error: BUG: command 'flash' does not have the '.usage' field filled out
Error: BUG: command 'flash init' does not have the '.usage' field filled out
Error: BUG: command 'flash banks' does not have the '.usage' field filled out
Error: BUG: command 'nand' does not have the '.usage' field filled out
Error: BUG: command 'nand drivers' does not have the '.usage' field filled out
Error: BUG: command 'nand init' does not have the '.usage' field filled out
Error: BUG: command 'pld' does not have the '.usage' field filled out
Error: BUG: command 'pld init' does not have the '.usage' field filled out
Error: BUG: command 'mflash' does not have the '.usage' field filled out
Error: BUG: command 'mflash init' does not have the '.usage' field filled out
Error: BUG: command 'dummy' does not have the '.usage' field filled out
Error: BUG: command 'dummy foo' does not have the '.usage' field filled out
Error: BUG: command 'scan_chain' does not have the '.usage' field filled out
Error: BUG: command 'jtag' does not have the '.usage' field filled out
Error: BUG: command 'jtag init' does not have the '.usage' field filled out
Error: BUG: command 'arm' does not have the '.usage' field filled out
Error: BUG: command 'arm reg' does not have the '.usage' field filled out
Error: BUG: command 'etm' does not have the '.usage' field filled out
Error: BUG: command 'arm7_9' does not have the '.usage' field filled out
Error: BUG: command 'at91eb40a.cpu' does not have the '.usage' field filled out
Error: BUG: command 'at91eb40a.cpu arm' does not have the '.usage' field filled out
Error: BUG: command 'arm reg' does not have the '.usage' field filled out
Error: BUG: command 'at91eb40a.cpu etm' does not have the '.usage' field filled out
Error: BUG: command 'at91eb40a.cpu arm7_9' does not have the '.usage' field filled out
Error: BUG: command 'target_request' does not have the '.usage' field filled out

Change-Id: I2c3e529530a15d2295a1950ffc59e8f2fc661012
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/299
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-01-04 17:13:03 +00:00
Spencer Oliver
59cd1c892d build: fix make dist
add missing files to distribution after previous commit.

Change-Id: I0e4b278c090c71d15dd059b6755c9821427cc8ab
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/332
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
2012-01-04 17:12:36 +00:00
Mathias K
c479f9b50f Add STM32F2X/STLINK target config file.
Change-Id: I02161fa05da993b5b966c31a706667d1bd91935d
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/287
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-01-03 21:13:05 +00:00
Mathias K
725e7e6aa7 Add STLINK/V2 interface config file.
Change-Id: I6df27ce619a5938ef854ff89bf76c6de4e122204
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/286
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-01-03 21:12:48 +00:00
Mathias K
033d1053ae STM32 ST-LINK target initial release
STM32 ST-LINK target  added.

Change-Id: Ibe2b7a3c0d5a8cf73d8680d6019adbdb62d68fa2
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/279
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-01-03 21:12:37 +00:00
Mathias K
1d75eb25e0 ST-LINK USB initial release
ST-Link USB support added.

Change-Id: I2812646f2895b1529ff3f911edbdce7fa0051c8f
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/261
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-01-03 21:12:24 +00:00
Mathias K
1d873623a0 Make jim functions public accessible.
Change this 2 functions to make it accessible for other tcl interfaces.

Change-Id: Idee07fcc779941b037a05a40c021e3fb0b1a4a7a
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/277
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-01-03 21:12:06 +00:00
Mathias K
54f820e8d8 Make cortex_m3 functions public accessible.
Change this functions to make it accessible for other
target implementations.

Change-Id: Ib41fc793cfb4de5439af026c2e8b52e7a9507c85
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/278
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-01-03 21:11:51 +00:00
Mathias K
9f89822335 add private data pointer to the tap interface
This will give us the ability to add special data structures and new
interfaces without rewriting the complete jtag engine.

Change-Id: I21a6e1daa96c5f4d111bbb734c7c1fbc2eaee227
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/244
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-01-03 21:11:37 +00:00
Spencer Oliver
4c11906241 helper: fix arm11 help text
This fixes a long standing bug: see Trac #4
Increased help text recursion limit and added LOG_DEBUG so we can
catch future errors like this.

Change-Id: I5fac95c4486eaddaf1e88a27ecb1835168f87711
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/291
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-01-03 09:30:14 +00:00
Spencer Oliver
7e2257663d build: fix mingw build issues
8901fca027 broke the build under mingw, this
fixes that.

Change-Id: I22b91e220dac3b68cc576b65a9f1b8711e64263a
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/298
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-12-31 12:23:55 +00:00
Erik Ahlén
27bcd224b2 Renamed mx2.{c,h} to mxc.{c,h} and added copyright notice
Change-Id: I07a280acdce58b8af4a145cd6beafccbb59f20d7
Signed-off-by: Erik Ahlén <erik.ahlen@avalonenterprise.com>
Reviewed-on: http://openocd.zylin.com/272
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-12-23 10:01:20 +00:00
Erik Ahlén
c402c1166b Documentation for mxc NAND flash controller
Change-Id: I9e552491e8b4737c01e4f8ae2b9a582b6ff2bc5d
Signed-off-by: Erik Ahlén <erik.ahlen@avalonenterprise.com>
Reviewed-on: http://openocd.zylin.com/273
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-12-23 09:43:39 +00:00
Erik Ahlén
8901fca027 Added support for i.MX35 NAND Flash Controller (v2)
Change-Id: I7237ec29792b6a7ee690751fa7e6cba0846d5aa8
Signed-off-by: Erik Ahlén <erik.ahlen@avalonenterprise.com>
Reviewed-on: http://openocd.zylin.com/271
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-12-23 09:40:44 +00:00
Erik Ahlén
a57d547dd7 Added command to enable/disable/query BI-swap for MXC NAND
Change-Id: Ifa3eb739afe0760a974b57c5a17cc3bf7704ba79
Signed-off-by: Erik Ahlén <erik.ahlen@avalonenterprise.com>
Reviewed-on: http://openocd.zylin.com/270
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-12-23 09:40:14 +00:00
Erik Ahlén
583c9b31ab Made BI-swap optional in mxc.
Change-Id: Ibdf3b1e415adcf1fdb38de25fe05da726ef58ca4
Signed-off-by: Erik Ahlén <erik.ahlen@avalonenterprise.com>
Reviewed-on: http://openocd.zylin.com/269
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-12-23 09:39:48 +00:00
Erik Ahlén
684e9674a6 Added board type as a parameter to mx2 NFC as they have different base addresses.
Change-Id: I7bc326e9a8d9f6817f046a7faeebede567c53dd2
Signed-off-by: Erik Ahlén <erik.ahlen@avalonenterprise.com>
Reviewed-on: http://openocd.zylin.com/268
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-12-23 09:39:18 +00:00
Ulf Samuelsson
c6f44bde73 at91sam3XXX.cfg: Configure JTAG clock to 500 kHz.
This affects all configurations including target/at91sam3XXX.cfg

Change-Id: I2c1e1edf0986d30e63f109604a38bf402ded369e
Signed-off-by: Ulf Samuelsson <ulf@emagii.com>
Reviewed-on: http://openocd.zylin.com/292
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-12-23 09:37:28 +00:00
Ulf Samuelsson
77accb2f3d Olimex-ARM-USB-OCD-H: Add udev rule
Change-Id: Ifc9a1f7fa9445e05560c335b5bba3a33caeccc51
Signed-off-by: Ulf Samuelsson <ulf@emagii.com>
Reviewed-on: http://openocd.zylin.com/288
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-12-23 09:36:49 +00:00
Øyvind Harboe
7e3780de15 jtag: only if an in_value storage is provided will the captured IR value be checked
added comments and removed bogus assert.

Change-Id: Ic7aa56570a84834b1265df03d25a47fd11c4d626
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/297
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-12-23 09:31:21 +00:00
Ulf Samuelsson
e1478abc2c git should ignore patches from format-patch
Change-Id: Iafce872fa7559180834532ba80941dec3db7d079
Signed-off-by: Ulf Samuelsson <ulf@emagii.com>
Reviewed-on: http://openocd.zylin.com/295
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-12-22 11:44:00 +00:00
Øyvind Harboe
115f5380ff jtag: stop using sharp corner of JTAG API
this particular edge case of the JTAG API will no
longer be supported.

the in_value buffer must be provided by the caller when
the callback needs the buffer.

Change-Id: I552c72a64af6875f4aa4fa9b923194dcf3b57b64
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/265
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-12-20 16:57:58 +00:00
Øyvind Harboe
a30a4f0fc7 jtag: make caller always allocate buffer
simplifies the API and there is only one remaining user at this point.

Is the implementation busted where the check does not actually happen
now?

Change-Id: I776a43766f5576a08df320f6fe41a2750d101bde
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/264
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-12-20 16:57:34 +00:00
Øyvind Harboe
cb90d32e38 jtag: retire jtag_alloc_in_value32
no longer used after arm7/9tdmi.c stopped using it.

Change-Id: I65bfe67641970e63e8276cbd378aa68f5701a8d9
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/263
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-12-20 16:56:52 +00:00
Øyvind Harboe
991ed5a2b6 jtag: retire jtag_alloc_in_value32 API
not needed, reduce area of interface and sharp edges to
API.

Change-Id: I5347352e7595686634bd0de13fcf6de6e55027b0
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/262
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-12-20 16:56:16 +00:00
Mathias K
c132304ee9 STM32F2x: check flash unlock, add mass erase
Add verification of the flash unlock sequence and return an error if the
flash is still locked.
Add mass erase subcommand.

Change-Id: Id586b1eaf983a3f25b933847dd6608c15bf0b07e
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/281
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-12-19 12:39:42 +00:00
Spencer Oliver
73e3ea47aa build: libusb use AC_CHECK_HEADER
use AC_CHECK_HEADER rather than AC_CHECK_HEADERS so that we do not
generate a unrequired HAVE_LIBUSB_1_0_LIBUSB_H define.

Change-Id: I23a93d3813716dce797ca1514fdcb84533454c31
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/259
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
2011-12-19 12:36:31 +00:00
Spencer Oliver
55fd943c15 build: update to using new AC_OUTPUT macro
Change-Id: I4937fac73345a85fcad62a2aeb0a106bd4a62467
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/258
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
2011-12-19 12:36:18 +00:00
Spencer Oliver
7da1f2bbbc build: correctly quote m4 parameters
Change-Id: If7ccb52c107cb4ad7629ffcf237f9003f60e63d0
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/257
Tested-by: jenkins
2011-12-19 12:36:06 +00:00
Erik Ahlén
46cc1df722 Renamed mx2/imx27 to mxc.
Renamed all functions, enums, structs and defines from mx2/imx27 to mxc. This is in preparation of adding support for mx35 NFC(v2).

Change-Id: I92ad23f0cfab605215bbf0d5846c5c288423facf
Signed-off-by: Erik Ahlén <erik.ahlen@avalonenterprise.com>
Reviewed-on: http://openocd.zylin.com/267
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-12-19 07:27:31 +00:00
Erik Ahlén
c10a315f91 Indentation and white space fixes.
Change-Id: Iffbaefea4f3d5e9b56b3c36496b44969d7c07e82
Signed-off-by: Erik Ahlén <erik.ahlen@avalonenterprise.com>
Reviewed-on: http://openocd.zylin.com/266
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-12-19 07:26:46 +00:00
Mathias K
886ea0b914 Initialize return value.
Because no future error checking we will initialize the pointer to
a know value.

Change-Id: I2466eeb413245a398927ec9f3742c2a9a3d51baf
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/283
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-12-16 11:25:56 +00:00
Spencer Oliver
667d510dab checkpatch: fix false indent trigger
we have changed the indent to 4 to match OpenOCD coding style.

Change-Id: I4870a3410eb20fc2f6df6a3e5891d4d4e598131a
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/285
Tested-by: jenkins
2011-12-16 11:10:47 +00:00
Spencer Oliver
09571d62bc checkpatch: disable extern and switch indent checks
We allow extern's in c files so disable checkpatch checks.

Change-Id: Ia649585cd70ec45289c4edaf26c1fd773a140db4
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/284
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-12-16 10:39:43 +00:00
Erik Ahlén
164450a015 Change checkpatch.pl tab expanding to 4 characters.
The C coding style guide says that tab width is 4 characters but checkpatch.pl expands tabs to 8 characters which produces false negatives.

Change-Id: Ibdabbb55269b7cf6bcd38042cccb8bd235e42ce2
Signed-off-by: Erik Ahlén <erik.ahlen@avalonenterprise.com>
Reviewed-on: http://openocd.zylin.com/275
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-12-16 09:39:23 +00:00
Dean Glazeski
06e731185f Updating FSF Address.
Change-Id: Ic6895b89e8798a3636333dd50a8540eae643719a
Signed-off-by: Dean Glazeski <dnglaze@gmail.com>
Reviewed-on: http://openocd.zylin.com/274
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-12-15 11:04:15 +00:00
Øyvind Harboe
230f0e9dc6 zy1000: fix crash in JTAG over TCP/IP
disable asynchronous callbacks and reads as minidriver requires
reads and callbacks to be synchronous.

Could possibly be fixed by some design work.

Change-Id: I7ca79a551085b2e8ba6928e1762d1baed6e95d4b
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/260
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Tested-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-12-13 19:00:45 +00:00
Mauro Gamba
e8d1da15c2 jlink libusb-1.0 driver.
jlink modified to use the new usb abstaction layer.
During the configuration process we can select if use
libusb0 or libusb-1.0 library for this driver.

Change-Id: I70bc9ee2f89b7597e0f64ea80cad7f1b9070f01b
Signed-off-by: Mauro Gamba <maurillo71@gmail.com>
Reviewed-on: http://openocd.zylin.com/236
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-12-12 10:03:26 +00:00
Øyvind Harboe
ac4340e391 HACKING: add explanation why we want cool-off times as long as a week or two
Change-Id: I281e9145f43bc7ac173e02c4e209834f0deaae2b
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/254
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-12-12 06:04:39 +00:00
rodrigo_l_rosa
3d0e2547fe dsp5680xx - indent fix
no logic changes, only coding style (spaces to tabs, etc)

Change-Id: I5933447c633990e103bc62d088ca2e12f11f031d
Signed-off-by: rodrigo_l_rosa <rodrigorosa.lg@gmail.com>
Reviewed-on: http://openocd.zylin.com/253
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-12-11 18:40:01 +00:00
Antonio Borneo
b7ce3b5d15 TCL/SPEAr: default one DDR chip
Handle default case of single DDR chip
Propagate global variable for multi DDR chip

Change-Id: I315380f91ee7fcc2976437aa5836d88a7964fc9d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/251
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-12-06 21:06:15 +00:00
Andreas Fritiofson
122509a0dc make checkpatch.sh take an optional 'since' refspec
Change-Id: I793778037db08bd5462f61b9bcafd484708cc1b6
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/250
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-12-06 20:58:02 +00:00
rodrigo_l_rosa
330b0d68c2 HACKING - checkpatch before pushing makes life quicker
Change-Id: I4c3cde2aae7bdea138413e373ac986be3efd54de
Signed-off-by: rodrigo_l_rosa <rodrigorosa.lg@gmail.com>
Reviewed-on: http://openocd.zylin.com/252
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-12-05 08:41:23 +00:00
Spencer Oliver
3ed7e793c8 libusb: Fix build issues under cygwin/mingw
This fixes issues with the folliwing patch under cygwin/mingw builds.
http://openocd.zylin.com/236

Change-Id: I7dd0b2d09cc64568bc99b16aa32e791a8273c5db
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/240
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Mauro Gamba <maurillo71@gmail.com>
2011-12-02 12:26:33 +00:00
Spencer Oliver
3500109fc7 gdb_server: use strndup to allocate debug messages
Lets be consistent and use strndup to allocate the debug buffer.

Change-Id: I535ad270ebfeae6e09d28372ab3749c822971223
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/245
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2011-12-02 12:26:04 +00:00
Spencer Oliver
5165afc005 openocd.c: whitespace cleanup
Change-Id: Ieb8c1e4eb72f66a6343b169a12a058555d67069e
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/242
Tested-by: jenkins
2011-12-02 12:25:17 +00:00
Peter Stuge
d6a1ff8399 Fix remaining incorrect reference to target/at91sam3uXX.cfg
Commit 1794e5ee54 renamed the file to
have all lowercase characters according to most references to the
file, but the commit didn't change the existing reference to the
old filename.

Change-Id: I380e52e947a8091d48cf010e3919bf2caed7fdff
Signed-off-by: Peter Stuge <peter@stuge.se>
Reviewed-on: http://openocd.zylin.com/248
Tested-by: jenkins
2011-12-02 06:37:29 +00:00
Harald Welte
1794e5ee54 make sure file name case of at91sam3uxx matches what other files include
Before this patch, at91sam3u4c.cfg includes "at91sam3uxx.cfg" which
doesn't exist - the filename was at91sam3uXX.

However, many operating systems have case sensitive file names!

Change-Id: I8b2f987f1f4214269b80ef5cba8177ce05ad90b6
Signed-off-by: Harald Welte <laforge@gnumonks.org>
Reviewed-on: http://openocd.zylin.com/247
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-12-01 22:28:33 +00:00
Spencer Oliver
3dde0f47b2 binarybuffer: use strndup to allocate string
Change-Id: I65d8f37b18d5b5a798406b956f50ab7bb550e172
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/246
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2011-12-01 19:11:20 +00:00
James Zhao
4f4acc3669 Fix compile error when _DEBUG_GDB_IO_ is set
Compile error is encountered when _DEBUG_GDB_IO_ is set,
due to duplicate variables.
Fixed by renaming the variable.

Change-Id: I729c06e317fdb899142c9ceaf543b7f580088807
Signed-off-by: James Zhao <jamzhao@gmail.com>
Reviewed-on: http://openocd.zylin.com/243
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-12-01 06:12:00 +00:00
Mathias K
ea54ea5364 target init sanity check
Add a test if the pointer to the target_init function in the target struct
is set before the function pointer is used.

Change-Id: Ie4ea542f64f35efce8c5bce2ced9b881bf283ec1
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/241
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-11-29 14:35:24 +00:00
Evan Hunter
ce3760c7e8 Add stack alignment support to RTOS awareness - needed for ARM ABI processors
Change-Id: I69a2f3d0606a97d48b7738561a85da87f458b82b
Signed-off-by: Evan Hunter <ehunter@broadcom.com>
Reviewed-on: http://openocd.zylin.com/238
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-11-29 13:17:22 +00:00
Evan Hunter
57cb28b484 Fix unused variables error in amt_jtagaccel
Change-Id: Ic64cf4e3b5cf8c1ea75a13577728b0cb0d70068e
Signed-off-by: Evan Hunter <ehunter@broadcom.com>
Reviewed-on: http://openocd.zylin.com/237
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-11-25 06:22:02 +00:00
rodrigo_l_rosa
f80ef64858 dsp5680xx - match page erase with mass erase
when last==first==0 then mass erase is executed, it's faster.
the page marking was wrong in this case.

Change-Id: I5c579d59b5c4778cf057cb5986e086abdd4209b2
Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com>
Reviewed-on: http://openocd.zylin.com/232
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-11-24 23:26:50 +00:00
rodrigo_l_rosa
83be6cfc16 dsp5680xx - flash module clk to freescale cfg value
the flash module clock was set according to a spreadsheet from freescale, now it's set according to the configuration file used by the Freescale Flash Programmer.
both work, but i think it's better to use the one used by a software that's made by Freescale (should be correct...)

Change-Id: I382197a3eb43dd47ff4b9b83d5e05008d5613fc6
Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com>
Reviewed-on: http://openocd.zylin.com/223
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-11-24 23:26:15 +00:00
rodrigo_l_rosa
c725167ba8 dsp5680xx - mark erase after unlocking flash
the unlocking procedure erases the flash mem (even if it wasn't locked), so it should be marked as erased after unlocking.

Change-Id: I5cc6a1e1d6cf4e1f243de532eff54111ffd66187
Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com>
Reviewed-on: http://openocd.zylin.com/222
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-11-24 23:25:57 +00:00
rodrigo_l_rosa
e0c0810a8e dsp5680xx - fix jtag debug request failure handling
if JTAG debug request fails then halting with a reset should be attempted.
the failure was ignored previously.

Change-Id: Ibec08e2e97f962d164a110c21aaa80bfc17b7f1a
Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com>
Reviewed-on: http://openocd.zylin.com/221
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-11-24 23:25:25 +00:00
rodrigo_l_rosa
e2fdb1c864 dsp5680xx - separate debug from halt
i had assumed two possible halt/debug states:
  - halted + debug mode
  - running + not debug mode
turns out this one also exists
  - halted + NOT in debug mode
added code to handle this in an appropiate way.

Change-Id: Ia0ddcd55d1890c90d100a9e6f5e84ed8dda812a3
Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com>
Reviewed-on: http://openocd.zylin.com/220
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-11-24 23:25:09 +00:00
rodrigo_l_rosa
6461f7669a dsp5680xx - fix - flashing algorithm check
now the flash algorithm running on the 568013 checks the buffer_empty bit (instead of the command_finished bit) before trying to write a new word to the flash mem.
this should speed up the flashing procedure. since it is open loop, this change may reduce the risk of failure. flashing will fail if JTAG speed is such that the flash module cannot keep up.

also, the USTAT register is only read once, as suggested in the flow chart provided by freescale (per. ref. manual @ 6-11)

the last step of the flow chart, exiting after commands are complete, is not implemented.
the algorithm will stay waiting for more data. it is up to the PC side to *not* send more data.

Change-Id: I47fe4b50de7da85f80868f5986a89a7e2152616c
Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com>
Reviewed-on: http://openocd.zylin.com/219
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-11-24 23:24:28 +00:00
rodrigo_l_rosa
c460697b62 dsp5680xx - added more error codes
Change-Id: I36962a0ab0cc9d1eb6a29d7e577c24c38cab946b
Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com>
Reviewed-on: http://openocd.zylin.com/218
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-11-24 23:24:04 +00:00
rodrigo_l_rosa
ea16bc578f dsp5680xx - fix jtag status mask
Change-Id: I17a0f22cbeb20e4f6ea4065236243f93d826ccf0
Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com>
Reviewed-on: http://openocd.zylin.com/217
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-11-24 23:23:36 +00:00
rodrigo_l_rosa
e6c3ab9df3 dsp5680xx - relocating code
moved reset_jtag to the top, since it will be needed in future changes.
also send a define to the .h

Change-Id: I53ef9c02ffa70e7d0416364525a6fbfef855e222
Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com>
Reviewed-on: http://openocd.zylin.com/216
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-11-24 23:22:34 +00:00
rodrigo_l_rosa
b9346fbd64 dsp5680xx - error codes
added logging of target error codes to enable automatic error handling from tcl.
the plan is to use a computer to execute a series of tcl commands, the changes allow simple parsing of return messages to detect errors.

Change-Id: Ia98d3bd036e1b6065b475ffff6c1d30baeaf7417
Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com>
Reviewed-on: http://openocd.zylin.com/215
Tested-by: jenkins
Tested-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-11-24 23:21:58 +00:00
Spencer Oliver
b462316699 target: fix init_targets script handling
This fixes an issue when init is called before init_targets has been
executed.

Make sure init_targets is called before init.

Change-Id: Icd5bd4c2a8eea2e399d9de4e331a77560e9672ac
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/235
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2011-11-23 23:51:36 +00:00
Antonio Borneo
17322b729c TCL/SPEAr: fix name of included file
Fix error introduced in recent commit.
Correct the name of the board file.

Change-Id: I46bca8329812fb24bc4f8d316be9e7cba9b56496
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/234
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-22 21:02:55 +00:00
Antonio Borneo
3291edf1e7 TCL: Add board file for EVAL_SPEAr320CPU
Initial support for SPEAr320 chip and for evaluation
board named EVAL_SPEAr320CPU.

Change-Id: I85524655769bcc610294a26db47a7a399256fbb7
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/231
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-21 22:09:47 +00:00
Antonio Borneo
c8f4d82b45 TCL: Add board file for EVALSPEAr300
Initial support for SPEAr300 chip and for evaluation
board named EVALSPEAr300.
Currently supports only those parts in common with
SPEAr310.

Change-Id: I8075aa721cf3dfaac561ee51e5df4ce9a2992e3e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/230
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-21 22:09:09 +00:00
Antonio Borneo
56e64812b8 TCL/SPEAr: remove code to autodetect DDR
The code to autodetect DDR was wrong and not complete.
Replaced with a parameter passed to TCL proc.
Split DDR configuration in the two cases of single and
dual DDR chip, using single chip as default.

Change-Id: If39aa518670398e8e4f207d7db6e812a49743e15
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/229
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-21 22:08:30 +00:00
Antonio Borneo
40d9b24195 TCL/SPEAr: move DDR activation in common code
DDR controller activation should not be in DDR chip
specific code, but in generic DDR controller part.

Change-Id: If1b178228352b48b0097d7b9b300005fb5bb4fb6
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/228
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-21 22:07:50 +00:00
Antonio Borneo
841ee77350 TCL/SPEAr: Join two initialization files.
The support for SPEAr3xx family members does not require
dedicated files for each member.
Join the initialization scripts in a single file.

Change-Id: I45e9dc64809a6f52c4592e3e0eef5529394887c6
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/227
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-21 22:07:19 +00:00
Antonio Borneo
03fc47a79e TCL/SPEAr: move device generic code
The initialization of RAS enable and clock is required by
all SPEAr3xx devices

Change-Id: Iea4cd0902e4da219475d7f35b4c25fc87ec6b902
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/226
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-21 22:05:39 +00:00
Antonio Borneo
c44293b0f8 TCL/SPEAr: move device specific code
The initialization of memory port 1 is required by
SPEAr310 only

Change-Id: I9d655da1026795f02ff2f82aed36441068cf266d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/225
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-21 22:04:46 +00:00
Antonio Borneo
218a4b4e20 TCL/SPEAr: Add reference to ST Application Note
ST-AN was mentioned but there was no reference

Change-Id: Ie065f8faba94d63cf391a994ec895692d499394e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/224
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-21 22:03:17 +00:00
Spencer Oliver
0f41634d4f scripts: use adapter_khz not deprecated jtag_khz
Change-Id: Ibaeebf564a95360dcf21a0921ec99f5263f11915
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/202
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2011-11-18 22:14:55 +00:00
Spencer Oliver
dbf25984cd usbprog: fix shadowed declaration warning
see Trac #38

Change-Id: If86fda797391f10d745384794b68e60380ef0b21
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/204
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2011-11-18 22:13:08 +00:00
Spencer Oliver
e224b64d70 scripts: notify user of deprecated jtag_* functions
Change-Id: Ia97dda6918e20fb29d6e76d43856eede8fcc60dd
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/203
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2011-11-18 22:07:09 +00:00
Mauro Gamba
b302344779 libusb-1.0 support
The configuration script check for libusb-1.0 availability first and only
if not found check for libusb-0. So if both libraries are installed on the
system the build script will use libusb-1.0
It's possible to force compiling with libusb-0 with the --enable-libusb0 switch.
If the driver support only libusb0 the script check anly for it.

Change-Id: I7eb045d4e2bd553abefad53f3f4023ff46b0f5f6
Signed-off-by: Mauro Gamba <maurillo71@gmail.com>
Reviewed-on: http://openocd.zylin.com/33
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-18 17:00:58 +00:00
Spencer Oliver
88ca3aabfb flash: cleanup stm32f2x loader
Change-Id: I89efdc45bcd61ded437d67d4cbee4c53345d4d76
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/197
Tested-by: jenkins
2011-11-18 16:57:23 +00:00
Spencer Oliver
de1fb8c6ac Revert "build: fix gcc 4.6.2 warnings"
This reverts commit 0ef5a90d93c5a026bcf70132e60e957ae339d1e1

Causes older versions of gcc to break - need to look into a better fix.

This passed through the jenkins build as we originally did not build this module - we do now.

Change-Id: Iafeac8442b2249269ff45a52ccd3e2870920f635
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/214
Tested-by: jenkins
2011-11-18 15:16:35 +00:00
Spencer Oliver
e1500a9c9d build: fix gcc 4.6.2 warnings
see trac #47

Change-Id: I48a3e963354dfc82209477672c2508c96fb737d6
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/198
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2011-11-18 13:29:22 +00:00
Robert Pasz
280e1b334a presto: fix tms_sequence short issue
fix issue when using tms_sequence short

see Trac #31

Change-Id: I22a9cd2af59eae4d8a276dae60b6a99d05af53bb
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/201
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2011-11-17 23:14:16 +00:00
Philip Nye
e5e2408680 gdb: Potential rounding error in reg_packet_size gdb_get_registers_packet
The calculation for reg_packet_size in gdb_get_registers_packet() could
generate a wrong result in the case of multiple registers whose size is
not a multiple of 8.

The current calculation sums the sizes for all registers then rounds the result
up to the next multiple of 8.

Instead it should round each register size up individually and sum the results for all registers.

Change-Id: Idfb5e5eeee0e69a6889dbe9769c0bf17feacb63b
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/200
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2011-11-17 23:10:59 +00:00
Philip Nye
950f240519 gdb: fix multi core gdb issue
gdb_memory_map() correctly calculates the target specific number of flash banks, but then uses the total number (all targets) instead of the target specific number to construct its GDB response, causing a crash.

Change-Id: I3f8639b3e90303a59753ebe140ce4fff96fd5db0
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/199
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2011-11-17 23:01:30 +00:00
Spencer Oliver
6eb18b307a contrib: stm32f2x use std naming rules
Change-Id: I109297aa480b3474f1251571cb8e1a0baa1442fd
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/195
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2011-11-17 22:48:52 +00:00
Spencer Oliver
2475e7b14c flash: match stm32f2x loader src name
Change-Id: I60523f809f2d9ec9c9283e0456746ce9a63576a7
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/196
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2011-11-17 22:48:25 +00:00
Tomas Frydrych
f2af5a7b48 configuration for Freescale TWRK60N512 board
Based on the K40/Kwikstik config files

Change-Id: Icb3adc7126bacea65209b712ebaa0eb3b894372e
Signed-off-by: Tomas Frydrych <tomas@sleepfive.com>
Reviewed-on: http://openocd.zylin.com/210
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-17 17:33:28 +00:00
Felix Ruess
78677c6b42 config: do not use deprecated stm32.cfg
Change-Id: Id72d2d7f874043331ecb5586a3797d017606129e
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Signed-off-by: Felix Ruess <felix.ruess@gmail.com>
Reviewed-on: http://openocd.zylin.com/212
Tested-by: jenkins
2011-11-17 17:30:03 +00:00
Andreas Fritiofson
a1f6b6612b stm32f1x: improve variable naming and avoid potential divide-by-zero
Don't call a variable num_pages if it holds the flash size. Also rearrange
flash size to num_pages calculation to avoid divide-by-zero if there will
be a device with < 1024 byte pages someday.

Change-Id: I2febea39694a2f9750de141f52ec88ae1599c086
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/211
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-17 17:28:13 +00:00
Andreas Fritiofson
7af4ec859d bitq: make private functions static
Change-Id: I3fabbdbda4ba8ba6557d79b97444fe06f1710b58
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/209
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-16 23:47:59 +00:00
Andreas Fritiofson
ed13d3d3be bitq: reduce scope of variables
Change-Id: Ie1049b9d8ed5e44aee038e9181e423c35b4263c4
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/208
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-16 23:47:23 +00:00
Andreas Fritiofson
aef1fe6024 bitq: remove the remaining static variables
in_mask and in_idx are just another encoding of the same state information
that is already kept in bitq_in_state.bit_pos so derive them from that
instead of maintaining them separately.

Change-Id: I4ac6bbe923698a8c1090a785b8babcbb90f82931
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/207
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-16 23:46:35 +00:00
Øyvind Harboe
287ba1888b stm32f1x: add more asserts
this at least checks the post conditions after convoluted code.

Change-Id: Idfa8cbedce5288d8bae5743687949f141dfb07b2
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/187
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2011-11-16 23:29:53 +00:00
Andreas Fritiofson
9450da873c bitq: remove a static variable
in_buff is only ever set to field->in_value and that pointer is still
available when the parsing is restarted so it could just as well be used
directly, removing the need for the static variable.

Change-Id: I3dd7a8315ed5c5bdc3bfb74044f89492bca9816c
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/206
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-16 09:22:48 +00:00
Andreas Fritiofson
d31803d3d9 bitq: remove dead code
field->in_value is already checked so it must be non-null here, which means
the else clause can never execute so the entire buffer allocation and
handling code is completely dead.

Change-Id: Id465012a7e607349401d554fc7a8e5db7e967998
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/205
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-16 09:21:58 +00:00
Tomas Frydrych
a17907d106 kinetis flash: use longword write when writing into pflash
Check whether the destination is in the program flash or NVM regions,
in the former case, use the normal longword mechanism, not the fast NVM
write.

Change-Id: I7366b7c8919928ee690252df83b99701776aee82
Signed-off-by: Tomas Frydrych <tomas@sleepfive.com>
Reviewed-on: http://openocd.zylin.com/194
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-15 20:56:17 +00:00
Marek Vasut
ffe969898f Add Tincantools Flyswatter2 support
This is a successor to the Flyswatter cable and is very close to the original.
The new revision is based on FT2232H.

Change-Id: Icc6efcf0e4f9d8a10b65df8679b4973f6b375a9f
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: David Anders <danders@tincantools.com>
Reviewed-on: http://openocd.zylin.com/193
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-15 20:55:11 +00:00
Aurelien Jacobs
67c3ad8c40 at91sam7: ensure probed flash bank has a name (fix a segfault)
Before this commit, openocd used to segfault when probing flash
of an at91sam7x512 (which contains 2 banks of flash). This was due
to the way it systematically insert a new flash bank without setting
its name.
Then, when get_flash_bank_by_name_noprobe() is called, it is doing
a strcmp() on the non-initialized bank->name.

This commit prevents allocation of second probed bank if it is already
allocated (for example, if it is set in a target config file). If a
new bank really needs to be allocated, it ensures that a default name
is set.

Change-Id: I38d15bef1fda2ec746efad37171975136cf7b371
Signed-off-by: Aurelien Jacobs <aurel@gnuage.org>
Reviewed-on: http://openocd.zylin.com/171
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-15 09:27:50 +00:00
Øyvind Harboe
a943ec1ca9 target: make it absolutely clear that no null pointers are accepted
there are no comments about what the rules w.r.t. null pointers
are and it is inconsistent.

It's simply a bug in the app if we ask about the properties of a null
pointer w.r.t. what kind of target it is. It's equally wrong to say
that it is an arm target as that it isn't an arm target.

Change-Id: I0925a6a5c8b38e594ffa7c3ca4390487b5e9b718
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/168
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2011-11-14 23:39:20 +00:00
Øyvind Harboe
9e1a16690e image: remove assignments to local variables that is never read
Change-Id: I1a5e968f165e060fd4aa7c023ad870a9e21bb5dd
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/191
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-10 21:30:15 +00:00
Øyvind Harboe
eac1bc55d2 ft2232: fix warning about assignment to local variable
variable is not read afterwards.

Change-Id: I905bbb10c596190f75494e6c6ad400a3e51843f6
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/192
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-10 21:29:39 +00:00
Øyvind Harboe
fb5422261f svf: fix warnings
Change-Id: Ib7f67612db3a865f9acc5ae349455da7ddcd3348
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/177
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-10 15:43:30 +00:00
Kyle Manna
87552bc1d3 ft2232: Set PWR_RST and LOOPBACK for xds100v2
The CPLD on the xds100v2 expects to see a rising edge on PWR_RST to
enable the outputs.  This patch creates that transition correctly by
fixing the direction register for PWR_RST.

THe CPLD will also loop back the data if the LOOPBACK signal is
asserted.  Set this signal to an output and keep it clear.

This was tested with a TI DM3730 Beagleboard xM.

Change-Id: I4ea216bef6ae5c40e935741af5c69dc844d5d494
Signed-off-by: Kyle Manna <kyle.manna@fuel7.com>
Reviewed-on: http://openocd.zylin.com/189
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-10 15:42:53 +00:00
Spencer Oliver
36cc893086 docs: remove berlios related info
Change-Id: I9593eb165fce51411f20fa068e324b3fd882cdb3
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/190
Tested-by: jenkins
2011-11-10 15:41:59 +00:00
Attila Kinali
4c3a87c28f Work around silicon bug in the SAM3 family flash waitstates
* Add flash waitstate support for Atmel SAM3 chips.
* Set default waitstates to 6, to workaround a silicon bug in the SAM3 family

This code has been tested on SAM3U4, SAM3N4 and SAM3N1

based on Change-Id: I477446f9bfb3e910ea3e2414a6e9a75beb14a214
by Jim Norris <u17263@att.net>

Change-Id: I8d360080f6968979ca5e197ad638282cadd18fb7
Signed-off-by: Attila Kinali <attila@kinali.ch>
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/128
Tested-by: jenkins
2011-11-10 15:41:44 +00:00
Kyle Manna
86e3cd20dd contrib: Add udev rules for TI xds100v2 debugger
This corrects permissions on the FTDI chip on the xds100v2 debugger
enabling normal users to access it.

Change-Id: I0f6618692ebdee6284eee28f9e612e68782c4d78
Signed-off-by: Kyle Manna <kyle.manna@fuel7.com>
Reviewed-on: http://openocd.zylin.com/188
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-09 16:31:36 +00:00
Øyvind Harboe
b472c2f245 at91sam7: fix warnings by removing dead assignments
Change-Id: I836038b3518e617291ac7d5d255a388d9486f67f
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/180
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-09 16:30:55 +00:00
Øyvind Harboe
7d9d056eae buspirate: add missing error propagation
found by clang.

Change-Id: I80ea8e6afc8dcc1aa7edb6f63af0d94f6781b81c
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/182
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-09 16:30:24 +00:00
Øyvind Harboe
86d8ee7fe2 warning fix: remove unused variable assignment
Change-Id: I8c73b0f9a6a10734e539eedcedd79e1a34122f60
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/185
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-09 16:29:10 +00:00
Øyvind Harboe
234f51429e em357: fix warning by removing unused local variables
Change-Id: I9def63d36ed4fa8bf9cdeeedc18b1b25d0e487d6
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/184
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-09 16:27:11 +00:00
Øyvind Harboe
74558296d1 usbprog: fix unecessary and confusing assignment
clang found silly code that was trivially fixed.

Change-Id: Ied6c1b254c1823cd111140cbe0c8a03d2ede65fb
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/186
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2011-11-09 01:58:57 +00:00
Spencer Oliver
e74a081a1a flash: update luminary device table
add support for checking target against the device CLASS rather
then just the PARTNO.

This change also adds the new LM4F family (Blizzard).

Change-Id: Ia9d1e33f1f1c2817c0039a2232ecf932fae072f9
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/161
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-11-08 21:52:17 +00:00
Øyvind Harboe
3558721df7 arm7_9: remove warnings by reducing scope of variables
Change-Id: Idc384b733056a72108680b073da7c327a8eeedc3
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/179
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-08 08:09:15 +00:00
Aurelien Jacobs
ac813a666a at91sam7: add a new target config file for at91sam7x512
The main difference with at91sam7x256 is the declaration of the second
bank of flash.

Change-Id: I87a20dcbb639b797799139ccf46cc73934fa3b9e
Signed-off-by: Aurelien Jacobs <aurel@gnuage.org>
Reviewed-on: http://openocd.zylin.com/173
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-08 08:07:22 +00:00
Øyvind Harboe
6fa4c5a456 disassembly: fix access to undefined memory pointer upon unknown instruction
return error message instead. Found by clang.

Change-Id: Ica109d077206236a12d007e77cc78061ffd05834
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/169
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-07 20:37:11 +00:00
Øyvind Harboe
3bab899063 xsvf: add missing error propagation
Change-Id: Ibc70deb980d6d18ceb376b72d9104e6180b16acf
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/176
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-07 20:35:42 +00:00
Øyvind Harboe
0552c05ee8 dsp5680xx: fix warnings
- propagate error
- remove dead assignment

Change-Id: I0d7078f531d96e421e95f08bfd908e818500d74c
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/170
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-07 20:34:41 +00:00
Øyvind Harboe
d931bb5a05 str9x: explain compiler that a local variable will always be initialized
Change-Id: I9ddb2793b4cdbf6acea6f69973531491e4ebcc5b
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/145
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-07 20:33:17 +00:00
Øyvind Harboe
00c8648351 at91sam3: fix warnings
- reduce scope of variables
- assert on post condition to fix clang warning

Change-Id: Id91038f73a632f9688ba52c9c34eae923626e770
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/160
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-07 20:32:51 +00:00
Øyvind Harboe
4bea65f1b2 str7x: fix error propagation
stick to convention of "retval" being used as error value to
be propagated and use "flash_flags" local variable for flash
flags read from how.

Change-Id: I63f1f2248b4f4538d6cd7634ae277f7c0aadc346
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/178
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-07 20:32:06 +00:00
Uwe Hermann
ca45e700b1 target config files: Fix whitespace issues.
Drop useless double-space occurences, drop trailing whitespace, and fix
some other minor whitespace-related issues.

Change-Id: I6b4c515492e2ee94dc25ef1fe4f51015a4bba8b5
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/137
Tested-by: jenkins
2011-11-07 16:16:33 +00:00
Øyvind Harboe
17b546a900 ecos: add missing error propagation
Change-Id: Ib34815c9cf654517f22486a7c8001fdb7471338c
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/174
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-07 16:14:47 +00:00
Øyvind Harboe
6be4646d17 xscale: cleanup
- fix error propagation
- add some debug output for "unused" variables
- reduce scope of variable to avoid "unread" variables.

Change-Id: I136995f2a043102e64b8fff3017502fae564013b
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/175
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-07 16:13:08 +00:00
Øyvind Harboe
b01e136045 warning fix: add self-consitency check to remove warning
verify promise of code that more code can be pasted with an
assert at the end condition of the code passage that builds
string.

Change-Id: I76a4e5f91b9142fff932e1493cb43c29eb6a0f80
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/143
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-11-05 12:01:30 +00:00
Øyvind Harboe
61699628c8 cfi: fix gaffe in fixing warnings
introduced reading garbage value for arm32.

Change-Id: Ib5792a8a3207ee4db6d01d354df98c3cfabce037
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/162
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-04 22:53:31 +00:00
Spencer Oliver
e875e321f1 tools: fix permissions
Change-Id: I9419138dd2972304daf215594ca917ac8eb7fcda
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-04 10:00:30 +00:00
Spencer Oliver
45570860d0 tools: add checkpatch script
execute from openocd root dir after commiting change but before
pushing to gerrit.
tools/checkpatch.sh

This is the same script used by the jenkins build server to validate
a change.

Change-Id: Ib40d44b160e1c50a5e47ab55fc48a554381ea763
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/167
Tested-by: jenkins
2011-11-04 09:56:22 +00:00
Øyvind Harboe
482e8a2b55 etm: fix warning by removing assignment that is immediately overwritten
Change-Id: Ia3a83d3c1fc3a1707d69017fce6cf142a81babc4
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/165
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-04 09:15:14 +00:00
Øyvind Harboe
ed028542ed cortex_m: initialize unused CPU variables to 0 for poll info output
fixes warnings.

Change-Id: I1a9ec09083d4e6269889fb79e6121f25e83eb396
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/163
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-04 09:13:14 +00:00
Øyvind Harboe
5bdd2111d0 dsp5680xx: add missing and broken error propagation
found by clang.

Change-Id: Ie7e2ecad71bf0838ece93727e4778ad368b890ef
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/156
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-04 09:06:50 +00:00
Øyvind Harboe
2b20e4afac at91sam9: fix broken error propagation
Change-Id: I3288ce6f7642e519c26dd099be888a395fe1de94
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/159
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-04 09:05:47 +00:00
Øyvind Harboe
cb38df20dc avr32_regs: add missing error propagation
Change-Id: Ie8b141dd534d73eccfc045069d5f628bd1eea88e
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/166
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-04 09:05:15 +00:00
Uwe Hermann
d031b5def8 interface configs: Add missing URLs and names.
Also, drop author name from interface/hilscher_* files, that info is in the
git log, and none of the other files contain author names either.

Change-Id: Idf0eb4279c4bff31d15c166619c0bf8b1c5bb877
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Reviewed-on: http://openocd.zylin.com/138
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-03 23:53:26 +00:00
Øyvind Harboe
61957bee47 HACKING: all you need is http access
Change-Id: I191c1da5126c4c9ea1ff8826576b6b24feaf9881
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/157
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-03 23:46:14 +00:00
Spencer Oliver
ce3905a29f checkpatch: increase line length warning to 100
Change-Id: Ief0445ea6581929b3ffdcf8bc644ce5f27b392c4
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-03 23:09:05 +00:00
Spencer Oliver
efbafd9dc8 tools: add checkpatch script
Change-Id: I3579028fc1c6ee8bea58c82e5f0eecba7794d7cb
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-03 19:22:19 +00:00
Øyvind Harboe
bab6db1fd9 gdb_server: assert to avoid malloc(0)
Change-Id: I6ae3e007f4aa768f8bc64de78351750138f12e53
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/135
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-11-03 11:16:16 +00:00
Spencer Oliver
252758b6a1 cfg: add Stellaris LM4F232 Evaluation Kit config
Change-Id: Ica754897bef6573a0738ed1afdfe1dfda07292fd
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/151
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2011-11-02 23:32:03 +00:00
Spencer Oliver
07be858d2a cfg: add Blizzard class to stellaris.cfg
Change-Id: I2a1320c696b6d9b070e4a927c4cd4d68178af751
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/150
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2011-11-02 23:30:06 +00:00
Mark Vels
444f202360 tx27stk5: add board init support for KaRo TX27 CPU module
This patch adds support for a KaRo TX27 CPU module on a StarterkitV base board.
The register settings have been extracted from a RedBoot distribution
that is distributed along with the hardware by KaRo.

This setup has been tested with a JTAGKey. The testing has been focussed
on loading a program into memory and start execution.
Although the flash seems to be correctly detected, no effort has been put
in testing the NAND programming yet.

Change-Id: Ib17763f1e3ecacd0eb9b5fdc32f8cba7a5e59be5
Signed-off-by: Mark Vels <mark.vels@team-embedded.nl>
Reviewed-on: http://openocd.zylin.com/158
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-02 14:57:52 +00:00
Øyvind Harboe
955316a727 fix warning: remove assigned to variable
variable is subsequently not used

Change-Id: I177d21c6ba9f1f2e3765feffdbf317ea375a8cfe
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/149
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-02 09:44:08 +00:00
Øyvind Harboe
2c906384c3 cortex_a: add missing error propagation
found by clang.

Change-Id: I50eac219d7540fd48d3285f3f213cb659492d0c0
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/153
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-02 09:43:04 +00:00
Øyvind Harboe
5f00c007cb usbtoxxx: remove warning by reducing scope of variable
Change-Id: Icc3cfe601082cd83ad1c8818c1e21e7ada014150
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/154
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-02 09:42:34 +00:00
Øyvind Harboe
566faa17de arm11: print next address to debug
fixes clang warning. Basically the next address pointer is not
used for anything in the fn, except to be examined in debug.

Change-Id: I253519b8e49e54490bbe7da8ec3d2dd31f49052a
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/155
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-02 09:41:40 +00:00
Øyvind Harboe
2ea7a42e22 cortex_m: add missing error checking
found by clang.

Change-Id: I099c6fe6b044dba36c20221cb439bdcba5a6bb6f
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/152
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2011-11-01 22:12:59 +00:00
Øyvind Harboe
06216744ed target: fix null pointer exception
check if no target is selected and return error.

Change-Id: Ie8abb63c708d09572b45e88fc6766af108715077
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/148
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-01 21:20:19 +00:00
Spencer Oliver
889a306fc8 flash: add Stellaris Blizzard class
Change-Id: I83f0d6edf3ab31d9fa86682f20cec77dc47ba2f6
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/146
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2011-11-01 19:45:33 +00:00
Spencer Oliver
3f8f583964 target: rename cortex_m3.[ch] to cortex_m.[ch]
This rename is in preparation for cortex_m4 support.

Change-Id: Ic08c298ec6ed2aabc2c39db67191f68b3a51f550
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/147
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-11-01 14:23:08 +00:00
Øyvind Harboe
01f461b20a warning fix: remove senseless assignment before bailing out of fn w/error
Change-Id: I822f3adce0eccb880007673d60c7eccf7d36b398
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/144
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2011-10-31 21:12:30 +00:00
Øyvind Harboe
9b9092b7fa warnings: null pointer check fix
rewrite broken null pointer check code by reducing scope
of variable.

Change-Id: I8254f6849b187e5c9cd083053cdc11973c6fe339
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/142
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-10-31 20:43:36 +00:00
Øyvind Harboe
9933fa334d cfi: unsupported code paths now report and return error
found by clang, would have done something undefined and mysterious
later on.

Change-Id: If7d7aca8514575d229ed0b17378bf8b1bbf347c4
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/133
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-10-31 20:41:18 +00:00
Øyvind Harboe
08815946f6 bugfixes: tinker a bit with the targets command
return error when target can not be found instead of ERROR_OK,
split fn.

Change-Id: Iba5232d3862a490d0995c3bfece23685bd6856e3
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/131
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-10-31 17:41:44 +00:00
Øyvind Harboe
fc553327c0 dsp563xxx: fix missing error propagation found by clang
Change-Id: I7380ce145b4942e21b174f2a810928a877c32bc7
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/140
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-10-31 11:04:42 +00:00
Uwe Hermann
c0e1bfa8b4 interface configs: Fix whitespace and other issues.
Change-Id: I98825c7fb9bdee75b69b06005ed12a3f64ec4db4
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Reviewed-on: http://openocd.zylin.com/139
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2011-10-30 02:06:07 +00:00
Uwe Hermann
abfd4b19a6 config files: Drop incorrect comments.
There are many "force an error till we get a good number" comments in
target/board files. This refers to the use-case where a config script
sets _CPUTAPID to 0xffffffff (which presumely gets overridden later):

 if { [info exists CPUTAPID ] } {
    set _CPUTAPID $CPUTAPID
 } else {
    # Force an error until we get a good number.
    set _CPUTAPID 0xffffffff
 }

However, the same comment was also copy-pasted in many files which do
_not_ set _CPUTAPID to 0xffffffff, where the comment doesn't make any
sense at all. Drop those comments. Also, add one missing comment, and
fix small whitespace and grammar issues.

Change-Id: Ic4ba3b5ccba87ed40cea0d6a7d66609fbdfa3c71
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Reviewed-on: http://openocd.zylin.com/136
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2011-10-30 01:57:33 +00:00
Øyvind Harboe
fe2fd812fa clang: fix warning by adding assert that shows that a variable is used
Change-Id: I26e0ba9f1ae9d43c9a14c42c4225746782dc4d66
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/134
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-29 13:13:45 +00:00
Jonathan Dumaresq
af51c69fbc Fixes comment typo for page size
Change-Id: I6dd8aadcecd680c48e696aeec0daf74d2addbb05
Signed-off-by: Jonathan Dumaresq <jdumaresq@cimeq.qc.ca>
Reviewed-on: http://openocd.zylin.com/132
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2011-10-28 15:24:50 +00:00
Øyvind Harboe
97806831e2 bugfixes: numerous bugs in error propagation found by clang
Change-Id: I784068325b422d1918e28c08544bc5a1332d712f
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/130
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-27 22:08:35 +00:00
Øyvind Harboe
7e817839f3 clang: fix warning about missing check for return value
Change-Id: I0c6b6b8d1f0c30b6a503cb98df30584252bc0ee1
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/129
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-27 17:38:46 +00:00
Jim Norris
d265fa78c3 Remove use of undefined variable.
Change-Id: Id8fd345438c360b2a42857525f05360ce2794d21
Signed-off-by: Jim Norris <u17263@att.net>
Reviewed-on: http://openocd.zylin.com/127
Reviewed-by: Peter Stuge <peter@stuge.se>
Tested-by: jenkins
2011-10-27 00:47:22 +00:00
Øyvind Harboe
e6d979eefc clang: fix warning about use of unitialized variable
this was a false positive, silence it.

Change-Id: I432e0c466c94cf8fd6bbf0ea153c8501a8a261eb
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/126
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-10-26 20:36:04 +00:00
Jim Norris
2036c2aaae Add configuration for ATMEL SAM3N-EK board.
Change-Id: I525f6c346cace4e54f47659c5a7aceb29ee4baf2
Signed-off-by: Jim Norris <u17263@att.net>
Reviewed-on: http://openocd.zylin.com/125
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-26 20:31:45 +00:00
Jim Norris
be17f6b08e Add configuration for ATMEL SAM3N series.
Change-Id: Iac498ab37e59127b989f29a1c4167ab29d625b05
Signed-off-by: Jim Norris <u17263@att.net>
Reviewed-on: http://openocd.zylin.com/124
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-26 20:31:02 +00:00
Marti Bolivar
5cca45d5f9 stm3220g_eval.cfg: fix CHIPNAME.
The STM3220G-EVAL board has an STM32F207IGH6. ("...H6", not "...T6").

Change-Id: Iaf3dae6830c5c0685a1dcd1588d391434bc51be7
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
Reviewed-on: http://openocd.zylin.com/120
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-10-25 20:08:58 +00:00
Andreas Fritiofson
8f76ca05d9 armv7a: fix scan-build warnings
"Value stored to 'retval' is never read": Check and propagate error
"Dereference of null pointer": Probably bogus, maybe triggered by the null
check on armv7a, so remove the check since it can't be null anyway.

Change-Id: I3bc44e52af1589ff40e6a42deda0ce7f3a25e397
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/119
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-25 05:16:50 +00:00
Andreas Fritiofson
f80ec2aa37 armv7a: make local functions static
Also fix a spelling error and remove the declaration for a non-existent
function from the header.

Change-Id: I13177e2d81aa167c05c1cc766f06924211e6d735
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/118
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-25 05:16:04 +00:00
Andreas Fritiofson
8c6b95ed16 armv7m: improve error handling
Propagate errors unchanged.
Free allocated working area in the error return path.
Remove duplicated cleanup code by rewriting the logic.
As a side-effect, fixes a scan-build warning.

Change-Id: I80e3c0015be672778f916e998c8c2e4f23d7588c
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/117
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-25 05:14:11 +00:00
Freddie Chopin
ea10093422 Fix "Evaluate 'script' in the global scope"
This fixes commit Evaluate 'script' in the global scope. It caused
Windows builds behave differently than before because path was evaluated twice
and backslashes from Windows' paths got unescaped and effectively wiped out.
Configs could only be passed with "-f ../dir/config.cfg" or "-f
..\\dir\\config.cfg" instead of usual "-f dir/config.cfg" (or using backslash)
as previously.

Change-Id: I13b4abac6dbe6d770cc11a4e61c9421ef340da83
Author: Steve Bennett <steveb@workware.net.au>
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/40
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-10-24 17:40:52 +00:00
Øyvind Harboe
e5fd6131fe warning: silence gcc by initializing local variables
GCC doesn't understand that these are in fact initialized if they are
used.

Change-Id: I01988adb0547f785b48d869ddbe44cc17dca4739
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/116
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-24 17:10:40 +00:00
Antonio Borneo
8e8ff02b74 SERVER: fix clang warning
The fix is inline with the Linux coding style that forbids
assignment in if condition

Change-Id: I0b9d0b419d9c8b7a8c755e048d5faf72d1658ba2
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/87
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-23 15:17:09 +00:00
Richard Barlow
09fbc0ab86 cfg: Add interface config for Dangerous Prototypes BusBlaster
The BusBlaster from Dangerous Prototypes is based on the FTDI FT2232H IC.
It has a CPLD between the FT2232H and the JTAG header allowing it to
emulate various debugger types. It comes configured as a JTAGkey compatible
device.

Change-Id: Iab56907bf67ded87001e628d93012f1e16287d90
Signed-off-by: Richard Barlow <richard@richardbarlow.co.uk>
Reviewed-on: http://openocd.zylin.com/53
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2011-10-23 15:14:02 +00:00
Antonio Borneo
40c425e400 NOR/CORE: fix clang warning
The fix is inline with the Linux coding style that forbids
assignment in if condition

Change-Id: I10338a249bcfeff87d8596f7e17f209e26b41678
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/86
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-23 14:37:48 +00:00
Antonio Borneo
7b94f4c99d NAND/CORE: fix clang warning
The fix is inline with the Linux coding style that forbids
assignment in if condition

Change-Id: I42a371d6adfdf3b3fb867705211c47d89776ee2a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/85
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-23 14:32:11 +00:00
Antonio Borneo
3432049276 FLASH/CFI: fix clang warnings
Total of 5 warnings:
3x "Dead store": removed dead assignment to variable;
1x "Dereference of null pointer": this is not an error, but a
   limited visibility of clang, since pointer erase_region_info
   is initialized inside cfi_fixup_non_cfi();
1x "Branch condition evaluates to a garbage value":
   this is a real coding bug that could issue SIGSEGV, since
   "goto cleanup" can be executed before initialization
   of "source".

Change-Id: Id3c323c82bb15cbd3bb8fc04b23541f11145f109
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/84
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-23 14:16:45 +00:00
Øyvind Harboe
9bb3a05f0e mx2: add error propagation and remove warnings
Change-Id: Idd4fb452790e5d7921a749679dbd865586e5a4a9
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/48
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-23 13:30:46 +00:00
Øyvind Harboe
dad3850264 fm3: fix warning for superfluous assignment
Change-Id: I4f8e8c2e676a2728ddc6227daf9ca6a7ceb3d505
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/46
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-23 13:29:09 +00:00
Øyvind Harboe
d5b5f9f4fd kinetis: fix warning about malloc(0) w/assert
Change-Id: Ib40204675bfc5429c744f9ed7e2f7098384b753d
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/47
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-23 13:26:53 +00:00
Øyvind Harboe
2c31adb31d tms470: remove dead assignment warning
Change-Id: I21e7ac47f80d93c9c0d7b169f8848b929c664b20
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/45
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-23 13:25:23 +00:00
Mathias K
c5c4ed82ab add Freescale Kinetis K40 devices and Kwikstik eval board
Change-Id: I4817921d09ab915c50f42651bc073690033450fe
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/51
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-23 13:23:49 +00:00
Øyvind Harboe
c9f51acdc3 clang: fix warning w/assert so that clang knows that there will be no division by zero
Change-Id: I98ac62a22f21043bb535a667a4f1f1537ccde2a4
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/42
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-23 11:57:34 +00:00
Øyvind Harboe
4e079d18bf clang: fix malloc() warning with assert
Change-Id: I989d2655622a9f11f4a0a2994014e42822587ecd
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/41
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-23 11:55:02 +00:00
Edgar Grimberg
0577ba8331 tms470: removed unnecessary operations
This should silence a warning.

Change-Id: Id91a9ebacae836083b1db2654a8e7bf24b2300e9
Signed-off-by: Edgar Grimberg <edgar.grimberg@gmail.com>
Reviewed-on: http://openocd.zylin.com/52
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-23 11:34:05 +00:00
Antonio Borneo
811f7d3f7e FLASH/STMSMI: fix clang "dead store" warning
Change-Id: Icfdefdc48432db2057d3fea19dc424571d2385eb
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/50
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-22 11:45:29 +00:00
Øyvind Harboe
8d5e34635c buspirate: ignore return value and fix warning
Perhaps we could do one better and propagate the error?

Change-Id: Idc45f516c26f09de4ee01fe05e8d3475f4b80db3
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/43
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-22 09:01:00 +00:00
Øyvind Harboe
5179738062 warning: fix false positive
may be used uninitialized in this function [-Werror=uninitialized]

Change-Id: Ida2cf8efe4e7da6fd9f669b806a20894563ac3d4
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/49
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-22 06:45:55 +00:00
Øyvind Harboe
a093f82bb7 server: remove warning due to dead assignment
Change-Id: Idb08aef0c11b3fae92286e8fcea61ab09ab09e74
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/44
Reviewed-by: Peter Stuge <peter@stuge.se>
Tested-by: jenkins
2011-10-22 06:18:52 +00:00
Spencer Oliver
7fe05ff330 jim: add missing jim license
Change-Id: Ib8e34739d92cd54655b9b47d07b856a82ff25f3c
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/39
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-21 09:29:44 +00:00
Andreas Fritiofson
6b209e7489 rtos: remove broken code for handling the deprecated qP packet
Change-Id: Icca522c1e2a2877abb20665b171c61079b1d8f48
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/37
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2011-10-20 01:45:25 +00:00
Andreas Fritiofson
3d2305f2e6 rtos: return the correct value if the T or H packets are handled
Change-Id: Iea31e20ee4e35c1a9cb7b93424c92b3f38081067
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/38
Tested-by: jenkins
Reviewed-by: Evan Hunter <evan@ozhiker.com>
Reviewed-by: Peter Stuge <peter@stuge.se>
2011-10-20 01:45:06 +00:00
Freddie Chopin
1c1771ef6c Unused variables
Fix a few errors with set and unused variables detected by GCC 4.7.0

Change-Id: I59b748e18e514ee9f0cde7883b4ed5116198bd4a
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/36
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-10-19 19:53:00 +00:00
Marc Willam / Holger Wech
9ddb94c1f3 Updated fm3.c, added Flash type 2 support, error handling improved
Change-Id: I684aca11c4554290d0e57c6d3318d8082980c1ef
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Reviewed-on: http://openocd.zylin.com/10
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-10-19 11:05:27 +00:00
Uwe Hermann
36e3009ff9 TMPA900/910 MCUs are always little endian.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Change-Id: I8839f2cf0faf1b5ba9f99901c5ee028b199fabd2
Reviewed-on: http://openocd.zylin.com/35
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2011-10-19 00:24:40 +00:00
Uwe Hermann
4f2655c28b Toshiba TMPA900 config: Fix incorrect working area.
The Toshiba TMPA900 series (TMPA900/901) only has internal RAM regions
RAM-0 (16kB) and RAM-1 (8kB) which we can use as working area.

This is probably a copy-paste error from tmpa910.cfg, which has the
correct values and sizes for the TMPA910 series (TMPA910/911/912/913):
there are RAM-0, RAM-1, and RAM-2 (each 16kB).

Also, change "built-in RAM" to "internal RAM" to match what the
datasheet uses.

Change-Id: I993cd6b7fadc28cf34e5cc18426bb2bb42597670
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Reviewed-on: http://openocd.zylin.com/34
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2011-10-19 00:24:40 +00:00
Matt Reimer
4eca579a6e xscale: fix bug in xscale_receive()
The code in xscale_receive() that tries to skip invalid reads (i.e.
reads that don't have the DBG_SR[0] 'valid' bit set) seems to be
wrong, as it only looks at the first word's valid flag rather than
each word's own valid flag. Am I reading the code correctly? If so,
the attached patch should fix it.

If this looks correct, I'll generate a proper patch and commit message.

Matt

Change-Id: I74ebe2ad7a36d340a9dd3b8487578b6ea7f3cf1e
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/32
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-18 20:32:36 +00:00
Spencer Oliver
0dac042a10 luminary: add new targets
update target support from latest SW-DRL 8049

Change-Id: I40aba4d30fe2b79fd955f466c64d99a1dfd63ecf
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/31
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Tested-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-18 06:36:11 +00:00
Spencer Oliver
af37d5f196 luminary: add peripheral reset script
some luminary device classes require a reset script
to emulate a hardware reset.

Change-Id: Id505c92451244b48b0238c2130aebab2df8d208b
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/30
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Tested-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-18 06:35:42 +00:00
Karl Kurbjun
59beb93752 AM/DM37x: Use ICEPick warm reset and include halt when gdb connects.
Using the ICEPick reset seems to allow the processor to be halted sooner
and the halt on gdb connection makes the connect process more robust.

Change-Id: I0586f6e6becc60a729030509ef58907a19d545ec
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/23
Tested-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-17 19:36:09 +00:00
Karl Kurbjun
70143a96c5 ICEPick-C: Add support for warm reset through JTAG controller and provide finer detail functions.
This sets up simple functions that can later be used to provide additional
ICEPick Operations.

Change-Id: I313b8679267696fad87d23f3692963e513f2fe21
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/22
Tested-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-17 19:35:37 +00:00
Attila Kinali
2f6bdac60a Add the SAM3N familly to the chip_details table
Change-Id: Ic122d324eacf6e667ed6008ebb84708be944222c
Signed-off-by: Attila Kinali <attila@kinali.ch>
Reviewed-on: http://openocd.zylin.com/29
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Tested-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-17 17:40:25 +00:00
Øyvind Harboe
80c20a186b target_request: add target_got_message() that can be used to improve DCC performance
API change to allow implementing a back-off algorithm for
polling hardware.

Change-Id: I6cbe8b4534c8dfeb8442305171ea96b5481c1f17
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/26
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Tested-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-17 12:32:38 +00:00
Øyvind Harboe
ea295bd694 target: DCC / target message backoff algorithm
by immediately polling again when we have received a message from
the target instead of waiting 100ms, we can hope for much better
performance. More than 100x? :-)

Change-Id: Ieaf0c6c8b6e5addc482895670ffbf9a743e07a29
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/27
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Tested-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-10-17 12:32:11 +00:00
Jim Norris
2d4bdb9fe0 Add some more detail for setting up Gerrit account.
1) Add a couple more steps when setting up the Gerrit account.

Change-Id: I5d81feac4650d4d28653d14cfc0baf14270424c1
Signed-off-by: Jim Norris <u17263@att.net>
Reviewed-on: http://openocd.zylin.com/28
Reviewed-by: Peter Stuge <peter@stuge.se>
Tested-by: Peter Stuge <peter@stuge.se>
2011-10-15 00:00:19 +00:00
Spencer Oliver
3828b5827d arm-jtag-ew: whitespace cleanup
Change-Id: I8861e825f9c84525e0c09c3adaa3fe300640770d
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Reviewed-on: http://openocd.zylin.com/21
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-10-14 13:01:52 +00:00
Spencer Oliver
8c3c5e53e3 flash: fix lpc2000 driver typo
Change-Id: I3a759ed98a27fd186c12355b846d5e97dba86c5b
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-10-14 14:18:56 +02:00
Uwe Hermann
498662e2e5 Add an interface file for DLP Design DLP-USB1232H.
The DLP Design DLP-USB1232H UART/SPI/JTAG module is based on an FTDI FT2232H
chip. Among other things, it can used as JTAG programmer if connected to
the JTAG target properly. I have successfully wired the module to an
Olimex STM32-H103 eval board and flashed a firmware onto that using OpenOCD.

The setup details and schematics are documented at:
http://randomprojects.org/wiki/DLP-USB1232H_and_OpenOCD_based_JTAG_adapter

Change-Id: I5eb9255a61eeece233009bee77d7dc3b5d1afb8b
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Reviewed-on: http://openocd.zylin.com/20
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-10-13 22:29:28 +00:00
Uwe Hermann
d4599b8b3f Add a board file for the Glyn Tonga2.
This is a Toshiba TMPA900CMXBG (ARM9) based SO-DIMM CPU module with 64MB
DDR SDRAM, 256MB NAND flash, and on-board Ethernet.

The board file provides a tonga2_init function which sets up the
PLL/clocks and memory (SDRAM and SRAM), which allows writing a boot-loader
into RAM via JTAG.

Change-Id: I60522b97997bdf50e1f25aebab910d93a98522fb
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Reviewed-on: http://openocd.zylin.com/19
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-10-13 22:28:16 +00:00
Spencer Oliver
8cd3832e2b target: whitespace cleanup
Change-Id: I1453f4f3dc0add529da20577e38b8b82d7d00366
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Reviewed-on: http://openocd.zylin.com/18
Reviewed-by: Alex Austin <alex.austin@spectrumdsi.com>
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-10-13 20:18:43 +00:00
Michel Jaouen
5a7cff26a5 breakpoint : smp software breakpoint issue
Change-Id: Iefe78bad71d4fdb38ae412ab8fe2f6282836c22e
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/14
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-10-13 18:54:04 +00:00
Peter Stuge
2c6d312ec9 Merge "docs: update HACKING to point to Gerrit" 2011-10-12 18:48:21 +00:00
Øyvind Harboe
4e80a9128e docs: update HACKING to point to Gerrit
Change-Id: If79e86c731ac06aaefca1aebde40e7cb3de68e4d
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-10-12 20:23:18 +02:00
Spencer Oliver
24f82100f8 docs: update more url's
Change-Id: I476078f32910579fed55777c3b0e6da3ef3363b7
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-10-12 12:25:59 +01:00
Spencer Oliver
ca0cc39f5f docs: update project url's
Change-Id: I54fc3aff722ed25143aad85e58d19b72fcecbba0
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-10-12 09:32:59 +01:00
Michel Jaouen
3ab7855d1a breakpoint : indentation
Change-Id: Icdb8f72dbb516cd0dfc612c3d61b6801f6382be6
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-10-11 22:04:24 +02:00
Spencer Oliver
cf692abe83 replace berlios url's with sourceforge url's
Change-Id: I1c9957bb64df87cee7c5e832f21453eb8934a5fb
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-10-11 17:18:05 +01:00
Spencer Oliver
43689d3371 contrib: remove extra lf
Change-Id: I6e16010e13ad2ea0cdff99b2e8805c74bcd0eb56
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-10-11 13:01:22 +01:00
Andreas Fritiofson
92b14f8ca9 stm32f1x: use async algorithm in flash programming routine
Let the target algorithm be running in the background and buffer data
continuously through a FIFO. This reduces or removes the effect of latency
because only a very small number of queue executions needs to be done per
buffer fill. Previously, the many repeated target state changes, register
accesses (really inefficient) and algorithm uploads caused the flash
programming to be latency bound in many cases. Now it should scale better
with increased throughput.

Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2011-10-09 00:00:53 +02:00
Andreas Fritiofson
a147563ac1 stm32f1x: use register base instead of register offset
Access the different flash banks' registers using a bank specific register
base and a register specific offset. This is equivalent but feels more
natural.

Some accesses were discovered that maybe should not be hard coded to bank0
registers. Add a note about that.

Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2011-10-09 00:00:52 +02:00
Andreas Fritiofson
1163435e19 cortex_m3: use armv7m's async algorithm implementation
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2011-10-09 00:00:52 +02:00
Andreas Fritiofson
9d4c466c21 armv7m: implement async algorithm functions
Split armv7m_run_algorithm into two pieces and use them to reimplement it.
The arch_info parameter is used to keep context between the two calls, so
both calls must refer to the same armv7m_algorithm struct. Ugly but works
for a proof-of-concept.

Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2011-10-09 00:00:52 +02:00
Andreas Fritiofson
3f6ef7a40b target: add async algorithm entries to the target type
On supported targets, this may be used to start a long running algorithm in
the background so the target may be interacted with during execution and
later wait for its completion.

The most obvious use case is a double buffered flash algorithm that can
upload the next block of data while the algorithm is flashing the current.

Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2011-10-09 00:00:52 +02:00
Simon Barner
e56e5a3929 arm-jtag-ew: Send GDB keep_alive() messages when logging USB communication
- Ticket: #35
2011-10-08 23:10:20 +02:00
Simon Barner
830e76fecd arm-jtag-ew: Formatting 2011-10-08 23:10:11 +02:00
Simon Barner
028d9aa9ed arm-jtag-ew: In armjtagew_init(), set initial JTAG speed to 32 kHz (before TAP initialization).
This prevents rare communication errors during startup.
2011-10-08 23:09:42 +02:00
Simon Barner
b1c74747b6 arm-jtag-ew: Emit a warning if interface firmware version != 1.6 2011-10-08 23:09:30 +02:00
Simon Barner
e4590dad08 arm-jtag-ew: Declare interface as `jtag_only' 2011-10-08 23:09:21 +02:00
Simon Barner
07bf5f443a arm-jtag-ew: Provide armjtagew_speed_div() in order to fix interactive use of `adapter_khz' 2011-10-08 23:09:05 +02:00
Simon Barner
8b61ed2e95 arm-jtag-ew: Fix setting interface speed (2/2)
Interface expects speed in Hz, not kHz

- Ticket #34
2011-10-08 23:08:46 +02:00
Simon Barner
3977c5169b arm-jtag-ew: Fix setting interface speed (1/2)
CMD_SET_TCK_FREQUENCY message length is 5, not 4

- Ticket: #34
2011-10-08 23:08:15 +02:00
Eugeniy Meshcheryakov
e42363c0f6 Add udev rules for openmoko neo1973 debug board 2011-10-08 23:04:27 +02:00
Clément Burin des Roziers
da8ce5f2e1 STM32L: Added flash driver and target
Added the flash driver for the STM32L family, which highly differ from the STM32F family.
Added the TCL target file for JTAG access.
2011-10-03 18:42:39 +02:00
Ash Charles
a17adf0601 Verdex: Add support for Gumstix Verdex boards.
Gumstix Verdex is a PXA270-based series of computer-on-modules. This
configuration file is based off the voipac.cfg configuration with
a different flash memory configuration. This has been tested flyswatter
adapter to reflash a Gumstix Verdex XL6P board.
2011-10-01 13:11:02 +02:00
Michel Jaouen
ac49e24149 u8500 : config for L2 cache 2011-09-30 09:45:29 +02:00
Michel Jaouen
00ded4eb01 armv7a ,cortex a : add L1, L2 cache support, va to pa support 2011-09-30 09:45:26 +02:00
Steve Bennett
ef885d3b2a jim-nvp is moving from jimtcl to openocd
The jim-nvp code is specific to openocd, so it belongs in openocd,
not in the core jimtcl.

Signed-off-by: Steve Bennett <steveb@workware.net.au>
2011-09-30 09:38:22 +02:00
Vladimir Zapolskiy
05b12e6c5e AM/DM37x: add ES1.2 silicon type into account
The missing value for ES1.2 silicon revision is mentioned in
sprugn4m.pdf, and the recent TI Beagleboard XM is powered by it,
so let support the revision.
2011-09-30 09:37:04 +02:00
Mathias K
daa41473ab add target events, run algorithm and default r/w buffer api
Target events are added to get better gdb support. The run
algorithm functionality are implemented to support feature
fast flash write functionality. The new r/w buffer api is now
used to support the special memory address handling. The output
of the md command was fixed.
2011-09-23 15:32:49 +02:00
Michel Jaouen
508bc7ca36 kinetis : fix deadlock on device having hasidcode false. 2011-09-23 15:31:39 +02:00
Mathias K
bfe634aa91 kinetis cpu flash driver
Initial release of the freescale kinetis cpu flash driver.
2011-09-17 14:20:37 +02:00
Luca Bruno
8d40b03ba3 contrib: fix udev rules for tty based adaptors
Most serial adaptors are identified by udev with SUBSYSTEM=tty and
without DEVTYPE. This patch fix udev rules to work with any listed
tty-based adaptor. It has been tested with a FTDI-based Bus Pirate.

Signed-off-by: Luca Bruno <lucab@debian.org>
2011-09-16 10:03:34 +02:00
Mathias K
5c91551ea7 kinetis auto mass erase on secured devices
This is a proof of concept to get access to the debug port of a
secured kinetis cpu. On full flash erase the cpu is automatically
secured and the debug port is not accessible.
To get this to work the srst line is needed and the necessary
configuration should be added to the configuration file.
2011-09-16 09:51:35 +02:00
Luca Bruno
4017af8492 Fixes and spellchecks for various Buspirate output messages
Signed-off-by: Luca Bruno <lucab@debian.org>
2011-09-11 00:07:54 +02:00
Uwe Bonnes
c50ed69e79 Add definition for the STEVAL-PCC010 board with the STM32F207 2011-09-09 10:29:11 +02:00
Richard Uhler
1411ad11c1 Implementation of a new jtag remote_bitbang driver.
The driver sends ascii encoded bitbang commands over unix sockets or TCP to
another process. This driver is useful for debugging software running on
processors which are being simulated.
2011-09-02 16:50:01 +02:00
Martin Schmölzer
48e8d2d21c ULINK driver: Remove typedefs in ulink.c
Signed-off-by: Martin Schmölzer <martin.schmoelzer@student.tuwien.ac.at>
2011-09-01 07:02:38 +02:00
Martin Schmölzer
70d9d808e5 ULINK driver: Remove typedefs in OpenULINK firmware: Use typedefs from stdint.h (uint8_t, uint16_t) instead of custom typedefs in shorttypes.h (u8, u16, ...)
Signed-off-by: Martin Schmölzer <martin.schmoelzer@student.tuwien.ac.at>
2011-09-01 07:02:38 +02:00
Martin Schmölzer
ea7c87e5e7 ULINK driver: Remove typedefs in OpenULINK firmware USB descriptor structures
Signed-off-by: Martin Schmölzer <martin.schmoelzer@student.tuwien.ac.at>
2011-09-01 07:02:38 +02:00
Rodrigo L. Rosa
355f183adb usleep to jtag_sleep
this will help avoid platform specific timing issues
2011-08-31 15:46:05 -07:00
Rodrigo L. Rosa
c4a1728a2d static for some functions
made two functions into static, since they are not required by anything external
2011-08-31 15:45:55 -07:00
Rodrigo L. Rosa
fb164bca55 speed up, relocate function
added an attempt to use the non-reseting halting sequence. if it fails, then the full sequence will be attempted. this makes things a bit faster most of the time.
changed the location of a function, avoiding a forward def
2011-08-31 15:45:45 -07:00
Øyvind Harboe
fbbce95140 Merge branch 'dsp5680xx_cherry' of git://repo.or.cz/openocd/dsp568013 into fix 2011-08-31 16:27:09 +02:00
Martin Schmoelzer
353362651f ULINK driver: Update firmware image to reflect the latest changes in source code.
Signed-off-by: Martin Schmölzer <martin.schmoelzer@student.tuwien.ac.at>
2011-08-31 16:25:42 +02:00
Martin Schmoelzer
1d135dddf2 ULINK driver: Add '-lm' linker flag when building this driver (required for correct calculation of JTAG TCK speed setting)
Signed-off-by: Martin Schmölzer <martin.schmoelzer@student.tuwien.ac.at>
2011-08-31 16:25:42 +02:00
Martin Schmoelzer
c331c9382f ULINK driver: Implement variable TCK frequency in OpenOCD driver
Signed-off-by: Martin Schmölzer <martin.schmoelzer@student.tuwien.ac.at>
2011-08-31 16:25:42 +02:00
Martin Schmölzer
6446dbaacb ULINK driver: Implement variable TCK frequency in OpenULINK firmware
Also, speed up jtag_clock_tck() significantly (150 kHz -> 375 kHz)

Signed-off-by: Martin Schmölzer <martin.schmoelzer@student.tuwien.ac.at>
2011-08-31 16:25:41 +02:00
Martin Schmoelzer
c881fb8532 ULINK driver: Fix whitespace in OpenULINK firmware usb.c module (trivial)
Signed-off-by: Martin Schmölzer <martin.schmoelzer@student.tuwien.ac.at>
2011-08-31 16:25:41 +02:00
Martin Schmoelzer
d1bd5569b3 ULINK driver: Implement JTAG_PATHMOVE command
Signed-off-by: Martin Schmölzer <martin.schmoelzer@student.tuwien.ac.at>
2011-08-31 16:25:41 +02:00
Martin Schmölzer
118a9a9ca0 ULINK driver: Implement JTAG_STABLECLOCKS command
Signed-off-by: Martin Schmölzer <martin.schmoelzer@student.tuwien.ac.at>
2011-08-31 16:25:41 +02:00
Martin Schmölzer
b6e4d26695 ULINK driver: Implement command to manually force downloading firmware image from arbitrary location
Signed-off-by: Martin Schmölzer <martin.schmoelzer@student.tuwien.ac.at>
2011-08-31 16:25:41 +02:00
Martin Schmölzer
d01cbd7143 ULINK driver: Re-order queue functions to reflect the order in commands.h
Signed-off-by: Martin Schmölzer <martin.schmoelzer@student.tuwien.ac.at>
2011-08-31 16:25:41 +02:00
Martin Schmölzer
b6f8b2ab66 ULINK driver: Properly propagate return values in ulink_execute_queue()
Signed-off-by: Martin Schmölzer <martin.schmoelzer@student.tuwien.ac.at>
2011-08-31 16:25:41 +02:00
Martin Schmölzer
3633e8d7b8 ULINK driver: Update some comments, fix some coding mistakes
Signed-off-by: Martin Schmölzer <martin.schmoelzer@student.tuwien.ac.at>
2011-08-31 16:25:41 +02:00
simonqian.openocd
7e20eda944 vsllink driver compile fails with'vsllink_debug_buffer' defined but not used
USB communication is handled by code under versaloon directory.
So _DEBUG_USB_COMMS_  should not be used in vsllink.c.
Attachment is the patch.
2011-08-31 16:22:00 +02:00
Rodrigo L. Rosa
42300c98ab removed trailing whitespaces
emacs is awesome.
replace-regexp RET [ ]+$ RET RET
and it's done
2011-08-30 21:16:46 -07:00
Rodrigo L. Rosa
be568d37c0 fix enter debug mode for locking
added an alternative way to enter debug mode, which does not require restarting the chip.
this will not always work, but in general it will (failure 0.3%), and failure is not a dramatic issue, simply have to use the full sequence.
the user can only access "halt", which uses the full sequence, so the user should not have any problems.
restarting the chip requires reconfiguring the flash module. the doc is very poor, so i'd rather have the two methods, and live with the 0.3%.
2011-08-30 21:16:34 -07:00
Rodrigo L. Rosa
573cbeac1e fix irlen handling
sometimes the master tap will be enabled, since tap switching is required during halt/lock/unlocking procedures.
now irscan handles this, avoiding unnecessary warnings and preventing errors.
2011-08-30 15:17:00 -07:00
Rodrigo L. Rosa
eb0734de19 fix debug mode,lock,unlock
got new info regarding setting the chip to debug mode, and locking/unlocking flash memory.
the newer implementation is a bit slower, but always works.
the previous implementation would randomly (as once every 25k-70k times) get the chip into a state where the freescale tool would be necessary. this is fixed now.

added functions to play around with the jtag state machine. they are not the happiest, but are necessary to be able to execute the halting/locking/unlocking sequences.

Conflicts:

	src/target/dsp5680xx.c
2011-08-30 15:13:49 -07:00
Rodrigo L. Rosa
1d4f294c3c fix error handling during halt
the user can execute halt, but no enter_debug_mode. modified the error handling to suite this.
the new implementation of unlocking will use enter_debug_mode, and should not get the same errors as the user would, because not being able to enter debug mode is actually success when checking for locked flash.
2011-08-30 15:09:44 -07:00
Rodrigo L. Rosa
e1a2d7255e optional crc for flash writing
crc check was always performed on newly flashed data, now it is optional
flash mem can be locked by writing a specific word to a specific address in flash.
to verify flash, target must be halted, and this will (when the new halt sequence is implemented) require reseting the chip. if the target is reset after writing the lock words, then it will lock, hence the CRC will fail because it is not possible to read stuff from the target.

also added a function that resets the jtag state machine.
this is not used yet, but will be soon.
it is implemented to allow strict control over JTAG state machine, necessary to implement to halt and unlocking sequences.
2011-08-30 15:09:34 -07:00
Rodrigo L. Rosa
2aa14db677 def syntax to match tap irlen
the master tap has a 4 bit irlen
changed the instructions to be 4 bit, ie, removed the zeros.
it makes it clearer to interpret.
2011-08-30 15:09:23 -07:00
Rodrigo L. Rosa
67bb8a6cb2 dsp568013 disable polling by default 2011-08-30 15:08:54 -07:00
Heythem Bouhaja
c8926d1457 cortex_a hybrid & context breakpoints 2011-08-30 18:27:52 +02:00
Evan Hunter
e175f02715 Fix off by one bug in FreeRTOS 2011-08-27 19:37:22 +02:00
Jonathan Dumaresq
4bcf37e2c0 Add Valuline HD to config file
This will add the BSTAP for the medium and high density devices
2011-08-25 20:13:16 +02:00
Jonathan Dumaresq
62eec47ff1 This will add the Value Line HD of stm32 devices.
This has been tested on STM32F100VE
2011-08-25 20:13:16 +02:00
Jie Zhang
8d7ddde5f1 remove target argument from gdb packet handling functions 2011-08-24 17:41:35 +02:00
Evan
32862ed9f8 Add suspended task list to FreeRTOS support 2011-08-24 11:14:33 +02:00
Evan Hunter
85219514cf Fix FreeRTOS thread list parsing 2011-08-24 11:14:28 +02:00
Jim Paris
dd318f8243 Fix redbee config files
Currently the board/redbee-*.cfg files incorrectly include the
interface definition.  Move the interfaces to interface/,
and create a single board/redbee.cfg that is common to both boards.
Intended usage is now:
  openocd -f interface/redbee-econotag.cfg -f board/redbee.cfg
2011-08-24 11:13:26 +02:00
Andreas Bießmann
b2ff00fb86 non_cfi: add SST39WF1601 support
Invented by jknick in sparkfun forum:
http://forum.sparkfun.com/viewtopic.php?t=19788

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2011-08-24 11:12:53 +02:00
olivier Schonken
8292b1b5cd Fix Sam3u flash bank 1 issue 2011-08-21 19:37:20 +02:00
Gunnar Henne
0d5a38d829 cfi: add EN29LV800BB support
Posted by telekatz@gmx.de in the bettyhacks forum for openocd
0.4.0 and integrated into 0.5.0 by Gunnar Henne.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-08-18 09:55:44 +01:00
Jie Zhang
40ac04ca7a remove white space before TAB 2011-08-17 17:28:24 +02:00
Spencer Oliver
358df39b43 build: check buspirate build host
buspirate has never supported building on native windows (mingw).
configure will now check this is not the case.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-08-16 17:33:19 +01:00
SimonQian
54fc164d3a versaloon driver update
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-08-16 12:50:38 +01:00
Spencer Oliver
42b85f76f7 build: check guess-rev.sh can be found/executed
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-08-16 12:06:57 +01:00
Spencer Oliver
b72af9dbfc build: rename configure.in to configure.ac
configure.ac is the correct name to use with modern autotools.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-08-16 12:00:27 +01:00
Spencer Oliver
f9a379d02c jim: update to fix mingw/msys build issues
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-08-16 11:58:06 +01:00
Jie Zhang
8ff6097e23 show git commit number even when cross-compiling
AC_CHECK_FILE will die when cross-compiling. So don't use it to test the existence of guess-rev.sh.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-08-15 16:35:29 +01:00
Øyvind Harboe
9779a2bf1a jimtcl: delete OpenOCD's broken 'stacktrace' command
Use "info stacktrace" instead. This fixes build problems with
latest Jim Tcl.
2011-08-14 18:32:16 +02:00
Stefan Mahr
45b5c838a6 mips: fix potential alignment error 2011-08-12 12:00:51 +02:00
Stefan Mahr
85f1963d52 mips: fix reading uint32 and uint16 when running on big endian host 2011-08-12 12:00:46 +02:00
Stefan Mahr
28f088dc66 target: add helper functions to get/set u16 or u32 array from/to buffer 2011-08-12 12:00:42 +02:00
Spencer Oliver
85cf298667 ftd2xx: fix build warnings
Due to build warnings introduced in newer versions of ftd2xx we
use strings to report errors rather than result codes. This also
gives us the same behaviour as libftdi.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-08-11 21:36:54 +01:00
Jie Zhang
738b91ddb4 remove useless pxref to SMP subsection 2011-08-11 22:13:32 +02:00
Øyvind Harboe
7bcc7c31d2 Merge branch 'dsp5680xx_cherry' of git://repo.or.cz/openocd/dsp568013 into HEAD 2011-08-11 16:23:15 +02:00
Steve Bennett
a62d8f2271 Evaluate 'script' in the global scope
Scripts sourced via 'script' should evaluate in the global
scope to make it easy to set and reference global variables.

Signed-off-by: Steve Bennett <steveb@workware.net.au>
2011-08-11 16:20:56 +02:00
Rodrigo L. Rosa
7675db7e92 fix return code from dsp5680xx_read
it returned ERROR_OK even though it actually failed.
this made the Tcl interface report success, though it had not succeeded.
2011-08-10 13:08:14 -07:00
Rodrigo L. Rosa
67f1f0c7b5 renamed for clarity
i had started my code from dsp5683xx, i renamed a bunch of stuff to names i consider to be better.
i believe no one is using this code, so nobody should be affected. (it's not too late to do this change)
2011-08-10 13:07:31 -07:00
Andreas Fritiofson
f25ffaf2b2 rlink: read only the expected number of bytes
After correcting the reply size counter, it should be safe to rely on it
for the number of bytes expected in the USB read, instead of reading the
endpoint maximum. This doesn't make things go any faster but it's nicer and
removes the local buffer.

Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2011-08-10 06:52:09 +02:00
Andreas Fritiofson
0b64be2019 rlink: simplify and optimize queue fill level checks
Add a helper function for running the queue if it would overflow otherwise.
Use it to simplify the queue fill level checks and optimize in a few cases
that would previously run the queue prematurely.

Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2011-08-10 06:52:09 +02:00
Andreas Fritiofson
d23d61a932 rlink: remove redundant text from log messages
__FILE__ and __LINE__ are already printed using the log macros.

Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2011-08-10 06:52:09 +02:00
Andreas Fritiofson
5f698273c2 rlink: remove duplicated code
After the reply_index handling is fixed, there's no need to special case
the out scan.

Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2011-08-10 06:52:09 +02:00
Andreas Fritiofson
5812ef2b73 rlink: fix reply counter to enable sending full buffers
dtc_queue.reply_index was wrongly being increased during out scans, causing
the queue to be sent before the out buffer was full. This patch increases
raw upload speed by 50% or so.

Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2011-08-10 06:52:09 +02:00
Andreas Fritiofson
6f1641a5cc rlink: more indentation fixes
Remove unnecessary block scopes to reduce indentation level.

Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2011-08-10 06:52:08 +02:00
Andreas Fritiofson
068c9f266e rlink: fix indentation errors
Indentation was inconsistent and some lines not indented at all. Quickfix
using Eclipse's auto-indentation.

Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2011-08-10 06:52:08 +02:00
Drasko DRASKOVIC
827057f560 mips32 : Fixed memory byte access
Function mips_m4k_write_memory() does endianess byte swap,
but this procedure break one byte access (temporary array
overwrites content in buffer).
As a fix, this endianess swap and buffer affecting
is preformed only on hword and word accesses (not on byte access).
2011-08-09 23:17:28 +02:00
Drasko DRASKOVIC
c18e02387b mips32: Sync Caches to Make Instr Writes Effective
Pprogram that loads another program into memory is actually writing the
D- side cache.
The instructions it has loaded can't be executed until they reach the
I-cache.

After the instructions have been written, the loader should arrange to
write back any containing D-cache line and invalidate any locations
already in the I-cache.

For the MIPS Architecture Release2 cores, we can use synci command
that does this job.
For Release1 we must use "cache" instruction.
2011-08-09 23:17:28 +02:00
Drasko DRASKOVIC
1be7163408 mips32: Added CP0 coprocessor R/W routines
This patch adds MIPS32 CP0 coprocessor R/W routines,
as well as adequate commands to use these routines via
telnet interface.

Now is becomes possible to affect CP0 internal registers
and configure CPU directly from OpenOCD.
2011-08-09 23:17:28 +02:00
Drasko DRASKOVIC
800bc9308d mips_m4k: common_magic should be unsigned
For all architectures we use distinct common magic number,
and this should be a uint32_t type.
Otherwise, comparison with macros will yield compilation
warning.
2011-08-09 23:17:28 +02:00
Drasko DRASKOVIC
e1466df54d mips32: Removed Unnecessary JTAG Queue Flush
jtag_execute_queue() is executed as a part of mips_ejtag_drscan_32().
No need for this to be done before - removed for optimisation.
2011-08-09 23:17:28 +02:00
Rodrigo L. Rosa
194e3c5bc5 fix tapenabler return code
if tap enable/disable failed then a warning was written to the log, but JIM_OK was returned. if using openocd via a TCP interface to the TCL port, there is no way to catch that the command failed (it didn't enable the tap, so it failed)
now it return an error if it fails.
2011-08-09 20:59:40 +02:00
Rodrigo L. Rosa
d1a16ce9d6 fix return error msj
retval was not correctly propagated
2011-08-09 20:55:26 +02:00
Andreas Bießmann
6e5c37be29 flash/nor/cfi: fix TopBottom for atmel chips
There are some older atmel nor chips which have negated logic for
TopBottom detection. This patch adds a special handling for the old
chips. This is the same mechanism as implemented in linux kernel.

Signed-off-by: Andreas Bießmann <andreas.devel@gmail.com>
2011-08-09 20:19:37 +02:00
Øyvind Harboe
7d2bf8805d Revert "dsp5680xx: disable for now, it generates warnings"
This reverts commit d567df02b9.
2011-08-09 20:15:21 +02:00
Rodrigo L. Rosa
c2c19c5018 dsp5680xx fix constante ref
a counter was incorrectly set
when i added the macros i incorrectly called them.
fixed that.
2011-08-09 20:07:49 +02:00
Rodrigo L. Rosa
e8543de820 dsp5680xx fix FM clk
before doing anything with the flash module (FM) the clock divider must be set.
if erase_check was the first thing done with the FM after reset then an error would be generated because the clk divider was not set.
now erase_check sets the clk divider.
2011-08-09 20:07:46 +02:00
Rodrigo L. Rosa
ba68ae8bd5 dps5680xx fix warnings
reorganized code to get rid of compiler warnings
the warning were related to allignment, i do not get these warning on my build system (i've tried setting the compiler flag but it doesn't work, still working on why) so i cannot detect them (yet.)
2011-08-09 20:07:28 +02:00
Jean-Christophe PLAGNIOL-VILLARD
db87a2f375 Archive and recreate NEWS file.
Archive released NEWS file as NEWS-0.5.0.
Create new NEWS file from release script template.
2011-08-09 13:34:50 +08:00
Jean-Christophe PLAGNIOL-VILLARD
5920b15ff5 Bump minor version and add -dev tag.
Bump minor package version number: 0.5.0 -> 0.6.0
Add '-dev' version tag: 0.6.0 -> 0.6.0-dev
2011-08-09 13:34:50 +08:00
Jean-Christophe PLAGNIOL-VILLARD
2fced63147 The openocd 0.5.0 release.
Remove '-dev' version tag: 0.5.0-dev -> 0.5.0
2011-08-09 13:34:50 +08:00
Øyvind Harboe
bbd84417f6 arm11: disable broken optimization for setting current scan chain 2011-08-08 22:33:41 +02:00
Luca Bruno
0d7a948c8d Automatically generate ChangeLog from git log for release tarball
make dist should use git2cl to generate ChangeLog from git history,
populating the placeholder file in released tarball.

Signed-off-by: Luca Bruno <lucab@debian.org>
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-08-03 17:36:57 +01:00
B. A. Bryce
29f0ac0efd cfg: allow stellaris device class override
Some devices, eg. The Tempest class return the wrong device class
when queried. Add the ability to manually override the device class.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-08-02 13:10:03 +01:00
Jie Zhang
d02dfff48b etb: fix incorrect previous patchset
This corrects two issues found with openocd.
d7f71e7fe9 removed some code that was
being used.

The above then caused even more code to get removed by commit 1cfb2287a6.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-08-01 17:16:10 +01:00
Spencer Oliver
69ac20a155 cfg: support calling legacy stm32 scripts
For the time being we support the old stm32 script names - this will
be removed before the next release cycle.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-07-29 17:01:31 +01:00
Spencer Oliver
633b1a2b49 docs: remove obsolete luminary target info
The lm3s variant is not required as this is handled in the
target script - see tcl/target/stellaris.cfg.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-07-28 16:06:24 +01:00
Spencer Oliver
852289bc49 flash: add support for deprecated stm32 flash cmds
Issue warning when the old cmd is used and redirect to new supported one.
These deprecated cmds will be removed at some point.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-07-28 12:47:49 +01:00
Spencer Oliver
89f593d8cb cfg: update scripts to use new stm32 driver names
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-07-28 11:45:09 +01:00
Spencer Oliver
c73342fbe7 docs: update to use new stm32 driver names
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-07-28 11:44:48 +01:00
Spencer Oliver
b066a7db24 flash: update stm32 driver names
Use consistent names for the stm32 family flash drivers, eg.
stm32x -> stm32f1x
stm32f2xxx -> stm32f2x

this makes it easier to add support for newer stm32 families.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-07-28 11:42:27 +01:00
Spencer Oliver
b5a324e63c cfg: add Fujitsu FM3 config
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-07-27 10:56:25 +01:00
Spencer Oliver
1cfd3fdda9 doc: add Fujitsu FM3 flash driver info
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-07-27 10:28:24 +01:00
Jie Zhang
ba4b8af4d7 remove doc on the deprecated '-p' option
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-07-26 21:24:08 +01:00
Jie Zhang
577c3bc087 Update doc about Jim since it's not a single .C file and a single .H file any more
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-07-26 21:23:20 +01:00
Ronny Strutz
e872d2880e add Fujitsu FM3 Family flash support
Signed-off-by: Ronny Strutz <ronny@ewoks.de>
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-07-26 21:15:34 +01:00
Michael Hunold
d6c42bf312 CPU name in TMPA900 config file should obviously be TMPA900 (not TMPA910).
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-07-18 14:24:05 +01:00
Spencer Oliver
ffbb5cd85c build: do not install jimtcl
We now make use of the new jimtcl --disable-install-jim
Now we can install openocd without jimtcl bring installed.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-07-18 14:02:31 +01:00
Spencer Oliver
5e7c8d074c jimtcl: update to support --disable-install-jim
Update jimtcl version to commit 6233a6c5d39928f1bfafa8f41cb1ddf0c5a83de0
This enable to to build jimtcl as a submodule but not install it.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-07-18 14:01:05 +01:00
Øyvind Harboe
e7269e32a7 stm32f2xxx: comments about frequency choice 2011-07-15 12:05:46 +02:00
Luca Bruno
f44bde23b9 Do not append git info to version string when building from released tarball
When building official releases from tarball, git commit info is not
available in the building environment. Thus, automake should not try to
append the git commit to the version string.

Signed-off-by: Luca Bruno <lucab@debian.org>
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-07-14 10:19:18 +01:00
Spencer Oliver
0ea76bc778 ftd2xx: handle FT_GetLatencyTimer bug in v1.04
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-07-12 15:51:18 +01:00
Spencer Oliver
b765688be6 busblaster: Fix warnings when building against D2XX
The default is -Werror, so warnings become errors.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-07-12 14:40:19 +01:00
Steve Bennett
b238735f89 ft2232: Fix warnings when building against D2XX
The default is -Werror, so warnings become errors

Signed-off-by: Steve Bennett <steveb@workware.net.au>
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-07-12 12:58:28 +01:00
Steve Bennett
107ddb38b7 ftdi: update for latest libftdi 1.0.4
For libftd2xx1.0.4, which uses a different directory structure
than libftd2xx0.4.16
Without this fix the build fails with version 1.0.4 of the driver.

Note that this does not fix --with-ftd2xx-lib=shared

Signed-off-by: Steve Bennett <steveb@workware.net.au>
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-07-12 12:35:28 +01:00
Luca Bruno
898dd3af46 Fix typo in command output
Fix a bunch of minor typo in user facing output.

Signed-off-by: Luca Bruno <lucab@debian.org>
2011-07-10 17:00:57 +02:00
Drasko DRASKOVIC
ac43d7a69f mips_m4k and arm7_9 : Fix soft bkpt endianess for 16-bit instructions
The patch fix comparison of target data on the host by using
target_buffer_get_u16() to transform current_instr to
_host_ endianess before comparison.
2011-07-04 18:15:18 +02:00
711 changed files with 76127 additions and 45893 deletions

4
.gitignore vendored
View File

@@ -79,6 +79,7 @@ NOTES
# coexist with quilt
patches
*.patch
# Eclipse stuff
.project
@@ -88,5 +89,8 @@ patches
# Emacs temp files
*~
# Emacs TAGS file
TAGS
# CScope database files
*cscope.out

4
BUGS
View File

@@ -4,7 +4,7 @@
Please report bugs by subscribing to the OpenOCD mailing list and
posting a message with your report:
openocd-development@lists.berlios.de
openocd-devel@lists.sourceforge.net
Also, please check the Trac bug database to see if a ticket for
the bug has already been opened. You might be asked to open
@@ -32,7 +32,7 @@ that may be important.
http://www.kernel.org/pub/software/scm/git/docs/git-bisect.html
If possible, please develop and attach a patch that helps to expose or
solve the reported problem. See the PATCHES.txt file for information
solve the reported problem. See the HACKING file for information
about that process.
Attach all files directly to your posting. The mailing list knows to

View File

@@ -2,7 +2,7 @@
Version 2, June 1991
Copyright (C) 1989, 1991 Free Software Foundation, Inc.
59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
Everyone is permitted to copy and distribute verbatim copies
of this license document, but changing it is not allowed.

View File

@@ -307,13 +307,13 @@ EXTRACT_PRIVATE = NO
# If the EXTRACT_STATIC tag is set to YES all static members of a file
# will be included in the documentation.
EXTRACT_STATIC = NO
EXTRACT_STATIC = YES
# If the EXTRACT_LOCAL_CLASSES tag is set to YES classes (and structs)
# defined locally in source files will be included in the documentation.
# If set to NO only classes defined in header files are included.
EXTRACT_LOCAL_CLASSES = NO
EXTRACT_LOCAL_CLASSES = YES
# This flag is only useful for Objective-C code. When set to YES local
# methods, which are defined in the implementation section but not in
@@ -567,7 +567,7 @@ WARN_LOGFILE =
INPUT = @srcdir@/doc/manual \
@srcdir@/TODO \
@srcdir@/BUGS \
@srcdir@/PATCHES.txt \
@srcdir@/HACKING \
@srcdir@/src \
@builddir@/config.h

194
HACKING
View File

@@ -1,56 +1,178 @@
Submitting patches to the OpenOCD mailing list:
// This file is part of the Doxygen Developer Manual
/** @page patchguide Patch Guidelines
By the time you have read this, one supposes that
you have figured out how to clone the OpenOCD git
repository.
\attention If you're behind a corporate wall with http only access to the
world, you can still use these instructions!
Below is a basic workflow and specific instructions
to get you going with git and patches.
\attention You can't send patches to the mailing list anymore at all. Nowadays
you are expected to send patches to the OpenOCD Gerrit GIT server for a
review.
0. Clone the git repository, rather than just
download the source.
@section gerrit Submitting patches to the OpenOCD Gerrit server
git clone git://openocd.git.sourceforge.net/gitroot/openocd/openocd
OpenOCD is to some extent a "self service" open source project, so to
contribute, you must follow the standard procedures to have the best
possible chance to get your changes accepted.
or if you have problems with the "git:" protocol, use
the slower http protocol:
The procedure to create a patch is essentially:
git clone http://repo.or.cz/r/openocd.git
- make the changes
- create a commit
- send the changes to the Gerrit server for review
- correct the patch and re-send it according to review feedback
1. Set up git with your name and email:
Your patch (or commit) should be a "good patch": focus it on a single
issue, and make it be easily reviewable. Don't make
it so large that it's hard to review; split large
patches into smaller ones. (That can also help
track down bugs later on.) All patches should
be "clean", which includes preserving the existing
coding style and updating documentation as needed.
Say in the commit message if it's a bugfix (describe the bug) or a new
feature. Don't expect patches to merge immediately
for the next release. Be ready to rework patches
in response to feedback.
Add yourself to the GPL copyright for non-trivial changes.
@section stepbystep Step by step procedure
-# Create a Gerrit account at: http://openocd.zylin.com
- On subsequent sign ins, use the full URL prefaced with 'http://'
For example: http://user_identifier.open_id_provider.com
-# Add a username to your profile.
After creating the Gerrit account and signing in, you will need to
add a username to your profile. To do this, go to 'Settings', and
add a username of your choice.
Your username will be required in step 3 and substituted wherever
the string 'USERNAME' is found.
-# Create an SSH public key following the directions on github:
https://help.github.com/articles/generating-ssh-keys . You can skip step 3
(adding key to Github account) and 4 (testing) - these are useful only if
you actually use Github or want to test whether the new key works fine.
-# Add this new SSH key to your Gerrit account:
go to 'Settings' > 'SSH Public Keys', paste the contents of
~/.ssh/id_rsa.pub into the text field (if it's not visible click on
'Add Key ...' button) and confirm by clicking 'Add' button.
-# Clone the git repository, rather than just download the source:
@code
git clone git://git.code.sf.net/p/openocd/code openocd
@endcode
or if you have problems with the "git:" protocol, use
the slower http protocol:
@code
git clone http://git.code.sf.net/p/openocd/code openocd
@endcode
-# Set up Gerrit with your local repository. All this does it
to instruct git locally how to send off the changes.
-# Add a new remote to git using Gerrit username:
@code
git remote add review ssh://USERNAME@openocd.zylin.com:29418/openocd.git
git config remote.review.push HEAD:refs/publish/master
@endcode
Or with http only:
@code
git remote add review http://USERNAME@openocd.zylin.com/p/openocd.git
git config remote.review.push HEAD:refs/publish/master
@endcode
The http password is configured from your gerrit settings - http://openocd.zylin.com/#/settings/http-password.
\note If you want to simplify http access you can also add your http password to the url as follows:
@code
git remote add review http://USERNAME:PASSWORD@openocd.zylin.com/p/openocd.git
@endcode
-# You will need to install this hook, we will look into a better solution:
@code
scp -p -P 29418 USERNAME@openocd.zylin.com:hooks/commit-msg .git/hooks/
@endcode
Or with http only:
@code
wget http://openocd.zylin.com/tools/hooks/commit-msg
mv commit-msg .git/hooks
chmod +x .git/hooks/commit-msg
@endcode
\note A script exists to simplify the two items above. execute:
@code
tools/initial.sh <username>
@endcode
With @<username@> being your Gerrit username.
-# Set up git with your name and email:
@code
git config --global user.name "John Smith"
git config --global user.email "john@smith.org"
2. Work on your patches. Split the work into
multiple small patches that can be reviewed and
applied seperately and safely to the OpenOCD
repository.
@endcode
-# Work on your patches. Split the work into
multiple small patches that can be reviewed and
applied seperately and safely to the OpenOCD
repository.
@code
while(!done) {
work - edit files using your favorite editor.
run "git commit -a" to commit all changes.
run "git commit -s -a" to commit all changes.
run tools/checkpatch.sh to verify your patch style is ok.
}
@endcode
\note use "git add ." before commit to add new files.
TIP! use "git add ." before commit to add new files.
--- example comment, notice the short first line w/topic ---
topic: short comment
Comment template, notice the short first line w/topic. The topic field
should identify the main part or subsystem the patch touches. Check
git log for examples.
@code
topic: Short comment
<blank line>
longer comments over several
lines...
-----
Longer comments over several lines, explaining (where applicable) the
reason for the patch and the general idea the solution is based on,
any major design decisions, etc...
<blank line>
Signed-off-by: ...
@endcode
-# Next you need to make sure that your patches
are on top of the latest stuff on the server and
that there are no conflicts:
@code
git pull --rebase origin master
@endcode
-# Send the patches to the Gerrit server for review:
@code
git push review
@endcode
-# Forgot something, want to add more? Just make the changes and do:
@code
git commit --amend
git push review
@endcode
3. Next you need to make sure that your patches
are on top of the latest stuff on the server and
that there are no conflicts.
Further reading: http://www.coreboot.org/Git
git pull --rebase
@section timeline When can I expect my contribution to be committed?
4. Generate the patch files. This will generate
patches for all commits that are on top of
the latest stuff on the server:
The code review is intended to take as long as a week or two to allow
maintainers and contributors who work on OpenOCD only in their spare
time oportunity to perform a review and raise objections.
git format-patch origin/master
With Gerrit much of the urgency of getting things committed has been
removed as the work in progress is safely stored in Gerrit and
available if someone needs to build on your work before it is
submitted to the official repository.
5. Email the patches to openocd-development@lists.berlios.de
Another factor that contributes to the desire for longer cool-off
times (the time a patch lies around without any further changes or
comments), it means that the chances of quality regression on the
master branch will be much reduced.
If a contributor pushes a patch, it is considered good form if another
contributor actually approves and submits that patch.
It should be noted that a negative review in Gerrit ("-1" or "-2") may (but does
not have to) be disregarded if all conditions listed below are met:
- the concerns raised in the review have been addressed (or explained),
- reviewer does not re-examine the change in a month,
- reviewer does not answer e-mails for another month.
@section browsing Browsing Patches
All OpenOCD patches can be reviewed <a href="http://openocd.zylin.com/">here</a>.
*/
/** @file
This file contains the @ref patchguide page.
*/

View File

@@ -3,7 +3,7 @@
AUTOMAKE_OPTIONS = gnu 1.6
# make sure we pass the correct jimtcl flags to distcheck
DISTCHECK_CONFIGURE_FLAGS = --with-jim-ext=nvp --disable-lineedit
DISTCHECK_CONFIGURE_FLAGS = --disable-install-jim
nobase_dist_pkgdata_DATA = \
contrib/libdcc/dcc_stdio.c \
@@ -24,7 +24,6 @@ EXTRA_DIST = \
BUGS \
HACKING \
NEWTAPS \
PATCHES.txt \
README.Win32 \
Doxyfile.in \
tools/logger.pl \
@@ -64,10 +63,13 @@ $(THE_MANUAL): %.pdf: %.tex
TCL_PATH = tcl
# command to find paths of script files, relative to TCL_PATH
TCL_FILES = find $(srcdir)/$(TCL_PATH) -name '*.cfg' -o -name '*.tcl' | \
TCL_FILES = find $(srcdir)/$(TCL_PATH) -name '*.cfg' -o -name '*.tcl' -o -name '*.txt' | \
sed -e 's,^$(srcdir)/$(TCL_PATH),,'
dist-hook:
if test -d $(srcdir)/.git -a \( ! -e $(distdir)/ChangeLog -o -w $(distdir)/ChangeLog \) ; then \
git --git-dir $(srcdir)/.git log | $(srcdir)/tools/git2cl/git2cl > $(distdir)/ChangeLog ; \
fi
for i in $$($(TCL_FILES)); do \
j="$(distdir)/$(TCL_PATH)/$$i" && \
mkdir -p "$$(dirname $$j)" && \

51
NEWS
View File

@@ -1,61 +1,17 @@
This file includes highlights of the changes made in the
OpenOCD 0.5.0 source archive release. See the repository
history for details about what changed, including bugfixes
and other issues not mentioned here.
OpenOCD source archive release. See the
repository history for details about what changed, including
bugfixes and other issues not mentioned here.
JTAG Layer:
New driver for "Bus Pirate"
Rename various commands so they're not JTAG-specific
There are migration procedures for most of these, but you should
convert your scripts to the new names, since those procedures
will not be around forever.
jtag jinterface ... is now adapter_name
jtag_khz ... is now adapter_khz
jtag_nsrst_delay ... is now adapter_nsrst_delay
jtag_nsrst_assert_width ... is now adapter_nsrst_assert_width
Support Voipac VPACLink JTAG Adapter.
Boundary Scan:
Transport framework core ... supporting future work for SWD, SPI, and other
non-JTAG ways to debug targets or program flash.
Target Layer:
ARM:
- basic semihosting support for ARMv7M.
- renamed "armv7m" command prefix as "arm"
MIPS:
- "ejtag_srst" variant removed. The same functionality is
obtained by using "reset_config none".
- added PIC32MX software reset support, this means srst is not
required to be connected anymore.
OTHER:
- preliminary AVR32 AP7000 support.
Flash Layer:
New "stellaris recover" command, implements the procedure
to recover locked devices (restoring non-volatile
state to the factory defaults, including erasing
the flash and its protection bits, and possibly
re-enabling hardware debugging).
PIC32MX now uses algorithm for flash programming, this
has increased the performance by approx 96%.
New 'pic32mx unlock' cmd to remove readout protection.
New STM32 Value Line Support.
New 'virtual' flash driver, used to associate other addresses
with a flash bank. See pic32mx.cfg for usage.
New iMX27 NAND flash controller driver.
Board, Target, and Interface Configuration Scripts:
Support IAR LPC1768 kickstart board (by Olimex)
Support Voipac PXA270/PXA270M module.
New $PARPORTADDR tcl variable used to change default
parallel port address used.
Remove lm3s811.cfg; use "stellaris.cfg" instead
Core Jim/TCL Scripting:
New "add_script_search_dir" command, behaviour is the same
as the "-s" cmd line option.
Documentation:
@@ -71,4 +27,3 @@ For older NEWS, see the NEWS files associated with each release
For more information about contributing test reports, bug fixes, or new
features and device support, please read the new Developer Manual (or
the BUGS and PATCHES.txt files in the source archive).

74
NEWS-0.5.0 Normal file
View File

@@ -0,0 +1,74 @@
This file includes highlights of the changes made in the
OpenOCD 0.5.0 source archive release. See the repository
history for details about what changed, including bugfixes
and other issues not mentioned here.
JTAG Layer:
New driver for "Bus Pirate"
Rename various commands so they're not JTAG-specific
There are migration procedures for most of these, but you should
convert your scripts to the new names, since those procedures
will not be around forever.
jtag jinterface ... is now adapter_name
jtag_khz ... is now adapter_khz
jtag_nsrst_delay ... is now adapter_nsrst_delay
jtag_nsrst_assert_width ... is now adapter_nsrst_assert_width
Support Voipac VPACLink JTAG Adapter.
Boundary Scan:
Transport framework core ... supporting future work for SWD, SPI, and other
non-JTAG ways to debug targets or program flash.
Target Layer:
ARM:
- basic semihosting support for ARMv7M.
- renamed "armv7m" command prefix as "arm"
MIPS:
- "ejtag_srst" variant removed. The same functionality is
obtained by using "reset_config none".
- added PIC32MX software reset support, this means srst is not
required to be connected anymore.
OTHER:
- preliminary AVR32 AP7000 support.
Flash Layer:
New "stellaris recover" command, implements the procedure
to recover locked devices (restoring non-volatile
state to the factory defaults, including erasing
the flash and its protection bits, and possibly
re-enabling hardware debugging).
PIC32MX now uses algorithm for flash programming, this
has increased the performance by approx 96%.
New 'pic32mx unlock' cmd to remove readout protection.
New STM32 Value Line Support.
New 'virtual' flash driver, used to associate other addresses
with a flash bank. See pic32mx.cfg for usage.
New iMX27 NAND flash controller driver.
Board, Target, and Interface Configuration Scripts:
Support IAR LPC1768 kickstart board (by Olimex)
Support Voipac PXA270/PXA270M module.
New $PARPORTADDR tcl variable used to change default
parallel port address used.
Remove lm3s811.cfg; use "stellaris.cfg" instead
Core Jim/TCL Scripting:
New "add_script_search_dir" command, behaviour is the same
as the "-s" cmd line option.
Documentation:
Build and Release:
For more details about what has changed since the last release,
see the git repository history. With gitweb, you can browse that
in various levels of detail.
For older NEWS, see the NEWS files associated with each release
(i.e. NEWS-<version>).
For more information about contributing test reports, bug fixes, or new
features and device support, please read the new Developer Manual (or
the BUGS and PATCHES.txt files in the source archive).

54
NEWS-0.6.0 Normal file
View File

@@ -0,0 +1,54 @@
This file includes highlights of the changes made in the
OpenOCD source archive release. See the
repository history for details about what changed, including
bugfixes and other issues not mentioned here.
JTAG Layer:
New STLINK V1/V2 JTAG/SWD adapter support.
New OSJTAG adapter support.
New Tincantools Flyswatter2 support.
Improved ULINK driver.
Improved RLINK driver.
Support for adapters based on FT232H chips.
New experimental driver for FTDI based adapters, using libusb-1.0 in asynchronous mode.
Boundary Scan:
Target Layer:
New Cortex-M0 support.
New Cortex-M4 support.
Improved Working area algorithm.
New RTOS support. Currently linux, FreeRTOS, ThreadX and eCos.
Connecting under reset to Cortex-Mx and MIPS chips.
Flash Layer:
New SST39WF1601 support.
New EN29LV800BB support.
New async algorithm support for selected targets, stm32, stellaris and pic32.
New Atmel SAM3S, SAM3N support.
New ST STM32L support.
New Microchip PIC32MX1xx/2xx support.
New Freescale Kinetis K40 support.
Board, Target, and Interface Configuration Scripts:
Support Dangerous Prototypes Bus Blaster.
Support ST SPEAr Family.
Support Gumstix Verdex boards.
Support TI Beaglebone.
Documentation:
Improved HACKING info for submitting patches.
Fixed numerous broken links.
Build and Release:
For more details about what has changed since the last release,
see the git repository history. With gitweb, you can browse that
in various levels of detail.
For older NEWS, see the NEWS files associated with each release
(i.e. NEWS-<version>).
For more information about contributing test reports, bug fixes, or new
features and device support, please read the new Developer Manual (or
the BUGS and PATCHES.txt files in the source archive).

View File

@@ -4,7 +4,7 @@ Reporting Unknown JTAG TAP IDS
If OpenOCD reports an UNKNOWN or Unexpected Tap ID please report it to
the development mailing list - However - keep reading.
openocd-development@lists.berlios.de.
openocd-devel@lists.sourceforge.net.
========================================

View File

@@ -1,47 +0,0 @@
// This file is part of the Doxygen Developer Manual
/** @page patchguide Patch Guidelines
Please mail patches to: @par
openocd-development@lists.berlios.de
Note that you can't send patches to that list unless
you're a member, despite what the list info page says.
@section Patch Guidelines in a Nutshell
Your patches should be against git mainline. Submit output
of "git diff"; equivalently, quilt patches are OK.
It should be a "good patch": focus it on a single
issue, and make it be easily reviewable. Don't make
it so large that it's hard to review; split large
patches into smaller ones. (That can also help
track down bugs later on.) All patches should
be "clean", which includes preserving the existing
coding style and updating documentation as needed.j
Attach the patch to the email as a .txt file and
also write a short change log entry that maintainers
can copy and paste into the commit message
Say if it's a bugfix (describe the bug) or a new
feature. Don't expect patches to merge immediately
for the next release. Be ready to rework patches
in response to feedback.
Add yourself to the GPL copyright for non-trivial changes.
To create a patch from the command line:
@code
git diff >mypatch.txt
@endcode
@section More Information on Patching
The @ref primerpatches provides a more complete guide to creating,
managing, and contributing patches to the OpenOCD project.
*/
/** @file
This file contains the @ref patchguide page.
*/

84
README
View File

@@ -23,10 +23,10 @@ In addition to in-tree documentation, the latest documentation may be
viewed on-line at the following URLs:
OpenOCD User's Guide:
http://openocd.berlios.de/doc/html/index.html
http://openocd.sourceforge.net/doc/html/index.html
OpenOCD Developer's Manual:
http://openocd.berlios.de/doc/doxygen/index.html
http://openocd.sourceforge.net/doc/doxygen/html/index.html
These reflect the latest development versions, so the following section
introduces how to build the complete documentation from the package.
@@ -35,7 +35,7 @@ introduces how to build the complete documentation from the package.
For more information, refer to these documents or contact the developers
by subscribing to the OpenOCD developer mailing list:
openocd-development@lists.berlios.de
openocd-devel@lists.sourceforge.net
Building the OpenOCD Documentation
----------------------------------
@@ -210,53 +210,90 @@ options may be available there:
--enable-dummy Enable building the dummy JTAG port driver
--enable-parport Enable building the pc parallel port driver
--disable-parport-ppdev Disable use of ppdev (/dev/parportN) for parport
(for x86 only)
--enable-parport-giveio Enable use of giveio for parport (for CygWin only)
--enable-ftdi Enable building support for the MPSSE mode of FTDI
based devices, using libusb-1.0 in asynchronous mode
--enable-ft2232_libftdi Enable building support for FT2232 based devices
using the libftdi driver, opensource alternate of
FTD2XX
--enable-ft2232_ftd2xx Enable building support for FT2232 based devices
using the FTD2XX driver from ftdichip.com
--enable-usb_blaster_libftdi
Enable building support for the Altera USB-Blaster
using the libftdi driver, opensource alternate of
FTD2XX
--enable-usb_blaster_ftd2xx
Enable building support for the Altera USB-Blaster
using the FTD2XX driver from ftdichip.com
--enable-amtjtagaccel Enable building the Amontec JTAG-Accelerator driver
--enable-zy1000-master Use ZY1000 JTAG master registers
--enable-zy1000 Enable ZY1000 interface
--enable-ioutil Enable ioutil functions - useful for standalone
OpenOCD implementations
--enable-ep93xx Enable building support for EP93xx based SBCs
--enable-at91rm9200 Enable building support for AT91RM9200 based SBCs
--enable-gw16012 Enable building support for the Gateworks GW16012
JTAG Programmer
--enable-parport Enable building the pc parallel port driver
--disable-parport-ppdev Disable use of ppdev (/dev/parportN) for parport
(for x86 only)
--enable-parport-giveio Enable use of giveio for parport (for CygWin only)
--enable-presto_libftdi Enable building support for ASIX Presto Programmer
using the libftdi driver
--enable-presto_ftd2xx Enable building support for ASIX Presto Programmer
using the FTD2XX driver
--enable-amtjtagaccel Enable building the Amontec JTAG-Accelerator driver
--enable-arm-jtag-ew Enable building support for the Olimex ARM-JTAG-EW
--enable-usbprog Enable building support for the usbprog JTAG
Programmer
--enable-oocd_trace Enable building support for some prototype
OpenOCD+trace ETM capture hardware
--enable-jlink Enable building support for the Segger J-Link JTAG
Programmer
--enable-vsllink Enable building support for the Versaloon-Link JTAG
Programmer
--enable-rlink Enable building support for the Raisonance RLink
JTAG Programmer
--enable-ulink Enable building support for the Keil ULINK JTAG
Programmer
--enable-usbprog Enable building support for the usbprog JTAG
Programmer
--enable-vsllink Enable building support for the Versaloon-Link JTAG
--enable-arm-jtag-ew Enable building support for the Olimex ARM-JTAG-EW
Programmer
--enable-oocd_trace Enable building support for the OpenOCD+trace ETM
capture device
--enable-buspirate Enable building support for the Buspirate
--enable-ep93xx Enable building support for EP93xx based SBCs
--enable-at91rm9200 Enable building support for AT91RM9200 based SBCs
--enable-stlink Enable building support for the ST-Link JTAG
Programmer
--enable-ti-icdi Enable building support for the TI/Stellaris ICDI
JTAG Programmer
--enable-ecosboard Enable building support for eCos based JTAG debugger
--enable-zy1000 Enable ZY1000 interface
--enable-osbdm Enable building support for the OSBDM (JTAG only)
Programmer
--enable-opendous Enable building support for the estick/opendous JTAG
Programmer
--enable-sysfsgpio Enable building support for programming driven via
sysfs gpios.
--enable-minidriver-dummy
Enable the dummy minidriver.
--enable-ioutil Enable ioutil functions - useful for standalone
OpenOCD implementations
--disable-internal-jimtcl
Disable building internal jimtcl
--enable-libusb0 Use libusb-0.1 library for USB JTAG devices
--enable-remote-bitbang Enable building support for the Remote Bitbang jtag
driver
--disable-doxygen-html Disable building Doxygen manual as HTML.
--enable-doxygen-pdf Enable building Doxygen manual as PDF.
@@ -386,7 +423,7 @@ Obtaining OpenOCD From GIT
You can download the current GIT version with a GIT client of your
choice from the main repository:
git://openocd.git.sourceforge.net/gitroot/openocd/openocd
git://git.code.sf.net/p/openocd/code
You may prefer to use a mirror:
@@ -397,7 +434,7 @@ Using the GIT command line client, you might use the following command
to set up a local copy of the current repository (make sure there is no
directory called "openocd" in the current directory):
git clone git://openocd.git.sourceforge.net/gitroot/openocd/openocd
git clone git://git.code.sf.net/p/openocd/code openocd
Then you can update that at your convenience using
@@ -406,7 +443,6 @@ Then you can update that at your convenience using
There is also a gitweb interface, which you can use either to browse
the repository or to download arbitrary snapshots using HTTP:
http://openocd.git.sourceforge.net/git/gitweb.cgi?p=openocd/openocd
http://repo.or.cz/w/openocd.git
Snapshots are compressed tarballs of the source tree, about 1.3 MBytes

1
TODO
View File

@@ -214,7 +214,6 @@ https://lists.berlios.de/pipermail/openocd-development/2009-October/011506.html
- finish documentation for the following flash drivers:
- avr
- ecosflash
- pic32mx
- ocl
- str9xpec

View File

@@ -2,6 +2,7 @@
# common flags used in openocd build
AM_CPPFLAGS = -I$(top_srcdir)/src \
-I$(top_builddir)/src \
-I$(top_srcdir)/src/helper \
-DPKGDATADIR=\"$(pkgdatadir)\" \
-DPKGLIBDIR=\"$(pkglibdir)\"

File diff suppressed because it is too large Load Diff

View File

@@ -7,13 +7,13 @@ $comment = "// Autogenerated by contrib/gen-stellaris-part-header.pl
// From Stellaris Firmware Development Package revision";
$struct_header = "static struct {
uint32_t partno;
uint8_t class;
uint8_t partno;
const char *partname;
} StellarisParts[] =
{
} StellarisParts[] = {
";
$struct_footer = "\t{0,\"Unknown part\"}\n};\n";
$struct_footer = "\t{0xFF, 0x00, \"Unknown Part\"}\n};\n";
$#ARGV == 1 || die "Usage: $0 <inc directory> <output file>\n";
-d $ARGV[0] || die $ARGV[0]." is not a directory\n";
@@ -26,13 +26,11 @@ opendir(DIR, $dir) || die "can't open $dir: $!";
@files = readdir(DIR);
closedir(DIR);
@short_files = sort(grep(/lm3s...\.h/, @files));
@long_files = sort(grep(/lm3s....\.h/, @files));
@header_files = sort(grep(/lm.+\.h/, @files));
$ver = 0;
$new_struct = $struct_header;
process_file(@short_files);
process_file(@long_files);
process_file(@header_files);
$new_struct .= $struct_footer;
$dump = "$comment $ver\n$new_struct";
@@ -51,7 +49,7 @@ close(OUTPUT);
sub process_file {
foreach $h_file (@_) {
($base) = ($h_file =~ m/lm3s(.{3,4})\.h/ig);
($base) = ($h_file =~ m/lm..(.{3,7})\.h/ig);
$base = uc($base);
local($/, *FILE);
open(FILE, "$dir/$h_file");
@@ -66,22 +64,39 @@ sub process_file {
$ver = $1;
}
}
if ($content =~ /SYSCTL_DID1_VER_[^M]\s+0x(\S+)/) {
$did1_ver = hex($1);
if ($content =~ /SYSCTL_DID0_CLASS_[^M].+?0x(\S+)/s) {
$class = hex($1) >> 16;
} else {
print STDERR "$h_file is missing SYSCTL_DID1_VER\n";
$did1_ver = 255;
$invalid = 1;
# attempt another way to get class
if ($content =~ /\s(\S+)-class/) {
$class = getclass($1);
if ($class eq 0xFF) {
print STDERR "$h_file unknown class\n";
$invalid = 1;
}
} else {
print STDERR "$h_file is missing SYSCTL_DID0_CLASS_\n";
$class = 0;
$invalid = 1;
}
}
if ($content =~ /SYSCTL_DID1_PRTNO_$base\s+0x(\S+)/) {
if ($content =~ /SYSCTL_DID1_PRTNO_$base.+0x(\S+)/) {
$prtno = hex($1);
$base = "LM3S" . $base;
} else {
print STDERR "$h_file is missing SYSCTL_DID1_PRTNO\n";
$prtno = 0;
$invalid = 1;
# LM4F have a changed header
if ($content =~ /SYSCTL_DID1_PRTNO_LM4F$base.+?0x(\S+)/s) {
$prtno = hex($1);
$base = "LM4F" . $base;
} else {
print STDERR "$h_file is missing SYSCTL_DID1_PRTNO\n";
$prtno = 0;
$invalid = 1;
}
}
$id = ($did1_ver | $prtno) >> 16;
$new_member = sprintf "{0x%04X,\"LM3S%s\"},", $id, $base;
$new_member = sprintf "{0x%02X, 0x%02X, \"%s\"},", $class, $prtno >> 16, $base;
if ($invalid == 1) {
#$new_struct .= "\t//$new_member\t// Invalid\n";
} else {
@@ -89,3 +104,21 @@ sub process_file {
}
}
}
sub getclass {
$class = $_[0];
if ($class =~ /Sandstorm/i) {
return 0;
} elsif ($class =~ /Fury/i) {
return 1;
} elsif ($class =~ /DustDevil/i) {
return 3;
} elsif ($class =~ /Tempest/i) {
return 4;
} elsif ($class =~ /Blizzard/i) {
return 5;
} elsif ($class =~ /Firestorm/i) {
return 6;
}
return 0xFF;
}

View File

@@ -29,9 +29,9 @@
#define TARGET_REQ_DEBUGMSG_HEXMSG(size) (0x01 | ((size & 0xff) << 8))
#define TARGET_REQ_DEBUGCHAR 0x02
#if defined(__ARM_ARCH_7M__)
#if defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_6SM__)
/* we use the cortex_m3 DCRDR reg to simulate a arm7_9 dcc channel
/* we use the System Control Block DCRDR reg to simulate a arm7_9 dcc channel
* DCRDR[7:0] is used by target for status
* DCRDR[15:8] is used by target for write buffer
* DCRDR[23:16] is used for by host for status

View File

@@ -26,41 +26,46 @@
.text
.syntax unified
.arch armv7-m
.cpu cortex-m0
.thumb
.thumb_func
.align 2
_start:
main:
main:
mov r2, r0
mov r0, #0xffffffff /* crc */
movs r0, #0
mvns r0, r0
ldr r6, CRC32XOR
mov r3, r1
mov r4, #0
movs r4, #0
b ncomp
nbyte:
ldrb r1, [r2, r4]
ldr r7, CRC32XOR
eor r0, r0, r1, asl #24
mov r5, #0
lsls r1, r1, #24
eors r0, r0, r1
movs r5, #0
loop:
cmp r0, #0
mov r6, r0, asl #1
add r5, r5, #1
mov r0, r6
it lt
eorlt r0, r6, r7
bge notset
lsls r0, r0, #1
eors r0, r0, r6
b cont
notset:
lsls r0, r0, #1
cont:
adds r5, r5, #1
cmp r5, #8
bne loop
add r4, r4, #1
adds r4, r4, #1
ncomp:
cmp r4, r3
bne nbyte
bkpt #0
.align 2
CRC32XOR: .word 0x04c11db7
.end

View File

@@ -0,0 +1,41 @@
/***************************************************************************
* Copyright (C) 2010 by Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
/*
parameters:
r0 - address in
r1 - byte count
r2 - mask - result out
*/
.text
.arm
loop:
ldrb r3, [r0], #1
and r2, r2, r3
subs r1, r1, #1
bne loop
end:
bkpt #0
CRC32XOR: .word 0x04c11db7
.end

View File

@@ -18,41 +18,28 @@
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
.text
.syntax unified
.cpu cortex-m3
.thumb
.thumb_func
.global write
/*
r0 - source address
r1 - target address
r2 - count (halfword-16bit)
r3 - sector offet in : result out
r4 - flash base
parameters:
r0 - address in
r1 - byte count
r2 - mask - result out
*/
#define STM32_FLASH_CR_OFFSET 0x10 /* offset of CR register in FLASH struct */
#define STM32_FLASH_SR_OFFSET 0x0c /* offset of CR register in FLASH struct */
.text
.syntax unified
.cpu cortex-m0
.thumb
.thumb_func
write:
ldr r4, STM32_FLASH_BASE
add r4, r3 /* add offset 0x00 for sector 0 : 0x40 for sector 1 */
write_half_word:
movs r3, #0x01
str r3, [r4, #STM32_FLASH_CR_OFFSET] /* PG (bit0) == 1 => flash programming enabled */
ldrh r3, [r0], #0x02 /* read one half-word from src, increment ptr */
strh r3, [r1], #0x02 /* write one half-word from src, increment ptr */
busy:
ldr r3, [r4, #STM32_FLASH_SR_OFFSET]
tst r3, #0x01 /* BSY (bit0) == 1 => operation in progress */
beq busy /* wait more... */
tst r3, #0x14 /* PGERR (bit2) == 1 or WRPRTERR (bit4) == 1 => error */
bne exit /* fail... */
subs r2, r2, #0x01 /* decrement counter */
bne write_half_word /* write next half-word if anything left */
exit:
bkpt #0x00
.align 2
STM32_FLASH_BASE: .word 0x40022000 /* base address of FLASH struct */
loop:
ldrb r3, [r0]
adds r0, #1
ands r2, r2, r3
subs r1, r1, #1
bne loop
end:
bkpt #0
.end

View File

@@ -0,0 +1,60 @@
/***************************************************************************
* Copyright (C) 2013 by Henrik Nilsson *
* henrik.nilsson@bytequest.se *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
.text
.syntax unified
.arch armv7-m
.thumb
.thumb_func
.align 4
/* Inputs:
* r0 buffer address
* r1 NAND data address (byte wide)
* r2 buffer length
*/
read:
ldrb r3, [r1]
strb r3, [r0], #1
subs r2, r2, #1
bne read
done_read:
bkpt #0
.align 4
/* Inputs:
* r0 NAND data address (byte wide)
* r1 buffer address
* r2 buffer length
*/
write:
ldrb r3, [r1], #1
strb r3, [r0]
subs r2, r2, #1
bne write
done_write:
bkpt #0
.end

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/***************************************************************************
* Copyright (C) 2011 by Andreas Fritiofson *
* andreas.fritiofson@gmail.com *
* Copyright (C) 2013 by Roman Dmitrienko *
* me@iamroman.org *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
.text
.syntax unified
.cpu cortex-m0
.thumb
.thumb_func
/* Params:
* r0 - flash base (in), status (out)
* r1 - count (word-32bit)
* r2 - workarea start
* r3 - workarea end
* r4 - target address
* Clobbered:
* r5 - rp
* r6 - wp, tmp
* r7 - tmp
*/
/* offsets of registers from flash reg base */
#define EFM32_MSC_WRITECTRL_OFFSET 0x008
#define EFM32_MSC_WRITECMD_OFFSET 0x00c
#define EFM32_MSC_ADDRB_OFFSET 0x010
#define EFM32_MSC_WDATA_OFFSET 0x018
#define EFM32_MSC_STATUS_OFFSET 0x01c
#define EFM32_MSC_LOCK_OFFSET 0x03c
/* unlock MSC */
ldr r6, =#0x1b71
str r6, [r0, #EFM32_MSC_LOCK_OFFSET]
/* set WREN to 1 */
movs r6, #1
str r6, [r0, #EFM32_MSC_WRITECTRL_OFFSET]
wait_fifo:
ldr r6, [r2, #0] /* read wp */
cmp r6, #0 /* abort if wp == 0 */
beq exit
ldr r5, [r2, #4] /* read rp */
cmp r5, r6 /* wait until rp != wp */
beq wait_fifo
/* store address in MSC_ADDRB */
str r4, [r0, #EFM32_MSC_ADDRB_OFFSET]
/* set LADDRIM bit */
movs r6, #1
str r6, [r0, #EFM32_MSC_WRITECMD_OFFSET]
/* check status for INVADDR and/or LOCKED */
ldr r6, [r0, #EFM32_MSC_STATUS_OFFSET]
movs r7, #6
tst r6, r7
bne error
/* wait for WDATAREADY */
wait_wdataready:
ldr r6, [r0, #EFM32_MSC_STATUS_OFFSET]
movs r7, #8
tst r6, r7
beq wait_wdataready
/* load data to WDATA */
ldr r6, [r5]
str r6, [r0, #EFM32_MSC_WDATA_OFFSET]
/* set WRITEONCE bit */
movs r6, #8
str r6, [r0, #EFM32_MSC_WRITECMD_OFFSET]
adds r5, #4 /* rp++ */
adds r4, #4 /* target_address++ */
/* wait until BUSY flag is reset */
busy:
ldr r6, [r0, #EFM32_MSC_STATUS_OFFSET]
movs r7, #1
tst r6, r7
bne busy
cmp r5, r3 /* wrap rp at end of buffer */
bcc no_wrap
mov r5, r2
adds r5, #8
no_wrap:
str r5, [r2, #4] /* store rp */
subs r1, r1, #1 /* decrement word count */
cmp r1, #0
beq exit /* loop if not done */
b wait_fifo
error:
movs r0, #0
str r0, [r2, #4] /* set rp = 0 on error */
exit:
mov r0, r6 /* return status in r0 */
bkpt #0

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@@ -0,0 +1,176 @@
/***************************************************************************
* Copyright (C) 2012 by George Harris *
* george@luminairecoffee.com *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
.text
.syntax unified
.cpu cortex-m3
.thumb
.thumb_func
/*
* Params :
* r0 = start address, status (out)
* r1 = count
* r2 = erase command
* r3 = block size
*/
#define SSP_BASE_HIGH 0x4008
#define SSP_BASE_LOW 0x3000
#define SSP_CR0_OFFSET 0x00
#define SSP_CR1_OFFSET 0x04
#define SSP_DATA_OFFSET 0x08
#define SSP_CPSR_OFFSET 0x10
#define SSP_SR_OFFSET 0x0c
#define SSP_CLOCK_BASE_HIGH 0x4005
#define SSP_CLOCK_BASE_LOW 0x0000
#define SSP_BRANCH_CLOCK_BASE_HIGH 0x4005
#define SSP_BRANCH_CLOCK_BASE_LOW 0x2000
#define SSP_BASE_CLOCK_OFFSET 0x94
#define SSP_BRANCH_CLOCK_OFFSET 0x700
#define IOCONFIG_BASE_HIGH 0x4008
#define IOCONFIG_BASE_LOW 0x6000
#define IOCONFIG_SCK_OFFSET 0x18c
#define IOCONFIG_HOLD_OFFSET 0x190
#define IOCONFIG_WP_OFFSET 0x194
#define IOCONFIG_MISO_OFFSET 0x198
#define IOCONFIG_MOSI_OFFSET 0x19c
#define IOCONFIG_CS_OFFSET 0x1a0
#define IO_BASE_HIGH 0x400f
#define IO_BASE_LOW 0x4000
#define IO_CS_OFFSET 0xab
#define IODIR_BASE_HIGH 0x400f
#define IODIR_BASE_LOW 0x6000
#define IO_CS_DIR_OFFSET 0x14
setup: /* Initialize SSP pins and module */
mov.w r10, #IOCONFIG_BASE_LOW
movt r10, #IOCONFIG_BASE_HIGH
mov.w r8, #0xea
str.w r8, [r10, #IOCONFIG_SCK_OFFSET] /* Configure SCK pin function */
mov.w r8, #0x40
str.w r8, [r10, #IOCONFIG_HOLD_OFFSET] /* Configure /HOLD pin function */
mov.w r8, #0x40
str.w r8, [r10, #IOCONFIG_WP_OFFSET] /* Configure /WP pin function */
mov.w r8, #0xed
str.w r8, [r10, #IOCONFIG_MISO_OFFSET] /* Configure MISO pin function */
mov.w r8, #0xed
str.w r8, [r10, #IOCONFIG_MOSI_OFFSET] /* Configure MOSI pin function */
mov.w r8, #0x44
str.w r8, [r10, #IOCONFIG_CS_OFFSET] /* Configure CS pin function */
mov.w r10, #IODIR_BASE_LOW
movt r10, #IODIR_BASE_HIGH
mov.w r8, #0x800
str r8, [r10, #IO_CS_DIR_OFFSET] /* Set CS as output */
mov.w r10, #IO_BASE_LOW
movt r10, #IO_BASE_HIGH
mov.w r8, #0xff
str.w r8, [r10, #IO_CS_OFFSET] /* Set CS high */
mov.w r10, #SSP_CLOCK_BASE_LOW
movt r10, #SSP_CLOCK_BASE_HIGH
mov.w r8, #0x0000
movt r8, #0x0100
str.w r8, [r10, #SSP_BASE_CLOCK_OFFSET] /* Configure SSP0 base clock (use 12 MHz IRC) */
mov.w r10, #SSP_BRANCH_CLOCK_BASE_LOW
movt r10, #SSP_BRANCH_CLOCK_BASE_HIGH
mov.w r8, #0x01
str.w r8, [r10, #SSP_BRANCH_CLOCK_OFFSET] /* Configure (enable) SSP0 branch clock */
mov.w r10, #SSP_BASE_LOW
movt r10, #SSP_BASE_HIGH
mov.w r8, #0x07
str.w r8, [r10, #SSP_CR0_OFFSET] /* Set clock postscale */
mov.w r8, #0x02
str.w r8, [r10, #SSP_CPSR_OFFSET] /* Set clock prescale */
str.w r8, [r10, #SSP_CR1_OFFSET] /* Enable SSP in SPI mode */
write_enable:
bl cs_down
mov.w r9, #0x06 /* Send the write enable command */
bl write_data
bl cs_up
bl cs_down
mov.w r9, #0x05 /* Get status register */
bl write_data
mov.w r9, #0x00 /* Dummy data to clock in status */
bl write_data
bl cs_up
tst r9, #0x02 /* If the WE bit isn't set, we have a problem. */
beq error
erase:
bl cs_down
mov.w r9, r2 /* Send the erase command */
bl write_data
write_address:
lsr r9, r0, #16 /* Send the current 24-bit write address, MSB first */
bl write_data
lsr r9, r0, #8
bl write_data
mov.w r9, r0
bl write_data
bl cs_up
wait_flash_busy: /* Wait for the flash to finish the previous erase */
bl cs_down
mov.w r9, #0x05 /* Get status register */
bl write_data
mov.w r9, #0x00 /* Dummy data to clock in status */
bl write_data
bl cs_up
tst r9, #0x01 /* If it isn't done, keep waiting */
bne wait_flash_busy
subs r1, r1, #1 /* decrement count */
cbz r1, exit /* Exit if we have written everything */
add r0, r3 /* Move the address up by the block size */
b write_enable /* Start a new block erase */
write_data: /* Send/receive 1 byte of data over SSP */
mov.w r10, #SSP_BASE_LOW
movt r10, #SSP_BASE_HIGH
str.w r9, [r10, #SSP_DATA_OFFSET] /* Write supplied data to the SSP data reg */
wait_transmit:
ldr r9, [r10, #SSP_SR_OFFSET] /* Check SSP status */
tst r9, #0x0010 /* Check if BSY bit is set */
bne wait_transmit /* If still transmitting, keep waiting */
ldr r9, [r10, #SSP_DATA_OFFSET] /* Load received data */
bx lr /* Exit subroutine */
cs_up:
mov.w r8, #0xff
b cs_write
cs_down:
mov.w r8, #0x0000
cs_write:
mov.w r10, #IO_BASE_LOW
movt r10, #IO_BASE_HIGH
str.w r8, [r10, #IO_CS_OFFSET]
bx lr
error:
movs r0, #0
exit:
bkpt #0x00
.end

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@@ -0,0 +1,102 @@
/***************************************************************************
* Copyright (C) 2012 by George Harris *
* george@luminairecoffee.com *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
/***************************************************************************
* This is an algorithm for the LPC43xx family (and probably the LPC18xx *
* family as well, though they have not been tested) that will initialize *
* memory-mapped SPI flash accesses. Unfortunately NXP has published *
* neither the ROM source code that performs this initialization nor the *
* register descriptions necessary to do so, so this code is necessary to *
* call into the ROM SPIFI API. *
***************************************************************************/
.text
.syntax unified
.arch armv7-m
.thumb
.thumb_func
.align 2
/*
* Params :
* r0 = spifi clock speed
*/
#define IOCONFIG_BASE_HIGH 0x4008
#define IOCONFIG_BASE_LOW 0x6000
#define IOCONFIG_SCK_OFFSET 0x18c
#define IOCONFIG_HOLD_OFFSET 0x190
#define IOCONFIG_WP_OFFSET 0x194
#define IOCONFIG_MISO_OFFSET 0x198
#define IOCONFIG_MOSI_OFFSET 0x19c
#define IOCONFIG_CS_OFFSET 0x1a0
#define SPIFI_ROM_TABLE_BASE_HIGH 0x1040
#define SPIFI_ROM_TABLE_BASE_LOW 0x0118
code:
mov.w r8, r0
sub sp, #0x84
add r7, sp, #0x0
/* Initialize SPIFI pins */
mov.w r3, #IOCONFIG_BASE_LOW
movt r3, #IOCONFIG_BASE_HIGH
mov.w r2, #0xf3
str.w r2, [r3, #IOCONFIG_SCK_OFFSET]
mov.w r3, #IOCONFIG_BASE_LOW
movt r3, #IOCONFIG_BASE_HIGH
mov.w r2, #IOCONFIG_BASE_LOW
movt r2, #IOCONFIG_BASE_HIGH
mov.w r1, #IOCONFIG_BASE_LOW
movt r1, #IOCONFIG_BASE_HIGH
mov.w r0, #IOCONFIG_BASE_LOW
movt r0, #IOCONFIG_BASE_HIGH
mov.w r4, #0xd3
str.w r4, [r0, #IOCONFIG_MOSI_OFFSET]
mov r0, r4
str.w r0, [r1, #IOCONFIG_MISO_OFFSET]
mov r1, r0
str.w r1, [r2, #IOCONFIG_WP_OFFSET]
str.w r1, [r3, #IOCONFIG_HOLD_OFFSET]
mov.w r3, #IOCONFIG_BASE_LOW
movt r3, #IOCONFIG_BASE_HIGH
mov.w r2, #0x13
str.w r2, [r3, #IOCONFIG_CS_OFFSET]
/* Perform SPIFI init. See spifi_rom_api.h (in NXP lpc43xx driver package) for details */
/* on initialization arguments. */
movw r3, #SPIFI_ROM_TABLE_BASE_LOW /* The ROM API table is located @ 0x10400118, and */
movt r3, #SPIFI_ROM_TABLE_BASE_HIGH /* the first pointer in the struct is to the init function. */
ldr r3, [r3, #0x0]
ldr r4, [r3, #0x0] /* Grab the init function pointer from the table */
/* Set up function arguments */
movw r0, #0x3b4
movt r0, #0x1000 /* Pointer to a SPIFI data struct that we don't care about */
mov.w r1, #0x3 /* "csHigh". Not 100% sure what this does. */
mov.w r2, #0xc0 /* The configuration word: S_RCVCLOCK | S_FULLCLK */
mov.w r3, r8 /* SPIFI clock speed (12MHz) */
blx r4 /* Call the init function */
b done
done:
bkpt #0
.end

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@@ -0,0 +1,210 @@
/***************************************************************************
* Copyright (C) 2012 by George Harris *
* george@luminairecoffee.com *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
.text
.syntax unified
.cpu cortex-m3
.thumb
.thumb_func
/*
* Params :
* r0 = workarea start, status (out)
* r1 = workarea end
* r2 = target address (offset from flash base)
* r3 = count (bytes)
* r4 = page size
* Clobbered:
* r7 - rp
* r8 - wp, tmp
* r9 - send/receive data
* r10 - temp
* r11 - current page end address
*/
#define SSP_BASE_HIGH 0x4008
#define SSP_BASE_LOW 0x3000
#define SSP_CR0_OFFSET 0x00
#define SSP_CR1_OFFSET 0x04
#define SSP_DATA_OFFSET 0x08
#define SSP_CPSR_OFFSET 0x10
#define SSP_SR_OFFSET 0x0c
#define SSP_CLOCK_BASE_HIGH 0x4005
#define SSP_CLOCK_BASE_LOW 0x0000
#define SSP_BRANCH_CLOCK_BASE_HIGH 0x4005
#define SSP_BRANCH_CLOCK_BASE_LOW 0x2000
#define SSP_BASE_CLOCK_OFFSET 0x94
#define SSP_BRANCH_CLOCK_OFFSET 0x700
#define IOCONFIG_BASE_HIGH 0x4008
#define IOCONFIG_BASE_LOW 0x6000
#define IOCONFIG_SCK_OFFSET 0x18c
#define IOCONFIG_HOLD_OFFSET 0x190
#define IOCONFIG_WP_OFFSET 0x194
#define IOCONFIG_MISO_OFFSET 0x198
#define IOCONFIG_MOSI_OFFSET 0x19c
#define IOCONFIG_CS_OFFSET 0x1a0
#define IO_BASE_HIGH 0x400f
#define IO_BASE_LOW 0x4000
#define IO_CS_OFFSET 0xab
#define IODIR_BASE_HIGH 0x400f
#define IODIR_BASE_LOW 0x6000
#define IO_CS_DIR_OFFSET 0x14
setup: /* Initialize SSP pins and module */
mov.w r10, #IOCONFIG_BASE_LOW
movt r10, #IOCONFIG_BASE_HIGH
mov.w r8, #0xea
str.w r8, [r10, #IOCONFIG_SCK_OFFSET] /* Configure SCK pin function */
mov.w r8, #0x40
str.w r8, [r10, #IOCONFIG_HOLD_OFFSET] /* Configure /HOLD pin function */
mov.w r8, #0x40
str.w r8, [r10, #IOCONFIG_WP_OFFSET] /* Configure /WP pin function */
mov.w r8, #0xed
str.w r8, [r10, #IOCONFIG_MISO_OFFSET] /* Configure MISO pin function */
mov.w r8, #0xed
str.w r8, [r10, #IOCONFIG_MOSI_OFFSET] /* Configure MOSI pin function */
mov.w r8, #0x44
str.w r8, [r10, #IOCONFIG_CS_OFFSET] /* Configure CS pin function */
mov.w r10, #IODIR_BASE_LOW
movt r10, #IODIR_BASE_HIGH
mov.w r8, #0x800
str r8, [r10, #IO_CS_DIR_OFFSET] /* Set CS as output */
mov.w r10, #IO_BASE_LOW
movt r10, #IO_BASE_HIGH
mov.w r8, #0xff
str.w r8, [r10, #IO_CS_OFFSET] /* Set CS high */
mov.w r10, #SSP_CLOCK_BASE_LOW
movt r10, #SSP_CLOCK_BASE_HIGH
mov.w r8, #0x0000
movt r8, #0x0100
str.w r8, [r10, #SSP_BASE_CLOCK_OFFSET] /* Configure SSP0 base clock (use 12 MHz IRC) */
mov.w r10, #SSP_BRANCH_CLOCK_BASE_LOW
movt r10, #SSP_BRANCH_CLOCK_BASE_HIGH
mov.w r8, #0x01
str.w r8, [r10, #SSP_BRANCH_CLOCK_OFFSET] /* Configure (enable) SSP0 branch clock */
mov.w r10, #SSP_BASE_LOW
movt r10, #SSP_BASE_HIGH
mov.w r8, #0x07
str.w r8, [r10, #SSP_CR0_OFFSET] /* Set clock postscale */
mov.w r8, #0x02
str.w r8, [r10, #SSP_CPSR_OFFSET] /* Set clock prescale */
str.w r8, [r10, #SSP_CR1_OFFSET] /* Enable SSP in SPI mode */
mov.w r11, #0x00
find_next_page_boundary:
add r11, r4 /* Increment to the next page */
cmp r11, r2
/* If we have not reached the next page boundary after the target address, keep going */
bls find_next_page_boundary
write_enable:
bl cs_down
mov.w r9, #0x06 /* Send the write enable command */
bl write_data
bl cs_up
bl cs_down
mov.w r9, #0x05 /* Get status register */
bl write_data
mov.w r9, #0x00 /* Dummy data to clock in status */
bl write_data
bl cs_up
tst r9, #0x02 /* If the WE bit isn't set, we have a problem. */
beq error
page_program:
bl cs_down
mov.w r9, #0x02 /* Send the page program command */
bl write_data
write_address:
lsr r9, r2, #16 /* Send the current 24-bit write address, MSB first */
bl write_data
lsr r9, r2, #8
bl write_data
mov.w r9, r2
bl write_data
wait_fifo:
ldr r8, [r0] /* read the write pointer */
cmp r8, #0 /* if it's zero, we're gonzo */
beq exit
ldr r7, [r0, #4] /* read the read pointer */
cmp r7, r8 /* wait until they are not equal */
beq wait_fifo
write:
ldrb r9, [r7], #0x01 /* Load one byte from the FIFO, increment the read pointer by 1 */
bl write_data /* send the byte to the flash chip */
cmp r7, r1 /* wrap the read pointer if it is at the end */
it cs
addcs r7, r0, #8 /* skip loader args */
str r7, [r0, #4] /* store the new read pointer */
subs r3, r3, #1 /* decrement count */
cbz r3, exit /* Exit if we have written everything */
add r2, #1 /* Increment flash address by 1 */
cmp r11, r2 /* See if we have reached the end of a page */
bne wait_fifo /* If not, keep writing bytes */
bl cs_up /* Otherwise, end the command and keep going w/ the next page */
add r11, r4 /* Move up the end-of-page address by the page size*/
wait_flash_busy: /* Wait for the flash to finish the previous page write */
bl cs_down
mov.w r9, #0x05 /* Get status register */
bl write_data
mov.w r9, #0x00 /* Dummy data to clock in status */
bl write_data
bl cs_up
tst r9, #0x01 /* If it isn't done, keep waiting */
bne wait_flash_busy
b write_enable /* If it is done, start a new page write */
write_data: /* Send/receive 1 byte of data over SSP */
mov.w r10, #SSP_BASE_LOW
movt r10, #SSP_BASE_HIGH
str.w r9, [r10, #SSP_DATA_OFFSET] /* Write supplied data to the SSP data reg */
wait_transmit:
ldr r9, [r10, #SSP_SR_OFFSET] /* Check SSP status */
tst r9, #0x0010 /* Check if BSY bit is set */
bne wait_transmit /* If still transmitting, keep waiting */
ldr r9, [r10, #SSP_DATA_OFFSET] /* Load received data */
bx lr /* Exit subroutine */
cs_up:
mov.w r8, #0xff
b cs_write
cs_down:
mov.w r8, #0x0000
cs_write:
mov.w r10, #IO_BASE_LOW
movt r10, #IO_BASE_HIGH
str.w r8, [r10, #IO_CS_OFFSET]
bx lr
error:
movs r0, #0
str r0, [r2, #4] /* set rp = 0 on error */
exit:
mov r0, r6
bkpt #0x00
.end

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@@ -26,41 +26,53 @@
.cpu cortex-m3
.thumb
.thumb_func
.align 2
/*
Call with :
r0 = buffer address
r1 = destination address
r2 = bytecount (in) - endaddr (work)
Used registers:
r3 = pFLASH_CTRL_BASE
r4 = FLASHWRITECMD
r5 = #1
r6 = bytes written
r7 = temp reg
*/
* Params :
* r0 = workarea start
* r1 = workarea end
* r2 = target address
* r3 = count (32bit words)
*
* Clobbered:
* r4 = pFLASH_CTRL_BASE
* r5 = FLASHWRITECMD
* r7 - rp
* r8 - wp, tmp
*/
write:
ldr r3,pFLASH_CTRL_BASE
ldr r4,FLASHWRITECMD
movs r5, 1
movs r6, #0
ldr r4, pFLASH_CTRL_BASE
ldr r5, FLASHWRITECMD
wait_fifo:
ldr r8, [r0, #0] /* read wp */
cmp r8, #0 /* abort if wp == 0 */
beq exit
ldr r7, [r0, #4] /* read rp */
cmp r7, r8 /* wait until rp != wp */
beq wait_fifo
mainloop:
str r1, [r3, #0]
ldr r7, [r0, r6]
str r7, [r3, #4]
str r4, [r3, #8]
waitloop:
ldr r7, [r3, #8]
tst r7, r5
bne waitloop
adds r1, r1, #4
adds r6, r6, #4
cmp r6, r2
bne mainloop
bkpt #0
str r2, [r4, #0] /* FMA - write address */
add r2, r2, #4 /* increment target address */
ldr r8, [r7], #4
str r8, [r4, #4] /* FMD - write data */
str r5, [r4, #8] /* FMC - enable write */
busy:
ldr r8, [r4, #8]
tst r8, #1
bne busy
cmp r7, r1 /* wrap rp at end of buffer */
it cs
addcs r7, r0, #8 /* skip loader args */
str r7, [r0, #4] /* store rp */
subs r3, r3, #1 /* decrement word count */
cbz r3, exit /* loop if not done */
b wait_fifo
exit:
bkpt #0
pFLASH_CTRL_BASE: .word 0x400FD000
FLASHWRITECMD: .word 0xA4420001

View File

@@ -0,0 +1,76 @@
/***************************************************************************
* Copyright (C) 2011 by Andreas Fritiofson *
* andreas.fritiofson@gmail.com *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
.text
.syntax unified
.cpu cortex-m0
.thumb
.thumb_func
.global write
/* Params:
* r0 - flash base (in), status (out)
* r1 - count (halfword-16bit)
* r2 - workarea start
* r3 - workarea end
* r4 - target address
* Clobbered:
* r5 - rp
* r6 - wp, tmp
* r7 - tmp
*/
#define STM32_FLASH_SR_OFFSET 0x0c /* offset of SR register from flash reg base */
wait_fifo:
ldr r6, [r2, #0] /* read wp */
cmp r6, #0 /* abort if wp == 0 */
beq exit
ldr r5, [r2, #4] /* read rp */
cmp r5, r6 /* wait until rp != wp */
beq wait_fifo
ldrh r6, [r5] /* "*target_address++ = *rp++" */
strh r6, [r4]
adds r5, #2
adds r4, #2
busy:
ldr r6, [r0, #STM32_FLASH_SR_OFFSET] /* wait until BSY flag is reset */
movs r7, #1
tst r6, r7
bne busy
movs r7, #0x14 /* check the error bits */
tst r6, r7
bne error
cmp r5, r3 /* wrap rp at end of buffer */
bcc no_wrap
mov r5, r2
adds r5, #8
no_wrap:
str r5, [r2, #4] /* store rp */
subs r1, r1, #1 /* decrement halfword count */
cmp r1, #0
beq exit /* loop if not done */
b wait_fifo
error:
movs r0, #0
str r0, [r2, #4] /* set rp = 0 on error */
exit:
mov r0, r6 /* return status in r0 */
bkpt #0

View File

@@ -0,0 +1,80 @@
/***************************************************************************
* Copyright (C) 2010 by Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* Copyright (C) 2011 Øyvind Harboe *
* oyvind.harboe@zylin.com *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
.text
.syntax unified
.cpu cortex-m3
.thumb
.thumb_func
/*
* Params :
* r0 = workarea start, status (out)
* r1 = workarea end
* r2 = target address
* r3 = count (16bit words)
* r4 = flash base
*
* Clobbered:
* r6 - temp
* r7 - rp
* r8 - wp, tmp
*/
#define STM32_FLASH_CR_OFFSET 0x10 /* offset of CR register in FLASH struct */
#define STM32_FLASH_SR_OFFSET 0x0c /* offset of SR register in FLASH struct */
wait_fifo:
ldr r8, [r0, #0] /* read wp */
cmp r8, #0 /* abort if wp == 0 */
beq exit
ldr r7, [r0, #4] /* read rp */
cmp r7, r8 /* wait until rp != wp */
beq wait_fifo
ldr r6, STM32_PROG16
str r6, [r4, #STM32_FLASH_CR_OFFSET]
ldrh r6, [r7], #0x02 /* read one half-word from src, increment ptr */
strh r6, [r2], #0x02 /* write one half-word from src, increment ptr */
busy:
ldr r6, [r4, #STM32_FLASH_SR_OFFSET]
tst r6, #0x10000 /* BSY (bit16) == 1 => operation in progress */
bne busy /* wait more... */
tst r6, #0xf0 /* PGSERR | PGPERR | PGAERR | WRPERR */
bne error /* fail... */
cmp r7, r1 /* wrap rp at end of buffer */
it cs
addcs r7, r0, #8 /* skip loader args */
str r7, [r0, #4] /* store rp */
subs r3, r3, #1 /* decrement halfword count */
cbz r3, exit /* loop if not done */
b wait_fifo
error:
movs r1, #0
str r1, [r0, #4] /* set rp = 0 on error */
exit:
mov r0, r6 /* return status in r0 */
bkpt #0x00
STM32_PROG16: .word 0x101 /* PG | PSIZE_16*/

View File

@@ -5,6 +5,9 @@
* Copyright (C) 2011 Øyvind Harboe *
* oyvind.harboe@zylin.com *
* *
* Copyright (C) 2011 Clement Burin des Roziers *
* clement.burin-des-roziers@hikob.com *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
@@ -22,7 +25,7 @@
***************************************************************************/
// Build : arm-eabi-gcc -c stm32f2xxx.S
// Build : arm-eabi-gcc -c stm32lx.S
.text
.syntax unified
.cpu cortex-m3
@@ -31,33 +34,30 @@
.global write
/*
r0 - source address
r1 - target address
r2 - count (halfword-16bit)
r3 - result out
r4 - flash base
r0 - destination address
r1 - source address
r2 - count
*/
#define STM32_FLASH_CR_OFFSET 0x10 /* offset of CR register in FLASH struct */
#define STM32_FLASH_SR_OFFSET 0x0c /* offset of CR register in FLASH struct */
// Set 0 to r3
movs r3, #0
// Go to compare
b.n test_done
write:
write_word:
// Load one word from address in r0, increment by 4
ldr.w ip, [r1], #4
// Store the word to address in r1, increment by 4
str.w ip, [r0], #4
// Increment r3
adds r3, #1
write_half_word:
ldr r3, STM32_PROG16
str r3, [r4, #STM32_FLASH_CR_OFFSET]
ldrh r3, [r0], #0x02 /* read one half-word from src, increment ptr */
strh r3, [r1], #0x02 /* write one half-word from src, increment ptr */
busy:
ldr r3, [r4, #STM32_FLASH_SR_OFFSET]
tst r3, #0x10000 /* BSY (bit0) == 1 => operation in progress */
beq busy /* wait more... */
tst r3, #0xf0 /* PGSERR | PGPERR | PGAERR | WRPERR */
bne exit /* fail... */
subs r2, r2, #0x01 /* decrement counter */
bne write_half_word /* write next half-word if anything left */
exit:
test_done:
// Compare r3 and r2
cmp r3, r2
// Loop if not zero
bcc.n write_word
// Set breakpoint to exit
bkpt #0x00
STM32_PROG16: .word 0x101 /* PG | PSIZE_16*/

View File

@@ -1,10 +1,12 @@
ACTION!="add|change", GOTO="openocd_rules_end"
SUBSYSTEM!="usb", GOTO="openocd_rules_end"
ENV{DEVTYPE}!="usb_device", GOTO="openocd_rules_end"
SUBSYSTEM!="usb|tty", GOTO="openocd_rules_end"
# Olimex ARM-USB-OCD
ATTRS{idVendor}=="15ba", ATTRS{idProduct}=="0003", MODE="664", GROUP="plugdev"
# Olimex ARM-USB-OCD-H
ATTRS{idVendor}=="15ba", ATTRS{idProduct}=="002b", MODE="664", GROUP="plugdev"
# Olimex ARM-USB-OCD-TINY
ATTRS{idVendor}=="15ba", ATTRS{idProduct}=="0004", MODE="664", GROUP="plugdev"
@@ -28,9 +30,11 @@ ATTRS{idVendor}=="0fbb", ATTRS{idProduct}=="1000", MODE="664", GROUP="plugdev"
# TinCanTools Flyswatter
# OOCD-Link
# Marvell Sheevaplug (early development versions)
# DLP Design DLP-USB1232H USB-to-UART/FIFO interface module
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6010", MODE="664", GROUP="plugdev"
# Calao Systems USB-A9260-C02
# Bus Pirate
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6001", MODE="664", GROUP="plugdev"
# IAR J-Link USB
@@ -45,12 +49,15 @@ ATTRS{idVendor}=="0640", ATTRS{idProduct}=="002c", MODE="664", GROUP="plugdev"
# Hitex STM32-PerformanceStick
ATTRS{idVendor}=="0640", ATTRS{idProduct}=="002d", MODE="664", GROUP="plugdev"
# TI/Luminary Stellaris Evaluation Board (several)
# TI/Luminary Stellaris Evaluation Board FTDI (several)
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="bcd9", MODE="664", GROUP="plugdev"
# TI/Luminary Stellaris In-Circuit Debug Interface (ICDI) Board
# TI/Luminary Stellaris In-Circuit Debug Interface FTDI (ICDI) Board
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="bcda", MODE="664", GROUP="plugdev"
# TI/Luminary Stellaris In-Circuit Debug Interface (ICDI) Board
ATTRS{idVendor}=="1cbe", ATTRS{idProduct}=="00fd", MODE="664", GROUP="plugdev"
# Xverve Signalyzer Tool (DT-USB-ST)
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="bca0", MODE="664", GROUP="plugdev"
@@ -67,5 +74,19 @@ ATTRS{idVendor}=="0403", ATTRS{idProduct}=="c141", MODE="664", GROUP="plugdev"
# Hilscher NXHX Boards
ATTRS{idVendor}=="0640", ATTRS{idProduct}=="0028", MODE="664", GROUP="plugdev"
LABEL="openocd_rules_end"
# Debug Board for Neo1973
ATTRS{idVendor}=="1457", ATTRS{idProduct}=="5118", MODE="664", GROUP="plugdev"
# XDS100v2
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="a6d0", MODE="664", GROUP="plugdev"
# stlink v1
ATTRS{idVendor}=="0483", ATTRS{idProduct}=="3744", MODE="664", GROUP="plugdev"
# stlink v2
ATTRS{idVendor}=="0483", ATTRS{idProduct}=="3748", MODE="664", GROUP="plugdev"
# opendous and estick
ATTRS{idVendor}=="03eb", ATTRS{idProduct}=="204f", MODE="664", GROUP="plugdev"
LABEL="openocd_rules_end"

View File

@@ -0,0 +1,53 @@
/** @remote_bitbangpage OpenOCD Developer's Guide
The remote_bitbang JTAG driver is used to drive JTAG from a remote process. The
remote_bitbang driver communicates via TCP or UNIX sockets with some remote
process using an ASCII encoding of the bitbang interface. The remote process
presumably then drives the JTAG however it pleases. The remote process should
act as a server, listening for connections from the openocd remote_bitbang
driver.
The remote bitbang driver is useful for debugging software running on
processors which are being simulated.
The bitbang interface consists of the following functions.
blink on
Blink a light somewhere. The argument on is either 1 or 0.
read
Sample the value of tdo.
write tck tms tdi
Set the value of tck, tms, and tdi.
reset trst srst
Set the value of trst, srst.
An additional function, quit, is added to the remote_bitbang interface to
indicate there will be no more requests and the connection with the remote
driver should be closed.
These five functions are encoded in ascii by assigning a single character to
each possible request. The assignments are:
B - Blink on
b - Blink off
R - Read request
Q - Quit request
0 - Write 0 0 0
1 - Write 0 0 1
2 - Write 0 1 0
3 - Write 0 1 1
4 - Write 1 0 0
5 - Write 1 0 1
6 - Write 1 1 0
7 - Write 1 1 1
r - Reset 0 0
s - Reset 0 1
t - Reset 1 0
u - Reset 1 1
The read response is encoded in ascii as either digit 0 or 1.
*/

View File

@@ -36,7 +36,6 @@ This pages lists Technical Primers available for OpenOCD Developers.
They seek to provide information to pull novices up the learning curves
associated with the fundamental technologies used by OpenOCD.
- @subpage primerpatches
- @subpage primerdocs
- @subpage primerautotools
- @subpage primertcl
@@ -83,6 +82,7 @@ modules are stacked in the current implementation (from bottom to top):
- @subpage targetdocs
- @ref targetarm
- @ref targetnotarm
- @ref targetmips
- @ref targetregister
- @ref targetimage
- @ref targettrace

View File

@@ -1,172 +0,0 @@
/** @page primerpatches Patch Primer
This page provides an introduction to patching that may be useful
for OpenOCD contributors who are unfamiliar with the process.
@section primerpatchintro Introduction to Patching
The standard method for creating patches requires developers to:
- checkout the git repository (or bring a copy up-to-date),
- make the necessary modifications to a working copy,
- check with 'git status' to see which files will be modified/added, and
- use 'git diff' to review the changes and produce a patch.
It is important to minimize the changes to only those lines that contain
important differences; do not allow stray whitespace changes into your
patches, and keep the focus to a single logical change.
@section primerpatchcreate Creating Patches
You can create a patch (from the root of your working copy) with a
command like the following example: @par
@verbatim
git diff > patch-name.patch
@endverbatim
where @a patch-name should be something that is descriptive and unique.
The above command will create a patch containing all of the changes in
the working copy; if you want to obtain a subset, simply provide the
list of files to the command: @par
@verbatim
git diff doc > <patch-name>-doc.patch
git diff src > <patch-name>-src.patch
@endverbatim
This will create two patches, each containing only those changes present
in the subdirectory specified.
@subsection primerpatchcreate Naming Patches
One developer has evolved an informal standard for naming his patches: @par
@verbatim
<project>-<lod>-<action>-<task>.patch
@endverbatim
where @a project is @c openocd, @a lod (line-of-development) could be a
subsystem (e.g. @c jtag, @c jlink, etc.) or other group identifier,
@a action is @c add, @c change, @c fix, @c update, etc., and @a task is
whatever the patch will accomplish (in 2-4 words).
This scheme does not need to be followed, but it is helpful for
maintainers that receive many patches. You do not want your own
@c openocd.patch file to be accidentally overwritten by another
submission, sending your patch to the bit bucket on accident.
@section primerpatchpreflight Developer Review
Before sending in patches, please make sure you have updated to the
latest version of the trunk (using <code>git pull</code>) before creating
your patch. This helps to increase the chances that it will apply
cleanly to the trunk. However, the content matters most.
When creating a patch using "<code>git diff</code>", git will
produce a patch that contains all of the changes in your working copy.
To manage multiple changes at once, you either need one working copy per
patch, or you can specified specific files and directories when using
<code>git diff</code>. Overlapping patches will be discussed in the
next section.
@todo Does git's treatment of line-endings behave sanely?
Basically, the repository should use newlines internally,
and convert to/from CRLF on Windows etc.
@section primerpatchseries Patch Series
As was mentioned above, each patch should contain one logical @c task,
and multiple logical tasks should be split into a series of patches.
There are no hard guidelines for how that is to be done; it's an art
form. Many simple changes should not have to worry about being split,
as they will naturally represent a single task.
When working on several different non-intersecting lines of development,
a combination of multiple working copies and patch series management
techniques can become critical to efficiently managing change. This
again is an area where developers have favorite methodologies that are
simply a matter of taste or familiarity; your mileage may vary.
Packages such as @c patchutils, @c diffutils, and @c quilt are among
those that have proved themselves invaluable for these type of tasks.
Others take their patch management a step further, using stkgit or
some other framework on top of git.
@subsection primerpatchseriesinterdiff Using @c interdiff
The @c patchutils package includes the @c interdiff command, which
produces a patch that contains the changes made between two other
patches. This command can be used to manage the creation of trivial
patch series. For example, the following sequence of commands will
produce three patches: @par
@verbatim
$ cd openocd/
$ git pull
...
$ <<<start changes for patch #1>>>
...
$ <<<finish changes for patch #1>>>
$ git diff > series-1.patch # patch #1 is easy
$ <<<start changes for patch #2>>>
...
$ <<<finish changes for patch #2>>>
$ git diff > series-1+2.patch # create patch 1+2
$ interdiff series-1{,+2}.patch > series-2.patch # 1 ~ 1+2 => #2
$ <<<start changes for patch #3>>>
...
$ <<<finish changes for patch #3>>>
$ git diff > series-1+2+3.patch # create patch 1+2+3
$ interdiff series-1+2{,+3}.patch > series-3.patch # 1+2 ~ 1+2+3 => 3
@endverbatim
This technique falls apart when the repository changes, but this may be
suitable for small series of patches.
@subsection primerpatchseriesquilt Using @c quilt
The @c quilt package provides scripts to manage series of patches more
efficiently than can be managed by hand. For out-of-tree work projects
that require such patch management, @c quilt provides an indispensable
tool for solving the problem.
@section primerpatchsubmit Submitting Patches
Write access to the OpenOCD git repository is limited to
contributors that have demonstrated the ability to produce clear,
consistent, and frequent patches. These individuals are responsible
for maintaining the integrity of the repository for the community.
Thus, commits to the git repository must be handled by one of
these maintainers.
Patches must be sent to the OpenOCD developer mailing list:
@par
openocd-development@lists.berlios.de
They will be reviewed and committed if the changes are found to be
acceptable. If there are problems, you will receive feedback via the
mailing list; in general, the maintainers prefer all communication to go
through the list, as the entire community needs to judge contributions
for possible merits and mistakes.
Contributors may be asked to address certain issues and submit a new
patch. In the event that it gets overlooked, you may need to resubmit
it or prompt for feedback. Please have patience, as many maintainers
work on the project voluntarily and without compensation for the time
that they spend doing these tasks.
@section primerpatchguide Guidelines for Submitting Patches
- Each patch file should contain:
- A commit description that describes all of the changes.
- A separator line that contains three hyphens: <code>---</code>
- A summary of the changes produced by diffstat (optional)
- Another separator line (optional)
- The actual patch contents, containing a single change.
- Each patch series should include:
- A summary of the patches in the series.
- Logically-related patches that contain incremental changes.
*/
/** @file
This file contains the @ref primerpatches page.
*/

View File

@@ -107,14 +107,14 @@ original code base. Each packager release should have a unique
version.
For example, the following command will add a 'foo' tag to the
configure.in script of a local copy of the source tree, giving
configure.ac script of a local copy of the source tree, giving
a version label like <em>0.3.0-foo</em>:
@code
tools/release/version.sh version tag add foo
@endcode
This command will modify the configure.in script in your working copy
This command will modify the configure.ac script in your working copy
only. After running the @c bootstrap sequence, the tree can be patched
and used to produce your own derived versions. You might check that
change into a private branch of your git tree, along with the other
@@ -296,7 +296,7 @@ The following steps should be followed to produce each release:
be needed (except to seed the process for the next release, or maybe
if a significant and longstanding bug is fixed late in the RC phase).
-# Bump library version if our API changed (not yet required)
-# Update and commit the final package version in @c configure.in:
-# Update and commit the final package version in @c configure.ac:
(The <code>tools/release/version.sh</code> script might help ensure
the versions are named properly.):
-# Remove @c -dev tag.
@@ -306,7 +306,7 @@ The following steps should be followed to produce each release:
- If producing the next RC in a series, bump the rc number
-# Commit that version change, with a good descriptive comment.
-# Create a git tag for the final commit, with a tag name matching
the version string in <code>configure.in</code> (including <em>-rcN</em>
the version string in <code>configure.ac</code> (including <em>-rcN</em>
where relevant):
@verbatim
PACKAGE_VERSION="x.y.z"
@@ -322,14 +322,14 @@ git tag -m "The openocd-${PACKAGE_VERSION} release." "${PACKAGE_TAG}"
the last ones to be included in the release being made.
-# Produce the release files, using the local clone of the source
tree which holds the release's tag and updated version in
@c configure.in ... this is used only to produce the release, and
@c configure.ac ... this is used only to produce the release, and
all files should already be properly checked out.
-# Run <code>tools/release.sh package</code> to produce the
source archives. This automatically bootstraps and
configures the process.
-# Run <code>tools/release.sh stage</code> to create an @c archives
directory with the release data, including MD5 and SHA1
checksum files (which are used with Berlios).
checksum files.
-# Sanity check at least one of those archives, by extracting and
configuring its contents, using them to build a copy of OpenOCD,
and verifying that the result prints the correct release version
@@ -357,13 +357,6 @@ git tag -m "The openocd-${PACKAGE_VERSION} release." "${PACKAGE_TAG}"
- .zip: Windows
- For openocd.pdf just associate it with the right release notes.
-# Create an SF.net project news update.
- Berlios:
-# Provide @c NEWS file, as requested.
-# Upload the release files via FTP to ftp://ftp.berlios.de/incoming/
-# Edit descriptions for each file (one at a time) Note that Berlios
does not automatically checksum files, and it uses a very old
version of the SourceForge code with user interface issues.
-# Click button to send E-mail Release Notice.
-# Depending on how paranoid you're feeling today, verify the images by
downloading them from the websites and making sure there are no
differences between the downloaded copies and your originals.
@@ -372,16 +365,15 @@ git tag -m "The openocd-${PACKAGE_VERSION} release." "${PACKAGE_TAG}"
User's Guide, and HTML for the developer's guide ... you can
instantiate a shell.sourceforge.net instance and set up symlinks
from your home directory, to simplify this process.
-# (How to update the Berlios web site with the same data?)
-# Post announcement e-mail to the openocd-development list.
-# optionally:
-# Post an update on the Berlios blog (if it lets you)
-# Post an update on the OpenOCD blog.
-# Announce updates on freshmeat.net and other trackers.
-# Submit updates to news feeds (e.g. Digg, Reddit, etc.).
-# Resume normal development on mainline, by opening the merge window for
the next major or minor release cycle. (You might want to do this
before all the release bits are fully published.)
- Update the version label in the @c configure.in file:
- Update the version label in the @c configure.ac file:
- Restore @c -dev version tag.
- For a new minor release cycle, increment the release's minor number
- For a new major release cycle, increment the release's major number
@@ -404,7 +396,7 @@ To start a bug-fix release branch:
-# Create a new branch, starting from a major or
minor release tag
-# Restore @c -dev version tag.
-# Bump micro version number in configure.in
-# Bump micro version number in configure.ac
-# Backport bugfix patches from mainline into that branch.
(Always be sure mainline has the fix first, so it's hard
to just lose a bugfix.)

View File

@@ -309,3 +309,8 @@ This section needs to be expanded.
*/
/** @page serverhttp OpenOCD http Server API
This section needs to be expanded.
*/

View File

@@ -77,7 +77,7 @@ Finally, try to avoid lines of code that are longer than than 72-80 columns:
- inline functions
- @c // comments -- in new code, prefer these for single-line comments
- trailing comma allowed in enum declarations
- designated initializers (@{ .field = value @})
- designated initializers ( .field = value )
- variables declarations should occur at the point of first use
- new block scopes for selection and iteration statements
- use malloc() to create dynamic arrays. Do @b not use @c alloca
@@ -370,7 +370,7 @@ Maintainers must also be sure to follow additional guidelines:
This page contains style guidelines for the OpenOCD autotools scripts.
The following guidelines apply to the @c configure.in file:
The following guidelines apply to the @c configure.ac file:
- Better guidelines need to be developed, but until then...
- Use good judgement.

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@@ -9,6 +9,7 @@ The Target Support module contains APIs that cover several functional areas:
- @subpage targetarm
- @subpage targetnotarm
- @subpage targetmips
- @subpage targetregister
- @subpage targetimage
- @subpage targettrace

536
doc/manual/target/mips.txt Normal file
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@@ -0,0 +1,536 @@
/** @page targetmips OpenOCD MIPS Targets
@section ejatgmem EJTAG Memory Addresses
An optional uncached and unmapped debug segment dseg (EJTAG area) appears in the address range
0xFFFF FFFF FF20 0000 to 0xFFFF FFFF FF3F FFFF. The dseg segment thereby appears in the kseg part of the
compatibility segment, and access to kseg is possible with the dseg segment.
The dseg segment is subdivided into dmseg (EJTAG memory) segment and the drseg (EJTAG registers) segment. The
dmseg segment is used when the probe services the memory segment. The drseg segment is used when the
memory-mapped debug registers are accessed. Table 5-2 shows the subdivision and attributes for the segments.
dseg is divided in :
- dmseg (0xFFFF FFFF FF20 0000 to 0xFFFF FFFF FF2F FFFF)
- drseg (0xFFFF FFFF FF30 0000 to 0xFFFF FFFF FF3F FFFF)
Because the dseg segment is serviced exclusively by the EJTAG features, there
are no physical address per se. Instead the lower 21 bits of the virtual address select
the appropriate reference in either EJTAG memory or registers. References are not mapped through the
TLB, nor do the accesses appear on the external system memory interface.
Both of this memory segments are Uncached.
On debug exception (break) CPU jumps to the beginning of dmseg. This some kind of memory shared
between CPU and EJTAG dongle.
There CPU stops (correct terminology is : stalls, because it stops it's pipeline), and is waiting for some action of dongle.
If the dongle gives it instruction, CPU executes it, augments it's PC to 0xFFFF FFFF FF20 0001 - but it again points to dmseg area,
so it stops waiting for next instruction.
This will all become clear later, after reading following prerequisite chapters.
@section impflags Important flags
@subsection pnnw PNnW
Indicates read or write of a pending processor access:
- 0 : Read processor access, for a fetch/load access
- 1 : Write processor access, for a store access
This value is defined only when a processor access is pending.
Processor will do the action for us : it can for example read internal state (register values),
and send us back the information via EJTAG memory (dmseg), or it can take some data from dmseg and write it into the registers or RAM.
Every time when it sees address (i.e. when this address is the part of the opcode it is executing, wether it is instruction or data fetch)
that falls into dmseg, processor stalls. That acutally meand that CPU stops it's pipeline and it is waitning for dongle to take some action.
CPU is now either waiting for dongle to take some data from dmseg (if we requested for CPU do give us internal state, for example),
or it will wait for some data from dongle (if it needs following instruction because it did previous, or if the operand address of the currently executed opcode
falls somewhere (anywhere) in dmseg (0xff..ff20000 - 0xff..ff2fffff)).
Bit PNnW describes character of CPU access to EJTAG memory (the memry where dongle puts/takes data) - CPU can either READ for it (PNnW == 0) or
WRITE to it (PNnW == 1).
By reading PNnW bit OpenOCD will know if it has to send (PNnW == 0) or to take (PNnW == 1) data (from dmseg, via dongle).
@subsection pracc PrAcc
Indicates a pending processor access and controls finishing of a pending processor access.
When read:
- 0 : No pending processor access
- 1 : Pending processor access
A write of 0 finishes a processor access if pending;
otherwise operation of the processor is UNDEFINED
if the bit is written to 0 when no processor access is
pending. A write of 1 is ignored.
A successful FASTDATA access will clear this bit.
As noted above, on any access to dmseg, processor will stall. It waits for dongle to do some action - either to take or put some data.
OpenOCD can figure out which action has to be taken by reading PrAcc bit.
Once action from dongle has been done, i.e. after the data is taken/put, OpenOCD can signal to CPU to proceed with executing the instruction.
This can be the next instruction (if previous was finished before pending), or the same instruction - if for example CPU was waiting on dongle
to give it an operand, because it saw in the instruction opcode that operand address is somewhere in dmseg. That prowoked the CPU to stall (it tried operand fetch to dmseg and stopped),
and PNnW bit is 0 (CPU does read from dmseg), and PrAcc is 1 (CPU is pending on dmseg access).
@subsection spracc SPrAcc
Shifting in a zero value requests completion of the Fastdata access.
The PrAcc bit in the EJTAG Control register is overwritten with zero when the access
succeeds. (The access succeeds if PrAcc is one and the operation address is in the legal dmseg segment
Fastdata area.)
When successful, a one is shifted out. Shifting out a zero indicates a Fastdata access failure.
Shifting in a one does not complete the Fastdata access and the PrAcc bit is unchanged. Shifting out a
one indicates that the access would have been successful if allowed to complete and a zero indicates
the access would not have successfully completed.
@section fdreg Fastdata Register (TAP Instruction FASTDATA)
The width of the Fastdata register is 1 bit.
During a Fastdata access, the Fastdata register is written and read, i.e., a bit is
shifted in and a bit is shifted out.
Also during a Fastdata access, the Fastdata register value shifted in specifies whether the Fastdata
access should be completed or not. The value shifted out is a flag that indicates whether the Fastdata access was
successful or not (if completion was requested).
@section ejtagacc EJTAG Access Implementation
OpenOCD reads/writes data to JTAG via mips_m4k_read_memory() and mips_m4k_write_memory() functions defined in src/target/mips_m4k.c.
Internally, these functions call mips32_pracc_read_mem() and mips32_pracc_write_mem() defined in src/target/mips32_pracc.c
Let's take for example function mips32_pracc_read_mem32() which describes CPU reads (fetches) from dmseg (EJTAG memory) :
@code
static const uint32_t code[] = {
/* start: */
MIPS32_MTC0(15,31,0), /* move $15 to COP0 DeSave */
MIPS32_LUI(15,UPPER16(MIPS32_PRACC_STACK)), /* $15 = MIPS32_PRACC_STACK */
MIPS32_ORI(15,15,LOWER16(MIPS32_PRACC_STACK)),
MIPS32_SW(8,0,15), /* sw $8,($15) */
MIPS32_SW(9,0,15), /* sw $9,($15) */
MIPS32_SW(10,0,15), /* sw $10,($15) */
MIPS32_SW(11,0,15), /* sw $11,($15) */
MIPS32_LUI(8,UPPER16(MIPS32_PRACC_PARAM_IN)), /* $8 = MIPS32_PRACC_PARAM_IN */
MIPS32_ORI(8,8,LOWER16(MIPS32_PRACC_PARAM_IN)),
MIPS32_LW(9,0,8), /* $9 = mem[$8]; read addr */
MIPS32_LW(10,4,8), /* $10 = mem[$8 + 4]; read count */
MIPS32_LUI(11,UPPER16(MIPS32_PRACC_PARAM_OUT)), /* $11 = MIPS32_PRACC_PARAM_OUT */
MIPS32_ORI(11,11,LOWER16(MIPS32_PRACC_PARAM_OUT)),
/* loop: */
MIPS32_BEQ(0,10,8), /* beq 0, $10, end */
MIPS32_NOP,
MIPS32_LW(8,0,9), /* lw $8,0($9), Load $8 with the word @mem[$9] */
MIPS32_SW(8,0,11), /* sw $8,0($11) */
MIPS32_ADDI(10,10,NEG16(1)), /* $10-- */
MIPS32_ADDI(9,9,4), /* $1 += 4 */
MIPS32_ADDI(11,11,4), /* $11 += 4 */
MIPS32_B(NEG16(8)), /* b loop */
MIPS32_NOP,
/* end: */
MIPS32_LW(11,0,15), /* lw $11,($15) */
MIPS32_LW(10,0,15), /* lw $10,($15) */
MIPS32_LW(9,0,15), /* lw $9,($15) */
MIPS32_LW(8,0,15), /* lw $8,($15) */
MIPS32_B(NEG16(27)), /* b start */
MIPS32_MFC0(15,31,0), /* move COP0 DeSave to $15 */
};
@endcode
We have to pass this code to CPU via dongle via dmseg.
After debug exception CPU will find itself stalling at the begining of the dmseg. It waits for the first instruction from dongle.
This is MIPS32_MTC0(15,31,0), so CPU saves C0 and continues to addr 0xFF20 0001, which falls also to dmseg, so it stalls.
Dongle proceeds giving to CPU one by one instruction in this manner.
However, things are not so simple. If you take a look at the program, you will see that some instructions take operands. If it has to take
operand from the address in dmseg, CPU will stall witing for the dongle to do the action of passing the operand and signal this by putting PrAcc to 0.
If this operand is somewhere in RAM, CPU will not stall (it stalls only on dmseg), but it will just take it and proceed to nex instruction. But since PC for next instruction
points to dmseg, it will stall, so that dongle can pass next instruction.
Some instuctions are jumps (if these are jumps in dmseg addr, CPU will jump and then stall. If this is jump to some address in RAM, CPU will jump and just proceed -
will not stall on addresses in RAM).
To have information about CPU is currently (does it stalls wanting on operand or it jumped somewhere waiting for next instruction),
OpenOCD has to call TAP ADDRESS instruction, which will ask CPU to give us his address within EJTAG memory :
@code
address = data = 0;
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
mips_ejtag_drscan_32(ejtag_info, &address);
@endcode
And then, upon the results, we can conclude where it is in our code so far, so we can give it what it wants next :
@code
if ((address >= MIPS32_PRACC_PARAM_IN)
&& (address <= MIPS32_PRACC_PARAM_IN + ctx->num_iparam * 4))
{
offset = (address - MIPS32_PRACC_PARAM_IN) / 4;
data = ctx->local_iparam[offset];
}
else if ((address >= MIPS32_PRACC_PARAM_OUT)
&& (address <= MIPS32_PRACC_PARAM_OUT + ctx->num_oparam * 4))
{
offset = (address - MIPS32_PRACC_PARAM_OUT) / 4;
data = ctx->local_oparam[offset];
}
else if ((address >= MIPS32_PRACC_TEXT)
&& (address <= MIPS32_PRACC_TEXT + ctx->code_len * 4))
{
offset = (address - MIPS32_PRACC_TEXT) / 4;
data = ctx->code[offset];
}
else if (address == MIPS32_PRACC_STACK)
{
/* save to our debug stack */
data = ctx->stack[--ctx->stack_offset];
}
else
{
/* TODO: send JMP 0xFF200000 instruction.
Hopefully processor jump back to start of debug vector */
data = 0;
LOG_ERROR("Error reading unexpected address 0x%8.8" PRIx32 "", address);
return ERROR_JTAG_DEVICE_ERROR;
}
@endcode
i.e. if CPU is stalling on addresses in dmseg that are reserved for input parameters, we can conclude that it actually tried to take (read)
parametar from there, and saw that address of param falls in dmseg, so it stopped. Obviously, now dongle have to give to it operand.
Similarly, mips32_pracc_exec_write() describes CPU writes into EJTAG memory (dmseg).
Obvioulsy, code is RO, and CPU can change only parameters :
@code
mips_ejtag_set_instr(ctx->ejtag_info, EJTAG_INST_DATA);
mips_ejtag_drscan_32(ctx->ejtag_info, &data);
/* Clear access pending bit */
ejtag_ctrl = ejtag_info->ejtag_ctrl & ~EJTAG_CTRL_PRACC;
mips_ejtag_set_instr(ctx->ejtag_info, EJTAG_INST_CONTROL);
mips_ejtag_drscan_32(ctx->ejtag_info, &ejtag_ctrl);
//jtag_add_clocks(5);
jtag_execute_queue();
if ((address >= MIPS32_PRACC_PARAM_IN)
&& (address <= MIPS32_PRACC_PARAM_IN + ctx->num_iparam * 4))
{
offset = (address - MIPS32_PRACC_PARAM_IN) / 4;
ctx->local_iparam[offset] = data;
}
else if ((address >= MIPS32_PRACC_PARAM_OUT)
&& (address <= MIPS32_PRACC_PARAM_OUT + ctx->num_oparam * 4))
{
offset = (address - MIPS32_PRACC_PARAM_OUT) / 4;
ctx->local_oparam[offset] = data;
}
else if (address == MIPS32_PRACC_STACK)
{
/* save data onto our stack */
ctx->stack[ctx->stack_offset++] = data;
}
else
{
LOG_ERROR("Error writing unexpected address 0x%8.8" PRIx32 "", address);
return ERROR_JTAG_DEVICE_ERROR;
}
@endcode
CPU loops here :
@code
while (1)
{
if ((retval = wait_for_pracc_rw(ejtag_info, &ejtag_ctrl)) != ERROR_OK)
return retval;
address = data = 0;
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
mips_ejtag_drscan_32(ejtag_info, &address);
/* Check for read or write */
if (ejtag_ctrl & EJTAG_CTRL_PRNW)
{
if ((retval = mips32_pracc_exec_write(&ctx, address)) != ERROR_OK)
return retval;
}
else
{
/* Check to see if its reading at the debug vector. The first pass through
* the module is always read at the vector, so the first one we allow. When
* the second read from the vector occurs we are done and just exit. */
if ((address == MIPS32_PRACC_TEXT) && (pass++))
{
break;
}
if ((retval = mips32_pracc_exec_read(&ctx, address)) != ERROR_OK)
return retval;
}
if (cycle == 0)
break;
}
@endcode
and using presented R (mips32_pracc_exec_read()) and W (mips32_pracc_exec_write()) functions it reads in the code (RO) and reads and writes operands (RW).
@section fdimpl OpenOCD FASTDATA Implementation
OpenOCD FASTDATA write function, mips32_pracc_fastdata_xfer() is called from bulk_write_memory callback, which writes a count items of 4 bytes
to the memory of a target at the an address given. Because it operates only on whole words, this should be faster than target_write_memory().
In order to implement FASTDATA write, mips32_pracc_fastdata_xfer() uses the following handler :
@code
uint32_t handler_code[] = {
/* caution when editing, table is modified below */
/* r15 points to the start of this code */
MIPS32_SW(8,MIPS32_FASTDATA_HANDLER_SIZE - 4,15),
MIPS32_SW(9,MIPS32_FASTDATA_HANDLER_SIZE - 8,15),
MIPS32_SW(10,MIPS32_FASTDATA_HANDLER_SIZE - 12,15),
MIPS32_SW(11,MIPS32_FASTDATA_HANDLER_SIZE - 16,15),
/* start of fastdata area in t0 */
MIPS32_LUI(8,UPPER16(MIPS32_PRACC_FASTDATA_AREA)),
MIPS32_ORI(8,8,LOWER16(MIPS32_PRACC_FASTDATA_AREA)),
MIPS32_LW(9,0,8), /* start addr in t1 */
MIPS32_LW(10,0,8), /* end addr to t2 */
/* loop: */
/* 8 */ MIPS32_LW(11,0,0), /* lw t3,[t8 | r9] */
/* 9 */ MIPS32_SW(11,0,0), /* sw t3,[r9 | r8] */
MIPS32_BNE(10,9,NEG16(3)), /* bne $t2,t1,loop */
MIPS32_ADDI(9,9,4), /* addi t1,t1,4 */
MIPS32_LW(8,MIPS32_FASTDATA_HANDLER_SIZE - 4,15),
MIPS32_LW(9,MIPS32_FASTDATA_HANDLER_SIZE - 8,15),
MIPS32_LW(10,MIPS32_FASTDATA_HANDLER_SIZE - 12,15),
MIPS32_LW(11,MIPS32_FASTDATA_HANDLER_SIZE - 16,15),
MIPS32_LUI(15,UPPER16(MIPS32_PRACC_TEXT)),
MIPS32_ORI(15,15,LOWER16(MIPS32_PRACC_TEXT)),
MIPS32_JR(15), /* jr start */
MIPS32_MFC0(15,31,0), /* move COP0 DeSave to $15 */
};
@endcode
In the begining and the end of the handler we have fuction prologue (save the regs that will be clobbered) and epilogue (restore regs),
and in the very end, after all the xfer have been done, we do jump to the MIPS32_PRACC_TEXT address, i.e. Debug Exception Vector location.
We will use this fact (that we came back to MIPS32_PRACC_TEXT) to verify later if all the handler is executed (because when in RAM,
processor do not stall - it executes all instructions untill one of them do not demand access to dmseg (if one of it's opernads is there)).
This handler is put into the RAM and executed from there, and not instruction by instruction, like in previous simple write
(mips_m4k_write_memory()) and read (mips_m4k_read_memory()) functions.
N.B. When it is executing this code in RAM, CPU will not stall on instructions, but execute all until it comes to the :
@code
MIPS32_LW(9,0,8) /* start addr in t1 */
@endcode
and there it will stall - because it will see that one of the operands have to be fetched from dmseg (EJTAG memory, in this case FASTDATA memory segment).
This handler is loaded in the RAM, ath the reserved location "work_area". This work_area is configured in OpenOCD configuration script and should be selected
in that way that it is not clobbered (overwritten) by data we want to write-in using FASTDATA.
What is executed instruction by instruction which is passed by dongle (via EJATG memory) is small jump code, which jumps at the handler in RAM.
CPU stalls on dmseg when receiving these jmp_code instructions, but once it jumps in RAM, CPU do not stall anymore and executes bunch of handler instructions.
Untill it comes to the first instruction which has an operand in FASTDATA area. There it stalls and waits on action from probe.
It happens actually when CPU comes to this loop :
@code
MIPS32_LW(9,0,8), /* start addr in t1 */
MIPS32_LW(10,0,8), /* end addr to t2 */
/* loop: */
/* 8 */ MIPS32_LW(11,0,0), /* lw t3,[t8 | r9] */
/* 9 */ MIPS32_SW(11,0,0), /* sw t3,[r9 | r8] */
MIPS32_BNE(10,9,NEG16(3)), /* bne $t2,t1,loop */
@endcode
and then it stalls because operand in r8 points to FASTDATA area.
OpenOCD first verifies that CPU came to this place by :
@code
/* next fetch to dmseg should be in FASTDATA_AREA, check */
address = 0;
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
mips_ejtag_drscan_32(ejtag_info, &address);
if (address != MIPS32_PRACC_FASTDATA_AREA)
return ERROR_FAIL;
@endcode
and then passes to CPU start and end address of the loop region for handler in RAM.
In the loop in handler, CPU sees that it has to take and operand from FSTDATA area (to write it to the dst in RAM after), and so it stalls, putting PrAcc to "1".
OpenOCD fills the data via this loop :
@code
for (i = 0; i < count; i++)
{
/* Send the data out using fastdata (clears the access pending bit) */
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_FASTDATA);
if ((retval = mips_ejtag_fastdata_scan(ejtag_info, write_t, buf++)) != ERROR_OK)
return retval;
}
@endcode
Each time when OpenOCD fills data to CPU (via dongle, via dmseg), CPU takes it and proceeds in executing the endler. However, since handler is in a assembly loop,
CPU comes to next instruction which also fetches data from FASTDATA area. So it stalls.
Then OpenOCD fills the data again, from it's (OpenOCD's) loop. And this game continues untill all the data has been filled.
After the last data has beend given to CPU it sees that it reached the end address, so it proceeds with next instruction. However, rhis instruction do not point into dmseg, so
CPU executes bunch of handler instructions (all prologue) and in the end jumps to MIPS32_PRACC_TEXT address.
On it's side, OpenOCD checks in CPU has jumped back to MIPS32_PRACC_TEXT, which is the confirmation that it correclty executed all the rest of the handler in RAM,
and that is not stuck somewhere in the RAM, or stalling on some acces in dmseg - that would be an error :
@code
address = 0;
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
mips_ejtag_drscan_32(ejtag_info, &address);
if (address != MIPS32_PRACC_TEXT)
LOG_ERROR("mini program did not return to start");
@endcode
@section fdejtagspec EJTAG spec on FASTDATA access
The width of the Fastdata register is 1 bit. During a Fastdata access, the Fastdata register is written and read, i.e., a bit
is shifted in and a bit is shifted out. During a Fastdata access, the Fastdata register value shifted in specifies whether
the Fastdata access should be completed or not. The value shifted out is a flag that indicates whether the Fastdata
access was successful or not (if completion was requested).
The FASTDATA access is used for efficient block transfers between dmseg (on the probe) and target memory (on the
processor). An "upload" is defined as a sequence of processor loads from target memory and stores to dmseg. A
"download" is a sequence of processor loads from dmseg and stores to target memory. The "Fastdata area" specifies
the legal range of dmseg addresses (0xFF20.0000 - 0xFF20.000F) that can be used for uploads and downloads. The
Data + Fastdata registers (selected with the FASTDATA instruction) allow efficient completion of pending Fastdata
area accesses.
During Fastdata uploads and downloads, the processor will stall on accesses to the Fastdata area. The PrAcc (processor
access pending bit) will be 1 indicating the probe is required to complete the access. Both upload and download
accesses are attempted by shifting in a zero SPrAcc value (to request access completion) and shifting out SPrAcc to
see if the attempt will be successful (i.e., there was an access pending and a legal Fastdata area address was used).
Downloads will also shift in the data to be used to satisfy the load from dmsegs Fastdata area, while uploads will
shift out the data being stored to dmsegs Fastdata area.
As noted above, two conditions must be true for the Fastdata access to succeed. These are:
- PrAcc must be 1, i.e., there must be a pending processor access.
- The Fastdata operation must use a valid Fastdata area address in dmseg (0xFF20.0000 to 0xFF20.000F).
Basically, because FASTDATA area in dmseg is 16 bytes, we transfer (0xFF20.0000 - 0xFF20.000F)
FASTDATA scan TAP instruction selects the Data and the Fastdata registers at once.
They come in order :
TDI -> | Data register| -> | Fastdata register | -> TDO
FASTDATA register is 1-bit width register. It takes in SPrAcc bit which should be shifted first,
followed by 32 bit of data.
Scan width of FASTDTA is 33 bits in total : 33 bits are shifted in and 33 bits are shifted out.
First bit that is shifted out is SPrAcc that comes out of Fastdata register and should give us status on FATSDATA write we want to do.
@section fdcheck OpenOCD misses FASTDATA check
Download flow (probe -> target block transfer) :
1) Probe transfer target execution to a loop in target memory doing a fixed number of "loads" to fastdata area of dmseg (and stores to the target download destination.)
2) Probe loops attempting to satisfy the loads "expected" from the target.
On FASTDATA access "successful" move on to next "load".
On FASTDATA access "failure" repeat until "successful" or timeout.
(A "failure" is an attempt to satisfy an access when none are pending.)
Note: A failure may have a recoverable (and even expected) cause like slow target execution of the load loop. Other failures may be due to unexpected more troublesome causes like an exception while in debug mode or a target hang on a bad target memory access.
Shifted out SPrAcc bit inform us that there was CPU access pendingand that it can be complete.
Basically, we should do following procedure :
- Download (dongle -> CPU) :
You shift "download" DATA and FASTDATA[SPrAcc] = 0 (33 bit scan) into the target. If the value of FASTDATA[SPrAcc] shifted out is "1" then an access was pending when you started the scan and it is now complete.
If SPrAcc is 0 then no access was pending to the fastdata area. (Repeat attempt to complete the access you expect for this data word. Timeout if you think the access is "long overdue" as something unexpected has happened.)
- Upload (CPU -> dongle) :
You shift "dummy" DATA and FASTDATA[SPrAcc] = 0 (33 bit scan) into the target. If the value of FASTDATA[SPrAcc] shifted out is "1" then an access was pending when you started the scan and it is now complete. The "upload" is the DATA shifted out of the target.
If SPrAcc is 0 then no access was pending to the fastdata area. (Repeat attempt to complete the access you expect for this data word. Timeout if you think the access is "long overdue" as something unexpected has happened.)
Basically, if checking first (before scan) if CPU is pending on FASTDATA access (PrAcc is "1"), like this
@code
wait(ready);
do_scan();
@endcode
which is inefficient, we should do it like this :
@code
BEGIN :
do_scan();
if (!was_ready)
goto BEGIN;
@endcode
by checking SPrAcc that we shifted out.
If some FASTDATA write fails, OpenOCD will continue with it's loop (on the host side), but CPU will rest pending (on the target side)
waiting for correct FASTDATA write.
Since OpenOCD goes ahead, it will eventually finish it's loop, and proceede to check if CPU took all the data. But since CPU did not took all the data,
it is still turns in handler's loop in RAM, stalling on Fastdata area so this check :
@code
address = 0;
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
retval = mips_ejtag_drscan_32(ejtag_info, &address);
if (retval != ERROR_OK)
return retval;
if (address != MIPS32_PRACC_TEXT)
LOG_ERROR("mini program did not return to start");
@endcode
fails, and that gives us enough information of the failure.
In this case, we can lower the JTAG frquency and try again, bacuse most probable reason of this failure is that we tried FASTDATA upload before CPU arrived to rise PrAcc (i.e. before it was pending on access).
However, the reasons for failure might be numerous : reset, exceptions which can occur in debug mode, bus hangs, etc.
If lowering the JTAG freq does not work either, we can fall back to more robust solution with patch posted below.
To summarize, FASTDATA communication goes as following :
-# CPU jumps to Debug Exception Vector Location 0xFF200200 in dmseg and it stalls, pending and waiting for EJTAG to give it first debug instruction and signall it by putting PrAcc to "0"
-# When PrAcc goes to "0" CPU execute one opcode sent by EJTAG via DATA reg. Then it pends on next access, waiting for PrAcc to be put to "0" again
-# Following this game, OpenOCD first loads handler code in RAM, and then sends the jmp_code - instruction by instruction via DATA reg, which redirects CPU to handler previously set up in RAM
-# Once in RAM CPU does not pend on any instruction, but it executes all handler instructions untill first "fetch" to Fastdata area - then it stops and pends.
-# So - when it comes to any instruction (opcode) in this handler in RAM which reads (or writes) to Fastdata area (0xF..F20.0000 to 0xF..F20.000F), CPU stops (i.e. stalls access).
I.e. it stops on this lw opcode and waits to FASTDATA TAP command from the probe.
-# CPU continues only if OpenOCD shifted in SPrAcc "0" (and if the PrAcc was "1"). It shifts-out "1" to tell us that it was OK (processor was stalled, so it can complete the access),
and that it continued execution of the handler in RAM.
-# If PrAcc was not "1" CPU will not continue (go to next instruction), but will shift-out "0" and keep stalling on the same instruction of my handler in RAM.
-# When Fastdata loop is finished, CPU executes all following hadler instructions in RAM (prologue).
-# In the end of my handler in RAM, I jumps back to begining of Debug Exception Vector Location 0xFF200200 in dmseg.
-# When it jumps back to 0xFF200200 in dmseg processor stops and pends, waiting for OpenOCD to send it instruction via DATA reg and signal it by putting PrAcc to "0".
*/

View File

@@ -78,7 +78,7 @@ Show a help text and exit.
Show version information and exit.
.SH "BUGS"
Please report any bugs on the mailing list at
.BR openocd\-development@lists.berlios.de .
.BR openocd\-devel@lists.sourceforge.net .
.SH "LICENCE"
.B OpenOCD
is covered by the GNU General Public License (GPL), version 2 or later.

File diff suppressed because it is too large Load Diff

View File

@@ -1,41 +0,0 @@
#####ECOSGPLCOPYRIGHTBEGIN####
## -------------------------------------------
## This file is part of eCos, the Embedded Configurable Operating System.
## Copyright (C) 2008 Øyvind Harboe
##
## eCos is free software; you can redistribute it and/or modify it under
## the terms of the GNU General Public License as published by the Free
## Software Foundation; either version 2 or (at your option) any later version.
##
## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
## WARRANTY; without even the implied warranty of MERCHANTABILITY or
## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
## for more details.
##
## You should have received a copy of the GNU General Public License along
## with eCos; if not, write to the Free Software Foundation, Inc.,
## 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
##
## As a special exception, if other files instantiate templates or use macros
## or inline functions from this file, or you compile this file and link it
## with other works to produce a work based on this file, this file does not
## by itself cause the resulting work to be covered by the GNU General Public
## License. However the source code for this file must still be made available
## in accordance with section (3) of the GNU General Public License.
##
## This exception does not invalidate any other reasons why a work based on
## this file might be covered by the GNU General Public License.
## -------------------------------------------
#####ECOSGPLCOPYRIGHTEND####
# Create OpenOCD eCos flash driver
# Syntax: make INSTALL_DIR=ecosinstalldir OUTPUT=outputname
include $(INSTALL_DIR)/include/pkgconf/ecos.mak
all:
$(ECOS_COMMAND_PREFIX)gcc $(ECOS_GLOBAL_CFLAGS) $(ECOS_GLOBAL_LDFLAGS) -g -o debug_$(OUTPUT).elf -nostdlib flash.S flash.c -Wl,--gc-sections -I$(INSTALL_DIR)/include -Wl,$(INSTALL_DIR)/lib/libtarget.a -Wl,-Map,flash.map
cp debug_$(OUTPUT).elf $(OUTPUT).elf
$(ECOS_COMMAND_PREFIX)strip $(OUTPUT).elf
echo Flash driver $(OUTPUT).elf

Binary file not shown.

View File

@@ -1,90 +0,0 @@
/*
#####ECOSGPLCOPYRIGHTBEGIN####
## -------------------------------------------
## This file is part of eCos, the Embedded Configurable Operating System.
## Copyright (C) 2008 Øyvind Harboe
##
## eCos is free software; you can redistribute it and/or modify it under
## the terms of the GNU General Public License as published by the Free
## Software Foundation; either version 2 or (at your option) any later version.
##
## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
## WARRANTY; without even the implied warranty of MERCHANTABILITY or
## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
## for more details.
##
## You should have received a copy of the GNU General Public License along
## with eCos; if not, write to the Free Software Foundation, Inc.,
## 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
##
## As a special exception, if other files instantiate templates or use macros
## or inline functions from this file, or you compile this file and link it
## with other works to produce a work based on this file, this file does not
## by itself cause the resulting work to be covered by the GNU General Public
## License. However the source code for this file must still be made available
## in accordance with section (3) of the GNU General Public License.
##
## This exception does not invalidate any other reasons why a work based on
## this file might be covered by the GNU General Public License.
## -------------------------------------------
#####ECOSGPLCOPYRIGHTEND####
*/
/*
Jump table for flash driver
Registers in ARM callling convention is to place args in registers
starting at r0.
So for:
void foo(int a, int b, int c).
a=r0
b=r1
c=r2
*/
.global _stack_base
.global _stack_start
.global _workarea
.global _start
.global _start_bss_clear
_start:
// offset=0
// int erase(void *address, int len)
ldr sp,=_stack_start
bl erase
nop // Stop CPU here using hw breakpoint
// offset=0xc
// int program(void *buffer, void *address, int len)
ldr sp,=_stack_start
bl program
nop // Stop CPU here using hw breakpoint
// offset=0x18
ldr r0,=_workarea
nop // Stop CPU here using hw breakpoint
// offset=0x20
// int init() - returns error message if the flash chip can't be detected
ldr sp,=_stack_start
bl init
nop // Stop CPU here using hw breakpoint
.section ".bss"
.balign 4
_stack_base:
.rept 4096
.byte 0
.endr
_stack_start:
.balign 4
_workarea:
.rept 8192
.byte 0
.endr
// NB!!! we clear bss while the stack is in use, so we start BSS clearing here !!! :-)
_start_bss_clear:

View File

@@ -1,104 +0,0 @@
/*
#####ECOSGPLCOPYRIGHTBEGIN####
## -------------------------------------------
## This file is part of eCos, the Embedded Configurable Operating System.
## Copyright (C) 2008 Øyvind Harboe
##
## eCos is free software; you can redistribute it and/or modify it under
## the terms of the GNU General Public License as published by the Free
## Software Foundation; either version 2 or (at your option) any later version.
##
## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
## WARRANTY; without even the implied warranty of MERCHANTABILITY or
## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
## for more details.
##
## You should have received a copy of the GNU General Public License along
## with eCos; if not, write to the Free Software Foundation, Inc.,
## 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
##
## As a special exception, if other files instantiate templates or use macros
## or inline functions from this file, or you compile this file and link it
## with other works to produce a work based on this file, this file does not
## by itself cause the resulting work to be covered by the GNU General Public
## License. However the source code for this file must still be made available
## in accordance with section (3) of the GNU General Public License.
##
## This exception does not invalidate any other reasons why a work based on
## this file might be covered by the GNU General Public License.
## -------------------------------------------
#####ECOSGPLCOPYRIGHTEND####
*/
#include <string.h>
#define _FLASH_PRIVATE_
#include <cyg/io/flash.h>
int myprintf(char *format, ...)
{
return 0;
}
extern char _start_bss_clear;
extern char __bss_end__;
int init()
{
// set up runtime environment
char *t;
for (t=&_start_bss_clear; t<&__bss_end__; t++)
{
*t=0;
}
return flash_init((_printf *)&myprintf);
}
int checkFlash(void *addr, int len)
{
// Return error for illegal addresses
if ((addr<flash_info.start)||(addr>flash_info.end))
return FLASH_ERR_INVALID;
if ((((cyg_uint8 *)addr)+len)>(cyg_uint8 *)flash_info.end)
return FLASH_ERR_INVALID;
return FLASH_ERR_OK;
}
int erase(void *address, int len)
{
int retval;
void *failAddress;
retval=checkFlash(address, len);
if (retval!=0)
return retval;
retval=init();
if (retval!=0)
return retval;
return flash_erase(address, len, &failAddress);
}
extern char _end;
// Data follows immediately after program, long word aligned.
int program(void *buffer, void *address, int len)
{
int retval;
void *failAddress;
retval=checkFlash(address, len);
if (retval!=0)
return retval;
retval=init();
if (retval!=0)
return retval;
//int flash_program(void *_addr, void *_data, int len, void **err_addr)
return flash_program(address, buffer, len, &failAddress);
}

View File

@@ -1,390 +0,0 @@
Archive member included because of file (symbol)
/tmp/ecosboard/ecos/install/lib/libtarget.a(io_flash_flash.o)
/ecos-c/DOCUME~1/oyvind/LOCALS~1/Temp/ccM8Ftqt.o (flash_init)
/tmp/ecosboard/ecos/install/lib/libtarget.a(devs_flash_arm_eb40a_eb40a_flash.o)
/tmp/ecosboard/ecos/install/lib/libtarget.a(io_flash_flash.o) (flash_hwr_init)
/tmp/ecosboard/ecos/install/lib/libtarget.a(infra_memcpy.o)
/tmp/ecosboard/ecos/install/lib/libtarget.a(io_flash_flash.o) (memcpy)
/tmp/ecosboard/ecos/install/lib/libtarget.a(language_c_libc_string_memcmp.o)
/tmp/ecosboard/ecos/install/lib/libtarget.a(io_flash_flash.o) (memcmp)
Memory Configuration
Name Origin Length Attributes
*default* 0x00000000 0xffffffff
Linker script and memory map
LOAD /ecos-c/DOCUME~1/oyvind/LOCALS~1/Temp/cccPBW5f.o
LOAD /ecos-c/DOCUME~1/oyvind/LOCALS~1/Temp/ccM8Ftqt.o
LOAD /tmp/ecosboard/ecos/install/lib/libtarget.a
0x00008000 PROVIDE (__executable_start, 0x8000)
0x00008000 . = 0x8000
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.debug_typenames
*(.debug_typenames)
.debug_varnames
*(.debug_varnames)
.stack 0x00080000 0x0
0x00080000 _stack = .
*(.stack)
.note.gnu.arm.ident
*(.note.gnu.arm.ident)
/DISCARD/
*(.note.GNU-stack)
OUTPUT(debug_eb40a.elf elf32-littlearm)
.debug_ranges 0x00000000 0xb8
.debug_ranges 0x00000000 0x18 /tmp/ecosboard/ecos/install/lib/libtarget.a(io_flash_flash.o)
.debug_ranges 0x00000018 0x48 /tmp/ecosboard/ecos/install/lib/libtarget.a(devs_flash_arm_eb40a_eb40a_flash.o)
.debug_ranges 0x00000060 0x30 /tmp/ecosboard/ecos/install/lib/libtarget.a(infra_memcpy.o)
.debug_ranges 0x00000090 0x28 /tmp/ecosboard/ecos/install/lib/libtarget.a(language_c_libc_string_memcmp.o)

View File

@@ -1,6 +0,0 @@
Some of these binaries are build & linked using eCos.
For source for the flash drivers, see:
http://ecos.sourceware.org/

2
jimtcl

Submodule jimtcl updated: 411e92fea9...2c1eba991e

View File

@@ -15,11 +15,7 @@ SUBDIRS = \
lib_LTLIBRARIES = libopenocd.la
bin_PROGRAMS = openocd
if ECOSBOARD
MAINFILE = ecosboard.c
else
MAINFILE = main.c
endif
openocd_SOURCES = $(MAINFILE)
openocd_LDADD = libopenocd.la
@@ -30,6 +26,10 @@ else
openocd_LDADD += -ljim
endif
if ULINK
openocd_LDADD += -lm
endif
libopenocd_la_SOURCES = \
hello.c \
openocd.c \
@@ -45,10 +45,11 @@ libopenocd_la_CPPFLAGS = -DPKGBLDDATE=\"`date +%F-%R`\"
# guess-rev.sh returns either a repository version ID or "-snapshot"
if RELEASE
libopenocd_la_CPPFLAGS += -DRELSTR=\"\"
libopenocd_la_CPPFLAGS += -DGITVERSION=\"\"
else
libopenocd_la_CPPFLAGS += -DRELSTR=\"`$(top_srcdir)/guess-rev.sh $(top_srcdir)`\"
endif
libopenocd_la_CPPFLAGS += -DGITVERSION=\"`cd $(top_srcdir) && git describe`\"
endif
# add default CPPFLAGS
libopenocd_la_CPPFLAGS += $(AM_CPPFLAGS) $(CPPFLAGS)
@@ -76,26 +77,13 @@ endif
endif
endif
if USBPROG
LIBUSB = -lusb
else
if JLINK
LIBUSB = -lusb
else
if RLINK
LIBUSB = -lusb
else
if ULINK
LIBUSB = -lusb
else
if VSLLINK
LIBUSB = -lusb
else
LIBUSB =
if USE_LIBUSB1
LIBUSB += -lusb-1.0
endif
endif
endif
endif
if USE_LIBUSB0
LIBUSB += -lusb
endif
libopenocd_la_LIBADD = \

File diff suppressed because it is too large Load Diff

View File

@@ -16,6 +16,7 @@
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
@@ -32,17 +33,17 @@ unsigned get_flash_name_index(const char *name)
return ~0U;
unsigned requested;
int retval = parse_uint(name_index + 1, &requested);
// detect parsing error by forcing past end of bank list
/* detect parsing error by forcing past end of bank list */
return (ERROR_OK == retval) ? requested : ~0U;
}
bool flash_driver_name_matches(const char *name, const char *expected)
{
unsigned blen = strlen(name);
// only match up to the length of the driver name...
/* only match up to the length of the driver name... */
if (strncmp(name, expected, blen) != 0)
return false;
// ...then check that name terminates at this spot.
/* ...then check that name terminates at this spot. */
return expected[blen] == '.' || expected[blen] == '\0';
}

View File

@@ -16,6 +16,7 @@
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
#ifndef FLASH_COMMON_H
#define FLASH_COMMON_H
@@ -36,14 +37,14 @@ unsigned get_flash_name_index(const char *name);
*/
bool flash_driver_name_matches(const char *name, const char *expected);
#define ERROR_FLASH_BANK_INVALID (-900)
#define ERROR_FLASH_SECTOR_INVALID (-901)
#define ERROR_FLASH_OPERATION_FAILED (-902)
#define ERROR_FLASH_DST_OUT_OF_BANK (-903)
#define ERROR_FLASH_DST_BREAKS_ALIGNMENT (-904)
#define ERROR_FLASH_BUSY (-905)
#define ERROR_FLASH_SECTOR_NOT_ERASED (-906)
#define ERROR_FLASH_BANK_NOT_PROBED (-907)
#define ERROR_FLASH_OPER_UNSUPPORTED (-908)
#define ERROR_FLASH_BANK_INVALID (-900)
#define ERROR_FLASH_SECTOR_INVALID (-901)
#define ERROR_FLASH_OPERATION_FAILED (-902)
#define ERROR_FLASH_DST_OUT_OF_BANK (-903)
#define ERROR_FLASH_DST_BREAKS_ALIGNMENT (-904)
#define ERROR_FLASH_BUSY (-905)
#define ERROR_FLASH_SECTOR_NOT_ERASED (-906)
#define ERROR_FLASH_BANK_NOT_PROBED (-907)
#define ERROR_FLASH_OPER_UNSUPPORTED (-908)
#endif // FLASH_COMMON_H
#endif /* FLASH_COMMON_H */

File diff suppressed because it is too large Load Diff

View File

@@ -26,17 +26,15 @@ typedef unsigned long mg_io_uint32;
typedef unsigned short mg_io_uint16;
typedef unsigned char mg_io_uint8;
struct mflash_gpio_num
{
struct mflash_gpio_num {
char port[2];
signed short num;
};
struct mflash_gpio_drv
{
struct mflash_gpio_drv {
const char *name;
int (*set_gpio_to_output) (struct mflash_gpio_num gpio);
int (*set_gpio_output_val) (struct mflash_gpio_num gpio, uint8_t val);
int (*set_gpio_to_output)(struct mflash_gpio_num gpio);
int (*set_gpio_output_val)(struct mflash_gpio_num gpio, uint8_t val);
};
typedef struct _mg_io_type_drv_info {
@@ -48,50 +46,50 @@ typedef struct _mg_io_type_drv_info {
mg_io_uint16 unformatted_bytes_per_track; /* 04 */
mg_io_uint16 unformatted_bytes_per_sector; /* 05 */
mg_io_uint16 sectors_per_track; /* 06 */
mg_io_uint16 vendor_unique1[3]; /* 07/08/09 */
mg_io_uint16 vendor_unique1[3]; /* 07/08/09 */
mg_io_uint8 serial_number[20]; /* 10~19 */
mg_io_uint8 serial_number[20]; /* 10~19 */
mg_io_uint16 buffer_type; /* 20 */
mg_io_uint16 buffer_sector_size; /* 21 */
mg_io_uint16 number_of_ecc_bytes; /* 22 */
mg_io_uint8 firmware_revision[8]; /* 23~26 */
mg_io_uint8 model_number[40]; /* 27 */
mg_io_uint8 firmware_revision[8]; /* 23~26 */
mg_io_uint8 model_number[40]; /* 27 */
mg_io_uint8 maximum_block_transfer; /* 47 low byte */
mg_io_uint8 vendor_unique2; /* 47 high byte */
mg_io_uint8 maximum_block_transfer; /* 47 low byte */
mg_io_uint8 vendor_unique2; /* 47 high byte */
mg_io_uint16 dword_io; /* 48 */
mg_io_uint16 capabilities; /* 49 */
mg_io_uint16 reserved2; /* 50 */
mg_io_uint8 vendor_unique3; /* 51 low byte */
mg_io_uint8 pio_cycle_timing_mode; /* 51 high byte */
mg_io_uint8 vendor_unique4; /* 52 low byte */
mg_io_uint8 dma_cycle_timing_mode; /* 52 high byte */
mg_io_uint8 vendor_unique3; /* 51 low byte */
mg_io_uint8 pio_cycle_timing_mode; /* 51 high byte */
mg_io_uint8 vendor_unique4; /* 52 low byte */
mg_io_uint8 dma_cycle_timing_mode; /* 52 high byte */
mg_io_uint16 translation_fields_valid; /* 53 (low bit) */
mg_io_uint16 number_of_current_cylinders; /* 54 */
mg_io_uint16 number_of_current_heads; /* 55 */
mg_io_uint16 current_sectors_per_track; /* 56 */
mg_io_uint16 current_sector_capacity_lo; /* 57 & 58 */
mg_io_uint16 current_sector_capacity_hi; /* 57 & 58 */
mg_io_uint8 multi_sector_count; /* 59 low */
mg_io_uint8 multi_sector_setting_valid; /* 59 high (low bit) */
mg_io_uint8 multi_sector_count; /* 59 low */
mg_io_uint8 multi_sector_setting_valid; /* 59 high (low bit) */
mg_io_uint16 total_user_addressable_sectors_lo; /* 60 & 61 */
mg_io_uint16 total_user_addressable_sectors_hi; /* 60 & 61 */
mg_io_uint8 single_dma_modes_supported; /* 62 low byte */
mg_io_uint8 single_dma_transfer_active; /* 62 high byte */
mg_io_uint8 multi_dma_modes_supported; /* 63 low byte */
mg_io_uint8 multi_dma_transfer_active; /* 63 high byte */
mg_io_uint8 single_dma_modes_supported; /* 62 low byte */
mg_io_uint8 single_dma_transfer_active; /* 62 high byte */
mg_io_uint8 multi_dma_modes_supported; /* 63 low byte */
mg_io_uint8 multi_dma_transfer_active; /* 63 high byte */
mg_io_uint16 adv_pio_mode;
mg_io_uint16 min_dma_cyc;
mg_io_uint16 recommend_dma_cyc;
mg_io_uint16 min_pio_cyc_no_iordy;
mg_io_uint16 min_pio_cyc_with_iordy;
mg_io_uint8 reserved3[22];
mg_io_uint8 reserved3[22];
mg_io_uint16 major_ver_num;
mg_io_uint16 minor_ver_num;
mg_io_uint16 feature_cmd_set_suprt0;
@@ -106,23 +104,22 @@ typedef struct _mg_io_type_drv_info {
mg_io_uint16 adv_pwr_mgm_lvl_val;
mg_io_uint16 reserved5;
mg_io_uint16 re_of_hw_rst;
mg_io_uint8 reserved6[68];
mg_io_uint8 reserved6[68];
mg_io_uint16 security_stas;
mg_io_uint8 vendor_uniq_bytes[62];
mg_io_uint8 vendor_uniq_bytes[62];
mg_io_uint16 cfa_pwr_mode;
mg_io_uint8 reserved7[186];
mg_io_uint8 reserved7[186];
mg_io_uint16 scts_per_secure_data_unit;
mg_io_uint16 integrity_word;
} mg_io_type_drv_info;
typedef struct _mg_pll_t
{
unsigned int lock_cyc;
typedef struct _mg_pll_t {
unsigned int lock_cyc;
unsigned short feedback_div; /* 9bit divider */
unsigned char input_div; /* 5bit divider */
unsigned char output_div; /* 2bit divider */
unsigned char input_div; /* 5bit divider */
unsigned char output_div; /* 2bit divider */
} mg_pll_t;
struct mg_drv_info {
@@ -130,8 +127,7 @@ struct mg_drv_info {
uint32_t tot_sects;
};
struct mflash_bank
{
struct mflash_bank {
uint32_t base;
struct mflash_gpio_num rst_pin;
@@ -143,34 +139,34 @@ struct mflash_bank
int mflash_register_commands(struct command_context *cmd_ctx);
#define MG_MFLASH_SECTOR_SIZE (0x200) /* 512Bytes = 2^9 */
#define MG_MFLASH_SECTOR_SIZE_MASK (0x200-1)
#define MG_MFLASH_SECTOR_SIZE_SHIFT (9)
#define MG_MFLASH_SECTOR_SIZE (0x200) /* 512Bytes = 2^9 */
#define MG_MFLASH_SECTOR_SIZE_MASK (0x200-1)
#define MG_MFLASH_SECTOR_SIZE_SHIFT (9)
#define MG_BUFFER_OFFSET 0x8000
#define MG_REG_OFFSET 0xC000
#define MG_REG_FEATURE 0x2 /* write case */
#define MG_REG_ERROR 0x2 /* read case */
#define MG_REG_SECT_CNT 0x4
#define MG_REG_SECT_NUM 0x6
#define MG_REG_CYL_LOW 0x8
#define MG_REG_CYL_HIGH 0xA
#define MG_REG_DRV_HEAD 0xC
#define MG_REG_COMMAND 0xE /* write case */
#define MG_REG_STATUS 0xE /* read case */
#define MG_REG_DRV_CTRL 0x10
#define MG_REG_BURST_CTRL 0x12
#define MG_BUFFER_OFFSET 0x8000
#define MG_REG_OFFSET 0xC000
#define MG_REG_FEATURE 0x2 /* write case */
#define MG_REG_ERROR 0x2 /* read case */
#define MG_REG_SECT_CNT 0x4
#define MG_REG_SECT_NUM 0x6
#define MG_REG_CYL_LOW 0x8
#define MG_REG_CYL_HIGH 0xA
#define MG_REG_DRV_HEAD 0xC
#define MG_REG_COMMAND 0xE /* write case */
#define MG_REG_STATUS 0xE /* read case */
#define MG_REG_DRV_CTRL 0x10
#define MG_REG_BURST_CTRL 0x12
#define MG_OEM_DISK_WAIT_TIME_LONG 15000 /* msec */
#define MG_OEM_DISK_WAIT_TIME_NORMAL 3000 /* msec */
#define MG_OEM_DISK_WAIT_TIME_SHORT 1000 /* msec */
#define MG_OEM_DISK_WAIT_TIME_LONG 15000 /* msec */
#define MG_OEM_DISK_WAIT_TIME_NORMAL 3000 /* msec */
#define MG_OEM_DISK_WAIT_TIME_SHORT 1000 /* msec */
#define MG_PLL_CLK_OUT 66000000.0 /* 66Mhz */
#define MG_PLL_CLK_OUT 66000000.0 /* 66Mhz */
#define MG_PLL_MAX_FEEDBACKDIV_VAL 512
#define MG_PLL_MAX_INPUTDIV_VAL 32
#define MG_PLL_MAX_OUTPUTDIV_VAL 4
#define MG_PLL_STD_INPUTCLK 12000000.0 /* 12Mhz */
#define MG_PLL_STD_INPUTCLK 12000000.0 /* 12Mhz */
#define MG_PLL_STD_LOCKCYCLE 10000
#define MG_UNLOCK_OTP_AREA 0xFF
@@ -184,7 +180,7 @@ int mflash_register_commands(struct command_context *cmd_ctx);
#define ERROR_MG_INVALID_OSC (-1605)
#define ERROR_MG_UNSUPPORTED_SOC (-1606)
typedef enum _mg_io_type_wait{
typedef enum _mg_io_type_wait {
mg_io_wait_bsy = 1,
mg_io_wait_not_bsy = 2,
@@ -196,20 +192,20 @@ typedef enum _mg_io_type_wait{
} mg_io_type_wait;
/*= "Status Register" bit masks. */
typedef enum _mg_io_type_rbit_status{
typedef enum _mg_io_type_rbit_status {
mg_io_rbit_status_error = 0x01, /* error bit in status register */
mg_io_rbit_status_corrected_error = 0x04, /* corrected error in status register */
mg_io_rbit_status_data_req = 0x08, /* data request bit in status register */
mg_io_rbit_status_seek_done = 0x10, /* DSC - Drive Seek Complete */
mg_io_rbit_status_write_fault = 0x20, /* DWF - Drive Write Fault */
mg_io_rbit_status_error = 0x01, /* error bit in status register */
mg_io_rbit_status_corrected_error = 0x04, /* corrected error in status register */
mg_io_rbit_status_data_req = 0x08, /* data request bit in status register */
mg_io_rbit_status_seek_done = 0x10, /* DSC - Drive Seek Complete */
mg_io_rbit_status_write_fault = 0x20, /* DWF - Drive Write Fault */
mg_io_rbit_status_ready = 0x40,
mg_io_rbit_status_busy = 0x80
} mg_io_type_rbit_status;
/*= "Error Register" bit masks. */
typedef enum _mg_io_type_rbit_error{
typedef enum _mg_io_type_rbit_error {
mg_io_rbit_err_general = 0x01,
mg_io_rbit_err_aborted = 0x04,
@@ -220,7 +216,7 @@ typedef enum _mg_io_type_rbit_error{
} mg_io_type_rbit_error;
/* = "Device Control Register" bit. */
typedef enum _mg_io_type_rbit_devc{
typedef enum _mg_io_type_rbit_devc {
mg_io_rbit_devc_intr = 0x02, /* interrupt enable bit (1:disable, 0:enable) */
mg_io_rbit_devc_srst = 0x04 /* softwrae reset bit (1:assert, 0:de-assert) */
@@ -228,73 +224,68 @@ typedef enum _mg_io_type_rbit_devc{
} mg_io_type_rbit_devc;
/* "Drive Select/Head Register" values. */
typedef enum _mg_io_type_rval_dev{
typedef enum _mg_io_type_rval_dev {
mg_io_rval_dev_must_be_on = 0x80, /* These 1 bits are always on */
mg_io_rval_dev_drv_master = (0x00 | mg_io_rval_dev_must_be_on), /* Master */
mg_io_rval_dev_drv_slave0 = (0x10 | mg_io_rval_dev_must_be_on), /* Slave0 */
mg_io_rval_dev_drv_slave1 = (0x20 | mg_io_rval_dev_must_be_on), /* Slave1 */
mg_io_rval_dev_drv_slave2 = (0x30 | mg_io_rval_dev_must_be_on), /* Slave2 */
mg_io_rval_dev_lba_mode = (0x40 | mg_io_rval_dev_must_be_on)
mg_io_rval_dev_must_be_on = 0x80, /* These 1 bits are always on */
mg_io_rval_dev_drv_master = (0x00 | mg_io_rval_dev_must_be_on), /* Master */
mg_io_rval_dev_drv_slave0 = (0x10 | mg_io_rval_dev_must_be_on), /* Slave0 */
mg_io_rval_dev_drv_slave1 = (0x20 | mg_io_rval_dev_must_be_on), /* Slave1 */
mg_io_rval_dev_drv_slave2 = (0x30 | mg_io_rval_dev_must_be_on), /* Slave2 */
mg_io_rval_dev_lba_mode = (0x40 | mg_io_rval_dev_must_be_on)
} mg_io_type_rval_dev;
typedef enum _mg_io_type_cmd
{
mg_io_cmd_read =0x20,
mg_io_cmd_write =0x30,
typedef enum _mg_io_type_cmd {
mg_io_cmd_read = 0x20,
mg_io_cmd_write = 0x30,
mg_io_cmd_setmul =0xC6,
mg_io_cmd_readmul =0xC4,
mg_io_cmd_writemul =0xC5,
mg_io_cmd_setmul = 0xC6,
mg_io_cmd_readmul = 0xC4,
mg_io_cmd_writemul = 0xC5,
mg_io_cmd_idle =0x97, /* 0xE3 */
mg_io_cmd_idle_immediate =0x95, /* 0xE1 */
mg_io_cmd_idle = 0x97, /* 0xE3 */
mg_io_cmd_idle_immediate = 0x95, /* 0xE1 */
mg_io_cmd_setsleep =0x99, /* 0xE6 */
mg_io_cmd_stdby =0x96, /* 0xE2 */
mg_io_cmd_stdby_immediate =0x94, /* 0xE0 */
mg_io_cmd_setsleep = 0x99, /* 0xE6 */
mg_io_cmd_stdby = 0x96, /* 0xE2 */
mg_io_cmd_stdby_immediate = 0x94, /* 0xE0 */
mg_io_cmd_identify =0xEC,
mg_io_cmd_set_feature =0xEF,
mg_io_cmd_identify = 0xEC,
mg_io_cmd_set_feature = 0xEF,
mg_io_cmd_confirm_write =0x3C,
mg_io_cmd_confirm_read =0x40,
mg_io_cmd_wakeup =0xC3
mg_io_cmd_confirm_write = 0x3C,
mg_io_cmd_confirm_read = 0x40,
mg_io_cmd_wakeup = 0xC3
} mg_io_type_cmd;
typedef enum _mg_feature_id
{
typedef enum _mg_feature_id {
mg_feature_id_transmode = 0x3
} mg_feature_id;
typedef enum _mg_feature_val
{
typedef enum _mg_feature_val {
mg_feature_val_trans_default = 0x0,
mg_feature_val_trans_vcmd = 0x3,
mg_feature_val_trand_vcmds = 0x2
} mg_feature_val;
typedef enum _mg_vcmd
{
mg_vcmd_update_xipinfo = 0xFA, /* FWPATCH commmand through IOM I/O */
mg_vcmd_verify_fwpatch = 0xFB, /* FWPATCH commmand through IOM I/O */
mg_vcmd_update_stgdrvinfo = 0xFC, /* IOM identificatin info program command */
mg_vcmd_prep_fwpatch = 0xFD, /* FWPATCH commmand through IOM I/O */
mg_vcmd_exe_fwpatch = 0xFE, /* FWPATCH commmand through IOM I/O */
typedef enum _mg_vcmd {
mg_vcmd_update_xipinfo = 0xFA, /* FWPATCH commmand through IOM I/O */
mg_vcmd_verify_fwpatch = 0xFB, /* FWPATCH commmand through IOM I/O */
mg_vcmd_update_stgdrvinfo = 0xFC, /* IOM identificatin info program command */
mg_vcmd_prep_fwpatch = 0xFD, /* FWPATCH commmand through IOM I/O */
mg_vcmd_exe_fwpatch = 0xFE, /* FWPATCH commmand through IOM I/O */
mg_vcmd_wr_pll = 0x8B,
mg_vcmd_purge_nand = 0x8C, /* Only for Seagle */
mg_vcmd_purge_nand = 0x8C, /* Only for Seagle */
mg_vcmd_lock_otp = 0x8D,
mg_vcmd_rd_otp = 0x8E,
mg_vcmd_wr_otp = 0x8F
} mg_vcmd;
typedef enum _mg_opmode
{
mg_op_mode_xip = 1, /* TRUE XIP */
mg_op_mode_snd = 2, /* BOOT + Storage */
mg_op_mode_stg = 0 /* Only Storage */
typedef enum _mg_opmode {
mg_op_mode_xip = 1, /* TRUE XIP */
mg_op_mode_snd = 2, /* BOOT + Storage */
mg_op_mode_stg = 0 /* Only Storage */
} mg_opmode;
#endif

View File

@@ -17,7 +17,7 @@ NAND_DRIVERS = \
davinci.c \
lpc3180.c \
lpc32xx.c \
mx2.c \
mxc.c \
mx3.c \
orion.c \
s3c24xx.c \
@@ -37,7 +37,7 @@ noinst_HEADERS = \
imp.h \
lpc3180.h \
lpc32xx.h \
mx2.h \
mxc.h \
mx3.h \
s3c24xx.h \
s3c24xx_regs.h \

View File

@@ -28,9 +28,9 @@
#include "arm_io.h"
#include <helper/binarybuffer.h>
#include <target/arm.h>
#include <target/armv7m.h>
#include <target/algorithm.h>
/**
* Copies code to a working area. This will allocate room for the code plus the
* additional amount requested if the working area pointer is null.
@@ -44,8 +44,8 @@
* @return Success or failure of the operation
*/
static int arm_code_to_working_area(struct target *target,
const uint32_t *code, unsigned code_size,
unsigned additional, struct working_area **area)
const uint32_t *code, unsigned code_size,
unsigned additional, struct working_area **area)
{
uint8_t code_buf[code_size];
unsigned i;
@@ -61,7 +61,7 @@ static int arm_code_to_working_area(struct target *target,
if (NULL == *area) {
retval = target_alloc_working_area(target, size, area);
if (retval != ERROR_OK) {
LOG_DEBUG("%s: no %d byte buffer", __FUNCTION__, (int) size);
LOG_DEBUG("%s: no %d byte buffer", __func__, (int) size);
return ERROR_NAND_NO_BUFFER;
}
}
@@ -79,14 +79,13 @@ static int arm_code_to_working_area(struct target *target,
/**
* ARM-specific bulk write from buffer to address of 8-bit wide NAND.
* For now this only supports ARMv4 and ARMv5 cores.
* For now this supports ARMv4,ARMv5 and ARMv7-M cores.
*
* Enhancements to target_run_algorithm() could enable:
* - ARMv6 and ARMv7 cores in ARM mode
*
* Different code fragments could handle:
* - Thumb2 cores like Cortex-M (needs different byteswapping)
* - 16-bit wide data (needs different setup too)
* - 16-bit wide data (needs different setup)
*
* @param nand Pointer to the arm_nand_data struct that defines the I/O
* @param data Pointer to the data to be copied to flash
@@ -95,20 +94,22 @@ static int arm_code_to_working_area(struct target *target,
*/
int arm_nandwrite(struct arm_nand_data *nand, uint8_t *data, int size)
{
struct target *target = nand->target;
struct arm_algorithm algo;
struct arm *armv4_5 = target->arch_info;
struct reg_param reg_params[3];
uint32_t target_buf;
uint32_t exit_var = 0;
int retval;
struct target *target = nand->target;
struct arm_algorithm armv4_5_algo;
struct armv7m_algorithm armv7m_algo;
void *arm_algo;
struct arm *arm = target->arch_info;
struct reg_param reg_params[3];
uint32_t target_buf;
uint32_t exit_var = 0;
int retval;
/* Inputs:
* r0 NAND data address (byte wide)
* r1 buffer address
* r2 buffer length
*/
static const uint32_t code[] = {
static const uint32_t code_armv4_5[] = {
0xe4d13001, /* s: ldrb r3, [r1], #1 */
0xe5c03000, /* strb r3, [r0] */
0xe2522001, /* subs r2, r2, #1 */
@@ -118,31 +119,55 @@ int arm_nandwrite(struct arm_nand_data *nand, uint8_t *data, int size)
0xe1200070, /* e: bkpt #0 */
};
/* Inputs:
* r0 NAND data address (byte wide)
* r1 buffer address
* r2 buffer length
*
* see contrib/loaders/flash/armv7m_io.s for src
*/
static const uint32_t code_armv7m[] = {
0x3b01f811,
0x3a017003,
0xaffaf47f,
0xbf00be00,
};
int target_code_size = 0;
const uint32_t *target_code_src = NULL;
/* set up algorithm */
if (is_armv7m(target_to_armv7m(target))) { /* armv7m target */
armv7m_algo.common_magic = ARMV7M_COMMON_MAGIC;
armv7m_algo.core_mode = ARM_MODE_THREAD;
arm_algo = &armv7m_algo;
target_code_size = sizeof(code_armv7m);
target_code_src = code_armv7m;
} else {
armv4_5_algo.common_magic = ARM_COMMON_MAGIC;
armv4_5_algo.core_mode = ARM_MODE_SVC;
armv4_5_algo.core_state = ARM_STATE_ARM;
arm_algo = &armv4_5_algo;
target_code_size = sizeof(code_armv4_5);
target_code_src = code_armv4_5;
}
if (nand->op != ARM_NAND_WRITE || !nand->copy_area) {
retval = arm_code_to_working_area(target, code, sizeof(code),
retval = arm_code_to_working_area(target, target_code_src, target_code_size,
nand->chunk_size, &nand->copy_area);
if (retval != ERROR_OK) {
if (retval != ERROR_OK)
return retval;
}
}
nand->op = ARM_NAND_WRITE;
/* copy data to work area */
target_buf = nand->copy_area->address + sizeof(code);
retval = target_bulk_write_memory(target, target_buf, size / 4, data);
if (retval == ERROR_OK && (size & 3) != 0)
retval = target_write_memory(target,
target_buf + (size & ~3),
1, size & 3, data + (size & ~3));
target_buf = nand->copy_area->address + target_code_size;
retval = target_write_buffer(target, target_buf, size, data);
if (retval != ERROR_OK)
return retval;
/* set up algorithm and parameters */
algo.common_magic = ARM_COMMON_MAGIC;
algo.core_mode = ARM_MODE_SVC;
algo.core_state = ARM_STATE_ARM;
/* set up parameters */
init_reg_param(&reg_params[0], "r0", 32, PARAM_IN);
init_reg_param(&reg_params[1], "r1", 32, PARAM_IN);
init_reg_param(&reg_params[2], "r2", 32, PARAM_IN);
@@ -152,12 +177,12 @@ int arm_nandwrite(struct arm_nand_data *nand, uint8_t *data, int size)
buf_set_u32(reg_params[2].value, 0, 32, size);
/* armv4 must exit using a hardware breakpoint */
if (armv4_5->is_armv4)
exit_var = nand->copy_area->address + sizeof(code) - 4;
if (arm->is_armv4)
exit_var = nand->copy_area->address + target_code_size - 4;
/* use alg to write data from work area to NAND chip */
retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
nand->copy_area->address, exit_var, 1000, &algo);
nand->copy_area->address, exit_var, 1000, arm_algo);
if (retval != ERROR_OK)
LOG_ERROR("error executing hosted NAND write");
@@ -180,8 +205,10 @@ int arm_nandwrite(struct arm_nand_data *nand, uint8_t *data, int size)
int arm_nandread(struct arm_nand_data *nand, uint8_t *data, uint32_t size)
{
struct target *target = nand->target;
struct arm_algorithm algo;
struct arm *armv4_5 = target->arch_info;
struct arm_algorithm armv4_5_algo;
struct armv7m_algorithm armv7m_algo;
void *arm_algo;
struct arm *arm = target->arch_info;
struct reg_param reg_params[3];
uint32_t target_buf;
uint32_t exit_var = 0;
@@ -192,7 +219,7 @@ int arm_nandread(struct arm_nand_data *nand, uint8_t *data, uint32_t size)
* r1 NAND data address (byte wide)
* r2 buffer length
*/
static const uint32_t code[] = {
static const uint32_t code_armv4_5[] = {
0xe5d13000, /* s: ldrb r3, [r1] */
0xe4c03001, /* strb r3, [r0], #1 */
0xe2522001, /* subs r2, r2, #1 */
@@ -202,23 +229,51 @@ int arm_nandread(struct arm_nand_data *nand, uint8_t *data, uint32_t size)
0xe1200070, /* e: bkpt #0 */
};
/* Inputs:
* r0 buffer address
* r1 NAND data address (byte wide)
* r2 buffer length
*
* see contrib/loaders/flash/armv7m_io.s for src
*/
static const uint32_t code_armv7m[] = {
0xf800780b,
0x3a013b01,
0xaffaf47f,
0xbf00be00,
};
int target_code_size = 0;
const uint32_t *target_code_src = NULL;
/* set up algorithm */
if (is_armv7m(target_to_armv7m(target))) { /* armv7m target */
armv7m_algo.common_magic = ARMV7M_COMMON_MAGIC;
armv7m_algo.core_mode = ARM_MODE_THREAD;
arm_algo = &armv7m_algo;
target_code_size = sizeof(code_armv7m);
target_code_src = code_armv7m;
} else {
armv4_5_algo.common_magic = ARM_COMMON_MAGIC;
armv4_5_algo.core_mode = ARM_MODE_SVC;
armv4_5_algo.core_state = ARM_STATE_ARM;
arm_algo = &armv4_5_algo;
target_code_size = sizeof(code_armv4_5);
target_code_src = code_armv4_5;
}
/* create the copy area if not yet available */
if (nand->op != ARM_NAND_READ || !nand->copy_area) {
retval = arm_code_to_working_area(target, code, sizeof(code),
retval = arm_code_to_working_area(target, target_code_src, target_code_size,
nand->chunk_size, &nand->copy_area);
if (retval != ERROR_OK) {
if (retval != ERROR_OK)
return retval;
}
}
nand->op = ARM_NAND_READ;
target_buf = nand->copy_area->address + sizeof(code);
/* set up algorithm and parameters */
algo.common_magic = ARM_COMMON_MAGIC;
algo.core_mode = ARM_MODE_SVC;
algo.core_state = ARM_STATE_ARM;
target_buf = nand->copy_area->address + target_code_size;
/* set up parameters */
init_reg_param(&reg_params[0], "r0", 32, PARAM_IN);
init_reg_param(&reg_params[1], "r1", 32, PARAM_IN);
init_reg_param(&reg_params[2], "r2", 32, PARAM_IN);
@@ -228,12 +283,12 @@ int arm_nandread(struct arm_nand_data *nand, uint8_t *data, uint32_t size)
buf_set_u32(reg_params[2].value, 0, 32, size);
/* armv4 must exit using a hardware breakpoint */
if (armv4_5->is_armv4)
exit_var = nand->copy_area->address + sizeof(code) - 4;
if (arm->is_armv4)
exit_var = nand->copy_area->address + target_code_size - 4;
/* use alg to write data from NAND chip to work area */
retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
nand->copy_area->address, exit_var, 1000, &algo);
nand->copy_area->address, exit_var, 1000, arm_algo);
if (retval != ERROR_OK)
LOG_ERROR("error executing hosted NAND read");
@@ -246,4 +301,3 @@ int arm_nandread(struct arm_nand_data *nand, uint8_t *data, uint32_t size)
return retval;
}

View File

@@ -23,9 +23,9 @@
* Available operational states the arm_nand_data struct can be in.
*/
enum arm_nand_op {
ARM_NAND_NONE, /**< No operation performed. */
ARM_NAND_READ, /**< Read operation performed. */
ARM_NAND_WRITE, /**< Write operation performed. */
ARM_NAND_NONE, /**< No operation performed. */
ARM_NAND_READ, /**< Read operation performed. */
ARM_NAND_WRITE, /**< Write operation performed. */
};
/**
@@ -37,7 +37,7 @@ struct arm_nand_data {
struct target *target;
/** The copy area holds code loop and data for I/O operations. */
struct working_area *copy_area;
struct working_area *copy_area;
/** The chunk size is the page size or ECC chunk. */
unsigned chunk_size;
@@ -54,4 +54,4 @@ struct arm_nand_data {
int arm_nandwrite(struct arm_nand_data *nand, uint8_t *data, int size);
int arm_nandread(struct arm_nand_data *nand, uint8_t *data, uint32_t size);
#endif /* __ARM_NANDIO_H */
#endif /* __ARM_NANDIO_H */

View File

@@ -17,6 +17,7 @@
* Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
@@ -26,13 +27,13 @@
#include "imp.h"
#include "arm_io.h"
#define AT91C_PIOx_SODR (0x30) /**< Offset to PIO SODR. */
#define AT91C_PIOx_CODR (0x34) /**< Offset to PIO CODR. */
#define AT91C_PIOx_PDSR (0x3C) /**< Offset to PIO PDSR. */
#define AT91C_ECCx_CR (0x00) /**< Offset to ECC CR. */
#define AT91C_ECCx_SR (0x08) /**< Offset to ECC SR. */
#define AT91C_ECCx_PR (0x0C) /**< Offset to ECC PR. */
#define AT91C_ECCx_NPR (0x10) /**< Offset to ECC NPR. */
#define AT91C_PIOx_SODR (0x30) /**< Offset to PIO SODR. */
#define AT91C_PIOx_CODR (0x34) /**< Offset to PIO CODR. */
#define AT91C_PIOx_PDSR (0x3C) /**< Offset to PIO PDSR. */
#define AT91C_ECCx_CR (0x00) /**< Offset to ECC CR. */
#define AT91C_ECCx_SR (0x08) /**< Offset to ECC SR. */
#define AT91C_ECCx_PR (0x0C) /**< Offset to ECC PR. */
#define AT91C_ECCx_NPR (0x10) /**< Offset to ECC NPR. */
/**
* Representation of a pin on an AT91SAM9 chip.
@@ -97,9 +98,8 @@ static int at91sam9_init(struct nand_device *nand)
{
struct target *target = nand->target;
if (!at91sam9_halted(target, "init")) {
if (!at91sam9_halted(target, "init"))
return ERROR_NAND_OPERATION_FAILED;
}
return ERROR_OK;
}
@@ -144,9 +144,8 @@ static int at91sam9_command(struct nand_device *nand, uint8_t command)
struct at91sam9_nand *info = nand->controller_priv;
struct target *target = nand->target;
if (!at91sam9_halted(target, "command")) {
if (!at91sam9_halted(target, "command"))
return ERROR_NAND_OPERATION_FAILED;
}
at91sam9_enable(nand);
@@ -161,9 +160,8 @@ static int at91sam9_command(struct nand_device *nand, uint8_t command)
*/
static int at91sam9_reset(struct nand_device *nand)
{
if (!at91sam9_halted(nand->target, "reset")) {
if (!at91sam9_halted(nand->target, "reset"))
return ERROR_NAND_OPERATION_FAILED;
}
return at91sam9_disable(nand);
}
@@ -180,9 +178,8 @@ static int at91sam9_address(struct nand_device *nand, uint8_t address)
struct at91sam9_nand *info = nand->controller_priv;
struct target *target = nand->target;
if (!at91sam9_halted(nand->target, "address")) {
if (!at91sam9_halted(nand->target, "address"))
return ERROR_NAND_OPERATION_FAILED;
}
return target_write_u8(target, info->addr, address);
}
@@ -200,9 +197,8 @@ static int at91sam9_read_data(struct nand_device *nand, void *data)
struct at91sam9_nand *info = nand->controller_priv;
struct target *target = nand->target;
if (!at91sam9_halted(nand->target, "read data")) {
if (!at91sam9_halted(nand->target, "read data"))
return ERROR_NAND_OPERATION_FAILED;
}
return target_read_u8(target, info->data, data);
}
@@ -220,9 +216,8 @@ static int at91sam9_write_data(struct nand_device *nand, uint16_t data)
struct at91sam9_nand *info = nand->controller_priv;
struct target *target = nand->target;
if (!at91sam9_halted(target, "write data")) {
if (!at91sam9_halted(target, "write data"))
return ERROR_NAND_OPERATION_FAILED;
}
return target_write_u8(target, info->data, data);
}
@@ -240,16 +235,14 @@ static int at91sam9_nand_ready(struct nand_device *nand, int timeout)
struct target *target = nand->target;
uint32_t status;
if (!at91sam9_halted(target, "nand ready")) {
if (!at91sam9_halted(target, "nand ready"))
return 0;
}
do {
target_read_u32(target, info->busy.pioc + AT91C_PIOx_PDSR, &status);
if (status & (1 << info->busy.num)) {
if (status & (1 << info->busy.num))
return 1;
}
alive_sleep(1);
} while (timeout-- > 0);
@@ -272,9 +265,8 @@ static int at91sam9_read_block_data(struct nand_device *nand, uint8_t *data, int
struct arm_nand_data *io = &info->io;
int status;
if (!at91sam9_halted(nand->target, "read block")) {
if (!at91sam9_halted(nand->target, "read block"))
return ERROR_NAND_OPERATION_FAILED;
}
io->chunk_size = nand->page_size;
status = arm_nandread(io, data, size);
@@ -297,9 +289,8 @@ static int at91sam9_write_block_data(struct nand_device *nand, uint8_t *data, in
struct arm_nand_data *io = &info->io;
int status;
if (!at91sam9_halted(nand->target, "write block")) {
if (!at91sam9_halted(nand->target, "write block"))
return ERROR_NAND_OPERATION_FAILED;
}
io->chunk_size = nand->page_size;
status = arm_nandwrite(io, data, size);
@@ -321,7 +312,7 @@ static int at91sam9_ecc_init(struct target *target, struct at91sam9_nand *info)
return ERROR_NAND_OPERATION_FAILED;
}
// reset ECC parity registers
/* reset ECC parity registers */
return target_write_u32(target, info->ecc + AT91C_ECCx_CR, 1);
}
@@ -335,19 +326,19 @@ static int at91sam9_ecc_init(struct target *target, struct at91sam9_nand *info)
* @param size Size of the OOB.
* @return Pointer to an area to store OOB data.
*/
static uint8_t * at91sam9_oob_init(struct nand_device *nand, uint8_t *oob, uint32_t *size)
static uint8_t *at91sam9_oob_init(struct nand_device *nand, uint8_t *oob, uint32_t *size)
{
if (!oob) {
// user doesn't want OOB, allocate it
if (nand->page_size == 512) {
/* user doesn't want OOB, allocate it */
if (nand->page_size == 512)
*size = 16;
} else if (nand->page_size == 2048) {
else if (nand->page_size == 2048)
*size = 64;
}
oob = malloc(*size);
if (!oob) {
LOG_ERROR("Unable to allocate space for OOB");
return NULL;
}
memset(oob, 0xFF, *size);
@@ -370,7 +361,7 @@ static uint8_t * at91sam9_oob_init(struct nand_device *nand, uint8_t *oob, uint3
* @return Success or failure of reading the NAND page.
*/
static int at91sam9_read_page(struct nand_device *nand, uint32_t page,
uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
{
int retval;
struct at91sam9_nand *info = nand->controller_priv;
@@ -379,20 +370,17 @@ static int at91sam9_read_page(struct nand_device *nand, uint32_t page,
uint32_t status;
retval = at91sam9_ecc_init(target, info);
if (ERROR_OK != retval) {
if (ERROR_OK != retval)
return retval;
}
retval = nand_page_command(nand, page, NAND_CMD_READ0, !data);
if (ERROR_OK != retval) {
if (ERROR_OK != retval)
return retval;
}
if (data) {
retval = nand_read_data_page(nand, data, data_size);
if (ERROR_OK != retval) {
if (ERROR_OK != retval)
return retval;
}
}
oob_data = at91sam9_oob_init(nand, oob, &oob_size);
@@ -401,33 +389,33 @@ static int at91sam9_read_page(struct nand_device *nand, uint32_t page,
target_read_u32(target, info->ecc + AT91C_ECCx_SR, &status);
if (status & 1) {
LOG_ERROR("Error detected!");
if (status & 4) {
if (status & 4)
LOG_ERROR("Multiple errors encountered; unrecoverable!");
} else {
// attempt recovery
else {
/* attempt recovery */
uint32_t parity;
target_read_u32(target,
info->ecc + AT91C_ECCx_PR,
&parity);
info->ecc + AT91C_ECCx_PR,
&parity);
uint32_t word = (parity & 0x0000FFF0) >> 4;
uint32_t bit = parity & 0x0F;
data[word] ^= (0x1) << bit;
LOG_INFO("Data word %d, bit %d corrected.",
(unsigned) word,
(unsigned) bit);
(unsigned) word,
(unsigned) bit);
}
}
if (status & 2) {
// we could write back correct ECC data
/* we could write back correct ECC data */
LOG_ERROR("Error in ECC bytes detected");
}
}
if (!oob) {
// if it wasn't asked for, free it
/* if it wasn't asked for, free it */
free(oob_data);
}
@@ -448,7 +436,7 @@ static int at91sam9_read_page(struct nand_device *nand, uint32_t page,
* @return Success or failure of the page write.
*/
static int at91sam9_write_page(struct nand_device *nand, uint32_t page,
uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
{
struct at91sam9_nand *info = nand->controller_priv;
struct target *target = nand->target;
@@ -457,14 +445,12 @@ static int at91sam9_write_page(struct nand_device *nand, uint32_t page,
uint32_t parity, nparity;
retval = at91sam9_ecc_init(target, info);
if (ERROR_OK != retval) {
if (ERROR_OK != retval)
return retval;
}
retval = nand_page_command(nand, page, NAND_CMD_SEQIN, !data);
if (ERROR_OK != retval) {
if (ERROR_OK != retval)
return retval;
}
if (data) {
retval = nand_write_data_page(nand, data, data_size);
@@ -477,7 +463,7 @@ static int at91sam9_write_page(struct nand_device *nand, uint32_t page,
oob_data = at91sam9_oob_init(nand, oob, &oob_size);
if (!oob) {
// no OOB given, so read in the ECC parity from the ECC controller
/* no OOB given, so read in the ECC parity from the ECC controller */
target_read_u32(target, info->ecc + AT91C_ECCx_PR, &parity);
target_read_u32(target, info->ecc + AT91C_ECCx_NPR, &nparity);
@@ -489,9 +475,8 @@ static int at91sam9_write_page(struct nand_device *nand, uint32_t page,
retval = nand_write_data_page(nand, oob_data, oob_size);
if (!oob) {
if (!oob)
free(oob_data);
}
if (ERROR_OK != retval) {
LOG_ERROR("Unable to write OOB data to NAND");
@@ -593,9 +578,8 @@ COMMAND_HANDLER(handle_at91sam9_ale_command)
struct at91sam9_nand *info = NULL;
unsigned num, address_line;
if (CMD_ARGC != 2) {
if (CMD_ARGC != 2)
return ERROR_COMMAND_SYNTAX_ERROR;
}
COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num);
nand = get_nand_device_by_num(num);
@@ -622,9 +606,8 @@ COMMAND_HANDLER(handle_at91sam9_rdy_busy_command)
struct at91sam9_nand *info = NULL;
unsigned num, base_pioc, pin_num;
if (CMD_ARGC != 3) {
if (CMD_ARGC != 3)
return ERROR_COMMAND_SYNTAX_ERROR;
}
COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num);
nand = get_nand_device_by_num(num);
@@ -654,9 +637,8 @@ COMMAND_HANDLER(handle_at91sam9_ce_command)
struct at91sam9_nand *info = NULL;
unsigned num, base_pioc, pin_num;
if (CMD_ARGC != 3) {
if (CMD_ARGC != 3)
return ERROR_COMMAND_SYNTAX_ERROR;
}
COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num);
nand = get_nand_device_by_num(num);
@@ -715,6 +697,7 @@ static const struct command_registration at91sam9_command_handler[] = {
.name = "at91sam9",
.mode = COMMAND_ANY,
.help = "AT91SAM9 NAND flash controller commands",
.usage = "",
.chain = at91sam9_sub_command_handlers,
},
COMMAND_REGISTRATION_DONE

View File

@@ -20,6 +20,7 @@
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
@@ -27,13 +28,14 @@
#include "imp.h"
/* configured NAND devices and NAND Flash command handler */
struct nand_device *nand_devices = NULL;
struct nand_device *nand_devices;
void nand_device_add(struct nand_device *c)
{
if (nand_devices) {
struct nand_device *p = nand_devices;
while (p && p->next) p = p->next;
while (p && p->next)
p = p->next;
p->next = c;
} else
nand_devices = c;
@@ -50,94 +52,94 @@ void nand_device_add(struct nand_device *c)
* 256 256 Byte page size
* 512 512 Byte page size
*/
static struct nand_info nand_flash_ids[] =
{
static struct nand_info nand_flash_ids[] = {
/* Vendor Specific Entries */
{ NAND_MFR_SAMSUNG, 0xD5, 8192, 2048, 0x100000, LP_OPTIONS, "K9GAG08 2GB NAND 3.3V x8 MLC 2b/cell"},
{ NAND_MFR_SAMSUNG, 0xD7, 8192, 4096, 0x100000, LP_OPTIONS, "K9LBG08 4GB NAND 3.3V x8 MLC 2b/cell"},
{ NAND_MFR_SAMSUNG, 0xD5, 8192, 2048, 0x100000, LP_OPTIONS,
"K9GAG08 2GB NAND 3.3V x8 MLC 2b/cell"},
{ NAND_MFR_SAMSUNG, 0xD7, 8192, 4096, 0x100000, LP_OPTIONS,
"K9LBG08 4GB NAND 3.3V x8 MLC 2b/cell"},
/* start "museum" IDs */
{ 0x0, 0x6e, 256, 1, 0x1000, 0, "NAND 1MiB 5V 8-bit"},
{ 0x0, 0x64, 256, 2, 0x1000, 0, "NAND 2MiB 5V 8-bit"},
{ 0x0, 0x6b, 512, 4, 0x2000, 0, "NAND 4MiB 5V 8-bit"},
{ 0x0, 0xe8, 256, 1, 0x1000, 0, "NAND 1MiB 3.3V 8-bit"},
{ 0x0, 0xec, 256, 1, 0x1000, 0, "NAND 1MiB 3.3V 8-bit"},
{ 0x0, 0xea, 256, 2, 0x1000, 0, "NAND 2MiB 3.3V 8-bit"},
{ 0x0, 0xd5, 512, 4, 0x2000, 0, "NAND 4MiB 3.3V 8-bit"},
{ 0x0, 0xe3, 512, 4, 0x2000, 0, "NAND 4MiB 3.3V 8-bit"},
{ 0x0, 0xe5, 512, 4, 0x2000, 0, "NAND 4MiB 3.3V 8-bit"},
{ 0x0, 0xd6, 512, 8, 0x2000, 0, "NAND 8MiB 3.3V 8-bit"},
{ 0x0, 0x6e, 256, 1, 0x1000, 0, "NAND 1MiB 5V 8-bit"},
{ 0x0, 0x64, 256, 2, 0x1000, 0, "NAND 2MiB 5V 8-bit"},
{ 0x0, 0x6b, 512, 4, 0x2000, 0, "NAND 4MiB 5V 8-bit"},
{ 0x0, 0xe8, 256, 1, 0x1000, 0, "NAND 1MiB 3.3V 8-bit"},
{ 0x0, 0xec, 256, 1, 0x1000, 0, "NAND 1MiB 3.3V 8-bit"},
{ 0x0, 0xea, 256, 2, 0x1000, 0, "NAND 2MiB 3.3V 8-bit"},
{ 0x0, 0xd5, 512, 4, 0x2000, 0, "NAND 4MiB 3.3V 8-bit"},
{ 0x0, 0xe3, 512, 4, 0x2000, 0, "NAND 4MiB 3.3V 8-bit"},
{ 0x0, 0xe5, 512, 4, 0x2000, 0, "NAND 4MiB 3.3V 8-bit"},
{ 0x0, 0xd6, 512, 8, 0x2000, 0, "NAND 8MiB 3.3V 8-bit"},
{ 0x0, 0x39, 512, 8, 0x2000, 0, "NAND 8MiB 1.8V 8-bit"},
{ 0x0, 0xe6, 512, 8, 0x2000, 0, "NAND 8MiB 3.3V 8-bit"},
{ 0x0, 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16, "NAND 8MiB 1.8V 16-bit"},
{ 0x0, 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16, "NAND 8MiB 3.3V 16-bit"},
{ 0x0, 0x39, 512, 8, 0x2000, 0, "NAND 8MiB 1.8V 8-bit"},
{ 0x0, 0xe6, 512, 8, 0x2000, 0, "NAND 8MiB 3.3V 8-bit"},
{ 0x0, 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16, "NAND 8MiB 1.8V 16-bit"},
{ 0x0, 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16, "NAND 8MiB 3.3V 16-bit"},
/* end "museum" IDs */
{ 0x0, 0x33, 512, 16, 0x4000, 0, "NAND 16MiB 1.8V 8-bit"},
{ 0x0, 0x73, 512, 16, 0x4000, 0, "NAND 16MiB 3.3V 8-bit"},
{ 0x0, 0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16,"NAND 16MiB 1.8V 16-bit"},
{ 0x0, 0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16,"NAND 16MiB 3.3V 16-bit"},
{ 0x0, 0x33, 512, 16, 0x4000, 0, "NAND 16MiB 1.8V 8-bit"},
{ 0x0, 0x73, 512, 16, 0x4000, 0, "NAND 16MiB 3.3V 8-bit"},
{ 0x0, 0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16, "NAND 16MiB 1.8V 16-bit"},
{ 0x0, 0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16, "NAND 16MiB 3.3V 16-bit"},
{ 0x0, 0x35, 512, 32, 0x4000, 0, "NAND 32MiB 1.8V 8-bit"},
{ 0x0, 0x75, 512, 32, 0x4000, 0, "NAND 32MiB 3.3V 8-bit"},
{ 0x0, 0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16,"NAND 32MiB 1.8V 16-bit"},
{ 0x0, 0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16,"NAND 32MiB 3.3V 16-bit"},
{ 0x0, 0x35, 512, 32, 0x4000, 0, "NAND 32MiB 1.8V 8-bit"},
{ 0x0, 0x75, 512, 32, 0x4000, 0, "NAND 32MiB 3.3V 8-bit"},
{ 0x0, 0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16, "NAND 32MiB 1.8V 16-bit"},
{ 0x0, 0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16, "NAND 32MiB 3.3V 16-bit"},
{ 0x0, 0x36, 512, 64, 0x4000, 0, "NAND 64MiB 1.8V 8-bit"},
{ 0x0, 0x76, 512, 64, 0x4000, 0, "NAND 64MiB 3.3V 8-bit"},
{ 0x0, 0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16,"NAND 64MiB 1.8V 16-bit"},
{ 0x0, 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16,"NAND 64MiB 3.3V 16-bit"},
{ 0x0, 0x36, 512, 64, 0x4000, 0, "NAND 64MiB 1.8V 8-bit"},
{ 0x0, 0x76, 512, 64, 0x4000, 0, "NAND 64MiB 3.3V 8-bit"},
{ 0x0, 0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16, "NAND 64MiB 1.8V 16-bit"},
{ 0x0, 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16, "NAND 64MiB 3.3V 16-bit"},
{ 0x0, 0x78, 512, 128, 0x4000, 0, "NAND 128MiB 1.8V 8-bit"},
{ 0x0, 0x39, 512, 128, 0x4000, 0, "NAND 128MiB 1.8V 8-bit"},
{ 0x0, 0x79, 512, 128, 0x4000, 0, "NAND 128MiB 3.3V 8-bit"},
{ 0x0, 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16,"NAND 128MiB 1.8V 16-bit"},
{ 0x0, 0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16,"NAND 128MiB 1.8V 16-bit"},
{ 0x0, 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16,"NAND 128MiB 3.3V 16-bit"},
{ 0x0, 0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16,"NAND 128MiB 3.3V 16-bit"},
{ 0x0, 0x78, 512, 128, 0x4000, 0, "NAND 128MiB 1.8V 8-bit"},
{ 0x0, 0x39, 512, 128, 0x4000, 0, "NAND 128MiB 1.8V 8-bit"},
{ 0x0, 0x79, 512, 128, 0x4000, 0, "NAND 128MiB 3.3V 8-bit"},
{ 0x0, 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16, "NAND 128MiB 1.8V 16-bit"},
{ 0x0, 0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16, "NAND 128MiB 1.8V 16-bit"},
{ 0x0, 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16, "NAND 128MiB 3.3V 16-bit"},
{ 0x0, 0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16, "NAND 128MiB 3.3V 16-bit"},
{ 0x0, 0x71, 512, 256, 0x4000, 0, "NAND 256MiB 3.3V 8-bit"},
{ 0x0, 0x71, 512, 256, 0x4000, 0, "NAND 256MiB 3.3V 8-bit"},
{ 0x0, 0xA2, 0, 64, 0, LP_OPTIONS, "NAND 64MiB 1.8V 8-bit"},
{ 0x0, 0xF2, 0, 64, 0, LP_OPTIONS, "NAND 64MiB 3.3V 8-bit"},
{ 0x0, 0xB2, 0, 64, 0, LP_OPTIONS16, "NAND 64MiB 1.8V 16-bit"},
{ 0x0, 0xC2, 0, 64, 0, LP_OPTIONS16, "NAND 64MiB 3.3V 16-bit"},
{ 0x0, 0xA2, 0, 64, 0, LP_OPTIONS, "NAND 64MiB 1.8V 8-bit"},
{ 0x0, 0xF2, 0, 64, 0, LP_OPTIONS, "NAND 64MiB 3.3V 8-bit"},
{ 0x0, 0xB2, 0, 64, 0, LP_OPTIONS16, "NAND 64MiB 1.8V 16-bit"},
{ 0x0, 0xC2, 0, 64, 0, LP_OPTIONS16, "NAND 64MiB 3.3V 16-bit"},
{ 0x0, 0xA1, 0, 128, 0, LP_OPTIONS, "NAND 128MiB 1.8V 8-bit"},
{ 0x0, 0xF1, 0, 128, 0, LP_OPTIONS, "NAND 128MiB 3.3V 8-bit"},
{ 0x0, 0xB1, 0, 128, 0, LP_OPTIONS16, "NAND 128MiB 1.8V 16-bit"},
{ 0x0, 0xC1, 0, 128, 0, LP_OPTIONS16, "NAND 128MiB 3.3V 16-bit"},
{ 0x0, 0xA1, 0, 128, 0, LP_OPTIONS, "NAND 128MiB 1.8V 8-bit"},
{ 0x0, 0xF1, 0, 128, 0, LP_OPTIONS, "NAND 128MiB 3.3V 8-bit"},
{ 0x0, 0xB1, 0, 128, 0, LP_OPTIONS16, "NAND 128MiB 1.8V 16-bit"},
{ 0x0, 0xC1, 0, 128, 0, LP_OPTIONS16, "NAND 128MiB 3.3V 16-bit"},
{ 0x0, 0xAA, 0, 256, 0, LP_OPTIONS, "NAND 256MiB 1.8V 8-bit"},
{ 0x0, 0xDA, 0, 256, 0, LP_OPTIONS, "NAND 256MiB 3.3V 8-bit"},
{ 0x0, 0xBA, 0, 256, 0, LP_OPTIONS16, "NAND 256MiB 1.8V 16-bit"},
{ 0x0, 0xCA, 0, 256, 0, LP_OPTIONS16, "NAND 256MiB 3.3V 16-bit"},
{ 0x0, 0xAA, 0, 256, 0, LP_OPTIONS, "NAND 256MiB 1.8V 8-bit"},
{ 0x0, 0xDA, 0, 256, 0, LP_OPTIONS, "NAND 256MiB 3.3V 8-bit"},
{ 0x0, 0xBA, 0, 256, 0, LP_OPTIONS16, "NAND 256MiB 1.8V 16-bit"},
{ 0x0, 0xCA, 0, 256, 0, LP_OPTIONS16, "NAND 256MiB 3.3V 16-bit"},
{ 0x0, 0xAC, 0, 512, 0, LP_OPTIONS, "NAND 512MiB 1.8V 8-bit"},
{ 0x0, 0xDC, 0, 512, 0, LP_OPTIONS, "NAND 512MiB 3.3V 8-bit"},
{ 0x0, 0xBC, 0, 512, 0, LP_OPTIONS16, "NAND 512MiB 1.8V 16-bit"},
{ 0x0, 0xCC, 0, 512, 0, LP_OPTIONS16, "NAND 512MiB 3.3V 16-bit"},
{ 0x0, 0xAC, 0, 512, 0, LP_OPTIONS, "NAND 512MiB 1.8V 8-bit"},
{ 0x0, 0xDC, 0, 512, 0, LP_OPTIONS, "NAND 512MiB 3.3V 8-bit"},
{ 0x0, 0xBC, 0, 512, 0, LP_OPTIONS16, "NAND 512MiB 1.8V 16-bit"},
{ 0x0, 0xCC, 0, 512, 0, LP_OPTIONS16, "NAND 512MiB 3.3V 16-bit"},
{ 0x0, 0xA3, 0, 1024, 0, LP_OPTIONS, "NAND 1GiB 1.8V 8-bit"},
{ 0x0, 0xD3, 0, 1024, 0, LP_OPTIONS, "NAND 1GiB 3.3V 8-bit"},
{ 0x0, 0xB3, 0, 1024, 0, LP_OPTIONS16, "NAND 1GiB 1.8V 16-bit"},
{ 0x0, 0xC3, 0, 1024, 0, LP_OPTIONS16, "NAND 1GiB 3.3V 16-bit"},
{ 0x0, 0xA3, 0, 1024, 0, LP_OPTIONS, "NAND 1GiB 1.8V 8-bit"},
{ 0x0, 0xD3, 0, 1024, 0, LP_OPTIONS, "NAND 1GiB 3.3V 8-bit"},
{ 0x0, 0xB3, 0, 1024, 0, LP_OPTIONS16, "NAND 1GiB 1.8V 16-bit"},
{ 0x0, 0xC3, 0, 1024, 0, LP_OPTIONS16, "NAND 1GiB 3.3V 16-bit"},
{ 0x0, 0xA5, 0, 2048, 0, LP_OPTIONS, "NAND 2GiB 1.8V 8-bit"},
{ 0x0, 0xD5, 0, 8192, 0, LP_OPTIONS, "NAND 2GiB 3.3V 8-bit"},
{ 0x0, 0xB5, 0, 2048, 0, LP_OPTIONS16, "NAND 2GiB 1.8V 16-bit"},
{ 0x0, 0xC5, 0, 2048, 0, LP_OPTIONS16, "NAND 2GiB 3.3V 16-bit"},
{ 0x0, 0xA5, 0, 2048, 0, LP_OPTIONS, "NAND 2GiB 1.8V 8-bit"},
{ 0x0, 0xD5, 0, 8192, 0, LP_OPTIONS, "NAND 2GiB 3.3V 8-bit"},
{ 0x0, 0xB5, 0, 2048, 0, LP_OPTIONS16, "NAND 2GiB 1.8V 16-bit"},
{ 0x0, 0xC5, 0, 2048, 0, LP_OPTIONS16, "NAND 2GiB 3.3V 16-bit"},
{ 0x0, 0x48, 0, 2048, 0, LP_OPTIONS, "NAND 2GiB 3.3V 8-bit"},
{ 0x0, 0x48, 0, 2048, 0, LP_OPTIONS, "NAND 2GiB 3.3V 8-bit"},
{0, 0, 0, 0, 0, 0, NULL}
};
/* Manufacturer ID list
*/
static struct nand_manufacturer nand_manuf_ids[] =
{
static struct nand_manufacturer nand_manuf_ids[] = {
{0x0, "unknown"},
{NAND_MFR_TOSHIBA, "Toshiba"},
{NAND_MFR_SAMSUNG, "Samsung"},
@@ -162,7 +164,8 @@ static struct nand_ecclayout nand_oob_8 = {
{.offset = 3,
.length = 2},
{.offset = 6,
.length = 2}}
.length = 2}
}
};
#endif
@@ -179,8 +182,7 @@ static struct nand_device *get_nand_device_by_name(const char *name)
unsigned found = 0;
struct nand_device *nand;
for (nand = nand_devices; NULL != nand; nand = nand->next)
{
for (nand = nand_devices; NULL != nand; nand = nand->next) {
if (strcmp(nand->name, name) == 0)
return nand;
if (!flash_driver_name_matches(nand->controller->name, name))
@@ -197,19 +199,16 @@ struct nand_device *get_nand_device_by_num(int num)
struct nand_device *p;
int i = 0;
for (p = nand_devices; p; p = p->next)
{
for (p = nand_devices; p; p = p->next) {
if (i++ == num)
{
return p;
}
}
return NULL;
}
COMMAND_HELPER(nand_command_get_device, unsigned name_index,
struct nand_device **nand)
struct nand_device **nand)
{
const char *str = CMD_ARGV[name_index];
*nand = get_nand_device_by_name(str);
@@ -221,7 +220,7 @@ COMMAND_HELPER(nand_command_get_device, unsigned name_index,
*nand = get_nand_device_by_num(num);
if (!*nand) {
command_print(CMD_CTX, "NAND flash device '%s' not found", str);
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
return ERROR_OK;
}
@@ -241,23 +240,18 @@ int nand_build_bbt(struct nand_device *nand, int first, int last)
last = nand->num_blocks - 1;
page = first * pages_per_block;
for (i = first; i <= last; i++)
{
for (i = first; i <= last; i++) {
ret = nand_read_page(nand, page, NULL, 0, oob, 6);
if (ret != ERROR_OK)
return ret;
if (((nand->device->options & NAND_BUSWIDTH_16) && ((oob[0] & oob[1]) != 0xff))
|| (((nand->page_size == 512) && (oob[5] != 0xff)) ||
((nand->page_size == 2048) && (oob[0] != 0xff))))
{
|| (((nand->page_size == 512) && (oob[5] != 0xff)) ||
((nand->page_size == 2048) && (oob[0] != 0xff)))) {
LOG_WARNING("bad block: %i", i);
nand->blocks[i].is_bad = 1;
}
else
{
} else
nand->blocks[i].is_bad = 0;
}
page += pages_per_block;
}
@@ -276,16 +270,12 @@ int nand_read_status(struct nand_device *nand, uint8_t *status)
alive_sleep(1);
/* read status */
if (nand->device->options & NAND_BUSWIDTH_16)
{
if (nand->device->options & NAND_BUSWIDTH_16) {
uint16_t data;
nand->controller->read_data(nand, &data);
*status = data & 0xff;
}
else
{
} else
nand->controller->read_data(nand, status);
}
return ERROR_OK;
}
@@ -300,9 +290,8 @@ static int nand_poll_ready(struct nand_device *nand, int timeout)
uint16_t data;
nand->controller->read_data(nand, &data);
status = data & 0xff;
} else {
} else
nand->controller->read_data(nand, &status);
}
if (status & NAND_STATUS_READY)
break;
alive_sleep(1);
@@ -329,15 +318,15 @@ int nand_probe(struct nand_device *nand)
nand->erase_size = 0;
/* initialize controller (device parameters are zero, use controller default) */
if ((retval = nand->controller->init(nand) != ERROR_OK))
{
switch (retval)
{
retval = nand->controller->init(nand);
if (retval != ERROR_OK) {
switch (retval) {
case ERROR_NAND_OPERATION_FAILED:
LOG_DEBUG("controller initialization failed");
return ERROR_NAND_OPERATION_FAILED;
case ERROR_NAND_OPERATION_NOT_SUPPORTED:
LOG_ERROR("BUG: controller reported that it doesn't support default parameters");
LOG_ERROR(
"BUG: controller reported that it doesn't support default parameters");
return ERROR_NAND_OPERATION_FAILED;
default:
LOG_ERROR("BUG: unknown controller initialization failure");
@@ -351,13 +340,10 @@ int nand_probe(struct nand_device *nand)
nand->controller->command(nand, NAND_CMD_READID);
nand->controller->address(nand, 0x0);
if (nand->bus_width == 8)
{
if (nand->bus_width == 8) {
nand->controller->read_data(nand, &manufacturer_id);
nand->controller->read_data(nand, &device_id);
}
else
{
} else {
uint16_t data_buf;
nand->controller->read_data(nand, &data_buf);
manufacturer_id = data_buf & 0xff;
@@ -365,36 +351,32 @@ int nand_probe(struct nand_device *nand)
device_id = data_buf & 0xff;
}
for (i = 0; nand_flash_ids[i].name; i++)
{
for (i = 0; nand_flash_ids[i].name; i++) {
if (nand_flash_ids[i].id == device_id &&
(nand_flash_ids[i].mfr_id == manufacturer_id ||
nand_flash_ids[i].mfr_id == 0 ))
{
(nand_flash_ids[i].mfr_id == manufacturer_id ||
nand_flash_ids[i].mfr_id == 0)) {
nand->device = &nand_flash_ids[i];
break;
}
}
for (i = 0; nand_manuf_ids[i].name; i++)
{
if (nand_manuf_ids[i].id == manufacturer_id)
{
for (i = 0; nand_manuf_ids[i].name; i++) {
if (nand_manuf_ids[i].id == manufacturer_id) {
nand->manufacturer = &nand_manuf_ids[i];
break;
}
}
if (!nand->manufacturer)
{
if (!nand->manufacturer) {
nand->manufacturer = &nand_manuf_ids[0];
nand->manufacturer->id = manufacturer_id;
}
if (!nand->device)
{
LOG_ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
manufacturer_id, device_id);
if (!nand->device) {
LOG_ERROR(
"unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
manufacturer_id,
device_id);
return ERROR_NAND_OPERATION_FAILED;
}
@@ -410,16 +392,12 @@ int nand_probe(struct nand_device *nand)
/* Do we need extended device probe information? */
if (nand->device->page_size == 0 ||
nand->device->erase_size == 0)
{
if (nand->bus_width == 8)
{
nand->device->erase_size == 0) {
if (nand->bus_width == 8) {
nand->controller->read_data(nand, id_buff + 3);
nand->controller->read_data(nand, id_buff + 4);
nand->controller->read_data(nand, id_buff + 5);
}
else
{
} else {
uint16_t data_buf;
nand->controller->read_data(nand, &data_buf);
@@ -435,81 +413,68 @@ int nand_probe(struct nand_device *nand)
/* page size */
if (nand->device->page_size == 0)
{
nand->page_size = 1 << (10 + (id_buff[4] & 3));
}
else if (nand->device->page_size == 256)
{
else if (nand->device->page_size == 256) {
LOG_ERROR("NAND flashes with 256 byte pagesize are not supported");
return ERROR_NAND_OPERATION_FAILED;
}
else
{
} else
nand->page_size = nand->device->page_size;
}
/* number of address cycles */
if (nand->page_size <= 512)
{
if (nand->page_size <= 512) {
/* small page devices */
if (nand->device->chip_size <= 32)
nand->address_cycles = 3;
else if (nand->device->chip_size <= 8*1024)
nand->address_cycles = 4;
else
{
else {
LOG_ERROR("BUG: small page NAND device with more than 8 GiB encountered");
nand->address_cycles = 5;
}
}
else
{
} else {
/* large page devices */
if (nand->device->chip_size <= 128)
nand->address_cycles = 4;
else if (nand->device->chip_size <= 32*1024)
nand->address_cycles = 5;
else
{
else {
LOG_ERROR("BUG: large page NAND device with more than 32 GiB encountered");
nand->address_cycles = 6;
}
}
/* erase size */
if (nand->device->erase_size == 0)
{
if (nand->device->erase_size == 0) {
switch ((id_buff[4] >> 4) & 3) {
case 0:
nand->erase_size = 64 << 10;
break;
case 1:
nand->erase_size = 128 << 10;
break;
case 2:
nand->erase_size = 256 << 10;
break;
case 3:
nand->erase_size =512 << 10;
break;
case 0:
nand->erase_size = 64 << 10;
break;
case 1:
nand->erase_size = 128 << 10;
break;
case 2:
nand->erase_size = 256 << 10;
break;
case 3:
nand->erase_size = 512 << 10;
break;
}
}
else
{
} else
nand->erase_size = nand->device->erase_size;
}
/* initialize controller, but leave parameters at the controllers default */
if ((retval = nand->controller->init(nand) != ERROR_OK))
{
switch (retval)
{
retval = nand->controller->init(nand);
if (retval != ERROR_OK) {
switch (retval) {
case ERROR_NAND_OPERATION_FAILED:
LOG_DEBUG("controller initialization failed");
return ERROR_NAND_OPERATION_FAILED;
case ERROR_NAND_OPERATION_NOT_SUPPORTED:
LOG_ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
nand->bus_width, nand->address_cycles, nand->page_size);
LOG_ERROR(
"controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
nand->bus_width,
nand->address_cycles,
nand->page_size);
return ERROR_NAND_OPERATION_FAILED;
default:
LOG_ERROR("BUG: unknown controller initialization failure");
@@ -520,8 +485,7 @@ int nand_probe(struct nand_device *nand)
nand->num_blocks = (nand->device->chip_size * 1024) / (nand->erase_size / 1024);
nand->blocks = malloc(sizeof(struct nand_block) * nand->num_blocks);
for (i = 0; i < nand->num_blocks; i++)
{
for (i = 0; i < nand->num_blocks; i++) {
nand->blocks[i].size = nand->erase_size;
nand->blocks[i].offset = i * nand->erase_size;
nand->blocks[i].is_erased = -1;
@@ -542,28 +506,24 @@ int nand_erase(struct nand_device *nand, int first_block, int last_block)
return ERROR_NAND_DEVICE_NOT_PROBED;
if ((first_block < 0) || (last_block >= nand->num_blocks))
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
/* make sure we know if a block is bad before erasing it */
for (i = first_block; i <= last_block; i++)
{
if (nand->blocks[i].is_bad == -1)
{
for (i = first_block; i <= last_block; i++) {
if (nand->blocks[i].is_bad == -1) {
nand_build_bbt(nand, i, last_block);
break;
}
}
for (i = first_block; i <= last_block; i++)
{
for (i = first_block; i <= last_block; i++) {
/* Send erase setup command */
nand->controller->command(nand, NAND_CMD_ERASE1);
page = i * (nand->erase_size / nand->page_size);
/* Send page address */
if (nand->page_size <= 512)
{
if (nand->page_size <= 512) {
/* row */
nand->controller->address(nand, page & 0xff);
nand->controller->address(nand, (page >> 8) & 0xff);
@@ -575,9 +535,7 @@ int nand_erase(struct nand_device *nand, int first_block, int last_block)
/* 4th cycle only on devices with more than 8 GiB */
if (nand->address_cycles >= 5)
nand->controller->address(nand, (page >> 24) & 0xff);
}
else
{
} else {
/* row */
nand->controller->address(nand, page & 0xff);
nand->controller->address(nand, (page >> 8) & 0xff);
@@ -591,25 +549,24 @@ int nand_erase(struct nand_device *nand, int first_block, int last_block)
nand->controller->command(nand, NAND_CMD_ERASE2);
retval = nand->controller->nand_ready ?
nand->controller->nand_ready(nand, 1000) :
nand_poll_ready(nand, 1000);
nand->controller->nand_ready(nand, 1000) :
nand_poll_ready(nand, 1000);
if (!retval) {
LOG_ERROR("timeout waiting for NAND flash block erase to complete");
return ERROR_NAND_OPERATION_TIMEOUT;
}
if ((retval = nand_read_status(nand, &status)) != ERROR_OK)
{
retval = nand_read_status(nand, &status);
if (retval != ERROR_OK) {
LOG_ERROR("couldn't read status");
return ERROR_NAND_OPERATION_FAILED;
}
if (status & 0x1)
{
if (status & 0x1) {
LOG_ERROR("didn't erase %sblock %d; status: 0x%2.2x",
(nand->blocks[i].is_bad == 1)
? "bad " : "",
i, status);
(nand->blocks[i].is_bad == 1)
? "bad " : "",
i, status);
/* continue; other blocks might still be erasable */
}
@@ -620,23 +577,24 @@ int nand_erase(struct nand_device *nand, int first_block, int last_block)
}
#if 0
static int nand_read_plain(struct nand_device *nand, uint32_t address, uint8_t *data, uint32_t data_size)
static int nand_read_plain(struct nand_device *nand,
uint32_t address,
uint8_t *data,
uint32_t data_size)
{
uint8_t *page;
if (!nand->device)
return ERROR_NAND_DEVICE_NOT_PROBED;
if (address % nand->page_size)
{
if (address % nand->page_size) {
LOG_ERROR("reads need to be page aligned");
return ERROR_NAND_OPERATION_FAILED;
}
page = malloc(nand->page_size);
while (data_size > 0)
{
while (data_size > 0) {
uint32_t thisrun_size = (data_size > nand->page_size) ? nand->page_size : data_size;
uint32_t page_address;
@@ -657,23 +615,24 @@ static int nand_read_plain(struct nand_device *nand, uint32_t address, uint8_t *
return ERROR_OK;
}
static int nand_write_plain(struct nand_device *nand, uint32_t address, uint8_t *data, uint32_t data_size)
static int nand_write_plain(struct nand_device *nand,
uint32_t address,
uint8_t *data,
uint32_t data_size)
{
uint8_t *page;
if (!nand->device)
return ERROR_NAND_DEVICE_NOT_PROBED;
if (address % nand->page_size)
{
if (address % nand->page_size) {
LOG_ERROR("writes need to be page aligned");
return ERROR_NAND_OPERATION_FAILED;
}
page = malloc(nand->page_size);
while (data_size > 0)
{
while (data_size > 0) {
uint32_t thisrun_size = (data_size > nand->page_size) ? nand->page_size : data_size;
uint32_t page_address;
@@ -696,8 +655,8 @@ static int nand_write_plain(struct nand_device *nand, uint32_t address, uint8_t
#endif
int nand_write_page(struct nand_device *nand, uint32_t page,
uint8_t *data, uint32_t data_size,
uint8_t *oob, uint32_t oob_size)
uint8_t *data, uint32_t data_size,
uint8_t *oob, uint32_t oob_size)
{
uint32_t block;
@@ -715,8 +674,8 @@ int nand_write_page(struct nand_device *nand, uint32_t page,
}
int nand_read_page(struct nand_device *nand, uint32_t page,
uint8_t *data, uint32_t data_size,
uint8_t *oob, uint32_t oob_size)
uint8_t *data, uint32_t data_size,
uint8_t *oob, uint32_t oob_size)
{
if (!nand->device)
return ERROR_NAND_DEVICE_NOT_PROBED;
@@ -728,7 +687,7 @@ int nand_read_page(struct nand_device *nand, uint32_t page,
}
int nand_page_command(struct nand_device *nand, uint32_t page,
uint8_t cmd, bool oob_only)
uint8_t cmd, bool oob_only)
{
if (!nand->device)
return ERROR_NAND_DEVICE_NOT_PROBED;
@@ -813,8 +772,8 @@ int nand_read_data_page(struct nand_device *nand, uint8_t *data, uint32_t size)
}
int nand_read_page_raw(struct nand_device *nand, uint32_t page,
uint8_t *data, uint32_t data_size,
uint8_t *oob, uint32_t oob_size)
uint8_t *data, uint32_t data_size,
uint8_t *oob, uint32_t oob_size)
{
int retval;
@@ -869,8 +828,8 @@ int nand_write_finish(struct nand_device *nand)
nand->controller->command(nand, NAND_CMD_PAGEPROG);
retval = nand->controller->nand_ready ?
nand->controller->nand_ready(nand, 100) :
nand_poll_ready(nand, 100);
nand->controller->nand_ready(nand, 100) :
nand_poll_ready(nand, 100);
if (!retval)
return ERROR_NAND_OPERATION_TIMEOUT;
@@ -882,7 +841,7 @@ int nand_write_finish(struct nand_device *nand)
if (status & NAND_STATUS_FAIL) {
LOG_ERROR("write operation didn't pass, status: 0x%2.2x",
status);
status);
return ERROR_NAND_OPERATION_FAILED;
}
@@ -890,8 +849,8 @@ int nand_write_finish(struct nand_device *nand)
}
int nand_write_page_raw(struct nand_device *nand, uint32_t page,
uint8_t *data, uint32_t data_size,
uint8_t *oob, uint32_t oob_size)
uint8_t *data, uint32_t data_size,
uint8_t *oob, uint32_t oob_size)
{
int retval;
@@ -917,4 +876,3 @@ int nand_write_page_raw(struct nand_device *nand, uint32_t page,
return nand_write_finish(nand);
}

View File

@@ -22,6 +22,7 @@
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
#ifndef FLASH_NAND_CORE_H
#define FLASH_NAND_CORE_H
@@ -30,8 +31,7 @@
/**
* Representation of a single NAND block in a NAND device.
*/
struct nand_block
{
struct nand_block {
/** Offset to the block. */
uint32_t offset;
@@ -57,8 +57,7 @@ struct nand_ecclayout {
struct nand_oobfree oobfree[2];
};
struct nand_device
{
struct nand_device {
const char *name;
struct target *target;
struct nand_flash_controller *controller;
@@ -77,8 +76,7 @@ struct nand_device
/* NAND Flash Manufacturer ID Codes
*/
enum
{
enum {
NAND_MFR_TOSHIBA = 0x98,
NAND_MFR_SAMSUNG = 0xec,
NAND_MFR_FUJITSU = 0x04,
@@ -89,14 +87,12 @@ enum
NAND_MFR_MICRON = 0x2c,
};
struct nand_manufacturer
{
struct nand_manufacturer {
int id;
const char *name;
};
struct nand_info
{
struct nand_info {
int mfr_id;
int id;
int page_size;
@@ -152,8 +148,7 @@ enum {
LP_OPTIONS16 = (LP_OPTIONS | NAND_BUSWIDTH_16),
};
enum
{
enum {
/* Standard NAND flash commands */
NAND_CMD_READ0 = 0x0,
NAND_CMD_READ1 = 0x1,
@@ -161,7 +156,7 @@ enum
NAND_CMD_PAGEPROG = 0x10,
NAND_CMD_READOOB = 0x50,
NAND_CMD_ERASE1 = 0x60,
NAND_CMD_STATUS = 0x70,
NAND_CMD_STATUS = 0x70,
NAND_CMD_STATUS_MULTI = 0x71,
NAND_CMD_SEQIN = 0x80,
NAND_CMD_RNDIN = 0x85,
@@ -176,8 +171,7 @@ enum
};
/* Status bits */
enum
{
enum {
NAND_STATUS_FAIL = 0x01,
NAND_STATUS_FAIL_N1 = 0x02,
NAND_STATUS_TRUE_READY = 0x20,
@@ -186,14 +180,14 @@ enum
};
/* OOB (spare) data formats */
enum oob_formats
{
enum oob_formats {
NAND_OOB_NONE = 0x0, /* no OOB data at all */
NAND_OOB_RAW = 0x1, /* raw OOB data (16 bytes for 512b page sizes, 64 bytes for 2048b page sizes) */
NAND_OOB_RAW = 0x1, /* raw OOB data (16 bytes for 512b page sizes, 64 bytes for
*2048b page sizes) */
NAND_OOB_ONLY = 0x2, /* only OOB data */
NAND_OOB_SW_ECC = 0x10, /* when writing, use SW ECC (as opposed to no ECC) */
NAND_OOB_HW_ECC = 0x20, /* when writing, use HW ECC (as opposed to no ECC) */
NAND_OOB_SW_ECC_KW = 0x40, /* when writing, use Marvell's Kirkwood bootrom format */
NAND_OOB_HW_ECC = 0x20, /* when writing, use HW ECC (as opposed to no ECC) */
NAND_OOB_SW_ECC_KW = 0x40, /* when writing, use Marvell's Kirkwood bootrom format */
NAND_OOB_JFFS2 = 0x100, /* when writing, use JFFS2 OOB layout */
NAND_OOB_YAFFS2 = 0x100,/* when writing, use YAFFS2 OOB layout */
};
@@ -202,40 +196,39 @@ enum oob_formats
struct nand_device *get_nand_device_by_num(int num);
int nand_page_command(struct nand_device *nand, uint32_t page,
uint8_t cmd, bool oob_only);
uint8_t cmd, bool oob_only);
int nand_read_data_page(struct nand_device *nand, uint8_t *data, uint32_t size);
int nand_write_data_page(struct nand_device *nand,
uint8_t *data, uint32_t size);
uint8_t *data, uint32_t size);
int nand_write_finish(struct nand_device *nand);
int nand_read_page_raw(struct nand_device *nand, uint32_t page,
uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
int nand_write_page_raw(struct nand_device *nand, uint32_t page,
uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
int nand_read_status(struct nand_device *nand, uint8_t *status);
int nand_calculate_ecc(struct nand_device *nand,
const uint8_t *dat, uint8_t *ecc_code);
const uint8_t *dat, uint8_t *ecc_code);
int nand_calculate_ecc_kw(struct nand_device *nand,
const uint8_t *dat, uint8_t *ecc_code);
const uint8_t *dat, uint8_t *ecc_code);
int nand_register_commands(struct command_context *cmd_ctx);
/// helper for parsing a nand device command argument string
/** helper for parsing a nand device command argument string */
COMMAND_HELPER(nand_command_get_device, unsigned name_index,
struct nand_device **nand);
struct nand_device **nand);
#define ERROR_NAND_DEVICE_INVALID (-1100)
#define ERROR_NAND_OPERATION_FAILED (-1101)
#define ERROR_NAND_OPERATION_TIMEOUT (-1102)
#define ERROR_NAND_OPERATION_NOT_SUPPORTED (-1103)
#define ERROR_NAND_DEVICE_NOT_PROBED (-1104)
#define ERROR_NAND_ERROR_CORRECTION_FAILED (-1105)
#define ERROR_NAND_NO_BUFFER (-1106)
#endif // FLASH_NAND_CORE_H
#define ERROR_NAND_DEVICE_INVALID (-1100)
#define ERROR_NAND_OPERATION_FAILED (-1101)
#define ERROR_NAND_OPERATION_TIMEOUT (-1102)
#define ERROR_NAND_OPERATION_NOT_SUPPORTED (-1103)
#define ERROR_NAND_DEVICE_NOT_PROBED (-1104)
#define ERROR_NAND_ERROR_CORRECTION_FAILED (-1105)
#define ERROR_NAND_NO_BUFFER (-1106)
#endif /* FLASH_NAND_CORE_H */

View File

@@ -39,34 +39,34 @@ enum ecc {
};
struct davinci_nand {
uint8_t chipsel; /* chipselect 0..3 == CS2..CS5 */
uint8_t eccmode;
uint8_t chipsel; /* chipselect 0..3 == CS2..CS5 */
uint8_t eccmode;
/* Async EMIF controller base */
uint32_t aemif;
uint32_t aemif;
/* NAND chip addresses */
uint32_t data; /* without CLE or ALE */
uint32_t cmd; /* with CLE */
uint32_t addr; /* with ALE */
uint32_t data; /* without CLE or ALE */
uint32_t cmd; /* with CLE */
uint32_t addr; /* with ALE */
/* write acceleration */
struct arm_nand_data io;
struct arm_nand_data io;
/* page i/o for the relevant flavor of hardware ECC */
int (*read_page)(struct nand_device *nand, uint32_t page,
uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
int (*write_page)(struct nand_device *nand, uint32_t page,
uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
};
#define NANDFCR 0x60 /* flash control register */
#define NANDFSR 0x64 /* flash status register */
#define NANDFECC 0x70 /* 1-bit ECC data, CS0, 1st of 4 */
#define NAND4BITECCLOAD 0xbc /* 4-bit ECC, load saved values */
#define NAND4BITECC 0xc0 /* 4-bit ECC data, 1st of 4 */
#define NANDERRADDR 0xd0 /* 4-bit ECC err addr, 1st of 2 */
#define NANDERRVAL 0xd8 /* 4-bit ECC err value, 1st of 2 */
#define NANDFCR 0x60 /* flash control register */
#define NANDFSR 0x64 /* flash status register */
#define NANDFECC 0x70 /* 1-bit ECC data, CS0, 1st of 4 */
#define NAND4BITECCLOAD 0xbc /* 4-bit ECC, load saved values */
#define NAND4BITECC 0xc0 /* 4-bit ECC data, 1st of 4 */
#define NANDERRADDR 0xd0 /* 4-bit ECC err addr, 1st of 2 */
#define NANDERRVAL 0xd8 /* 4-bit ECC err value, 1st of 2 */
static int halted(struct target *target, const char *label)
{
@@ -181,7 +181,7 @@ static int davinci_read_data(struct nand_device *nand, void *data)
/* REVISIT a bit of native code should let block reads be MUCH faster */
static int davinci_read_block_data(struct nand_device *nand,
uint8_t *data, int data_size)
uint8_t *data, int data_size)
{
struct davinci_nand *info = nand->controller_priv;
struct target *target = nand->target;
@@ -214,7 +214,7 @@ static int davinci_read_block_data(struct nand_device *nand,
}
static int davinci_write_block_data(struct nand_device *nand,
uint8_t *data, int data_size)
uint8_t *data, int data_size)
{
struct davinci_nand *info = nand->controller_priv;
struct target *target = nand->target;
@@ -250,7 +250,7 @@ static int davinci_write_block_data(struct nand_device *nand,
}
static int davinci_write_page(struct nand_device *nand, uint32_t page,
uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
{
struct davinci_nand *info = nand->controller_priv;
uint8_t *ooballoc = NULL;
@@ -269,17 +269,17 @@ static int davinci_write_page(struct nand_device *nand, uint32_t page,
/* If we're not given OOB, write 0xff where we don't write ECC codes. */
switch (nand->page_size) {
case 512:
oob_size = 16;
break;
case 2048:
oob_size = 64;
break;
case 4096:
oob_size = 128;
break;
default:
return ERROR_NAND_OPERATION_FAILED;
case 512:
oob_size = 16;
break;
case 2048:
oob_size = 64;
break;
case 4096:
oob_size = 128;
break;
default:
return ERROR_NAND_OPERATION_FAILED;
}
if (!oob) {
ooballoc = malloc(oob_size);
@@ -301,7 +301,7 @@ static int davinci_write_page(struct nand_device *nand, uint32_t page,
}
static int davinci_read_page(struct nand_device *nand, uint32_t page,
uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
{
struct davinci_nand *info = nand->controller_priv;
@@ -358,7 +358,7 @@ static int davinci_seek_column(struct nand_device *nand, uint16_t column)
}
static int davinci_writepage_tail(struct nand_device *nand,
uint8_t *oob, uint32_t oob_size)
uint8_t *oob, uint32_t oob_size)
{
struct davinci_nand *info = nand->controller_priv;
struct target *target = nand->target;
@@ -390,7 +390,7 @@ static int davinci_writepage_tail(struct nand_device *nand,
* All DaVinci family chips support 1-bit ECC on a per-chipselect basis.
*/
static int davinci_write_page_ecc1(struct nand_device *nand, uint32_t page,
uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
{
unsigned oob_offset;
struct davinci_nand *info = nand->controller_priv;
@@ -404,15 +404,15 @@ static int davinci_write_page_ecc1(struct nand_device *nand, uint32_t page,
* for 16-bit OOB, those extra bytes are discontiguous.
*/
switch (nand->page_size) {
case 512:
oob_offset = 0;
break;
case 2048:
oob_offset = 40;
break;
default:
oob_offset = 80;
break;
case 512:
oob_offset = 0;
break;
case 2048:
oob_offset = 40;
break;
default:
oob_offset = 80;
break;
}
davinci_write_pagecmd(nand, NAND_CMD_SEQIN, page);
@@ -457,10 +457,10 @@ static int davinci_write_page_ecc1(struct nand_device *nand, uint32_t page,
* manufacturer bad block markers are safe. Contrast: old "infix" style.
*/
static int davinci_write_page_ecc4(struct nand_device *nand, uint32_t page,
uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
{
static const uint8_t ecc512[] = {
0, 1, 2, 3, 4, /* 5== mfr badblock */
0, 1, 2, 3, 4, /* 5== mfr badblock */
6, 7, /* 8..12 for BBT or JFFS2 */ 13, 14, 15,
};
static const uint8_t ecc2048[] = {
@@ -470,12 +470,12 @@ static int davinci_write_page_ecc4(struct nand_device *nand, uint32_t page,
54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
};
static const uint8_t ecc4096[] = {
48, 49, 50, 51, 52, 53, 54, 55, 56, 57,
58, 59, 60, 61, 62, 63, 64, 65, 66, 67,
68, 69, 70, 71, 72, 73, 74, 75, 76, 77,
78, 79, 80, 81, 82, 83, 84, 85, 86, 87,
88, 89, 90, 91, 92, 93, 94, 95, 96, 97,
98, 99, 100, 101, 102, 103, 104, 105, 106, 107,
48, 49, 50, 51, 52, 53, 54, 55, 56, 57,
58, 59, 60, 61, 62, 63, 64, 65, 66, 67,
68, 69, 70, 71, 72, 73, 74, 75, 76, 77,
78, 79, 80, 81, 82, 83, 84, 85, 86, 87,
88, 89, 90, 91, 92, 93, 94, 95, 96, 97,
98, 99, 100, 101, 102, 103, 104, 105, 106, 107,
108, 109, 110, 111, 112, 113, 114, 115, 116, 117,
118, 119, 120, 121, 122, 123, 124, 125, 126, 127,
};
@@ -495,15 +495,15 @@ static int davinci_write_page_ecc4(struct nand_device *nand, uint32_t page,
* the standard ECC logic can't handle.
*/
switch (nand->page_size) {
case 512:
l = ecc512;
break;
case 2048:
l = ecc2048;
break;
default:
l = ecc4096;
break;
case 512:
l = ecc512;
break;
case 2048:
l = ecc2048;
break;
default:
l = ecc4096;
break;
}
davinci_write_pagecmd(nand, NAND_CMD_SEQIN, page);
@@ -533,11 +533,11 @@ static int davinci_write_page_ecc4(struct nand_device *nand, uint32_t page,
raw_ecc[i] &= 0x03ff03ff;
}
for (i = 0, p = raw_ecc; i < 2; i++, p += 2) {
oob[*l++] = p[0] & 0xff;
oob[*l++] = p[0] & 0xff;
oob[*l++] = ((p[0] >> 8) & 0x03) | ((p[0] >> 14) & 0xfc);
oob[*l++] = ((p[0] >> 22) & 0x0f) | ((p[1] << 4) & 0xf0);
oob[*l++] = ((p[1] >> 4) & 0x3f) | ((p[1] >> 10) & 0xc0);
oob[*l++] = (p[1] >> 18) & 0xff;
oob[*l++] = (p[1] >> 18) & 0xff;
}
} while (data_size);
@@ -559,7 +559,7 @@ static int davinci_write_page_ecc4(struct nand_device *nand, uint32_t page,
* (MVL 4.x/5.x kernels, filesystems, etc) may need it more generally.
*/
static int davinci_write_page_ecc4infix(struct nand_device *nand, uint32_t page,
uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
{
struct davinci_nand *info = nand->controller_priv;
struct target *target = nand->target;
@@ -597,11 +597,11 @@ static int davinci_write_page_ecc4infix(struct nand_device *nand, uint32_t page,
/* skip 6 bytes of prepad, then pack 10 packed ecc bytes */
for (i = 0, l = oob + 6, p = raw_ecc; i < 2; i++, p += 2) {
*l++ = p[0] & 0xff;
*l++ = p[0] & 0xff;
*l++ = ((p[0] >> 8) & 0x03) | ((p[0] >> 14) & 0xfc);
*l++ = ((p[0] >> 22) & 0x0f) | ((p[1] << 4) & 0xf0);
*l++ = ((p[1] >> 4) & 0x3f) | ((p[1] >> 10) & 0xc0);
*l++ = (p[1] >> 18) & 0xff;
*l++ = (p[1] >> 18) & 0xff;
}
/* write this "out-of-band" data -- infix */
@@ -616,7 +616,7 @@ static int davinci_write_page_ecc4infix(struct nand_device *nand, uint32_t page,
}
static int davinci_read_page_ecc4infix(struct nand_device *nand, uint32_t page,
uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
{
int read_size;
int want_col, at_col;
@@ -688,12 +688,8 @@ NAND_DEVICE_COMMAND_HANDLER(davinci_nand_device_command)
* - aemif address
* Plus someday, optionally, ALE and CLE masks.
*/
if (CMD_ARGC < 5) {
LOG_ERROR("parameters: %s target "
"chip_addr hwecc_mode aemif_addr",
CMD_ARGV[0]);
goto fail;
}
if (CMD_ARGC < 5)
return ERROR_COMMAND_SYNTAX_ERROR;
COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[2], chip);
if (chip == 0) {
@@ -723,9 +719,9 @@ NAND_DEVICE_COMMAND_HANDLER(davinci_nand_device_command)
* AEMIF controller address.
*/
if (aemif == 0x01e00000 /* dm6446, dm357 */
|| aemif == 0x01e10000 /* dm335, dm355 */
|| aemif == 0x01d10000 /* dm365 */
) {
|| aemif == 0x01e10000 /* dm335, dm355 */
|| aemif == 0x01d10000 /* dm365 */
) {
if (chip < 0x02000000 || chip >= 0x0a000000) {
LOG_ERROR("NAND address %08lx out of range?", chip);
goto fail;
@@ -760,19 +756,19 @@ NAND_DEVICE_COMMAND_HANDLER(davinci_nand_device_command)
info->read_page = nand_read_page_raw;
switch (eccmode) {
case HWECC1:
/* ECC_HW, 1-bit corrections, 3 bytes ECC per 512 data bytes */
info->write_page = davinci_write_page_ecc1;
break;
case HWECC4:
/* ECC_HW, 4-bit corrections, 10 bytes ECC per 512 data bytes */
info->write_page = davinci_write_page_ecc4;
break;
case HWECC4_INFIX:
/* Same 4-bit ECC HW, with problematic page/ecc layout */
info->read_page = davinci_read_page_ecc4infix;
info->write_page = davinci_write_page_ecc4infix;
break;
case HWECC1:
/* ECC_HW, 1-bit corrections, 3 bytes ECC per 512 data bytes */
info->write_page = davinci_write_page_ecc1;
break;
case HWECC4:
/* ECC_HW, 4-bit corrections, 10 bytes ECC per 512 data bytes */
info->write_page = davinci_write_page_ecc4;
break;
case HWECC4_INFIX:
/* Same 4-bit ECC HW, with problematic page/ecc layout */
info->read_page = davinci_read_page_ecc4infix;
info->write_page = davinci_write_page_ecc4infix;
break;
}
return ERROR_OK;
@@ -782,17 +778,18 @@ fail:
}
struct nand_flash_controller davinci_nand_controller = {
.name = "davinci",
.nand_device_command = davinci_nand_device_command,
.init = davinci_init,
.reset = davinci_reset,
.command = davinci_command,
.address = davinci_address,
.write_data = davinci_write_data,
.read_data = davinci_read_data,
.write_page = davinci_write_page,
.read_page = davinci_read_page,
.write_block_data = davinci_write_block_data,
.read_block_data = davinci_read_block_data,
.nand_ready = davinci_nand_ready,
.name = "davinci",
.usage = "chip_addr hwecc_mode aemif_addr",
.nand_device_command = davinci_nand_device_command,
.init = davinci_init,
.reset = davinci_reset,
.command = davinci_command,
.address = davinci_address,
.write_data = davinci_write_data,
.read_data = davinci_read_data,
.write_page = davinci_write_page,
.read_page = davinci_read_page,
.write_block_data = davinci_write_block_data,
.read_block_data = davinci_read_block_data,
.nand_ready = davinci_nand_ready,
};

View File

@@ -38,15 +38,14 @@ extern struct nand_flash_controller s3c2412_nand_controller;
extern struct nand_flash_controller s3c2440_nand_controller;
extern struct nand_flash_controller s3c2443_nand_controller;
extern struct nand_flash_controller s3c6400_nand_controller;
extern struct nand_flash_controller imx27_nand_flash_controller;
extern struct nand_flash_controller mxc_nand_flash_controller;
extern struct nand_flash_controller imx31_nand_flash_controller;
extern struct nand_flash_controller at91sam9_nand_controller;
extern struct nand_flash_controller nuc910_nand_controller;
/* extern struct nand_flash_controller boundary_scan_nand_controller; */
static struct nand_flash_controller *nand_flash_controllers[] =
{
static struct nand_flash_controller *nand_flash_controllers[] = {
&nonce_nand_controller,
&davinci_nand_controller,
&lpc3180_nand_controller,
@@ -57,7 +56,7 @@ static struct nand_flash_controller *nand_flash_controllers[] =
&s3c2440_nand_controller,
&s3c2443_nand_controller,
&s3c6400_nand_controller,
&imx27_nand_flash_controller,
&mxc_nand_flash_controller,
&imx31_nand_flash_controller,
&at91sam9_nand_controller,
&nuc910_nand_controller,
@@ -67,8 +66,7 @@ static struct nand_flash_controller *nand_flash_controllers[] =
struct nand_flash_controller *nand_driver_find_by_name(const char *name)
{
for (unsigned i = 0; nand_flash_controllers[i]; i++)
{
for (unsigned i = 0; nand_flash_controllers[i]; i++) {
struct nand_flash_controller *controller = nand_flash_controllers[i];
if (strcmp(name, controller->name) == 0)
return controller;
@@ -77,13 +75,10 @@ struct nand_flash_controller *nand_driver_find_by_name(const char *name)
}
int nand_driver_walk(nand_driver_walker_t f, void *x)
{
for (unsigned i = 0; nand_flash_controllers[i]; i++)
{
for (unsigned i = 0; nand_flash_controllers[i]; i++) {
int retval = (*f)(nand_flash_controllers[i], x);
if (ERROR_OK != retval)
return retval;
}
return ERROR_OK;
}

View File

@@ -19,25 +19,28 @@
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
#ifndef FLASH_NAND_DRIVER_H
#define FLASH_NAND_DRIVER_H
struct nand_device;
#define __NAND_DEVICE_COMMAND(name) \
COMMAND_HELPER(name, struct nand_device *nand)
COMMAND_HELPER(name, struct nand_device *nand)
/**
* Interface for NAND flash controllers. Not all of these functions are
* required for full functionality of the NAND driver, but better performance
* can be achieved by implementing each function.
*/
struct nand_flash_controller
{
struct nand_flash_controller {
/** Driver name that is used to select it from configuration files. */
const char *name;
const struct command_registration *commands;
/** Usage of flash command registration. */
const char *usage;
const struct command_registration *commands;
/** NAND device command called when driver is instantiated during configuration. */
__NAND_DEVICE_COMMAND((*nand_device_command));
@@ -67,10 +70,12 @@ struct nand_flash_controller
int (*read_block_data)(struct nand_device *nand, uint8_t *data, int size);
/** Write a page to the NAND device. */
int (*write_page)(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
int (*write_page)(struct nand_device *nand, uint32_t page, uint8_t *data,
uint32_t data_size, uint8_t *oob, uint32_t oob_size);
/** Read a page from the NAND device. */
int (*read_page)(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
int (*read_page)(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size,
uint8_t *oob, uint32_t oob_size);
/** Check if the NAND device is ready for more instructions with timeout. */
int (*nand_ready)(struct nand_device *nand, int timeout);
@@ -85,8 +90,8 @@ struct nand_flash_controller
*/
struct nand_flash_controller *nand_driver_find_by_name(const char *name);
/// Signature for callback functions passed to nand_driver_walk
typedef int (*nand_driver_walker_t)(struct nand_flash_controller *c, void*);
/** Signature for callback functions passed to nand_driver_walk */
typedef int (*nand_driver_walker_t)(struct nand_flash_controller *c, void *);
/**
* Walk the list of drivers, encapsulating the data structure type.
* Application state/context can be passed through the @c x pointer.
@@ -97,4 +102,4 @@ typedef int (*nand_driver_walker_t)(struct nand_flash_controller *c, void*);
*/
int nand_driver_walk(nand_driver_walker_t f, void *x);
#endif // FLASH_NAND_DRIVER_H
#endif /* FLASH_NAND_DRIVER_H */

View File

@@ -125,7 +125,7 @@ static inline int countbits(uint32_t b)
{
int res = 0;
for (;b; b >>= 1)
for (; b; b >>= 1)
res += b & 0x01;
return res;
}
@@ -134,7 +134,7 @@ static inline int countbits(uint32_t b)
* nand_correct_data - Detect and correct a 1 bit error for 256 byte block
*/
int nand_correct_data(struct nand_device *nand, u_char *dat,
u_char *read_ecc, u_char *calc_ecc)
u_char *read_ecc, u_char *calc_ecc)
{
uint8_t s0, s1, s2;
@@ -151,9 +151,9 @@ int nand_correct_data(struct nand_device *nand, u_char *dat,
return 0;
/* Check for a single bit error */
if( ((s0 ^ (s0 >> 1)) & 0x55) == 0x55 &&
((s1 ^ (s1 >> 1)) & 0x55) == 0x55 &&
((s2 ^ (s2 >> 1)) & 0x54) == 0x54) {
if (((s0 ^ (s0 >> 1)) & 0x55) == 0x55 &&
((s1 ^ (s1 >> 1)) & 0x55) == 0x55 &&
((s2 ^ (s2 >> 1)) & 0x54) == 0x54) {
uint32_t byteoffs, bitnum;
@@ -176,7 +176,7 @@ int nand_correct_data(struct nand_device *nand, u_char *dat,
return 1;
}
if(countbits(s0 | ((uint32_t)s1 << 8) | ((uint32_t)s2 <<16)) == 1)
if (countbits(s0 | ((uint32_t)s1 << 8) | ((uint32_t)s2 << 16)) == 1)
return 1;
return -1;

View File

@@ -28,7 +28,7 @@
* For multiplication, a discrete log/exponent table is used, with
* primitive element x (F is a primitive field, so x is primitive).
*/
#define MODPOLY 0x409 /* x^10 + x^3 + 1 in binary */
#define MODPOLY 0x409 /* x^10 + x^3 + 1 in binary */
/*
* Maps an integer a [0..1022] to a polynomial b = gf_exp[a] in
@@ -102,7 +102,7 @@ int nand_calculate_ecc_kw(struct nand_device *nand, const uint8_t *data, uint8_t
{
unsigned int r7, r6, r5, r4, r3, r2, r1, r0;
int i;
static int tables_initialized = 0;
static int tables_initialized;
if (!tables_initialized) {
gf_build_log_exp_table();
@@ -121,7 +121,6 @@ int nand_calculate_ecc_kw(struct nand_device *nand, const uint8_t *data, uint8_t
r6 = data[510];
r7 = data[511];
/*
* Shift bytes 503..0 (in that order) into r0, followed
* by eight zero bytes, while reducing the polynomial by the

View File

@@ -20,6 +20,7 @@
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
@@ -32,18 +33,21 @@ static struct nand_ecclayout nand_oob_16 = {
.eccpos = {0, 1, 2, 3, 6, 7},
.oobfree = {
{.offset = 8,
. length = 8}}
.length = 8}
}
};
static struct nand_ecclayout nand_oob_64 = {
.eccbytes = 24,
.eccpos = {
40, 41, 42, 43, 44, 45, 46, 47,
48, 49, 50, 51, 52, 53, 54, 55,
56, 57, 58, 59, 60, 61, 62, 63},
40, 41, 42, 43, 44, 45, 46, 47,
48, 49, 50, 51, 52, 53, 54, 55,
56, 57, 58, 59, 60, 61, 62, 63
},
.oobfree = {
{.offset = 2,
.length = 38}}
.length = 38}
}
};
void nand_fileio_init(struct nand_fileio_state *state)
@@ -53,45 +57,37 @@ void nand_fileio_init(struct nand_fileio_state *state)
}
int nand_fileio_start(struct command_context *cmd_ctx,
struct nand_device *nand, const char *filename, int filemode,
struct nand_fileio_state *state)
struct nand_device *nand, const char *filename, int filemode,
struct nand_fileio_state *state)
{
if (state->address % nand->page_size)
{
if (state->address % nand->page_size) {
command_print(cmd_ctx, "only page-aligned addresses are supported");
return ERROR_COMMAND_SYNTAX_ERROR;
}
duration_start(&state->bench);
if (NULL != filename)
{
if (NULL != filename) {
int retval = fileio_open(&state->fileio, filename, filemode, FILEIO_BINARY);
if (ERROR_OK != retval)
{
if (ERROR_OK != retval) {
const char *msg = (FILEIO_READ == filemode) ? "read" : "write";
command_print(cmd_ctx, "failed to open '%s' for %s access",
filename, msg);
filename, msg);
return retval;
}
state->file_opened = true;
}
if (!(state->oob_format & NAND_OOB_ONLY))
{
if (!(state->oob_format & NAND_OOB_ONLY)) {
state->page_size = nand->page_size;
state->page = malloc(nand->page_size);
}
if (state->oob_format & (NAND_OOB_RAW | NAND_OOB_SW_ECC | NAND_OOB_SW_ECC_KW))
{
if (nand->page_size == 512)
{
if (state->oob_format & (NAND_OOB_RAW | NAND_OOB_SW_ECC | NAND_OOB_SW_ECC_KW)) {
if (nand->page_size == 512) {
state->oob_size = 16;
state->eccpos = nand_oob_16.eccpos;
}
else if (nand->page_size == 2048)
{
} else if (nand->page_size == 2048) {
state->oob_size = 64;
state->eccpos = nand_oob_64.eccpos;
}
@@ -105,13 +101,11 @@ int nand_fileio_cleanup(struct nand_fileio_state *state)
if (state->file_opened)
fileio_close(&state->fileio);
if (state->oob)
{
if (state->oob) {
free(state->oob);
state->oob = NULL;
}
if (state->page)
{
if (state->page) {
free(state->page);
state->page = NULL;
}
@@ -124,8 +118,8 @@ int nand_fileio_finish(struct nand_fileio_state *state)
}
COMMAND_HELPER(nand_fileio_parse_args, struct nand_fileio_state *state,
struct nand_device **dev, enum fileio_access filemode,
bool need_size, bool sw_ecc)
struct nand_device **dev, enum fileio_access filemode,
bool need_size, bool sw_ecc)
{
nand_fileio_init(state);
@@ -138,27 +132,22 @@ COMMAND_HELPER(nand_fileio_parse_args, struct nand_fileio_state *state,
if (ERROR_OK != retval)
return retval;
if (NULL == nand->device)
{
if (NULL == nand->device) {
command_print(CMD_CTX, "#%s: not probed", CMD_ARGV[0]);
return ERROR_OK;
}
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], state->address);
if (need_size)
{
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[3], state->size);
if (state->size % nand->page_size)
{
command_print(CMD_CTX, "only page-aligned sizes are supported");
return ERROR_COMMAND_SYNTAX_ERROR;
}
if (need_size) {
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[3], state->size);
if (state->size % nand->page_size) {
command_print(CMD_CTX, "only page-aligned sizes are supported");
return ERROR_COMMAND_SYNTAX_ERROR;
}
}
if (CMD_ARGC > minargs)
{
for (unsigned i = minargs; i < CMD_ARGC; i++)
{
if (CMD_ARGC > minargs) {
for (unsigned i = minargs; i < CMD_ARGC; i++) {
if (!strcmp(CMD_ARGV[i], "oob_raw"))
state->oob_format |= NAND_OOB_RAW;
else if (!strcmp(CMD_ARGV[i], "oob_only"))
@@ -167,8 +156,7 @@ COMMAND_HELPER(nand_fileio_parse_args, struct nand_fileio_state *state,
state->oob_format |= NAND_OOB_SW_ECC;
else if (sw_ecc && !strcmp(CMD_ARGV[i], "oob_softecc_kw"))
state->oob_format |= NAND_OOB_SW_ECC_KW;
else
{
else {
command_print(CMD_CTX, "unknown option: %s", CMD_ARGV[i]);
return ERROR_COMMAND_SYNTAX_ERROR;
}
@@ -179,8 +167,7 @@ COMMAND_HELPER(nand_fileio_parse_args, struct nand_fileio_state *state,
if (ERROR_OK != retval)
return retval;
if (!need_size)
{
if (!need_size) {
int filesize;
retval = fileio_size(&state->fileio, &filesize);
if (retval != ERROR_OK)
@@ -202,28 +189,23 @@ int nand_fileio_read(struct nand_device *nand, struct nand_fileio_state *s)
size_t total_read = 0;
size_t one_read;
if (NULL != s->page)
{
if (NULL != s->page) {
fileio_read(&s->fileio, s->page_size, s->page, &one_read);
if (one_read < s->page_size)
memset(s->page + one_read, 0xff, s->page_size - one_read);
total_read += one_read;
}
if (s->oob_format & NAND_OOB_SW_ECC)
{
if (s->oob_format & NAND_OOB_SW_ECC) {
uint8_t ecc[3];
memset(s->oob, 0xff, s->oob_size);
for (uint32_t i = 0, j = 0; i < s->page_size; i += 256)
{
for (uint32_t i = 0, j = 0; i < s->page_size; i += 256) {
nand_calculate_ecc(nand, s->page + i, ecc);
s->oob[s->eccpos[j++]] = ecc[0];
s->oob[s->eccpos[j++]] = ecc[1];
s->oob[s->eccpos[j++]] = ecc[2];
}
}
else if (s->oob_format & NAND_OOB_SW_ECC_KW)
{
} else if (s->oob_format & NAND_OOB_SW_ECC_KW) {
/*
* In this case eccpos is not used as
* the ECC data is always stored contigously
@@ -232,14 +214,11 @@ int nand_fileio_read(struct nand_device *nand, struct nand_fileio_state *s)
*/
uint8_t *ecc = s->oob + s->oob_size - s->page_size / 512 * 10;
memset(s->oob, 0xff, s->oob_size);
for (uint32_t i = 0; i < s->page_size; i += 512)
{
for (uint32_t i = 0; i < s->page_size; i += 512) {
nand_calculate_ecc_kw(nand, s->page + i, ecc);
ecc += 10;
}
}
else if (NULL != s->oob)
{
} else if (NULL != s->oob) {
fileio_read(&s->fileio, s->oob_size, s->oob, &one_read);
if (one_read < s->oob_size)
memset(s->oob + one_read, 0xff, s->oob_size - one_read);
@@ -247,4 +226,3 @@ int nand_fileio_read(struct nand_device *nand, struct nand_fileio_state *s)
}
return total_read;
}

View File

@@ -16,6 +16,7 @@
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
#ifndef FLASH_NAND_FILEIO_H
#define FLASH_NAND_FILEIO_H
@@ -49,9 +50,9 @@ int nand_fileio_cleanup(struct nand_fileio_state *state);
int nand_fileio_finish(struct nand_fileio_state *state);
COMMAND_HELPER(nand_fileio_parse_args, struct nand_fileio_state *state,
struct nand_device **dev, enum fileio_access filemode,
bool need_size, bool sw_ecc);
struct nand_device **dev, enum fileio_access filemode,
bool need_size, bool sw_ecc);
int nand_fileio_read(struct nand_device *nand, struct nand_fileio_state *s);
#endif // FLASH_NAND_FILEIO_H
#endif /* FLASH_NAND_FILEIO_H */

View File

@@ -16,6 +16,7 @@
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
#ifndef FLASH_NAND_IMP_H
#define FLASH_NAND_IMP_H
@@ -36,4 +37,4 @@ int nand_probe(struct nand_device *nand);
int nand_erase(struct nand_device *nand, int first_block, int last_block);
int nand_build_bbt(struct nand_device *nand, int first, int last);
#endif // FLASH_NAND_IMP_H
#endif /* FLASH_NAND_IMP_H */

File diff suppressed because it is too large Load Diff

View File

@@ -17,18 +17,17 @@
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
#ifndef LPC3180_NAND_CONTROLLER_H
#define LPC3180_NAND_CONTROLLER_H
enum lpc3180_selected_controller
{
enum lpc3180_selected_controller {
LPC3180_NO_CONTROLLER,
LPC3180_MLC_CONTROLLER,
LPC3180_SLC_CONTROLLER,
};
struct lpc3180_nand_controller
{
struct lpc3180_nand_controller {
int osc_freq;
enum lpc3180_selected_controller selected_controller;
int is_bulk;
@@ -37,4 +36,4 @@ struct lpc3180_nand_controller
uint32_t sw_wp_upper_bound;
};
#endif /*LPC3180_NAND_CONTROLLER_H */
#endif /*LPC3180_NAND_CONTROLLER_H */

File diff suppressed because it is too large Load Diff

View File

@@ -17,18 +17,17 @@
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
#ifndef LPC32xx_NAND_CONTROLLER_H
#define LPC32xx_NAND_CONTROLLER_H
enum lpc32xx_selected_controller
{
enum lpc32xx_selected_controller {
LPC32xx_NO_CONTROLLER,
LPC32xx_MLC_CONTROLLER,
LPC32xx_SLC_CONTROLLER,
};
struct lpc32xx_nand_controller
{
struct lpc32xx_nand_controller {
int osc_freq;
enum lpc32xx_selected_controller selected_controller;
int sw_write_protection;
@@ -36,4 +35,4 @@ struct lpc32xx_nand_controller
uint32_t sw_wp_upper_bound;
};
#endif /*LPC32xx_NAND_CONTROLLER_H */
#endif /*LPC32xx_NAND_CONTROLLER_H */

View File

@@ -1,761 +0,0 @@
/***************************************************************************
* Copyright (C) 2009 by Alexei Babich *
* Rezonans plc., Chelyabinsk, Russia *
* impatt@mail.ru *
* *
* Copyright (C) 2010 by Gaetan CARLIER *
* Trump s.a., Belgium *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
/*
* Freescale iMX2* OpenOCD NAND Flash controller support.
* based on Freescale iMX3* OpenOCD NAND Flash controller support.
*/
/*
* driver tested with Samsung K9F2G08UXA and Numonyx/ST NAND02G-B2D @imx27
* tested "nand probe #", "nand erase # 0 #", "nand dump # file 0 #",
* "nand write # file 0", "nand verify"
*
* get_next_halfword_from_sram_buffer() not tested
* !! all function only tested with 2k page nand device; imx27_write_page
* writes the 4 MAIN_BUFFER's and is not compatible with < 2k page
* !! oob must be be used due to NFS bug
*/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include "imp.h"
#include "mx2.h"
#include <target/target.h>
/* This permits to print (in LOG_INFO) how much bytes
* has been written after a page read or write.
* This is useful when OpenOCD is used with a graphical
* front-end to estimate progression of the global read/write
*/
#undef _MX2_PRINT_STAT
//#define _MX2_PRINT_STAT
static const char target_not_halted_err_msg[] =
"target must be halted to use mx2 NAND flash controller";
static const char data_block_size_err_msg[] =
"minimal granularity is one half-word, %" PRId32 " is incorrect";
static const char sram_buffer_bounds_err_msg[] =
"trying to access out of SRAM buffer bound (addr=0x%" PRIx32 ")";
static const char get_status_register_err_msg[] = "can't get NAND status";
static uint32_t in_sram_address;
static unsigned char sign_of_sequental_byte_read;
static int initialize_nf_controller(struct nand_device *nand);
static int get_next_byte_from_sram_buffer(struct target * target, uint8_t * value);
static int get_next_halfword_from_sram_buffer(struct target * target,
uint16_t * value);
static int poll_for_complete_op(struct target * target, const char *text);
static int validate_target_state(struct nand_device *nand);
static int do_data_output(struct nand_device *nand);
static int imx27_command(struct nand_device *nand, uint8_t command);
static int imx27_address(struct nand_device *nand, uint8_t address);
NAND_DEVICE_COMMAND_HANDLER(imx27_nand_device_command)
{
struct mx2_nf_controller *mx2_nf_info;
int hwecc_needed;
int x;
mx2_nf_info = malloc(sizeof(struct mx2_nf_controller));
if (mx2_nf_info == NULL) {
LOG_ERROR("no memory for nand controller");
return ERROR_FAIL;
}
nand->controller_priv = mx2_nf_info;
if (CMD_ARGC < 3) {
LOG_ERROR("use \"nand device imx27 target noecc|hwecc\"");
return ERROR_FAIL;
}
/*
* check hwecc requirements
*/
hwecc_needed = strcmp(CMD_ARGV[2], "hwecc");
if (hwecc_needed == 0)
mx2_nf_info->flags.hw_ecc_enabled = 1;
else
mx2_nf_info->flags.hw_ecc_enabled = 0;
mx2_nf_info->optype = MX2_NF_DATAOUT_PAGE;
mx2_nf_info->fin = MX2_NF_FIN_NONE;
mx2_nf_info->flags.target_little_endian =
(nand->target->endianness == TARGET_LITTLE_ENDIAN);
/*
* testing host endianness
*/
x = 1;
if (*(char *) &x == 1)
mx2_nf_info->flags.host_little_endian = 1;
else
mx2_nf_info->flags.host_little_endian = 0;
return ERROR_OK;
}
static int imx27_init(struct nand_device *nand)
{
struct mx2_nf_controller *mx2_nf_info = nand->controller_priv;
struct target *target = nand->target;
int validate_target_result;
uint16_t buffsize_register_content;
uint32_t pcsr_register_content;
int retval;
uint16_t nand_status_content;
/*
* validate target state
*/
validate_target_result = validate_target_state(nand);
if (validate_target_result != ERROR_OK)
return validate_target_result;
target_read_u16(target, MX2_NF_BUFSIZ, &buffsize_register_content);
mx2_nf_info->flags.one_kb_sram = !(buffsize_register_content & 0x000f);
target_read_u32(target, MX2_FMCR, &pcsr_register_content);
if (!nand->bus_width) {
/* bus_width not yet defined. Read it from MX2_FMCR */
nand->bus_width =
(pcsr_register_content & MX2_FMCR_NF_16BIT_SEL) ? 16 : 8;
} else {
/* bus_width forced in soft. Sync it to MX2_FMCR */
pcsr_register_content |=
((nand->bus_width == 16) ? MX2_FMCR_NF_16BIT_SEL : 0x00000000);
target_write_u32(target, MX2_FMCR, pcsr_register_content);
}
if (nand->bus_width == 16)
LOG_DEBUG("MX2_NF : bus is 16-bit width");
else
LOG_DEBUG("MX2_NF : bus is 8-bit width");
if (!nand->page_size) {
nand->page_size =
(pcsr_register_content & MX2_FMCR_NF_FMS) ? 2048 : 512;
} else {
pcsr_register_content |=
((nand->page_size == 2048) ? MX2_FMCR_NF_FMS : 0x00000000);
target_write_u32(target, MX2_FMCR, pcsr_register_content);
}
if (mx2_nf_info->flags.one_kb_sram && (nand->page_size == 2048)) {
LOG_ERROR("NAND controller have only 1 kb SRAM, so "
"pagesize 2048 is incompatible with it");
} else {
LOG_DEBUG("MX2_NF : NAND controller can handle pagesize of 2048");
}
initialize_nf_controller(nand);
retval = ERROR_OK;
retval |= imx27_command(nand, NAND_CMD_STATUS);
retval |= imx27_address(nand, 0x00);
retval |= do_data_output(nand);
if (retval != ERROR_OK) {
LOG_ERROR(get_status_register_err_msg);
return ERROR_FAIL;
}
target_read_u16(target, MX2_NF_MAIN_BUFFER0, &nand_status_content);
if (!(nand_status_content & 0x0080)) {
LOG_INFO("NAND read-only");
mx2_nf_info->flags.nand_readonly = 1;
} else {
mx2_nf_info->flags.nand_readonly = 0;
}
return ERROR_OK;
}
static int imx27_read_data(struct nand_device *nand, void *data)
{
struct target *target = nand->target;
int validate_target_result;
int try_data_output_from_nand_chip;
/*
* validate target state
*/
validate_target_result = validate_target_state(nand);
if (validate_target_result != ERROR_OK)
return validate_target_result;
/*
* get data from nand chip
*/
try_data_output_from_nand_chip = do_data_output(nand);
if (try_data_output_from_nand_chip != ERROR_OK) {
LOG_ERROR("imx27_read_data : read data failed : '%x'",
try_data_output_from_nand_chip);
return try_data_output_from_nand_chip;
}
if (nand->bus_width == 16)
get_next_halfword_from_sram_buffer(target, data);
else
get_next_byte_from_sram_buffer(target, data);
return ERROR_OK;
}
static int imx27_write_data(struct nand_device *nand, uint16_t data)
{
LOG_ERROR("write_data() not implemented");
return ERROR_NAND_OPERATION_FAILED;
}
static int imx27_reset(struct nand_device *nand)
{
/*
* validate target state
*/
int validate_target_result;
validate_target_result = validate_target_state(nand);
if (validate_target_result != ERROR_OK)
return validate_target_result;
initialize_nf_controller(nand);
return ERROR_OK;
}
static int imx27_command(struct nand_device *nand, uint8_t command)
{
struct mx2_nf_controller *mx2_nf_info = nand->controller_priv;
struct target *target = nand->target;
int validate_target_result;
int poll_result;
/*
* validate target state
*/
validate_target_result = validate_target_state(nand);
if (validate_target_result != ERROR_OK)
return validate_target_result;
switch(command) {
case NAND_CMD_READOOB:
command = NAND_CMD_READ0;
/* set read point for data_read() and read_block_data() to
* spare area in SRAM buffer
*/
in_sram_address = MX2_NF_SPARE_BUFFER0;
break;
case NAND_CMD_READ1:
command = NAND_CMD_READ0;
/*
* offset == one half of page size
*/
in_sram_address =
MX2_NF_MAIN_BUFFER0 + (nand->page_size >> 1);
break;
default:
in_sram_address = MX2_NF_MAIN_BUFFER0;
break;
}
target_write_u16(target, MX2_NF_FCMD, command);
/*
* start command input operation (set MX2_NF_BIT_OP_DONE==0)
*/
target_write_u16(target, MX2_NF_CFG2, MX2_NF_BIT_OP_FCI);
poll_result = poll_for_complete_op(target, "command");
if (poll_result != ERROR_OK)
return poll_result;
/*
* reset cursor to begin of the buffer
*/
sign_of_sequental_byte_read = 0;
/* Handle special read command and adjust NF_CFG2(FDO) */
switch(command) {
case NAND_CMD_READID:
mx2_nf_info->optype = MX2_NF_DATAOUT_NANDID;
mx2_nf_info->fin = MX2_NF_FIN_DATAOUT;
break;
case NAND_CMD_STATUS:
mx2_nf_info->optype = MX2_NF_DATAOUT_NANDSTATUS;
mx2_nf_info->fin = MX2_NF_FIN_DATAOUT;
target_write_u16 (target, MX2_NF_BUFADDR, 0);
in_sram_address = 0;
break;
case NAND_CMD_READ0:
mx2_nf_info->fin = MX2_NF_FIN_DATAOUT;
mx2_nf_info->optype = MX2_NF_DATAOUT_PAGE;
break;
default:
/* Ohter command use the default 'One page data out' FDO */
mx2_nf_info->optype = MX2_NF_DATAOUT_PAGE;
break;
}
return ERROR_OK;
}
static int imx27_address(struct nand_device *nand, uint8_t address)
{
struct target *target = nand->target;
int validate_target_result;
int poll_result;
/*
* validate target state
*/
validate_target_result = validate_target_state(nand);
if (validate_target_result != ERROR_OK)
return validate_target_result;
target_write_u16(target, MX2_NF_FADDR, address);
/*
* start address input operation (set MX2_NF_BIT_OP_DONE==0)
*/
target_write_u16(target, MX2_NF_CFG2, MX2_NF_BIT_OP_FAI);
poll_result = poll_for_complete_op(target, "address");
if (poll_result != ERROR_OK)
return poll_result;
return ERROR_OK;
}
static int imx27_nand_ready(struct nand_device *nand, int tout)
{
uint16_t poll_complete_status;
struct target *target = nand->target;
int validate_target_result;
/*
* validate target state
*/
validate_target_result = validate_target_state(nand);
if (validate_target_result != ERROR_OK)
return validate_target_result;
do {
target_read_u16(target, MX2_NF_CFG2, &poll_complete_status);
if (poll_complete_status & MX2_NF_BIT_OP_DONE)
return tout;
alive_sleep(1);
}
while (tout-- > 0);
return tout;
}
static int imx27_write_page(struct nand_device *nand, uint32_t page,
uint8_t * data, uint32_t data_size, uint8_t * oob,
uint32_t oob_size)
{
struct mx2_nf_controller *mx2_nf_info = nand->controller_priv;
struct target *target = nand->target;
int retval;
uint16_t nand_status_content;
uint16_t swap1, swap2, new_swap1;
int poll_result;
if (data_size % 2) {
LOG_ERROR(data_block_size_err_msg, data_size);
return ERROR_NAND_OPERATION_FAILED;
}
if (oob_size % 2) {
LOG_ERROR(data_block_size_err_msg, oob_size);
return ERROR_NAND_OPERATION_FAILED;
}
if (!data) {
LOG_ERROR("nothing to program");
return ERROR_NAND_OPERATION_FAILED;
}
/*
* validate target state
*/
retval = validate_target_state(nand);
if (retval != ERROR_OK)
return retval;
in_sram_address = MX2_NF_MAIN_BUFFER0;
sign_of_sequental_byte_read = 0;
retval = ERROR_OK;
retval |= imx27_command(nand, NAND_CMD_SEQIN);
retval |= imx27_address(nand, 0); //col
retval |= imx27_address(nand, 0); //col
retval |= imx27_address(nand, page & 0xff); //page address
retval |= imx27_address(nand, (page >> 8) & 0xff); //page address
retval |= imx27_address(nand, (page >> 16) & 0xff); //page address
target_write_buffer(target, MX2_NF_MAIN_BUFFER0, data_size, data);
if (oob) {
if (mx2_nf_info->flags.hw_ecc_enabled) {
/*
* part of spare block will be overrided by hardware
* ECC generator
*/
LOG_DEBUG("part of spare block will be overrided "
"by hardware ECC generator");
}
target_write_buffer(target, MX2_NF_SPARE_BUFFER0, oob_size,
oob);
}
//BI-swap - work-around of imx27 NFC for NAND device with page == 2kb
target_read_u16(target, MX2_NF_MAIN_BUFFER3 + 464, &swap1);
if (oob) {
LOG_ERROR("Due to NFC Bug, oob is not correctly implemented "
"in mx2 driver");
return ERROR_NAND_OPERATION_FAILED;
}
//target_read_u16 (target, MX2_NF_SPARE_BUFFER3 + 4, &swap2);
swap2 = 0xffff; //Spare buffer unused forced to 0xffff
new_swap1 = (swap1 & 0xFF00) | (swap2 >> 8);
swap2 = (swap1 << 8) | (swap2 & 0xFF);
target_write_u16(target, MX2_NF_MAIN_BUFFER3 + 464, new_swap1);
target_write_u16(target, MX2_NF_SPARE_BUFFER3 + 4, swap2);
/*
* start data input operation (set MX2_NF_BIT_OP_DONE==0)
*/
target_write_u16(target, MX2_NF_BUFADDR, 0);
target_write_u16(target, MX2_NF_CFG2, MX2_NF_BIT_OP_FDI);
poll_result = poll_for_complete_op(target, "data input");
if (poll_result != ERROR_OK)
return poll_result;
target_write_u16(target, MX2_NF_BUFADDR, 1);
target_write_u16(target, MX2_NF_CFG2, MX2_NF_BIT_OP_FDI);
poll_result = poll_for_complete_op(target, "data input");
if (poll_result != ERROR_OK)
return poll_result;
target_write_u16(target, MX2_NF_BUFADDR, 2);
target_write_u16(target, MX2_NF_CFG2, MX2_NF_BIT_OP_FDI);
poll_result = poll_for_complete_op(target, "data input");
if (poll_result != ERROR_OK)
return poll_result;
target_write_u16(target, MX2_NF_BUFADDR, 3);
target_write_u16(target, MX2_NF_CFG2, MX2_NF_BIT_OP_FDI);
poll_result = poll_for_complete_op(target, "data input");
if (poll_result != ERROR_OK)
return poll_result;
retval |= imx27_command(nand, NAND_CMD_PAGEPROG);
if (retval != ERROR_OK)
return retval;
/*
* check status register
*/
retval = ERROR_OK;
retval |= imx27_command(nand, NAND_CMD_STATUS);
target_write_u16 (target, MX2_NF_BUFADDR, 0);
mx2_nf_info->optype = MX2_NF_DATAOUT_NANDSTATUS;
mx2_nf_info->fin = MX2_NF_FIN_DATAOUT;
retval |= do_data_output(nand);
if (retval != ERROR_OK) {
LOG_ERROR (get_status_register_err_msg);
return retval;
}
target_read_u16 (target, MX2_NF_MAIN_BUFFER0, &nand_status_content);
if (nand_status_content & 0x0001) {
/*
* page not correctly written
*/
return ERROR_NAND_OPERATION_FAILED;
}
#ifdef _MX2_PRINT_STAT
LOG_INFO("%d bytes newly written", data_size);
#endif
return ERROR_OK;
}
static int imx27_read_page(struct nand_device *nand, uint32_t page,
uint8_t * data, uint32_t data_size, uint8_t * oob,
uint32_t oob_size)
{
struct mx2_nf_controller *mx2_nf_info = nand->controller_priv;
struct target *target = nand->target;
int retval;
uint16_t swap1, swap2, new_swap1;
if (data_size % 2) {
LOG_ERROR(data_block_size_err_msg, data_size);
return ERROR_NAND_OPERATION_FAILED;
}
if (oob_size % 2) {
LOG_ERROR(data_block_size_err_msg, oob_size);
return ERROR_NAND_OPERATION_FAILED;
}
/*
* validate target state
*/
retval = validate_target_state(nand);
if (retval != ERROR_OK) {
return retval;
}
/* Reset address_cycles before imx27_command ?? */
retval = ERROR_OK;
retval |= imx27_command(nand, NAND_CMD_READ0);
retval |= imx27_address(nand, 0); //col
retval |= imx27_address(nand, 0); //col
retval |= imx27_address(nand, page & 0xff); //page address
retval |= imx27_address(nand, (page >> 8) & 0xff); //page address
retval |= imx27_address(nand, (page >> 16) & 0xff); //page address
retval |= imx27_command(nand, NAND_CMD_READSTART);
target_write_u16(target, MX2_NF_BUFADDR, 0);
mx2_nf_info->fin = MX2_NF_FIN_DATAOUT;
retval = do_data_output(nand);
if (retval != ERROR_OK) {
LOG_ERROR("MX2_NF : Error reading page 0");
return retval;
}
//Test nand page size to know how much MAIN_BUFFER must be written
target_write_u16(target, MX2_NF_BUFADDR, 1);
mx2_nf_info->fin = MX2_NF_FIN_DATAOUT;
retval = do_data_output(nand);
if (retval != ERROR_OK) {
LOG_ERROR("MX2_NF : Error reading page 1");
return retval;
}
target_write_u16(target, MX2_NF_BUFADDR, 2);
mx2_nf_info->fin = MX2_NF_FIN_DATAOUT;
retval = do_data_output(nand);
if (retval != ERROR_OK) {
LOG_ERROR("MX2_NF : Error reading page 2");
return retval;
}
target_write_u16(target, MX2_NF_BUFADDR, 3);
mx2_nf_info->fin = MX2_NF_FIN_DATAOUT;
retval = do_data_output(nand);
if (retval != ERROR_OK) {
LOG_ERROR("MX2_NF : Error reading page 3");
return retval;
}
//BI-swap - work-around of imx27 NFC for NAND device with page == 2k
target_read_u16(target, MX2_NF_MAIN_BUFFER3 + 464, &swap1);
target_read_u16(target, MX2_NF_SPARE_BUFFER3 + 4, &swap2);
new_swap1 = (swap1 & 0xFF00) | (swap2 >> 8);
swap2 = (swap1 << 8) | (swap2 & 0xFF);
target_write_u16(target, MX2_NF_MAIN_BUFFER3 + 464, new_swap1);
target_write_u16(target, MX2_NF_SPARE_BUFFER3 + 4, swap2);
if (data)
target_read_buffer(target, MX2_NF_MAIN_BUFFER0, data_size, data);
if (oob)
target_read_buffer(target, MX2_NF_SPARE_BUFFER0, oob_size,
oob);
#ifdef _MX2_PRINT_STAT
if (data_size > 0) {
/* When Operation Status is read (when page is erased),
* this function is used but data_size is null.
*/
LOG_INFO("%d bytes newly read", data_size);
}
#endif
return ERROR_OK;
}
static int initialize_nf_controller(struct nand_device *nand)
{
struct mx2_nf_controller *mx2_nf_info = nand->controller_priv;
struct target *target = nand->target;
uint16_t work_mode;
uint16_t temp;
/*
* resets NAND flash controller in zero time ? I dont know.
*/
target_write_u16(target, MX2_NF_CFG1, MX2_NF_BIT_RESET_EN);
work_mode = MX2_NF_BIT_INT_DIS; /* disable interrupt */
if (target->endianness == TARGET_BIG_ENDIAN) {
LOG_DEBUG("MX2_NF : work in Big Endian mode");
work_mode |= MX2_NF_BIT_BE_EN;
} else {
LOG_DEBUG("MX2_NF : work in Little Endian mode");
}
if (mx2_nf_info->flags.hw_ecc_enabled) {
LOG_DEBUG("MX2_NF : work with ECC mode");
work_mode |= MX2_NF_BIT_ECC_EN;
} else {
LOG_DEBUG("MX2_NF : work without ECC mode");
}
target_write_u16(target, MX2_NF_CFG1, work_mode);
/*
* unlock SRAM buffer for write; 2 mean "Unlock", other values means "Lock"
*/
target_write_u16(target, MX2_NF_BUFCFG, 2);
target_read_u16(target, MX2_NF_FWP, &temp);
if ((temp & 0x0007) == 1) {
LOG_ERROR("NAND flash is tight-locked, reset needed");
return ERROR_FAIL;
}
/*
* unlock NAND flash for write
*/
target_write_u16(target, MX2_NF_FWP, 4);
target_write_u16(target, MX2_NF_LOCKSTART, 0x0000);
target_write_u16(target, MX2_NF_LOCKEND, 0xFFFF);
/*
* 0x0000 means that first SRAM buffer @0xD800_0000 will be used
*/
target_write_u16(target, MX2_NF_BUFADDR, 0x0000);
/*
* address of SRAM buffer
*/
in_sram_address = MX2_NF_MAIN_BUFFER0;
sign_of_sequental_byte_read = 0;
return ERROR_OK;
}
static int get_next_byte_from_sram_buffer(struct target * target, uint8_t * value)
{
static uint8_t even_byte = 0;
uint16_t temp;
/*
* host-big_endian ??
*/
if (sign_of_sequental_byte_read == 0)
even_byte = 0;
if (in_sram_address > MX2_NF_LAST_BUFFER_ADDR) {
LOG_ERROR(sram_buffer_bounds_err_msg, in_sram_address);
*value = 0;
sign_of_sequental_byte_read = 0;
even_byte = 0;
return ERROR_NAND_OPERATION_FAILED;
} else {
target_read_u16(target, in_sram_address, &temp);
if (even_byte) {
*value = temp >> 8;
even_byte = 0;
in_sram_address += 2;
} else {
*value = temp & 0xff;
even_byte = 1;
}
}
sign_of_sequental_byte_read = 1;
return ERROR_OK;
}
static int get_next_halfword_from_sram_buffer(struct target * target,
uint16_t * value)
{
if (in_sram_address > MX2_NF_LAST_BUFFER_ADDR) {
LOG_ERROR(sram_buffer_bounds_err_msg, in_sram_address);
*value = 0;
return ERROR_NAND_OPERATION_FAILED;
} else {
target_read_u16(target, in_sram_address, value);
in_sram_address += 2;
}
return ERROR_OK;
}
static int poll_for_complete_op(struct target * target, const char *text)
{
uint16_t poll_complete_status;
for (int poll_cycle_count = 0; poll_cycle_count < 100; poll_cycle_count++) {
target_read_u16(target, MX2_NF_CFG2, &poll_complete_status);
if (poll_complete_status & MX2_NF_BIT_OP_DONE)
break;
usleep(10);
}
if (!(poll_complete_status & MX2_NF_BIT_OP_DONE)) {
LOG_ERROR("%s sending timeout", text);
return ERROR_NAND_OPERATION_FAILED;
}
return ERROR_OK;
}
static int validate_target_state(struct nand_device *nand)
{
struct mx2_nf_controller *mx2_nf_info = nand->controller_priv;
struct target *target = nand->target;
if (target->state != TARGET_HALTED) {
LOG_ERROR(target_not_halted_err_msg);
return ERROR_NAND_OPERATION_FAILED;
}
if (mx2_nf_info->flags.target_little_endian !=
(target->endianness == TARGET_LITTLE_ENDIAN)) {
/*
* endianness changed after NAND controller probed
*/
return ERROR_NAND_OPERATION_FAILED;
}
return ERROR_OK;
}
static int do_data_output(struct nand_device *nand)
{
struct mx2_nf_controller *mx2_nf_info = nand->controller_priv;
struct target *target = nand->target;
int poll_result;
uint16_t ecc_status;
switch(mx2_nf_info->fin) {
case MX2_NF_FIN_DATAOUT:
/*
* start data output operation (set MX2_NF_BIT_OP_DONE==0)
*/
target_write_u16(target, MX2_NF_CFG2, MX2_NF_BIT_DATAOUT_TYPE(mx2_nf_info->optype));
poll_result = poll_for_complete_op(target, "data output");
if (poll_result != ERROR_OK)
return poll_result;
mx2_nf_info->fin = MX2_NF_FIN_NONE;
/*
* ECC stuff
*/
if ((mx2_nf_info->optype == MX2_NF_DATAOUT_PAGE) && mx2_nf_info->flags.hw_ecc_enabled) {
target_read_u16(target, MX2_NF_ECCSTATUS, &ecc_status);
switch(ecc_status & 0x000c) {
case 1 << 2:
LOG_INFO("main area readed with 1 (correctable) error");
break;
case 2 << 2:
LOG_INFO("main area readed with more than 1 (incorrectable) error");
return ERROR_NAND_OPERATION_FAILED;
break;
}
switch(ecc_status & 0x0003) {
case 1:
LOG_INFO("spare area readed with 1 (correctable) error");
break;
case 2:
LOG_INFO("main area readed with more than 1 (incorrectable) error");
return ERROR_NAND_OPERATION_FAILED;
break;
}
}
break;
case MX2_NF_FIN_NONE:
break;
}
return ERROR_OK;
}
struct nand_flash_controller imx27_nand_flash_controller = {
.name = "imx27",
.nand_device_command = &imx27_nand_device_command,
.init = &imx27_init,
.reset = &imx27_reset,
.command = &imx27_command,
.address = &imx27_address,
.write_data = &imx27_write_data,
.read_data = &imx27_read_data,
.write_page = &imx27_write_page,
.read_page = &imx27_read_page,
.nand_ready = &imx27_nand_ready,
};

View File

@@ -1,119 +0,0 @@
/***************************************************************************
* Copyright (C) 2009 by Alexei Babich *
* Rezonans plc., Chelyabinsk, Russia *
* impatt@mail.ru *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
/*
* Freescale iMX2* OpenOCD NAND Flash controller support.
* based on Freescale iMX3* OpenOCD NAND Flash controller support.
*
* Many thanks to Ben Dooks for writing s3c24xx driver.
*/
#define MX2_NF_BASE_ADDR 0xd8000000
#define MX2_NF_BUFSIZ (MX2_NF_BASE_ADDR + 0xe00)
#define MX2_NF_BUFADDR (MX2_NF_BASE_ADDR + 0xe04)
#define MX2_NF_FADDR (MX2_NF_BASE_ADDR + 0xe06)
#define MX2_NF_FCMD (MX2_NF_BASE_ADDR + 0xe08)
#define MX2_NF_BUFCFG (MX2_NF_BASE_ADDR + 0xe0a)
#define MX2_NF_ECCSTATUS (MX2_NF_BASE_ADDR + 0xe0c)
#define MX2_NF_ECCMAINPOS (MX2_NF_BASE_ADDR + 0xe0e)
#define MX2_NF_ECCSPAREPOS (MX2_NF_BASE_ADDR + 0xe10)
#define MX2_NF_FWP (MX2_NF_BASE_ADDR + 0xe12)
#define MX2_NF_LOCKSTART (MX2_NF_BASE_ADDR + 0xe14)
#define MX2_NF_LOCKEND (MX2_NF_BASE_ADDR + 0xe16)
#define MX2_NF_FWPSTATUS (MX2_NF_BASE_ADDR + 0xe18)
/*
* all bits not marked as self-clearing bit
*/
#define MX2_NF_CFG1 (MX2_NF_BASE_ADDR + 0xe1a)
#define MX2_NF_CFG2 (MX2_NF_BASE_ADDR + 0xe1c)
#define MX2_NF_MAIN_BUFFER0 (MX2_NF_BASE_ADDR + 0x0000)
#define MX2_NF_MAIN_BUFFER1 (MX2_NF_BASE_ADDR + 0x0200)
#define MX2_NF_MAIN_BUFFER2 (MX2_NF_BASE_ADDR + 0x0400)
#define MX2_NF_MAIN_BUFFER3 (MX2_NF_BASE_ADDR + 0x0600)
#define MX2_NF_SPARE_BUFFER0 (MX2_NF_BASE_ADDR + 0x0800)
#define MX2_NF_SPARE_BUFFER1 (MX2_NF_BASE_ADDR + 0x0810)
#define MX2_NF_SPARE_BUFFER2 (MX2_NF_BASE_ADDR + 0x0820)
#define MX2_NF_SPARE_BUFFER3 (MX2_NF_BASE_ADDR + 0x0830)
#define MX2_NF_MAIN_BUFFER_LEN 512
#define MX2_NF_SPARE_BUFFER_LEN 16
#define MX2_NF_LAST_BUFFER_ADDR ((MX2_NF_SPARE_BUFFER3) + MX2_NF_SPARE_BUFFER_LEN - 2)
/* bits in MX2_NF_CFG1 register */
#define MX2_NF_BIT_SPARE_ONLY_EN (1<<2)
#define MX2_NF_BIT_ECC_EN (1<<3)
#define MX2_NF_BIT_INT_DIS (1<<4)
#define MX2_NF_BIT_BE_EN (1<<5)
#define MX2_NF_BIT_RESET_EN (1<<6)
#define MX2_NF_BIT_FORCE_CE (1<<7)
/* bits in MX2_NF_CFG2 register */
/*Flash Command Input*/
#define MX2_NF_BIT_OP_FCI (1<<0)
/*
* Flash Address Input
*/
#define MX2_NF_BIT_OP_FAI (1<<1)
/*
* Flash Data Input
*/
#define MX2_NF_BIT_OP_FDI (1<<2)
/* see "enum mx_dataout_type" below */
#define MX2_NF_BIT_DATAOUT_TYPE(x) ((x)<<3)
#define MX2_NF_BIT_OP_DONE (1<<15)
#define MX2_CCM_CGR2 0x53f80028
#define MX2_GPR 0x43fac008
//#define MX2_PCSR 0x53f8000c
#define MX2_FMCR 0x10027814
#define MX2_FMCR_NF_16BIT_SEL (1<<4)
#define MX2_FMCR_NF_FMS (1<<5)
enum mx_dataout_type
{
MX2_NF_DATAOUT_PAGE = 1,
MX2_NF_DATAOUT_NANDID = 2,
MX2_NF_DATAOUT_NANDSTATUS = 4,
};
enum mx_nf_finalize_action
{
MX2_NF_FIN_NONE,
MX2_NF_FIN_DATAOUT,
};
struct mx2_nf_flags
{
unsigned host_little_endian:1;
unsigned target_little_endian:1;
unsigned nand_readonly:1;
unsigned one_kb_sram:1;
unsigned hw_ecc_enabled:1;
};
struct mx2_nf_controller
{
enum mx_dataout_type optype;
enum mx_nf_finalize_action fin;
struct mx2_nf_flags flags;
};

File diff suppressed because it is too large Load Diff

View File

@@ -1,4 +1,3 @@
/***************************************************************************
* Copyright (C) 2009 by Alexei Babich *
* Rezonans plc., Chelyabinsk, Russia *
@@ -26,80 +25,77 @@
* Many thanks to Ben Dooks for writing s3c24xx driver.
*/
#define MX3_NF_BASE_ADDR 0xb8000000
#define MX3_NF_BUFSIZ (MX3_NF_BASE_ADDR + 0xe00)
#define MX3_NF_BUFADDR (MX3_NF_BASE_ADDR + 0xe04)
#define MX3_NF_FADDR (MX3_NF_BASE_ADDR + 0xe06)
#define MX3_NF_FCMD (MX3_NF_BASE_ADDR + 0xe08)
#define MX3_NF_BUFCFG (MX3_NF_BASE_ADDR + 0xe0a)
#define MX3_NF_ECCSTATUS (MX3_NF_BASE_ADDR + 0xe0c)
#define MX3_NF_ECCMAINPOS (MX3_NF_BASE_ADDR + 0xe0e)
#define MX3_NF_ECCSPAREPOS (MX3_NF_BASE_ADDR + 0xe10)
#define MX3_NF_FWP (MX3_NF_BASE_ADDR + 0xe12)
#define MX3_NF_LOCKSTART (MX3_NF_BASE_ADDR + 0xe14)
#define MX3_NF_LOCKEND (MX3_NF_BASE_ADDR + 0xe16)
#define MX3_NF_FWPSTATUS (MX3_NF_BASE_ADDR + 0xe18)
/*
* all bits not marked as self-clearing bit
*/
#define MX3_NF_CFG1 (MX3_NF_BASE_ADDR + 0xe1a)
#define MX3_NF_CFG2 (MX3_NF_BASE_ADDR + 0xe1c)
#define MX3_NF_BASE_ADDR 0xb8000000
#define MX3_NF_BUFSIZ (MX3_NF_BASE_ADDR + 0xe00)
#define MX3_NF_BUFADDR (MX3_NF_BASE_ADDR + 0xe04)
#define MX3_NF_FADDR (MX3_NF_BASE_ADDR + 0xe06)
#define MX3_NF_FCMD (MX3_NF_BASE_ADDR + 0xe08)
#define MX3_NF_BUFCFG (MX3_NF_BASE_ADDR + 0xe0a)
#define MX3_NF_ECCSTATUS (MX3_NF_BASE_ADDR + 0xe0c)
#define MX3_NF_ECCMAINPOS (MX3_NF_BASE_ADDR + 0xe0e)
#define MX3_NF_ECCSPAREPOS (MX3_NF_BASE_ADDR + 0xe10)
#define MX3_NF_FWP (MX3_NF_BASE_ADDR + 0xe12)
#define MX3_NF_LOCKSTART (MX3_NF_BASE_ADDR + 0xe14)
#define MX3_NF_LOCKEND (MX3_NF_BASE_ADDR + 0xe16)
#define MX3_NF_FWPSTATUS (MX3_NF_BASE_ADDR + 0xe18)
/*
* all bits not marked as self-clearing bit
*/
#define MX3_NF_CFG1 (MX3_NF_BASE_ADDR + 0xe1a)
#define MX3_NF_CFG2 (MX3_NF_BASE_ADDR + 0xe1c)
#define MX3_NF_MAIN_BUFFER0 (MX3_NF_BASE_ADDR + 0x0000)
#define MX3_NF_MAIN_BUFFER1 (MX3_NF_BASE_ADDR + 0x0200)
#define MX3_NF_MAIN_BUFFER2 (MX3_NF_BASE_ADDR + 0x0400)
#define MX3_NF_MAIN_BUFFER3 (MX3_NF_BASE_ADDR + 0x0600)
#define MX3_NF_SPARE_BUFFER0 (MX3_NF_BASE_ADDR + 0x0800)
#define MX3_NF_SPARE_BUFFER1 (MX3_NF_BASE_ADDR + 0x0810)
#define MX3_NF_SPARE_BUFFER2 (MX3_NF_BASE_ADDR + 0x0820)
#define MX3_NF_SPARE_BUFFER3 (MX3_NF_BASE_ADDR + 0x0830)
#define MX3_NF_MAIN_BUFFER_LEN 512
#define MX3_NF_SPARE_BUFFER_LEN 16
#define MX3_NF_LAST_BUFFER_ADDR ((MX3_NF_SPARE_BUFFER3) + MX3_NF_SPARE_BUFFER_LEN - 2)
#define MX3_NF_MAIN_BUFFER0 (MX3_NF_BASE_ADDR + 0x0000)
#define MX3_NF_MAIN_BUFFER1 (MX3_NF_BASE_ADDR + 0x0200)
#define MX3_NF_MAIN_BUFFER2 (MX3_NF_BASE_ADDR + 0x0400)
#define MX3_NF_MAIN_BUFFER3 (MX3_NF_BASE_ADDR + 0x0600)
#define MX3_NF_SPARE_BUFFER0 (MX3_NF_BASE_ADDR + 0x0800)
#define MX3_NF_SPARE_BUFFER1 (MX3_NF_BASE_ADDR + 0x0810)
#define MX3_NF_SPARE_BUFFER2 (MX3_NF_BASE_ADDR + 0x0820)
#define MX3_NF_SPARE_BUFFER3 (MX3_NF_BASE_ADDR + 0x0830)
#define MX3_NF_MAIN_BUFFER_LEN 512
#define MX3_NF_SPARE_BUFFER_LEN 16
#define MX3_NF_LAST_BUFFER_ADDR ((MX3_NF_SPARE_BUFFER3) + MX3_NF_SPARE_BUFFER_LEN - 2)
/* bits in MX3_NF_CFG1 register */
#define MX3_NF_BIT_SPARE_ONLY_EN (1<<2)
#define MX3_NF_BIT_ECC_EN (1<<3)
#define MX3_NF_BIT_INT_DIS (1<<4)
#define MX3_NF_BIT_BE_EN (1<<5)
#define MX3_NF_BIT_RESET_EN (1<<6)
#define MX3_NF_BIT_FORCE_CE (1<<7)
#define MX3_NF_BIT_SPARE_ONLY_EN (1<<2)
#define MX3_NF_BIT_ECC_EN (1<<3)
#define MX3_NF_BIT_INT_DIS (1<<4)
#define MX3_NF_BIT_BE_EN (1<<5)
#define MX3_NF_BIT_RESET_EN (1<<6)
#define MX3_NF_BIT_FORCE_CE (1<<7)
/* bits in MX3_NF_CFG2 register */
/*Flash Command Input*/
#define MX3_NF_BIT_OP_FCI (1<<0)
/*
* Flash Address Input
*/
#define MX3_NF_BIT_OP_FAI (1<<1)
/*
* Flash Data Input
*/
#define MX3_NF_BIT_OP_FDI (1<<2)
#define MX3_NF_BIT_OP_FCI (1<<0)
/*
* Flash Address Input
*/
#define MX3_NF_BIT_OP_FAI (1<<1)
/*
* Flash Data Input
*/
#define MX3_NF_BIT_OP_FDI (1<<2)
/* see "enum mx_dataout_type" below */
#define MX3_NF_BIT_DATAOUT_TYPE(x) ((x)<<3)
#define MX3_NF_BIT_OP_DONE (1<<15)
#define MX3_NF_BIT_DATAOUT_TYPE(x) ((x)<<3)
#define MX3_NF_BIT_OP_DONE (1<<15)
#define MX3_CCM_CGR2 0x53f80028
#define MX3_GPR 0x43fac008
#define MX3_PCSR 0x53f8000c
#define MX3_CCM_CGR2 0x53f80028
#define MX3_GPR 0x43fac008
#define MX3_PCSR 0x53f8000c
enum mx_dataout_type
{
enum mx_dataout_type {
MX3_NF_DATAOUT_PAGE = 1,
MX3_NF_DATAOUT_NANDID = 2,
MX3_NF_DATAOUT_NANDSTATUS = 4,
};
enum mx_nf_finalize_action
{
enum mx_nf_finalize_action {
MX3_NF_FIN_NONE,
MX3_NF_FIN_DATAOUT,
};
struct mx3_nf_flags
{
struct mx3_nf_flags {
unsigned host_little_endian:1;
unsigned target_little_endian:1;
unsigned nand_readonly:1;
@@ -107,8 +103,7 @@ struct mx3_nf_flags
unsigned hw_ecc_enabled:1;
};
struct mx3_nf_controller
{
struct mx3_nf_controller {
enum mx_dataout_type optype;
enum mx_nf_finalize_action fin;
struct mx3_nf_flags flags;

971
src/flash/nand/mxc.c Normal file
View File

@@ -0,0 +1,971 @@
/***************************************************************************
* Copyright (C) 2009 by Alexei Babich *
* Rezonans plc., Chelyabinsk, Russia *
* impatt@mail.ru *
* *
* Copyright (C) 2010 by Gaetan CARLIER *
* Trump s.a., Belgium *
* *
* Copyright (C) 2011 by Erik Ahlen *
* Avalon Innovation, Sweden *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
/*
* Freescale iMX OpenOCD NAND Flash controller support.
* based on Freescale iMX2* and iMX3* OpenOCD NAND Flash controller support.
*/
/*
* driver tested with Samsung K9F2G08UXA and Numonyx/ST NAND02G-B2D @mxc
* tested "nand probe #", "nand erase # 0 #", "nand dump # file 0 #",
* "nand write # file 0", "nand verify"
*
* get_next_halfword_from_sram_buffer() not tested
* !! all function only tested with 2k page nand device; mxc_write_page
* writes the 4 MAIN_BUFFER's and is not compatible with < 2k page
* !! oob must be be used due to NFS bug
* !! oob must be 64 bytes per 2KiB page
*/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include "imp.h"
#include "mxc.h"
#include <target/target.h>
#define OOB_SIZE 64
#define nfc_is_v1() (mxc_nf_info->mxc_version == MXC_VERSION_MX27 || \
mxc_nf_info->mxc_version == MXC_VERSION_MX31)
#define nfc_is_v2() (mxc_nf_info->mxc_version == MXC_VERSION_MX25 || \
mxc_nf_info->mxc_version == MXC_VERSION_MX35)
/* This permits to print (in LOG_INFO) how much bytes
* has been written after a page read or write.
* This is useful when OpenOCD is used with a graphical
* front-end to estimate progression of the global read/write
*/
#undef _MXC_PRINT_STAT
/* #define _MXC_PRINT_STAT */
static const char target_not_halted_err_msg[] =
"target must be halted to use mxc NAND flash controller";
static const char data_block_size_err_msg[] =
"minimal granularity is one half-word, %" PRId32 " is incorrect";
static const char sram_buffer_bounds_err_msg[] =
"trying to access out of SRAM buffer bound (addr=0x%" PRIx32 ")";
static const char get_status_register_err_msg[] = "can't get NAND status";
static uint32_t in_sram_address;
static unsigned char sign_of_sequental_byte_read;
static uint32_t align_address_v2(struct nand_device *nand, uint32_t addr);
static int initialize_nf_controller(struct nand_device *nand);
static int get_next_byte_from_sram_buffer(struct nand_device *nand, uint8_t *value);
static int get_next_halfword_from_sram_buffer(struct nand_device *nand, uint16_t *value);
static int poll_for_complete_op(struct nand_device *nand, const char *text);
static int validate_target_state(struct nand_device *nand);
static int do_data_output(struct nand_device *nand);
static int mxc_command(struct nand_device *nand, uint8_t command);
static int mxc_address(struct nand_device *nand, uint8_t address);
NAND_DEVICE_COMMAND_HANDLER(mxc_nand_device_command)
{
struct mxc_nf_controller *mxc_nf_info;
int hwecc_needed;
int x;
mxc_nf_info = malloc(sizeof(struct mxc_nf_controller));
if (mxc_nf_info == NULL) {
LOG_ERROR("no memory for nand controller");
return ERROR_FAIL;
}
nand->controller_priv = mxc_nf_info;
if (CMD_ARGC < 4) {
LOG_ERROR("use \"nand device mxc target mx25|mx27|mx31|mx35 noecc|hwecc [biswap]\"");
return ERROR_FAIL;
}
/*
* check board type
*/
if (strcmp(CMD_ARGV[2], "mx25") == 0) {
mxc_nf_info->mxc_version = MXC_VERSION_MX25;
mxc_nf_info->mxc_base_addr = 0xBB000000;
mxc_nf_info->mxc_regs_addr = mxc_nf_info->mxc_base_addr + 0x1E00;
} else if (strcmp(CMD_ARGV[2], "mx27") == 0) {
mxc_nf_info->mxc_version = MXC_VERSION_MX27;
mxc_nf_info->mxc_base_addr = 0xD8000000;
mxc_nf_info->mxc_regs_addr = mxc_nf_info->mxc_base_addr + 0x0E00;
} else if (strcmp(CMD_ARGV[2], "mx31") == 0) {
mxc_nf_info->mxc_version = MXC_VERSION_MX31;
mxc_nf_info->mxc_base_addr = 0xB8000000;
mxc_nf_info->mxc_regs_addr = mxc_nf_info->mxc_base_addr + 0x0E00;
} else if (strcmp(CMD_ARGV[2], "mx35") == 0) {
mxc_nf_info->mxc_version = MXC_VERSION_MX35;
mxc_nf_info->mxc_base_addr = 0xBB000000;
mxc_nf_info->mxc_regs_addr = mxc_nf_info->mxc_base_addr + 0x1E00;
}
/*
* check hwecc requirements
*/
hwecc_needed = strcmp(CMD_ARGV[3], "hwecc");
if (hwecc_needed == 0)
mxc_nf_info->flags.hw_ecc_enabled = 1;
else
mxc_nf_info->flags.hw_ecc_enabled = 0;
mxc_nf_info->optype = MXC_NF_DATAOUT_PAGE;
mxc_nf_info->fin = MXC_NF_FIN_NONE;
mxc_nf_info->flags.target_little_endian =
(nand->target->endianness == TARGET_LITTLE_ENDIAN);
/*
* should factory bad block indicator be swaped
* as a workaround for how the nfc handles pages.
*/
if (CMD_ARGC > 4 && strcmp(CMD_ARGV[4], "biswap") == 0) {
LOG_DEBUG("BI-swap enabled");
mxc_nf_info->flags.biswap_enabled = 1;
}
/*
* testing host endianness
*/
x = 1;
if (*(char *) &x == 1)
mxc_nf_info->flags.host_little_endian = 1;
else
mxc_nf_info->flags.host_little_endian = 0;
return ERROR_OK;
}
COMMAND_HANDLER(handle_mxc_biswap_command)
{
struct nand_device *nand = NULL;
struct mxc_nf_controller *mxc_nf_info = NULL;
if (CMD_ARGC < 1 || CMD_ARGC > 2)
return ERROR_COMMAND_SYNTAX_ERROR;
int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &nand);
if (retval != ERROR_OK) {
command_print(CMD_CTX, "invalid nand device number or name: %s", CMD_ARGV[0]);
return ERROR_COMMAND_ARGUMENT_INVALID;
}
mxc_nf_info = nand->controller_priv;
if (CMD_ARGC == 2) {
if (strcmp(CMD_ARGV[1], "enable") == 0)
mxc_nf_info->flags.biswap_enabled = true;
else
mxc_nf_info->flags.biswap_enabled = false;
}
if (mxc_nf_info->flags.biswap_enabled)
command_print(CMD_CTX, "BI-swapping enabled on %s", nand->name);
else
command_print(CMD_CTX, "BI-swapping disabled on %s", nand->name);
return ERROR_OK;
}
static const struct command_registration mxc_sub_command_handlers[] = {
{
.name = "biswap",
.handler = handle_mxc_biswap_command,
.help = "Turns on/off bad block information swaping from main area, "
"without parameter query status.",
.usage = "bank_id ['enable'|'disable']",
},
COMMAND_REGISTRATION_DONE
};
static const struct command_registration mxc_nand_command_handler[] = {
{
.name = "mxc",
.mode = COMMAND_ANY,
.help = "MXC NAND flash controller commands",
.chain = mxc_sub_command_handlers
},
COMMAND_REGISTRATION_DONE
};
static int mxc_init(struct nand_device *nand)
{
struct mxc_nf_controller *mxc_nf_info = nand->controller_priv;
struct target *target = nand->target;
int validate_target_result;
uint16_t buffsize_register_content;
uint32_t sreg_content;
uint32_t SREG = MX2_FMCR;
uint32_t SEL_16BIT = MX2_FMCR_NF_16BIT_SEL;
uint32_t SEL_FMS = MX2_FMCR_NF_FMS;
int retval;
uint16_t nand_status_content;
/*
* validate target state
*/
validate_target_result = validate_target_state(nand);
if (validate_target_result != ERROR_OK)
return validate_target_result;
if (nfc_is_v1()) {
target_read_u16(target, MXC_NF_BUFSIZ, &buffsize_register_content);
mxc_nf_info->flags.one_kb_sram = !(buffsize_register_content & 0x000f);
} else
mxc_nf_info->flags.one_kb_sram = 0;
if (mxc_nf_info->mxc_version == MXC_VERSION_MX31) {
SREG = MX3_PCSR;
SEL_16BIT = MX3_PCSR_NF_16BIT_SEL;
SEL_FMS = MX3_PCSR_NF_FMS;
} else if (mxc_nf_info->mxc_version == MXC_VERSION_MX25) {
SREG = MX25_RCSR;
SEL_16BIT = MX25_RCSR_NF_16BIT_SEL;
SEL_FMS = MX25_RCSR_NF_FMS;
} else if (mxc_nf_info->mxc_version == MXC_VERSION_MX35) {
SREG = MX35_RCSR;
SEL_16BIT = MX35_RCSR_NF_16BIT_SEL;
SEL_FMS = MX35_RCSR_NF_FMS;
}
target_read_u32(target, SREG, &sreg_content);
if (!nand->bus_width) {
/* bus_width not yet defined. Read it from MXC_FMCR */
nand->bus_width = (sreg_content & SEL_16BIT) ? 16 : 8;
} else {
/* bus_width forced in soft. Sync it to MXC_FMCR */
sreg_content |= ((nand->bus_width == 16) ? SEL_16BIT : 0x00000000);
target_write_u32(target, SREG, sreg_content);
}
if (nand->bus_width == 16)
LOG_DEBUG("MXC_NF : bus is 16-bit width");
else
LOG_DEBUG("MXC_NF : bus is 8-bit width");
if (!nand->page_size)
nand->page_size = (sreg_content & SEL_FMS) ? 2048 : 512;
else {
sreg_content |= ((nand->page_size == 2048) ? SEL_FMS : 0x00000000);
target_write_u32(target, SREG, sreg_content);
}
if (mxc_nf_info->flags.one_kb_sram && (nand->page_size == 2048)) {
LOG_ERROR("NAND controller have only 1 kb SRAM, so "
"pagesize 2048 is incompatible with it");
} else
LOG_DEBUG("MXC_NF : NAND controller can handle pagesize of 2048");
if (nfc_is_v2() && sreg_content & MX35_RCSR_NF_4K)
LOG_ERROR("MXC driver does not have support for 4k pagesize.");
initialize_nf_controller(nand);
retval = ERROR_OK;
retval |= mxc_command(nand, NAND_CMD_STATUS);
retval |= mxc_address(nand, 0x00);
retval |= do_data_output(nand);
if (retval != ERROR_OK) {
LOG_ERROR(get_status_register_err_msg);
return ERROR_FAIL;
}
target_read_u16(target, MXC_NF_MAIN_BUFFER0, &nand_status_content);
if (!(nand_status_content & 0x0080)) {
LOG_INFO("NAND read-only");
mxc_nf_info->flags.nand_readonly = 1;
} else
mxc_nf_info->flags.nand_readonly = 0;
return ERROR_OK;
}
static int mxc_read_data(struct nand_device *nand, void *data)
{
int validate_target_result;
int try_data_output_from_nand_chip;
/*
* validate target state
*/
validate_target_result = validate_target_state(nand);
if (validate_target_result != ERROR_OK)
return validate_target_result;
/*
* get data from nand chip
*/
try_data_output_from_nand_chip = do_data_output(nand);
if (try_data_output_from_nand_chip != ERROR_OK) {
LOG_ERROR("mxc_read_data : read data failed : '%x'",
try_data_output_from_nand_chip);
return try_data_output_from_nand_chip;
}
if (nand->bus_width == 16)
get_next_halfword_from_sram_buffer(nand, data);
else
get_next_byte_from_sram_buffer(nand, data);
return ERROR_OK;
}
static int mxc_write_data(struct nand_device *nand, uint16_t data)
{
LOG_ERROR("write_data() not implemented");
return ERROR_NAND_OPERATION_FAILED;
}
static int mxc_reset(struct nand_device *nand)
{
/*
* validate target state
*/
int validate_target_result;
validate_target_result = validate_target_state(nand);
if (validate_target_result != ERROR_OK)
return validate_target_result;
initialize_nf_controller(nand);
return ERROR_OK;
}
static int mxc_command(struct nand_device *nand, uint8_t command)
{
struct mxc_nf_controller *mxc_nf_info = nand->controller_priv;
struct target *target = nand->target;
int validate_target_result;
int poll_result;
/*
* validate target state
*/
validate_target_result = validate_target_state(nand);
if (validate_target_result != ERROR_OK)
return validate_target_result;
switch (command) {
case NAND_CMD_READOOB:
command = NAND_CMD_READ0;
/* set read point for data_read() and read_block_data() to
* spare area in SRAM buffer
*/
if (nfc_is_v1())
in_sram_address = MXC_NF_V1_SPARE_BUFFER0;
else
in_sram_address = MXC_NF_V2_SPARE_BUFFER0;
break;
case NAND_CMD_READ1:
command = NAND_CMD_READ0;
/*
* offset == one half of page size
*/
in_sram_address = MXC_NF_MAIN_BUFFER0 + (nand->page_size >> 1);
break;
default:
in_sram_address = MXC_NF_MAIN_BUFFER0;
break;
}
target_write_u16(target, MXC_NF_FCMD, command);
/*
* start command input operation (set MXC_NF_BIT_OP_DONE==0)
*/
target_write_u16(target, MXC_NF_CFG2, MXC_NF_BIT_OP_FCI);
poll_result = poll_for_complete_op(nand, "command");
if (poll_result != ERROR_OK)
return poll_result;
/*
* reset cursor to begin of the buffer
*/
sign_of_sequental_byte_read = 0;
/* Handle special read command and adjust NF_CFG2(FDO) */
switch (command) {
case NAND_CMD_READID:
mxc_nf_info->optype = MXC_NF_DATAOUT_NANDID;
mxc_nf_info->fin = MXC_NF_FIN_DATAOUT;
break;
case NAND_CMD_STATUS:
mxc_nf_info->optype = MXC_NF_DATAOUT_NANDSTATUS;
mxc_nf_info->fin = MXC_NF_FIN_DATAOUT;
target_write_u16 (target, MXC_NF_BUFADDR, 0);
in_sram_address = 0;
break;
case NAND_CMD_READ0:
mxc_nf_info->fin = MXC_NF_FIN_DATAOUT;
mxc_nf_info->optype = MXC_NF_DATAOUT_PAGE;
break;
default:
/* Ohter command use the default 'One page data out' FDO */
mxc_nf_info->optype = MXC_NF_DATAOUT_PAGE;
break;
}
return ERROR_OK;
}
static int mxc_address(struct nand_device *nand, uint8_t address)
{
struct mxc_nf_controller *mxc_nf_info = nand->controller_priv;
struct target *target = nand->target;
int validate_target_result;
int poll_result;
/*
* validate target state
*/
validate_target_result = validate_target_state(nand);
if (validate_target_result != ERROR_OK)
return validate_target_result;
target_write_u16(target, MXC_NF_FADDR, address);
/*
* start address input operation (set MXC_NF_BIT_OP_DONE==0)
*/
target_write_u16(target, MXC_NF_CFG2, MXC_NF_BIT_OP_FAI);
poll_result = poll_for_complete_op(nand, "address");
if (poll_result != ERROR_OK)
return poll_result;
return ERROR_OK;
}
static int mxc_nand_ready(struct nand_device *nand, int tout)
{
struct mxc_nf_controller *mxc_nf_info = nand->controller_priv;
struct target *target = nand->target;
uint16_t poll_complete_status;
int validate_target_result;
/*
* validate target state
*/
validate_target_result = validate_target_state(nand);
if (validate_target_result != ERROR_OK)
return validate_target_result;
do {
target_read_u16(target, MXC_NF_CFG2, &poll_complete_status);
if (poll_complete_status & MXC_NF_BIT_OP_DONE)
return tout;
alive_sleep(1);
} while (tout-- > 0);
return tout;
}
static int mxc_write_page(struct nand_device *nand, uint32_t page,
uint8_t *data, uint32_t data_size,
uint8_t *oob, uint32_t oob_size)
{
struct mxc_nf_controller *mxc_nf_info = nand->controller_priv;
struct target *target = nand->target;
int retval;
uint16_t nand_status_content;
uint16_t swap1, swap2, new_swap1;
uint8_t bufs;
int poll_result;
if (data_size % 2) {
LOG_ERROR(data_block_size_err_msg, data_size);
return ERROR_NAND_OPERATION_FAILED;
}
if (oob_size % 2) {
LOG_ERROR(data_block_size_err_msg, oob_size);
return ERROR_NAND_OPERATION_FAILED;
}
if (!data) {
LOG_ERROR("nothing to program");
return ERROR_NAND_OPERATION_FAILED;
}
/*
* validate target state
*/
retval = validate_target_state(nand);
if (retval != ERROR_OK)
return retval;
in_sram_address = MXC_NF_MAIN_BUFFER0;
sign_of_sequental_byte_read = 0;
retval = ERROR_OK;
retval |= mxc_command(nand, NAND_CMD_SEQIN);
retval |= mxc_address(nand, 0); /* col */
retval |= mxc_address(nand, 0); /* col */
retval |= mxc_address(nand, page & 0xff); /* page address */
retval |= mxc_address(nand, (page >> 8) & 0xff);/* page address */
retval |= mxc_address(nand, (page >> 16) & 0xff); /* page address */
target_write_buffer(target, MXC_NF_MAIN_BUFFER0, data_size, data);
if (oob) {
if (mxc_nf_info->flags.hw_ecc_enabled) {
/*
* part of spare block will be overrided by hardware
* ECC generator
*/
LOG_DEBUG("part of spare block will be overrided "
"by hardware ECC generator");
}
if (nfc_is_v1())
target_write_buffer(target, MXC_NF_V1_SPARE_BUFFER0, oob_size, oob);
else {
uint32_t addr = MXC_NF_V2_SPARE_BUFFER0;
while (oob_size > 0) {
uint8_t len = MIN(oob_size, MXC_NF_SPARE_BUFFER_LEN);
target_write_buffer(target, addr, len, oob);
addr = align_address_v2(nand, addr + len);
oob += len;
oob_size -= len;
}
}
}
if (nand->page_size > 512 && mxc_nf_info->flags.biswap_enabled) {
/* BI-swap - work-around of i.MX NFC for NAND device with page == 2kb*/
target_read_u16(target, MXC_NF_MAIN_BUFFER3 + 464, &swap1);
if (oob) {
LOG_ERROR("Due to NFC Bug, oob is not correctly implemented in mxc driver");
return ERROR_NAND_OPERATION_FAILED;
}
swap2 = 0xffff; /* Spare buffer unused forced to 0xffff */
new_swap1 = (swap1 & 0xFF00) | (swap2 >> 8);
swap2 = (swap1 << 8) | (swap2 & 0xFF);
target_write_u16(target, MXC_NF_MAIN_BUFFER3 + 464, new_swap1);
if (nfc_is_v1())
target_write_u16(target, MXC_NF_V1_SPARE_BUFFER3, swap2);
else
target_write_u16(target, MXC_NF_V2_SPARE_BUFFER3, swap2);
}
/*
* start data input operation (set MXC_NF_BIT_OP_DONE==0)
*/
if (nfc_is_v1() && nand->page_size > 512)
bufs = 4;
else
bufs = 1;
for (uint8_t i = 0; i < bufs; ++i) {
target_write_u16(target, MXC_NF_BUFADDR, i);
target_write_u16(target, MXC_NF_CFG2, MXC_NF_BIT_OP_FDI);
poll_result = poll_for_complete_op(nand, "data input");
if (poll_result != ERROR_OK)
return poll_result;
}
retval |= mxc_command(nand, NAND_CMD_PAGEPROG);
if (retval != ERROR_OK)
return retval;
/*
* check status register
*/
retval = ERROR_OK;
retval |= mxc_command(nand, NAND_CMD_STATUS);
target_write_u16 (target, MXC_NF_BUFADDR, 0);
mxc_nf_info->optype = MXC_NF_DATAOUT_NANDSTATUS;
mxc_nf_info->fin = MXC_NF_FIN_DATAOUT;
retval |= do_data_output(nand);
if (retval != ERROR_OK) {
LOG_ERROR(get_status_register_err_msg);
return retval;
}
target_read_u16(target, MXC_NF_MAIN_BUFFER0, &nand_status_content);
if (nand_status_content & 0x0001) {
/*
* page not correctly written
*/
return ERROR_NAND_OPERATION_FAILED;
}
#ifdef _MXC_PRINT_STAT
LOG_INFO("%d bytes newly written", data_size);
#endif
return ERROR_OK;
}
static int mxc_read_page(struct nand_device *nand, uint32_t page,
uint8_t *data, uint32_t data_size,
uint8_t *oob, uint32_t oob_size)
{
struct mxc_nf_controller *mxc_nf_info = nand->controller_priv;
struct target *target = nand->target;
int retval;
uint8_t bufs;
uint16_t swap1, swap2, new_swap1;
if (data_size % 2) {
LOG_ERROR(data_block_size_err_msg, data_size);
return ERROR_NAND_OPERATION_FAILED;
}
if (oob_size % 2) {
LOG_ERROR(data_block_size_err_msg, oob_size);
return ERROR_NAND_OPERATION_FAILED;
}
/*
* validate target state
*/
retval = validate_target_state(nand);
if (retval != ERROR_OK)
return retval;
/* Reset address_cycles before mxc_command ?? */
retval = mxc_command(nand, NAND_CMD_READ0);
if (retval != ERROR_OK)
return retval;
retval = mxc_address(nand, 0); /* col */
if (retval != ERROR_OK)
return retval;
retval = mxc_address(nand, 0); /* col */
if (retval != ERROR_OK)
return retval;
retval = mxc_address(nand, page & 0xff);/* page address */
if (retval != ERROR_OK)
return retval;
retval = mxc_address(nand, (page >> 8) & 0xff); /* page address */
if (retval != ERROR_OK)
return retval;
retval = mxc_address(nand, (page >> 16) & 0xff);/* page address */
if (retval != ERROR_OK)
return retval;
retval = mxc_command(nand, NAND_CMD_READSTART);
if (retval != ERROR_OK)
return retval;
if (nfc_is_v1() && nand->page_size > 512)
bufs = 4;
else
bufs = 1;
for (uint8_t i = 0; i < bufs; ++i) {
target_write_u16(target, MXC_NF_BUFADDR, i);
mxc_nf_info->fin = MXC_NF_FIN_DATAOUT;
retval = do_data_output(nand);
if (retval != ERROR_OK) {
LOG_ERROR("MXC_NF : Error reading page %d", i);
return retval;
}
}
if (nand->page_size > 512 && mxc_nf_info->flags.biswap_enabled) {
uint32_t SPARE_BUFFER3;
/* BI-swap - work-around of mxc NFC for NAND device with page == 2k */
target_read_u16(target, MXC_NF_MAIN_BUFFER3 + 464, &swap1);
if (nfc_is_v1())
SPARE_BUFFER3 = MXC_NF_V1_SPARE_BUFFER3;
else
SPARE_BUFFER3 = MXC_NF_V2_SPARE_BUFFER3;
target_read_u16(target, SPARE_BUFFER3, &swap2);
new_swap1 = (swap1 & 0xFF00) | (swap2 >> 8);
swap2 = (swap1 << 8) | (swap2 & 0xFF);
target_write_u16(target, MXC_NF_MAIN_BUFFER3 + 464, new_swap1);
target_write_u16(target, SPARE_BUFFER3, swap2);
}
if (data)
target_read_buffer(target, MXC_NF_MAIN_BUFFER0, data_size, data);
if (oob) {
if (nfc_is_v1())
target_read_buffer(target, MXC_NF_V1_SPARE_BUFFER0, oob_size, oob);
else {
uint32_t addr = MXC_NF_V2_SPARE_BUFFER0;
while (oob_size > 0) {
uint8_t len = MIN(oob_size, MXC_NF_SPARE_BUFFER_LEN);
target_read_buffer(target, addr, len, oob);
addr = align_address_v2(nand, addr + len);
oob += len;
oob_size -= len;
}
}
}
#ifdef _MXC_PRINT_STAT
if (data_size > 0) {
/* When Operation Status is read (when page is erased),
* this function is used but data_size is null.
*/
LOG_INFO("%d bytes newly read", data_size);
}
#endif
return ERROR_OK;
}
static uint32_t align_address_v2(struct nand_device *nand, uint32_t addr)
{
struct mxc_nf_controller *mxc_nf_info = nand->controller_priv;
uint32_t ret = addr;
if (addr > MXC_NF_V2_SPARE_BUFFER0 &&
(addr & 0x1F) == MXC_NF_SPARE_BUFFER_LEN)
ret += MXC_NF_SPARE_BUFFER_MAX - MXC_NF_SPARE_BUFFER_LEN;
else if (addr >= (mxc_nf_info->mxc_base_addr + (uint32_t)nand->page_size))
ret = MXC_NF_V2_SPARE_BUFFER0;
return ret;
}
static int initialize_nf_controller(struct nand_device *nand)
{
struct mxc_nf_controller *mxc_nf_info = nand->controller_priv;
struct target *target = nand->target;
uint16_t work_mode = 0;
uint16_t temp;
/*
* resets NAND flash controller in zero time ? I dont know.
*/
target_write_u16(target, MXC_NF_CFG1, MXC_NF_BIT_RESET_EN);
if (mxc_nf_info->mxc_version == MXC_VERSION_MX27)
work_mode = MXC_NF_BIT_INT_DIS; /* disable interrupt */
if (target->endianness == TARGET_BIG_ENDIAN) {
LOG_DEBUG("MXC_NF : work in Big Endian mode");
work_mode |= MXC_NF_BIT_BE_EN;
} else
LOG_DEBUG("MXC_NF : work in Little Endian mode");
if (mxc_nf_info->flags.hw_ecc_enabled) {
LOG_DEBUG("MXC_NF : work with ECC mode");
work_mode |= MXC_NF_BIT_ECC_EN;
} else
LOG_DEBUG("MXC_NF : work without ECC mode");
if (nfc_is_v2()) {
target_write_u16(target, MXC_NF_V2_SPAS, OOB_SIZE / 2);
if (nand->page_size) {
uint16_t pages_per_block = nand->erase_size / nand->page_size;
work_mode |= MXC_NF_V2_CFG1_PPB(ffs(pages_per_block) - 6);
}
work_mode |= MXC_NF_BIT_ECC_4BIT;
}
target_write_u16(target, MXC_NF_CFG1, work_mode);
/*
* unlock SRAM buffer for write; 2 mean "Unlock", other values means "Lock"
*/
target_write_u16(target, MXC_NF_BUFCFG, 2);
target_read_u16(target, MXC_NF_FWP, &temp);
if ((temp & 0x0007) == 1) {
LOG_ERROR("NAND flash is tight-locked, reset needed");
return ERROR_FAIL;
}
/*
* unlock NAND flash for write
*/
if (nfc_is_v1()) {
target_write_u16(target, MXC_NF_V1_UNLOCKSTART, 0x0000);
target_write_u16(target, MXC_NF_V1_UNLOCKEND, 0xFFFF);
} else {
target_write_u16(target, MXC_NF_V2_UNLOCKSTART0, 0x0000);
target_write_u16(target, MXC_NF_V2_UNLOCKSTART1, 0x0000);
target_write_u16(target, MXC_NF_V2_UNLOCKSTART2, 0x0000);
target_write_u16(target, MXC_NF_V2_UNLOCKSTART3, 0x0000);
target_write_u16(target, MXC_NF_V2_UNLOCKEND0, 0xFFFF);
target_write_u16(target, MXC_NF_V2_UNLOCKEND1, 0xFFFF);
target_write_u16(target, MXC_NF_V2_UNLOCKEND2, 0xFFFF);
target_write_u16(target, MXC_NF_V2_UNLOCKEND3, 0xFFFF);
}
target_write_u16(target, MXC_NF_FWP, 4);
/*
* 0x0000 means that first SRAM buffer @base_addr will be used
*/
target_write_u16(target, MXC_NF_BUFADDR, 0x0000);
/*
* address of SRAM buffer
*/
in_sram_address = MXC_NF_MAIN_BUFFER0;
sign_of_sequental_byte_read = 0;
return ERROR_OK;
}
static int get_next_byte_from_sram_buffer(struct nand_device *nand, uint8_t *value)
{
struct mxc_nf_controller *mxc_nf_info = nand->controller_priv;
struct target *target = nand->target;
static uint8_t even_byte;
uint16_t temp;
/*
* host-big_endian ??
*/
if (sign_of_sequental_byte_read == 0)
even_byte = 0;
if (in_sram_address > (nfc_is_v1() ? MXC_NF_V1_LAST_BUFFADDR : MXC_NF_V2_LAST_BUFFADDR)) {
LOG_ERROR(sram_buffer_bounds_err_msg, in_sram_address);
*value = 0;
sign_of_sequental_byte_read = 0;
even_byte = 0;
return ERROR_NAND_OPERATION_FAILED;
} else {
if (nfc_is_v2())
in_sram_address = align_address_v2(nand, in_sram_address);
target_read_u16(target, in_sram_address, &temp);
if (even_byte) {
*value = temp >> 8;
even_byte = 0;
in_sram_address += 2;
} else {
*value = temp & 0xff;
even_byte = 1;
}
}
sign_of_sequental_byte_read = 1;
return ERROR_OK;
}
static int get_next_halfword_from_sram_buffer(struct nand_device *nand, uint16_t *value)
{
struct mxc_nf_controller *mxc_nf_info = nand->controller_priv;
struct target *target = nand->target;
if (in_sram_address > (nfc_is_v1() ? MXC_NF_V1_LAST_BUFFADDR : MXC_NF_V2_LAST_BUFFADDR)) {
LOG_ERROR(sram_buffer_bounds_err_msg, in_sram_address);
*value = 0;
return ERROR_NAND_OPERATION_FAILED;
} else {
if (nfc_is_v2())
in_sram_address = align_address_v2(nand, in_sram_address);
target_read_u16(target, in_sram_address, value);
in_sram_address += 2;
}
return ERROR_OK;
}
static int poll_for_complete_op(struct nand_device *nand, const char *text)
{
if (mxc_nand_ready(nand, 1000) == -1) {
LOG_ERROR("%s sending timeout", text);
return ERROR_NAND_OPERATION_FAILED;
}
return ERROR_OK;
}
static int validate_target_state(struct nand_device *nand)
{
struct mxc_nf_controller *mxc_nf_info = nand->controller_priv;
struct target *target = nand->target;
if (target->state != TARGET_HALTED) {
LOG_ERROR(target_not_halted_err_msg);
return ERROR_NAND_OPERATION_FAILED;
}
if (mxc_nf_info->flags.target_little_endian !=
(target->endianness == TARGET_LITTLE_ENDIAN)) {
/*
* endianness changed after NAND controller probed
*/
return ERROR_NAND_OPERATION_FAILED;
}
return ERROR_OK;
}
int ecc_status_v1(struct nand_device *nand)
{
struct mxc_nf_controller *mxc_nf_info = nand->controller_priv;
struct target *target = nand->target;
uint16_t ecc_status;
target_read_u16(target, MXC_NF_ECCSTATUS, &ecc_status);
switch (ecc_status & 0x000c) {
case 1 << 2:
LOG_INFO("main area read with 1 (correctable) error");
break;
case 2 << 2:
LOG_INFO("main area read with more than 1 (incorrectable) error");
return ERROR_NAND_OPERATION_FAILED;
break;
}
switch (ecc_status & 0x0003) {
case 1:
LOG_INFO("spare area read with 1 (correctable) error");
break;
case 2:
LOG_INFO("main area read with more than 1 (incorrectable) error");
return ERROR_NAND_OPERATION_FAILED;
break;
}
return ERROR_OK;
}
int ecc_status_v2(struct nand_device *nand)
{
struct mxc_nf_controller *mxc_nf_info = nand->controller_priv;
struct target *target = nand->target;
uint16_t ecc_status;
uint8_t no_subpages;
uint8_t err;
no_subpages = nand->page_size >> 9;
target_read_u16(target, MXC_NF_ECCSTATUS, &ecc_status);
do {
err = ecc_status & 0xF;
if (err > 4) {
LOG_INFO("UnCorrectable RS-ECC Error");
return ERROR_NAND_OPERATION_FAILED;
} else if (err > 0)
LOG_INFO("%d Symbol Correctable RS-ECC Error", err);
ecc_status >>= 4;
} while (--no_subpages);
return ERROR_OK;
}
static int do_data_output(struct nand_device *nand)
{
struct mxc_nf_controller *mxc_nf_info = nand->controller_priv;
struct target *target = nand->target;
int poll_result;
switch (mxc_nf_info->fin) {
case MXC_NF_FIN_DATAOUT:
/*
* start data output operation (set MXC_NF_BIT_OP_DONE==0)
*/
target_write_u16(target, MXC_NF_CFG2, MXC_NF_BIT_DATAOUT_TYPE(mxc_nf_info->optype));
poll_result = poll_for_complete_op(nand, "data output");
if (poll_result != ERROR_OK)
return poll_result;
mxc_nf_info->fin = MXC_NF_FIN_NONE;
/*
* ECC stuff
*/
if (mxc_nf_info->optype == MXC_NF_DATAOUT_PAGE && mxc_nf_info->flags.hw_ecc_enabled) {
int ecc_status;
if (nfc_is_v1())
ecc_status = ecc_status_v1(nand);
else
ecc_status = ecc_status_v2(nand);
if (ecc_status != ERROR_OK)
return ecc_status;
}
break;
case MXC_NF_FIN_NONE:
break;
}
return ERROR_OK;
}
struct nand_flash_controller mxc_nand_flash_controller = {
.name = "mxc",
.nand_device_command = &mxc_nand_device_command,
.commands = mxc_nand_command_handler,
.init = &mxc_init,
.reset = &mxc_reset,
.command = &mxc_command,
.address = &mxc_address,
.write_data = &mxc_write_data,
.read_data = &mxc_read_data,
.write_page = &mxc_write_page,
.read_page = &mxc_read_page,
.nand_ready = &mxc_nand_ready,
};

167
src/flash/nand/mxc.h Normal file
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@@ -0,0 +1,167 @@
/***************************************************************************
* Copyright (C) 2009 by Alexei Babich *
* Rezonans plc., Chelyabinsk, Russia *
* impatt@mail.ru *
* *
* Copyright (C) 2011 by Erik Ahlen *
* Avalon Innovation, Sweden *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
/*
* Freescale iMX OpenOCD NAND Flash controller support.
* based on Freescale iMX2* and iMX3* OpenOCD NAND Flash controller support.
*
* Many thanks to Ben Dooks for writing s3c24xx driver.
*/
#define MXC_NF_BUFSIZ (mxc_nf_info->mxc_regs_addr + 0x00)
#define MXC_NF_BUFADDR (mxc_nf_info->mxc_regs_addr + 0x04)
#define MXC_NF_FADDR (mxc_nf_info->mxc_regs_addr + 0x06)
#define MXC_NF_FCMD (mxc_nf_info->mxc_regs_addr + 0x08)
#define MXC_NF_BUFCFG (mxc_nf_info->mxc_regs_addr + 0x0a)
#define MXC_NF_ECCSTATUS (mxc_nf_info->mxc_regs_addr + 0x0c)
#define MXC_NF_ECCMAINPOS (mxc_nf_info->mxc_regs_addr + 0x0e)
#define MXC_NF_V1_ECCSPAREPOS (mxc_nf_info->mxc_regs_addr + 0x10)
#define MXC_NF_V2_SPAS (mxc_nf_info->mxc_regs_addr + 0x10)
#define MXC_NF_FWP (mxc_nf_info->mxc_regs_addr + 0x12)
#define MXC_NF_V1_UNLOCKSTART (mxc_nf_info->mxc_regs_addr + 0x14)
#define MXC_NF_V1_UNLOCKEND (mxc_nf_info->mxc_regs_addr + 0x16)
#define MXC_NF_V2_UNLOCKSTART0 (mxc_nf_info->mxc_regs_addr + 0x20)
#define MXC_NF_V2_UNLOCKSTART1 (mxc_nf_info->mxc_regs_addr + 0x24)
#define MXC_NF_V2_UNLOCKSTART2 (mxc_nf_info->mxc_regs_addr + 0x28)
#define MXC_NF_V2_UNLOCKSTART3 (mxc_nf_info->mxc_regs_addr + 0x2c)
#define MXC_NF_V2_UNLOCKEND0 (mxc_nf_info->mxc_regs_addr + 0x22)
#define MXC_NF_V2_UNLOCKEND1 (mxc_nf_info->mxc_regs_addr + 0x26)
#define MXC_NF_V2_UNLOCKEND2 (mxc_nf_info->mxc_regs_addr + 0x2a)
#define MXC_NF_V2_UNLOCKEND3 (mxc_nf_info->mxc_regs_addr + 0x2e)
#define MXC_NF_FWPSTATUS (mxc_nf_info->mxc_regs_addr + 0x18)
/*
* all bits not marked as self-clearing bit
*/
#define MXC_NF_CFG1 (mxc_nf_info->mxc_regs_addr + 0x1a)
#define MXC_NF_CFG2 (mxc_nf_info->mxc_regs_addr + 0x1c)
#define MXC_NF_MAIN_BUFFER0 (mxc_nf_info->mxc_base_addr + 0x0000)
#define MXC_NF_MAIN_BUFFER1 (mxc_nf_info->mxc_base_addr + 0x0200)
#define MXC_NF_MAIN_BUFFER2 (mxc_nf_info->mxc_base_addr + 0x0400)
#define MXC_NF_MAIN_BUFFER3 (mxc_nf_info->mxc_base_addr + 0x0600)
#define MXC_NF_V1_SPARE_BUFFER0 (mxc_nf_info->mxc_base_addr + 0x0800)
#define MXC_NF_V1_SPARE_BUFFER1 (mxc_nf_info->mxc_base_addr + 0x0810)
#define MXC_NF_V1_SPARE_BUFFER2 (mxc_nf_info->mxc_base_addr + 0x0820)
#define MXC_NF_V1_SPARE_BUFFER3 (mxc_nf_info->mxc_base_addr + 0x0830)
#define MXC_NF_V2_MAIN_BUFFER4 (mxc_nf_info->mxc_base_addr + 0x0800)
#define MXC_NF_V2_MAIN_BUFFER5 (mxc_nf_info->mxc_base_addr + 0x0a00)
#define MXC_NF_V2_MAIN_BUFFER6 (mxc_nf_info->mxc_base_addr + 0x0c00)
#define MXC_NF_V2_MAIN_BUFFER7 (mxc_nf_info->mxc_base_addr + 0x0e00)
#define MXC_NF_V2_SPARE_BUFFER0 (mxc_nf_info->mxc_base_addr + 0x1000)
#define MXC_NF_V2_SPARE_BUFFER1 (mxc_nf_info->mxc_base_addr + 0x1040)
#define MXC_NF_V2_SPARE_BUFFER2 (mxc_nf_info->mxc_base_addr + 0x1080)
#define MXC_NF_V2_SPARE_BUFFER3 (mxc_nf_info->mxc_base_addr + 0x10c0)
#define MXC_NF_V2_SPARE_BUFFER4 (mxc_nf_info->mxc_base_addr + 0x1100)
#define MXC_NF_V2_SPARE_BUFFER5 (mxc_nf_info->mxc_base_addr + 0x1140)
#define MXC_NF_V2_SPARE_BUFFER6 (mxc_nf_info->mxc_base_addr + 0x1180)
#define MXC_NF_V2_SPARE_BUFFER7 (mxc_nf_info->mxc_base_addr + 0x11c0)
#define MXC_NF_MAIN_BUFFER_LEN 512
#define MXC_NF_SPARE_BUFFER_LEN 16
#define MXC_NF_SPARE_BUFFER_MAX 64
#define MXC_NF_V1_LAST_BUFFADDR ((MXC_NF_V1_SPARE_BUFFER3) + \
MXC_NF_SPARE_BUFFER_LEN - 2)
#define MXC_NF_V2_LAST_BUFFADDR ((MXC_NF_V2_SPARE_BUFFER7) + \
MXC_NF_SPARE_BUFFER_LEN - 2)
/* bits in MXC_NF_CFG1 register */
#define MXC_NF_BIT_ECC_4BIT (1<<0)
#define MXC_NF_BIT_SPARE_ONLY_EN (1<<2)
#define MXC_NF_BIT_ECC_EN (1<<3)
#define MXC_NF_BIT_INT_DIS (1<<4)
#define MXC_NF_BIT_BE_EN (1<<5)
#define MXC_NF_BIT_RESET_EN (1<<6)
#define MXC_NF_BIT_FORCE_CE (1<<7)
#define MXC_NF_V2_CFG1_PPB(x) (((x) & 0x3) << 9)
/* bits in MXC_NF_CFG2 register */
/*Flash Command Input*/
#define MXC_NF_BIT_OP_FCI (1<<0)
/*
* Flash Address Input
*/
#define MXC_NF_BIT_OP_FAI (1<<1)
/*
* Flash Data Input
*/
#define MXC_NF_BIT_OP_FDI (1<<2)
/* see "enum mx_dataout_type" below */
#define MXC_NF_BIT_DATAOUT_TYPE(x) ((x)<<3)
#define MXC_NF_BIT_OP_DONE (1<<15)
#define MXC_CCM_CGR2 0x53f80028
#define MXC_GPR 0x43fac008
#define MX2_FMCR 0x10027814
#define MX2_FMCR_NF_16BIT_SEL (1<<4)
#define MX2_FMCR_NF_FMS (1<<5)
#define MX25_RCSR 0x53f80018
#define MX25_RCSR_NF_16BIT_SEL (1<<14)
#define MX25_RCSR_NF_FMS (1<<8)
#define MX25_RCSR_NF_4K (1<<9)
#define MX3_PCSR 0x53f8000c
#define MX3_PCSR_NF_16BIT_SEL (1<<31)
#define MX3_PCSR_NF_FMS (1<<30)
#define MX35_RCSR 0x53f80018
#define MX35_RCSR_NF_16BIT_SEL (1<<14)
#define MX35_RCSR_NF_FMS (1<<8)
#define MX35_RCSR_NF_4K (1<<9)
enum mxc_version {
MXC_VERSION_UKWN = 0,
MXC_VERSION_MX25 = 1,
MXC_VERSION_MX27 = 2,
MXC_VERSION_MX31 = 3,
MXC_VERSION_MX35 = 4
};
enum mxc_dataout_type {
MXC_NF_DATAOUT_PAGE = 1,
MXC_NF_DATAOUT_NANDID = 2,
MXC_NF_DATAOUT_NANDSTATUS = 4,
};
enum mxc_nf_finalize_action {
MXC_NF_FIN_NONE,
MXC_NF_FIN_DATAOUT,
};
struct mxc_nf_flags {
unsigned host_little_endian:1;
unsigned target_little_endian:1;
unsigned nand_readonly:1;
unsigned one_kb_sram:1;
unsigned hw_ecc_enabled:1;
unsigned biswap_enabled:1;
};
struct mxc_nf_controller {
enum mxc_version mxc_version;
uint32_t mxc_base_addr;
uint32_t mxc_regs_addr;
enum mxc_dataout_type optype;
enum mxc_nf_finalize_action fin;
struct mxc_nf_flags flags;
};

View File

@@ -24,7 +24,6 @@
#include "imp.h"
#include "hello.h"
static int nonce_nand_command(struct nand_device *nand, uint8_t command)
{
return ERROR_OK;
@@ -62,16 +61,15 @@ static int nonce_nand_init(struct nand_device *nand)
return ERROR_OK;
}
struct nand_flash_controller nonce_nand_controller =
{
.name = "nonce",
.commands = hello_command_handlers,
.nand_device_command = &nonce_nand_device_command,
.init = &nonce_nand_init,
.reset = &nonce_nand_reset,
.command = &nonce_nand_command,
.address = &nonce_nand_address,
.read_data = &nonce_nand_read,
.write_data = &nonce_nand_write,
.write_block_data = &nonce_nand_fast_block_write,
struct nand_flash_controller nonce_nand_controller = {
.name = "nonce",
.commands = hello_command_handlers,
.nand_device_command = &nonce_nand_device_command,
.init = &nonce_nand_init,
.reset = &nonce_nand_reset,
.command = &nonce_nand_command,
.address = &nonce_nand_address,
.read_data = &nonce_nand_read,
.write_data = &nonce_nand_write,
.write_block_data = &nonce_nand_fast_block_write,
};

View File

@@ -31,8 +31,7 @@
#include "arm_io.h"
#include <target/arm.h>
struct nuc910_nand_controller
{
struct nuc910_nand_controller {
struct arm_nand_data io;
};
@@ -53,7 +52,8 @@ static int nuc910_nand_command(struct nand_device *nand, uint8_t command)
struct target *target = nand->target;
int result;
if ((result = validate_target_state(nand)) != ERROR_OK)
result = validate_target_state(nand);
if (result != ERROR_OK)
return result;
target_write_u8(target, NUC910_SMCMD, command);
@@ -65,7 +65,8 @@ static int nuc910_nand_address(struct nand_device *nand, uint8_t address)
struct target *target = nand->target;
int result;
if ((result = validate_target_state(nand)) != ERROR_OK)
result = validate_target_state(nand);
if (result != ERROR_OK)
return result;
target_write_u32(target, NUC910_SMADDR, ((address & 0xff) | NUC910_SMADDR_EOA));
@@ -77,7 +78,8 @@ static int nuc910_nand_read(struct nand_device *nand, void *data)
struct target *target = nand->target;
int result;
if ((result = validate_target_state(nand)) != ERROR_OK)
result = validate_target_state(nand);
if (result != ERROR_OK)
return result;
target_read_u8(target, NUC910_SMDATA, data);
@@ -89,7 +91,8 @@ static int nuc910_nand_write(struct nand_device *nand, uint16_t data)
struct target *target = nand->target;
int result;
if ((result = validate_target_state(nand)) != ERROR_OK)
result = validate_target_state(nand);
if (result != ERROR_OK)
return result;
target_write_u8(target, NUC910_SMDATA, data);
@@ -102,7 +105,8 @@ static int nuc910_nand_read_block_data(struct nand_device *nand,
struct nuc910_nand_controller *nuc910_nand = nand->controller_priv;
int result;
if ((result = validate_target_state(nand)) != ERROR_OK)
result = validate_target_state(nand);
if (result != ERROR_OK)
return result;
nuc910_nand->io.chunk_size = nand->page_size;
@@ -125,7 +129,8 @@ static int nuc910_nand_write_block_data(struct nand_device *nand,
struct nuc910_nand_controller *nuc910_nand = nand->controller_priv;
int result;
if ((result = validate_target_state(nand)) != ERROR_OK)
result = validate_target_state(nand);
if (result != ERROR_OK)
return result;
nuc910_nand->io.chunk_size = nand->page_size;
@@ -154,9 +159,8 @@ static int nuc910_nand_ready(struct nand_device *nand, int timeout)
do {
target_read_u32(target, NUC910_SMISR, &status);
if (status & NUC910_SMISR_RB_) {
if (status & NUC910_SMISR_RB_)
return 1;
}
alive_sleep(1);
} while (timeout-- > 0);
@@ -184,12 +188,12 @@ static int nuc910_nand_init(struct nand_device *nand)
int bus_width = nand->bus_width ? : 8;
int result;
if ((result = validate_target_state(nand)) != ERROR_OK)
result = validate_target_state(nand);
if (result != ERROR_OK)
return result;
/* nuc910 only supports 8bit */
if (bus_width != 8)
{
if (bus_width != 8) {
LOG_ERROR("nuc910 only supports 8 bit bus width, not %i", bus_width);
return ERROR_NAND_OPERATION_NOT_SUPPORTED;
}
@@ -210,8 +214,7 @@ static int nuc910_nand_init(struct nand_device *nand)
return ERROR_OK;
}
struct nand_flash_controller nuc910_nand_controller =
{
struct nand_flash_controller nuc910_nand_controller = {
.name = "nuc910",
.command = nuc910_nand_command,
.address = nuc910_nand_address,

View File

@@ -30,9 +30,7 @@
#include "arm_io.h"
#include <target/arm.h>
struct orion_nand_controller
{
struct orion_nand_controller {
struct arm_nand_data io;
uint32_t cmd;
@@ -120,10 +118,8 @@ NAND_DEVICE_COMMAND_HANDLER(orion_nand_device_command)
uint32_t base;
uint8_t ale, cle;
if (CMD_ARGC != 3) {
LOG_ERROR("arguments must be: <target_id> <NAND_address>");
return ERROR_NAND_DEVICE_INVALID;
}
if (CMD_ARGC != 3)
return ERROR_COMMAND_SYNTAX_ERROR;
hw = calloc(1, sizeof(*hw));
if (!hw) {
@@ -153,16 +149,15 @@ static int orion_nand_init(struct nand_device *nand)
return ERROR_OK;
}
struct nand_flash_controller orion_nand_controller =
{
.name = "orion",
.command = orion_nand_command,
.address = orion_nand_address,
.read_data = orion_nand_read,
.write_data = orion_nand_write,
.write_block_data = orion_nand_fast_block_write,
.reset = orion_nand_reset,
.nand_device_command = orion_nand_device_command,
.init = orion_nand_init,
struct nand_flash_controller orion_nand_controller = {
.name = "orion",
.usage = "<target_id> <NAND_address>",
.command = orion_nand_command,
.address = orion_nand_address,
.read_data = orion_nand_read,
.write_data = orion_nand_write,
.write_block_data = orion_nand_fast_block_write,
.reset = orion_nand_reset,
.nand_device_command = orion_nand_device_command,
.init = orion_nand_init,
};

View File

@@ -104,15 +104,15 @@ static int s3c2410_nand_ready(struct nand_device *nand, int timeout)
}
struct nand_flash_controller s3c2410_nand_controller = {
.name = "s3c2410",
.nand_device_command = &s3c2410_nand_device_command,
.init = &s3c2410_init,
.reset = &s3c24xx_reset,
.command = &s3c24xx_command,
.address = &s3c24xx_address,
.write_data = &s3c2410_write_data,
.read_data = &s3c2410_read_data,
.write_page = s3c24xx_write_page,
.read_page = s3c24xx_read_page,
.nand_ready = &s3c2410_nand_ready,
};
.name = "s3c2410",
.nand_device_command = &s3c2410_nand_device_command,
.init = &s3c2410_init,
.reset = &s3c24xx_reset,
.command = &s3c24xx_command,
.address = &s3c24xx_address,
.write_data = &s3c2410_write_data,
.read_data = &s3c2410_read_data,
.write_page = s3c24xx_write_page,
.read_page = s3c24xx_read_page,
.nand_ready = &s3c2410_nand_ready,
};

View File

@@ -61,17 +61,17 @@ static int s3c2412_init(struct nand_device *nand)
}
struct nand_flash_controller s3c2412_nand_controller = {
.name = "s3c2412",
.nand_device_command = &s3c2412_nand_device_command,
.init = &s3c2412_init,
.reset = &s3c24xx_reset,
.command = &s3c24xx_command,
.address = &s3c24xx_address,
.write_data = &s3c24xx_write_data,
.read_data = &s3c24xx_read_data,
.write_page = s3c24xx_write_page,
.read_page = s3c24xx_read_page,
.write_block_data = &s3c2440_write_block_data,
.read_block_data = &s3c2440_read_block_data,
.nand_ready = &s3c2440_nand_ready,
};
.name = "s3c2412",
.nand_device_command = &s3c2412_nand_device_command,
.init = &s3c2412_init,
.reset = &s3c24xx_reset,
.command = &s3c24xx_command,
.address = &s3c24xx_address,
.write_data = &s3c24xx_write_data,
.read_data = &s3c24xx_read_data,
.write_page = s3c24xx_write_page,
.read_page = s3c24xx_read_page,
.write_block_data = &s3c2440_write_block_data,
.read_block_data = &s3c2440_read_block_data,
.nand_ready = &s3c2440_nand_ready,
};

View File

@@ -30,7 +30,6 @@
#include "s3c24xx.h"
NAND_DEVICE_COMMAND_HANDLER(s3c2440_nand_device_command)
{
struct s3c24xx_nand_controller *info;
@@ -153,17 +152,17 @@ int s3c2440_write_block_data(struct nand_device *nand, uint8_t *data, int data_s
}
struct nand_flash_controller s3c2440_nand_controller = {
.name = "s3c2440",
.nand_device_command = &s3c2440_nand_device_command,
.init = &s3c2440_init,
.reset = &s3c24xx_reset,
.command = &s3c24xx_command,
.address = &s3c24xx_address,
.write_data = &s3c24xx_write_data,
.read_data = &s3c24xx_read_data,
.write_page = s3c24xx_write_page,
.read_page = s3c24xx_read_page,
.write_block_data = &s3c2440_write_block_data,
.read_block_data = &s3c2440_read_block_data,
.nand_ready = &s3c2440_nand_ready,
};
.name = "s3c2440",
.nand_device_command = &s3c2440_nand_device_command,
.init = &s3c2440_init,
.reset = &s3c24xx_reset,
.command = &s3c24xx_command,
.address = &s3c24xx_address,
.write_data = &s3c24xx_write_data,
.read_data = &s3c24xx_read_data,
.write_page = s3c24xx_write_page,
.read_page = s3c24xx_read_page,
.write_block_data = &s3c2440_write_block_data,
.read_block_data = &s3c2440_read_block_data,
.nand_ready = &s3c2440_nand_ready,
};

View File

@@ -30,7 +30,6 @@
#include "s3c24xx.h"
NAND_DEVICE_COMMAND_HANDLER(s3c2443_nand_device_command)
{
struct s3c24xx_nand_controller *info;
@@ -62,17 +61,17 @@ static int s3c2443_init(struct nand_device *nand)
}
struct nand_flash_controller s3c2443_nand_controller = {
.name = "s3c2443",
.nand_device_command = &s3c2443_nand_device_command,
.init = &s3c2443_init,
.reset = &s3c24xx_reset,
.command = &s3c24xx_command,
.address = &s3c24xx_address,
.write_data = &s3c24xx_write_data,
.read_data = &s3c24xx_read_data,
.write_page = s3c24xx_write_page,
.read_page = s3c24xx_read_page,
.write_block_data = &s3c2440_write_block_data,
.read_block_data = &s3c2440_read_block_data,
.nand_ready = &s3c2440_nand_ready,
};
.name = "s3c2443",
.nand_device_command = &s3c2443_nand_device_command,
.init = &s3c2443_init,
.reset = &s3c24xx_reset,
.command = &s3c24xx_command,
.address = &s3c24xx_address,
.write_data = &s3c24xx_write_data,
.read_data = &s3c24xx_read_data,
.write_page = s3c24xx_write_page,
.read_page = s3c24xx_read_page,
.write_block_data = &s3c2440_write_block_data,
.read_block_data = &s3c2440_read_block_data,
.nand_ready = &s3c2440_nand_ready,
};

View File

@@ -30,7 +30,6 @@
#include "s3c24xx.h"
S3C24XX_DEVICE_COMMAND()
{
*info = NULL;
@@ -77,7 +76,6 @@ int s3c24xx_command(struct nand_device *nand, uint8_t command)
return ERROR_OK;
}
int s3c24xx_address(struct nand_device *nand, uint8_t address)
{
struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;

View File

@@ -31,8 +31,7 @@
#include "s3c24xx_regs.h"
#include <target/target.h>
struct s3c24xx_nand_controller
{
struct s3c24xx_nand_controller {
/* register addresses */
uint32_t cmd;
uint32_t addr;
@@ -78,4 +77,4 @@ int s3c2440_read_block_data(struct nand_device *nand,
int s3c2440_write_block_data(struct nand_device *nand,
uint8_t *data, int data_size);
#endif // S3C24xx_NAND_H
#endif /* S3C24xx_NAND_H */

View File

@@ -23,7 +23,7 @@
*/
#ifndef __ASM_ARM_REGS_NAND
#define __ASM_ARM_REGS_NAND "$Id: nand.h,v 1.3 2003/12/09 11:36:29 ben Exp $"
#define __ASM_ARM_REGS_NAND
#define S3C2410_NFREG(x) (x)

View File

@@ -58,17 +58,17 @@ static int s3c6400_init(struct nand_device *nand)
}
struct nand_flash_controller s3c6400_nand_controller = {
.name = "s3c6400",
.nand_device_command = &s3c6400_nand_device_command,
.init = &s3c6400_init,
.reset = &s3c24xx_reset,
.command = &s3c24xx_command,
.address = &s3c24xx_address,
.write_data = &s3c24xx_write_data,
.read_data = &s3c24xx_read_data,
.write_page = s3c24xx_write_page,
.read_page = s3c24xx_read_page,
.write_block_data = &s3c2440_write_block_data,
.read_block_data = &s3c2440_read_block_data,
.nand_ready = &s3c2440_nand_ready,
};
.name = "s3c6400",
.nand_device_command = &s3c6400_nand_device_command,
.init = &s3c6400_init,
.reset = &s3c24xx_reset,
.command = &s3c24xx_command,
.address = &s3c24xx_address,
.write_data = &s3c24xx_write_data,
.read_data = &s3c24xx_read_data,
.write_page = s3c24xx_write_page,
.read_page = s3c24xx_read_page,
.write_block_data = &s3c2440_write_block_data,
.read_block_data = &s3c2440_read_block_data,
.nand_ready = &s3c2440_nand_ready,
};

View File

@@ -20,6 +20,7 @@
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
@@ -29,7 +30,7 @@
#include "fileio.h"
#include <target/target.h>
// to be removed
/* to be removed */
extern struct nand_device *nand_devices;
COMMAND_HANDLER(handle_nand_list_command)
@@ -37,14 +38,12 @@ COMMAND_HANDLER(handle_nand_list_command)
struct nand_device *p;
int i;
if (!nand_devices)
{
if (!nand_devices) {
command_print(CMD_CTX, "no NAND flash devices configured");
return ERROR_OK;
}
for (p = nand_devices, i = 0; p; p = p->next, i++)
{
for (p = nand_devices, i = 0; p; p = p->next, i++) {
if (p->device)
command_print(CMD_CTX, "#%i: %s (%s) "
"pagesize: %i, buswidth: %i,\n\t"
@@ -67,21 +66,21 @@ COMMAND_HANDLER(handle_nand_info_command)
int last = -1;
switch (CMD_ARGC) {
default:
return ERROR_COMMAND_SYNTAX_ERROR;
case 1:
first = 0;
last = INT32_MAX;
break;
case 2:
COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], i);
first = last = i;
i = 0;
break;
case 3:
COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], first);
COMMAND_PARSE_NUMBER(int, CMD_ARGV[2], last);
break;
default:
return ERROR_COMMAND_SYNTAX_ERROR;
case 1:
first = 0;
last = INT32_MAX;
break;
case 2:
COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], i);
first = last = i;
i = 0;
break;
case 3:
COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], first);
COMMAND_PARSE_NUMBER(int, CMD_ARGV[2], last);
break;
}
struct nand_device *p;
@@ -89,8 +88,7 @@ COMMAND_HANDLER(handle_nand_info_command)
if (ERROR_OK != retval)
return retval;
if (NULL == p->device)
{
if (NULL == p->device) {
command_print(CMD_CTX, "#%s: not probed", CMD_ARGV[0]);
return ERROR_OK;
}
@@ -101,11 +99,16 @@ COMMAND_HANDLER(handle_nand_info_command)
if (last >= p->num_blocks)
last = p->num_blocks - 1;
command_print(CMD_CTX, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
i++, p->device->name, p->manufacturer->name, p->page_size, p->bus_width, p->erase_size);
command_print(CMD_CTX,
"#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
i++,
p->device->name,
p->manufacturer->name,
p->page_size,
p->bus_width,
p->erase_size);
for (j = first; j <= last; j++)
{
for (j = first; j <= last; j++) {
char *erase_state, *bad_state;
if (p->blocks[j].is_erased == 0)
@@ -123,12 +126,12 @@ COMMAND_HANDLER(handle_nand_info_command)
bad_state = " (block condition unknown)";
command_print(CMD_CTX,
"\t#%i: 0x%8.8" PRIx32 " (%" PRId32 "kB) %s%s",
j,
p->blocks[j].offset,
p->blocks[j].size / 1024,
erase_state,
bad_state);
"\t#%i: 0x%8.8" PRIx32 " (%" PRId32 "kB) %s%s",
j,
p->blocks[j].offset,
p->blocks[j].size / 1024,
erase_state,
bad_state);
}
return ERROR_OK;
@@ -137,19 +140,17 @@ COMMAND_HANDLER(handle_nand_info_command)
COMMAND_HANDLER(handle_nand_probe_command)
{
if (CMD_ARGC != 1)
{
return ERROR_COMMAND_SYNTAX_ERROR;
}
struct nand_device *p;
int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
if (ERROR_OK != retval)
return retval;
if ((retval = nand_probe(p)) == ERROR_OK)
{
retval = nand_probe(p);
if (retval == ERROR_OK) {
command_print(CMD_CTX, "NAND flash device '%s (%s)' found",
p->device->name, p->manufacturer->name);
p->device->name, p->manufacturer->name);
}
return retval;
@@ -158,11 +159,8 @@ COMMAND_HANDLER(handle_nand_probe_command)
COMMAND_HANDLER(handle_nand_erase_command)
{
if (CMD_ARGC != 1 && CMD_ARGC != 3)
{
return ERROR_COMMAND_SYNTAX_ERROR;
}
struct nand_device *p;
int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
if (ERROR_OK != retval)
@@ -177,12 +175,12 @@ COMMAND_HANDLER(handle_nand_erase_command)
COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[1], offset);
if ((offset % p->erase_size) != 0 || offset >= size)
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[2], length);
if ((length == 0) || (length % p->erase_size) != 0
|| (length + offset) > size)
return ERROR_INVALID_ARGUMENTS;
|| (length + offset) > size)
return ERROR_COMMAND_SYNTAX_ERROR;
offset /= p->erase_size;
length /= p->erase_size;
@@ -192,12 +190,11 @@ COMMAND_HANDLER(handle_nand_erase_command)
}
retval = nand_erase(p, offset, offset + length - 1);
if (retval == ERROR_OK)
{
if (retval == ERROR_OK) {
command_print(CMD_CTX, "erased blocks %lu to %lu "
"on NAND flash device #%s '%s'",
offset, offset + length,
CMD_ARGV[0], p->device->name);
"on NAND flash device #%s '%s'",
offset, offset + length - 1,
CMD_ARGV[0], p->device->name);
}
return retval;
@@ -209,29 +206,25 @@ COMMAND_HANDLER(handle_nand_check_bad_blocks_command)
int last = -1;
if ((CMD_ARGC < 1) || (CMD_ARGC > 3) || (CMD_ARGC == 2))
{
return ERROR_COMMAND_SYNTAX_ERROR;
}
struct nand_device *p;
int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
if (ERROR_OK != retval)
return retval;
if (CMD_ARGC == 3)
{
if (CMD_ARGC == 3) {
unsigned long offset;
unsigned long length;
COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[1], offset);
if (offset % p->erase_size)
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
offset /= p->erase_size;
COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[2], length);
if (length % p->erase_size)
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
length -= 1;
length /= p->erase_size;
@@ -241,10 +234,9 @@ COMMAND_HANDLER(handle_nand_check_bad_blocks_command)
}
retval = nand_build_bbt(p, first, last);
if (retval == ERROR_OK)
{
if (retval == ERROR_OK) {
command_print(CMD_CTX, "checked NAND flash device for bad blocks, "
"use \"nand info\" command to list blocks");
"use \"nand info\" command to list blocks");
}
return retval;
@@ -260,11 +252,9 @@ COMMAND_HANDLER(handle_nand_write_command)
return retval;
uint32_t total_bytes = s.size;
while (s.size > 0)
{
while (s.size > 0) {
int bytes_read = nand_fileio_read(nand, &s);
if (bytes_read <= 0)
{
if (bytes_read <= 0) {
command_print(CMD_CTX, "error while reading file");
return nand_fileio_cleanup(&s);
}
@@ -272,8 +262,7 @@ COMMAND_HANDLER(handle_nand_write_command)
retval = nand_write_page(nand, s.address / nand->page_size,
s.page, s.page_size, s.oob, s.oob_size);
if (ERROR_OK != retval)
{
if (ERROR_OK != retval) {
command_print(CMD_CTX, "failed writing file %s "
"to NAND flash %s at offset 0x%8.8" PRIx32,
CMD_ARGV[1], CMD_ARGV[0], s.address);
@@ -282,12 +271,11 @@ COMMAND_HANDLER(handle_nand_write_command)
s.address += s.page_size;
}
if (nand_fileio_finish(&s))
{
if (nand_fileio_finish(&s) == ERROR_OK) {
command_print(CMD_CTX, "wrote file %s to NAND flash %s up to "
"offset 0x%8.8" PRIx32 " in %fs (%0.3f KiB/s)",
CMD_ARGV[1], CMD_ARGV[0], s.address, duration_elapsed(&s.bench),
duration_kbps(&s.bench, total_bytes));
"offset 0x%8.8" PRIx32 " in %fs (%0.3f KiB/s)",
CMD_ARGV[1], CMD_ARGV[0], s.address, duration_elapsed(&s.bench),
duration_kbps(&s.bench, total_bytes));
}
return ERROR_OK;
}
@@ -310,12 +298,10 @@ COMMAND_HANDLER(handle_nand_verify_command)
if (ERROR_OK != retval)
return retval;
while (file.size > 0)
{
while (file.size > 0) {
retval = nand_read_page(nand, dev.address / dev.page_size,
dev.page, dev.page_size, dev.oob, dev.oob_size);
if (ERROR_OK != retval)
{
if (ERROR_OK != retval) {
command_print(CMD_CTX, "reading NAND flash page failed");
nand_fileio_cleanup(&dev);
nand_fileio_cleanup(&file);
@@ -323,8 +309,7 @@ COMMAND_HANDLER(handle_nand_verify_command)
}
int bytes_read = nand_fileio_read(nand, &file);
if (bytes_read <= 0)
{
if (bytes_read <= 0) {
command_print(CMD_CTX, "error while reading file");
nand_fileio_cleanup(&dev);
nand_fileio_cleanup(&file);
@@ -332,10 +317,9 @@ COMMAND_HANDLER(handle_nand_verify_command)
}
if ((dev.page && memcmp(dev.page, file.page, dev.page_size)) ||
(dev.oob && memcmp(dev.oob, file.oob, dev.oob_size)) )
{
(dev.oob && memcmp(dev.oob, file.oob, dev.oob_size))) {
command_print(CMD_CTX, "NAND flash contents differ "
"at 0x%8.8" PRIx32, dev.address);
"at 0x%8.8" PRIx32, dev.address);
nand_fileio_cleanup(&dev);
nand_fileio_cleanup(&file);
return ERROR_FAIL;
@@ -345,12 +329,11 @@ COMMAND_HANDLER(handle_nand_verify_command)
dev.address += nand->page_size;
}
if (nand_fileio_finish(&file) == ERROR_OK)
{
if (nand_fileio_finish(&file) == ERROR_OK) {
command_print(CMD_CTX, "verified file %s in NAND flash %s "
"up to offset 0x%8.8" PRIx32 " in %fs (%0.3f KiB/s)",
CMD_ARGV[1], CMD_ARGV[0], dev.address, duration_elapsed(&file.bench),
duration_kbps(&file.bench, dev.size));
"up to offset 0x%8.8" PRIx32 " in %fs (%0.3f KiB/s)",
CMD_ARGV[1], CMD_ARGV[0], dev.address, duration_elapsed(&file.bench),
duration_kbps(&file.bench, dev.size));
}
return nand_fileio_cleanup(&dev);
@@ -366,13 +349,11 @@ COMMAND_HANDLER(handle_nand_dump_command)
if (ERROR_OK != retval)
return retval;
while (s.size > 0)
{
while (s.size > 0) {
size_t size_written;
retval = nand_read_page(nand, s.address / nand->page_size,
s.page, s.page_size, s.oob, s.oob_size);
if (ERROR_OK != retval)
{
if (ERROR_OK != retval) {
command_print(CMD_CTX, "reading NAND flash page failed");
nand_fileio_cleanup(&s);
return retval;
@@ -392,11 +373,10 @@ COMMAND_HANDLER(handle_nand_dump_command)
if (retval != ERROR_OK)
return retval;
if (nand_fileio_finish(&s) == ERROR_OK)
{
if (nand_fileio_finish(&s) == ERROR_OK) {
command_print(CMD_CTX, "dumped %ld bytes in %fs (%0.3f KiB/s)",
(long)filesize, duration_elapsed(&s.bench),
duration_kbps(&s.bench, filesize));
(long)filesize, duration_elapsed(&s.bench),
duration_kbps(&s.bench, filesize));
}
return ERROR_OK;
}
@@ -404,17 +384,14 @@ COMMAND_HANDLER(handle_nand_dump_command)
COMMAND_HANDLER(handle_nand_raw_access_command)
{
if ((CMD_ARGC < 1) || (CMD_ARGC > 2))
{
return ERROR_COMMAND_SYNTAX_ERROR;
}
struct nand_device *p;
int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
if (ERROR_OK != retval)
return retval;
if (NULL == p->device)
{
if (NULL == p->device) {
command_print(CMD_CTX, "#%s: not probed", CMD_ARGV[0]);
return ERROR_OK;
}
@@ -510,9 +487,8 @@ COMMAND_HANDLER(handle_nand_init_command)
if (CMD_ARGC != 0)
return ERROR_COMMAND_SYNTAX_ERROR;
static bool nand_initialized = false;
if (nand_initialized)
{
static bool nand_initialized;
if (nand_initialized) {
LOG_INFO("'nand init' has already been called");
return ERROR_OK;
}
@@ -536,33 +512,28 @@ COMMAND_HANDLER(handle_nand_list_drivers)
}
static COMMAND_HELPER(create_nand_device, const char *bank_name,
struct nand_flash_controller *controller)
struct nand_flash_controller *controller)
{
struct nand_device *c;
struct target *target;
int retval;
if (CMD_ARGC < 2)
{
LOG_ERROR("missing target");
return ERROR_COMMAND_ARGUMENT_INVALID;
}
return ERROR_COMMAND_SYNTAX_ERROR;
target = get_target(CMD_ARGV[1]);
if (!target) {
LOG_ERROR("invalid target %s", CMD_ARGV[1]);
return ERROR_COMMAND_ARGUMENT_INVALID;
}
if (NULL != controller->commands)
{
if (NULL != controller->commands) {
retval = register_commands(CMD_CTX, NULL,
controller->commands);
if (ERROR_OK != retval)
return retval;
}
c = malloc(sizeof(struct nand_device));
if (c == NULL)
{
if (c == NULL) {
LOG_ERROR("End of memory");
return ERROR_FAIL;
}
@@ -580,13 +551,17 @@ static COMMAND_HELPER(create_nand_device, const char *bank_name,
c->next = NULL;
retval = CALL_COMMAND_HANDLER(controller->nand_device_command, c);
if (ERROR_OK != retval)
{
LOG_ERROR("'%s' driver rejected nand flash", controller->name);
if (ERROR_OK != retval) {
LOG_ERROR("'%s' driver rejected nand flash. Usage: %s",
controller->name,
controller->usage);
free(c);
return ERROR_OK;
return retval;
}
if (controller->usage == NULL)
LOG_DEBUG("'%s' driver usage field missing", controller->name);
nand_device_add(c);
return ERROR_OK;
@@ -595,20 +570,16 @@ static COMMAND_HELPER(create_nand_device, const char *bank_name,
COMMAND_HANDLER(handle_nand_device_command)
{
if (CMD_ARGC < 2)
{
LOG_ERROR("incomplete nand device configuration");
return ERROR_FLASH_BANK_INVALID;
}
return ERROR_COMMAND_SYNTAX_ERROR;
// save name and increment (for compatibility) with drivers
/* save name and increment (for compatibility) with drivers */
const char *bank_name = *CMD_ARGV++;
CMD_ARGC--;
const char *driver_name = CMD_ARGV[0];
struct nand_flash_controller *controller;
controller = nand_driver_find_by_name(CMD_ARGV[0]);
if (NULL == controller)
{
if (NULL == controller) {
LOG_ERROR("No valid NAND flash driver found (%s)", driver_name);
return CALL_COMMAND_HANDLER(handle_nand_list_drivers);
}
@@ -628,20 +599,24 @@ static const struct command_registration nand_config_command_handlers[] = {
.handler = &handle_nand_list_drivers,
.mode = COMMAND_ANY,
.help = "lists available NAND drivers",
.usage = ""
},
{
.name = "init",
.mode = COMMAND_CONFIG,
.handler = &handle_nand_init_command,
.help = "initialize NAND devices",
.usage = ""
},
COMMAND_REGISTRATION_DONE
};
static const struct command_registration nand_command_handlers[] = {
{
.name = "nand",
.mode = COMMAND_ANY,
.help = "NAND flash command group",
.usage = "",
.chain = nand_config_command_handlers,
},
COMMAND_REGISTRATION_DONE
@@ -651,5 +626,3 @@ int nand_register_commands(struct command_context *cmd_ctx)
{
return register_commands(cmd_ctx, NULL, nand_command_handlers);
}

View File

@@ -9,31 +9,35 @@ libocdflashnor_la_SOURCES = \
NOR_DRIVERS = \
aduc702x.c \
at91sam4.c \
at91sam3.c \
at91sam7.c \
avrf.c \
cfi.c \
ecos.c \
efm32.c \
em357.c \
faux.c \
lpc2000.c \
lpc288x.c \
lpc2900.c \
lpcspifi.c \
non_cfi.c \
ocl.c \
pic32mx.c \
spi.c \
stmsmi.c \
stellaris.c \
stm32x.c \
stm32f2xxx.c \
stm32f1x.c \
stm32f2x.c \
stm32lx.c \
str7x.c \
str9x.c \
str9xpec.c \
tms470.c \
virtual.c
# Disabled for now, it generates warnings
# dsp5680xx_flash.c
virtual.c \
fm3.c \
dsp5680xx_flash.c \
kinetis.c
noinst_HEADERS = \
core.h \
@@ -41,6 +45,7 @@ noinst_HEADERS = \
driver.h \
imp.h \
non_cfi.h \
ocl.h
ocl.h \
spi.h
MAINTAINERCLEANFILES = $(srcdir)/Makefile.in

View File

@@ -29,60 +29,49 @@
#include <target/algorithm.h>
#include <target/arm.h>
static int aduc702x_build_sector_list(struct flash_bank *bank);
static int aduc702x_check_flash_completion(struct target* target, unsigned int timeout_ms);
static int aduc702x_check_flash_completion(struct target *target, unsigned int timeout_ms);
static int aduc702x_set_write_enable(struct target *target, int enable);
#define ADUC702x_FLASH 0xfffff800
#define ADUC702x_FLASH_FEESTA (0*4)
#define ADUC702x_FLASH_FEEMOD (1*4)
#define ADUC702x_FLASH_FEECON (2*4)
#define ADUC702x_FLASH_FEEDAT (3*4)
#define ADUC702x_FLASH_FEEADR (4*4)
#define ADUC702x_FLASH_FEESIGN (5*4)
#define ADUC702x_FLASH_FEEPRO (6*4)
#define ADUC702x_FLASH_FEEHIDE (7*4)
struct aduc702x_flash_bank {
struct working_area *write_algorithm;
};
#define ADUC702x_FLASH 0xfffff800
#define ADUC702x_FLASH_FEESTA (0*4)
#define ADUC702x_FLASH_FEEMOD (1*4)
#define ADUC702x_FLASH_FEECON (2*4)
#define ADUC702x_FLASH_FEEDAT (3*4)
#define ADUC702x_FLASH_FEEADR (4*4)
#define ADUC702x_FLASH_FEESIGN (5*4)
#define ADUC702x_FLASH_FEEPRO (6*4)
#define ADUC702x_FLASH_FEEHIDE (7*4)
/* flash bank aduc702x 0 0 0 0 <target#>
* The ADC7019-28 devices all have the same flash layout */
FLASH_BANK_COMMAND_HANDLER(aduc702x_flash_bank_command)
{
struct aduc702x_flash_bank *nbank;
bank->base = 0x80000;
bank->size = 0xF800; /* top 4k not accessible */
nbank = malloc(sizeof(struct aduc702x_flash_bank));
aduc702x_build_sector_list(bank);
bank->base = 0x80000;
bank->size = 0xF800; // top 4k not accessible
bank->driver_priv = nbank;
aduc702x_build_sector_list(bank);
return ERROR_OK;
return ERROR_OK;
}
static int aduc702x_build_sector_list(struct flash_bank *bank)
{
//aduc7026_struct flash_bank *aduc7026_info = bank->driver_priv;
/* aduc7026_struct flash_bank *aduc7026_info = bank->driver_priv; */
int i = 0;
uint32_t offset = 0;
int i = 0;
uint32_t offset = 0;
// sector size is 512
bank->num_sectors = bank->size / 512;
bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
for (i = 0; i < bank->num_sectors; ++i)
{
bank->sectors[i].offset = offset;
bank->sectors[i].size = 512;
offset += bank->sectors[i].size;
bank->sectors[i].is_erased = -1;
bank->sectors[i].is_protected = 0;
}
/* sector size is 512 */
bank->num_sectors = bank->size / 512;
bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
for (i = 0; i < bank->num_sectors; ++i) {
bank->sectors[i].offset = offset;
bank->sectors[i].size = 512;
offset += bank->sectors[i].size;
bank->sectors[i].is_erased = -1;
bank->sectors[i].is_protected = 0;
}
return ERROR_OK;
}
@@ -95,13 +84,13 @@ static int aduc702x_protect_check(struct flash_bank *bank)
static int aduc702x_erase(struct flash_bank *bank, int first, int last)
{
//int res;
/* int res; */
int x;
int count;
//uint32_t v;
/* uint32_t v; */
struct target *target = bank->target;
aduc702x_set_write_enable(target, 1);
aduc702x_set_write_enable(target, 1);
/* mass erase */
if (((first | last) == 0) || ((first == 0) && (last >= bank->num_sectors))) {
@@ -110,38 +99,35 @@ static int aduc702x_erase(struct flash_bank *bank, int first, int last)
target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, 0xffc3);
target_write_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x06);
if (aduc702x_check_flash_completion(target, 3500) != ERROR_OK)
{
if (aduc702x_check_flash_completion(target, 3500) != ERROR_OK) {
LOG_ERROR("mass erase failed");
aduc702x_set_write_enable(target, 0);
aduc702x_set_write_enable(target, 0);
return ERROR_FLASH_OPERATION_FAILED;
}
LOG_DEBUG("mass erase successful.");
return ERROR_OK;
} else {
unsigned long adr;
unsigned long adr;
count = last - first + 1;
for (x = 0; x < count; ++x)
{
adr = bank->base + ((first + x) * 512);
count = last - first + 1;
for (x = 0; x < count; ++x) {
adr = bank->base + ((first + x) * 512);
target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, adr);
target_write_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x05);
target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, adr);
target_write_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x05);
if (aduc702x_check_flash_completion(target, 50) != ERROR_OK)
{
LOG_ERROR("failed to erase sector at address 0x%08lX", adr);
aduc702x_set_write_enable(target, 0);
return ERROR_FLASH_SECTOR_NOT_ERASED;
}
if (aduc702x_check_flash_completion(target, 50) != ERROR_OK) {
LOG_ERROR("failed to erase sector at address 0x%08lX", adr);
aduc702x_set_write_enable(target, 0);
return ERROR_FLASH_SECTOR_NOT_ERASED;
}
LOG_DEBUG("erased sector at address 0x%08lX", adr);
}
}
LOG_DEBUG("erased sector at address 0x%08lX", adr);
}
}
aduc702x_set_write_enable(target, 0);
aduc702x_set_write_enable(target, 0);
return ERROR_OK;
}
@@ -157,93 +143,90 @@ static int aduc702x_protect(struct flash_bank *bank, int set, int first, int las
*
* Caller should not check for other return values specifically
*/
static int aduc702x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
static int aduc702x_write_block(struct flash_bank *bank,
uint8_t *buffer,
uint32_t offset,
uint32_t count)
{
struct aduc702x_flash_bank *aduc702x_info = bank->driver_priv;
struct target *target = bank->target;
uint32_t buffer_size = 7000;
struct working_area *write_algorithm;
struct working_area *source;
uint32_t address = bank->base + offset;
struct reg_param reg_params[6];
struct arm_algorithm armv4_5_info;
struct arm_algorithm arm_algo;
int retval = ERROR_OK;
if (((count%2)!=0)||((offset%2)!=0))
{
if (((count%2) != 0) || ((offset%2) != 0)) {
LOG_ERROR("write block must be multiple of two bytes in offset & length");
return ERROR_FAIL;
}
/* parameters:
/* parameters:
r0 - address of source data (absolute)
r1 - number of halfwords to be copied
r2 - start address in flash (offset from beginning of flash memory)
r3 - exit code
r4 - base address of flash controller (0xFFFFF800)
r0 - address of source data (absolute)
r1 - number of halfwords to be copied
r2 - start address in flash (offset from beginning of flash memory)
r3 - exit code
r4 - base address of flash controller (0xFFFFF800)
registers:
registers:
r5 - scratch
r6 - set to 2, used to write flash command
r5 - scratch
r6 - set to 2, used to write flash command
*/
static const uint32_t aduc702x_flash_write_code[] = {
//<_start>:
0xe3a05008, // mov r5, #8 ; 0x8
0xe5845004, // str r5, [r4, #4]
0xe3a06002, // mov r6, #2 ; 0x2
//<next>:
0xe1c421b0, // strh r2, [r4, #16]
0xe0d050b2, // ldrh r5, [r0], #2
0xe1c450bc, // strh r5, [r4, #12]
0xe5c46008, // strb r6, [r4, #8]
//<wait_complete>:
0xe1d430b0, // ldrh r3, [r4]
0xe3130004, // tst r3, #4 ; 0x4
0x1afffffc, // bne 1001c <wait_complete>
0xe2822002, // add r2, r2, #2 ; 0x2
0xe2511001, // subs r1, r1, #1 ; 0x1
0x0a000001, // beq 1003c <done>
0xe3130001, // tst r3, #1 ; 0x1
0x1afffff3, // bne 1000c <next>
//<done>:
0xeafffffe // b 1003c <done>
*/
static const uint32_t aduc702x_flash_write_code[] = {
/* <_start>: */
0xe3a05008, /* mov r5, #8 ; 0x8 */
0xe5845004, /* str r5, [r4, #4] */
0xe3a06002, /* mov r6, #2 ; 0x2 */
/* <next>: */
0xe1c421b0, /* strh r2, [r4, #16] */
0xe0d050b2, /* ldrh r5, [r0], #2 */
0xe1c450bc, /* strh r5, [r4, #12] */
0xe5c46008, /* strb r6, [r4, #8] */
/* <wait_complete>: */
0xe1d430b0, /* ldrh r3, [r4] */
0xe3130004, /* tst r3, #4 ; 0x4 */
0x1afffffc, /* bne 1001c <wait_complete> */
0xe2822002, /* add r2, r2, #2 ; 0x2 */
0xe2511001, /* subs r1, r1, #1 ; 0x1 */
0x0a000001, /* beq 1003c <done> */
0xe3130001, /* tst r3, #1 ; 0x1 */
0x1afffff3, /* bne 1000c <next> */
/* <done>: */
0xeafffffe /* b 1003c <done> */
};
/* flash write code */
if (target_alloc_working_area(target, sizeof(aduc702x_flash_write_code),
&aduc702x_info->write_algorithm) != ERROR_OK)
{
&write_algorithm) != ERROR_OK) {
LOG_WARNING("no working area available, can't do block memory writes");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
};
retval=target_write_buffer(target, aduc702x_info->write_algorithm->address,
sizeof(aduc702x_flash_write_code), (uint8_t*)aduc702x_flash_write_code);
if (retval!=ERROR_OK)
{
return retval;
}
retval = target_write_buffer(target, write_algorithm->address,
sizeof(aduc702x_flash_write_code), (uint8_t *)aduc702x_flash_write_code);
if (retval != ERROR_OK)
return retval;
/* memory buffer */
while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK)
{
while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) {
buffer_size /= 2;
if (buffer_size <= 256)
{
/* if we already allocated the writing code, but failed to get a buffer, free the algorithm */
if (aduc702x_info->write_algorithm)
target_free_working_area(target, aduc702x_info->write_algorithm);
if (buffer_size <= 256) {
/* we already allocated the writing code, but failed to get a buffer,
*free the algorithm */
target_free_working_area(target, write_algorithm);
LOG_WARNING("no large enough working area available, can't do block memory writes");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
}
armv4_5_info.common_magic = ARM_COMMON_MAGIC;
armv4_5_info.core_mode = ARM_MODE_SVC;
armv4_5_info.core_state = ARM_STATE_ARM;
arm_algo.common_magic = ARM_COMMON_MAGIC;
arm_algo.core_mode = ARM_MODE_SVC;
arm_algo.core_state = ARM_STATE_ARM;
init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT);
init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);
@@ -251,32 +234,29 @@ static int aduc702x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32
init_reg_param(&reg_params[3], "r3", 32, PARAM_IN);
init_reg_param(&reg_params[4], "r4", 32, PARAM_OUT);
while (count > 0)
{
while (count > 0) {
uint32_t thisrun_count = (count > buffer_size) ? buffer_size : count;
retval=target_write_buffer(target, source->address, thisrun_count, buffer);
if (retval!=ERROR_OK)
{
retval = target_write_buffer(target, source->address, thisrun_count, buffer);
if (retval != ERROR_OK)
break;
}
buf_set_u32(reg_params[0].value, 0, 32, source->address);
buf_set_u32(reg_params[1].value, 0, 32, thisrun_count/2);
buf_set_u32(reg_params[2].value, 0, 32, address);
buf_set_u32(reg_params[4].value, 0, 32, 0xFFFFF800);
if ((retval = target_run_algorithm(target, 0, NULL, 5,
reg_params, aduc702x_info->write_algorithm->address,
aduc702x_info->write_algorithm->address + sizeof(aduc702x_flash_write_code) - 4,
10000, &armv4_5_info)) != ERROR_OK)
{
retval = target_run_algorithm(target, 0, NULL, 5,
reg_params, write_algorithm->address,
write_algorithm->address +
sizeof(aduc702x_flash_write_code) - 4,
10000, &arm_algo);
if (retval != ERROR_OK) {
LOG_ERROR("error executing aduc702x flash write algorithm");
break;
}
if ((buf_get_u32(reg_params[3].value, 0, 32) & 1) != 1)
{
if ((buf_get_u32(reg_params[3].value, 0, 32) & 1) != 1) {
/* FIX!!!! what does this mean??? replace w/sensible error message */
LOG_ERROR("aduc702x detected error writing flash");
retval = ERROR_FAIL;
@@ -289,7 +269,7 @@ static int aduc702x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32
}
target_free_working_area(target, source);
target_free_working_area(target, aduc702x_info->write_algorithm);
target_free_working_area(target, write_algorithm);
destroy_reg_param(&reg_params[0]);
destroy_reg_param(&reg_params[1]);
@@ -302,43 +282,44 @@ static int aduc702x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32
/* All-JTAG, single-access method. Very slow. Used only if there is no
* working area available. */
static int aduc702x_write_single(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
static int aduc702x_write_single(struct flash_bank *bank,
uint8_t *buffer,
uint32_t offset,
uint32_t count)
{
uint32_t x;
uint8_t b;
uint8_t b;
struct target *target = bank->target;
aduc702x_set_write_enable(target, 1);
aduc702x_set_write_enable(target, 1);
for (x = 0; x < count; x += 2) {
// FEEADR = address
/* FEEADR = address */
target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, offset + x);
// set up data
if ((x + 1) == count)
{
// last byte
target_read_u8(target, offset + x + 1, &b);
}
else
b = buffer[x + 1];
/* set up data */
if ((x + 1) == count) {
/* last byte */
target_read_u8(target, offset + x + 1, &b);
} else
b = buffer[x + 1];
target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEDAT, buffer[x] | (b << 8));
target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEDAT, buffer[x] | (b << 8));
// do single-write command
/* do single-write command */
target_write_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x02);
if (aduc702x_check_flash_completion(target, 1) != ERROR_OK)
{
LOG_ERROR("single write failed for address 0x%08lX", (unsigned long)(offset + x));
aduc702x_set_write_enable(target, 0);
if (aduc702x_check_flash_completion(target, 1) != ERROR_OK) {
LOG_ERROR("single write failed for address 0x%08lX",
(unsigned long)(offset + x));
aduc702x_set_write_enable(target, 0);
return ERROR_FLASH_OPERATION_FAILED;
}
}
LOG_DEBUG("wrote %d bytes at address 0x%08lX", (int)count, (unsigned long)(offset + x));
LOG_DEBUG("wrote %d bytes at address 0x%08lX", (int)count, (unsigned long)(offset + x));
aduc702x_set_write_enable(target, 0);
aduc702x_set_write_enable(target, 0);
return ERROR_OK;
}
@@ -347,24 +328,23 @@ static int aduc702x_write(struct flash_bank *bank, uint8_t *buffer, uint32_t off
{
int retval;
/* try using a block write */
if ((retval = aduc702x_write_block(bank, buffer, offset, count)) != ERROR_OK)
{
if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE)
{
/* if block write failed (no sufficient working area),
* use normal (slow) JTAG method */
LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
/* try using a block write */
retval = aduc702x_write_block(bank, buffer, offset, count);
if (retval != ERROR_OK) {
if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
/* if block write failed (no sufficient working area),
* use normal (slow) JTAG method */
LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
if ((retval = aduc702x_write_single(bank, buffer, offset, count)) != ERROR_OK)
{
LOG_ERROR("slow write failed");
return ERROR_FLASH_OPERATION_FAILED;
}
}
}
retval = aduc702x_write_single(bank, buffer, offset, count);
if (retval != ERROR_OK) {
LOG_ERROR("slow write failed");
return ERROR_FLASH_OPERATION_FAILED;
}
}
}
return retval;
return retval;
}
static int aduc702x_probe(struct flash_bank *bank)
@@ -382,10 +362,10 @@ static int aduc702x_info(struct flash_bank *bank, char *buf, int buf_size)
* enable = 1 enables writes & erases, 0 disables them */
static int aduc702x_set_write_enable(struct target *target, int enable)
{
// don't bother to preserve int enable bit here
target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEMOD, enable ? 8 : 0);
/* don't bother to preserve int enable bit here */
target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEMOD, enable ? 8 : 0);
return ERROR_OK;
return ERROR_OK;
}
/* wait up to timeout_ms for controller to not be busy,
@@ -393,22 +373,27 @@ static int aduc702x_set_write_enable(struct target *target, int enable)
*
* this function sleeps 1ms between checks (after the first one),
* so in some cases may slow things down without a usleep after the first read */
static int aduc702x_check_flash_completion(struct target* target, unsigned int timeout_ms)
static int aduc702x_check_flash_completion(struct target *target, unsigned int timeout_ms)
{
uint8_t v = 4;
uint8_t v = 4;
long long endtime = timeval_ms() + timeout_ms;
while (1) {
target_read_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEESTA, &v);
if ((v & 4) == 0) break;
alive_sleep(1);
if (timeval_ms() >= endtime) break;
}
long long endtime = timeval_ms() + timeout_ms;
while (1) {
target_read_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEESTA, &v);
if ((v & 4) == 0)
break;
alive_sleep(1);
if (timeval_ms() >= endtime)
break;
}
if (v & 2) return ERROR_FAIL;
// if a command is ignored, both the success and fail bits may be 0
else if ((v & 3) == 0) return ERROR_FAIL;
else return ERROR_OK;
if (v & 2)
return ERROR_FAIL;
/* if a command is ignored, both the success and fail bits may be 0 */
else if ((v & 3) == 0)
return ERROR_FAIL;
else
return ERROR_OK;
}
struct flash_driver aduc702x_flash = {

File diff suppressed because it is too large Load Diff

2380
src/flash/nor/at91sam4.c Normal file

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

View File

@@ -17,6 +17,7 @@
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
@@ -24,33 +25,31 @@
#include "imp.h"
#include <target/avrt.h>
/* AVR_JTAG_Instructions */
#define AVR_JTAG_INS_LEN 4
// Public Instructions:
#define AVR_JTAG_INS_EXTEST 0x00
#define AVR_JTAG_INS_IDCODE 0x01
#define AVR_JTAG_INS_SAMPLE_PRELOAD 0x02
#define AVR_JTAG_INS_BYPASS 0x0F
// AVR Specified Public Instructions:
#define AVR_JTAG_INS_AVR_RESET 0x0C
#define AVR_JTAG_INS_PROG_ENABLE 0x04
#define AVR_JTAG_INS_PROG_COMMANDS 0x05
#define AVR_JTAG_INS_PROG_PAGELOAD 0x06
#define AVR_JTAG_INS_PROG_PAGEREAD 0x07
#define AVR_JTAG_INS_LEN 4
/* Public Instructions: */
#define AVR_JTAG_INS_EXTEST 0x00
#define AVR_JTAG_INS_IDCODE 0x01
#define AVR_JTAG_INS_SAMPLE_PRELOAD 0x02
#define AVR_JTAG_INS_BYPASS 0x0F
/* AVR Specified Public Instructions: */
#define AVR_JTAG_INS_AVR_RESET 0x0C
#define AVR_JTAG_INS_PROG_ENABLE 0x04
#define AVR_JTAG_INS_PROG_COMMANDS 0x05
#define AVR_JTAG_INS_PROG_PAGELOAD 0x06
#define AVR_JTAG_INS_PROG_PAGEREAD 0x07
// Data Registers:
#define AVR_JTAG_REG_Bypass_Len 1
#define AVR_JTAG_REG_DeviceID_Len 32
/* Data Registers: */
#define AVR_JTAG_REG_Bypass_Len 1
#define AVR_JTAG_REG_DeviceID_Len 32
#define AVR_JTAG_REG_Reset_Len 1
#define AVR_JTAG_REG_JTAGID_Len 32
#define AVR_JTAG_REG_ProgrammingEnable_Len 16
#define AVR_JTAG_REG_ProgrammingCommand_Len 15
#define AVR_JTAG_REG_FlashDataByte_Len 16
#define AVR_JTAG_REG_Reset_Len 1
#define AVR_JTAG_REG_JTAGID_Len 32
#define AVR_JTAG_REG_ProgrammingEnable_Len 16
#define AVR_JTAG_REG_ProgrammingCommand_Len 15
#define AVR_JTAG_REG_FlashDataByte_Len 16
struct avrf_type
{
struct avrf_type {
char name[15];
uint16_t chip_id;
int flash_page_size;
@@ -59,26 +58,24 @@ struct avrf_type
int eeprom_page_num;
};
struct avrf_flash_bank
{
struct avrf_flash_bank {
int ppage_size;
int probed;
};
static struct avrf_type avft_chips_info[] =
{
static struct avrf_type avft_chips_info[] = {
/* name, chip_id, flash_page_size, flash_page_num,
* eeprom_page_size, eeprom_page_num
*/
{"atmega128", 0x9702, 256, 512, 8, 512},
{"at90can128", 0x9781, 256, 512, 8, 512},
{"atmega128", 0x9702, 256, 512, 8, 512},
{"at90can128", 0x9781, 256, 512, 8, 512},
};
/* avr program functions */
static int avr_jtag_reset(struct avr_common *avr, uint32_t reset)
{
avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_AVR_RESET);
avr_jtag_senddat(avr->jtag_info.tap, NULL, reset ,AVR_JTAG_REG_Reset_Len);
avr_jtag_senddat(avr->jtag_info.tap, NULL, reset, AVR_JTAG_REG_Reset_Len);
return ERROR_OK;
}
@@ -127,42 +124,48 @@ static int avr_jtagprg_chiperase(struct avr_common *avr)
do {
poll_value = 0;
avr_jtag_senddat(avr->jtag_info.tap, &poll_value, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
avr_jtag_senddat(avr->jtag_info.tap,
&poll_value,
0x3380,
AVR_JTAG_REG_ProgrammingCommand_Len);
if (ERROR_OK != mcu_execute_queue())
{
return ERROR_FAIL;
}
LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value);
} while (!(poll_value & 0x0200));
return ERROR_OK;
}
static int avr_jtagprg_writeflashpage(struct avr_common *avr, uint8_t *page_buf, uint32_t buf_size, uint32_t addr, uint32_t page_size)
static int avr_jtagprg_writeflashpage(struct avr_common *avr,
uint8_t *page_buf,
uint32_t buf_size,
uint32_t addr,
uint32_t page_size)
{
uint32_t i, poll_value;
avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2310, AVR_JTAG_REG_ProgrammingCommand_Len);
// load addr high byte
avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x0700 | ((addr >> 9) & 0xFF), AVR_JTAG_REG_ProgrammingCommand_Len);
/* load addr high byte */
avr_jtag_senddat(avr->jtag_info.tap,
NULL,
0x0700 | ((addr >> 9) & 0xFF),
AVR_JTAG_REG_ProgrammingCommand_Len);
// load addr low byte
avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x0300 | ((addr >> 1) & 0xFF), AVR_JTAG_REG_ProgrammingCommand_Len);
/* load addr low byte */
avr_jtag_senddat(avr->jtag_info.tap,
NULL,
0x0300 | ((addr >> 1) & 0xFF),
AVR_JTAG_REG_ProgrammingCommand_Len);
avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_PAGELOAD);
for (i = 0; i < page_size; i++)
{
for (i = 0; i < page_size; i++) {
if (i < buf_size)
{
avr_jtag_senddat(avr->jtag_info.tap, NULL, page_buf[i], 8);
}
else
{
avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xFF, 8);
}
}
avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
@@ -174,11 +177,12 @@ static int avr_jtagprg_writeflashpage(struct avr_common *avr, uint8_t *page_buf,
do {
poll_value = 0;
avr_jtag_senddat(avr->jtag_info.tap, &poll_value, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
avr_jtag_senddat(avr->jtag_info.tap,
&poll_value,
0x3700,
AVR_JTAG_REG_ProgrammingCommand_Len);
if (ERROR_OK != mcu_execute_queue())
{
return ERROR_FAIL;
}
LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value);
} while (!(poll_value & 0x0200));
@@ -190,10 +194,7 @@ FLASH_BANK_COMMAND_HANDLER(avrf_flash_bank_command)
struct avrf_flash_bank *avrf_info;
if (CMD_ARGC < 6)
{
LOG_WARNING("incomplete flash_bank avr configuration");
return ERROR_FLASH_BANK_INVALID;
}
return ERROR_COMMAND_SYNTAX_ERROR;
avrf_info = malloc(sizeof(struct avrf_flash_bank));
bank->driver_priv = avrf_info;
@@ -209,10 +210,9 @@ static int avrf_erase(struct flash_bank *bank, int first, int last)
struct avr_common *avr = target->arch_info;
int status;
LOG_DEBUG("%s", __FUNCTION__);
LOG_DEBUG("%s", __func__);
if (target->state != TARGET_HALTED)
{
if (target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@@ -230,7 +230,7 @@ static int avrf_erase(struct flash_bank *bank, int first, int last)
static int avrf_protect(struct flash_bank *bank, int set, int first, int last)
{
LOG_INFO("%s", __FUNCTION__);
LOG_INFO("%s", __func__);
return ERROR_OK;
}
@@ -240,16 +240,16 @@ static int avrf_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset,
struct avr_common *avr = target->arch_info;
uint32_t cur_size, cur_buffer_size, page_size;
if (bank->target->state != TARGET_HALTED)
{
if (bank->target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
page_size = bank->sectors[0].size;
if ((offset % page_size) != 0)
{
LOG_WARNING("offset 0x%" PRIx32 " breaks required %" PRIu32 "-byte alignment", offset, page_size);
if ((offset % page_size) != 0) {
LOG_WARNING("offset 0x%" PRIx32 " breaks required %" PRIu32 "-byte alignment",
offset,
page_size);
return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
}
@@ -257,22 +257,19 @@ static int avrf_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset,
LOG_DEBUG("count is %" PRId32 "", count);
if (ERROR_OK != avr_jtagprg_enterprogmode(avr))
{
return ERROR_FAIL;
}
cur_size = 0;
while (count > 0)
{
while (count > 0) {
if (count > page_size)
{
cur_buffer_size = page_size;
}
else
{
cur_buffer_size = count;
}
avr_jtagprg_writeflashpage(avr, buffer + cur_size, cur_buffer_size, offset + cur_size, page_size);
avr_jtagprg_writeflashpage(avr,
buffer + cur_size,
cur_buffer_size,
offset + cur_size,
page_size);
count -= cur_buffer_size;
cur_size += cur_buffer_size;
@@ -285,6 +282,7 @@ static int avrf_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset,
#define EXTRACT_MFG(X) (((X) & 0xffe) >> 1)
#define EXTRACT_PART(X) (((X) & 0xffff000) >> 12)
#define EXTRACT_VER(X) (((X) & 0xf0000000) >> 28)
static int avrf_probe(struct flash_bank *bank)
{
struct target *target = bank->target;
@@ -294,8 +292,7 @@ static int avrf_probe(struct flash_bank *bank)
int i;
uint32_t device_id;
if (bank->target->state != TARGET_HALTED)
{
if (bank->target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@@ -304,42 +301,35 @@ static int avrf_probe(struct flash_bank *bank)
avr_jtag_read_jtagid(avr, &device_id);
if (ERROR_OK != mcu_execute_queue())
{
return ERROR_FAIL;
}
LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
if (EXTRACT_MFG(device_id) != 0x1F)
{
LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected", EXTRACT_MFG(device_id), 0x1F);
}
LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected",
EXTRACT_MFG(device_id),
0x1F);
for (i = 0; i < (int)ARRAY_SIZE(avft_chips_info); i++)
{
if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id))
{
for (i = 0; i < (int)ARRAY_SIZE(avft_chips_info); i++) {
if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id)) {
avr_info = &avft_chips_info[i];
LOG_INFO("target device is %s", avr_info->name);
break;
}
}
if (avr_info != NULL)
{
if (bank->sectors)
{
if (avr_info != NULL) {
if (bank->sectors) {
free(bank->sectors);
bank->sectors = NULL;
}
// chip found
/* chip found */
bank->base = 0x00000000;
bank->size = (avr_info->flash_page_size * avr_info->flash_page_num);
bank->num_sectors = avr_info->flash_page_num;
bank->sectors = malloc(sizeof(struct flash_sector) * avr_info->flash_page_num);
for (i = 0; i < avr_info->flash_page_num; i++)
{
for (i = 0; i < avr_info->flash_page_num; i++) {
bank->sectors[i].offset = i * avr_info->flash_page_size;
bank->sectors[i].size = avr_info->flash_page_size;
bank->sectors[i].is_erased = -1;
@@ -348,10 +338,8 @@ static int avrf_probe(struct flash_bank *bank)
avrf_info->probed = 1;
return ERROR_OK;
}
else
{
// chip not supported
} else {
/* chip not supported */
LOG_ERROR("0x%" PRIx32 " is not support for avr", EXTRACT_PART(device_id));
avrf_info->probed = 1;
@@ -369,7 +357,7 @@ static int avrf_auto_probe(struct flash_bank *bank)
static int avrf_protect_check(struct flash_bank *bank)
{
LOG_INFO("%s", __FUNCTION__);
LOG_INFO("%s", __func__);
return ERROR_OK;
}
@@ -381,28 +369,23 @@ static int avrf_info(struct flash_bank *bank, char *buf, int buf_size)
int i;
uint32_t device_id;
if (bank->target->state != TARGET_HALTED)
{
if (bank->target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
avr_jtag_read_jtagid(avr, &device_id);
if (ERROR_OK != mcu_execute_queue())
{
return ERROR_FAIL;
}
LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
if (EXTRACT_MFG(device_id) != 0x1F)
{
LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected", EXTRACT_MFG(device_id), 0x1F);
}
LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected",
EXTRACT_MFG(device_id),
0x1F);
for (i = 0; i < (int)ARRAY_SIZE(avft_chips_info); i++)
{
if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id))
{
for (i = 0; i < (int)ARRAY_SIZE(avft_chips_info); i++) {
if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id)) {
avr_info = &avft_chips_info[i];
LOG_INFO("target device is %s", avr_info->name);
@@ -410,15 +393,13 @@ static int avrf_info(struct flash_bank *bank, char *buf, int buf_size)
}
}
if (avr_info != NULL)
{
// chip found
snprintf(buf, buf_size, "%s - Rev: 0x%" PRIx32 "", avr_info->name, EXTRACT_VER(device_id));
if (avr_info != NULL) {
/* chip found */
snprintf(buf, buf_size, "%s - Rev: 0x%" PRIx32 "", avr_info->name,
EXTRACT_VER(device_id));
return ERROR_OK;
}
else
{
// chip not supported
} else {
/* chip not supported */
snprintf(buf, buf_size, "Cannot identify target as a avr\n");
return ERROR_FLASH_OPERATION_FAILED;
}
@@ -429,18 +410,15 @@ static int avrf_mass_erase(struct flash_bank *bank)
struct target *target = bank->target;
struct avr_common *avr = target->arch_info;
if (target->state != TARGET_HALTED)
{
if (target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
if ((ERROR_OK != avr_jtagprg_enterprogmode(avr))
|| (ERROR_OK != avr_jtagprg_chiperase(avr))
|| (ERROR_OK != avr_jtagprg_leaveprogmode(avr)))
{
|| (ERROR_OK != avr_jtagprg_chiperase(avr))
|| (ERROR_OK != avr_jtagprg_leaveprogmode(avr)))
return ERROR_FAIL;
}
return ERROR_OK;
}
@@ -450,38 +428,30 @@ COMMAND_HANDLER(avrf_handle_mass_erase_command)
int i;
if (CMD_ARGC < 1)
{
command_print(CMD_CTX, "avr mass_erase <bank>");
return ERROR_OK;
}
return ERROR_COMMAND_SYNTAX_ERROR;
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
return retval;
if (avrf_mass_erase(bank) == ERROR_OK)
{
if (avrf_mass_erase(bank) == ERROR_OK) {
/* set all sectors as erased */
for (i = 0; i < bank->num_sectors; i++)
{
bank->sectors[i].is_erased = 1;
}
command_print(CMD_CTX, "avr mass erase complete");
}
else
{
} else
command_print(CMD_CTX, "avr mass erase failed");
}
LOG_DEBUG("%s", __FUNCTION__);
LOG_DEBUG("%s", __func__);
return ERROR_OK;
}
static const struct command_registration avrf_exec_command_handlers[] = {
{
.name = "mass_erase",
.usage = "<bank>",
.handler = avrf_handle_mass_erase_command,
.mode = COMMAND_EXEC,
.help = "erase entire device",
@@ -493,6 +463,7 @@ static const struct command_registration avrf_command_handlers[] = {
.name = "avrf",
.mode = COMMAND_ANY,
.help = "AVR flash command group",
.usage = "",
.chain = avrf_exec_command_handlers,
},
COMMAND_REGISTRATION_DONE
@@ -508,7 +479,7 @@ struct flash_driver avr_flash = {
.read = default_flash_read,
.probe = avrf_probe,
.auto_probe = avrf_auto_probe,
.erase_check = default_flash_mem_blank_check,
.erase_check = default_flash_blank_check,
.protect_check = avrf_protect_check,
.info = avrf_info,
};

File diff suppressed because it is too large Load Diff

View File

@@ -17,16 +17,14 @@
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
#ifndef CFI_H
#define CFI_H
#define CFI_STATUS_POLL_MASK_DQ5_DQ6_DQ7 0xE0 /* DQ5..DQ7 */
#define CFI_STATUS_POLL_MASK_DQ6_DQ7 0xC0 /* DQ6..DQ7 */
struct cfi_flash_bank
{
struct working_area *write_algorithm;
struct cfi_flash_bank {
int x16_as_x8;
int jedec_probe;
int not_cfi;
@@ -80,8 +78,7 @@ struct cfi_flash_bank
* as defined for the Advanced+ Boot Block Flash Memory (C3)
* and used by the linux kernel cfi driver (as of 2.6.14)
*/
struct cfi_intel_pri_ext
{
struct cfi_intel_pri_ext {
uint8_t pri[3];
uint8_t major_version;
uint8_t minor_version;
@@ -100,8 +97,7 @@ struct cfi_intel_pri_ext
/* Spansion primary extended query table as defined for and used by
* the linux kernel cfi driver (as of 2.6.15)
*/
struct cfi_spansion_pri_ext
{
struct cfi_spansion_pri_ext {
uint8_t pri[3];
uint8_t major_version;
uint8_t minor_version;
@@ -124,8 +120,7 @@ struct cfi_spansion_pri_ext
/* Atmel primary extended query table as defined for and used by
* the linux kernel cfi driver (as of 2.6.20+)
*/
struct cfi_atmel_pri_ext
{
struct cfi_atmel_pri_ext {
uint8_t pri[3];
uint8_t major_version;
uint8_t minor_version;
@@ -140,14 +135,12 @@ enum {
CFI_UNLOCK_5555_2AAA,
};
struct cfi_unlock_addresses
{
struct cfi_unlock_addresses {
uint32_t unlock1;
uint32_t unlock2;
};
struct cfi_fixup
{
struct cfi_fixup {
uint16_t mfr;
uint16_t id;
void (*fixup)(struct flash_bank *bank, void *param);
@@ -161,6 +154,7 @@ struct cfi_fixup
#define CFI_MFR_AMIC 0x0037
#define CFI_MFR_SST 0x00BF
#define CFI_MFR_MX 0x00C2
#define CFI_MFR_EON 0x007F
#define CFI_MFR_ANY 0xffff
#define CFI_ID_ANY 0xffff

View File

@@ -29,7 +29,6 @@
#include <flash/nor/imp.h>
#include <target/image.h>
/**
* @file
* Upper level of NOR flash framework.
@@ -45,9 +44,7 @@ int flash_driver_erase(struct flash_bank *bank, int first, int last)
retval = bank->driver->erase(bank, first, last);
if (retval != ERROR_OK)
{
LOG_ERROR("failed erasing sectors %d to %d", first, last);
}
return retval;
}
@@ -57,8 +54,7 @@ int flash_driver_protect(struct flash_bank *bank, int set, int first, int last)
int retval;
/* callers may not supply illegal parameters ... */
if (first < 0 || first > last || last >= bank->num_sectors)
{
if (first < 0 || first > last || last >= bank->num_sectors) {
LOG_ERROR("illegal sector range");
return ERROR_FAIL;
}
@@ -79,47 +75,47 @@ int flash_driver_protect(struct flash_bank *bank, int set, int first, int last)
*/
retval = bank->driver->protect(bank, set, first, last);
if (retval != ERROR_OK)
{
LOG_ERROR("failed setting protection for areas %d to %d", first, last);
}
return retval;
}
int flash_driver_write(struct flash_bank *bank,
uint8_t *buffer, uint32_t offset, uint32_t count)
uint8_t *buffer, uint32_t offset, uint32_t count)
{
int retval;
retval = bank->driver->write(bank, buffer, offset, count);
if (retval != ERROR_OK)
{
LOG_ERROR("error writing to flash at address 0x%08" PRIx32 " at offset 0x%8.8" PRIx32,
bank->base, offset);
if (retval != ERROR_OK) {
LOG_ERROR(
"error writing to flash at address 0x%08" PRIx32 " at offset 0x%8.8" PRIx32,
bank->base,
offset);
}
return retval;
}
int flash_driver_read(struct flash_bank *bank,
uint8_t *buffer, uint32_t offset, uint32_t count)
uint8_t *buffer, uint32_t offset, uint32_t count)
{
int retval;
LOG_DEBUG("call flash_driver_read()");
retval = bank->driver->read(bank, buffer, offset, count);
if (retval != ERROR_OK)
{
LOG_ERROR("error reading to flash at address 0x%08" PRIx32 " at offset 0x%8.8" PRIx32,
bank->base, offset);
if (retval != ERROR_OK) {
LOG_ERROR(
"error reading to flash at address 0x%08" PRIx32 " at offset 0x%8.8" PRIx32,
bank->base,
offset);
}
return retval;
}
int default_flash_read(struct flash_bank *bank,
uint8_t *buffer, uint32_t offset, uint32_t count)
uint8_t *buffer, uint32_t offset, uint32_t count)
{
return target_read_buffer(bank->target, offset + bank->base, count, buffer);
}
@@ -128,19 +124,16 @@ void flash_bank_add(struct flash_bank *bank)
{
/* put flash bank in linked list */
unsigned bank_num = 0;
if (flash_banks)
{
if (flash_banks) {
/* find last flash bank */
struct flash_bank *p = flash_banks;
while (NULL != p->next)
{
while (NULL != p->next) {
bank_num += 1;
p = p->next;
}
p->next = bank;
bank_num += 1;
}
else
} else
flash_banks = bank;
bank->bank_number = bank_num;
@@ -156,12 +149,9 @@ struct flash_bank *get_flash_bank_by_num_noprobe(int num)
struct flash_bank *p;
int i = 0;
for (p = flash_banks; p; p = p->next)
{
for (p = flash_banks; p; p = p->next) {
if (i++ == num)
{
return p;
}
}
LOG_ERROR("flash bank %d does not exist", num);
return NULL;
@@ -172,9 +162,7 @@ int flash_get_bank_count(void)
struct flash_bank *p;
int i = 0;
for (p = flash_banks; p; p = p->next)
{
i++;
}
return i;
}
@@ -184,8 +172,7 @@ struct flash_bank *get_flash_bank_by_name_noprobe(const char *name)
unsigned found = 0;
struct flash_bank *bank;
for (bank = flash_banks; NULL != bank; bank = bank->next)
{
for (bank = flash_banks; NULL != bank; bank = bank->next) {
if (strcmp(bank->name, name) == 0)
return bank;
if (!flash_driver_name_matches(bank->driver->name, name))
@@ -203,12 +190,10 @@ int get_flash_bank_by_name(const char *name, struct flash_bank **bank_result)
int retval;
bank = get_flash_bank_by_name_noprobe(name);
if (bank != NULL)
{
if (bank != NULL) {
retval = bank->driver->auto_probe(bank);
if (retval != ERROR_OK)
{
if (retval != ERROR_OK) {
LOG_ERROR("auto_probe failed");
return retval;
}
@@ -224,14 +209,11 @@ int get_flash_bank_by_num(int num, struct flash_bank **bank)
int retval;
if (p == NULL)
{
return ERROR_FAIL;
}
retval = p->driver->auto_probe(p);
if (retval != ERROR_OK)
{
if (retval != ERROR_OK) {
LOG_ERROR("auto_probe failed");
return retval;
}
@@ -241,38 +223,37 @@ int get_flash_bank_by_num(int num, struct flash_bank **bank)
/* lookup flash bank by address, bank not found is success, but
* result_bank is set to NULL. */
int get_flash_bank_by_addr(struct target *target, uint32_t addr, bool check, struct flash_bank **result_bank)
int get_flash_bank_by_addr(struct target *target,
uint32_t addr,
bool check,
struct flash_bank **result_bank)
{
struct flash_bank *c;
/* cycle through bank list */
for (c = flash_banks; c; c = c->next)
{
for (c = flash_banks; c; c = c->next) {
int retval;
retval = c->driver->auto_probe(c);
if (retval != ERROR_OK)
{
if (retval != ERROR_OK) {
LOG_ERROR("auto_probe failed");
return retval;
}
/* check whether address belongs to this flash bank */
if ((addr >= c->base) && (addr <= c->base + (c->size - 1)) && target == c->target)
{
if ((addr >= c->base) && (addr <= c->base + (c->size - 1)) && target == c->target) {
*result_bank = c;
return ERROR_OK;
}
}
*result_bank = NULL;
if (check)
{
if (check) {
LOG_ERROR("No flash at address 0x%08" PRIx32, addr);
return ERROR_FAIL;
}
return ERROR_OK;
}
int default_flash_mem_blank_check(struct flash_bank *bank)
static int default_flash_mem_blank_check(struct flash_bank *bank)
{
struct target *target = bank->target;
const int buffer_size = 1024;
@@ -280,38 +261,33 @@ int default_flash_mem_blank_check(struct flash_bank *bank)
uint32_t nBytes;
int retval = ERROR_OK;
if (bank->target->state != TARGET_HALTED)
{
if (bank->target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
uint8_t *buffer = malloc(buffer_size);
for (i = 0; i < bank->num_sectors; i++)
{
for (i = 0; i < bank->num_sectors; i++) {
uint32_t j;
bank->sectors[i].is_erased = 1;
for (j = 0; j < bank->sectors[i].size; j += buffer_size)
{
for (j = 0; j < bank->sectors[i].size; j += buffer_size) {
uint32_t chunk;
chunk = buffer_size;
if (chunk > (j - bank->sectors[i].size))
{
chunk = (j - bank->sectors[i].size);
}
retval = target_read_memory(target, bank->base + bank->sectors[i].offset + j, 4, chunk/4, buffer);
retval = target_read_memory(target,
bank->base + bank->sectors[i].offset + j,
4,
chunk/4,
buffer);
if (retval != ERROR_OK)
{
goto done;
}
for (nBytes = 0; nBytes < chunk; nBytes++)
{
if (buffer[nBytes] != 0xFF)
{
for (nBytes = 0; nBytes < chunk; nBytes++) {
if (buffer[nBytes] != 0xFF) {
bank->sectors[i].is_erased = 0;
break;
}
@@ -319,7 +295,7 @@ int default_flash_mem_blank_check(struct flash_bank *bank)
}
}
done:
done:
free(buffer);
return retval;
@@ -333,19 +309,17 @@ int default_flash_blank_check(struct flash_bank *bank)
int fast_check = 0;
uint32_t blank;
if (bank->target->state != TARGET_HALTED)
{
if (bank->target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
for (i = 0; i < bank->num_sectors; i++)
{
for (i = 0; i < bank->num_sectors; i++) {
uint32_t address = bank->base + bank->sectors[i].offset;
uint32_t size = bank->sectors[i].size;
if ((retval = target_blank_check_memory(target, address, size, &blank)) != ERROR_OK)
{
retval = target_blank_check_memory(target, address, size, &blank);
if (retval != ERROR_OK) {
fast_check = 0;
break;
}
@@ -356,8 +330,7 @@ int default_flash_blank_check(struct flash_bank *bank)
fast_check = 1;
}
if (!fast_check)
{
if (!fast_check) {
LOG_USER("Running slow fallback erase check - add working memory");
return default_flash_mem_blank_check(bank);
}
@@ -380,8 +353,8 @@ int default_flash_blank_check(struct flash_bank *bank)
* warning about those additions.
*/
static int flash_iterate_address_range_inner(struct target *target,
char *pad_reason, uint32_t addr, uint32_t length,
int (*callback)(struct flash_bank *bank, int first, int last))
char *pad_reason, uint32_t addr, uint32_t length,
int (*callback)(struct flash_bank *bank, int first, int last))
{
struct flash_bank *c;
uint32_t last_addr = addr + length; /* first address AFTER end */
@@ -393,17 +366,14 @@ static int flash_iterate_address_range_inner(struct target *target,
if (retval != ERROR_OK)
return retval;
if (c->size == 0 || c->num_sectors == 0)
{
if (c->size == 0 || c->num_sectors == 0) {
LOG_ERROR("Bank is invalid");
return ERROR_FLASH_BANK_INVALID;
}
if (length == 0)
{
if (length == 0) {
/* special case, erase whole bank when length is zero */
if (addr != c->base)
{
if (addr != c->base) {
LOG_ERROR("Whole bank access must start at beginning of bank.");
return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
}
@@ -412,8 +382,7 @@ static int flash_iterate_address_range_inner(struct target *target,
}
/* check whether it all fits in this bank */
if (addr + length - 1 > c->base + c->size - 1)
{
if (addr + length - 1 > c->base + c->size - 1) {
LOG_ERROR("Flash access does not fit into bank.");
return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
}
@@ -423,8 +392,7 @@ static int flash_iterate_address_range_inner(struct target *target,
addr -= c->base;
last_addr -= c->base;
for (i = 0; i < c->num_sectors; i++)
{
for (i = 0; i < c->num_sectors; i++) {
struct flash_sector *f = c->sectors + i;
uint32_t end = f->offset + f->size;
@@ -448,7 +416,7 @@ static int flash_iterate_address_range_inner(struct target *target,
else if (addr < end && pad_reason) {
/* FIXME say how many bytes (e.g. 80 KB) */
LOG_WARNING("Adding extra %s range, "
"%#8.8x to %#8.8x",
"%#8.8x to %#8.8x",
pad_reason,
(unsigned) f->offset,
(unsigned) addr - 1);
@@ -469,7 +437,7 @@ static int flash_iterate_address_range_inner(struct target *target,
if (last_addr < end && pad_reason) {
/* FIXME say how many bytes (e.g. 80 KB) */
LOG_WARNING("Adding extra %s range, "
"%#8.8x to %#8.8x",
"%#8.8x to %#8.8x",
pad_reason,
(unsigned) last_addr,
(unsigned) end - 1);
@@ -485,9 +453,9 @@ static int flash_iterate_address_range_inner(struct target *target,
/* invalid start or end address? */
if (first == -1 || last == -1) {
LOG_ERROR("address range 0x%8.8x .. 0x%8.8x "
"is not sector-aligned",
(unsigned) (c->base + addr),
(unsigned) (c->base + last_addr - 1));
"is not sector-aligned",
(unsigned) (c->base + addr),
(unsigned) (c->base + last_addr - 1));
return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
}
@@ -502,23 +470,21 @@ static int flash_iterate_address_range_inner(struct target *target,
* multiple chips.
*/
static int flash_iterate_address_range(struct target *target,
char *pad_reason, uint32_t addr, uint32_t length,
int (*callback)(struct flash_bank *bank, int first, int last))
char *pad_reason, uint32_t addr, uint32_t length,
int (*callback)(struct flash_bank *bank, int first, int last))
{
struct flash_bank *c;
int retval = ERROR_OK;
/* Danger! zero-length iterations means entire bank! */
do
{
do {
retval = get_flash_bank_by_addr(target, addr, true, &c);
if (retval != ERROR_OK)
return retval;
uint32_t cur_length = length;
/* check whether it all fits in this bank */
if (addr + length - 1 > c->base + c->size - 1)
{
if (addr + length - 1 > c->base + c->size - 1) {
LOG_DEBUG("iterating over more than one flash bank.");
cur_length = c->base + c->size - addr;
}
@@ -536,10 +502,10 @@ static int flash_iterate_address_range(struct target *target,
}
int flash_erase_address_range(struct target *target,
bool pad, uint32_t addr, uint32_t length)
bool pad, uint32_t addr, uint32_t length)
{
return flash_iterate_address_range(target, pad ? "erase" : NULL,
addr, length, &flash_driver_erase);
addr, length, &flash_driver_erase);
}
static int flash_driver_unprotect(struct flash_bank *bank, int first, int last)
@@ -554,30 +520,25 @@ int flash_unlock_address_range(struct target *target, uint32_t addr, uint32_t le
* and doesn't restore it.
*/
return flash_iterate_address_range(target, "unprotect",
addr, length, &flash_driver_unprotect);
addr, length, &flash_driver_unprotect);
}
static int compare_section (const void * a, const void * b)
static int compare_section(const void *a, const void *b)
{
struct imagesection *b1, *b2;
b1=*((struct imagesection **)a);
b2=*((struct imagesection **)b);
b1 = *((struct imagesection **)a);
b2 = *((struct imagesection **)b);
if (b1->base_address == b2->base_address)
{
return 0;
} else if (b1->base_address > b2->base_address)
{
else if (b1->base_address > b2->base_address)
return 1;
} else
{
else
return -1;
}
}
int flash_write_unlock(struct target *target, struct image *image,
uint32_t *written, int erase, bool unlock)
uint32_t *written, int erase, bool unlock)
{
int retval = ERROR_OK;
@@ -592,8 +553,7 @@ int flash_write_unlock(struct target *target, struct image *image,
if (written)
*written = 0;
if (erase)
{
if (erase) {
/* assume all sectors need erasing - stops any problems
* when flash_write is called multiple times */
@@ -609,16 +569,13 @@ int flash_write_unlock(struct target *target, struct image *image,
image->num_sections);
int i;
for (i = 0; i < image->num_sections; i++)
{
sections[i] = &image->sections[i];
}
qsort(sections, image->num_sections, sizeof(struct imagesection *),
compare_section);
compare_section);
/* loop until we reach end of the image */
while (section < image->num_sections)
{
while (section < image->num_sections) {
uint32_t buffer_size;
uint8_t *buffer;
int section_last;
@@ -626,8 +583,7 @@ int flash_write_unlock(struct target *target, struct image *image,
uint32_t run_size = sections[section]->size - section_offset;
int pad_bytes = 0;
if (sections[section]->size == 0)
{
if (sections[section]->size == 0) {
LOG_WARNING("empty section %d", section);
section++;
section_offset = 0;
@@ -637,12 +593,10 @@ int flash_write_unlock(struct target *target, struct image *image,
/* find the corresponding flash bank */
retval = get_flash_bank_by_addr(target, run_address, false, &c);
if (retval != ERROR_OK)
{
goto done;
}
if (c == NULL)
{
section++; /* and skip it */
if (c == NULL) {
LOG_WARNING("no flash bank found for address %x", run_address);
section++; /* and skip it */
section_offset = 0;
continue;
}
@@ -650,15 +604,13 @@ int flash_write_unlock(struct target *target, struct image *image,
/* collect consecutive sections which fall into the same bank */
section_last = section;
padding[section] = 0;
while ((run_address + run_size - 1 < c->base + c->size - 1)
&& (section_last + 1 < image->num_sections))
{
while ((run_address + run_size - 1 < c->base + c->size - 1) &&
(section_last + 1 < image->num_sections)) {
/* sections are sorted */
assert(sections[section_last + 1]->base_address >= c->base);
if (sections[section_last + 1]->base_address >= (c->base + c->size))
{
/* Done with this bank */
break;
if (sections[section_last + 1]->base_address >= (c->base + c->size)) {
/* Done with this bank */
break;
}
/* FIXME This needlessly touches sectors BETWEEN the
@@ -684,11 +636,12 @@ int flash_write_unlock(struct target *target, struct image *image,
run_size += pad_bytes;
if (pad_bytes > 0)
LOG_INFO("Padding image section %d with %d bytes", section_last-1, pad_bytes);
LOG_INFO("Padding image section %d with %d bytes",
section_last-1,
pad_bytes);
}
if (run_address + run_size - 1 > c->base + c->size - 1)
{
if (run_address + run_size - 1 > c->base + c->size - 1) {
/* If we have more than one flash chip back to back, then we limit
* the current write operation to the current chip.
*/
@@ -709,7 +662,7 @@ int flash_write_unlock(struct target *target, struct image *image,
for (sector = 0; sector < c->num_sectors; sector++) {
end = c->sectors[sector].offset
+ c->sectors[sector].size;
+ c->sectors[sector].size;
if (offset_end <= end)
break;
}
@@ -721,8 +674,7 @@ int flash_write_unlock(struct target *target, struct image *image,
/* allocate buffer */
buffer = malloc(run_size);
if (buffer == NULL)
{
if (buffer == NULL) {
LOG_ERROR("Out of memory for flash bank buffer");
retval = ERROR_FAIL;
goto done;
@@ -730,13 +682,12 @@ int flash_write_unlock(struct target *target, struct image *image,
buffer_size = 0;
/* read sections to the buffer */
while (buffer_size < run_size)
{
while (buffer_size < run_size) {
size_t size_read;
size_read = run_size - buffer_size;
if (size_read > sections[section]->size - section_offset)
size_read = sections[section]->size - section_offset;
size_read = sections[section]->size - section_offset;
/* KLUDGE!
*
@@ -746,25 +697,25 @@ int flash_write_unlock(struct target *target, struct image *image,
intptr_t diff = (intptr_t)sections[section] - (intptr_t)image->sections;
int t_section_num = diff / sizeof(struct imagesection);
LOG_DEBUG("image_read_section: section = %d, t_section_num = %d, section_offset = %d, buffer_size = %d, size_read = %d",
(int)section,
(int)t_section_num, (int)section_offset, (int)buffer_size, (int)size_read);
if ((retval = image_read_section(image, t_section_num, section_offset,
size_read, buffer + buffer_size, &size_read)) != ERROR_OK || size_read == 0)
{
LOG_DEBUG("image_read_section: section = %d, t_section_num = %d, "
"section_offset = %d, buffer_size = %d, size_read = %d",
(int)section, (int)t_section_num, (int)section_offset,
(int)buffer_size, (int)size_read);
retval = image_read_section(image, t_section_num, section_offset,
size_read, buffer + buffer_size, &size_read);
if (retval != ERROR_OK || size_read == 0) {
free(buffer);
goto done;
}
/* see if we need to pad the section */
while (padding[section]--)
(buffer + buffer_size)[size_read++] = 0xff;
(buffer + buffer_size)[size_read++] = 0xff;
buffer_size += size_read;
section_offset += size_read;
if (section_offset >= sections[section]->size)
{
if (section_offset >= sections[section]->size) {
section++;
section_offset = 0;
}
@@ -773,38 +724,31 @@ int flash_write_unlock(struct target *target, struct image *image,
retval = ERROR_OK;
if (unlock)
{
retval = flash_unlock_address_range(target, run_address, run_size);
}
if (retval == ERROR_OK)
{
if (erase)
{
if (retval == ERROR_OK) {
if (erase) {
/* calculate and erase sectors */
retval = flash_erase_address_range(target,
true, run_address, run_size);
}
}
if (retval == ERROR_OK)
{
if (retval == ERROR_OK) {
/* write flash sectors */
retval = flash_driver_write(c, buffer, run_address - c->base, run_size);
}
free(buffer);
if (retval != ERROR_OK)
{
if (retval != ERROR_OK) {
/* abort operation */
goto done;
}
if (written != NULL)
*written += run_size; /* add run size to total written counter */
*written += run_size; /* add run size to total written counter */
}
done:
free(sections);
free(padding);
@@ -813,7 +757,7 @@ done:
}
int flash_write(struct target *target, struct image *image,
uint32_t *written, int erase)
uint32_t *written, int erase)
{
return flash_write_unlock(target, image, written, erase, false);
}

View File

@@ -20,6 +20,7 @@
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
#ifndef FLASH_NOR_CORE_H
#define FLASH_NOR_CORE_H
@@ -39,11 +40,10 @@ struct image;
* within a flash bank. A single bank typically consists of multiple
* sectors, each of which can be erased and protected independently.
*/
struct flash_sector
{
/// Bus offset from start of the flash chip (in bytes).
struct flash_sector {
/** Bus offset from start of the flash chip (in bytes). */
uint32_t offset;
/// Number of bytes in this flash sector.
/** Number of bytes in this flash sector. */
uint32_t size;
/**
* Indication of erasure status: 0 = not erased, 1 = erased,
@@ -72,8 +72,7 @@ struct flash_sector
* may use the @c driver_priv member to store additional data on a
* per-bank basis, if required.
*/
struct flash_bank
{
struct flash_bank {
const char *name;
struct target *target; /**< Target to which this bank belongs. */
@@ -94,13 +93,13 @@ struct flash_bank
* some non-zero value during "probe()" or "auto_probe()".
*/
int num_sectors;
/// Array of sectors, allocated and initilized by the flash driver
/** Array of sectors, allocated and initilized by the flash driver */
struct flash_sector *sectors;
struct flash_bank *next; /**< The next flash bank on this chip */
};
/// Registers the 'flash' subsystem commands
/** Registers the 'flash' subsystem commands */
int flash_register_commands(struct command_context *cmd_ctx);
/**
@@ -134,7 +133,7 @@ int flash_write(struct target *target,
* This routine must be called when the system may modify the status.
*/
void flash_set_dirty(void);
/// @returns The number of flash banks currently defined.
/** @returns The number of flash banks currently defined. */
int flash_get_bank_count(void);
/**
* Provides default read implementation for flash memory.
@@ -153,13 +152,6 @@ int default_flash_read(struct flash_bank *bank,
* @returns ERROR_OK if successful; otherwise, an error code.
*/
int default_flash_blank_check(struct flash_bank *bank);
/**
* Provides a default blank flash memory check. Ensures the contents
* of the given bank have truly been erased.
* @param bank The flash bank.
* @returns ERROR_OK if successful; otherwise, an error code.
*/
int default_flash_mem_blank_check(struct flash_bank *bank);
/**
* Returns the flash bank specified by @a name, which matches the
@@ -209,6 +201,7 @@ struct flash_bank *get_flash_bank_by_num_noprobe(int num);
* @param check return ERROR_OK and result_bank NULL if the bank does not exist
* @returns The struct flash_bank located at @a addr, or NULL.
*/
int get_flash_bank_by_addr(struct target *target, uint32_t addr, bool check, struct flash_bank **result_bank);
int get_flash_bank_by_addr(struct target *target, uint32_t addr, bool check,
struct flash_bank **result_bank);
#endif // FLASH_NOR_CORE_H
#endif /* FLASH_NOR_CORE_H */

View File

@@ -20,6 +20,7 @@
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
#ifndef FLASH_NOR_DRIVER_H
#define FLASH_NOR_DRIVER_H
@@ -48,14 +49,18 @@ struct flash_bank;
* corresponding static <code>flash_driver_<i>callback</i>()</code>
* routine in flash.c.
*/
struct flash_driver
{
struct flash_driver {
/**
* Gives a human-readable name of this flash driver,
* This field is used to select and initialize the driver.
*/
const char *name;
/**
* Gives a human-readable description of arguments.
*/
const char *usage;
/**
* An array of driver-specific commands to register. When called
* during the "flash bank" command, the driver can register addition
@@ -195,7 +200,7 @@ struct flash_driver
/**
* A more gentle flavor of filash_driver_s::probe, performing
* setup with less noise. Generally, driver routines should test
* to seee if the bank has already been probed; if it has, the
* to see if the bank has already been probed; if it has, the
* driver probably should not perform its probe a second time.
*
* This callback is often called from the inside of other
@@ -208,7 +213,8 @@ struct flash_driver
int (*auto_probe)(struct flash_bank *bank);
};
#define FLASH_BANK_COMMAND_HANDLER(name) static __FLASH_BANK_COMMAND(name)
#define FLASH_BANK_COMMAND_HANDLER(name) \
static __FLASH_BANK_COMMAND(name)
/**
* Find a NOR flash driver by its name.
@@ -217,4 +223,4 @@ struct flash_driver
*/
struct flash_driver *flash_driver_find_by_name(const char *name);
#endif // FLASH_NOR_DRIVER_H
#endif /* FLASH_NOR_DRIVER_H */

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