df2eb07086
Initial release of Flash bank driver for Bouffalo chips. The driver currently supports BL602, BL702, BL702L series of chips. Similar SFlash core is inside of BL808, BL606P and BL616 series, so those might be supported in future as well. With adapter speed set to 8000, it can reach speed 140 KiB/s. Since chips have eXecute In Place support, and they also require boot config in Flash at offset 0x0, it's required to have properly crafted linker script, so OpenOCD knows where to write firmware through gdb. There is required flash bank parameter, which specifies the chip type. This is required because BL702 and BL702L have same TAP ID CODE, and there are no usable indicators to use for automatic chip type recognition in the chip. Change-Id: Id57336d447be3c608b39ba3ed143527bfdc0af98 Signed-off-by: Marek Kraus <gamelaster@outlook.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8527 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
50 lines
1.2 KiB
INI
50 lines
1.2 KiB
INI
# SPDX-License-Identifier: GPL-2.0-or-later
|
|
|
|
#
|
|
# Bouffalo Labs BL702L and BL704L target
|
|
#
|
|
# https://en.bouffalolab.com/product/?type=detail&id=26
|
|
#
|
|
# Default JTAG pins: (if not changed by eFuse configuration)
|
|
# TMS - GPIO0
|
|
# TDI - GPIO1
|
|
# TCK - GPIO2
|
|
# TDO - GPIO7
|
|
#
|
|
|
|
if { [info exists CHIPNAME] } {
|
|
set BL602_CHIPNAME $CHIPNAME
|
|
} else {
|
|
set BL602_CHIPNAME bl702l
|
|
}
|
|
|
|
set CPUTAPID 0x20000e05
|
|
|
|
# For work-area we use beginning of OCRAM, since BL702L have only ITCM, which can be taken
|
|
# by L1 cache and XIP during runtime.
|
|
set WORKAREAADDR 0x42020000
|
|
set WORKAREASIZE 0x10000
|
|
|
|
set FLASH_CHIP_TYPE bl702l
|
|
|
|
source [find target/bl602_common.cfg]
|
|
|
|
# JTAG reset is broken. Read comment of bl602_sw_reset function for more information
|
|
# On BL702L, we are forcing boot into ISP mode, so chip stays in BootROM until JTAG re-attach
|
|
$_TARGETNAME configure -event reset-assert {
|
|
halt
|
|
|
|
# Restore clocks to defaults
|
|
bl602_restore_clock_defaults
|
|
|
|
# In HBN_RSV2, set HBN_RELEASE_CORE to HBN_RELEASE_CORE_FLAG (4)
|
|
# and HBN_USER_BOOT_SEL to 1 (ISP)
|
|
mww 0x4000f108 0x44000000
|
|
|
|
# Perform software reset
|
|
bl602_sw_reset
|
|
|
|
# Reset HBN_RSV2 so BootROM will not force ISP mode again
|
|
mww 0x4000f108 0x00000000
|
|
}
|