Files
openocd/tcl/target/ngultra.cfg
Adrien Charruel 68b6d3ad47 jtag/driver/angie: Update Angie probe driver
Update jtag driver code to reflect these changes and properly drive
Angie probe.
The rationale behind this is to increase the probe performances,
especially in use cases when large files shall be loaded on a target.
The USB transfer performances are now close to those obtained with a
standard FTDI probe.

Change-Id: I3b31d75a3f66c2d07fed8c7423f765acc30925f8
Signed-off-by: Adrien Charruel <acharruel@nanoxplore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8711
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2025-08-17 13:42:45 +00:00

62 lines
2.0 KiB
INI

# SPDX-License-Identifier: BSD-3-Clause
# Copyright (C) 2022 by NanoXplore, France - all rights reserved
#
# configuration file for NG-Ultra SoC from NanoXplore.
# NG-Ultra is a quad-core Cortex-R52 SoC + an FPGA.
#
transport select jtag
adapter speed 10000
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME NGULTRA
}
if { [info exists CHIPCORES] } {
set _cores $CHIPCORES
} else {
set _cores 4
}
set DBGBASE {0x88210000 0x88310000 0x88410000 0x88510000}
set CTIBASE {0x88220000 0x88320000 0x88420000 0x88520000}
# Coresight access to the SoC
jtag newtap $_CHIPNAME.coresight cpu -irlen 4 -expected-id 0x6BA00477
# Misc TAP devices
jtag newtap $_CHIPNAME.soc cpu -irlen 7 -expected-id 0xFAAA0555
jtag newtap $_CHIPNAME.pmb unknown1 -irlen 5 -expected-id 0xBA20A005
jtag newtap $_CHIPNAME.fpga fpga -irlen 4 -ignore-version -ignore-bypass
# Create the Coresight DAP
dap create $_CHIPNAME.coresight.dap -chain-position $_CHIPNAME.coresight.cpu
for { set _core 0 } { $_core < $_cores } { incr _core } {
cti create cti.$_core -dap $_CHIPNAME.coresight.dap -ap-num 0 \
-baseaddr [lindex $CTIBASE $_core]
if { $_core == 0} {
target create core.$_core armv8r -dap $_CHIPNAME.coresight.dap \
-ap-num 0 -dbgbase [lindex $DBGBASE $_core] -cti cti.$_core
} else {
target create core.$_core armv8r -dap $_CHIPNAME.coresight.dap \
-ap-num 0 -dbgbase [lindex $DBGBASE $_core] -cti cti.$_core -defer-examine
}
}
# Create direct APB and AXI interfaces
target create APB mem_ap -dap $_CHIPNAME.coresight.dap -ap-num 0
target create AXI mem_ap -dap $_CHIPNAME.coresight.dap -ap-num 1
lappend post_init_commands {
foreach t [target names] {
set dap [$t cget -dap]
set ap [$t cget -ap-num]
$dap apsel $ap
# speed up firmware upload by reducing nb of RUNTEST cycles
echo "NGUltra post-init: $dap AP.$ap set memaccess to 5"
$dap memaccess 5
}
}