Sean Anderson d673521c39 cpld: altera-epm240: Add additional IDCODEs ...

This adds some additional IDCODEs from the datasheet. It also adds
support for customizing the tap name.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Change-Id: I7cda10b92c229b61836c12cd9ca410de358ede2e
Reviewed-on: https://review.openocd.org/c/openocd/+/6846
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

2022-02-26 15:28:41 +00:00

..

board

Cadence virtual debug interface (vdebug) integration

2022-02-14 15:12:10 +00:00

chip

tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change

2021-05-08 09:49:08 +01:00

cpld

cpld: altera-epm240: Add additional IDCODEs

2022-02-26 15:28:41 +00:00

cpu

tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change

2021-05-08 09:48:44 +01:00

fpga

tcl: add lattice ECP5 family support

2021-08-25 03:47:50 +00:00

interface

Cadence virtual debug interface (vdebug) integration

2022-02-14 15:12:10 +00:00

target

Cadence virtual debug interface (vdebug) integration

2022-02-14 15:12:10 +00:00

test

tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change

2021-05-08 09:48:44 +01:00

tools

tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change

2021-05-08 09:49:08 +01:00

bitsbytes.tcl

tcl: fix some minor typo

2021-05-22 10:06:26 +01:00

mem_helper.tcl

tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change

2021-05-08 09:48:44 +01:00

memory.tcl

tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change

2021-05-08 09:49:08 +01:00

mmr_helpers.tcl

tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change

2021-05-08 09:49:08 +01:00