25 Commits

Author SHA1 Message Date
Pbopbo
9dabf2b7f4 Adjustment to LAN9512 reference schematics: pull ups for tx, rx, caps for emi, adjustments for the test pins, some minor changes;
Skew optimized;
Adds PoE filter caps;
Major Ground domain rework;
Minor adjustemnets
2025-11-25 12:27:46 +01:00
Pbopbo
836c0ec4fc Bugfix: Swaps caps for radios. 2025-11-18 10:43:26 +01:00
Pbopbo
35065d6577 Fixes lock files. 2025-11-18 09:56:26 +01:00
80378e7d97 add some descriptors 2025-11-11 13:44:38 +01:00
1bd0cecdb6 Merge pull request 'analog_input' (#1) from analog_input into main
Reviewed-on: https://gitea.pstruebi.xyz/pstruebi/pcb_cm4_bl54/pulls/1
2025-10-21 09:30:10 +02:00
455b1875ac ordered@aisler rev33 2025-10-21 09:28:22 +02:00
fd6ca9ce7c rc1 for pcb with analog input 2025-10-20 17:17:24 +02:00
edb9727281 work in progress 2025-10-17 18:21:59 +02:00
c3ac2fce1c zwischenstand 2025-10-17 15:46:10 +02:00
3f59246869 work in progress 2025-10-17 10:31:58 +02:00
4b786aaab0 first adaptions 2025-10-13 17:02:32 +02:00
83e7e8a748 also commit sch 2025-09-16 16:07:24 +02:00
e195676419 migrate to two different footprints for cm4 2025-09-16 16:07:04 +02:00
19ee4c7aba pre-cm4 migration 2025-09-16 15:37:52 +02:00
a13ab34569 add voltage ratings to caps 2025-08-26 14:34:40 +02:00
a0d6fdd9ef remove paste from a footprint 2025-08-25 10:02:29 +02:00
8a9b064160 move ethernet port 0.2mm inwards 2025-08-25 09:58:25 +02:00
7217c350e9 add two spare gpios per wireless module 2025-08-25 09:07:54 +02:00
b39248edb1 flip more caps 2025-08-07 11:39:29 +02:00
4e746d67a0 flip some caps 2025-08-07 11:32:16 +02:00
49a0f1a35a remove release candidates, 2025-08-07 10:54:43 +02:00
cb62310de5 small adjustments 2025-07-30 21:25:30 +02:00
f8671f580c increase power tracks 2025-07-30 21:03:32 +02:00
8e14b0eabb add todo 2025-07-30 14:22:36 +02:00
5f5c32ebe2 add 470u buffer cap 2025-07-28 14:43:50 +02:00
29 changed files with 171236 additions and 796499 deletions

View File

@@ -1 +0,0 @@
/home/pstruebi/Nextcloud/Projekte/auracaster/tech/pcb/kicad/cm/cm4-nrf54/_autosave-cm4-nrf54.sch

7
.gitignore vendored Normal file
View File

@@ -0,0 +1,7 @@
cm4-nrf54-backups/
~*.lck
.kiri/
fp-info-cache
\#auto_saved_files#/

File diff suppressed because it is too large Load Diff

View File

@@ -1,6 +1,6 @@
(version 1) (version 1)
(rule "dp clearance" (rule "dp clearance"
(constraint clearance (min 1.2mm)) (constraint clearance (min 1.2mm))
(condition "A.inDiffPair('*') && A.Type == 'Track' && B.Type == 'Zone' ") (condition "A.InDiffPair('*') && A.Type == 'Track' && B.Type == 'Zone' && !(A.NetName == '*XLR*')")
) )

File diff suppressed because it is too large Load Diff

View File

@@ -1,8 +1,8 @@
{ {
"board": { "board": {
"active_layer": 6, "active_layer": 0,
"active_layer_preset": "", "active_layer_preset": "",
"auto_track_width": true, "auto_track_width": false,
"hidden_netclasses": [], "hidden_netclasses": [],
"hidden_nets": [], "hidden_nets": [],
"high_contrast_mode": 0, "high_contrast_mode": 0,
@@ -49,8 +49,8 @@
"conflict_shadows", "conflict_shadows",
"shapes" "shapes"
], ],
"visible_layers": "ffffffff_ffffffff_fffffffd_dfffdf67", "visible_layers": "ffffffff_ffffffff_fffffff5_ff555fef",
"zone_display_mode": 0 "zone_display_mode": 1
}, },
"git": { "git": {
"repo_type": "https", "repo_type": "https",

View File

@@ -37,9 +37,9 @@
"other_text_thickness": 0.15, "other_text_thickness": 0.15,
"other_text_upright": false, "other_text_upright": false,
"pads": { "pads": {
"drill": 0.0, "drill": 1.6,
"height": 1.0, "height": 1.6,
"width": 2.51 "width": 1.6
}, },
"silk_line_width": 0.12, "silk_line_width": 0.12,
"silk_text_italic": false, "silk_text_italic": false,
@@ -48,7 +48,7 @@
"silk_text_thickness": 0.15, "silk_text_thickness": 0.15,
"silk_text_upright": false, "silk_text_upright": false,
"zones": { "zones": {
"min_clearance": 0.1524 "min_clearance": 0.15
} }
}, },
"diff_pair_dimensions": [ "diff_pair_dimensions": [
@@ -60,47 +60,283 @@
], ],
"drc_exclusions": [ "drc_exclusions": [
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"" ""
], ],
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"" ""
], ],
[ [
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"" ""
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"" ""
], ],
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"" ""
], ],
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"" ""
], ],
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""
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""
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""
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""
],
[
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""
],
[
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""
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[
"lib_footprint_mismatch|123628104|17161547|4f8ccdab-c295-405a-9bce-87c2cde84f1a|00000000-0000-0000-0000-000000000000",
""
],
[
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""
],
[
"lib_footprint_mismatch|142400000|48300000|1f9c6542-0fdc-4e5e-86e2-562a164c4969|00000000-0000-0000-0000-000000000000",
""
],
[
"lib_footprint_mismatch|142400000|48300000|3d3499a6-def5-40ad-9585-bcf8947393ec|00000000-0000-0000-0000-000000000000",
""
],
[
"lib_footprint_mismatch|143300000|55700000|c4c0eb1d-f361-4021-b2f1-c1a1c4e28fdb|00000000-0000-0000-0000-000000000000",
""
],
[
"lib_footprint_mismatch|151300000|24050000|a346a973-10c8-4230-969e-b460250b6500|00000000-0000-0000-0000-000000000000",
""
],
[
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""
],
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""
],
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],
[
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""
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""
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""
],
[
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""
],
[
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""
],
[
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""
],
[
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""
],
[
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""
],
[
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""
],
[
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""
],
[
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""
],
[
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""
],
[
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""
],
[
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""
],
[
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""
],
[
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""
],
[
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""
],
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""
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""
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""
],
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""
],
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""
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""
],
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""
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""
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""
],
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""
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""
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""
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""
],
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""
],
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""
],
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""
],
[
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""
],
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""
],
[
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""
],
[
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""
],
[
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""
],
[
"unresolved_variable|90596652|75408533|c6b17cb8-6f4a-468a-9c29-193e035b9a20|00000000-0000-0000-0000-000000000000",
"" ""
] ]
], ],
@@ -171,22 +407,22 @@
"rule_severitieslegacy_no_courtyard_defined": false, "rule_severitieslegacy_no_courtyard_defined": false,
"rules": { "rules": {
"max_error": 0.005, "max_error": 0.005,
"min_clearance": 0.0, "min_clearance": 0.125,
"min_connection": 0.0, "min_connection": 0.0,
"min_copper_edge_clearance": 0.025, "min_copper_edge_clearance": 0.3,
"min_groove_width": 0.0, "min_groove_width": 0.0,
"min_hole_clearance": 0.25, "min_hole_clearance": 0.2,
"min_hole_to_hole": 0.25, "min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.2, "min_microvia_diameter": 0.2,
"min_microvia_drill": 0.1, "min_microvia_drill": 0.1,
"min_resolved_spokes": 2, "min_resolved_spokes": 1,
"min_silk_clearance": 0.0, "min_silk_clearance": 0.0,
"min_text_height": 0.8, "min_text_height": 0.8,
"min_text_thickness": 0.08, "min_text_thickness": 0.08,
"min_through_hole_diameter": 0.2, "min_through_hole_diameter": 0.2,
"min_track_width": 0.1016, "min_track_width": 0.125,
"min_via_annular_width": 0.1, "min_via_annular_width": 0.1,
"min_via_diameter": 0.45, "min_via_diameter": 0.35,
"solder_mask_to_copper_clearance": 0.0, "solder_mask_to_copper_clearance": 0.0,
"use_height_for_length_calcs": true "use_height_for_length_calcs": true
}, },
@@ -236,12 +472,16 @@
], ],
"track_widths": [ "track_widths": [
0.0, 0.0,
0.1016, 0.125,
0.15, 0.15,
0.254, 0.254,
0.4, 0.4,
0.508, 0.508,
1.016 0.7,
0.8,
1.016,
1.254,
1.508
], ],
"tuning_pattern_settings": { "tuning_pattern_settings": {
"diff_pair_defaults": { "diff_pair_defaults": {
@@ -275,8 +515,16 @@
"drill": 0.0 "drill": 0.0
}, },
{ {
"diameter": 0.8, "diameter": 0.35,
"drill": 0.4 "drill": 0.25
},
{
"diameter": 0.5,
"drill": 0.25
},
{
"diameter": 0.9,
"drill": 0.45
} }
], ],
"zones_allow_external_fillets": false "zones_allow_external_fillets": false
@@ -511,6 +759,7 @@
"single_global_label": "ignore", "single_global_label": "ignore",
"unannotated": "error", "unannotated": "error",
"unconnected_wire_endpoint": "warning", "unconnected_wire_endpoint": "warning",
"undefined_netclass": "error",
"unit_value_mismatch": "error", "unit_value_mismatch": "error",
"unresolved_variable": "error", "unresolved_variable": "error",
"wire_dangling": "error" "wire_dangling": "error"
@@ -530,7 +779,7 @@
"classes": [ "classes": [
{ {
"bus_width": 12, "bus_width": 12,
"clearance": 0.15, "clearance": 0.125,
"diff_pair_gap": 0.1524, "diff_pair_gap": 0.1524,
"diff_pair_via_gap": 0.25, "diff_pair_via_gap": 0.25,
"diff_pair_width": 0.1524, "diff_pair_width": 0.1524,
@@ -541,21 +790,21 @@
"pcb_color": "rgba(0, 0, 0, 0.000)", "pcb_color": "rgba(0, 0, 0, 0.000)",
"priority": 2147483647, "priority": 2147483647,
"schematic_color": "rgba(0, 0, 0, 0.000)", "schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.1524, "track_width": 0.125,
"via_diameter": 0.5, "via_diameter": 0.45,
"via_drill": 0.25, "via_drill": 0.25,
"wire_width": 6 "wire_width": 6
}, },
{ {
"clearance": 0.15, "clearance": 0.125,
"diff_pair_gap": 0.18, "diff_pair_gap": 0.18,
"diff_pair_width": 0.19, "diff_pair_width": 0.19,
"microvia_diameter": 0.3, "microvia_diameter": 0.3,
"name": "100Rdiff", "name": "100Rdiff",
"pcb_color": "rgba(0, 0, 0, 0.000)", "pcb_color": "rgba(0, 0, 0, 0.000)",
"priority": 1, "priority": 3,
"schematic_color": "rgba(0, 0, 0, 0.000)", "schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.1524, "track_width": 0.15,
"via_diameter": 0.5, "via_diameter": 0.5,
"via_drill": 0.25 "via_drill": 0.25
}, },
@@ -565,22 +814,40 @@
"diff_pair_width": 0.23, "diff_pair_width": 0.23,
"name": "90Rdiff", "name": "90Rdiff",
"pcb_color": "rgba(0, 0, 0, 0.000)", "pcb_color": "rgba(0, 0, 0, 0.000)",
"priority": 0, "priority": 2,
"schematic_color": "rgba(0, 0, 0, 0.000)" "schematic_color": "rgba(0, 0, 0, 0.000)"
}, },
{
"clearance": 2.0,
"name": "cha_gnd",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"priority": 0,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.2
},
{
"clearance": 0.15,
"name": "power_3V",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"priority": 1,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25,
"via_diameter": 0.6,
"via_drill": 0.3
},
{ {
"clearance": 0.15, "clearance": 0.15,
"diff_pair_gap": 0.1524, "diff_pair_gap": 0.1524,
"diff_pair_width": 0.1524, "diff_pair_width": 0.1524,
"microvia_diameter": 0.3, "microvia_diameter": 0.3,
"microvia_drill": 0.1, "microvia_drill": 0.1,
"name": "power", "name": "power_5V",
"pcb_color": "rgba(0, 0, 0, 0.000)", "pcb_color": "rgba(0, 0, 0, 0.000)",
"priority": 2, "priority": 4,
"schematic_color": "rgba(0, 0, 0, 0.000)", "schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.5, "track_width": 0.8,
"via_diameter": 0.5, "via_diameter": 0.9,
"via_drill": 0.25 "via_drill": 0.45
} }
], ],
"meta": { "meta": {
@@ -590,11 +857,11 @@
"netclass_assignments": null, "netclass_assignments": null,
"netclass_patterns": [ "netclass_patterns": [
{ {
"netclass": "power", "netclass": "power_3V",
"pattern": "+3V3" "pattern": "+3V3"
}, },
{ {
"netclass": "power", "netclass": "power_5V",
"pattern": "+5V" "pattern": "+5V"
}, },
{ {
@@ -686,7 +953,7 @@
"pattern": "/USB_D-" "pattern": "/USB_D-"
}, },
{ {
"netclass": "power", "netclass": "power_5V",
"pattern": "/USB_VBUS" "pattern": "/USB_VBUS"
}, },
{ {
@@ -698,7 +965,7 @@
"pattern": "/~{E0_LEDR}" "pattern": "/~{E0_LEDR}"
}, },
{ {
"netclass": "power", "netclass": "power_5V",
"pattern": "GND" "pattern": "GND"
}, },
{ {
@@ -964,6 +1231,38 @@
{ {
"netclass": "Default", "netclass": "Default",
"pattern": "Net-(U5-Pad97)" "pattern": "Net-(U5-Pad97)"
},
{
"netclass": "90Rdiff",
"pattern": "USB_port_D+"
},
{
"netclass": "90Rdiff",
"pattern": "USB_port_D-"
},
{
"netclass": "90Rdiff",
"pattern": "USB_eth_D+"
},
{
"netclass": "90Rdiff",
"pattern": "USB_eth_D-"
},
{
"netclass": "90Rdiff",
"pattern": "/USB_eth_D+"
},
{
"netclass": "90Rdiff",
"pattern": "/USB_port_D+"
},
{
"netclass": "90Rdiff",
"pattern": "/USB_port_D-"
},
{
"netclass": "90Rdiff",
"pattern": "/USB_eth_D-"
} }
] ]
}, },
@@ -996,7 +1295,7 @@
}, },
"bom_presets": [], "bom_presets": [],
"bom_settings": { "bom_settings": {
"exclude_dnp": false, "exclude_dnp": true,
"fields_ordered": [ "fields_ordered": [
{ {
"group_by": false, "group_by": false,
@@ -1004,6 +1303,12 @@
"name": "Reference", "name": "Reference",
"show": true "show": true
}, },
{
"group_by": true,
"label": "digikey_pn",
"name": "digikey_pn",
"show": true
},
{ {
"group_by": false, "group_by": false,
"label": "Qty", "label": "Qty",
@@ -1018,8 +1323,8 @@
}, },
{ {
"group_by": true, "group_by": true,
"label": "DNP", "label": "Footprint",
"name": "${DNP}", "name": "Footprint",
"show": true "show": true
}, },
{ {
@@ -1036,15 +1341,15 @@
}, },
{ {
"group_by": true, "group_by": true,
"label": "Footprint", "label": "DNP",
"name": "Footprint", "name": "${DNP}",
"show": true "show": true
}, },
{ {
"group_by": false, "group_by": false,
"label": "Datasheet", "label": "Datasheet",
"name": "Datasheet", "name": "Datasheet",
"show": true "show": false
}, },
{ {
"group_by": false, "group_by": false,
@@ -1069,6 +1374,66 @@
"label": "#", "label": "#",
"name": "${ITEM_NUMBER}", "name": "${ITEM_NUMBER}",
"show": false "show": false
},
{
"group_by": false,
"label": "Field8",
"name": "Field8",
"show": false
},
{
"group_by": false,
"label": "Field4",
"name": "Field4",
"show": false
},
{
"group_by": false,
"label": "Note",
"name": "Note",
"show": false
},
{
"group_by": false,
"label": "Part Description",
"name": "Part Description",
"show": false
},
{
"group_by": false,
"label": "digikey",
"name": "digikey",
"show": false
},
{
"group_by": false,
"label": "name",
"name": "name",
"show": false
},
{
"group_by": false,
"label": "pn",
"name": "pn",
"show": false
},
{
"group_by": false,
"label": "Field5",
"name": "Field5",
"show": false
},
{
"group_by": false,
"label": "Field6",
"name": "Field6",
"show": false
},
{
"group_by": false,
"label": "Field7",
"name": "Field7",
"show": false
} }
], ],
"filter_string": "", "filter_string": "",
@@ -1076,7 +1441,7 @@
"include_excluded_from_bom": true, "include_excluded_from_bom": true,
"name": "", "name": "",
"sort_asc": true, "sort_asc": true,
"sort_field": "Reference" "sort_field": "Value"
}, },
"connection_grid_size": 50.0, "connection_grid_size": 50.0,
"drawing": { "drawing": {

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cm4-nrf54.sch-bak Normal file

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@@ -2,4 +2,5 @@
(version 7) (version 7)
(lib (name "RPi_Compute_Module_4")(type "KiCad")(uri "${KIPRJMOD}/../external/RPi-CM4-Kicad/RPi_Compute_Module_4.pretty")(options "")(descr "")) (lib (name "RPi_Compute_Module_4")(type "KiCad")(uri "${KIPRJMOD}/../external/RPi-CM4-Kicad/RPi_Compute_Module_4.pretty")(options "")(descr ""))
(lib (name "jkiv-library")(type "KiCad")(uri "${KIPRJMOD}/../external/jkiv-kicad-library/jkiv-library.pretty")(options "")(descr "")) (lib (name "jkiv-library")(type "KiCad")(uri "${KIPRJMOD}/../external/jkiv-kicad-library/jkiv-library.pretty")(options "")(descr ""))
(lib (name "auracast_streamer")(type "KiCad")(uri "/home/paul/Nextcloud/tech/pcb/kicad/library/auracast_streamer.pretty")(options "")(descr ""))
) )

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@@ -1 +0,0 @@
{"hostname":"pstruebi-Latitude-5530","username":"pstruebi"}

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@@ -1 +0,0 @@
{"hostname":"pstruebi-Latitude-5530","username":"pstruebi"}