forked from auracaster/openocd
flash: nor: align switch and case statements
The coding style requires the 'case' to be at the same indentation level of its 'switch' statement. Align the code accordingly. No changes are reported by git log -p -w --ignore-blank-lines --patience Change-Id: I6be44efd5189b671caabcf6753bb82ef44521440 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/9034 Tested-by: jenkins
This commit is contained in:
Antonio Borneo
@@ -1490,40 +1490,39 @@ do_retry:
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/* Check command & argument */
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switch (command) {
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case AT91C_EFC_FCMD_WP:
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case AT91C_EFC_FCMD_WPL:
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case AT91C_EFC_FCMD_EWP:
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case AT91C_EFC_FCMD_EWPL:
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/* case AT91C_EFC_FCMD_EPL: */
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case AT91C_EFC_FCMD_EPA:
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case AT91C_EFC_FCMD_SLB:
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case AT91C_EFC_FCMD_CLB:
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n = (private->size_bytes / private->page_size);
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if (argument >= n)
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LOG_ERROR("*BUG*: Embedded flash has only %" PRIu32 " pages", n);
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break;
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case AT91C_EFC_FCMD_WP:
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case AT91C_EFC_FCMD_WPL:
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case AT91C_EFC_FCMD_EWP:
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case AT91C_EFC_FCMD_EWPL:
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/* case AT91C_EFC_FCMD_EPL: */
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case AT91C_EFC_FCMD_EPA:
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case AT91C_EFC_FCMD_SLB:
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case AT91C_EFC_FCMD_CLB:
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n = (private->size_bytes / private->page_size);
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if (argument >= n)
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LOG_ERROR("*BUG*: Embedded flash has only %" PRIu32 " pages", n);
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break;
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case AT91C_EFC_FCMD_SFB:
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case AT91C_EFC_FCMD_CFB:
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if (argument >= private->chip->details.n_gpnvms) {
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LOG_ERROR("*BUG*: Embedded flash has only %d GPNVMs",
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private->chip->details.n_gpnvms);
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}
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break;
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case AT91C_EFC_FCMD_SFB:
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case AT91C_EFC_FCMD_CFB:
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if (argument >= private->chip->details.n_gpnvms) {
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LOG_ERROR("*BUG*: Embedded flash has only %d GPNVMs",
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private->chip->details.n_gpnvms);
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}
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break;
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case AT91C_EFC_FCMD_GETD:
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case AT91C_EFC_FCMD_EA:
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case AT91C_EFC_FCMD_GLB:
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case AT91C_EFC_FCMD_GFB:
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case AT91C_EFC_FCMD_STUI:
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case AT91C_EFC_FCMD_SPUI:
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if (argument != 0)
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LOG_ERROR("Argument is meaningless for cmd: %d", command);
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break;
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default:
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LOG_ERROR("Unknown command %d", command);
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break;
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case AT91C_EFC_FCMD_GETD:
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case AT91C_EFC_FCMD_EA:
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case AT91C_EFC_FCMD_GLB:
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case AT91C_EFC_FCMD_GFB:
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case AT91C_EFC_FCMD_STUI:
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case AT91C_EFC_FCMD_SPUI:
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if (argument != 0)
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LOG_ERROR("Argument is meaningless for cmd: %d", command);
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break;
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default:
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LOG_ERROR("Unknown command %d", command);
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break;
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}
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if (command == AT91C_EFC_FCMD_SPUI) {
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@@ -1678,21 +1677,21 @@ static int flashd_erase_pages(struct sam4_bank_private *private,
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LOG_DEBUG("Here");
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uint8_t erase_pages;
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switch (num_pages) {
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case 4:
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erase_pages = 0x00;
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break;
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case 8:
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erase_pages = 0x01;
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break;
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case 16:
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erase_pages = 0x02;
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break;
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case 32:
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erase_pages = 0x03;
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break;
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default:
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erase_pages = 0x00;
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break;
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case 4:
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erase_pages = 0x00;
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break;
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case 8:
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erase_pages = 0x01;
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break;
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case 16:
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erase_pages = 0x02;
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break;
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case 32:
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erase_pages = 0x03;
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break;
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default:
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erase_pages = 0x00;
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break;
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}
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/* AT91C_EFC_FCMD_EPA
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@@ -2080,18 +2079,18 @@ static void sam4_explain_ckgr_mor(struct sam4_chip *chip)
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chip->cfg.rc_freq = 0;
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if (rcen) {
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switch (v) {
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case 0:
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chip->cfg.rc_freq = 4 * 1000 * 1000;
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break;
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case 1:
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chip->cfg.rc_freq = 8 * 1000 * 1000;
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break;
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case 2:
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chip->cfg.rc_freq = 12 * 1000 * 1000;
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break;
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default:
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chip->cfg.rc_freq = 0;
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break;
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case 0:
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chip->cfg.rc_freq = 4 * 1000 * 1000;
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break;
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case 1:
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chip->cfg.rc_freq = 8 * 1000 * 1000;
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break;
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case 2:
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chip->cfg.rc_freq = 12 * 1000 * 1000;
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break;
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default:
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chip->cfg.rc_freq = 0;
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break;
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}
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}
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@@ -2192,30 +2191,30 @@ static void sam4_explain_mckr(struct sam4_chip *chip)
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css = sam4_reg_fieldname(chip, "CSS", chip->cfg.PMC_MCKR, 0, 2);
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switch (css & 3) {
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case 0:
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fin = chip->cfg.slow_freq;
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cp = "slowclk";
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break;
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case 1:
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fin = chip->cfg.mainosc_freq;
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cp = "mainosc";
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break;
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case 2:
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fin = chip->cfg.plla_freq;
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cp = "plla";
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break;
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case 3:
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if (chip->cfg.CKGR_UCKR & (1 << 16)) {
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fin = 480 * 1000 * 1000;
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cp = "upll";
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} else {
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fin = 0;
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cp = "upll (*ERROR* UPLL is disabled)";
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}
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break;
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default:
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assert(0);
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break;
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case 0:
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fin = chip->cfg.slow_freq;
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cp = "slowclk";
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break;
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case 1:
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fin = chip->cfg.mainosc_freq;
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cp = "mainosc";
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break;
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case 2:
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fin = chip->cfg.plla_freq;
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cp = "plla";
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break;
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case 3:
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if (chip->cfg.CKGR_UCKR & (1 << 16)) {
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fin = 480 * 1000 * 1000;
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cp = "upll";
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} else {
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fin = 0;
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cp = "upll (*ERROR* UPLL is disabled)";
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}
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break;
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default:
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assert(0);
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break;
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}
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LOG_USER("%s (%3.03f Mhz)",
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@@ -2223,41 +2222,41 @@ static void sam4_explain_mckr(struct sam4_chip *chip)
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_tomhz(fin));
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pres = sam4_reg_fieldname(chip, "PRES", chip->cfg.PMC_MCKR, 4, 3);
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switch (pres & 0x07) {
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case 0:
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pdiv = 1;
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cp = "selected clock";
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break;
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case 1:
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pdiv = 2;
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cp = "clock/2";
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break;
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case 2:
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pdiv = 4;
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cp = "clock/4";
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break;
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case 3:
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pdiv = 8;
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cp = "clock/8";
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break;
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case 4:
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pdiv = 16;
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cp = "clock/16";
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break;
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case 5:
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pdiv = 32;
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cp = "clock/32";
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break;
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case 6:
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pdiv = 64;
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cp = "clock/64";
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break;
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case 7:
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pdiv = 6;
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cp = "clock/6";
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break;
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default:
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assert(0);
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break;
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case 0:
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pdiv = 1;
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cp = "selected clock";
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break;
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case 1:
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pdiv = 2;
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cp = "clock/2";
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break;
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case 2:
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pdiv = 4;
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cp = "clock/4";
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break;
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case 3:
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pdiv = 8;
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cp = "clock/8";
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break;
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case 4:
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pdiv = 16;
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cp = "clock/16";
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break;
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case 5:
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pdiv = 32;
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cp = "clock/32";
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break;
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case 6:
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pdiv = 64;
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cp = "clock/64";
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break;
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case 7:
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pdiv = 6;
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cp = "clock/6";
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break;
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default:
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assert(0);
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break;
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}
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LOG_USER("(%s)", cp);
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fin = fin / pdiv;
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@@ -2504,32 +2503,32 @@ FLASH_BANK_COMMAND_HANDLER(sam4_flash_bank_command)
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}
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switch (bank->base) {
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/* at91sam4s series only has bank 0*/
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/* at91sam4sd series has the same address for bank 0 (FLASH_BANK0_BASE_SD)*/
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case FLASH_BANK_BASE_S:
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case FLASH_BANK_BASE_C:
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bank->driver_priv = &chip->details.bank[0];
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bank->bank_number = 0;
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chip->details.bank[0].chip = chip;
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chip->details.bank[0].bank = bank;
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break;
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/* at91sam4s series only has bank 0*/
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/* at91sam4sd series has the same address for bank 0 (FLASH_BANK0_BASE_SD)*/
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case FLASH_BANK_BASE_S:
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case FLASH_BANK_BASE_C:
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bank->driver_priv = &chip->details.bank[0];
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bank->bank_number = 0;
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chip->details.bank[0].chip = chip;
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chip->details.bank[0].bank = bank;
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break;
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/* Bank 1 of at91sam4sd/at91sam4c32 series */
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case FLASH_BANK1_BASE_1024K_SD:
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case FLASH_BANK1_BASE_2048K_SD:
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case FLASH_BANK1_BASE_C32:
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bank->driver_priv = &chip->details.bank[1];
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bank->bank_number = 1;
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chip->details.bank[1].chip = chip;
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chip->details.bank[1].bank = bank;
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break;
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/* Bank 1 of at91sam4sd/at91sam4c32 series */
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case FLASH_BANK1_BASE_1024K_SD:
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case FLASH_BANK1_BASE_2048K_SD:
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case FLASH_BANK1_BASE_C32:
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bank->driver_priv = &chip->details.bank[1];
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bank->bank_number = 1;
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chip->details.bank[1].chip = chip;
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chip->details.bank[1].bank = bank;
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break;
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default:
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LOG_ERROR("Address " TARGET_ADDR_FMT " invalid bank address (try 0x%08x"
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"[at91sam4s series] )",
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bank->base,
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FLASH_BANK_BASE_S);
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return ERROR_FAIL;
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default:
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LOG_ERROR("Address " TARGET_ADDR_FMT " invalid bank address (try 0x%08x"
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"[at91sam4s series] )",
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bank->base,
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FLASH_BANK_BASE_S);
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return ERROR_FAIL;
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}
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/* we initialize after probing. */
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@@ -3122,22 +3121,22 @@ COMMAND_HANDLER(sam4_handle_gpnvm_command)
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}
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switch (CMD_ARGC) {
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case 0:
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goto showall;
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case 1:
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case 0:
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goto showall;
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case 1:
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who = -1;
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break;
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case 2:
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if ((strcmp(CMD_ARGV[0], "show") == 0) && (strcmp(CMD_ARGV[1], "all") == 0)) {
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who = -1;
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break;
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case 2:
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if ((strcmp(CMD_ARGV[0], "show") == 0) && (strcmp(CMD_ARGV[1], "all") == 0)) {
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who = -1;
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} else {
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uint32_t v32;
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COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], v32);
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who = v32;
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}
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break;
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default:
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return ERROR_COMMAND_SYNTAX_ERROR;
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} else {
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uint32_t v32;
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COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], v32);
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who = v32;
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}
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break;
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default:
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return ERROR_COMMAND_SYNTAX_ERROR;
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}
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if (strcmp("show", CMD_ARGV[0]) == 0) {
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@@ -3189,26 +3188,26 @@ COMMAND_HANDLER(sam4_handle_slowclk_command)
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return ERROR_OK;
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switch (CMD_ARGC) {
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case 0:
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/* show */
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break;
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case 1:
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{
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/* set */
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uint32_t v;
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COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], v);
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if (v > 200000) {
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/* absurd slow clock of 200Khz? */
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command_print(CMD, "Absurd/illegal slow clock freq: %d\n", (int)(v));
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return ERROR_COMMAND_SYNTAX_ERROR;
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}
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chip->cfg.slow_freq = v;
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break;
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}
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default:
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/* error */
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command_print(CMD, "Too many parameters");
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case 0:
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/* show */
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break;
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case 1:
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{
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/* set */
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uint32_t v;
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COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], v);
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if (v > 200000) {
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/* absurd slow clock of 200Khz? */
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command_print(CMD, "Absurd/illegal slow clock freq: %d\n", (int)(v));
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return ERROR_COMMAND_SYNTAX_ERROR;
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}
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chip->cfg.slow_freq = v;
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break;
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}
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default:
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/* error */
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command_print(CMD, "Too many parameters");
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return ERROR_COMMAND_SYNTAX_ERROR;
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}
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command_print(CMD, "Slowclk freq: %d.%03dkhz",
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(int)(chip->cfg.slow_freq / 1000),
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Reference in New Issue
Block a user