forked from auracaster/openocd
target: cortex-m: fix support for armv8m caches
Scan-build is unable to correctly follow the deferred loading of
queued read, finalized by the atomic write, thus it incorrectly
claims that the arrays d_u_ccsidr[] and i_ccsidr[] could carry
not initialized values:
armv7m_cache.c:154:31: warning: 1st function call argument
is an uninitialized value [core.CallAndMessage]
cache->arch[cl].d_u_size = decode_ccsidr(d_u_ccsidr[cl]);
armv7m_cache.c:172:29: warning: 1st function call argument
is an uninitialized value [core.CallAndMessage]
cache->arch[cl].i_size = decode_ccsidr(i_ccsidr[cl]);
Initialize the arrays to zero to hide these false positive.
Change-Id: I6d1e88093cb8807848643139647a571c1b566aa8
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 04da6e2c62 ("target: cortex-m: add support for armv8m caches")
Reviewed-on: https://review.openocd.org/c/openocd/+/9167
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
This commit is contained in:
@@ -111,7 +111,7 @@ int armv7m_identify_cache(struct target *target)
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clidr, cache->loc);
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// retrieve all available inner caches
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uint32_t d_u_ccsidr[8], i_ccsidr[8];
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uint32_t d_u_ccsidr[8] = {0}, i_ccsidr[8] = {0};
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for (unsigned int cl = 0; cl < cache->loc; cl++) {
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unsigned int ctype = FIELD_GET(CLIDR_CTYPE_MASK(cl + 1), clidr);
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