coding style: tcl: remove empty lines at end of text files

Empty lines at end of text files are useless. Remove them. Change-Id: I503cb0a96c7ccb132f4486c206a48831121d7abd Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5171 Tested-by: jenkins
2019-05-12 12:53:56 +02:00
parent c60252ac2b
commit 9e23c9ae35
94 changed files with 0 additions and 116 deletions
@@ -57,5 +57,3 @@ proc show_normalize_bitfield { VALUE MSB LSB } {
    echo [format "((0x%08x & 0x%08x) -> 0x%08x) >> %2d => (0x%x) %5d " $VALUE $m $mr $LSB $sr $sr]
   return $sr
 }
-
-
@@ -28,4 +28,3 @@ transport select swd
 adapter speed 400

 source [find target/adsp-sc58x.cfg]
-
@@ -16,4 +16,3 @@ source [find target/altera_fpgasoc.cfg]
 #usb_blaster_device_desc "USB-Blaster II"

 adapter speed 100
-
@@ -18,4 +18,3 @@ source [find target/amdm37x.cfg]
 reset_config trst_only

 # "amdm37x_dbginit am35x.cpu" needs to be run after init.
-
@@ -7,4 +7,3 @@ source [find target/samsung_s3c4510.cfg]
 #  Add (A) sdram configuration
 #  Add (B) flash cfi programing configuration
 #
-
@@ -162,4 +162,3 @@ arm7_9 fast_memory_access enable

 #set _FLASHNAME $_CHIPNAME.flash
 #flash bank $_FLASHNAME at91sam7 0 0 0 0 $_TARGETNAME 0 0 0 0 0 0 0 18432
-
@@ -216,4 +216,3 @@ proc at91sam9g20_reset_init { } {

 	mww 0xffffea04 0x0000039c
 }
-
@@ -4,5 +4,3 @@
 set CHIPNAME at91sam7s256

 source [find target/at91sam7sx.cfg]
-
-
@@ -1,4 +1,3 @@
 source [find target/at91sam3u4e.cfg]

 reset_config srst_only
-
@@ -6,4 +6,3 @@ set CHIPNAME bcm28155
 source [find target/bcm281xx.cfg]

 reset_config trst_and_srst
-
@@ -7,7 +7,3 @@ adapter srst pulse_width 40
 # the bank is 32-bits wide, two 16-bit chips in parallel
 set _FLASHNAME $_CHIPNAME.flash
 flash bank $_FLASHNAME cfi 0x00000000 0x02000000 2 4 $_TARGETNAME
-
-
-
-
@@ -143,5 +143,3 @@ proc dm365evm_init {} {

 	flashprobe
 }
-
-
@@ -91,4 +91,3 @@ $_TARGETNAME configure -event reset-init {
 	#
 	mww 0xfffffd08 0xa5000001
 }
-
@@ -151,4 +151,3 @@ proc enable_pll {} {
    mww 0xE01FC08C 0x000000AA       ;# PLLFEED
    mww 0xE01FC08C 0x00000055       ;# PLLFEED
 }
-
@@ -197,4 +197,3 @@ proc tonga2_init { } {
 #######################

 # TODO: Implement NAND support.
-
@@ -12,4 +12,3 @@ source [find target/lpc17xx.cfg]

 # startup @ 500kHz
 adapter speed 500
-
@@ -103,4 +103,3 @@ $_TARGETNAME configure -event reset-init {
  mww 0x600000CC 0x0000000C     ;# Bank7 WST2=8
  mww 0x600000C4 0x00000002     ;# Bank7 IDCY=2
 }
-
@@ -13,4 +13,3 @@ jtag newtap str750 cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id 0x4f1f0

 # for some reason this board like to startup @ 500kHz
 adapter speed 500
-
@@ -14,4 +14,3 @@ $_TARGETNAME configure -event reset-init {

 	flash probe 0
 }
-
@@ -274,5 +274,3 @@ proc at91sam9g45_init { } {

 	arm7_9 fast_memory_access enable
 }
-
-
@@ -5,4 +5,3 @@
 #

 source [find target/lpc17xx.cfg]
-
@@ -5,4 +5,3 @@
 #

 source [find target/lpc2148.cfg]
-
@@ -5,4 +5,3 @@ source [find target/ixp42x.cfg]
 # The _TARGETNAME is set by the above.

 $_TARGETNAME configure -work-area-phys 0x00020000 -work-area-size 0x10000 -work-area-backup 0
-
@@ -10,4 +10,3 @@ set CHIPNAME same54
 source [find target/atsame5x.cfg]

 reset_config srst_only
-
@@ -22,4 +22,3 @@ transport select jtag
 sysfsgpio_jtag_nums 136 139 137 138

 source [find cpld/xilinx-xc6s.cfg]
-
@@ -8,4 +8,3 @@
 #

 source [find target/lpc2378.cfg]
-
@@ -5,4 +5,3 @@
 #

 source [find target/lpc2148.cfg]
-
@@ -1,4 +1,3 @@
 # Olimex SAM7-EX256 has a single Atmel at91sam7ex256 on it.

 source [find target/sam7x256.cfg]
-
@@ -122,4 +122,3 @@ proc openrd_load_uboot { } {
 	resume 0x00600000

 }
-
@@ -133,4 +133,3 @@ proc sheevaplug_load_uboot { } {
 	resume 0x00600000

 }
-
@@ -9,4 +9,3 @@ source [find target/amdm37x.cfg]
 reset_config trst_only

 # "amdm37x_dbginit dm37x.cpu" needs to be run after init.
-
@@ -9,5 +9,3 @@ adapter speed 16000
 reset_config trst_and_srst

 source [find board/ti_beaglebone-base.cfg]
-
-
@@ -3,4 +3,3 @@ jtag_rclk 6000
 source [find target/omap4430.cfg]

 reset_config trst_and_srst
-
@@ -3,4 +3,3 @@ jtag_rclk 6000
 source [find target/omap4430.cfg]

 reset_config trst_only
-
@@ -3,4 +3,3 @@ jtag_rclk 6000
 source [find target/omap4460.cfg]

 reset_config trst_only
-
@@ -123,4 +123,3 @@ arm7_9 dcc_downloads enable       ;# Enable faster DCC downloads
 #flash bank <name> cfi <base> <size> <chip width> <bus width> <target>
 set _FLASHNAME $_CHIPNAME.flash
 flash bank $_FLASHNAME cfi 0x20000000 0x1000000 2 2 $_TARGETNAME
-
@@ -93,5 +93,3 @@ $_TARGETNAME configure -event reset-init {
 #flash bank <name> cfi <base> <size> <chip width> <bus width> <target>
 set _FLASHNAME $_CHIPNAME.flash
 flash bank $_FLASHNAME cfi 0x10000000 0x01000000 2 2 $_TARGETNAME
-
-
@@ -61,5 +61,3 @@ proc uptech2410_init { } {

 set _NANDNAME $_CHIPNAME.nand
 nand device $_NANDNAME s3c2410 $_TARGETNAME
-
-
@@ -28,4 +28,3 @@ scan_chain
 targets
 nand probe 0
 nand list
-
@@ -98,4 +98,3 @@ proc show_AIC { } {
 	}
    }
 }
-
@@ -108,5 +108,3 @@ set		AT91_MATRIX_EBI1_DBPUC		[expr (1 << 8)]	;# Data Bus Pull-up Configuration
 set		AT91_MATRIX_EBI1_VDDIOMSEL	[expr (1 << 16)]	;# Memory voltage selection
 set			AT91_MATRIX_EBI1_VDDIOMSEL_1_8V		[expr (0 << 16)]
 set			AT91_MATRIX_EBI1_VDDIOMSEL_3_3V		[expr (1 << 16)]
-
-
@@ -14,4 +14,3 @@ if [info exists AT91C_SLOWOSC_FREQ] {
    set AT91C_SLOWOSC_FREQ 32768
 }
 global AT91C_SLOWOSC_FREQ
-
@@ -53,4 +53,3 @@ proc show_RTTC { } {
    show_mmr32_reg RTTC_RTVR
    show_mmr32_reg RTTC_RTSR
 }
-
@@ -130,6 +130,3 @@ proc show_DBGU { } $str
 unset str

 proc show_DBGU_MR_helper { NAME ADDR VAL } { show_mmr_USx_MR_helper $NAME $ADDR $VAL }
-
-
-
@@ -3,4 +3,3 @@ set CPU_NAME   arm7tdmi
 set CPU_ARCH   armv4t
 set CPU_MAX_ADDRESS 0xFFFFFFFF
 set CPU_NBITS  32
-
@@ -3,4 +3,3 @@ set CPU_NAME   arm920
 set CPU_ARCH   armv4t
 set CPU_MAX_ADDRESS 0xFFFFFFFF
 set CPU_NBITS  32
-
@@ -3,4 +3,3 @@ set CPU_NAME   arm946
 set CPU_ARCH   armv5te
 set CPU_MAX_ADDRESS 0xFFFFFFFF
 set CPU_NBITS  32
-
@@ -3,4 +3,3 @@ set CPU_NAME   arm966
 set CPU_ARCH   armv5te
 set CPU_MAX_ADDRESS 0xFFFFFFFF
 set CPU_NBITS  32
-
@@ -3,4 +3,3 @@ set CPU_NAME   cortex_m3
 set CPU_ARCH   armv7
 set CPU_MAX_ADDRESS 0xFFFFFFFF
 set CPU_NBITS  32
-
@@ -5,4 +5,3 @@
 #

 adapter driver arm-jtag-ew
-
@@ -6,4 +6,3 @@

 adapter driver at91rm9200
 at91rm9200_device rea_ecr
-
@@ -23,4 +23,3 @@ buspirate_speed normal ;# or fast

 # this depends on the cable, you are safe with this option
 reset_config srst_only
-
@@ -8,4 +8,3 @@

 adapter srst delay 200
 jtag_ntrst_delay 200
-
@@ -6,4 +6,3 @@

 adapter driver parport
 parport_cable chameleon
-
@@ -3,4 +3,3 @@
 #

 adapter driver dummy
-
@@ -12,4 +12,3 @@ ftdi_vid_pid 0x0640 0x0026
 ftdi_layout_init 0x0388 0x038b
 ftdi_layout_signal nTRST -data 0x0100
 ftdi_layout_signal nSRST -data 0x0080 -noe 0x200
-
@@ -13,4 +13,3 @@ if { [info exists PARPORTADDR] } {
 adapter driver parport
 parport_port $_PARPORTADDR
 parport_cable dlc5
-
@@ -5,4 +5,3 @@
 #

 adapter driver rlink
-
@@ -14,4 +14,3 @@ hla_vid_pid 0x0483 0x3744 0x0483 0x3748 0x0483 0x374b 0x0483 0x374d 0x0483 0x374
 # number reset issues.
 # eg.
 #hla_serial "\xaa\xbc\x6e\x06\x50\x75\xff\x55\x17\x42\x19\x3f"
-
@@ -5,4 +5,3 @@
 #

 adapter driver vsllink
-
@@ -50,4 +50,3 @@ proc sc58x_enabledebug {} {
   # it is not possible to halt the target unless these bits have been set
   ap0.mem mww 0x31131000 0xFFFF
 }
-
@@ -209,4 +209,3 @@ proc amdm37x_dbginit {target} {
   # at this address and this bit.
   $target mww phys 0x5401d030 0x00002000
 }
-
@@ -54,4 +54,3 @@ $_TARGETNAME configure -work-area-phys 0xa0600000 -work-area-size 0x20000

 # serial SPI capable flash
 # flash bank <driver> <base> <size> <chip_width> <bus_width>
-
@@ -31,4 +31,3 @@ $_TARGETNAME configure -event reset-assert-post "armada370_dbginit $_TARGETNAME"
 # We need to init now, so we can run the apsel command.
 init
 dap apsel 1
-
@@ -7,5 +7,3 @@ flash bank $_FLASHNAME at91sam3 0x000080000 0 1 1 $_TARGETNAME
 # This is a 512K chip - it has the 2nd bank
 set _FLASHNAME $_CHIPNAME.flash1
 flash bank $_FLASHNAME at91sam3 0x0000C0000 0 1 1 $_TARGETNAME
-
-
@@ -8,4 +8,3 @@
 # at91sam3X8E
 # at91sam3X8H
 source [find target/at91sam3XXX.cfg]
-
@@ -4,5 +4,3 @@ source [find target/at91sam3uxx.cfg]
 # size is automatically "calculated" by probing
 set _FLASHNAME $_CHIPNAME.flash
 flash bank $_FLASHNAME at91sam3 0x000080000 0 1 1 $_TARGETNAME
-
-
@@ -4,5 +4,3 @@ source [find target/at91sam3uxx.cfg]
 # size is automatically "calculated" by probing
 set _FLASHNAME $_CHIPNAME.flash
 flash bank $_FLASHNAME at91sam3 0x000080000 0 1 1 $_TARGETNAME
-
-
@@ -4,5 +4,3 @@ source [find target/at91sam3uxx.cfg]
 # size is automatically "calculated" by probing
 set _FLASHNAME $_CHIPNAME.flash
 flash bank $_FLASHNAME at91sam3 0x000080000 0 1 1 $_TARGETNAME
-
-
@@ -4,5 +4,3 @@ source [find target/at91sam3uxx.cfg]
 # size is automatically "calculated" by probing
 set _FLASHNAME $_CHIPNAME.flash
 flash bank $_FLASHNAME at91sam3 0x000080000 0 1 1 $_TARGETNAME
-
-
@@ -7,5 +7,3 @@ flash bank $_FLASHNAME at91sam3 0x000080000 0 1 1 $_TARGETNAME
 # This is a 256K chip, it has the 2nd bank
 set _FLASHNAME $_CHIPNAME.flash1
 flash bank $_FLASHNAME at91sam3 0x000100000 0 1 1 $_TARGETNAME
-
-
@@ -7,5 +7,3 @@ flash bank $_FLASHNAME at91sam3 0x000080000 0 1 1 $_TARGETNAME
 # This is a 256K chip - it has the 2nd bank
 set _FLASHNAME $_CHIPNAME.flash1
 flash bank $_FLASHNAME at91sam3 0x000100000 0 1 1 $_TARGETNAME
-
-
@@ -8,4 +8,3 @@
 # at91sam3u1c

 source [find target/at91sam3XXX.cfg]
-
@@ -36,4 +36,3 @@ $_TARGETNAME configure -work-area-phys 0x00200000 -work-area-size 0x4000 -work-a
 #flash bank <driver> <base_addr> <size> <chip_width> <bus_width> <target_number> [<target_name> <banks> <sectors_per_bank> <pages_per_sector> <page_size> <num_nvmbits> <ext_freq_khz>]
 set _FLASHNAME $_CHIPNAME.flash
 flash bank $_FLASHNAME at91sam7 0 0 0 0 $_TARGETNAME 0 0 0 0 0 0 0 18432
-
@@ -57,4 +57,3 @@ if {![using_hla]} {

 set _FLASHNAME $_CHIPNAME.flash
 flash bank $_FLASHNAME atsamv 0x00400000 0 0 0 $_TARGETNAME
-
@@ -14,4 +14,3 @@ jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_CP

 set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
 target create $_TARGETNAME avr32_ap7k -endian $_ENDIAN -chain-position $_TARGETNAME
-
@@ -28,4 +28,3 @@ target create $_TARGETNAME fa526 -endian $_ENDIAN -chain-position $_TARGETNAME

 # This chip has a DCC ... use it
 arm7_9 dcc_downloads enable
-
@@ -28,4 +28,3 @@ target create $_TARGETNAME dragonite -endian $_ENDIAN -chain-position $_TARGETNA
 reset_config trst_and_srst
 adapter srst delay 200
 jtag_ntrst_delay 200
-
@@ -73,4 +73,3 @@ $_TARGETNAME configure -work-area-virt 0
 #setup flash
 set _FLASHNAME $_CHIPNAME.flash
 flash bank $_FLASHNAME dsp5680xx_flash 0 0 2 1 $_TARGETNAME
-
@@ -69,4 +69,3 @@ $_TARGETNAME configure -work-area-virt 0
 #setup flash
 set _FLASHNAME $_CHIPNAME.flash
 flash bank $_FLASHNAME dsp5680xx_flash 0 0 2 1 $_TARGETNAME
-
@@ -28,4 +28,3 @@ target create $_TARGETNAME feroceon -endian $_ENDIAN -chain-position $_TARGETNAM
 reset_config trst_and_srst
 adapter srst delay 200
 jtag_ntrst_delay 200
-
@@ -28,4 +28,3 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP
 # that TAP is associated with a target
 set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME
-
@@ -140,4 +140,3 @@ proc icepick_c_wreset {jrc} {
 	# send a router write, block is 0, register is 1, value is 0x2100
 	icepick_c_router $jrc 1 0x0 0x1 0x002101
 }
-
@@ -104,4 +104,3 @@ proc ixp42x_init_sdram { SDRAM_CFG REFRESH CASLAT } {
 proc ixp42x_set_bigendian { } {
    reg XSCALE_CTRL 0xF8
 }
-
@@ -79,4 +79,3 @@ if {[using_hla]} {
 $_TARGETNAME configure -event reset-init {
   kinetis disable_wdog
 }
-
@@ -38,4 +38,3 @@ Note that a target/xxx.cfg file can invoke another target/yyy.cfg file,
 so one can create target subtype configurations where e.g. only
 amount of DRAM, oscillator speeds differ and having a single
 config file for the default/common settings.
-
@@ -32,4 +32,3 @@ $_TARGETNAME configure -work-area-phys 0x200000 -work-area-size 0x4000 -work-are

 #reset configuration
 reset_config trst_and_srst
-
@@ -21,4 +21,3 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP

 set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
-
@@ -22,5 +22,3 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP

 set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
-
-
@@ -31,4 +31,3 @@ $_TARGETNAME configure -event reset-assert "arc_em_reset $_TARGETNAME"
 arc_em_init_regs

 # vim:ft=tcl
-
@@ -170,4 +170,3 @@ $_TARGETNAME configure -event reset-start {
 	# Reduce speed since CPU speed will slow down to 16MHz with the reset
 	adapter speed 2000
 }
-
@@ -51,4 +51,3 @@ $_TARGETNAME configure -work-area-phys 0xA0000000 -work-area-size 0x4000 -work-a
 #flash bank <driver> <base> <size> <chip_width> <bus_width>
 set _FLASHNAME $_CHIPNAME.flash
 flash bank $_FLASHNAME str7x 0x80000000 0x00040000 0 0 $_TARGETNAME STR73x
-
@@ -322,5 +322,3 @@ set mem inaccessible-by-default-off

 jtag_ntrst_delay 100
 reset_config trst_and_srst combined
-
-
@@ -27,4 +27,3 @@ mvb 0xE01FC040 0x01

 set _FLASHNAME $_CHIPNAME.flash
 flash bank $_FLASHNAME lpc2000 0x0 0x7d000 0 0 0 lpc2000_v2 14765
-