Version 0.3.1

Remove "-dev" tag

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>

.gitignore

@@ -3,35 +3,17 @@
 # build output
 .libs
 .deps
-.dirstamp
 *.o
-*.o.??????
 *.a
 *.lo
 *.la
 *.in
 
-# generated source files
-src/jtag/minidriver_imp.h
-src/jtag/jtag_minidriver.h
-
-# OpenULINK driver files generated by SDCC
-src/jtag/drivers/OpenULINK/*.rel
-src/jtag/drivers/OpenULINK/*.asm
-src/jtag/drivers/OpenULINK/*.lst
-src/jtag/drivers/OpenULINK/*.sym
-src/jtag/drivers/OpenULINK/*.map
-src/jtag/drivers/OpenULINK/*.mem
-src/jtag/drivers/OpenULINK/*.lk
-src/jtag/drivers/OpenULINK/*.ihx
-src/jtag/drivers/OpenULINK/*.rst
-
 # editor files
 *.swp
 
-src/startup.tcl
-startup_tcl.inc
-xscale_debug.inc
+startup_tcl.c
+xscale_debug.h
 
 bin2char
 bin2char.exe
@@ -78,23 +60,6 @@ stamp-vti
 INSTALL
 NOTES
 
-# coexist with quilt
-patches
-*.patch
-
 # Eclipse stuff
 .project
-.cproject
-.settings
 
-# Emacs temp files
-*~
-
-# Emacs TAGS file
-TAGS
-
-# CScope database files
-*cscope.out
-
-# ctags tag files
-tags

.gitmodules

@@ -1,6 +1,3 @@
 [submodule "tools/git2cl"]
 	path = tools/git2cl
-	url = http://repo.or.cz/r/git2cl.git
-[submodule "jimtcl"]
-	path = jimtcl
-	url = http://repo.or.cz/r/jimtcl.git
+	url = git://repo.or.cz/git2cl.git

BUGS

@@ -1,16 +1,10 @@
-// This file is part of the Doxygen Developer Manual
+// This file is part of the Doyxgen Developer Manual
 /** @page bugs Bug Reporting
 
 Please report bugs by subscribing to the OpenOCD mailing list and
 posting a message with your report:
 
-	openocd-devel@lists.sourceforge.net
-
-Also, please check the bug database to see if a ticket for
-the bug has already been opened.  You might be asked to open
-such a ticket, or to update an existing ticket with more data.
-
-	http://bugs.openocd.org/
+	openocd-development@lists.berlios.de
 
 To minimize work for OpenOCD developers, you should try to include
 all of the information listed below.  If you feel that some of the
@@ -28,12 +22,12 @@ that may be important.
 - If the report is for a regression:
   - Include logs for both working and broken versions.
   - Find the precise version that caused the regression by binary search.
-    You can use "git bisect" to expedite this binary search:
+    You can use "git bisect" to expedite this binary search:  
     http://www.kernel.org/pub/software/scm/git/docs/git-bisect.html
 
 If possible, please develop and attach a patch that helps to expose or
-solve the reported problem.  See the HACKING file for information
-about that process.
+solve the reported problem.  See the PATCHES file for more information
+for that process.
 
 Attach all files directly to your posting.  The mailing list knows to
 transform attachments to links, but attachments must be less than 300KB
@@ -42,7 +36,7 @@ in total.
 @section bugscrashdump Obtaining Crash Backtraces
 
 If OpenOCD is crashing, there are two very effective things you can do to
-improve your chances of getting help on the development mailing list.
+improve your chances of getting help on the development mailing list. 
 
 Try to reproduce the problem using the dummy JTAG interface to allow other developers to replicate
 your problem robustly and use GDB to get a trace:@par

COPYING

@@ -1,12 +1,12 @@
-                    GNU GENERAL PUBLIC LICENSE
-                       Version 2, June 1991
+		    GNU GENERAL PUBLIC LICENSE
+		       Version 2, June 1991
 
- Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
- 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
+ Copyright (C) 1989, 1991 Free Software Foundation, Inc.
+                       59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  Everyone is permitted to copy and distribute verbatim copies
  of this license document, but changing it is not allowed.
 
-                            Preamble
+			    Preamble
 
   The licenses for most software are designed to take away your
 freedom to share and change it.  By contrast, the GNU General Public
@@ -15,7 +15,7 @@ software--to make sure the software is free for all its users.  This
 General Public License applies to most of the Free Software
 Foundation's software and to any other program whose authors commit to
 using it.  (Some other Free Software Foundation software is covered by
-the GNU Lesser General Public License instead.)  You can apply it to
+the GNU Library General Public License instead.)  You can apply it to
 your programs, too.
 
   When we speak of free software, we are referring to freedom, not
@@ -55,8 +55,8 @@ patent must be licensed for everyone's free use or not licensed at all.
 
   The precise terms and conditions for copying, distribution and
 modification follow.
-
-                    GNU GENERAL PUBLIC LICENSE
+
+		    GNU GENERAL PUBLIC LICENSE
    TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
 
   0. This License applies to any program or other work which contains
@@ -110,7 +110,7 @@ above, provided that you also meet all of these conditions:
     License.  (Exception: if the Program itself is interactive but
     does not normally print such an announcement, your work based on
     the Program is not required to print an announcement.)
-
+
 These requirements apply to the modified work as a whole.  If
 identifiable sections of that work are not derived from the Program,
 and can be reasonably considered independent and separate works in
@@ -168,7 +168,7 @@ access to copy from a designated place, then offering equivalent
 access to copy the source code from the same place counts as
 distribution of the source code, even though third parties are not
 compelled to copy the source along with the object code.
-
+
   4. You may not copy, modify, sublicense, or distribute the Program
 except as expressly provided under this License.  Any attempt
 otherwise to copy, modify, sublicense or distribute the Program is
@@ -225,7 +225,7 @@ impose that choice.
 
 This section is intended to make thoroughly clear what is believed to
 be a consequence of the rest of this License.
-
+
   8. If the distribution and/or use of the Program is restricted in
 certain countries either by patents or by copyrighted interfaces, the
 original copyright holder who places the Program under this License
@@ -255,7 +255,7 @@ make exceptions for this.  Our decision will be guided by the two goals
 of preserving the free status of all derivatives of our free software and
 of promoting the sharing and reuse of software generally.
 
-                            NO WARRANTY
+			    NO WARRANTY
 
   11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
 FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW.  EXCEPT WHEN
@@ -277,9 +277,9 @@ YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
 PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
 POSSIBILITY OF SUCH DAMAGES.
 
-                     END OF TERMS AND CONDITIONS
-
-            How to Apply These Terms to Your New Programs
+		     END OF TERMS AND CONDITIONS
+
+	    How to Apply These Terms to Your New Programs
 
   If you develop a new program, and you want it to be of the greatest
 possible use to the public, the best way to achieve this is to make it
@@ -303,9 +303,10 @@ the "copyright" line and a pointer to where the full notice is found.
     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     GNU General Public License for more details.
 
-    You should have received a copy of the GNU General Public License along
-    with this program; if not, write to the Free Software Foundation, Inc.,
-    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+    You should have received a copy of the GNU General Public License
+    along with this program; if not, write to the Free Software
+    Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
 
 Also add information on how to contact you by electronic and paper mail.
 
@@ -335,5 +336,5 @@ necessary.  Here is a sample; alter the names:
 This General Public License does not permit incorporating your program into
 proprietary programs.  If your program is a subroutine library, you may
 consider it more useful to permit linking proprietary applications with the
-library.  If this is what you want to do, use the GNU Lesser General
+library.  If this is what you want to do, use the GNU Library General
 Public License instead of this License.

ChangeLog

@@ -1 +1 @@
-Retired in favor of git log.
+Retired in favour of SVN log.

Doxyfile.in

@@ -38,7 +38,7 @@ PROJECT_NUMBER         =
 # If a relative path is entered, it will be relative to the location
 # where doxygen was started. If left blank the current directory will be used.
 
-OUTPUT_DIRECTORY       = doxygen
+OUTPUT_DIRECTORY       =
 
 # If the CREATE_SUBDIRS tag is set to YES, then doxygen will create
 # 4096 sub-directories (in 2 levels) under the output directory of each output
@@ -307,13 +307,13 @@ EXTRACT_PRIVATE        = NO
 # If the EXTRACT_STATIC tag is set to YES all static members of a file
 # will be included in the documentation.
 
-EXTRACT_STATIC         = YES
+EXTRACT_STATIC         = NO
 
 # If the EXTRACT_LOCAL_CLASSES tag is set to YES classes (and structs)
 # defined locally in source files will be included in the documentation.
 # If set to NO only classes defined in header files are included.
 
-EXTRACT_LOCAL_CLASSES  = YES
+EXTRACT_LOCAL_CLASSES  = NO
 
 # This flag is only useful for Objective-C code. When set to YES local
 # methods, which are defined in the implementation section but not in
@@ -384,7 +384,7 @@ HIDE_SCOPE_NAMES       = NO
 # will put a list of the files that are included by a file in the documentation
 # of that file.
 
-SHOW_INCLUDE_FILES     = NO
+SHOW_INCLUDE_FILES     = YES
 
 # If the INLINE_INFO tag is set to YES (the default) then a tag [inline]
 # is inserted in the documentation for inline members.
@@ -403,7 +403,7 @@ SORT_MEMBER_DOCS       = YES
 # by member name. If set to NO (the default) the members will appear in
 # declaration order.
 
-SORT_BRIEF_DOCS        = YES
+SORT_BRIEF_DOCS        = NO
 
 # If the SORT_GROUP_NAMES tag is set to YES then doxygen will sort the
 # hierarchy of group names into alphabetical order. If set to NO (the default)
@@ -567,9 +567,9 @@ WARN_LOGFILE           =
 INPUT                  = @srcdir@/doc/manual \
                          @srcdir@/TODO \
                          @srcdir@/BUGS \
-                         @srcdir@/HACKING \
+                         @srcdir@/PATCHES \
                          @srcdir@/src \
-                         @builddir@/config.h
+                         @srcdir@/config.h
 
 # This tag can be used to specify the character encoding of the source files
 # that doxygen parses. Internally doxygen uses the UTF-8 encoding, which is
@@ -648,7 +648,7 @@ EXAMPLE_RECURSIVE      = NO
 # directories that contain image that are included in the documentation (see
 # the \image command).
 
-IMAGE_PATH             = @srcdir@/doc/manual/images
+IMAGE_PATH             =
 
 # The INPUT_FILTER tag can be used to specify a program that doxygen should
 # invoke to filter for each input file. Doxygen will invoke the filter program
@@ -692,13 +692,13 @@ SOURCE_BROWSER         = YES
 # Setting the INLINE_SOURCES tag to YES will include the body
 # of functions and classes directly in the documentation.
 
-INLINE_SOURCES         = NO
+INLINE_SOURCES         = YES
 
 # Setting the STRIP_CODE_COMMENTS tag to YES (the default) will instruct
 # doxygen to hide any special comment blocks from generated source code
 # fragments. Normal C and C++ comments will always remain visible.
 
-STRIP_CODE_COMMENTS    = YES
+STRIP_CODE_COMMENTS    = NO
 
 # If the REFERENCED_BY_RELATION tag is set to YES 
 # then for each documented function all documented
@@ -764,13 +764,13 @@ IGNORE_PREFIX          =
 # If the GENERATE_HTML tag is set to YES (the default) Doxygen will
 # generate HTML output.
 
-GENERATE_HTML          = @doxygen_as_html@
+GENERATE_HTML          = YES
 
 # The HTML_OUTPUT tag is used to specify where the HTML docs will be put.
 # If a relative path is entered the value of OUTPUT_DIRECTORY will be
 # put in front of it. If left blank `html' will be used as the default path.
 
-HTML_OUTPUT            = html
+HTML_OUTPUT            = doxygen
 
 # The HTML_FILE_EXTENSION tag can be used to specify the file extension for
 # each generated HTML page (for example: .htm,.php,.asp). If it is left blank
@@ -981,7 +981,7 @@ FORMULA_FONTSIZE       = 10
 # If the GENERATE_LATEX tag is set to YES (the default) Doxygen will
 # generate Latex output.
 
-GENERATE_LATEX         = @doxygen_as_pdf@
+GENERATE_LATEX         = NO
 
 # The LATEX_OUTPUT tag is used to specify where the LaTeX docs will be put.
 # If a relative path is entered the value of OUTPUT_DIRECTORY will be
@@ -992,7 +992,7 @@ LATEX_OUTPUT           = latex
 # The LATEX_CMD_NAME tag can be used to specify the LaTeX command name to be
 # invoked. If left blank `latex' will be used as the default command name.
 
-LATEX_CMD_NAME         = pdflatex
+LATEX_CMD_NAME         = latex
 
 # The MAKEINDEX_CMD_NAME tag can be used to specify the command name to
 # generate index for LaTeX. If left blank `makeindex' will be used as the
@@ -1004,7 +1004,7 @@ MAKEINDEX_CMD_NAME     = makeindex
 # LaTeX documents. This may be useful for small projects and may help to
 # save some trees in general.
 
-COMPACT_LATEX          = YES
+COMPACT_LATEX          = NO
 
 # The PAPER_TYPE tag can be used to set the paper type that is used
 # by the printer. Possible values are: a4, a4wide, letter, legal and
@@ -1029,20 +1029,20 @@ LATEX_HEADER           =
 # contain links (just like the HTML output) instead of page references
 # This makes the output suitable for online browsing using a pdf viewer.
 
-PDF_HYPERLINKS         = YES
+PDF_HYPERLINKS         = NO
 
 # If the USE_PDFLATEX tag is set to YES, pdflatex will be used instead of
 # plain latex in the generated Makefile. Set this option to YES to get a
 # higher quality PDF documentation.
 
-USE_PDFLATEX           = YES
+USE_PDFLATEX           = NO
 
 # If the LATEX_BATCHMODE tag is set to YES, doxygen will add the \\batchmode.
 # command to the generated LaTeX files. This will instruct LaTeX to keep
 # running if errors occur, instead of asking the user for help.
 # This option is also used when generating formulas in HTML.
 
-LATEX_BATCHMODE        = YES
+LATEX_BATCHMODE        = NO
 
 # If LATEX_HIDE_INDICES is set to YES then doxygen will not
 # include the index chapters (such as File Index, Compound Index, etc.)

HACKING

@@ -1,185 +0,0 @@
-// This file is part of the Doxygen Developer Manual
-/** @page patchguide Patch Guidelines
-
-\attention If you're behind a corporate wall with http only access to the
-world, you can still use these instructions!
-
-\attention You can't send patches to the mailing list anymore at all. Nowadays
-you are expected to send patches to the OpenOCD Gerrit GIT server for a
-review.
-
-@section gerrit Submitting patches to the OpenOCD Gerrit server
-
-OpenOCD is to some extent a "self service" open source project, so to
-contribute, you must follow the standard procedures to have the best
-possible chance to get your changes accepted.
-
-The procedure to create a patch is essentially:
-
-- make the changes
-- create a commit
-- send the changes to the Gerrit server for review
-- correct the patch and re-send it according to review feedback
-
-Your patch (or commit) should be a "good patch": focus it on a single
-issue, and make it be easily reviewable. Don't make
-it so large that it's hard to review; split large
-patches into smaller ones. (That can also help
-track down bugs later on.) All patches should
-be "clean", which includes preserving the existing
-coding style and updating documentation as needed.
-
-Say in the commit message if it's a bugfix (describe the bug) or a new
-feature. Don't expect patches to merge immediately
-for the next release. Be ready to rework patches
-in response to feedback.
-
-Add yourself to the GPL copyright for non-trivial changes.
-
-@section stepbystep Step by step procedure
-
--# Create a Gerrit account at: http://openocd.zylin.com
-  - On subsequent sign ins, use the full URL prefaced with 'http://'
-    For example: http://user_identifier.open_id_provider.com
-  -# Add a username to your profile.
-     After creating the Gerrit account and signing in, you will need to
-     add a username to your profile. To do this, go to 'Settings', and
-     add a username of your choice.
-     Your username will be required in step 3 and substituted wherever
-     the string 'USERNAME' is found.
-  -# Create an SSH public key following the directions on github:
-     https://help.github.com/articles/generating-ssh-keys . You can skip step 3
-     (adding key to Github account) and 4 (testing) - these are useful only if
-     you actually use Github or want to test whether the new key works fine.
-  -# Add this new SSH key to your Gerrit account:
-     go to 'Settings' > 'SSH Public Keys', paste the contents of
-     ~/.ssh/id_rsa.pub into the text field (if it's not visible click on
-     'Add Key ...' button) and confirm by clicking 'Add' button.
--# Clone the git repository, rather than just download the source:
- @code
- git clone git://git.code.sf.net/p/openocd/code openocd
- @endcode
-   or if you have problems with the "git:" protocol, use
-   the slower http protocol:
- @code
- git clone http://git.code.sf.net/p/openocd/code openocd
- @endcode
--# Set up Gerrit with your local repository. All this does it
-to instruct git locally how to send off the changes.
-  -# Add a new remote to git using Gerrit username:
-@code
-git remote add review ssh://USERNAME@openocd.zylin.com:29418/openocd.git
-git config remote.review.push HEAD:refs/publish/master
-@endcode
-  Or with http only:
-@code
-git remote add review http://USERNAME@openocd.zylin.com/p/openocd.git
-git config remote.review.push HEAD:refs/publish/master
-@endcode
-  The http password is configured from your gerrit settings - http://openocd.zylin.com/#/settings/http-password.
-  \note If you want to simplify http access you can also add your http password to the url as follows:
-@code
-git remote add review http://USERNAME:PASSWORD@openocd.zylin.com/p/openocd.git
-@endcode
-  -# You will need to install this hook, we will look into a better solution:
-@code
-scp -p -P 29418 USERNAME@openocd.zylin.com:hooks/commit-msg .git/hooks/
-@endcode
-  Or with http only:
-@code
-wget http://openocd.zylin.com/tools/hooks/commit-msg
-mv commit-msg .git/hooks
-chmod +x .git/hooks/commit-msg
-@endcode
-  \note A script exists to simplify the two items above. execute:
-@code
-tools/initial.sh <username>
-@endcode
-With @<username@> being your Gerrit username.
--# Set up git with your name and email:
-@code
-git config --global user.name "John Smith"
-git config --global user.email "john@smith.org"
-@endcode
--# Work on your patches. Split the work into
-   multiple small patches that can be reviewed and
-   applied seperately and safely to the OpenOCD
-   repository.
-@code
-while(!done) {
-  work - edit files using your favorite editor.
-  run "git commit -s -a" to commit all changes.
-  run tools/checkpatch.sh to verify your patch style is ok.
-}
-@endcode
-   \note use "git add ." before commit to add new files.
-
-   Comment template, notice the short first line w/topic. The topic field
-   should identify the main part or subsystem the patch touches. Check
-   git log for examples.
-@code
-topic: Short comment
-<blank line>
-Longer comments over several lines, explaining (where applicable) the
-reason for the patch and the general idea the solution is based on,
-any major design decisions, etc...
-<blank line>
-Signed-off-by: ...
-@endcode
--# Next you need to make sure that your patches
-   are on top of the latest stuff on the server and
-   that there are no conflicts:
-@code
-git pull --rebase origin master
-@endcode
--# Send the patches to the Gerrit server for review:
-@code
-git push review
-@endcode
--# Forgot something, want to add more? Just make the changes and do:
-@code
-git commit --amend
-git push review
-@endcode
-
-Further reading: http://www.coreboot.org/Git
-
-@section timeline When can I expect my contribution to be committed?
-
-The code review is intended to take as long as a week or two to allow
-maintainers and contributors who work on OpenOCD only in their spare
-time oportunity to perform a review and raise objections.
-
-With Gerrit much of the urgency of getting things committed has been
-removed as the work in progress is safely stored in Gerrit and
-available if someone needs to build on your work before it is
-submitted to the official repository.
-
-Another factor that contributes to the desire for longer cool-off
-times (the time a patch lies around without any further changes or
-comments), it means that the chances of quality regression on the
-master branch will be much reduced.
-
-If a contributor pushes a patch, it is considered good form if another
-contributor actually approves and submits that patch.
-
-It should be noted that a negative review in Gerrit ("-1" or "-2") may (but does
-not have to) be disregarded if all conditions listed below are met:
-
-- the concerns raised in the review have been addressed (or explained),
-- reviewer does not re-examine the change in a month,
-- reviewer does not answer e-mails for another month.
-
-@section browsing Browsing Patches
-All OpenOCD patches can be reviewed <a href="http://openocd.zylin.com/">here</a>.
-
-@section reviewing Reviewing Patches
-From the main <a href="http://openocd.zylin.com/#/q/status:open,n,z">Review
-page</a> select the patch you want to review and click on that patch. On the
-appearing page select the download method (top right). Apply the
-patch. After building and testing you can leave a note with the "Reply"
-button and mark the patch with -1, 0 and +1.
-*/
-/** @file
-This file contains the @ref patchguide page.
-*/

Makefile.am

@@ -2,36 +2,18 @@
 # have all needed files, that a GNU package needs
 AUTOMAKE_OPTIONS = gnu 1.6
 
-# make sure we pass the correct jimtcl flags to distcheck
-DISTCHECK_CONFIGURE_FLAGS = --disable-install-jim
-
 nobase_dist_pkgdata_DATA = \
 	contrib/libdcc/dcc_stdio.c \
 	contrib/libdcc/dcc_stdio.h \
 	contrib/libdcc/example.c \
 	contrib/libdcc/README \
-	contrib/99-openocd.rules
+	contrib/openocd.udev
 
-if INTERNAL_JIMTCL
-SUBDIRS = jimtcl
-else
-SUBDIRS =
-endif
-
-SUBDIRS += src doc
+SUBDIRS = src doc
 
 EXTRA_DIST = \
-	BUGS \
-	HACKING \
-	NEWTAPS \
-	README.Windows \
-	README.OSX \
-	$(wildcard $(srcdir)/NEWS*) \
 	Doxyfile.in \
-	tools/logger.pl \
-	tools/rlink_make_speed_table \
-	tools/st7_dtc_as \
-	contrib
+	tools/logger.pl
 
 libtool: $(LIBTOOL_DEPS)
 	$(SHELL) ./config.status --recheck
@@ -43,37 +25,19 @@ Doxyfile: $(srcdir)/Doxyfile.in
 	@( \
 	  echo "### @@@ -= DO NOT EDIT THIS FILE =- @@@ ###" && \
 	  echo "### @@@ Make changes to Doxyfile.in @@@ ###" && \
-	  sed -e 's,@srcdir\@,$(srcdir),' \
-	    -e 's,@builddir\@,$(builddir),' \
-	    -e 's,@doxygen_as_html\@,$(doxygen_as_html),' \
-	    -e 's,@doxygen_as_pdf\@,$(doxygen_as_pdf),' $< \
+	  sed -e 's,@srcdir\@,$(srcdir),' $< \
 	) > $@
 
-THE_MANUAL = doxygen/latex/refman.pdf
-
 doxygen::
 	$(MAKE) Doxyfile
 	doxygen Doxyfile 2>&1 | perl $(srcdir)/tools/logger.pl > doxygen.log
-	@if [ -f doxygen/latex/refman.tex ]; then \
-		echo "Creating $(THE_MANUAL)..."; \
-		$(MAKE) $(THE_MANUAL); \
-	else \
-		echo "Skipping Doxygen PDF..."; \
-	fi
-
-$(THE_MANUAL): %.pdf: %.tex
-	-cd $$(dirname $*) && pdflatex $$(basename $*)
-	-cd $$(dirname $*) && pdflatex $$(basename $*)
 
 TCL_PATH = tcl
 # command to find paths of script files, relative to TCL_PATH
-TCL_FILES = find $(srcdir)/$(TCL_PATH) -name '*.cfg' -o -name '*.tcl' -o -name '*.txt' | \
+TCL_FILES = find $(srcdir)/$(TCL_PATH) -name '*.cfg' -o -name '*.tcl' | \
 		sed -e 's,^$(srcdir)/$(TCL_PATH),,'
 
 dist-hook:
-	if test -d $(srcdir)/.git -a \( ! -e $(distdir)/ChangeLog -o -w $(distdir)/ChangeLog \) ; then \
-		git --git-dir $(srcdir)/.git log | $(srcdir)/tools/git2cl/git2cl > $(distdir)/ChangeLog ; \
-	fi
 	for i in $$($(TCL_FILES)); do \
 		j="$(distdir)/$(TCL_PATH)/$$i" && \
 		mkdir -p "$$(dirname $$j)" && \
@@ -90,9 +54,9 @@ install-data-hook:
 uninstall-hook:
 	rm -rf $(DESTDIR)$(pkgdatadir)/scripts
 
+
 distclean-local:
 	rm -rf Doxyfile doxygen
-	rm -f $(srcdir)/jimtcl/configure.gnu
 
 DISTCLEANFILES = doxygen.log
 

NEWS

@@ -1,109 +1,82 @@
-This file includes highlights of the changes made in the OpenOCD
-source archive release.
+This file should include highlights of the changes made in the
+OpenOCD openocd-0.3.0 source archive release.  See the repository
+history for details about what changed, including bugfixes and
+other issues not mentioned here.
 
 JTAG Layer:
-	* SWD support with FTDI, Versaloon, J-Link, sysfsgpio
-	* CMSIS-DAP massive speed and stability improvements
-	* Versaloon driver ported to libusb-1.0
-	* STLink can reestablish communication with a target that was
-          disconnected or rebooted
-	* STLink FAULT and WAIT SWD handling improved
-	* New hla_serial command to distinguish between several HLA
-          adapters attached to a single machine
-	* Serial number support for CMSIS-DAP and J-Link adapters
-	* Support for more J-Link adapters
-	* TAP autoprobing improvements
-	* Big speedup for SVF playback with USB Blaster
+    FT2232H (high speed USB) support doesn't need separate configuration
+    New FT2232H JTAG adapters:  Amontec, Olimex, Signalyzer
+    New reset_config options for SRST gating the JTAG clock (or not)
+    TAP declaration no longer requires ircapture and mask attributes
+    Scan chain setup should be more robust, with better diagnostics
+    New TAP events:
+	"post-reset" for TAP-invariant setup code (TAPs not usable yet)
+	"setup" for use once TAPs are addressable (e.g. with ICEpick)
+    Overridable Tcl "init_reset" and "jtag_init" procedures
+    Simple "autoprobe" mechanism to help simplify server setup
 
 Boundary Scan:
+    SVF bugfixes ... parsing fixes, better STATE switch conformance
+    XSVF bugfixes ... be more correct, handle Xilinx tool output
 
 Target Layer:
-	* Stability improvements for targets that get disconnected or
-          rebooted during a debug session
-	* MIPS speed and reliability improvements
-	* MIPS 1.5/2.0 fixes
-	* ARMv7-R improvements
-	* Cortex-A improvements, A7, A15 MPCores support
-	* FPU support for ARMv7-M (Cortex-M4F)
-	* TPIU/ITM support (including SWO/SWV tracing), can be
-          captured with external tools or STLink
-	* JTAG Serial Port (Advanced Debug System softcore) support
-	* Profiling support for OpenRISC
-	* ChibiOS/RT 3.0 support (with and without FPU)
-	* FreeRTOS current versions support
-	* Freescale MQX RTOS support
-	* GDB target description support for MIPS
-	* The last created target is auto-selected as the current
+    Warn on use of obsolete numeric target IDs
+    New commands for use with Cortex-M3 processors:
+	"cortex_m3 disassemble" ... Thumb2 disassembly (UAL format)
+	"cortex_m3 vector_catch" ... traps certain hardware faults
+		without tying up breakpoint resources
+    If you're willing to help debug it
+	VERY EARLY Cortex-A8 and ARMv7A support
+	Updated BeagleBoard.org hardware support
+	you may need to explicitly "reset" after connect-to-Beagle
+    New commands for use with XScale processors: "xscale vector_table"
+    ARM
+	bugfixes to single-stepping Thumb code
+	ETM: unavailable registers are not listed
+	ETB, ETM: report actual hardware status
+    ARM9
+	name change:  "arm9 vector_catch" not "arm9tdmi vector_catch"
+    ARM11
+	single stepping support for i.MX31
+	bugfix for missing "arm11" prefix on "arm11 memwrite ..."
+    GDB support
+	gdb_attach command is gone
 
 Flash Layer:
-	* nRF51 async loader to improve flashing performance and stability
-	* Cypress PSoC 41xx/42xx and CCG1 families flash driver
-	* Silabs SiM3 family flash driver
-	* Marvell Wireless Microcontroller SPI flash driver
-	* Kinetis mass erase (part unsecuring) implemented
-	* lpcspifi stability fixes
-	* STM32 family sync with reference manuals, L0 support, bugfixes
-	* LPC2000 driver automatically determines part and flash size
-	* NXP LPC11(x)xx, LPC13xx, LPC15xx, LPC8xx, LPC5410x, LPC407x support
-	* Atmel SAMD, SAMR, SAML21 devices support
-	* Atmel SAM4E16 support
-	* ZeroGecko family support
-	* TI Tiva C Blizzard and Snowflake families support
-	* Nuvoton NuMicro M051 support
+    The lpc2000 driver handles the new NXP LPC1700 (Cortex-M3) chips
+    New drivers:
+	lpc2900, for NXP LPC2900 chips (ARM968 based)
+	mx3_nand, for imx31
+    New "last" flag for NOR "flash erase_sector" and "flash protect"
+    The "nand erase N" command now erases all of bank N
+    Speed up davinci_nand by about 3x
 
 Board, Target, and Interface Configuration Scripts:
-	* Normal target configs can work with HLA (STLink, ICDI) adapters
-	* STM32 discovery and Nucleo boards configs
-	* Gumstix AeroCore board config
-	* General Plus GP326XXXA target config
-	* Micrel KS869x target config
-	* ASUS RT-N66U board config
-	* Atmel SAM4E-EK board config
-	* Atmel AT91SAM4L proper reset handling implemented
-	* TI OMAP/AM 3505, 3517 target configs
-	* nRF51822-mKIT board config
-	* RC Module К1879ХБ1Я target config
-	* TI TMDX570LS20SUSB board config
-	* TI TMS570 USB Kit board config
-	* TI CC2538, CC26xx target configs
-	* TI AM437x major config improvements, DDR support
-	* TI AM437X IDK board config
-	* TI SimpleLink Wi-Fi CC3200 LaunchPad configs
-	* Silicon Labs EM357, EM358 target configs
-	* Infineon XMC1000, XMC4000 family targets and boards configs
-	* Atheros AR9331 target config
-	* TP-LINK TL-MR3020 board config
-	* Alphascale asm9260t target and eval kit configs
-	* Olimex SAM7-LA2 (AT91SAM7A2) board config
-	* EFM32 Gecko boards configs
-	* Spansion FM4 target and SK-FM4-176L-S6E2CC board configs
-	* LPC1xxx target configs were restructured
-	* IoT-LAB debug adapter config
-	* DP BusBlaster KT-Link compatible config
-
-Server Layer:
-	* Polling period can be configured
-	* "shutdown" command has an immediate effect
-	* The "program" command doesn't lead to a shutdown by
-          default, use optional "exit" parameter for the old behaviour
-	* Proper OS signal handling was implemented
-	* Async target notifications for the Tcl RPC
+    Amontec JTAGkey2 support
+    Cleanup and additions for the TI/Luminary Stellaris scripts
+    LPC1768 target (and flash) support
+	Keil MCB1700 eval board
+    Samsung s3c2450
+	Mini2440 board
+    Numeric TAP and Target identifiers now trigger warnings
+    PXA255 partially enumerates
 
 Documentation:
+    Capture more debugging and setup advice
+    Notes on target source code changes that may help debugging
 
 Build and Release:
+    Repository moved from SVN at Berlios to GIT at SourceForge
+    Clean builds on (32-bit) Cygwin
+    Clean builds on 64-bit MinGW
 
-
-This release also contains a number of other important functional and
-cosmetic bugfixes. For more details about what has changed since the
-last release, see the git repository history:
-
-http://sourceforge.net/p/openocd/code/ci/v0.9.0/log/?path=
-
+For more details about what has changed since the last release,
+see the git repository history.  With gitweb, you can browse that
+in various levels of detail.
 
 For older NEWS, see the NEWS files associated with each release
 (i.e. NEWS-<version>).
 
 For more information about contributing test reports, bug fixes, or new
 features and device support, please read the new Developer Manual (or
-the BUGS and PATCHES.txt files in the source archive).
+the BUGS and PATCHES files in the source archive).

NEWS-0.2.0

@@ -9,7 +9,7 @@ must past stricter value checks, and many more error conditions have
 been handled correctly.  These efforts helped to make the 0.2.0 release
 more stable and robust, though some changes may expose latent bugs in
 your existing configuration scripts.
-
+ 
 This release does not maintain backward compatibility in all respects,
 so some target or configuration scripts may need to be updated.  In some
 cases, you may also see warnings; resolve those, because they indicate
@@ -20,7 +20,7 @@ The following areas of OpenOCD functionality changed in this release:
 JTAG Layer:
 - Improves modularity: core, TCL, driver commands, and interface have
   been separated, encapsulated, and documented for developers.  Mostly.
-- Improves JTAG TAP transition tables:
+- Improves JTAG TAP transition tables: 
    * Makes TAP paths variable length, rather than being fixed at 7 steps.
    * Fixes problems with some targets that did not like longer paths.
 - Improves JTAG driver/minidriver modularity and encapsulation.

NEWS-0.3.0

@@ -1,82 +0,0 @@
-This file should include highlights of the changes made in the
-OpenOCD openocd-0.3.0 source archive release.  See the repository
-history for details about what changed, including bugfixes and
-other issues not mentioned here.
-
-JTAG Layer:
-    FT2232H (high speed USB) support doesn't need separate configuration
-    New FT2232H JTAG adapters:  Amontec, Olimex, Signalyzer
-    New reset_config options for SRST gating the JTAG clock (or not)
-    TAP declaration no longer requires ircapture and mask attributes
-    Scan chain setup should be more robust, with better diagnostics
-    New TAP events:
-	"post-reset" for TAP-invariant setup code (TAPs not usable yet)
-	"setup" for use once TAPs are addressable (e.g. with ICEpick)
-    Overridable Tcl "init_reset" and "jtag_init" procedures
-    Simple "autoprobe" mechanism to help simplify server setup
-
-Boundary Scan:
-    SVF bugfixes ... parsing fixes, better STATE switch conformance
-    XSVF bugfixes ... be more correct, handle Xilinx tool output
-
-Target Layer:
-    Warn on use of obsolete numeric target IDs
-    New commands for use with Cortex-M3 processors:
-	"cortex_m3 disassemble" ... Thumb2 disassembly (UAL format)
-	"cortex_m3 vector_catch" ... traps certain hardware faults
-		without tying up breakpoint resources
-    If you're willing to help debug it
-	VERY EARLY Cortex-A8 and ARMv7A support
-	Updated BeagleBoard.org hardware support
-	you may need to explicitly "reset" after connect-to-Beagle
-    New commands for use with XScale processors: "xscale vector_table"
-    ARM
-	bugfixes to single-stepping Thumb code
-	ETM: unavailable registers are not listed
-	ETB, ETM: report actual hardware status
-    ARM9
-	name change:  "arm9 vector_catch" not "arm9tdmi vector_catch"
-    ARM11
-	single stepping support for i.MX31
-	bugfix for missing "arm11" prefix on "arm11 memwrite ..."
-    GDB support
-	gdb_attach command is gone
-
-Flash Layer:
-    The lpc2000 driver handles the new NXP LPC1700 (Cortex-M3) chips
-    New drivers:
-	lpc2900, for NXP LPC2900 chips (ARM968 based)
-	mx3_nand, for imx31
-    New "last" flag for NOR "flash erase_sector" and "flash protect"
-    The "nand erase N" command now erases all of bank N
-    Speed up davinci_nand by about 3x
-
-Board, Target, and Interface Configuration Scripts:
-    Amontec JTAGkey2 support
-    Cleanup and additions for the TI/Luminary Stellaris scripts
-    LPC1768 target (and flash) support
-	Keil MCB1700 eval board
-    Samsung s3c2450
-	Mini2440 board
-    Numeric TAP and Target identifiers now trigger warnings
-    PXA255 partially enumerates
-
-Documentation:
-    Capture more debugging and setup advice
-    Notes on target source code changes that may help debugging
-
-Build and Release:
-    Repository moved from SVN at Berlios to GIT at SourceForge
-    Clean builds on (32-bit) Cygwin
-    Clean builds on 64-bit MinGW
-
-For more details about what has changed since the last release,
-see the git repository history.  With gitweb, you can browse that
-in various levels of detail.
-
-For older NEWS, see the NEWS files associated with each release
-(i.e. NEWS-<version>).
-
-For more information about contributing test reports, bug fixes, or new
-features and device support, please read the new Developer Manual (or
-the BUGS and PATCHES files in the source archive).

NEWS-0.4.0

@@ -1,98 +0,0 @@
-This file includes highlights of the changes made in the
-OpenOCD 0.4.0 source archive release.  See the repository
-history for details about what changed, including bugfixes
-and other issues not mentioned here.
-
-JTAG Layer:
-	Support KT-Link JTAG adapter.
-	Support USB-JTAG, Altera USB-Blaster and compatibles.
-
-Boundary Scan:
-
-Target Layer:
-	General
-		- Removed commands which have been obsolete for at least
-		  a year (from both documentation and, sometimes, code).
-		- new "reset-assert" event, for systems without SRST
-	ARM
-		- supports "reset-assert" event (except on Cortex-M3)
-		- renamed "armv4_5" command prefix as "arm"
-		- recognize TrustZone "Secure Monitor" mode
-		- "arm regs" command output changed
-		- register names use "sp" not "r13"
-		- add top-level "mcr" and "mrc" commands, replacing
-		  various core-specific operations
-		- basic semihosting support (ARM7/ARM9 only, for now)
-	ARM11
-		- Should act much more like other ARM cores:
-		   * Preliminary ETM and ETB hookup
-		   * accelerated "flash erase_check"
-		   * accelerated GDB memory checksum
-		   * support "arm regs" command
-		   * can access all core modes and registers
-		   * watchpoint support
-		- Shares some core debug code with Cortex-A8
-	Cortex-A8
-		- Should act much more like other ARM cores:
-		   * support "arm regs" command
-		   * can access all core modes and registers
-		   * watchpoint support
-		- Shares some core debug code with ARM11
-	Cortex-M3
-		- Exposed DWT registers like cycle counter
-		- vector_catch settings not clobbered by resets
-		- no longer interferes with firmware's fault handling
-	ETM, ETB
-		- "trigger_percent" command moved ETM --> ETB
-		- "etm trigger_debug" command added
-	MIPS
-		- use fastdata writes
-	Freescale DSP563xx cores (partial support)
-
-Flash Layer:
-	'flash bank' and 'nand device' take <bank_name> as first argument.
-	With this, flash/NAND commands allow referencing banks by name:
-		- <bank_name>: reference the bank with its defined name
-		- <driver_name>[.N]: reference the driver's Nth bank
-	New 'nand verify' command to check bank against an image file.
-	The "flash erase_address" command now rejects partial sectors;
-		previously it would silently erase extra data.  If you
-		want to erase the rest of the first and/or last sectors
-		instead of failing, you must pass an explicit "pad" flag.
-	New at91sam9 NAND controller driver.
-	New s3c64xx NAND controller driver.
-
-Board, Target, and Interface Configuration Scripts:
-	ARM9
-		- ETM and ETB hookup for iMX2* targets
-	Add $HOME/.openocd to the search path.
-	Handle Rev C of LM3S811 eval boards.
-		- use "luminary-lm3s811.cfg" for older boards
-		- use "luminary.cfg" for RevC and newer
-
-Core Jim/TCL Scripting:
-	New 'usage' command to provide terse command help.
-	Improved command 'help' command output (sorted and indented).
-	Improved command handling:
-		- Most boolean settings now accept any of the following:
-		  on/off, enable/disable, true/false, yes/no, 1/0
-		- More error checking and reporting.
-
-Documentation:
-	New built-in command development documentation and primer.
-
-Build and Release:
-	Use --enable-doxygen-pdf to build PDF developer documentation.
-	Consider upgrading to libftdi 0.17 if you use that library; it
-		includes bugfixes which improve FT2232H support.
-
-For more details about what has changed since the last release,
-see the git repository history.  With gitweb, you can browse that
-in various levels of detail.
-
-For older NEWS, see the NEWS files associated with each release
-(i.e. NEWS-<version>).
-
-For more information about contributing test reports, bug fixes, or new
-features and device support, please read the new Developer Manual (or
-the BUGS and PATCHES.txt files in the source archive).

NEWS-0.5.0

@@ -1,74 +0,0 @@
-This file includes highlights of the changes made in the
-OpenOCD 0.5.0 source archive release.  See the repository
-history for details about what changed, including bugfixes
-and other issues not mentioned here.
-
-JTAG Layer:
-	New driver for "Bus Pirate"
-	Rename various commands so they're not JTAG-specific
-	   There are migration procedures for most of these, but you should
-	   convert your scripts to the new names, since those procedures
-	   will not be around forever.
-		jtag jinterface ... is now adapter_name
-	   	jtag_khz	... is now adapter_khz
-		jtag_nsrst_delay ... is now adapter_nsrst_delay
-		jtag_nsrst_assert_width ... is now adapter_nsrst_assert_width
-	Support Voipac VPACLink JTAG Adapter.
-
-Boundary Scan:
-
-Transport framework core ... supporting future work for SWD, SPI, and other
-non-JTAG ways to debug targets or program flash.
-
-Target Layer:
-	ARM:
-		- basic semihosting support for ARMv7M.
-		- renamed "armv7m" command prefix as "arm"
-	MIPS:
-		- "ejtag_srst" variant removed. The same functionality is
-		  obtained by using "reset_config none".
-		- added PIC32MX software reset support, this means srst is not
-		  required to be connected anymore.
-	OTHER:
-		- preliminary AVR32 AP7000 support.
-
-Flash Layer:
-	New "stellaris recover" command, implements the procedure
-		to recover locked devices (restoring non-volatile
-		state to the factory defaults, including erasing
-		the flash and its protection bits, and possibly
-		re-enabling hardware debugging).
-	PIC32MX now uses algorithm for flash programming, this
-		has increased the performance by approx 96%.
-	New 'pic32mx unlock' cmd to remove readout protection.
-	New STM32 Value Line Support.
-	New 'virtual' flash driver, used to associate other addresses
-		with a flash bank. See pic32mx.cfg for usage.
-	New iMX27 NAND flash controller driver.
-
-Board, Target, and Interface Configuration Scripts:
-	Support IAR LPC1768 kickstart board (by Olimex)
-	Support Voipac PXA270/PXA270M module.
-	New $PARPORTADDR tcl variable used to change default
-		parallel port address used.
-	Remove lm3s811.cfg; use "stellaris.cfg" instead
-
-Core Jim/TCL Scripting:
-	New "add_script_search_dir" command, behaviour is the same
-		as the "-s" cmd line option.
-
-Documentation:
-
-Build and Release:
-
-For more details about what has changed since the last release,
-see the git repository history.  With gitweb, you can browse that
-in various levels of detail.
-
-For older NEWS, see the NEWS files associated with each release
-(i.e. NEWS-<version>).
-
-For more information about contributing test reports, bug fixes, or new
-features and device support, please read the new Developer Manual (or
-the BUGS and PATCHES.txt files in the source archive).
-

NEWS-0.6.0

@@ -1,54 +0,0 @@
-This file includes highlights of the changes made in the
-OpenOCD  source archive release.  See the
-repository history for details about what changed, including
-bugfixes and other issues not mentioned here.
-
-JTAG Layer:
-	New STLINK V1/V2 JTAG/SWD adapter support.
-	New OSJTAG adapter support.
-	New Tincantools Flyswatter2 support.
-	Improved ULINK driver.
-	Improved RLINK driver.
-	Support for adapters based on FT232H chips.
-	New experimental driver for FTDI based adapters, using libusb-1.0 in asynchronous mode.
-
-Boundary Scan:
-
-Target Layer:
-	New Cortex-M0 support.
-	New Cortex-M4 support.
-	Improved Working area algorithm.
-	New RTOS support. Currently linux, FreeRTOS, ThreadX and eCos.
-	Connecting under reset to Cortex-Mx and MIPS chips.
-
-Flash Layer:
-	New SST39WF1601 support.
-	New EN29LV800BB support.
-	New async algorithm support for selected targets, stm32, stellaris and pic32.
-	New Atmel SAM3S, SAM3N support.
-	New ST STM32L support.
-	New Microchip PIC32MX1xx/2xx support.
-	New Freescale Kinetis K40 support.
-
-Board, Target, and Interface Configuration Scripts:
-	Support Dangerous Prototypes Bus Blaster.
-	Support ST SPEAr Family.
-	Support Gumstix Verdex boards.
-	Support TI Beaglebone.
-
-Documentation:
-	Improved HACKING info for submitting patches.
-	Fixed numerous broken links.
-
-Build and Release:
-
-For more details about what has changed since the last release,
-see the git repository history.  With gitweb, you can browse that
-in various levels of detail.
-
-For older NEWS, see the NEWS files associated with each release
-(i.e. NEWS-<version>).
-
-For more information about contributing test reports, bug fixes, or new
-features and device support, please read the new Developer Manual (or
-the BUGS and PATCHES.txt files in the source archive).

NEWS-0.7.0

@@ -1,43 +0,0 @@
-This file includes highlights of the changes made in the
-OpenOCD  source archive release.  See the
-repository history for details about what changed, including
-bugfixes and other issues not mentioned here.
-
-JTAG Layer:
-	New TI ICDI adapter support.
-	Support Latest OSBDM firmware.
-	Improved MIPS EJTAG Support.
-
-Boundary Scan:
-
-Target Layer:
-	New ARMv7R and Cortex-R4 support.
-	Added ChibiOS/RT support.
-
-Flash Layer:
-	New NXP LPC1850 support.
-	New NXP LPC4300 support.
-	New NXP SPIFI support.
-	New Energy Micro EFM32 support.
-	New ST STM32W support.
-	New ST STM32f2 write protection and lock/unlock support.
-	Ability to override STM32 flash bank size.
-
-Board, Target, and Interface Configuration Scripts:
-	Support Freescale i.MX6 series targets.
-
-Documentation:
-	New MIPS debugging info.
-
-Build and Release:
-
-For more details about what has changed since the last release,
-see the git repository history.  With gitweb, you can browse that
-in various levels of detail.
-
-For older NEWS, see the NEWS files associated with each release
-(i.e. NEWS-<version>).
-
-For more information about contributing test reports, bug fixes, or new
-features and device support, please read the new Developer Manual (or
-the BUGS and PATCHES.txt files in the source archive).

NEWS-0.8.0

@@ -1,111 +0,0 @@
-This file includes highlights of the changes made in the OpenOCD
-source archive release.
-
-JTAG Layer:
-	* New CMSIS-DAP driver
-	* Andes AICE debug adapter support
-	* New OpenJTAG driver
-	* New BCM2835 (RaspberryPi) driver
-	* JTAG VPI client driver (for OpenRISC Reference Platform SoC)
-	* Xilinx BSCAN_* for OpenRISC support
-	* ST-LINKv2-1 support
-	* ST-LINKv2 SWO tracing support (UART emulation)
-	* JLink-OB (onboard) support
-	* Altera USB Blaster driver rewrite, initial Blaster II
-	  support
-	* ULINK driver ported to libusb-1.0, OpenULINK build fixes
-	* Support up to 64 bit IR lengths
-	* SVF playback (FPGA programming) fixes
-	* "ftdi" interface driver got extensive testing and is now
-	  recommended over the old ft2232 implementation
-
-Boundary Scan:
-
-Target Layer:
-	* New target: Andes nds32
-	* New target: OpenRISC OR1K
-	* New target: Intel Quark X10xx
-	* MIPS EJTAG 1.5/2.0 support
-	* MIPS speed improvements
-	* Cortex-M, Cortex-A (MEM-AP, APB-AP) targets working with BE
-	  hosts now
-	* XScale vector_catch support, reset fixes
-	* dsp563xx ad-hoc breakpoint/watchpoint support
-	* RTOS support for embKernel
-	* Target profiling improvements
-	* Memory access functions testbench
-
-Flash Layer:
-	* STM32 family sync with reference manuals, other bugfixes
-	* STM32F401, STM32F07x support
-	* Atmel SAM4L, SAMG5x support
-	* at91sam3sd8{a,b}, at91sam3s8{a,b,c}, at91sam4s,
-	  at91sam3n0{a,b,0a,0b} support, bugfixes
-	* Atmel SAMD support
-	* Milandr 1986ВЕ* support
-	* Kinetis KL, K21 support
-	* Nuvoton NuMicro MINI5{1,2,4} support
-	* Nuvoton NUC910 series support
-	* NXP LPC43xx, LPC2000 fixes
-	* NXP LPC800, LPC810 support
-	* More ATmega parts supported
-	* Fujitsu MB9Ax family support
-	* EFM32 Wonder Gecko family support
-	* Nordic nRF51 support
-
-Board, Target, and Interface Configuration Scripts:
-	* STM32W108xx generic target config
-	* STM32F429 discovery board config
-	* STM32 Nucleo boards configs
-	* DENX M53EVK board config
-	* Altera Cyclone V SoC, SoCkit config
-	* New TI Launchpads board configs
-	* TI am43xx devices, AM437x GP EVM, AM438x ePOS EVM board
-	  configs
-	* Marvell Armada 370 family initial support
-	* TI TMDX570LS31USB (TMS570, Cortex-R4) support scripts
-	* Freescale FRDM-KL25Z, KL46Z board configs
-	* Digilent Zedboard config
-	* Asus RT-N16, Linksys WRT54GL, BT HomeHub board configs
-	* Atmel Xplained initial support
-	* Broadcom bcm28155_ap board config
-	* TUMPA, TUMPA Lite interface configs
-	* Digilent JTAG-SMT2 interface config
-	* New RAM testing functions
-	* Easy-to-use firmware recovery helpers targetting ordinary
-	  users with common equipment
-
-Server Layer:
-	* Auto-generation of GDB target description for ARMv7-M,
-	  ARM4, nds32, OR1K, Quark
-	* GDB File-I/O Remote Protocol extension support
-	* Default GDB flashing events handlers to initialise and reset
-	  the target automatically when "load" is used
-
-Documentation:
-	* Extensive README* changes
-	* The official User's Guide was proofread
-	* Example cross-build script
-	* RTOS documentation improvements
-	* Tcl RPC documentation and examples added
-
-Build and Release:
-	* *BSD, OS X, clang, ARM, windows build fixes
-	* New pkg-config support changes the way libusb (and other
-	  dependencies) are handled. Many adapter drivers are now
-	  selected automatically during the configure stage.
-
-
-This release also contains a number of other important functional and
-cosmetic bugfixes. For more details about what has changed since the
-last release, see the git repository history:
-
-http://sourceforge.net/p/openocd/code/ci/v0.8.0/log/?path=
-
-
-For older NEWS, see the NEWS files associated with each release
-(i.e. NEWS-<version>).
-
-For more information about contributing test reports, bug fixes, or new
-features and device support, please read the new Developer Manual (or
-the BUGS and PATCHES.txt files in the source archive).

NEWTAPS

@@ -4,7 +4,7 @@ Reporting Unknown JTAG TAP IDS
 If OpenOCD reports an UNKNOWN or Unexpected Tap ID please report it to
 the development mailing list - However - keep reading.
 
-openocd-devel@lists.sourceforge.net.
+openocd-development@lists.berlios.de.
 
 ========================================
 
@@ -30,7 +30,7 @@ Version Number Changes:
   not a big deal.  Please do report this information.  We'd like to
   know about it.
 
-  For example
+  For example 
 
 Error:  ERROR: Tap: s3c4510.cpu - Expected id: 0x3f0f0f0f, Got: 0x1f0f0f0f
 Error:  ERROR: expected: mfg: 0x787, part: 0xf0f0, ver: 0x3
@@ -39,7 +39,7 @@ Error:  ERROR:      got: mfg: 0x787, part: 0xf0f0, ver: 0x1
 ========================================
 
 Updating the Tap ID number your self
-
+ 
   Why do this? You just want the warning to go away.  And don't want
   to update your version/instance of OpenOCD.
 
@@ -79,11 +79,11 @@ Examples:
     0x3f0f0f0f - is a newer ARM7TDMI
     0x3ba00477 - is an ARM cortex M3
 
-Some chips have multiple JTAG taps - be sure to list
+Some chips have multiple JTAG taps - be sure to list 
 each one individually - ORDER is important!
 
 ========================================
-B) The maker of the part
+B) The maker of the part 
 
 Examples:
     Xilinx, Atmel, ST Micro Systems, Freescale
@@ -94,7 +94,7 @@ C) The family of parts it belongs to
 Examples:
    "NXP LPC Series"
    "Atmel SAM7 Series"
-
+   
 ========================================
 
 D) The actual part number on the package
@@ -121,7 +121,7 @@ For example: A consumer GPS unit or a cellphone
         ie: Olimex, LogicPD, Freescale(eval board)
 
 ========================================
-
+	 
 (G)   Identifying information on the board.
 
       Not good:   "iar red ST eval board"
@@ -135,11 +135,3 @@ For example: A consumer GPS unit or a cellphone
     ie: An FPGA or CPLD ...
 
 ========================================
-
-(I) What target config files need updating?
-
-    In fact it's best if you submit a patch with those
-    updates.  Most of the other information listed here
-    is just to help create a good patch.
-
-========================================

PATCHES

@@ -0,0 +1,47 @@
+// This file is part of the Doyxgen Developer Manual
+/** @page patchguide Patch Guidelines
+
+Please mail patches to: @par
+	openocd-development@lists.berlios.de
+
+Note that you can't send patches to that list unless
+you're a member, despite what the list info page says.
+
+@section Patch Guidelines in a Nutshell
+
+Your patches should be against git mainline.  Submit output
+of "git diff"; equivalently, quilt patches are OK.
+
+It should be a "good patch": focus it on a single
+issue, and make it be easily reviewable. Don't make
+it so large that it's hard to review; split large
+patches into smaller ones. (That can also help
+track down bugs later on.) All patches should
+be "clean", which includes preserving the existing
+coding style and updating documentation as needed.j
+
+Attach the patch to the email as a .txt file and
+also write a short change log entry that maintainers
+can copy and paste into the commit message
+
+Say if it's a bugfix (describe the bug) or a new
+feature. Don't expect patches to merge immediately
+for the next release. Be ready to rework patches
+in response to feedback.
+
+Add yourself to the GPL copyright for non-trivial changes.
+
+To create a patch from the command line:
+@code 
+	git diff >mypatch.txt
+@endcode
+
+@section More Information on Patching
+
+The @ref primerpatches provides a more complete guide to creating,
+managing, and contributing patches to the OpenOCD project.
+
+ */
+/** @file
+This file contains the @ref patchguide page.
+*/

README

@@ -2,87 +2,45 @@ Welcome to OpenOCD!
 ===================
 
 OpenOCD provides on-chip programming and debugging support with a
-layered architecture of JTAG interface and TAP support including:
-
-- (X)SVF playback to faciliate automated boundary scan and FPGA/CPLD
-  programming;
-- debug target support (e.g. ARM, MIPS): single-stepping,
-  breakpoints/watchpoints, gprof profiling, etc;
-- flash chip drivers (e.g. CFI, NAND, internal flash);
-- embedded TCL interpreter for easy scripting.
-
-Several network interfaces are available for interacting with OpenOCD:
-telnet, TCL, and GDB. The GDB server enables OpenOCD to function as a
-"remote target" for source-level debugging of embedded systems using
-the GNU GDB program (and the others who talk GDB protocol, e.g. IDA
-Pro).
+layered architecture of JTAG interface and TAP support, debug target
+support (e.g. ARM, MIPS), and flash chip drivers (e.g. CFI, NAND, etc.).
+Several network interfaces are available for interactiving with OpenOCD:
+HTTP, telnet, TCL, and GDB.  The GDB server enables OpenOCD to function
+as a "remote target" for source-level debugging of embedded systems
+using the GNU GDB program.
 
 This README file contains an overview of the following topics:
-
-- quickstart instructions,
 - how to find and build more OpenOCD documentation,
-- list of the supported hardware,
-- the installation and build process,
+- the build process
 - packaging tips.
-
-
-============================
-Quickstart for the impatient
-============================
-
-If you have a popular board then just start OpenOCD with its config,
-e.g.:
-
-  openocd -f board/stm32f4discovery.cfg
-
-If you are connecting a particular adapter with some specific target,
-you need to source both the jtag interface and the target configs,
-e.g.:
-
-  openocd -f interface/ftdi/jtagkey2.cfg -c "transport select jtag" \
-          -f target/ti_calypso.cfg
-
-  openocd -f interface/stlink-v2-1.cfg -c "transport select hla_swd" \
-          -f target/stm32l0.cfg
-
-NB: when using an FTDI-based adapter you should prefer configs in the
-ftdi directory; the old configs for the ft2232 are deprecated.
-
-After OpenOCD startup, connect GDB with
-
-  (gdb) target extended-remote localhost:3333
-
+- configuration options
 
 =====================
 OpenOCD Documentation
 =====================
 
-In addition to the in-tree documentation, the latest manuals may be
-viewed online at the following URLs:
+In addition to in-tree documentation, the latest documentation may be
+viewed on-line at the following URLs:
 
-  OpenOCD User's Guide:
-    http://openocd.org/doc/html/index.html
+ OpenOCD User's Guide:
+    http://openocd.berlios.de/doc/html/index.html
 
-  OpenOCD Developer's Manual:
-    http://openocd.org/doc/doxygen/html/index.html
+ OpenOCD Developer's Manual:
+    http://openocd.berlios.de/doc/doxygen/index.html
 
 These reflect the latest development versions, so the following section
 introduces how to build the complete documentation from the package.
 
+
 For more information, refer to these documents or contact the developers
 by subscribing to the OpenOCD developer mailing list:
 
-	openocd-devel@lists.sourceforge.net
+	openocd-development@lists.berlios.de
 
 Building the OpenOCD Documentation
 ----------------------------------
 
-By default the OpenOCD build process prepares documentation in the
-"Info format" and installs it the standard way, so that "info openocd"
-can access it.
-
-Additionally, the OpenOCD User's Guide can be produced in the
-following different formats:
+The OpenOCD User's Guide can be produced in two different format:
 
   # If PDFVIEWER is set, this creates and views the PDF User Guide.
   make pdf && ${PDFVIEWER} doc/openocd.pdf
@@ -94,49 +52,24 @@ The OpenOCD Developer Manual contains information about the internal
 architecture and other details about the code:
 
   # NB! make sure doxygen is installed, type doxygen --version
-  make doxygen && ${HTMLVIEWER} doxygen/index.html
+  make doxygen
 
+  # If HTMLVIEWER is set, this views the HTML Doxygen output.
+  ${HTMLVIEWER} doxygen/index.html
 
-==================
-Supported hardware
-==================
-
-JTAG adapters
--------------
-
-AICE, ARM-JTAG-EW, ARM-USB-OCD, ARM-USB-TINY, AT91RM9200, axm0432,
-BCM2835, Bus Blaster, Buspirate, Chameleon, CMSIS-DAP, Cortino, DENX,
-Digilent JTAG-SMT2, DLC 5, DLP-USB1232H, embedded projects, eStick,
-FlashLINK, FlossJTAG, Flyswatter, Flyswatter2, Gateworks, Hoegl, ICDI,
-ICEBear, J-Link, JTAG VPI, JTAGkey, JTAGkey2, JTAG-lock-pick, KT-Link,
-Lisa/L, LPC1768-Stick, MiniModule, NGX, NXHX, OOCDLink, Opendous,
-OpenJTAG, Openmoko, OpenRD, OSBDM, Presto, Redbee, RLink, SheevaPlug
-devkit, Stellaris evkits, ST-LINK (SWO tracing supported),
-STM32-PerformanceStick, STR9-comStick, sysfsgpio, TUMPA, Turtelizer,
-ULINK, USB-A9260, USB-Blaster, USB-JTAG, USBprog, VPACLink, VSLLink,
-Wiggler, XDS100v2, Xverve.
-
-Debug targets
--------------
-
-ARM11, ARM7, ARM9, AVR32, Cortex-A, Cortex-R, Cortex-M,
-Feroceon/Dragonite, DSP563xx, DSP5680xx, FA526, MIPS EJTAG, NDS32,
-XScale, Intel Quark.
-
-Flash drivers
--------------
-
-ADUC702x, AT91SAM, AVR, CFI, DSP5680xx, EFM32, EM357, FM3, Kinetis,
-LPC8xx/LPC1xxx/LPC2xxx/LPC541xx, LPC2900, LPCSPIFI, Marvell QSPI,
-Milandr, NuMicro, PIC32mx, PSoC4, SiM3x, Stellaris, STM32, STMSMI,
-STR7x, STR9x, nRF51; NAND controllers of AT91SAM9, LPC3180, LPC32xx,
-i.MX31, MXC, NUC910, Orion/Kirkwood, S3C24xx, S3C6400.
-
+The remaining sections describe how to configure the system such that
+you can build the in-tree documentation.
 
 ==================
 Installing OpenOCD
 ==================
 
+On Linux, you may have permissions problems to address.  The best
+way to do this is to use the contrib/udev.rules file.  It probably
+belongs somewhere in /etc/udev/rules.d, but consult your operating
+system documentation to be sure.  In particular, make sure that it
+matches the syntax used by your operating system's version of udev.
+
 A Note to OpenOCD Users
 -----------------------
 
@@ -144,14 +77,13 @@ If you would rather be working "with" OpenOCD rather than "on" it, your
 operating system or JTAG interface supplier may provide binaries for
 you in a convenient-enough package.
 
-Such packages may be more stable than git mainline, where
-bleeding-edge development takes place. These "Packagers" produce
-binary releases of OpenOCD after the developers produces new "release"
-versions of the source code. Previous versions of OpenOCD cannot be
-used to diagnose problems with the current release, so users are
-encouraged to keep in contact with their distribution package
-maintainers or interface vendors to ensure suitable upgrades appear
-regularly.
+Such packages may be more stable than git mainline, where bleeding-edge
+development takes place.  These "Packagers" produce binary releases of
+OpenOCD after the developers produces new "release" versions of the
+source code.  Previous versions of OpenOCD cannot be used to diagnose
+problems with the current release, so users are encouraged to keep in
+contact with their distribution package maintainers or interface vendors
+to ensure suitable upgrades appear regularly.
 
 Users of these binary versions of OpenOCD must contact their Packager to
 ask for support or newer versions of the binaries; the OpenOCD
@@ -162,9 +94,10 @@ A Note to OpenOCD Packagers
 
 You are a PACKAGER of OpenOCD if you:
 
-- Sell dongles and include pre-built binaries;
-- Supply tools or IDEs (a development solution integrating OpenOCD);
-- Build packages (e.g. RPM or DEB files for a GNU/Linux distribution).
+- Sell dongles: and include pre-built binaries
+- Supply tools: A complete development solution
+- Supply IDEs: like Eclipse, or RHIDE, etc.
+- Build packages: RPM files, or DEB files for a Linux Distro
 
 As a PACKAGER, you will experience first reports of most issues.
 When you fix those problems for your users, your solution may help
@@ -178,25 +111,21 @@ resolved in our future releases.
 That said, the OpenOCD developers would also like you to follow a few
 suggestions:
 
-- Send patches, including config files, upstream, participate in the
-  discussions;
-- Enable all the options OpenOCD supports, even those unrelated to your
-  particular hardware;
-- Use "ftdi" interface adapter driver for the FTDI-based devices.
-
-As a PACKAGER, never link against the FTD2XX library, as the resulting
-binaries can't be legally distributed, due to the restrictions of the
-GPL.
+- Send patches, including config files, upstream.
+- Always build with printer ports enabled.
+- Use libftdi + libusb for FT2232 support.
 
+Remember, the FTD2XX library cannot be used in binary distributions, due
+to restrictions of the GPL v2.
 
 ================
 Building OpenOCD
 ================
 
 The INSTALL file contains generic instructions for running 'configure'
-and compiling the OpenOCD source code. That file is provided by
-default for all GNU autotools packages. If you are not familiar with
-the GNU autotools, then you should read those instructions first.
+and compiling the OpenOCD source code.  That file is provided by default
+for all GNU automake packages.  If you are not familiar with the GNU
+autotools, then you should read those instructions first.
 
 The remainder of this document tries to provide some instructions for
 those looking for a quick-install.
@@ -204,122 +133,214 @@ those looking for a quick-install.
 OpenOCD Dependencies
 --------------------
 
-GCC or Clang is currently required to build OpenOCD. The developers
-have begun to enforce strict code warnings (-Wall, -Werror, -Wextra,
-and more) and use C99-specific features: inline functions, named
-initializers, mixing declarations with code, and other tricks. While
-it may be possible to use other compilers, they must be somewhat
-modern and could require extending support to conditionally remove
-GCC-specific extensions.
+Presently, GCC is required to build OpenOCD.  The developers have begun
+to enforce strict code warnings (-Wall, -Werror, -Wextra, and more) and
+use C99-specific features: inline functions, named initializers, mixing
+declarations with code, and other tricks.  While it may be possible to
+use other compilers, they must be somewhat modern and could require
+extending support to conditionally remove GCC-specific extensions.
 
-You'll also need:
+Also, you need to install the appropriate driver files, if you want to
+build support for a USB or FTDI-based interface:
 
-- make
-- libtool
-- pkg-config >= 0.23 (or compatible)
+- ft2232, jlink, rlink, vsllink, usbprog, arm-jtag-ew:
+  - libusb: required for portable communication with USB dongles
+- ft2232 also requires:
+  - libftdi: http://www.intra2net.com/opensource/ftdi/  *OR*
+  - ftd2xx: http://www.ftdichip.com/Drivers/D2XX.htm,
+    or the Amontec version (from http://www.amontec.com), for
+    easier support of JTAGkey's vendor and product IDs.
 
-Additionally, for building from git:
-
-- autoconf >= 2.64
-- automake >= 1.9
-- texinfo
-
-USB-based adapters depend on libusb-1.0 and some older drivers require
-libusb-0.1 or libusb-compat-0.1. A compatible implementation, such as
-FreeBSD's, additionally needs the corresponding .pc files.
-
-USB-Blaster, ASIX Presto, OpenJTAG and ft2232 interface adapter
-drivers need either one of:
-  - libftdi: http://www.intra2net.com/en/developer/libftdi/index.php
-  - ftd2xx: http://www.ftdichip.com/Drivers/D2XX.htm (proprietary,
-    GPL-incompatible)
-
-CMSIS-DAP support needs HIDAPI library.
-
-Permissions delegation
-----------------------
-
-Running OpenOCD with root/administrative permissions is strongly
-discouraged for security reasons.
-
-For USB devices on GNU/Linux you should use the contrib/99-openocd.rules
-file. It probably belongs somewhere in /etc/udev/rules.d, but
-consult your operating system documentation to be sure. Do not forget
-to add yourself to the "plugdev" group.
-
-For parallel port adapters on GNU/Linux and FreeBSD please change your
-"ppdev" (parport* or ppi*) device node permissions accordingly.
-
-For parport adapters on Windows you need to run install_giveio.bat
-(it's also possible to use "ioperm" with Cygwin instead) to give
-ordinary users permissions for accessing the "LPT" registers directly.
+Many Linux distributions provide these packages through their automated
+installation and update mechanisms; however, some Linux versions include
+older versions of libftdi.  In particular, using Ubuntu 8.04 has been
+problematic, but newer versions of Ubuntu do not have this problem.
 
 Compiling OpenOCD
 -----------------
 
-To build OpenOCD, use the following sequence of commands:
+To build OpenOCD (on both Linux and Cygwin), use the following sequence
+of commands:
 
-  ./bootstrap (when building from the git repository)
-  ./configure [options]
-  make
-  sudo make install
+   ./configure [with some options listed in the next section]
+   make
+   make install
 
-The 'configure' step generates the Makefiles required to build
-OpenOCD, usually with one or more options provided to it. The first
-'make' step will build OpenOCD and place the final executable in
-'./src/'. The final (optional) step, ``make install'', places all of
-the files in the required location.
+The 'configure' step generates the Makefiles required to build OpenOCD,
+usually with one or more options provided to it.  The first 'make' step
+will build OpenOCD and place the final executable in ./src/.  The
+final (optional) step, ``make install'', places all of the files in the
+required location.
 
-To see the list of all the supported options, run
-  ./configure --help
-
-Cross-compiling Options
+Cross-Compiling Options
 -----------------------
 
-Cross-compiling is supported the standard autotools way, you just need
-to specify the cross-compiling target triplet in the --host option,
-e.g. for cross-building for Windows 32-bit with MinGW on Debian:
+To cross-compile, you must specify both --build and --host options to
+the 'configure' script.  For example, you can configure OpenOCD to
+cross-compile on a x86 Linux host to run on Windows (MinGW32), you could
+use the following configuration options:
 
-  ./configure --host=i686-w64-mingw32 [options]
+  ./configure --build=i686-pc-linux-gnu --host=i586-mingw32msvc ...
 
-To make pkg-config work nicely for cross-compiling, you might need an
-additional wrapper script as described at
+Likewise, the following options allow OpenOCD to be cross-compiled for
+an ARM target on the same x86 host:
 
-  http://www.flameeyes.eu/autotools-mythbuster/pkgconfig/cross-compiling.html
+  ./configure --build=i686-pc-linux-gnu --host=arm-elf ...
 
-This is needed to tell pkg-config where to look for the target
-libraries that OpenOCD depends on. Alternatively, you can specify
-*_CFLAGS and *_LIBS environment variables directly, see "./configure
---help" for the details.
+Both must be specified to work around bugs in autoconf.
+
+Scripts for producing ARM cross-compilers can be found on the web with a
+little searching.  A script to produce an x86 Linux-hosted MinGW32
+cross-compiler can be downloaded from the following URL:
+
+  http://www.mingw.org/wiki/LinuxCrossMinGW
+
+Configuration Options
+---------------------
+
+The configure script takes numerous options, specifying which JTAG
+interfaces should be included (among other things).  The following list
+of options was extracted from the output of './configure --help'.  Other
+options may be available there:
+
+  --enable-maintainer-mode  enable make rules and dependencies not useful
+                          (and sometimes confusing) to the casual installer
+			  NOTE: This option is *required* for GIT builds!
+			  It should *not* be used to build a release.
+
+  --enable-dummy          Enable building the dummy JTAG port driver
+
+  --enable-ft2232_libftdi Enable building support for FT2232 based devices
+                          using the libftdi driver, opensource alternate of
+                          FTD2XX
+  --enable-ft2232_ftd2xx  Enable building support for FT2232 based devices
+                          using the FTD2XX driver from ftdichip.com
+
+  --enable-gw16012        Enable building support for the Gateworks GW16012
+                          JTAG Programmer
+
+  --enable-parport        Enable building the pc parallel port driver
+  --disable-parport-ppdev Disable use of ppdev (/dev/parportN) for parport
+                          (for x86 only)
+  --enable-parport-giveio Enable use of giveio for parport (for CygWin only)
+
+  --enable-presto_libftdi Enable building support for ASIX Presto Programmer
+                          using the libftdi driver
+  --enable-presto_ftd2xx  Enable building support for ASIX Presto Programmer
+                          using the FTD2XX driver
+
+  --enable-amtjtagaccel   Enable building the Amontec JTAG-Accelerator driver
+  --enable-arm-jtag-ew    Enable building support for the Olimex ARM-JTAG-EW
+                          Programmer
+  --enable-jlink          Enable building support for the Segger J-Link JTAG
+                          Programmer
+  --enable-rlink          Enable building support for the Raisonance RLink
+                          JTAG Programmer
+  --enable-usbprog        Enable building support for the usbprog JTAG
+                          Programmer
+  --enable-vsllink        Enable building support for the Versaloon-Link JTAG
+                          Programmer
+
+  --enable-oocd_trace     Enable building support for the OpenOCD+trace ETM
+                          capture device
+
+  --enable-ep93xx         Enable building support for EP93xx based SBCs
+  --enable-at91rm9200     Enable building support for AT91RM9200 based SBCs
+
+  --enable-ecosboard      Enable building support for eCos based JTAG debugger
+  --enable-zy1000         Enable ZY1000 interface
+
+  --enable-minidriver-dummy
+                          Enable the dummy minidriver.
+
+  --enable-ioutil         Enable ioutil functions - useful for standalone
+                          OpenOCD implementations
+  --enable-httpd          Enable builtin httpd server - useful for standalone
+                          OpenOCD implementations
+
+Miscellaneous Configure Options
+-------------------------------
+
+The following additional options may also be useful:
+
+  --disable-assert        turn off assertions
+
+  --enable-verbose        Enable verbose JTAG I/O messages (for debugging).
+  --enable-verbose-jtag-io
+                          Enable verbose JTAG I/O messages (for debugging).
+  --enable-verbose-usb-io Enable verbose USB I/O messages (for debugging)
+  --enable-verbose-usb-comms
+                          Enable verbose USB communication messages (for
+                          debugging)
+  --enable-malloc-logging Include free space in logging messages (requires
+                          malloc.h).
+
+  --disable-gccwarnings   Disable extra gcc warnings during build.
+  --disable-wextra        Disable extra compiler warnings
+  --disable-werror        Do not treat warnings as errors
+
+  --disable-option-checking
+                          Ignore unrecognized --enable and --with options.
+  --disable-dependency-tracking  speeds up one-time build
+  --enable-shared[=PKGS]  build shared libraries [default=no]
+  --enable-static[=PKGS]  build static libraries [default=yes]
 
 Parallel Port Dongles
 ---------------------
 
 If you want to access the parallel port using the PPDEV interface you
 have to specify both --enable-parport AND --enable-parport-ppdev, since the
-the later option is an option to the parport driver.
+the later option is an option to the parport driver (see
+http://forum.sparkfun.com/viewtopic.php?t=3795 for more info).
 
-The same is true for the --enable-parport-giveio option, you have to
-use both the --enable-parport AND the --enable-parport-giveio option
-if you want to use giveio instead of ioperm parallel port access
+The same is true for the --enable-parport-giveio option, you
+have to use both the --enable-parport AND the --enable-parport-giveio
+option if you want to use giveio instead of ioperm parallel port access
 method.
 
+FT2232C Based USB Dongles
+-------------------------
+
+There are 2 methods of using the FTD2232, either (1) using the
+FTDICHIP.COM closed source driver, or (2) the open (and free) driver
+libftdi.
+
+Using LIBFTDI
+-------------
+
+The libftdi source code can be download from the following website:
+
+  http://www.intra2net.com/en/developer/libftdi/download.php
+
+For both Linux and Windows, both libusb and libftdi must be built and
+installed.  To use the newer FT2232H chips, supporting RTCK and USB high
+speed (480 Mbps), you need libftdi version 0.16 or newer.  Many Linux
+distributions provide suitable packages for these libraries.
+
+For Windows, libftdi is supported with versions 0.14 and later.
+
+With these prerequisites met, configure the libftdi solution like this:
+
+  ./configure --prefix=/path/for/your/install --enable-ft2232_libftdi
+
+Then type ``make'', and perhaps ``make install''.
+
 Using FTDI's FTD2XX
 -------------------
 
-The (closed source) FTDICHIP.COM solution is faster than libftdi on
-Windows. That is the motivation for supporting it even though its
-licensing restricts it to non-redistributable OpenOCD binaries, and it
-is not available for all operating systems used with OpenOCD. You may,
-however, build such copies for personal use.
+The (closed source) FTDICHIP.COM solution is faster on MS-Windows.  That
+is the motivation for supporting it even though its licensing restricts
+it to non-redistributable OpenOCD binaries, and it is not available for
+all operating systems used with OpenOCD.  You may, however, build such
+copies for personal use.
 
 The FTDICHIP drivers come as either a (win32) ZIP file, or a (Linux)
-TAR.GZ file. You must unpack them ``some where'' convenient. As of this
+TAR.GZ file. You must unpack them ``some where'' convient. As of this
 writing FTDICHIP does not supply means to install these files "in an
 appropriate place."
 
-You should use the following ./configure options to make use of
-FTD2XX:
+If your distribution does not package these, there are several
+'./configure' options to solve this problem:
 
   --with-ftd2xx-win32-zipdir
                           Where (CYGWIN/MINGW) the zip file from ftdichip.com
@@ -327,18 +348,34 @@ FTD2XX:
   --with-ftd2xx-linux-tardir
                           Where (Linux/Unix) the tar file from ftdichip.com
                           was unpacked <default=search>
-  --with-ftd2xx-lib=(static|shared)
-                          Use static or shared ftd2xx libs (default is static)
+  --with-ftd2xx-lib       Use static or shared ftd2xx libs on default static
+
+If you are using the FTDICHIP.COM driver, download and unpack the
+Windows or Linux FTD2xx drivers from the following location:
+
+	http://www.ftdichip.com/Drivers/D2XX.htm
 
 Remember, this library is binary-only, while OpenOCD is licenced
-according to GNU GPLv2 without any exceptions. That means that
-_distributing_ copies of OpenOCD built with the FTDI code would
-violate the OpenOCD licensing terms.
+according to GNU GPLv2 without any exceptions.  That means that
+_distributing_ copies of OpenOCD built with the FTDI code would violate
+the OpenOCD licensing terms.
+
+Linux Notes
+***********
+
+The Linux tar.gz archive contains a directory named libftd2xx0.4.16
+(or similar).  Assuming that you have extracted this archive in the same
+directory as the OpenOCD package, you could configure with options like
+the following:
+
+   ./configure \
+        --enable-ft2232_ftd2xx \
+        --with-ft2xx-linux-tardir=../libftd2xx0.4.16 \
+	... other options ...
 
 Note that on Linux there is no good reason to use these FTDI binaries;
 they are no faster (on Linux) than libftdi, and cause licensing issues.
 
-
 ==========================
 Obtaining OpenOCD From GIT
 ==========================
@@ -346,7 +383,7 @@ Obtaining OpenOCD From GIT
 You can download the current GIT version with a GIT client of your
 choice from the main repository:
 
-   git://git.code.sf.net/p/openocd/code
+   git://openocd.git.sourceforge.net/gitroot/openocd/openocd
 
 You may prefer to use a mirror:
 
@@ -357,16 +394,29 @@ Using the GIT command line client, you might use the following command
 to set up a local copy of the current repository (make sure there is no
 directory called "openocd" in the current directory):
 
-   git clone git://git.code.sf.net/p/openocd/code openocd
+   git clone git://openocd.git.sourceforge.net/gitroot/openocd/openocd
 
 Then you can update that at your convenience using
 
    git pull
 
 There is also a gitweb interface, which you can use either to browse
-the repository or to download arbitrary snapshots using HTTP:
+the repository or to downlad arbitrary snapshots using HTTP:
 
+   http://openocd.git.sourceforge.net/git/gitweb.cgi?p=openocd/openocd
    http://repo.or.cz/w/openocd.git
 
 Snapshots are compressed tarballs of the source tree, about 1.3 MBytes
 each at this writing.
+
+
+Tips For Building From a GIT Repository
+---------------------------------------
+
+Building OpenOCD from a repository requires a recent version of the GNU
+autotools (autoconf >= 2.59 and automake >= 1.9).
+
+1) Run './bootstrap' to create the 'configure' script and prepare
+   the build process for your host system.
+
+2) Run './configure --enable-maintainer-mode' with other options.

README.OSX

@@ -1,49 +0,0 @@
-Building OpenOCD for OSX
-------------------------
-
-There are a few prerequisites you will need first:
-
-- Xcode 5 (install from the AppStore)
-- Command Line Tools (install from Xcode 5 -> Preferences -> Downloads)
-- Gentoo Prefix (http://www.gentoo.org/proj/en/gentoo-alt/prefix/bootstrap.xml)
-  or
-- Homebrew (http://mxcl.github.io/homebrew/)
-  or
-- MacPorts (http://www.macports.org/install.php)
-
-
-With Gentoo Prefix you can build the release version or the latest
-devel version (-9999) the usual way described in the Gentoo
-documentation. Alternatively, install the prerequisites and build
-manually from the sources.
-
-
-With Homebrew you can either run:
-  brew install [--HEAD] openocd (where optional --HEAD asks brew to
-                                 install the current git version)
-    or
-  brew install libtool automake libusb [libusb-compat] [hidapi] [libftdi]
-    (to install the needed dependencies and then proceed with the
-     manual building procedure)
-
-
-For building with MacPorts you need to run:
-  sudo port install libtool automake autoconf pkgconfig \
-    libusb [libusb-compat] [libftdi1]
-
-You should also specify LDFLAGS and CPPFLAGS to allow configure to use
-MacPorts' libraries, so run configure like this:
-  LDFLAGS=-L/opt/local/lib CPPFLAGS=-I/opt/local/include ./configure [options]
-
-
-See README for the generic building instructions.
-
-If you're using a USB adapter and have a driver kext matched to it,
-you will need to unload it prior to running OpenOCD. E.g. with Apple
-driver (OS X 10.9 or later) for FTDI run:
-  sudo kextunload -b com.apple.driver.AppleUSBFTDI
-for FTDI vendor driver use:
-  sudo kextunload FTDIUSBSerialDriver.kext
-
-To learn more on the topic please refer to the official libusb FAQ:
-https://github.com/libusb/libusb/wiki/FAQ

README.Win32

@@ -0,0 +1,98 @@
+Building OpenOCD for Windows
+----------------------------
+
+For building on Windows, you have to use CygWin. Make sure that your
+PATH environment variable contains no other locations with Unix utilities
+(like UnxUtils).  Those tools can't handle the CygWin paths, resulting
+in obscure dependency errors.  This was an observation gathered from the
+logs of one user; please correct us if this is wrong.
+
+The following URL is a good reference if you want to build OpenOCD
+under CygWin:
+
+	http://forum.sparkfun.com/viewtopic.php?t=11221
+
+Alternatively you can build the Windows binary under Linux using
+MinGW cross compiler. The following documents some tips of
+using this cross build option.
+
+libusb-win32
+------------
+
+You can choose to use the libusb-win32 binary distribution from
+its SourceForge page. As of this writing, the latest version
+is 0.1.12.2. This is the recommend version to use since it fixed
+an issue with USB composite device and this is important for FTDI
+based JTAG debuggers.
+
+	http://sourceforge.net/projects/libusb-win32/
+
+You need to download the libusb-win32-device-bin-0.1.12.2.tar.gz 
+package.  Extract this file into a temp directory. 
+
+Copy the file libusb-win32-device-bin-0.1.12.2\include\usb.h
+to your MinGW include directory.
+
+Copy the library libusb-win32-device-bin-0.1.12.2\lib\gcc\libusb.a
+to your MinGW library directory.
+
+Take note that different Linux distributions often have different MinGW
+installation directory.  Some of them also put the library and include
+into a separate sys-root directory.
+
+When the libusb-win32 repository is more current than its release code,
+you could build that instead.
+
+These are the instruction from the libusb-win32 Makefile:
+
+# If you're cross-compiling and your mingw32 tools are called
+# i586-mingw32msvc-gcc and so on, then you can compile libusb-win32
+# by running
+#    make host_prefix=i586-mingw32msvc all
+
+libftdi
+-------
+
+The author does not provide Windows binary. You can build it from a
+released source tarball or the git tree.
+
+If you are using the git tree, the following are the instructions from
+README.mingw. You will need to have the cmake utility installed.
+
+- Edit Toolchain-mingw32.cmake to point to the correct MinGW 
+  installation.
+- Create a build directory like "mkdir build-win32", e.g in ../libftdi/
+- cd into that directory and run  
+  "cmake -DCMAKE_TOOLCHAIN_FILE=../Toolchain-mingw32.cmake .."
+- Copy src/ftdi.h to your MinGW include directory.
+- Copy build-win32/src/*.a to your MinGW lib directory.
+
+libftd2xx
+---------
+
+The Cygwin/Win32 ZIP file contains a directory named ftd2xx.win32.
+After being extracted, the directory does not need further preparation.
+Instead, its path must be provided to the --with-ftd2xx-win32-zipdir
+configure option, as shown in the next section.
+
+OpenOCD
+-------
+
+Now you can build OpenOCD under Linux using MinGW.  You need to use
+--build and --host configure options.
+
+To use libftdi:
+
+  ./configure --build=i686-pc-linux-gnu --host=i586-mingw32msvc \
+        --enable-ft2232_libftdi \
+        ... other options ...
+
+To use ftd2xx:
+
+  ./configure --build=i686-pc-linux-gnu --host=i586-mingw32msvc \
+        --enable-ft2232_ftd2xx \
+        --with-ftd2xx-win32-zipdir=/path/to/libftd2xx-win32 \
+        ... other options ...
+
+If you are using the GIT repository, see the README file for additional
+instructions about configuring and building OpenOCD.

README.Windows

@@ -1,60 +0,0 @@
-Building OpenOCD for Windows
-----------------------------
-
-You can build OpenOCD for Windows natively with either MinGW-w64/MSYS
-or Cygwin (plain MinGW might work with --disable-werror but is not
-recommended as it doesn't provide enough C99 compatibility).
-Alternatively, one can cross-compile it using MinGW-w64 on a *nix
-host. See README for the generic instructions.
-
-Also, the MSYS2 project provides both ready-made binaries and an easy
-way to self-compile from their software repository out of the box.
-
-Native MinGW-w64/MSYS compilation
------------------------------
-
-As MSYS doesn't come with pkg-config pre-installed, you need to add it
-manually. The easiest way to do that is to download pkg-config-lite
-from:
-
-  http://sourceforge.net/projects/pkgconfiglite/
-
-Then simply unzip the archive to the root directory of your MinGW-w64
-installation.
-
-USB adapters
-------------
-
-For the adapters that use a HID-based protocol, e.g. CMSIS-DAP, you do
-not need to perform any additional configuration.
-
-For all the others you usually need to have WinUSB.sys (or
-libusbK.sys) driver installed. Some vendor software (e.g. for
-ST-LINKv2) does it on its own. For the other cases the easiest way to
-assign WinUSB to a device is to use the latest Zadig installer:
-
-  http://zadig.akeo.ie
-
-When using a composite USB device, it's often necessary to assign
-WinUSB.sys to the composite parent instead of the specific
-interface. To do that one needs to activate an advanced option in the
-Zadig installer.
-
-For the old drivers that use libusb-0.1 API you might need to link
-against libusb-win32 headers and install the corresponding driver with
-Zadig.
-
-If you need to use the same adapter with other applications that may
-require another driver, a solution for Windows Vista and above is to
-activate the IgnoreHWSerNum registry setting for the USB device.
-
-That setting forces Windows to associate the driver per port instead of
-per serial number, the same behaviour as when the device does not contain
-a serial number. So different drivers can be installed for the adapter on
-different ports and you just need to plug the adapter into the correct
-port depending on which application to use.
-
-For more information, see:
-
-  http://msdn.microsoft.com/en-us/library/windows/hardware/jj649944(v=vs.85).aspx
-  http://www.ftdichip.com/Support/Knowledgebase/index.html?ignorehardwareserialnumber.htm

TODO

@@ -1,4 +1,4 @@
-// This file is part of the Doxygen Developer Manual
+// This file is part of the Doyxgen Developer Manual
 /** @page tasks Pending and Open Tasks
 
 This page lists pending and open tasks being considered or worked upon
@@ -27,8 +27,8 @@ This section provides possible things to improve with OpenOCD's TCL support.
   parameters.  Currently variables assigned through one such parameter
   command/script are unset before the next one is invoked.
 
-- Isolate all TCL command support:
-  - Pure C CLI implementations using --disable-builtin-tcl.
+- Isolate all TCL command support: 
+  - Pure C CLI implementations using --disable-builtin-tcl. 
     - Allow developers to build new dongles using OpenOCD's JTAG core.
     - At first, provide only low-level JTAG support; target layer and
       above rely heavily on scripting event mechanisms.
@@ -46,7 +46,7 @@ This section list issues that need to be resolved in the JTAG layer.
 The following tasks have been suggested for cleaning up the JTAG layer:
 
 - use tap_set_state everywhere to allow logging TAP state transitions
-- Encapsulate cmd_queue_cur_state and related variable handling.
+- Encapsulate cmd_queue_cur_state and related varaible handling.
 - add slick 32 bit versions of jtag_add_xxx_scan() that avoids
 buf_set_u32() calls and other evidence of poor impedance match between
 API and calling code. New API should cut down # of lines in calling
@@ -85,7 +85,7 @@ There are some known bugs to fix in JTAG adapter drivers:
   Workaround: use "tms_sequence long" @par
   https://lists.berlios.de/pipermail/openocd-development/2009-July/009426.html
 
-The following tasks have been suggested for improving OpenOCD's JTAG
+The following tasks have been suggeted for improving OpenOCD's JTAG
 interface support:
 
 - rework USB communication to be more robust.  Two possible options are:
@@ -112,7 +112,7 @@ TCP/IP packets handled by the server.
 
 @section thelistswd Serial Wire Debug
 
-- implement Serial Wire Debug interface
+- implement Serial Wire Debug interface 
 
 @section thelistbs Boundary Scan Support
 
@@ -142,14 +142,6 @@ Once the above are completed:
   https://lists.berlios.de/pipermail/openocd-development/2009-May/006590.html
 - regression: "reset halt" between 729(works) and 788(fails): @par
 https://lists.berlios.de/pipermail/openocd-development/2009-July/009206.html
-- registers
-  - add flush-value operation, call them all on resume/reset
-- mcr/mrc target->type support
-  - missing from ARM920t, ARM966e, XScale.
-  It's possible that the current syntax is unable to support read-modify-write
-  operations(see arm966e).
-  - mcr/mrc - retire cp15 commands when there the mrc/mrc commands have been
-  tested from: arm926ejs, arm720t, cortex_a8
 - ARM7/9:
   - clean up "arm9tdmi vector_catch". Available for some arm7 cores? @par
 https://lists.berlios.de/pipermail/openocd-development/2009-October/011488.html
@@ -165,25 +157,18 @@ https://lists.berlios.de/pipermail/openocd-development/2009-October/011506.html
   use hardware stepping if available.
   - mdb can return garbage data if read byte operation fails for
   a memory region(16 & 32 byte access modes may be supported). Is this
-  a bug in the .MX31 PDK init script? Try on i.MX31 PDK:
+  a bug in the .MX31 PDK init script? Try on i.MX31 PDK: 
   mdw 0xb80005f0 0x8, mdh 0xb80005f0 0x10, mdb 0xb80005f0 0x20. mdb returns
   garabage.
   - implement missing functionality (grep FNC_INFO_NOTIMPLEMENTED ...)
-- Thumb2 single stepping: ARM1156T2 needs simulator support
+  - thumb support is missing: ISTR ARMv6 requires Thumb.
+  ARM1156 has Thumb2; ARM1136 doesn't.
 - Cortex A8 support (ML)
   - add target implementation (ML)
-- Cortex M3 support
-  - when stepping, only write dirtied registers (be faster)
-  - when connecting to halted core, fetch registers (startup is quirky)
 - Generic ARM run_algorithm() interface
   - tagged struct wrapping ARM instructions and metadata
   - not revision-specific (current: ARMv4+ARMv5 -or- ARMv6 -or- ARMv7)
   - usable with at least arm_nandwrite() and generic CFI drivers
-- ETM
-  - don't show FIFOFULL registers if they're not supported
-  - use comparators to get more breakpoints and watchpoints
-  - add "etm drivers" command
-  - trace driver init() via examine() paths only, not setup()/reset
 - MC1322x support (JW/DE?)
   - integrate and test support from JW (and DE?)
   - get working with a known good interface (i.e. not today's jlink)
@@ -207,27 +192,18 @@ https://lists.berlios.de/pipermail/openocd-development/2009-October/011506.html
 
 @section thelistsvf SVF/XSVF
 
-- develop SVF unit tests
-- develop XSVF unit tests
+- develop SVF unit tests 
+- develop XSVF unit tests 
 
 @section thelistflash Flash Support
 
 - finish documentation for the following flash drivers:
   - avr
+  - ecosflash
   - pic32mx
   - ocl
   - str9xpec
 
-- Don't expect writing all-ones to be a safe way to write without
-  changing bit values.  Minimally it loses on flash modules with
-  internal ECC, where it may change the ECC.
-  - NOR flash_write_unlock() does that between sectors
-  - there may be other cases too
-
-- Make sure all commands accept either a bank name or a bank number,
-  and be sure both identifiers show up in "flash banks" and "nand list".
-  Right now the user-friendly names are pretty much hidden...
-
 @subsection thelistflashcfi CFI
 
 - finish implementing bus width/chip width handling (suggested by NC)
@@ -309,11 +285,11 @@ These ideas were first introduced here: @par
   - automatically detect the features that are available, unless
     options were specifically provided to configure
   - provide a report of the drivers that will be build at the end of
-    running configure, so the users can verify which drivers will be
+    running configure, so the users can verify which driverswill be
     built during 'make' (and their options) .
 - eliminate sources of confusion in @c bootstrap script:
   -# Make @c bootstrap call 'configure --enable-maintainer-mode \<opts\>'?
-  -# Add @c buildstrap script to assist with bootstrap and configure steps.
+  -# Add @c buildstrap script to assist with boostrap and configure steps.
 - automatically build tool-chains required for cross-compiling
   - produce mingw32, arm-elf, others using in-tree scripts
   - build all required target code from sources
@@ -324,30 +300,13 @@ These ideas were first introduced here: @par
 The following architectural tasks need to be accomplished and should be
 fairly easy to complete:
 
-
-- use dynamic allocations for working memory. Scan & fix code
-for excessive stack allocations. take linux/scripts/checkstack.pl and
-see what the worst offenders are. Dynamic stack allocations are found
-at the bottom of the list below.  Example, on amd64:
-
- $ objdump -d | checkstack.pl | head -10
- 0x004311e3 image_open [openocd]:                      13464
- 0x00431301 image_open [openocd]:                      13464
- 0x004237a4 target_array2mem [openocd]:                        4376
- 0x0042382b target_array2mem [openocd]:                        4376
- 0x00423e74 target_mem2array [openocd]:                        4360
- 0x00423ef9 target_mem2array [openocd]:                        4360
- 0x00404aed handle_svf_command [openocd]:              2248
- 0x00404b7e handle_svf_command [openocd]:              2248
- 0x00413581 handle_flash_fill_command [openocd]:               2200
- 0x004135fa handle_flash_fill_command [openocd]:               2200
 - clean-up code to match style guides
 - factor code to eliminate duplicated functionality
 - rewrite code that uses casts to access 16-bit and larger types
   from unaligned memory addresses
 - libopenocd support: @par
     https://lists.berlios.de/pipermail/openocd-development/2009-May/006405.html
-- review and clean up interface/target/flash APIs
+- review and clean up interface/target/flash APIs 
 
 The following strategic tasks will require ambition, knowledge, and time
 to complete:
@@ -365,11 +324,9 @@ to complete:
 - Develop milestone and release guidelines, processes, and scripts.
 - Develop "style" guidelines (and scripts) for maintainers:
   - reviewing patches
-  - committing to git
-- Review Users' Guide for documentation errors or omissions
-  - "capture" and "ocd_find" commands
-  - "ocd_" prefix on various stuff
-- Update Developer's Manual (doxygen output)
+  - committing to Subversion
+- Review The Guide for OpenOCD Users for documentation errors or omissions
+- Update The Manual for OpenOCD Developerrs:
   - Add documentation describing the architecture of each module
   - Provide more Technical Primers to bootstrap contributor knowledge
 

bootstrap

@@ -1,24 +1,13 @@
-#!/bin/sh
+#!/bin/sh -e
 # Run the autotools bootstrap sequence to create the configure script
 
-# Abort execution on error
-set -e
-
-if which libtoolize > /dev/null; then
-    libtoolize="libtoolize"
-elif which glibtoolize >/dev/null; then
-    libtoolize="glibtoolize"
+if libtoolize --version >/dev/null 2>&1; then
+	libtoolize="libtoolize"
+elif glibtoolize --version >/dev/null 2>&1; then
+	libtoolize="glibtoolize"
 else
-    echo "$0: Error: libtool is required" >&2
-    exit 1
-fi
-
-if [ "$1" = "nosubmodule" ]; then
-    SKIP_SUBMODULE=1
-elif [ -n "$1" ]; then
-    echo "$0: Illegal argument $1"
-    echo "USAGE: $0 [nosubmodule]"
-    exit 1
+	echo "libtool is required" >&2
+	exit 1
 fi
 
 # bootstrap the autotools
@@ -31,13 +20,7 @@ autoheader
 automake --gnu --add-missing --copy
 )
 
-if [ -n "$SKIP_SUBMODULE" ]; then
-    echo "Skipping submodule setup"
-else
-    echo "Setting up submodules"
-    git submodule init
-    git submodule update
-fi
-
-echo "Bootstrap complete. Quick build instructions:"
-echo "./configure ...."
+# AM_MAINTAINER_MODE requires --enable-maintainer-mode from everyone using
+# current source snapshots (working from GIT, or some source snapshot, etc)
+# otherwise the documentation will fail to build due to missing version.texi
+echo "Bootstrap complete; you can './configure --enable-maintainer-mode ....'"

common.mk

@@ -1,12 +0,0 @@
-
-# common flags used in openocd build
-AM_CPPFLAGS = -I$(top_srcdir)/src \
-			  -I$(top_builddir)/src \
-			  -I$(top_srcdir)/src/helper \
-			  -DPKGDATADIR=\"$(pkgdatadir)\" \
-			  -DBINDIR=\"$(bindir)\"
-
-if INTERNAL_JIMTCL
-AM_CPPFLAGS += -I$(top_srcdir)/jimtcl \
-			   -I$(top_builddir)/jimtcl
-endif

config_subdir.m4

@@ -1,26 +0,0 @@
-dnl
-dnl If needed, define the m4_ifblank and m4_ifnblank macros from autoconf 2.64
-dnl This allows us to run with earlier Autoconfs as well.
-ifdef([m4_ifblank],[],[
-m4_define([m4_ifblank],
-[m4_if(m4_translit([[$1]],  [ ][	][
-]), [], [$2], [$3])])])
-dnl
-ifdef([m4_ifnblank],[],[
-m4_define([m4_ifnblank],
-[m4_if(m4_translit([[$1]],  [ ][	][
-]), [], [$3], [$2])])])
-dnl
-
-dnl AC_CONFIG_SUBDIRS does not allow configure options to be passed
-dnl to subdirs, this function allows that by creating a configure.gnu
-dnl script that prepends configure options and then calls the real
-dnl configure script
-AC_DEFUN([AX_CONFIG_SUBDIR_OPTION],
-[
-AC_CONFIG_SUBDIRS([$1])
-
-m4_ifblank([$2], [rm -f $srcdir/$1/configure.gnu],
-[echo -e '#!/bin/sh\nexec "`dirname "'\$'0"`/configure" $2 "'\$'@"' > "$srcdir/$1/configure.gnu"
-])
-])

contrib/99-openocd.rules

@@ -1,119 +0,0 @@
-# Copy this file to /etc/udev/rules.d/
-
-ACTION!="add|change", GOTO="openocd_rules_end"
-SUBSYSTEM!="usb|tty|hidraw", GOTO="openocd_rules_end"
-
-# Please keep this list sorted by VID:PID
-
-# opendous and estick
-ATTRS{idVendor}=="03eb", ATTRS{idProduct}=="204f", MODE="664", GROUP="plugdev"
-
-# Original FT232/FT245 VID:PID
-ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6001", MODE="664", GROUP="plugdev"
-
-# Original FT2232 VID:PID
-ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6010", MODE="664", GROUP="plugdev"
-
-# Original FT4232 VID:PID
-ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6011", MODE="664", GROUP="plugdev"
-
-# Original FT232H VID:PID
-ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6014", MODE="664", GROUP="plugdev"
-
-# DISTORTEC JTAG-lock-pick Tiny 2
-ATTRS{idVendor}=="0403", ATTRS{idProduct}=="8220", MODE="664", GROUP="plugdev"
-
-# TUMPA, TUMPA Lite
-ATTRS{idVendor}=="0403", ATTRS{idProduct}=="8a98", MODE="664", GROUP="plugdev"
-ATTRS{idVendor}=="0403", ATTRS{idProduct}=="8a99", MODE="664", GROUP="plugdev"
-
-# XDS100v2
-ATTRS{idVendor}=="0403", ATTRS{idProduct}=="a6d0", MODE="664", GROUP="plugdev"
-
-# Xverve Signalyzer Tool (DT-USB-ST), Signalyzer LITE (DT-USB-SLITE)
-ATTRS{idVendor}=="0403", ATTRS{idProduct}=="bca0", MODE="664", GROUP="plugdev"
-ATTRS{idVendor}=="0403", ATTRS{idProduct}=="bca1", MODE="664", GROUP="plugdev"
-
-# TI/Luminary Stellaris Evaluation Board FTDI (several)
-ATTRS{idVendor}=="0403", ATTRS{idProduct}=="bcd9", MODE="664", GROUP="plugdev"
-
-# TI/Luminary Stellaris In-Circuit Debug Interface FTDI (ICDI) Board
-ATTRS{idVendor}=="0403", ATTRS{idProduct}=="bcda", MODE="664", GROUP="plugdev"
-
-# egnite Turtelizer 2
-ATTRS{idVendor}=="0403", ATTRS{idProduct}=="bdc8", MODE="664", GROUP="plugdev"
-
-# Section5 ICEbear
-ATTRS{idVendor}=="0403", ATTRS{idProduct}=="c140", MODE="664", GROUP="plugdev"
-ATTRS{idVendor}=="0403", ATTRS{idProduct}=="c141", MODE="664", GROUP="plugdev"
-
-# Amontec JTAGkey and JTAGkey-tiny
-ATTRS{idVendor}=="0403", ATTRS{idProduct}=="cff8", MODE="664", GROUP="plugdev"
-
-# TI ICDI
-ATTRS{idVendor}=="0451", ATTRS{idProduct}=="c32a", MODE="664", GROUP="plugdev"
-
-# STLink v1
-ATTRS{idVendor}=="0483", ATTRS{idProduct}=="3744", MODE="664", GROUP="plugdev"
-
-# STLink v2
-ATTRS{idVendor}=="0483", ATTRS{idProduct}=="3748", MODE="664", GROUP="plugdev"
-
-# STLink v2-1
-ATTRS{idVendor}=="0483", ATTRS{idProduct}=="374b", MODE="664", GROUP="plugdev"
-
-# Hilscher NXHX Boards
-ATTRS{idVendor}=="0640", ATTRS{idProduct}=="0028", MODE="664", GROUP="plugdev"
-
-# Hitex STR9-comStick
-ATTRS{idVendor}=="0640", ATTRS{idProduct}=="002c", MODE="664", GROUP="plugdev"
-
-# Hitex STM32-PerformanceStick
-ATTRS{idVendor}=="0640", ATTRS{idProduct}=="002d", MODE="664", GROUP="plugdev"
-
-# Amontec JTAGkey-HiSpeed
-ATTRS{idVendor}=="0fbb", ATTRS{idProduct}=="1000", MODE="664", GROUP="plugdev"
-
-# IAR J-Link USB
-ATTRS{idVendor}=="1366", ATTRS{idProduct}=="0101", MODE="664", GROUP="plugdev"
-ATTRS{idVendor}=="1366", ATTRS{idProduct}=="0102", MODE="664", GROUP="plugdev"
-ATTRS{idVendor}=="1366", ATTRS{idProduct}=="0103", MODE="664", GROUP="plugdev"
-ATTRS{idVendor}=="1366", ATTRS{idProduct}=="0104", MODE="664", GROUP="plugdev"
-
-# J-Link-OB (onboard)
-ATTRS{idVendor}=="1366", ATTRS{idProduct}=="0105", MODE="664", GROUP="plugdev"
-
-# Raisonance RLink
-ATTRS{idVendor}=="138e", ATTRS{idProduct}=="9000", MODE="664", GROUP="plugdev"
-
-# Debug Board for Neo1973
-ATTRS{idVendor}=="1457", ATTRS{idProduct}=="5118", MODE="664", GROUP="plugdev"
-
-# Olimex ARM-USB-OCD
-ATTRS{idVendor}=="15ba", ATTRS{idProduct}=="0003", MODE="664", GROUP="plugdev"
-
-# Olimex ARM-USB-OCD-TINY
-ATTRS{idVendor}=="15ba", ATTRS{idProduct}=="0004", MODE="664", GROUP="plugdev"
-
-# Olimex ARM-JTAG-EW
-ATTRS{idVendor}=="15ba", ATTRS{idProduct}=="001e", MODE="664", GROUP="plugdev"
-
-# Olimex ARM-USB-OCD-TINY-H
-ATTRS{idVendor}=="15ba", ATTRS{idProduct}=="002a", MODE="664", GROUP="plugdev"
-
-# Olimex ARM-USB-OCD-H
-ATTRS{idVendor}=="15ba", ATTRS{idProduct}=="002b", MODE="664", GROUP="plugdev"
-
-# USBprog with OpenOCD firmware
-ATTRS{idVendor}=="1781", ATTRS{idProduct}=="0c63", MODE="664", GROUP="plugdev"
-
-# TI/Luminary Stellaris In-Circuit Debug Interface (ICDI) Board
-ATTRS{idVendor}=="1cbe", ATTRS{idProduct}=="00fd", MODE="664", GROUP="plugdev"
-
-# Marvell Sheevaplug
-ATTRS{idVendor}=="9e88", ATTRS{idProduct}=="9e8f", MODE="664", GROUP="plugdev"
-
-# CMSIS-DAP compatible adapters
-ATTRS{product}=="*CMSIS-DAP*", MODE="664", GROUP="plugdev"
-
-LABEL="openocd_rules_end"

contrib/coresight-trace.txt

@@ -1,68 +0,0 @@
-+OpenOCD and CoreSight Tracing
-+
-Many recent ARM chips  (Using e..g. Cortex-M3 and
-Cortex-M4 cores) support CoreSight debug/trace.
-This note sketches an approach currently planned for those cores
-with OpenOCD.
-
- This tracing data can help debug and tune ARM software, but not
-all cores support tracing.  Some support more extensive tracing
-other cores with trace support +should be able to use the same
-approach and maybe some of the same analysis code.
-
-+the Cortex-M3 is assumed here to be the
-+core in use, for simplicity and to reflect current OpenOCD users.
-
-
-This note summarizes a software model to generate, collect, and
-analyze such trace data .  That is not fully implemented as of early
-January 2011, +and thus is not *yet* usable.
-+
-+
-+Some microcontroller cores support a low pin-count Single-wire trace,
-with a mode where +trace data is emitted (usually to a UART.  To use
-this mode, +SWD must be in use.
-+At this writing, OpenOCD SWD support is not yet complete either.
-
-(There are also multi-wire trace ports requiring more complex debug
-adapters than OpenOCD currently supports, and offering richer data.
-+
-+
-+* ENABLING involves activating  SWD and (single wire) trace.
-+
-+current expectations are that OpenOCD itself will handle enabling;
-activating single wire trace involves a debug adapter interaction, and
-collecting that trace data requires particular (re)wiring.
-+
-+* CONFIGURATION involves setting up ITM  and/or ETM modules to emit the
-+desired data from the Cortex core.  (This might include dumping
-+event counters printf-style messages; code profiling; and more.  Not all
-+cores offer the same trace capabilities.
-+
-+current expectations are that Tcl scripts will be used to configure these
-+modules for the desired tracing, by direct writes to registers.  In some
-+cases (as with RTOS event tracking and similar messaging, this might
-+be  augmented or replaced by user code running on the ARM core.
-+
-+COLLECTION involves reading that trace data, probably through UART, and
-+saving it in a useful format to analyse  For now, deferred analysis modes
-are assumed, not than real-time or interactive ones.
-+
-+
-+current expectations are to to dump data in text using contrib/itmdump.c
-+or derived tools, and to post-process it into reports.  Such reports might
-+include program messaging (such as application data streams via ITM, maybe
-+using printf type messaging; code coverage analysis or so forth.  Recent
-+versions of CMSIS software reserve some ITM codespace for RTOS  event
-tracing and include ITM messaging support.
-Clearly some of that data would be valuable for interactive debugging.
-+
-+Should someone get ambitious, GUI reports should be possible.  GNU tools
-+for simpler reports like gprof may be simpler to support at first.
-+In any case, OpenOCD is not currently GUI-oriented.  Accordingly, we now
-+expect any such graphics to come from postprocessing.
-
- measurments for RTOS event timings should also be easy to collect.
-+Examples include context and message switch times, as well as times
-for application interactions.
-+

contrib/cross-build.sh

@@ -1,119 +0,0 @@
-#!/bin/sh
-
-# This is an example of how to do a cross-build of OpenOCD using pkg-config.
-# Cross-building with pkg-config is deceptively hard and most guides and
-# tutorials are incomplete or give bad advice. Some of the traps that are easy
-# to fall in but handled by this script are:
-#
-#  * Polluting search paths and flags with values from the build system.
-#  * Faulty pkg-config wrappers shipped with distribution packaged cross-
-#    toolchains.
-#  * Build failing because pkg-config discards some paths even though they are
-#    correctly listed in the .pc file.
-#  * Getting successfully built binaries that cannot find runtime data because
-#    paths refer to the build file system.
-#
-# This script is probably more useful as a reference than as a complete build
-# tool but for some configurations it may be usable as-is. It only cross-
-# builds libusb-1.0 from source, but the script can be extended to build other
-# prerequisities in a similar manner.
-#
-# Usage:
-# export LIBUSB1_SRC=/path/to/libusb-1.0
-# export HIDAPI_SRC=/path/to/hidapi
-# export OPENOCD_CONFIG="--enable-..."
-# cd /work/dir
-# /path/to/openocd/contrib/cross-build.sh <host-triplet>
-#
-# For static linking, a workaround is to
-# export LIBUSB1_CONFIG="--enable-static --disable-shared"
-#
-# All the paths must not contain any spaces.
-
-set -e -x
-
-WORK_DIR=$PWD
-
-## Source code paths, customize as necessary
-: ${OPENOCD_SRC:="`dirname "$0"`/.."}
-: ${LIBUSB1_SRC:=/path/to/libusb}
-: ${HIDAPI_SRC:=/path/to/hidapi}
-
-OPENOCD_SRC=`readlink -m $OPENOCD_SRC`
-LIBUSB1_SRC=`readlink -m $LIBUSB1_SRC`
-HIDAPI_SRC=`readlink -m $HIDAPI_SRC`
-
-HOST_TRIPLET=$1
-BUILD_DIR=$WORK_DIR/$HOST_TRIPLET-build
-LIBUSB1_BUILD_DIR=$BUILD_DIR/libusb1
-HIDAPI_BUILD_DIR=$BUILD_DIR/hidapi
-OPENOCD_BUILD_DIR=$BUILD_DIR/openocd
-
-## Root of host file tree
-SYSROOT=$WORK_DIR/$HOST_TRIPLET-root
-
-## Install location within host file tree
-: ${PREFIX=/usr}
-
-## OpenOCD-only install dir for packaging
-PACKAGE_DIR=$WORK_DIR/openocd_`git --git-dir=$OPENOCD_SRC/.git describe`_$HOST_TRIPLET
-
-#######
-
-# Create pkg-config wrapper and make sure it's used
-export PKG_CONFIG=$WORK_DIR/$HOST_TRIPLET-pkg-config
-
-cat > $PKG_CONFIG <<EOF
-#!/bin/sh
-
-SYSROOT=$SYSROOT
-
-export PKG_CONFIG_DIR=
-export PKG_CONFIG_LIBDIR=\${SYSROOT}$PREFIX/lib/pkgconfig:\${SYSROOT}$PREFIX/share/pkgconfig
-export PKG_CONFIG_SYSROOT_DIR=\${SYSROOT}
-
-# The following have to be set to avoid pkg-config to strip /usr/include and /usr/lib from paths
-# before they are prepended with the sysroot path. Feels like a pkg-config bug.
-export PKG_CONFIG_ALLOW_SYSTEM_CFLAGS=
-export PKG_CONFIG_ALLOW_SYSTEM_LIBS=
-
-exec pkg-config "\$@"
-EOF
-chmod +x $PKG_CONFIG
-
-# Clear out work dir
-rm -rf $SYSROOT $BUILD_DIR
-mkdir -p $SYSROOT
-
-# libusb-1.0 build & install into sysroot
-mkdir -p $LIBUSB1_BUILD_DIR
-cd $LIBUSB1_BUILD_DIR
-$LIBUSB1_SRC/configure --build=`$LIBUSB1_SRC/config.guess` --host=$HOST_TRIPLET \
---with-sysroot=$SYSROOT --prefix=$PREFIX \
-$LIBUSB1_CONFIG
-make
-make install DESTDIR=$SYSROOT
-
-# hidapi build & install into sysroot
-if [ -d $HIDAPI_SRC ] ; then
-  mkdir -p $HIDAPI_BUILD_DIR
-  cd $HIDAPI_BUILD_DIR
-  $HIDAPI_SRC/configure --build=`$HIDAPI_SRC/config.guess` --host=$HOST_TRIPLET \
-    --with-sysroot=$SYSROOT --prefix=$PREFIX \
-    $HIDAPI_CONFIG
-  make
-  make install DESTDIR=$SYSROOT
-fi
-
-# OpenOCD build & install into sysroot
-mkdir -p $OPENOCD_BUILD_DIR
-cd $OPENOCD_BUILD_DIR
-$OPENOCD_SRC/configure --build=`$OPENOCD_SRC/config.guess` --host=$HOST_TRIPLET \
---with-sysroot=$SYSROOT --prefix=$PREFIX \
-$OPENOCD_CONFIG
-make
-make install DESTDIR=$SYSROOT
-
-# Separate OpenOCD install w/o dependencies. OpenOCD will have to be linked
-# statically or have dependencies packaged/installed separately.
-make install DESTDIR=$PACKAGE_DIR

contrib/gen-stellaris-part-header.pl

@@ -1,124 +0,0 @@
-#!/usr/bin/perl
-# Automatically generates the StellarisParts struct in src/flash/nor/stellaris.c
-# Uses the header files from TI/Luminary's StellarisWare complete Firmware Development Package
-# available from: http://www.luminarymicro.com/products/software_updates.html
-
-$comment = "// Autogenerated by contrib/gen-stellaris-part-header.pl
-// From Stellaris Firmware Development Package revision";
-
-$struct_header = "static const struct {
-	uint8_t class;
-	uint8_t partno;
-	const char *partname;
-} StellarisParts[] = {
-";
-
-$struct_footer = "\t{0xFF, 0x00, \"Unknown Part\"}\n};\n";
-
-$#ARGV == 1 || die "Usage: $0 <inc directory> <output file>\n";
--d $ARGV[0] || die $ARGV[0]." is not a directory\n";
-$dir = $ARGV[0];
--f $ARGV[1] || die $ARGV[1]." is not a file\n";
-$file = $ARGV[1];
-print STDERR "Scanning $dir, Updating $file\n";
-
-opendir(DIR, $dir) || die "can't open $dir: $!";
-@files = readdir(DIR);
-closedir(DIR);
-
-@header_files = sort(grep(/lm.+\.h/, @files));
-
-$ver = 0;
-$new_struct = $struct_header;
-process_file(@header_files);
-$new_struct .= $struct_footer;
-
-$dump = "$comment $ver\n$new_struct";
-{
-	local($/, *INPUT);
-	open(INPUT, $file) || die "can't open $file: $!";
-	$contents = <INPUT>;
-	close(INPUT);
-}
-
-$old_struct = qr/((^\/\/.*?\n)*)\Q$struct_header\E.*?$struct_footer/sm;
-$contents =~ s/$old_struct/$dump/;
-open(OUTPUT, ">$file") || die "can't open file $file for writing: $!";
-print OUTPUT $contents;
-close(OUTPUT);
-
-sub process_file {
-	foreach $h_file (@_) {
-		($base) = ($h_file =~ m/lm..(.{3,7})\.h/ig);
-		$base = uc($base);
-		local($/, *FILE);
-		open(FILE, "$dir/$h_file");
-		$content = <FILE>;
-		close(FILE);
-		$invalid = 0;
-		if ($content =~ /This is part of revision (\d+) of/) {
-			if ($ver != 0 and $ver != $1) {
-				print STDERR "File version mismatch: $ver != $1\n";
-				$ver = max($ver, $1);
-			} else {
-				$ver = $1;
-			}
-		}
-
-		if ($content =~ /SYSCTL_DID0_CLASS_[^M].+?0x(\S+)/s) {
-			$class = hex($1) >> 16;
-		} else {
-			# attempt another way to get class
-			if ($content =~ /\s(\S+)-class/) {
-				$class = getclass($1);
-				if ($class eq 0xFF) {
-					print STDERR "$h_file unknown class\n";
-					$invalid = 1;
-				}
-			} else {
-				print STDERR "$h_file is missing SYSCTL_DID0_CLASS_\n";
-				$class = 0;
-				$invalid = 1;
-			}
-		}
-
-		if ($content =~ /SYSCTL_DID1_PRTNO_$base.+0x(\S+)/) {
-			$prtno = hex($1);
-			$base = "LM3S" . $base;
-		} else {
-			# LM4F have a changed header
-			if ($content =~ /SYSCTL_DID1_PRTNO_LM4F$base.+?0x(\S+)/s) {
-				$prtno = hex($1);
-				$base = "LM4F" . $base;
-			} else {
-				print STDERR "$h_file is missing SYSCTL_DID1_PRTNO\n";
-				$prtno = 0;
-				$invalid = 1;
-			}
-		}
-		$new_member = sprintf "{0x%02X, 0x%02X, \"%s\"},", $class, $prtno >> 16, $base;
-		if ($invalid == 1) {
-			#$new_struct .= "\t//$new_member\t// Invalid\n";
-		} else {
-			$new_struct .= "\t$new_member\n";
-		}
-	}
-}
-
-sub getclass {
-	$class = $_[0];
-	if ($class =~ /Sandstorm/i) {
-		return 0;
-	} elsif ($class =~ /Fury/i) {
-		return 1;
-	} elsif ($class =~ /DustDevil/i) {
-		return 3;
-	} elsif ($class =~ /Tempest/i) {
-		return 4;
-	} elsif ($class =~ /Blizzard/i) {
-		return 5;
-	} elsif ($class =~ /Firestorm/i) {
-		return 6;
-	}
-	return 0xFF;
-}

contrib/itmdump.c

@@ -1,459 +0,0 @@
-/*
- * Copyright (C) 2010 by David Brownell
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or (at
- * your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-/*
- * Simple utility to parse and dump ARM Cortex-M3 SWO trace output.  Once the
- * mechanisms work right, this information can be used for various purposes
- * including profiling (particularly easy for flat PC-sample profiles) and
- * for debugging.
- *
- * SWO is the Single Wire Output found on some ARM cores, most notably on the
- * Cortex-M3.  It combines data from several sources:
- *
- *  - Software trace (ITM):  so-called "printf-style" application messaging
- *    using "ITM stimulus ports"; and differential timestamps.
- *  - Hardware trace (DWT):  for profiling counters and comparator matches.
- *  - TPIU may issue sync packets.
- *
- * The trace data format is defined in Appendix E, "Debug ITM and DWT packet
- * protocol", of the ARMv7-M Architecture Reference Manual (DDI 0403C).  It
- * is a superset of the ITM data format from the Coresight TRM.
- *
- * The trace data has two encodings.  The working assumption is that data
- * gets into this program using the UART encoding.
- */
-
-#include <errno.h>
-#include <libgen.h>
-#include <stdio.h>
-#include <stdbool.h>
-#include <string.h>
-#include <unistd.h>
-
-unsigned int dump_swit;
-
-/* Example ITM trace word (0xWWXXYYZZ) parsing for task events, sent
- * on port 31 (Reserved for "the" RTOS in CMSIS v1.30)
- *   WWXX: event code (0..3 pre-assigned, 4..15 reserved)
- *   YY:   task priority
- *   ZZ:   task number
- *
- * NOTE that this specific encoding could be space-optimized; and that
- * trace data streams could also be history-sensitive.
- */
-static void show_task(int port, unsigned data)
-{
-	unsigned code = data >> 16;
-	char buf[16];
-
-	if (dump_swit)
-		return;
-
-	switch (code) {
-	case 0:
-		strcpy(buf, "run");
-		break;
-	case 1:
-		strcpy(buf, "block");
-		break;
-	case 2:
-		strcpy(buf, "create");
-		break;
-	case 3:
-		strcpy(buf, "destroy");
-		break;
-	/* 4..15 reserved for other infrastructure ops */
-	default:
-		sprintf(buf, "code %d", code);
-		break;
-	}
-	printf("TASK %d, pri %d: %s",
-		(data >> 0) & 0xff,
-		(data >> 8) & 0xff,
-		buf);
-}
-
-static void show_reserved(FILE *f, char *label, int c)
-{
-	unsigned i;
-
-	if (dump_swit)
-		return;
-
-	printf("%s - %#02x", label, c);
-
-	for (i = 0; (c & 0x80) && i < 4; i++) {
-		c = fgetc(f);
-		if (c == EOF) {
-			printf("(ERROR %d - %s) ", errno, strerror(errno));
-			break;
-		}
-		printf(" %#02x", c);
-	}
-
-	printf("\n");
-}
-
-static bool read_varlen(FILE *f, int c, unsigned *value)
-{
-	unsigned size;
-	unsigned char buf[4];
-
-	*value = 0;
-
-	switch (c & 3) {
-	case 3:
-		size = 4;
-		break;
-	case 2:
-		size = 2;
-		break;
-	case 1:
-		size = 1;
-		break;
-	default:
-		printf("INVALID SIZE\n");
-		return false;
-	}
-
-	memset(buf, 0, sizeof buf);
-	if (fread(buf, 1, size, f) != size)
-		goto err;
-
-	*value =  (buf[3] << 24)
-		+ (buf[2] << 16)
-		+ (buf[1] << 8)
-		+ (buf[0] << 0);
-	return true;
-
-err:
-	printf("(ERROR %d - %s)\n", errno, strerror(errno));
-	return false;
-}
-
-static void show_hard(FILE *f, int c)
-{
-	unsigned type = c >> 3;
-	unsigned value;
-	char *label;
-
-	if (dump_swit)
-		return;
-
-	printf("DWT - ");
-
-	if (!read_varlen(f, c, &value))
-		return;
-	printf("%#x", value);
-
-	switch (type) {
-	case 0:				/* event counter wrapping */
-		printf("overflow %s%s%s%s%s%s",
-			(value & (1 << 5)) ? "cyc " : "",
-			(value & (1 << 4)) ? "fold " : "",
-			(value & (1 << 3)) ? "lsu " : "",
-			(value & (1 << 2)) ? "slp " : "",
-			(value & (1 << 1)) ? "exc " : "",
-			(value & (1 << 0)) ? "cpi " : "");
-		break;
-	case 1:				/* exception tracing */
-		switch (value >> 12) {
-		case 1:
-			label = "entry to";
-			break;
-		case 2:
-			label = "exit from";
-			break;
-		case 3:
-			label = "return to";
-			break;
-		default:
-			label = "?";
-			break;
-		}
-		printf("%s exception %d", label, value & 0x1ff);
-		break;
-	case 2:				/* PC sampling */
-		if (c == 0x15)
-			printf("PC - sleep");
-		else
-			printf("PC - %#08x", value);
-		break;
-	case 8:				/* data tracing, pc value */
-	case 10:
-	case 12:
-	case 14:
-		printf("Data trace %d, PC %#08x", (c >> 4) & 3, value);
-		/* optionally followed by data value */
-		break;
-	case 9:				/* data tracing, address offset */
-	case 11:
-	case 13:
-	case 15:
-		printf("Data trace %d, address offset %#04x",
-				(c >> 4) & 3, value);
-		/* always followed by data value */
-		break;
-	case 16 ... 23:			/* data tracing, data value */
-		printf("Data trace %d, ", (c >> 4) & 3);
-		label = (c & 0x8) ? "write" : "read";
-		switch (c & 3) {
-		case 3:
-			printf("word %s, value %#08x", label, value);
-			break;
-		case 2:
-			printf("halfword %s, value %#04x", label, value);
-			break;
-		case 1:
-			printf("byte %s, value %#02x", label, value);
-			break;
-		}
-		break;
-	default:
-		printf("UNDEFINED, rawtype: %x", type);
-		break;
-	}
-
-	printf("\n");
-	return;
-}
-
-/*
- * Table of SWIT (SoftWare InstrumentTation) message dump formats, for
- * ITM port 0..31 application data.
- *
- * Eventually this should be customizable; all usage is application defined.
- *
- * REVISIT there can be up to 256 trace ports, via "ITM Extension" packets
- */
-struct {
-	int port;
-	void (*show)(int port, unsigned data);
-} format[] = {
-	{ .port = 31,  .show = show_task, },
-};
-
-static void show_swit(FILE *f, int c)
-{
-	unsigned port = c >> 3;
-	unsigned value = 0;
-	unsigned i;
-
-	if (port + 1 == dump_swit) {
-		if (!read_varlen(f, c, &value))
-			return;
-		printf("%c", value);
-		return;
-	}
-
-	if (!read_varlen(f, c, &value))
-		return;
-
-	if (dump_swit)
-		return;
-
-	printf("SWIT %u - ", port);
-
-	printf("%#08x", value);
-
-	for (i = 0; i < sizeof(format) / sizeof(format[0]); i++) {
-		if (format[i].port == port) {
-			printf(", ");
-			format[i].show(port, value);
-			break;
-		}
-	}
-
-	printf("\n");
-	return;
-}
-
-static void show_timestamp(FILE *f, int c)
-{
-	unsigned counter = 0;
-	char *label = "";
-	bool delayed = false;
-
-	if (dump_swit)
-		return;
-
-	printf("TIMESTAMP - ");
-
-	/* Format 2: header only */
-	if (!(c & 0x80)) {
-		switch (c) {
-		case 0:		/* sync packet -- coding error! */
-		case 0x70:	/* overflow -- ditto! */
-			printf("ERROR - %#02x\n", c);
-			break;
-		default:
-			/* synchronous to ITM */
-			counter = c >> 4;
-			goto done;
-		}
-		return;
-	}
-
-	/* Format 1:  one to four bytes of data too */
-	switch (c >> 4) {
-	default:
-		label = ", reserved control\n";
-		break;
-	case 0xc:
-		/* synchronous to ITM */
-		break;
-	case 0xd:
-		label = ", timestamp delayed";
-		delayed = true;
-		break;
-	case 0xe:
-		label = ", packet delayed";
-		delayed = true;
-		break;
-	case 0xf:
-		label = ", packet and timetamp delayed";
-		delayed = true;
-		break;
-	}
-
-	c = fgetc(f);
-	if (c == EOF)
-		goto err;
-	counter = c & 0x7f;
-	if (!(c & 0x80))
-		goto done;
-
-	c = fgetc(f);
-	if (c == EOF)
-		goto err;
-	counter |= (c & 0x7f) << 7;
-	if (!(c & 0x80))
-		goto done;
-
-	c = fgetc(f);
-	if (c == EOF)
-		goto err;
-	counter |= (c & 0x7f) << 14;
-	if (!(c & 0x80))
-		goto done;
-
-	c = fgetc(f);
-	if (c == EOF)
-		goto err;
-	counter |= (c & 0x7f) << 21;
-
-done:
-	/* REVISIT should we try to convert from delta values?  */
-	printf("+%u%s\n", counter, label);
-	return;
-
-err:
-	printf("(ERROR %d - %s) ", errno, strerror(errno));
-	goto done;
-}
-
-int main(int argc, char **argv)
-{
-	FILE *f = stdin;
-	int c;
-
-	/* parse arguments */
-	while ((c = getopt(argc, argv, "f:d:")) != EOF) {
-		switch (c) {
-		case 'f':
-			/* e.g. from UART connected to /dev/ttyUSB0 */
-			f = fopen(optarg, "r");
-			if (!f) {
-				perror(optarg);
-				return 1;
-			}
-			break;
-		case 'd':
-			dump_swit = atoi(optarg);
-			break;
-		default:
-			fprintf(stderr, "usage: %s [-f input]",
-				basename(argv[0]));
-			return 1;
-		}
-	}
-
-	/* Parse data ... records have a header then data bytes.
-	 * NOTE: we assume getc() deals in 8-bit bytes.
-	 */
-	bool overflow = false;
-
-	while ((c = getc(f)) != EOF) {
-
-		/* Sync packet ... 7 zeroes, 0x80 */
-		if (c == 0) {
-			int i;
-
-			for (i = 0; i < 6; i++) {
-				c = fgetc(f);
-				if (c == EOF)
-					break;
-				if (c != 0)
-					goto bad_sync;
-			}
-			c = fgetc(f);
-			if (c == 0x80) {
-				printf("SYNC\n");
-				continue;
-			}
-bad_sync:
-			printf("BAD SYNC\n");
-			continue;
-		}
-
-		/* Overflow packet */
-		if (c == 0x70) {
-			/* REVISIT later, report just what overflowed!
-			 * Timestamp and SWIT can happen.  Non-ITM too?
-			 */
-			overflow = true;
-			printf("OVERFLOW ...\n");
-			continue;
-		}
-		overflow = false;
-
-		switch (c & 0x0f) {
-		case 0x00:		/* Timestamp */
-			show_timestamp(f, c);
-			break;
-		case 0x04:		/* "Reserved" */
-			show_reserved(f, "RESERVED", c);
-			break;
-		case 0x08:		/* ITM Extension */
-			/* FIXME someday, handle these ...  */
-			show_reserved(f, "ITM EXT", c);
-			break;
-		case 0x0c:		/* DWT Extension */
-			show_reserved(f, "DWT EXT", c);
-			break;
-		default:
-			if (c & 4)
-				show_hard(f, c);
-			else
-				show_swit(f, c);
-			break;
-		}
-
-	}
-
-	return 0;
-}

contrib/libdcc/dcc_stdio.c

@@ -19,7 +19,7 @@
  *   You should have received a copy of the GNU General Public License     *
  *   along with this program; if not, write to the                         *
  *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
+ *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  ***************************************************************************/
 
 #include "dcc_stdio.h"
@@ -29,9 +29,9 @@
 #define TARGET_REQ_DEBUGMSG_HEXMSG(size)	(0x01 | ((size & 0xff) << 8))
 #define TARGET_REQ_DEBUGCHAR				0x02
 
-#if defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_6SM__)
+#if defined(__ARM_ARCH_7M__)
 
-/* we use the System Control Block DCRDR reg to simulate a arm7_9 dcc channel
+/* we use the cortex_m3 DCRDR reg to simulate a arm7_9 dcc channel
  * DCRDR[7:0] is used by target for status
  * DCRDR[15:8] is used by target for write buffer
  * DCRDR[23:16] is used for by host for status

contrib/libdcc/dcc_stdio.h

@@ -17,7 +17,7 @@
  *   You should have received a copy of the GNU General Public License     *
  *   along with this program; if not, write to the                         *
  *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
+ *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  ***************************************************************************/
 
 #ifndef DCC_STDIO_H

contrib/libdcc/example.c

@@ -17,7 +17,7 @@
  *   You should have received a copy of the GNU General Public License     *
  *   along with this program; if not, write to the                         *
  *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
+ *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  ***************************************************************************/
 
 #include "dcc_stdio.h"

contrib/loaders/README

@@ -1,33 +0,0 @@
-Included in these directories are the src to the various ram loaders used
-within openocd.
-
-** target checksum loaders **
-
-checksum/armv4_5_crc.s :
- - ARMv4 and ARMv5 checksum loader : see target/arm_crc_code.c:arm_crc_code
-
-checksum/armv7m_crc.s :
- - ARMv7m checksum loader : see target/armv7m.c:cortex_m_crc_code
-
-checksum/mips32.s :
- - MIPS32 checksum loader : see target/mips32.c:mips_crc_code
-
-** target flash loaders **
-
-flash/pic32mx.s :
- - Microchip PIC32 flash loader : see flash/nor/pic32mx.c:pic32mx_flash_write_code
-
-flash/stellaris.s :
- - TI Stellaris flash loader : see flash/nor/stellaris.c:stellaris_write_code
-
-flash/stm32x.s :
- - ST STM32 flash loader : see flash/nor/stm32x.c:stm32x_flash_write_code
-
-flash/str7x.s :
- - ST STR7 flash loader : see flash/nor/str7x.c:str7x_flash_write_code
-
-flash/str9x.s :
- - ST STR9 flash loader : see flash/nor/str9x.c:str9x_flash_write_code
-
-Spencer Oliver
-spen@spen-soft.co.uk

contrib/loaders/checksum/armv4_5_crc.s

@@ -1,58 +0,0 @@
-/***************************************************************************
- *   Copyright (C) 2010 by Spencer Oliver                                  *
- *   spen@spen-soft.co.uk                                                  *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
- ***************************************************************************/
-
-/*
-	r0 - address in - crc out
-	r1 - char count
-*/
-
-	.text
-	.arm
-
-_start:
-main:
-	mov		r2, r0
-	mov		r0, #0xffffffff	/* crc */
-	mov		r3, r1
-	mov		r4, #0
-	b		ncomp
-nbyte:
-	ldrb	r1, [r2, r4]
-	ldr		r7, CRC32XOR
-	eor		r0, r0, r1, asl #24
-	mov		r5, #0
-loop:
-	cmp		r0, #0
-	mov		r6, r0, asl #1
-	add		r5, r5, #1
-	mov		r0, r6
-	eorlt	r0, r6, r7
-	cmp		r5, #8
-	bne		loop
-	add		r4, r4, #1
-ncomp:
-	cmp		r4, r3
-	bne		nbyte
-end:
-	bkpt	#0
-
-CRC32XOR:	.word	0x04c11db7
-
-	.end

contrib/loaders/checksum/armv7m_crc.s

@@ -1,71 +0,0 @@
-/***************************************************************************
- *   Copyright (C) 2010 by Spencer Oliver                                  *
- *   spen@spen-soft.co.uk                                                  *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
- ***************************************************************************/
-
-/*
-	parameters:
-	r0 - address in - crc out
-	r1 - char count
-*/
-
-	.text
-	.syntax unified
-	.cpu cortex-m0
-	.thumb
-	.thumb_func
-
-	.align	2
-
-_start:
-main:
-	mov		r2, r0
-	movs	r0, #0
-	mvns	r0, r0
-	ldr		r6, CRC32XOR
-	mov		r3, r1
-	movs	r4, #0
-	b		ncomp
-nbyte:
-	ldrb	r1, [r2, r4]
-	lsls	r1, r1, #24
-	eors	r0, r0, r1
-	movs	r5, #0
-loop:
-	cmp		r0, #0
-	bge		notset
-	lsls	r0, r0, #1
-	eors	r0, r0, r6
-	b		cont
-notset:
-	lsls	r0, r0, #1
-cont:
-	adds	r5, r5, #1
-	cmp		r5, #8
-	bne		loop
-	adds	r4, r4, #1
-ncomp:
-	cmp		r4, r3
-	bne		nbyte
-	bkpt	#0
-
-	.align	2
-
-CRC32XOR:	.word	0x04c11db7
-
-	.end

contrib/loaders/checksum/mips32.s

@@ -1,72 +0,0 @@
-/***************************************************************************
- *   Copyright (C) 2010 by Spencer Oliver                                  *
- *   spen@spen-soft.co.uk                                                  *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
- ***************************************************************************/
-
-	.global main
-	.text
-	.set noreorder
-
-/* params:
- * $a0 address in
- * $a1 byte count
- * vars
- * $a0 crc
- * $a1 crc data byte
- * temps:
- * t3 v0 a3 a2 t0 v1
- */
-
-.ent main
-main:
-	addiu	$t4, $a0, 0		/* address in */
-	addiu	$t2, $a1, 0		/* count */
-
-	addiu	$a0, $zero, 0xffffffff /* a0 crc - result */
-
-	beq		$zero, $zero, ncomp
-	addiu	$t3, $zero, 0	/* clear bytes read */
-
-nbyte:
-	lb		$a1, ($t4)		/* load byte from source address */
-	addi	$t4, $t4, 1		/* inc byte count */
-
-crc:
-	sll		$a1, $a1, 24
-	lui		$v0, 0x04c1
-	xor		$a0, $a0, $a1
-	ori		$a3, $v0, 0x1db7
-	addu	$a2, $zero, $zero /* clear bit count */
-loop:
-	sll		$t0, $a0, 1
-	addiu	$a2, $a2, 1		/* inc bit count */
-	slti	$a0, $a0, 0
-	xor		$t1, $t0, $a3
-	movn	$t0, $t1, $a0
-	slti	$v1, $a2, 8		/* 8bits processed */
-	bne		$v1, $zero, loop
-	addu	$a0, $t0, $zero
-
-ncomp:
-	bne		$t2, $t3, nbyte	/* all bytes processed */
-	addiu	$t3, $t3, 1
-
-wait:
-	sdbbp
-
-.end main

contrib/loaders/erase_check/armv4_5_erase_check.s

@@ -1,41 +0,0 @@
-/***************************************************************************
- *   Copyright (C) 2010 by Spencer Oliver                                  *
- *   spen@spen-soft.co.uk                                                  *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
- ***************************************************************************/
-
-/*
-	parameters:
-	r0 - address in
-	r1 - byte count
-	r2 - mask - result out
-*/
-
-	.text
-	.arm
-
-loop:
-	ldrb r3, [r0], #1
-	and r2, r2, r3
-	subs r1, r1, #1
-	bne loop
-end:
-	bkpt	#0
-
-CRC32XOR:	.word	0x04c11db7
-
-	.end

contrib/loaders/erase_check/armv7m_erase_check.s

@@ -1,45 +0,0 @@
-/***************************************************************************
- *   Copyright (C) 2010 by Spencer Oliver                                  *
- *   spen@spen-soft.co.uk                                                  *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
- ***************************************************************************/
-
-/*
-	parameters:
-	r0 - address in
-	r1 - byte count
-	r2 - mask - result out
-*/
-
-	.text
-	.syntax unified
-	.cpu cortex-m0
-	.thumb
-	.thumb_func
-
-	.align	2
-
-loop:
-	ldrb	r3, [r0]
-	adds	r0, #1
-	ands	r2, r2, r3
-	subs	r1, r1, #1
-	bne		loop
-end:
-	bkpt	#0
-
-	.end

contrib/loaders/flash/armv4_5_cfi_intel_32.s

@@ -1,57 +0,0 @@
-/***************************************************************************
- *   Copyright (C) 2005, 2007 by Dominic Rath                              *
- *   Dominic.Rath@gmx.de                                                   *
- *   Copyright (C) 2010 Spencer Oliver                                     *
- *   spen@spen-soft.co.uk                                                  *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
- ***************************************************************************/
-
-	.text
-	.arm
-	.arch armv4
-
-	.section .init
-
-/* algorithm register usage:
- * r0: source address (in RAM)
- * r1: target address (in Flash)
- * r2: count
- * r3: flash write command
- * r4: status byte (returned to host)
- * r5: busy test pattern
- * r6: error test pattern
- */
-
-loop:
-	ldr		r4, [r0], #4
-	str		r3, [r1]
-	str		r4, [r1]
-busy:
-	ldr		r4, [r1]
-	and		r7, r4, r5
-	cmp		r7, r5
-	bne		busy
-	tst		r4, r6
-	bne		done
-	subs	r2, r2, #1
-	beq		done
-	add		r1, r1, #4
-	b		loop
-done:
-	b		done
-
-	.end

contrib/loaders/flash/armv4_5_cfi_intel_8.s

@@ -1,57 +0,0 @@
-/***************************************************************************
- *   Copyright (C) 2005, 2007 by Dominic Rath                              *
- *   Dominic.Rath@gmx.de                                                   *
- *   Copyright (C) 2010 Spencer Oliver                                     *
- *   spen@spen-soft.co.uk                                                  *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
- ***************************************************************************/
-
-	.text
-	.arm
-	.arch armv4
-
-	.section .init
-
-/* algorithm register usage:
- * r0: source address (in RAM)
- * r1: target address (in Flash)
- * r2: count
- * r3: flash write command
- * r4: status byte (returned to host)
- * r5: busy test pattern
- * r6: error test pattern
- */
-
-loop:
-	ldrb	r4, [r0], #1
-	strb	r3, [r1]
-	strb	r4, [r1]
-busy:
-	ldrb	r4, [r1]
-	and		r7, r4, r5
-	cmp		r7, r5
-	bne		busy
-	tst		r4, r6
-	bne		done
-	subs	r2, r2, #1
-	beq		done
-	add		r1, r1, #1
-	b		loop
-done:
-	b		done
-
-	.end

contrib/loaders/flash/armv4_5_cfi_span_16.s

@@ -1,75 +0,0 @@
-/***************************************************************************
- *   Copyright (C) 2005, 2007 by Dominic Rath                              *
- *   Dominic.Rath@gmx.de                                                   *
- *   Copyright (C) 2010 Spencer Oliver                                     *
- *   spen@spen-soft.co.uk                                                  *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
- ***************************************************************************/
-
-	.text
-	.arm
-	.arch armv4
-
-	.section .init
-
-/* input parameters - */
-/*	R0 = source address */
-/*	R1 = destination address */
-/*	R2 = number of writes */
-/*	R3 = flash write command */
-/*	R4 = constant to mask DQ7 bits (also used for Dq5 with shift) */
-/* output parameters - */
-/*	R5 = 0x80 ok 0x00 bad */
-/* temp registers - */
-/*	R6 = value read from flash to test status */
-/*	R7 = holding register */
-/* unlock registers - */
-/*  R8 = unlock1_addr */
-/*  R9 = unlock1_cmd */
-/*  R10 = unlock2_addr */
-/*  R11 = unlock2_cmd */
-
-code:
-	ldrh	r5, [r0], #2
-	strh	r9, [r8]
-	strh	r11, [r10]
-	strh	r3, [r8]
-	strh	r5, [r1]
-	nop
-busy:
-	ldrh	r6, [r1]
-	eor		r7, r5, r6
-	ands	r7, r4, r7
-	beq		cont			/* b if DQ7 == Data7 */
-	ands	r6, r6, r4, lsr #2
-	beq		busy			/* b if DQ5 low */
-	ldrh	r6, [r1]
-	eor		r7, r5, r6
-	ands	r7, r4, r7
-	beq		cont			/* b if DQ7 == Data7 */
-	mov		r5, #0			/* 0x0 - return 0x00, error */
-	bne		done
-cont:
-	subs	r2, r2, #1		/* 0x1 */
-	moveq	r5, #128		/* 0x80 */
-	beq		done
-	add		r1, r1, #2		/* 0x2 */
-	b		code
-done:
-	b		done
-
-	.end

contrib/loaders/flash/armv4_5_cfi_span_16_dq7.s

@@ -1,66 +0,0 @@
-/***************************************************************************
- *   Copyright (C) 2005, 2007 by Dominic Rath                              *
- *   Dominic.Rath@gmx.de                                                   *
- *   Copyright (C) 2010 Spencer Oliver                                     *
- *   spen@spen-soft.co.uk                                                  *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
- ***************************************************************************/
-
-	.text
-	.arm
-	.arch armv4
-
-	.section .init
-
-/* input parameters - */
-/*	R0 = source address */
-/*	R1 = destination address */
-/*	R2 = number of writes */
-/*	R3 = flash write command */
-/*	R4 = constant to mask DQ7 bits (also used for Dq5 with shift) */
-/* output parameters - */
-/*	R5 = 0x80 ok 0x00 bad */
-/* temp registers - */
-/*	R6 = value read from flash to test status */
-/*	R7 = holding register */
-/* unlock registers - */
-/*  R8 = unlock1_addr */
-/*  R9 = unlock1_cmd */
-/*  R10 = unlock2_addr */
-/*  R11 = unlock2_cmd */
-
-code:
-	ldrh	r5, [r0], #2
-	strh	r9, [r8]
-	strh	r11, [r10]
-	strh	r3, [r8]
-	strh	r5, [r1]
-	nop
-busy:
-	ldrh	r6, [r1]
-	eor		r7, r5, r6
-	ands	r7, #0x80
-	bne		busy
-	subs	r2, r2, #1	/* 0x1 */
-	moveq	r5, #128	/* 0x80 */
-	beq		done
-	add		r1, r1, #2	/* 0x2 */
-	b		code
-done:
-	b		done
-
-	.end

contrib/loaders/flash/armv4_5_cfi_span_32.s

@@ -1,75 +0,0 @@
-/***************************************************************************
- *   Copyright (C) 2005, 2007 by Dominic Rath                              *
- *   Dominic.Rath@gmx.de                                                   *
- *   Copyright (C) 2010 Spencer Oliver                                     *
- *   spen@spen-soft.co.uk                                                  *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
- ***************************************************************************/
-
-	.text
-	.arm
-	.arch armv4
-
-	.section .init
-
-/* input parameters - */
-/*	R0 = source address */
-/*	R1 = destination address */
-/*	R2 = number of writes */
-/*	R3 = flash write command */
-/*	R4 = constant to mask DQ7 bits (also used for Dq5 with shift) */
-/* output parameters - */
-/*	R5 = 0x80 ok 0x00 bad */
-/* temp registers - */
-/*	R6 = value read from flash to test status */
-/*	R7 = holding register */
-/* unlock registers - */
-/*  R8 = unlock1_addr */
-/*  R9 = unlock1_cmd */
-/*  R10 = unlock2_addr */
-/*  R11 = unlock2_cmd */
-
-code:
-	ldr		r5, [r0], #4
-	str		r9, [r8]
-	str		r11, [r10]
-	str		r3, [r8]
-	str		r5, [r1]
-	nop
-busy:
-	ldr		r6, [r1]
-	eor		r7, r5, r6
-	ands	r7, r4, r7
-	beq		cont			/* b if DQ7 == Data7 */
-	ands	r6, r6, r4, lsr #2
-	beq		busy			/* b if DQ5 low */
-	ldr		r6, [r1]
-	eor		r7, r5, r6
-	ands	r7, r4, r7
-	beq		cont			/* b if DQ7 == Data7 */
-	mov		r5, #0			/* 0x0 - return 0x00, error */
-	bne		done
-cont:
-	subs	r2, r2, #1		/* 0x1 */
-	moveq	r5, #128		/* 0x80 */
-	beq		done
-	add		r1, r1, #4		/* 0x4 */
-	b		code
-done:
-	b		done
-
-	.end

contrib/loaders/flash/armv4_5_cfi_span_8.s

@@ -1,75 +0,0 @@
-/***************************************************************************
- *   Copyright (C) 2005, 2007 by Dominic Rath                              *
- *   Dominic.Rath@gmx.de                                                   *
- *   Copyright (C) 2010 Spencer Oliver                                     *
- *   spen@spen-soft.co.uk                                                  *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
- ***************************************************************************/
-
-	.text
-	.arm
-	.arch armv4
-
-	.section .init
-
-/* input parameters - */
-/*	R0 = source address */
-/*	R1 = destination address */
-/*	R2 = number of writes */
-/*	R3 = flash write command */
-/*	R4 = constant to mask DQ7 bits (also used for Dq5 with shift) */
-/* output parameters - */
-/*	R5 = 0x80 ok 0x00 bad */
-/* temp registers - */
-/*	R6 = value read from flash to test status */
-/*	R7 = holding register */
-/* unlock registers - */
-/*  R8 = unlock1_addr */
-/*  R9 = unlock1_cmd */
-/*  R10 = unlock2_addr */
-/*  R11 = unlock2_cmd */
-
-code:
-	ldrb	r5, [r0], #1
-	strb	r9, [r8]
-	strb	r11, [r10]
-	strb	r3, [r8]
-	strb	r5, [r1]
-	nop
-busy:
-	ldrb	r6, [r1]
-	eor		r7, r5, r6
-	ands	r7, r4, r7
-	beq		cont			/* b if DQ7 == Data7 */
-	ands	r6, r6, r4, lsr #2
-	beq		busy			/* b if DQ5 low */
-	ldrb	r6, [r1]
-	eor		r7, r5, r6
-	ands	r7, r4, r7
-	beq		cont			/* b if DQ7 == Data7 */
-	mov		r5, #0			/* 0x0 - return 0x00, error */
-	bne		done
-cont:
-	subs	r2, r2, #1		/* 0x1 */
-	moveq	r5, #128		/* 0x80 */
-	beq		done
-	add		r1, r1, #1		/* 0x1 */
-	b		code
-done:
-	b		done
-
-	.end

contrib/loaders/flash/armv7m_cfi_span_16.s

@@ -1,81 +0,0 @@
-/***************************************************************************
- *   Copyright (C) 2005, 2007 by Dominic Rath                              *
- *   Dominic.Rath@gmx.de                                                   *
- *   Copyright (C) 2010 Spencer Oliver                                     *
- *   spen@spen-soft.co.uk                                                  *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
- ***************************************************************************/
-
-	.text
-	.syntax unified
-	.arch armv7-m
-	.thumb
-	.thumb_func
-
-	.align 2
-
-/* input parameters - */
-/*	R0 = source address */
-/*	R1 = destination address */
-/*	R2 = number of writes */
-/*	R3 = flash write command */
-/*	R4 = constant to mask DQ7 bits (also used for Dq5 with shift) */
-/* output parameters - */
-/*	R5 = 0x80 ok 0x00 bad */
-/* temp registers - */
-/*	R6 = value read from flash to test status */
-/*	R7 = holding register */
-/* unlock registers - */
-/*  R8 = unlock1_addr */
-/*  R9 = unlock1_cmd */
-/*  R10 = unlock2_addr */
-/*  R11 = unlock2_cmd */
-
-code:
-	ldrh	r5, [r0], #2
-	strh	r9, [r8]
-	strh	r11, [r10]
-	strh	r3, [r8]
-	strh	r5, [r1]
-	nop
-busy:
-	ldrh	r6, [r1]
-	eor		r7, r5, r6
-	ands	r7, r4, r7
-	beq		cont			/* b if DQ7 == Data7 */
-	ands	r6, r6, r4, lsr #2
-	beq		busy			/* b if DQ5 low */
-	ldrh	r6, [r1]
-	eor		r7, r5, r6
-	ands	r7, r4, r7
-	beq		cont			/* b if DQ7 == Data7 */
-	mov		r5, #0			/* 0x0 - return 0x00, error */
-	bne		done
-cont:
-	subs	r2, r2, #1		/* 0x1 */
-	beq 	success
-	add		r1, r1, #2		/* 0x2 */
-	b		code
-
-success:
-	mov 	r5, #128		/* 0x80 */
-	b 	done
-
-done:
-	bkpt #0
-
-	.end

contrib/loaders/flash/armv7m_cfi_span_16_dq7.s

@@ -1,72 +0,0 @@
-/***************************************************************************
- *   Copyright (C) 2005, 2007 by Dominic Rath                              *
- *   Dominic.Rath@gmx.de                                                   *
- *   Copyright (C) 2010 Spencer Oliver                                     *
- *   spen@spen-soft.co.uk                                                  *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
- ***************************************************************************/
-
-	.text
-	.syntax unified
-	.arch armv7-m
-	.thumb
-	.thumb_func
-
-	.align 2
-
-/* input parameters - */
-/*	R0 = source address */
-/*	R1 = destination address */
-/*	R2 = number of writes */
-/*	R3 = flash write command */
-/*	R4 = constant to mask DQ7 bits */
-/* output parameters - */
-/*	R5 = 0x80 ok 0x00 bad */
-/* temp registers - */
-/*	R6 = value read from flash to test status */
-/*	R7 = holding register */
-/* unlock registers - */
-/*  R8 = unlock1_addr */
-/*  R9 = unlock1_cmd */
-/*  R10 = unlock2_addr */
-/*  R11 = unlock2_cmd */
-
-code:
-	ldrh	r5, [r0], #2
-	strh	r9, [r8]
-	strh	r11, [r10]
-	strh	r3, [r8]
-	strh	r5, [r1]
-	nop
-busy:
-	ldrh	r6, [r1]
-	eor		r7, r5, r6
-	ands	r7, r4, r7
-	bne		busy
-	subs	r2, r2, #1	/* 0x1 */
-	beq		success
-	add		r1, r1, #2	/* 0x2 */
-	b		code
-
-success:
-	mov		r5, #128	/* 0x80 */
-	b		done
-
-done:
-	bkpt #0
-
-	.end

contrib/loaders/flash/armv7m_io.s

@@ -1,60 +0,0 @@
-/***************************************************************************
- *   Copyright (C) 2013 by Henrik Nilsson                                  *
- *   henrik.nilsson@bytequest.se                                           *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
- ***************************************************************************/
-
-	.text
-	.syntax unified
-	.arch armv7-m
-	.thumb
-	.thumb_func
-
-	.align 4
-
-/* Inputs:
- *  r0	buffer address
- *  r1	NAND data address (byte wide)
- *  r2	buffer length
- */
-read:
-	ldrb	r3, [r1]
-	strb	r3, [r0], #1
-	subs	r2, r2, #1
-	bne		read
-
-done_read:
-	bkpt #0
-
-	.align 4
-
-/* Inputs:
- *  r0	NAND data address (byte wide)
- *  r1	buffer address
- *  r2	buffer length
- */
-write:
-	ldrb	r3, [r1], #1
-	strb	r3, [r0]
-	subs	r2, r2, #1
-	bne		write
-
-done_write:
-	bkpt #0
-
-	.end
-

contrib/loaders/flash/cortex-m0.S

@@ -1,72 +0,0 @@
-/***************************************************************************
- *   Copyright (C) 2014 by Angus Gratton                                   *
- *   Derived from stm32f1x.S:
- *   Copyright (C) 2011 by Andreas Fritiofson                              *
- *   andreas.fritiofson@gmail.com                                          *
- *   Copyright (C) 2013 by Roman Dmitrienko                                *
- *   me@iamroman.org                                                       *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
- ***************************************************************************/
-	.text
-	.syntax unified
-	.cpu cortex-m0
-	.thumb
-	.thumb_func
-
-/* Written for NRF51822 (src/flash/nor/nrf51.c) however the NRF NVMC is
- * very generic (CPU blocks during flash writes), so this is actually
- * just a generic word-oriented copy routine for cortex-m0 (also
- * suitable for cortex m0plus/m3/m4.)
- *
- * To assemble:
- * arm-none-eabi-gcc -c cortex-m0.S
- *
- * To disassemble:
- * arm-none-eabi-objdump -o cortex-m0.o
- *
- * Thanks to Jens Bauer for providing advice on some of the tweaks.
- */
-
-	/* Params:
-	 * r0 - byte count (in)
-	 * r1 - workarea start
-	 * r2 - workarea end
-	 * r3 - target address
-	 * Clobbered:
-	 * r4 - rp
-	 * r5 - wp, tmp
-	 */
-
-wait_fifo:
-	ldr 	r5, [r1, #0]	/* read wp */
-	cmp 	r5, #0	        /* abort if wp == 0 */
-	beq 	exit
-	ldr 	r4, [r1, #4]	/* read rp */
-	cmp 	r4, r5		/* wait until rp != wp */
-	beq 	wait_fifo
-
-	ldmia	r4!, {r5}	/* "*target_address++ = *rp++" */
-        stmia   r3!, {r5}
-
-        cmp 	r4, r2		/* wrap rp at end of work area buffer */
-	bcc	no_wrap
-	mov	r4, r1
-	adds	r4, #8          /* skip rp,wp at start of work area */
-no_wrap:
-	str 	r4, [r1, #4]	/* write back rp */
-	subs	r0, #4          /* decrement byte count */
-	bne     wait_fifo	/* loop if not done */
-exit:
-	bkpt    #0

contrib/loaders/flash/efm32.S

@@ -1,114 +0,0 @@
-/***************************************************************************
- *   Copyright (C) 2011 by Andreas Fritiofson                              *
- *   andreas.fritiofson@gmail.com                                          *
- *   Copyright (C) 2013 by Roman Dmitrienko                                *
- *   me@iamroman.org                                                       *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
- ***************************************************************************/
-
-	.text
-	.syntax unified
-	.cpu cortex-m0
-	.thumb
-	.thumb_func
-
-	/* Params:
-	 * r0 - flash base (in), status (out)
-	 * r1 - count (word-32bit)
-	 * r2 - workarea start
-	 * r3 - workarea end
-	 * r4 - target address
-	 * Clobbered:
-	 * r5 - rp
-	 * r6 - wp, tmp
-	 * r7 - tmp
-	 */
-
-/* offsets of registers from flash reg base */
-#define EFM32_MSC_WRITECTRL_OFFSET      0x008
-#define EFM32_MSC_WRITECMD_OFFSET       0x00c
-#define EFM32_MSC_ADDRB_OFFSET          0x010
-#define EFM32_MSC_WDATA_OFFSET          0x018
-#define EFM32_MSC_STATUS_OFFSET         0x01c
-#define EFM32_MSC_LOCK_OFFSET           0x03c
-
-	/* unlock MSC */
-	ldr     r6, =#0x1b71
-	str     r6, [r0, #EFM32_MSC_LOCK_OFFSET]
-	/* set WREN to 1 */
-	movs    r6, #1
-	str     r6, [r0, #EFM32_MSC_WRITECTRL_OFFSET]
-
-wait_fifo:
-	ldr     r6, [r2, #0]    /* read wp */
-	cmp     r6, #0          /* abort if wp == 0 */
-	beq     exit
-	ldr     r5, [r2, #4]    /* read rp */
-	cmp     r5, r6          /* wait until rp != wp */
-	beq     wait_fifo
-
-	/* store address in MSC_ADDRB */
-	str     r4, [r0, #EFM32_MSC_ADDRB_OFFSET]
-	/* set LADDRIM bit */
-	movs    r6, #1
-	str     r6, [r0, #EFM32_MSC_WRITECMD_OFFSET]
-	/* check status for INVADDR and/or LOCKED */
-	ldr     r6, [r0, #EFM32_MSC_STATUS_OFFSET]
-	movs    r7, #6
-	tst     r6, r7
-	bne     error
-
-	/* wait for WDATAREADY */
-wait_wdataready:
-	ldr     r6, [r0, #EFM32_MSC_STATUS_OFFSET]
-	movs    r7, #8
-	tst     r6, r7
-	beq     wait_wdataready
-
-	/* load data to WDATA */
-	ldr     r6, [r5]
-	str     r6, [r0, #EFM32_MSC_WDATA_OFFSET]
-	/* set WRITEONCE bit */
-	movs    r6, #8
-	str     r6, [r0, #EFM32_MSC_WRITECMD_OFFSET]
-
-	adds    r5, #4          /* rp++ */
-	adds    r4, #4          /* target_address++ */
-
-	/* wait until BUSY flag is reset */
-busy:
-	ldr     r6, [r0, #EFM32_MSC_STATUS_OFFSET]
-	movs    r7, #1
-	tst     r6, r7
-	bne     busy
-
-	cmp     r5, r3          /* wrap rp at end of buffer */
-	bcc     no_wrap
-	mov     r5, r2
-	adds    r5, #8
-no_wrap:
-	str     r5, [r2, #4]    /* store rp */
-	subs    r1, r1, #1      /* decrement word count */
-	cmp     r1, #0
-	beq     exit            /* loop if not done */
-	b       wait_fifo
-error:
-	movs    r0, #0
-	str     r0, [r2, #4]    /* set rp = 0 on error */
-exit:
-	mov     r0, r6          /* return status in r0 */
-	bkpt    #0

contrib/loaders/flash/lpcspifi_erase.S

@@ -1,176 +0,0 @@
-/***************************************************************************
- *   Copyright (C) 2012 by George Harris                                   *
- *   george@luminairecoffee.com                                            *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
- ***************************************************************************/
-
-	.text
-	.syntax unified
-	.cpu cortex-m3
-	.thumb
-	.thumb_func
-
-/*
- * Params :
- * r0 = start address, status (out)
- * r1 = count
- * r2 = erase command
- * r3 = block size
- */
-
-#define SSP_BASE_HIGH				0x4008
-#define SSP_BASE_LOW				0x3000
-#define SSP_CR0_OFFSET				0x00
-#define SSP_CR1_OFFSET				0x04
-#define SSP_DATA_OFFSET 			0x08
-#define SSP_CPSR_OFFSET 			0x10
-#define SSP_SR_OFFSET				0x0c
-
-#define SSP_CLOCK_BASE_HIGH 		0x4005
-#define SSP_CLOCK_BASE_LOW 			0x0000
-#define SSP_BRANCH_CLOCK_BASE_HIGH 	0x4005
-#define SSP_BRANCH_CLOCK_BASE_LOW	0x2000
-#define SSP_BASE_CLOCK_OFFSET		0x94
-#define SSP_BRANCH_CLOCK_OFFSET		0x700
-
-#define IOCONFIG_BASE_HIGH			0x4008
-#define IOCONFIG_BASE_LOW			0x6000
-#define IOCONFIG_SCK_OFFSET			0x18c
-#define IOCONFIG_HOLD_OFFSET		0x190
-#define IOCONFIG_WP_OFFSET			0x194
-#define IOCONFIG_MISO_OFFSET		0x198
-#define IOCONFIG_MOSI_OFFSET		0x19c
-#define IOCONFIG_CS_OFFSET			0x1a0
-
-#define IO_BASE_HIGH 				0x400f
-#define IO_BASE_LOW 				0x4000
-#define IO_CS_OFFSET 				0xab
-#define IODIR_BASE_HIGH 			0x400f
-#define IODIR_BASE_LOW				0x6000
-#define IO_CS_DIR_OFFSET 			0x14
-
-
-setup: /* Initialize SSP pins and module */
-	mov.w	r10, #IOCONFIG_BASE_LOW
-	movt	r10, #IOCONFIG_BASE_HIGH
-	mov.w	r8, #0xea
-	str.w	r8, [r10, #IOCONFIG_SCK_OFFSET]		/* Configure SCK pin function */
-	mov.w	r8, #0x40
-	str.w	r8, [r10, #IOCONFIG_HOLD_OFFSET]	/* Configure /HOLD pin function */
-	mov.w	r8, #0x40
-	str.w	r8, [r10, #IOCONFIG_WP_OFFSET]		/* Configure /WP pin function */
-	mov.w	r8, #0xed
-	str.w	r8, [r10, #IOCONFIG_MISO_OFFSET]	/* Configure MISO pin function */
-	mov.w	r8, #0xed
-	str.w	r8, [r10, #IOCONFIG_MOSI_OFFSET]	/* Configure MOSI pin function */
-	mov.w	r8, #0x44
-	str.w	r8, [r10, #IOCONFIG_CS_OFFSET]		/* Configure CS pin function */
-
-	mov.w	r10, #IODIR_BASE_LOW
-	movt	r10, #IODIR_BASE_HIGH
-	mov.w	r8, #0x800
-	str 	r8, [r10, #IO_CS_DIR_OFFSET]		/* Set CS as output */
-	mov.w	r10, #IO_BASE_LOW
-	movt	r10, #IO_BASE_HIGH
-	mov.w	r8, #0xff
-	str.w	r8, [r10, #IO_CS_OFFSET]			/* Set CS high */
-
-	mov.w 	r10, #SSP_CLOCK_BASE_LOW
-	movt 	r10, #SSP_CLOCK_BASE_HIGH
-	mov.w 	r8, #0x0000
-	movt 	r8, #0x0100
-	str.w 	r8, [r10, #SSP_BASE_CLOCK_OFFSET] 	/* Configure SSP0 base clock (use 12 MHz IRC) */
-
-	mov.w 	r10, #SSP_BRANCH_CLOCK_BASE_LOW
-	movt 	r10, #SSP_BRANCH_CLOCK_BASE_HIGH
-	mov.w 	r8, #0x01
-	str.w 	r8, [r10, #SSP_BRANCH_CLOCK_OFFSET] /* Configure (enable) SSP0 branch clock */
-
-	mov.w 	r10, #SSP_BASE_LOW
-	movt	r10, #SSP_BASE_HIGH
-	mov.w 	r8, #0x07
-	str.w 	r8, [r10, #SSP_CR0_OFFSET] 			/* Set clock postscale */
-	mov.w 	r8, #0x02
-	str.w 	r8, [r10, #SSP_CPSR_OFFSET] 		/* Set clock prescale */
-	str.w 	r8, [r10, #SSP_CR1_OFFSET] 			/* Enable SSP in SPI mode */
-write_enable:
-	bl 		cs_down
-	mov.w 	r9, #0x06 		/* Send the write enable command */
-	bl 		write_data
-	bl 		cs_up
-
-	bl 		cs_down
-	mov.w 	r9, #0x05 		/* Get status register */
-	bl 		write_data
-	mov.w 	r9, #0x00 		/* Dummy data to clock in status */
-	bl 		write_data
-	bl 		cs_up
-
-	tst 	r9, #0x02 		/* If the WE bit isn't set, we have a problem. */
-	beq 	error
-erase:
-	bl 		cs_down
-	mov.w 	r9, r2 			/* Send the erase command */
-	bl 		write_data
-write_address:
-	lsr 	r9, r0, #16 	/* Send the current 24-bit write address, MSB first */
-	bl 		write_data
-	lsr 	r9, r0, #8
-	bl 		write_data
-	mov.w 	r9, r0
-	bl 		write_data
-	bl 		cs_up
-wait_flash_busy:			/* Wait for the flash to finish the previous erase */
-	bl 		cs_down
-	mov.w 	r9, #0x05 		/* Get status register */
-	bl 		write_data
-	mov.w 	r9, #0x00 		/* Dummy data to clock in status */
-	bl 		write_data
-	bl 		cs_up
-	tst 	r9, #0x01 		/* If it isn't done, keep waiting */
-	bne 	wait_flash_busy
-
-	subs	r1, r1, #1					/* decrement count */
-	cbz		r1, exit 					/* Exit if we have written everything */
-	add 	r0, r3						/* Move the address up by the block size */
-	b 		write_enable 				/* Start a new block erase */
-write_data: 							/* Send/receive 1 byte of data over SSP */
-	mov.w	r10, #SSP_BASE_LOW
-	movt	r10, #SSP_BASE_HIGH
-	str.w 	r9, [r10, #SSP_DATA_OFFSET]	/* Write supplied data to the SSP data reg */
-wait_transmit:
-	ldr 	r9, [r10, #SSP_SR_OFFSET] 	/* Check SSP status */
-	tst 	r9, #0x0010					/* Check if BSY bit is set */
-	bne 	wait_transmit 				/* If still transmitting, keep waiting */
-	ldr 	r9, [r10, #SSP_DATA_OFFSET]	/* Load received data */
-	bx 		lr 							/* Exit subroutine */
-cs_up:
-	mov.w 	r8, #0xff
-	b 		cs_write
-cs_down:
-	mov.w 	r8, #0x0000
-cs_write:
-	mov.w 	r10, #IO_BASE_LOW
-	movt	r10, #IO_BASE_HIGH
-	str.w 	r8, [r10, #IO_CS_OFFSET]
-	bx 		lr
-error:
-	movs	r0, #0
-exit:
-	bkpt 	#0x00
-
-	.end

contrib/loaders/flash/lpcspifi_init.S

@@ -1,102 +0,0 @@
-/***************************************************************************
- *   Copyright (C) 2012 by George Harris  		                           *
- *   george@luminairecoffee.com                                            *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
- ***************************************************************************/
-
-/***************************************************************************
-*	This is an algorithm for the LPC43xx family (and probably the LPC18xx  *
-*	family as well, though they have not been tested) that will initialize *
-*	memory-mapped SPI flash accesses. Unfortunately NXP has published      *
-*	neither the ROM source code that performs this initialization nor the  *
-*	register descriptions necessary to do so, so this code is necessary to *
-*	call into the ROM SPIFI API.                                           *
-***************************************************************************/
-
-	.text
-	.syntax unified
-	.arch armv7-m
-	.thumb
-	.thumb_func
-
-	.align 2
-
-/*
- * Params :
- * r0 = spifi clock speed
- */
-
-#define IOCONFIG_BASE_HIGH          0x4008
-#define IOCONFIG_BASE_LOW           0x6000
-#define IOCONFIG_SCK_OFFSET         0x18c
-#define IOCONFIG_HOLD_OFFSET        0x190
-#define IOCONFIG_WP_OFFSET          0x194
-#define IOCONFIG_MISO_OFFSET        0x198
-#define IOCONFIG_MOSI_OFFSET        0x19c
-#define IOCONFIG_CS_OFFSET          0x1a0
-
-#define SPIFI_ROM_TABLE_BASE_HIGH   0x1040
-#define SPIFI_ROM_TABLE_BASE_LOW    0x0118
-
-code:
-	mov.w 	r8, r0
-	sub		sp, #0x84
-	add		r7, sp, #0x0
-	/* Initialize SPIFI pins */
-	mov.w	r3, #IOCONFIG_BASE_LOW
-	movt	r3, #IOCONFIG_BASE_HIGH
-	mov.w	r2, #0xf3
-	str.w 	r2, [r3, #IOCONFIG_SCK_OFFSET]
-	mov.w	r3, #IOCONFIG_BASE_LOW
-	movt	r3, #IOCONFIG_BASE_HIGH
-	mov.w	r2, #IOCONFIG_BASE_LOW
-	movt	r2, #IOCONFIG_BASE_HIGH
-	mov.w	r1, #IOCONFIG_BASE_LOW
-	movt	r1, #IOCONFIG_BASE_HIGH
-	mov.w	r0, #IOCONFIG_BASE_LOW
-	movt	r0, #IOCONFIG_BASE_HIGH
-	mov.w	r4, #0xd3
-	str.w	r4, [r0, #IOCONFIG_MOSI_OFFSET]
-	mov	r0, r4
-	str.w	r0, [r1, #IOCONFIG_MISO_OFFSET]
-	mov	r1, r0
-	str.w	r1, [r2, #IOCONFIG_WP_OFFSET]
-	str.w	r1, [r3, #IOCONFIG_HOLD_OFFSET]
-	mov.w	r3, #IOCONFIG_BASE_LOW
-	movt	r3, #IOCONFIG_BASE_HIGH
-	mov.w	r2, #0x13
-	str.w	r2, [r3, #IOCONFIG_CS_OFFSET]
-
-	/* Perform SPIFI init. See spifi_rom_api.h (in NXP lpc43xx driver package) for details */
-	/* on initialization arguments. */
-	movw 	r3, #SPIFI_ROM_TABLE_BASE_LOW      /* The ROM API table is located @ 0x10400118, and			*/
-	movt 	r3, #SPIFI_ROM_TABLE_BASE_HIGH     /* the first pointer in the struct is to the init function. */
-	ldr 	r3, [r3, #0x0]
-	ldr 	r4, [r3, #0x0]		                 /* Grab the init function pointer from the table */
-	/* Set up function arguments */
-	movw 	r0, #0x3b4
-	movt 	r0, #0x1000		    	              /* Pointer to a SPIFI data struct that we don't care about */
-	mov.w 	r1, #0x3                        /* "csHigh". Not 100% sure what this does. */
-	mov.w 	r2, #0xc0 			              /* The configuration word: S_RCVCLOCK | S_FULLCLK */
-	mov.w 	r3, r8 				              /* SPIFI clock speed (12MHz) */
-	blx 	r4					                    /* Call the init function */
-	b 		done
-
-done:
-	bkpt 	#0
-
-	.end

contrib/loaders/flash/lpcspifi_write.S

@@ -1,222 +0,0 @@
-/***************************************************************************
- *   Copyright (C) 2012 by George Harris                                   *
- *   george@luminairecoffee.com                                            *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
- ***************************************************************************/
-
-	.text
-	.syntax unified
-	.cpu cortex-m3
-	.thumb
-	.thumb_func
-
-/*
- * Params :
- * r0 = workarea start, status (out)
- * r1 = workarea end
- * r2 = target address (offset from flash base)
- * r3 = count (bytes)
- * r4 = page size
- * Clobbered:
- * r7 - rp
- * r8 - wp, tmp
- * r9 - send/receive data
- * r10 - temp
- * r11 - current page end address
- */
-
-/*
- * This code is embedded within: src/flash/nor/lpcspifi.c as a "C" array.
- *
- * To rebuild:
- *   arm-none-eabi-gcc -c lpcspifi_write.S
- *   arm-none-eabi-objcopy -O binary lpcspifi_write.o lpcspifi_write.bin
- *   xxd -c 8 -i lpcspifi_write.bin > lpcspifi_write.txt
- *
- * Then read and edit this result into the "C" source.
- */
-
-#define SSP_BASE_HIGH				0x4008
-#define SSP_BASE_LOW				0x3000
-#define SSP_CR0_OFFSET				0x00
-#define SSP_CR1_OFFSET				0x04
-#define SSP_DATA_OFFSET 			0x08
-#define SSP_CPSR_OFFSET 			0x10
-#define SSP_SR_OFFSET				0x0c
-
-#define SSP_CLOCK_BASE_HIGH 		0x4005
-#define SSP_CLOCK_BASE_LOW 			0x0000
-#define SSP_BRANCH_CLOCK_BASE_HIGH 	0x4005
-#define SSP_BRANCH_CLOCK_BASE_LOW	0x2000
-#define SSP_BASE_CLOCK_OFFSET		0x94
-#define SSP_BRANCH_CLOCK_OFFSET		0x700
-
-#define IOCONFIG_BASE_HIGH			0x4008
-#define IOCONFIG_BASE_LOW			0x6000
-#define IOCONFIG_SCK_OFFSET			0x18c
-#define IOCONFIG_HOLD_OFFSET		0x190
-#define IOCONFIG_WP_OFFSET			0x194
-#define IOCONFIG_MISO_OFFSET		0x198
-#define IOCONFIG_MOSI_OFFSET		0x19c
-#define IOCONFIG_CS_OFFSET			0x1a0
-
-#define IO_BASE_HIGH 				0x400f
-#define IO_BASE_LOW 				0x4000
-#define IO_CS_OFFSET 				0xab
-#define IODIR_BASE_HIGH 			0x400f
-#define IODIR_BASE_LOW				0x6000
-#define IO_CS_DIR_OFFSET 			0x14
-
-
-setup: /* Initialize SSP pins and module */
-	mov.w	r10, #IOCONFIG_BASE_LOW
-	movt	r10, #IOCONFIG_BASE_HIGH
-	mov.w	r8, #0xea
-	str.w	r8, [r10, #IOCONFIG_SCK_OFFSET]		/* Configure SCK pin function */
-	mov.w	r8, #0x40
-	str.w	r8, [r10, #IOCONFIG_HOLD_OFFSET]	/* Configure /HOLD pin function */
-	mov.w	r8, #0x40
-	str.w	r8, [r10, #IOCONFIG_WP_OFFSET]		/* Configure /WP pin function */
-	mov.w	r8, #0xed
-	str.w	r8, [r10, #IOCONFIG_MISO_OFFSET]	/* Configure MISO pin function */
-	mov.w	r8, #0xed
-	str.w	r8, [r10, #IOCONFIG_MOSI_OFFSET]	/* Configure MOSI pin function */
-	mov.w	r8, #0x44
-	str.w	r8, [r10, #IOCONFIG_CS_OFFSET]		/* Configure CS pin function */
-
-	mov.w	r10, #IODIR_BASE_LOW
-	movt	r10, #IODIR_BASE_HIGH
-	mov.w	r8, #0x800
-	str 	r8, [r10, #IO_CS_DIR_OFFSET]		/* Set CS as output */
-	mov.w	r10, #IO_BASE_LOW
-	movt	r10, #IO_BASE_HIGH
-	mov.w	r8, #0xff
-	str.w	r8, [r10, #IO_CS_OFFSET]			/* Set CS high */
-
-	mov.w 	r10, #SSP_CLOCK_BASE_LOW
-	movt 	r10, #SSP_CLOCK_BASE_HIGH
-	mov.w 	r8, #0x0000
-	movt 	r8, #0x0100
-	str.w 	r8, [r10, #SSP_BASE_CLOCK_OFFSET] 	/* Configure SSP0 base clock (use 12 MHz IRC) */
-
-	mov.w 	r10, #SSP_BRANCH_CLOCK_BASE_LOW
-	movt 	r10, #SSP_BRANCH_CLOCK_BASE_HIGH
-	mov.w 	r8, #0x01
-	str.w 	r8, [r10, #SSP_BRANCH_CLOCK_OFFSET] /* Configure (enable) SSP0 branch clock */
-
-	mov.w 	r10, #SSP_BASE_LOW
-	movt	r10, #SSP_BASE_HIGH
-	mov.w 	r8, #0x07
-	str.w 	r8, [r10, #SSP_CR0_OFFSET] 			/* Set clock postscale */
-	mov.w 	r8, #0x02
-	str.w 	r8, [r10, #SSP_CPSR_OFFSET] 		/* Set clock prescale */
-	str.w 	r8, [r10, #SSP_CR1_OFFSET] 			/* Enable SSP in SPI mode */
-
-	mov.w 	r11, #0x00
-find_next_page_boundary:
-	add 	r11, r4			/* Increment to the next page */
-	cmp 	r11, r2
-	/* If we have not reached the next page boundary after the target address, keep going */
-	bls 	find_next_page_boundary
-write_enable:
-	bl 		cs_down
-	mov.w 	r9, #0x06 		/* Send the write enable command */
-	bl 		write_data
-	bl 		cs_up
-
-	bl 		cs_down
-	mov.w 	r9, #0x05 		/* Get status register */
-	bl 		write_data
-	mov.w 	r9, #0x00 		/* Dummy data to clock in status */
-	bl 		write_data
-	bl 		cs_up
-
-	tst 	r9, #0x02 		/* If the WE bit isn't set, we have a problem. */
-	beq 	error
-page_program:
-	bl 		cs_down
-	mov.w 	r9, #0x02 		/* Send the page program command */
-	bl 		write_data
-write_address:
-	lsr 	r9, r2, #16 	/* Send the current 24-bit write address, MSB first */
-	bl 		write_data
-	lsr 	r9, r2, #8
-	bl 		write_data
-	mov.w 	r9, r2
-	bl 		write_data
-wait_fifo:
-	ldr 	r8, [r0]  		/* read the write pointer */
-	cmp 	r8, #0 			/* if it's zero, we're gonzo */
-	beq 	exit
-	ldr 	r7, [r0, #4] 	/* read the read pointer */
-	cmp 	r7, r8 			/* wait until they are not equal */
-	beq 	wait_fifo
-write:
-	ldrb 	r9, [r7], #0x01 /* Load one byte from the FIFO, increment the read pointer by 1 */
-	bl 		write_data 		/* send the byte to the flash chip */
-
-	cmp 	r7, r1			/* wrap the read pointer if it is at the end */
-	it  	cs
-	addcs	r7, r0, #8		/* skip loader args */
-	str 	r7, [r0, #4]	/* store the new read pointer */
-	subs	r3, r3, #1		/* decrement count */
-	cbz		r3, exit 		/* Exit if we have written everything */
-
-	add 	r2, #1 			/* Increment flash address by 1 */
-	cmp 	r11, r2   		/* See if we have reached the end of a page */
-	bne 	wait_fifo 		/* If not, keep writing bytes */
-	bl 		cs_up			/* Otherwise, end the command and keep going w/ the next page */
-	add 	r11, r4 		/* Move up the end-of-page address by the page size*/
-wait_flash_busy:			/* Wait for the flash to finish the previous page write */
-	bl 		cs_down
-	mov.w 	r9, #0x05 					/* Get status register */
-	bl 		write_data
-	mov.w 	r9, #0x00 					/* Dummy data to clock in status */
-	bl 		write_data
-	bl 		cs_up
-	tst 	r9, #0x01 					/* If it isn't done, keep waiting */
-	bne 	wait_flash_busy
-	b 		write_enable 				/* If it is done, start a new page write */
-write_data: 							/* Send/receive 1 byte of data over SSP */
-	mov.w	r10, #SSP_BASE_LOW
-	movt	r10, #SSP_BASE_HIGH
-	str.w 	r9, [r10, #SSP_DATA_OFFSET]	/* Write supplied data to the SSP data reg */
-wait_transmit:
-	ldr 	r9, [r10, #SSP_SR_OFFSET] 	/* Check SSP status */
-	tst 	r9, #0x0010					/* Check if BSY bit is set */
-	bne 	wait_transmit 				/* If still transmitting, keep waiting */
-	ldr 	r9, [r10, #SSP_DATA_OFFSET]	/* Load received data */
-	bx 		lr 							/* Exit subroutine */
-cs_up:
-	mov.w 	r8, #0xff
-	b 		cs_write
-cs_down:
-	mov.w 	r8, #0x0000
-cs_write:
-	mov.w 	r10, #IO_BASE_LOW
-	movt	r10, #IO_BASE_HIGH
-	str.w 	r8, [r10, #IO_CS_OFFSET]
-	bx 		lr
-error:
-	movs	r0, #0
-	str 	r0, [r2, #4]	/* set rp = 0 on error */
-exit:
-	bl 		cs_up			/* end the command before returning */
-	mov 	r0, r6
-	bkpt 	#0x00
-
-	.end

contrib/loaders/flash/mdr32fx.S

@@ -1,125 +0,0 @@
-/***************************************************************************
- *   Copyright (C) 2011 by Andreas Fritiofson                              *
- *   andreas.fritiofson@gmail.com                                          *
- *                                                                         *
- *   Copyright (C) 2013 by Paul Fertser                                    *
- *   fercerpav@gmail.com                                                   *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
- ***************************************************************************/
-
-	.text
-	.syntax unified
-	.cpu cortex-m0
-	.thumb
-	.thumb_func
-	.global write
-
-	/* Params:
-	 * r0 - flash base (in), status (out)
-	 * r1 - count (32bit)
-	 * r2 - workarea start
-	 * r3 - workarea end
-	 * r4 - target address
-	 * Clobbered:
-	 * r5 - rp
-	 * r6 - wp, tmp
-	 * r7 - current FLASH_CMD
-	 */
-
-#define FLASH_CMD	0x00
-#define FLASH_ADR	0x04
-#define FLASH_DI	0x08
-
-#define FLASH_NVSTR	(1 << 13)
-#define FLASH_PROG	(1 << 12)
-#define FLASH_MAS1	(1 << 11)
-#define FLASH_ERASE	(1 << 10)
-#define FLASH_SE	(1 << 8)
-#define FLASH_YE	(1 << 7)
-#define FLASH_XE	(1 << 6)
-
-	ldr	r7, [r0, #FLASH_CMD]
-wait_fifo:
-	ldr 	r6, [r2, #0]	/* read wp */
-	cmp 	r6, #0			/* abort if wp == 0 */
-	beq 	exit
-	ldr 	r5, [r2, #4]	/* read rp */
-	cmp 	r5, r6			/* wait until rp != wp */
-	beq 	wait_fifo
-
-	ldr	r6, [r5]	/* "*target_address++ = *rp++" */
-	str	r4, [r0, #FLASH_ADR]
-	str	r6, [r0, #FLASH_DI]
-
-	ldr	r6, =(FLASH_XE | FLASH_PROG)
-	orrs	r7, r7, r6
-	str	r7, [r0, #FLASH_CMD]
-	# wait 5us
-	movs	r6, #5
-	bl	delay
-	ldr	r6, =#FLASH_NVSTR
-	orrs	r7, r7, r6
-	str	r7, [r0, #FLASH_CMD]
-	# wait 10us
-	movs	r6, #13
-	bl	delay
-	movs	r6, #FLASH_YE
-	orrs	r7, r7, r6
-	str	r7, [r0, #FLASH_CMD]
-	# wait 40us
-	movs	r6, #61
-	bl	delay
-	movs	r6, #FLASH_YE
-	bics	r7, r7, r6
-	str	r7, [r0, #FLASH_CMD]
-	ldr	r6, =#FLASH_PROG
-	bics	r7, r7, r6
-	str	r7, [r0, #FLASH_CMD]
-	# wait 5us
-	movs	r6, #5
-	bl	delay
-	ldr	r6, =#(FLASH_XE | FLASH_NVSTR)
-	bics	r7, r7, r6
-	str	r7, [r0, #FLASH_CMD]
-
-	adds	r5, #4
-	adds	r4, #4
-
-	cmp 	r5, r3			/* wrap rp at end of buffer */
-	bcc	no_wrap
-	mov	r5, r2
-	adds	r5, #8
-no_wrap:
-	str 	r5, [r2, #4]	/* store rp */
-	subs	r1, r1, #1		/* decrement word count */
-	cmp     r1, #0
-	beq     exit		/* loop if not done */
-	b	wait_fifo
-exit:
-	mov		r0, r6			/* return status in r0 */
-	bkpt	#0
-
-	/* r6 - in
-	 * for r6 == 1 it'll take:
-	 *  1 (prepare operand) + 4 (bl) + 2 (subs+cmp) + 1 (bne) + 3 (b) ->
-	 *  11 tacts == 1.4us with 8MHz
-	 * every extra iteration will take 5 tacts == 0.6us */
-delay:
-	subs	r6, r6, #1
-	cmp	r6, #0
-	bne	delay
-	bx	lr

contrib/loaders/flash/mrvlqspi_write.S

@@ -1,232 +0,0 @@
-/***************************************************************************
- *   Copyright (C) 2014 by Mahavir Jain <mjain@marvell.com>                *
- *                                                                         *
- *   Adapted from (contrib/loaders/flash/lpcspifi_write.S):                *
- *   Copyright (C) 2012 by George Harris                                   *
- *   george@luminairecoffee.com                                            *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
- ***************************************************************************/
-
-	.text
-	.syntax unified
-	.cpu cortex-m3
-	.thumb
-	.thumb_func
-
-/*
- * For compilation:
- * arm-none-eabi-gcc -mcpu=cortex-m3 -mthumb -c contrib/loaders/flash/mrvlqspi_write.S
- * arm-none-eabi-objcopy -O binary mrvlqspi_write.o code.bin
- * Copy code.bin into mrvlqspi flash driver
- */
-
-/*
- * Params :
- * r0 = workarea start, status (out)
- * r1 = workarea end
- * r2 = target address (offset from flash base)
- * r3 = count (bytes)
- * r4 = page size
- * r5 = qspi base address
- * Clobbered:
- * r7 - rp
- * r8 - wp, tmp
- * r9 - send/receive data
- * r10 - current page end address
- */
-
-#define CNTL	0x0
-#define CONF	0x4
-#define DOUT	0x8
-#define DIN	0xc
-#define INSTR   0x10
-#define ADDR    0x14
-#define RDMODE  0x18
-#define HDRCNT	0x1c
-#define DINCNT  0x20
-
-#define SS_EN (1 << 0)
-#define XFER_RDY (1 << 1)
-#define RFIFO_EMPTY (1 << 4)
-#define WFIFO_EMPTY (1 << 6)
-#define WFIFO_FULL (1 << 7)
-#define FIFO_FLUSH (1 << 9)
-#define RW_EN (1 << 13)
-#define XFER_STOP (1 << 14)
-#define XFER_START (1 << 15)
-
-#define INS_WRITE_ENABLE 0x06
-#define INS_READ_STATUS 0x05
-#define INS_PAGE_PROGRAM 0x02
-
-init:
-	mov.w 	r10, #0x00
-find_next_page_boundary:
-	add 	r10, r4		/* Increment to the next page */
-	cmp 	r10, r2
-	/* If we have not reached the next page boundary after the target address, keep going */
-	bls 	find_next_page_boundary
-write_enable:
-	/* Flush read/write fifo's */
-	bl 	flush_fifo
-
-	/* Instruction byte 1 */
-	movs 	r8, #0x1
-	str 	r8, [r5, #HDRCNT]
-
-	/* Set write enable instruction */
-	movs 	r8, #INS_WRITE_ENABLE
-	str 	r8, [r5, #INSTR]
-
-	movs	r9, #0x1
-	bl	start_tx
-	bl 	stop_tx
-page_program:
-	/* Instruction byte 1, Addr byte 3 */
-	movs 	r8, #0x31
-	str 	r8, [r5, #HDRCNT]
-	/* Todo: set addr and data pin to single */
-write_address:
-	mov 	r8, r2
-	str 	r8, [r5, #ADDR]
-	/* Set page program instruction */
-	movs 	r8, #INS_PAGE_PROGRAM
-	str 	r8, [r5, #INSTR]
-	/* Start write transfer */
-	movs	r9, #0x1
-	bl	start_tx
-wait_fifo:
-	ldr 	r8, [r0]  	/* read the write pointer */
-	cmp 	r8, #0 		/* if it's zero, we're gonzo */
-	beq 	exit
-	ldr 	r7, [r0, #4] 	/* read the read pointer */
-	cmp 	r7, r8 		/* wait until they are not equal */
-	beq 	wait_fifo
-write:
-	ldrb 	r9, [r7], #0x01 /* Load one byte from the FIFO, increment the read pointer by 1 */
-	bl 	write_data 	/* send the byte to the flash chip */
-
-	cmp 	r7, r1		/* wrap the read pointer if it is at the end */
-	it  	cs
-	addcs	r7, r0, #8	/* skip loader args */
-	str 	r7, [r0, #4]	/* store the new read pointer */
-	subs	r3, r3, #1	/* decrement count */
-	cmp	r3, #0 		/* Exit if we have written everything */
-	beq	write_wait
-	add 	r2, #1 		/* Increment flash address by 1 */
-	cmp 	r10, r2   	/* See if we have reached the end of a page */
-	bne 	wait_fifo 	/* If not, keep writing bytes */
-write_wait:
-	bl 	stop_tx		/* Otherwise, end the command and keep going w/ the next page */
-	add 	r10, r4 	/* Move up the end-of-page address by the page size*/
-check_flash_busy:		/* Wait for the flash to finish the previous page write */
-	/* Flush read/write fifo's */
-	bl 	flush_fifo
-	/* Instruction byte 1 */
-	movs 	r8, #0x1
-	str 	r8, [r5, #HDRCNT]
-	/* Continuous data in of status register */
-	movs	r8, #0x0
-	str 	r8, [r5, #DINCNT]
-	/* Set write enable instruction */
-	movs 	r8, #INS_READ_STATUS
-	str 	r8, [r5, #INSTR]
-	/* Start read transfer */
-	movs	r9, #0x0
-	bl	start_tx
-wait_flash_busy:
-	bl 	read_data
-	and.w	r9, r9, #0x1
-	cmp	r9, #0x0
-	bne.n	wait_flash_busy
-	bl 	stop_tx
-	cmp	r3, #0
-	bne.n 	write_enable 	/* If it is done, start a new page write */
-	b	exit		/* All data written, exit */
-
-write_data: 			/* Send/receive 1 byte of data over QSPI */
-	ldr	r8, [r5, #CNTL]
-	lsls    r8, r8, #24
-	bmi.n	write_data
-	str 	r9, [r5, #DOUT]
-	bx	lr
-
-read_data:			/* Read 1 byte of data over QSPI */
-	ldr	r8, [r5, #CNTL]
-	lsls    r8, r8, #27
-	bmi.n	read_data
-	ldr	r9, [r5, #DIN]
-	bx	lr
-
-flush_fifo:			/* Flush read write fifos */
-	ldr	r8, [r5, #CONF]
-	orr.w   r8, r8, #FIFO_FLUSH
-	str     r8, [r5, #CONF]
-flush_reset:
-	ldr	r8, [r5, #CONF]
-	lsls    r8, r8, #22
-	bmi.n	flush_reset
-	bx	lr
-
-start_tx:
-	ldr	r8, [r5, #CNTL]
-	orr.w	r8, r8, #SS_EN
-	str	r8, [r5, #CNTL]
-xfer_rdy:
-	ldr	r8, [r5, #CNTL]
-	lsls    r8, r8, #30
-	bpl.n	xfer_rdy
-	ldr	r8, [r5, #CONF]
-	bfi	r8, r9, #13, #1
-	orr.w	r8, r8, #XFER_START
-	str	r8, [r5, #CONF]
-	bx lr
-
-stop_tx:
-	ldr	r8, [r5, #CNTL]
-	lsls    r8, r8, #30
-	bpl.n	stop_tx
-wfifo_wait:
-	ldr	r8, [r5, #CNTL]
-	lsls    r8, r8, #25
-	bpl.n	wfifo_wait
-	ldr	r8, [r5, #CONF]
-	orr.w	r8, r8, #XFER_STOP
-	str	r8, [r5, #CONF]
-xfer_start:
-	ldr	r8, [r5, #CONF]
-	lsls	r8, r8, #16
-	bmi.n 	xfer_start
-ss_disable:
-	# Disable SS_EN
-	ldr	r8, [r5, #CNTL]
-	bic.w	r8, r8, #SS_EN
-	str	r8, [r5, #CNTL]
-wait:
-	ldr	r8, [r5, #CNTL]
-	lsls    r8, r8, #30
-	bpl.n	wait
-	bx 	lr
-
-error:
-	movs	r0, #0
-	str 	r0, [r2, #4]	/* set rp = 0 on error */
-exit:
-	mov 	r0, r6
-	bkpt 	#0x00
-
-	.end

contrib/loaders/flash/pic32mx.s

@@ -1,132 +0,0 @@
-/***************************************************************************
- *   Copyright (C) 2010 by Spencer Oliver                                  *
- *   spen@spen-soft.co.uk                                                  *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
- ***************************************************************************/
-
-	.text
-	.arch m4k
-	.set noreorder
-	.set noat
-
-/* params:
- * $a0 src adr - ram + result
- * $a1 dest adr - flash
- * $a2 count (32bit words)
- * vars
- *
- * temps:
- * $t0, $t1, $t2, $t3, $t4, $t5
- * $s0, $s1, $s3, $s4, $s5
- */
-
-	.type main, @function
-	.global main
-
-.ent main
-main:
-	/* setup constants */
-	lui		$t0, 0xaa99
-	ori		$t0, 0x6655				/* NVMKEY1 */
-	lui		$t1, 0x5566
-	ori		$t1, 0x99AA				/* NVMKEY2 */
-	lui		$t2, 0xBF80
-	ori		$t2, 0xF400				/* NVMCON */
-	ori		$t3, $zero, 0x4003		/* NVMCON row write cmd */
-	ori		$t4, $zero, 0x8000		/* NVMCON start cmd */
-
-write_row:
-	/* can we perform a row write: 128 32bit words */
-	sltiu	$s3, $a2, 128
-	bne		$s3, $zero, write_word
-	ori		$t5, $zero, 0x4000		/* NVMCON clear cmd */
-
-	/* perform row write 512 bytes */
-	sw		$a1, 32($t2)	/* set NVMADDR with dest addr - real addr */
-	sw		$a0, 64($t2)	/* set NVMSRCADDR with src addr - real addr */
-
-	bal		progflash
-	addiu	$a0, $a0, 512
-	addiu	$a1, $a1, 512
-	beq		$zero, $zero, write_row
-	addiu	$a2, $a2, -128
-
-write_word:
-	/* write 32bit words */
-	lui		$s5, 0xa000
-	ori		$s5, 0x0000
-	or		$a0, $a0, $s5			/* convert to virtual addr */
-
-	beq		$zero, $zero, next_word
-	ori		$t3, $zero, 0x4001		/* NVMCON word write cmd */
-
-prog_word:
-	lw		$s4, 0($a0)		/* load data - from virtual addr */
-	sw		$s4, 48($t2)	/* set NVMDATA with data */
-	sw		$a1, 32($t2)	/* set NVMADDR with dest addr - real addr */
-
-	bal		progflash
-	addiu	$a0, $a0, 4
-	addiu	$a1, $a1, 4
-	addiu	$a2, $a2, -1
-next_word:
-	bne		$a2, $zero, prog_word
-	nop
-
-done:
-	beq		$zero, $zero, exit
-	addiu	$a0, $zero, 0
-
-error:
-	/* save result to $a0 */
-	addiu	$a0, $s1, 0
-
-exit:
-	sdbbp
-.end main
-
-	.type progflash, @function
-	.global progflash
-
-.ent progflash
-progflash:
-	sw		$t3, 0($t2)		/* set NVMWREN */
-	sw		$t0, 16($t2)	/* write NVMKEY1 */
-	sw		$t1, 16($t2)	/* write NVMKEY2 */
-	sw		$t4, 8($t2)		/* start operation */
-
-waitflash:
-	lw		$s0, 0($t2)
-	and		$s0, $s0, $t4
-	bne		$s0, $zero, waitflash
-	nop
-
-	/* following is to comply with errata #34
-	 * 500ns delay required */
-	nop
-	nop
-	nop
-	nop
-	/* check for errors */
-	lw		$s1, 0($t2)
-	andi	$s1, $zero, 0x3000
-	bne		$s1, $zero, error
-	sw		$t5, 4($t2)		/* clear NVMWREN */
-	jr		$ra
-	nop
-
-.end progflash

contrib/loaders/flash/sim3x.s

@@ -1,81 +0,0 @@
-/***************************************************************************
- *   Copyright (C) 2014 by Ladislav Bábel                                  *
- *   ladababel@seznam.cz                                                   *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- ***************************************************************************/
-
-#define INITIAL_UNLOCK    0x5A
-#define MULTIPLE_UNLOCK   0xF2
-
-#define FLASHCTRL_KEY     0x4002E0C0
-#define FLASHCTRL_CONFIG  0x4002E000
-#define FLASHCTRL_WRADDR  0x4002E0A0
-#define FLASHCTRL_WRDATA  0x4002E0B0
-#define BUSYF             0x00100000
-
-
-		/* Write the initial unlock value to KEY (0xA5) */
-		movs    r6, #INITIAL_UNLOCK
-		str     r6, [r0, #FLASHCTRL_KEY]
-
-		/* Write the multiple unlock value to KEY (0xF2) */
-		movs    r6, #MULTIPLE_UNLOCK
-		str     r6, [r0, #FLASHCTRL_KEY]
-
-wait_fifo:
-		ldr     r6, [r2, #0]
-		cmp	    r6, #0
-		beq     exit
-		ldr     r5, [r2, #4]
-		cmp     r5, r6
-		beq     wait_fifo
-
-		/* wait for BUSYF flag */
-wait_busy1:
-		ldr     r6, [r0, #FLASHCTRL_CONFIG]
-		tst     r6, #BUSYF
-		bne     wait_busy1
-
-		/* Write the destination address to WRADDR */
-		str     r4, [r0, #FLASHCTRL_WRADDR]
-
-		/* Write the data half-word to WRDATA in right-justified format */
-		ldrh    r6, [r5]
-		str     r6, [r0, #FLASHCTRL_WRDATA]
-
-		adds    r5, #2
-		adds    r4, #2
-
-		/* wrap rp at end of buffer */
-		cmp     r5, r3
-		bcc     no_wrap
-		mov     r5, r2
-		adds    r5, #8
-
-no_wrap:
-		str     r5, [r2, #4]
-		subs    r1, r1, #1
-		cmp     r1, #0
-		beq     exit
-		b       wait_fifo
-
-exit:
-		movs    r6, #MULTIPLE_LOCK
-		str     r6, [r0, #FLASHCTRL_KEY]
-
-		/* wait for BUSYF flag */
-wait_busy2:
-		ldr     r6, [r0, #FLASHCTRL_CONFIG]
-		tst     r6, #BUSYF
-		bne     wait_busy2
-
-		bkpt    #0

contrib/loaders/flash/stellaris.s

@@ -1,78 +0,0 @@
-/***************************************************************************
- *   Copyright (C) 2006 by Magnus Lundin                                   *
- *   lundin@mlu.mine.nu                                                    *
- *                                                                         *
- *   Copyright (C) 2008 by Spencer Oliver                                  *
- *   spen@spen-soft.co.uk                                                  *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
- ***************************************************************************/
-
-	.text
-	.syntax unified
-	.cpu cortex-m3
-	.thumb
-	.thumb_func
-
-/*
- * Params :
- * r0 = workarea start
- * r1 = workarea end
- * r2 = target address
- * r3 = count (32bit words)
- *
- * Clobbered:
- * r4 = pFLASH_CTRL_BASE
- * r5 = FLASHWRITECMD
- * r7 - rp
- * r8 - wp, tmp
- */
-
-write:
-	ldr 	r4, pFLASH_CTRL_BASE
-	ldr 	r5, FLASHWRITECMD
-
-wait_fifo:
-	ldr 	r8, [r0, #0]	/* read wp */
-	cmp 	r8, #0			/* abort if wp == 0 */
-	beq 	exit
-	ldr 	r7, [r0, #4]	/* read rp */
-	cmp 	r7, r8			/* wait until rp != wp */
-	beq 	wait_fifo
-
-mainloop:
-	str		r2, [r4, #0]	/* FMA - write address */
-	add		r2, r2, #4		/* increment target address */
-	ldr		r8, [r7], #4
-	str		r8, [r4, #4]	/* FMD - write data */
-	str		r5, [r4, #8]	/* FMC - enable write */
-busy:
-	ldr		r8, [r4, #8]
-	tst		r8, #1
-	bne		busy
-
-	cmp 	r7, r1			/* wrap rp at end of buffer */
-	it  	cs
-	addcs	r7, r0, #8		/* skip loader args */
-	str 	r7, [r0, #4]	/* store rp */
-	subs	r3, r3, #1		/* decrement word count */
-	cbz 	r3, exit		/* loop if not done */
-	b		wait_fifo
-exit:
-	bkpt	#0
-
-pFLASH_CTRL_BASE: .word 0x400FD000
-FLASHWRITECMD: .word 0xA4420001

contrib/loaders/flash/stm32f1x.S

@@ -1,76 +0,0 @@
-/***************************************************************************
- *   Copyright (C) 2011 by Andreas Fritiofson                              *
- *   andreas.fritiofson@gmail.com                                          *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
- ***************************************************************************/
-
-	.text
-	.syntax unified
-	.cpu cortex-m0
-	.thumb
-	.thumb_func
-	.global write
-
-	/* Params:
-	 * r0 - flash base (in), status (out)
-	 * r1 - count (halfword-16bit)
-	 * r2 - workarea start
-	 * r3 - workarea end
-	 * r4 - target address
-	 * Clobbered:
-	 * r5 - rp
-	 * r6 - wp, tmp
-	 * r7 - tmp
-	 */
-
-#define STM32_FLASH_SR_OFFSET 0x0c /* offset of SR register from flash reg base */
-
-wait_fifo:
-	ldr 	r6, [r2, #0]	/* read wp */
-	cmp 	r6, #0			/* abort if wp == 0 */
-	beq 	exit
-	ldr 	r5, [r2, #4]	/* read rp */
-	cmp 	r5, r6			/* wait until rp != wp */
-	beq 	wait_fifo
-	ldrh	r6, [r5]	/* "*target_address++ = *rp++" */
-	strh	r6, [r4]
-	adds	r5, #2
-	adds	r4, #2
-busy:
-	ldr 	r6, [r0, #STM32_FLASH_SR_OFFSET]	/* wait until BSY flag is reset */
-	movs	r7, #1
-	tst 	r6, r7
-	bne 	busy
-	movs	r7, #0x14		/* check the error bits */
-	tst 	r6, r7
-	bne 	error
-	cmp 	r5, r3			/* wrap rp at end of buffer */
-	bcc	no_wrap
-	mov	r5, r2
-	adds	r5, #8
-no_wrap:
-	str 	r5, [r2, #4]	/* store rp */
-	subs	r1, r1, #1		/* decrement halfword count */
-	cmp     r1, #0
-	beq     exit		/* loop if not done */
-	b	wait_fifo
-error:
-	movs	r0, #0
-	str 	r0, [r2, #4]	/* set rp = 0 on error */
-exit:
-	mov		r0, r6			/* return status in r0 */
-	bkpt	#0

contrib/loaders/flash/stm32f2x.S

@@ -1,80 +0,0 @@
-/***************************************************************************
- *   Copyright (C) 2010 by Spencer Oliver                                  *
- *   spen@spen-soft.co.uk                                                  *
- *                                                                         *
- *   Copyright (C) 2011 Øyvind Harboe                                      *
- *   oyvind.harboe@zylin.com                                               *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
- ***************************************************************************/
-
-	.text
-	.syntax unified
-	.cpu cortex-m3
-	.thumb
-	.thumb_func
-
-/*
- * Params :
- * r0 = workarea start, status (out)
- * r1 = workarea end
- * r2 = target address
- * r3 = count (16bit words)
- * r4 = flash base
- *
- * Clobbered:
- * r6 - temp
- * r7 - rp
- * r8 - wp, tmp
- */
-
-#define STM32_FLASH_CR_OFFSET	0x10			/* offset of CR register in FLASH struct */
-#define STM32_FLASH_SR_OFFSET	0x0c			/* offset of SR register in FLASH struct */
-
-wait_fifo:
-	ldr 	r8, [r0, #0]	/* read wp */
-	cmp 	r8, #0			/* abort if wp == 0 */
-	beq 	exit
-	ldr 	r7, [r0, #4]	/* read rp */
-	cmp 	r7, r8			/* wait until rp != wp */
-	beq 	wait_fifo
-
-	ldr		r6, STM32_PROG16
-	str		r6, [r4, #STM32_FLASH_CR_OFFSET]
-	ldrh 	r6, [r7], #0x02						/* read one half-word from src, increment ptr */
-	strh 	r6, [r2], #0x02						/* write one half-word from src, increment ptr */
-busy:
-	ldr 	r6, [r4, #STM32_FLASH_SR_OFFSET]
-	tst 	r6, #0x10000						/* BSY (bit16) == 1 => operation in progress */
-	bne 	busy								/* wait more... */
-	tst		r6, #0xf0							/* PGSERR | PGPERR | PGAERR | WRPERR */
-	bne		error								/* fail... */
-
-	cmp 	r7, r1			/* wrap rp at end of buffer */
-	it  	cs
-	addcs	r7, r0, #8		/* skip loader args */
-	str 	r7, [r0, #4]	/* store rp */
-	subs	r3, r3, #1		/* decrement halfword count */
-	cbz 	r3, exit		/* loop if not done */
-	b		wait_fifo
-error:
-	movs	r1, #0
-	str		r1, [r0, #4]	/* set rp = 0 on error */
-exit:
-	mov		r0, r6			/* return status in r0 */
-	bkpt	#0x00
-
-STM32_PROG16: .word 0x101 	/* PG | PSIZE_16*/

contrib/loaders/flash/stm32lx.S

@@ -1,63 +0,0 @@
-/***************************************************************************
- *   Copyright (C) 2010 by Spencer Oliver                                  *
- *   spen@spen-soft.co.uk                                                  *
- *                                                                         *
- *   Copyright (C) 2011 Øyvind Harboe                                      *
- *   oyvind.harboe@zylin.com                                               *
- *                                                                         *
- *   Copyright (C) 2011 Clement Burin des Roziers                          *
- *   clement.burin-des-roziers@hikob.com                                   *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
- ***************************************************************************/
-
-
-// Build : arm-eabi-gcc -c stm32lx.S
-	.text
-	.syntax unified
-	.cpu cortex-m3
-	.thumb
-	.thumb_func
-	.global write
-
-/*
-	r0 - destination address
-	r1 - source address
-	r2 - count
-*/
-
-	// Set 0 to r3
-	movs	r3, #0
-	// Go to compare
-	b.n test_done
-
-write_word:
-	// Load one word from address in r0, increment by 4
-	ldr.w	ip, [r1], #4
-	// Store the word to address in r1, increment by 4
-	str.w	ip, [r0], #4
-	// Increment r3
-	adds	r3, #1
-
-test_done:
-	// Compare r3 and r2
-	cmp 	r3, r2
-	// Loop if not zero
-	bcc.n	write_word
-
-	// Set breakpoint to exit
-	bkpt	#0x00
-

contrib/loaders/flash/str7x.s

@@ -1,59 +0,0 @@
-/***************************************************************************
- *   Copyright (C) 2010 by Spencer Oliver                                  *
- *   spen@spen-soft.co.uk                                                  *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
- ***************************************************************************/
-
-	.text
-	.arm
-	.arch armv4t
-
-	.section .init
-/*
-	r0 source address
-	r1 address
-	r2 FLASH_CR0
-	r3 dword count
-	r4 result
-	r5 busy mask
-*/
-
-write:
-	mov		r4, #0x10000000			/* set DWPG bit */
-	str		r4, [r2, #0x0]			/* FLASH_CR0 */
-	str		r1, [r2, #0x10]			/* FLASH_AR */
-	ldr		r4, [r0], #4			/* load data */
-	str		r4, [r2, #0x8]			/* FLASH_DR0 */
-	ldr		r4, [r0], #4			/* load data */
-	str		r4, [r2, #0xc]			/* FLASH_DR1 */
-	mov		r4, #0x90000000			/* set DWPG and WMS bits */
-	str		r4, [r2, #0x0]			/* FLASH_CR0 */
-busy:
-	ldr		r4, [r2, #0x0]			/* FLASH_CR0 */
-	tst		r4, r5
-	bne		busy
-	ldr		r4, [r2, #0x14]			/* FLASH_ER */
-	tst		r4, #0xff				/* do we have errors */
-	tsteq	r4, #0x100			/* write protection set */
-	bne		exit
-	add		r1, r1, #0x8			/* next 8 bytes */
-	subs	r3, r3, #1				/* decremment dword count */
-	bne		write
-exit:
-	b		exit
-
-	.end

contrib/loaders/flash/str9x.s

@@ -1,56 +0,0 @@
-/***************************************************************************
- *   Copyright (C) 2010 by Spencer Oliver                                  *
- *   spen@spen-soft.co.uk                                                  *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
- ***************************************************************************/
-
-	.text
-	.arm
-	.arch armv5t
-
-	.section .init
-/*
-	r0 source address (in)
-	r1 target address (in)
-	r2 word count (in)
-	r3 result (out)
-*/
-
-write:
-	bic		r4, r1, #3			/* word address */
-	mov		r3, #0x40			/* write command */
-	strh	r3, [r4, #0]
-	ldrh 	r3, [r0], #2		/* read data */
-	strh	r3, [r1], #2		/* write data */
-	mov		r3, #0x70			/* status command */
-	strh	r3, [r4, #0]
-busy:
-	ldrb	r3, [r4, #0]		/* status */
-	tst 	r3, #0x80
-	beq 	busy
-	mov		r5, #0x50			/* clear status command */
-	strh	r5, [r4, #0]
-	mov		r5, #0xFF			/* read array */
-	strh	r5, [r4, #0]
-	tst		r3, #0x12
-	bne		exit
-	subs 	r2, r2, #1			/* decremment word count */
-	bne 	write
-exit:
-	bkpt	#0
-
-	.end

contrib/openocd.udev

@@ -0,0 +1,60 @@
+BUS!="usb", ACTION!="add", SUBSYSTEM!=="usb_device", GOTO="openocd_rules_end"
+
+# Olimex ARM-USB-OCD
+SYSFS{idVendor}=="15ba", SYSFS{idProduct}=="0003", MODE="664", GROUP="plugdev"
+
+# Olimex ARM-USB-OCD-TINY
+SYSFS{idVendor}=="15ba", SYSFS{idProduct}=="0004", MODE="664", GROUP="plugdev"
+
+# Olimex ARM-JTAG-EW
+SYSFS{idVendor}=="15ba", SYSFS{idProduct}=="001e", MODE="664", GROUP="plugdev"
+
+# USBprog with OpenOCD firmware
+SYSFS{idVendor}=="1781", SYSFS{idProduct}=="0c63", MODE="664", GROUP="plugdev"
+
+# Amontec JTAGkey and JTAGkey-tiny
+SYSFS{idVendor}=="0403", SYSFS{idProduct}=="cff8", MODE="664", GROUP="plugdev"
+
+# Amontec JTAGkey-HiSpeed
+SYSFS{idVendor}=="0fbb", SYSFS{idProduct}=="1000", MODE="664", GROUP="plugdev"
+
+# Axiom AXM-0432 Link (Symphony SoundBite?)
+# Calao Systems USB-A9260-C01
+# TinCanTools Flyswatter
+# OOCD-Link
+# Marvell Sheevaplug (early development versions)
+SYSFS{idVendor}=="0403", SYSFS{idProduct}=="6010", MODE="664", GROUP="plugdev"
+
+# Calao Systems USB-A9260-C02
+SYSFS{idVendor}=="0403", SYSFS{idProduct}=="6001", MODE="664", GROUP="plugdev"
+
+# IAR J-Link USB
+SYSFS{idVendor}=="1366", SYSFS{idProduct}=="0101", MODE="664", GROUP="plugdev"
+
+# Raisonance RLink
+SYSFS{idVendor}=="138e", SYSFS{idProduct}=="9000", MODE="664", GROUP="plugdev"
+
+# Hitex STR9-comStick
+SYSFS{idVendor}=="0640", SYSFS{idProduct}=="002c", MODE="664", GROUP="plugdev"
+
+# Hitex STM32-PerformanceStick
+SYSFS{idVendor}=="0640", SYSFS{idProduct}=="002d", MODE="664", GROUP="plugdev"
+
+# Luminary Micro Stellaris/LM3S811
+SYSFS{idVendor}=="0403", SYSFS{idProduct}=="bcd9", MODE="664", GROUP="plugdev"
+
+# Xverve Signalyzer Tool (DT-USB-ST)
+SYSFS{idVendor}=="0403", SYSFS{idProduct}=="bca0", MODE="664", GROUP="plugdev"
+
+# egnite Turtelizer 2
+SYSFS{idVendor}=="0403", SYSFS{idProduct}=="bdc8", MODE="664", GROUP="plugdev"
+
+# Marvell Sheevaplug
+SYSFS{idVendor}=="9e88", SYSFS{idProduct}=="9e8f", MODE="664", GROUP="plugdev"
+
+# Section5 ICEbear
+SYSFS{idVendor}=="0403", SYSFS{idProduct}=="c140", MODE="664", GROUP="plugdev"
+SYSFS{idVendor}=="0403", SYSFS{idProduct}=="c141", MODE="664", GROUP="plugdev"
+
+LABEL="openocd_rules_end"
+

contrib/remote_bitbang/remote_bitbang_sysfsgpio.c

@@ -1,408 +0,0 @@
-/***************************************************************************
- *   Copyright (C) 2013 Paul Fertser <fercerpav@gmail.com>                 *
- *   Copyright (C) 2012 by Creative Product Design, marc @ cpdesign.com.au *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
- ***************************************************************************/
-
-/*
-  This is a test application to be used as a remote bitbang server for
-  the OpenOCD remote_bitbang interface driver.
-
-  To compile run:
-  gcc -Wall -ansi -pedantic -std=c99 -o remote_bitbang_sysfsgpio remote_bitbang_sysfsgpio.c
-
-
-  Usage example:
-
-  On Raspberry Pi run:
-  socat TCP6-LISTEN:7777,fork EXEC:"sudo ./remote_bitbang_sysfsgpio tck 11 tms 25 tdo 9 tdi 10"
-
-  On host run:
-  openocd -c "interface remote_bitbang; remote_bitbang_host raspberrypi; remote_bitbang_port 7777" \
-	  -f target/stm32f1x.cfg
-
-  Or if you want to test UNIX sockets, run both on Raspberry Pi:
-  socat UNIX-LISTEN:/tmp/remotebitbang-socket,fork EXEC:"sudo ./remote_bitbang_sysfsgpio tck 11 tms 25 tdo 9 tdi 10"
-  openocd -c "interface remote_bitbang; remote_bitbang_host /tmp/remotebitbang-socket" -f target/stm32f1x.cfg
-*/
-
-#include <sys/types.h>
-#include <sys/stat.h>
-#include <fcntl.h>
-#include <unistd.h>
-#include <stdlib.h>
-#include <stdio.h>
-#include <string.h>
-#include <errno.h>
-
-#define LOG_ERROR(...)		do {					\
-		fprintf(stderr, __VA_ARGS__);				\
-		fputc('\n', stderr);					\
-	} while (0)
-#define LOG_WARNING(...)	LOG_ERROR(__VA_ARGS__)
-
-#define ERROR_OK	(-1)
-#define ERROR_FAIL	(-2)
-#define ERROR_JTAG_INIT_FAILED	ERROR_FAIL
-
-/*
- * Helper func to determine if gpio number valid
- *
- * Assume here that there will be less than 1000 gpios on a system
- */
-static int is_gpio_valid(int gpio)
-{
-	return gpio >= 0 && gpio < 1000;
-}
-
-/*
- * Helper func to open, write to and close a file
- * name and valstr must be null terminated.
- *
- * Returns negative on failure.
- */
-static int open_write_close(const char *name, const char *valstr)
-{
-	int ret;
-	int fd = open(name, O_WRONLY);
-	if (fd < 0)
-		return fd;
-
-	ret = write(fd, valstr, strlen(valstr));
-	close(fd);
-
-	return ret;
-}
-
-/*
- * Helper func to unexport gpio from sysfs
- */
-static void unexport_sysfs_gpio(int gpio)
-{
-	char gpiostr[4];
-
-	if (!is_gpio_valid(gpio))
-		return;
-
-	snprintf(gpiostr, sizeof(gpiostr), "%d", gpio);
-	if (open_write_close("/sys/class/gpio/unexport", gpiostr) < 0)
-		LOG_ERROR("Couldn't unexport gpio %d", gpio);
-
-	return;
-}
-
-/*
- * Exports and sets up direction for gpio.
- * If the gpio is an output, it is initialized according to init_high,
- * otherwise it is ignored.
- *
- * If the gpio is already exported we just show a warning and continue; if
- * openocd happened to crash (or was killed by user) then the gpios will not
- * have been cleaned up.
- */
-static int setup_sysfs_gpio(int gpio, int is_output, int init_high)
-{
-	char buf[40];
-	char gpiostr[4];
-	int ret;
-
-	if (!is_gpio_valid(gpio))
-		return ERROR_OK;
-
-	snprintf(gpiostr, sizeof(gpiostr), "%d", gpio);
-	ret = open_write_close("/sys/class/gpio/export", gpiostr);
-	if (ret < 0) {
-		if (errno == EBUSY) {
-			LOG_WARNING("gpio %d is already exported", gpio);
-		} else {
-			LOG_ERROR("Couldn't export gpio %d", gpio);
-			perror("sysfsgpio: ");
-			return ERROR_FAIL;
-		}
-	}
-
-	snprintf(buf, sizeof(buf), "/sys/class/gpio/gpio%d/direction", gpio);
-	ret = open_write_close(buf, is_output ? (init_high ? "high" : "low") : "in");
-	if (ret < 0) {
-		LOG_ERROR("Couldn't set direction for gpio %d", gpio);
-		perror("sysfsgpio: ");
-		unexport_sysfs_gpio(gpio);
-		return ERROR_FAIL;
-	}
-
-	snprintf(buf, sizeof(buf), "/sys/class/gpio/gpio%d/value", gpio);
-	if (is_output)
-		ret = open(buf, O_WRONLY | O_NONBLOCK | O_SYNC);
-	else
-		ret = open(buf, O_RDONLY | O_NONBLOCK | O_SYNC);
-
-	if (ret < 0)
-		unexport_sysfs_gpio(gpio);
-
-	return ret;
-}
-
-/*
- * file descriptors for /sys/class/gpio/gpioXX/value
- * Set up during init.
- */
-static int tck_fd = -1;
-static int tms_fd = -1;
-static int tdi_fd = -1;
-static int tdo_fd = -1;
-static int trst_fd = -1;
-static int srst_fd = -1;
-
-/*
- * Bitbang interface read of TDO
- *
- * The sysfs value will read back either '0' or '1'. The trick here is to call
- * lseek to bypass buffering in the sysfs kernel driver.
- */
-static int sysfsgpio_read(void)
-{
-	char buf[1];
-
-	/* important to seek to signal sysfs of new read */
-	lseek(tdo_fd, 0, SEEK_SET);
-	int ret = read(tdo_fd, &buf, sizeof(buf));
-
-	if (ret < 0) {
-		LOG_WARNING("reading tdo failed");
-		return 0;
-	}
-
-	return buf[0];
-}
-
-/*
- * Bitbang interface write of TCK, TMS, TDI
- *
- * Seeing as this is the only function where the outputs are changed,
- * we can cache the old value to avoid needlessly writing it.
- */
-static void sysfsgpio_write(int tck, int tms, int tdi)
-{
-	const char one[] = "1";
-	const char zero[] = "0";
-
-	static int last_tck;
-	static int last_tms;
-	static int last_tdi;
-
-	static int first_time;
-	size_t bytes_written;
-
-	if (!first_time) {
-		last_tck = !tck;
-		last_tms = !tms;
-		last_tdi = !tdi;
-		first_time = 1;
-	}
-
-	if (tdi != last_tdi) {
-		bytes_written = write(tdi_fd, tdi ? &one : &zero, 1);
-		if (bytes_written != 1)
-			LOG_WARNING("writing tdi failed");
-	}
-
-	if (tms != last_tms) {
-		bytes_written = write(tms_fd, tms ? &one : &zero, 1);
-		if (bytes_written != 1)
-			LOG_WARNING("writing tms failed");
-	}
-
-	/* write clk last */
-	if (tck != last_tck) {
-		bytes_written = write(tck_fd, tck ? &one : &zero, 1);
-		if (bytes_written != 1)
-			LOG_WARNING("writing tck failed");
-	}
-
-	last_tdi = tdi;
-	last_tms = tms;
-	last_tck = tck;
-}
-
-/*
- * Bitbang interface to manipulate reset lines SRST and TRST
- *
- * (1) assert or (0) deassert reset lines
- */
-static void sysfsgpio_reset(int trst, int srst)
-{
-	const char one[] = "1";
-	const char zero[] = "0";
-	size_t bytes_written;
-
-	/* assume active low */
-	if (srst_fd >= 0) {
-		bytes_written = write(srst_fd, srst ? &zero : &one, 1);
-		if (bytes_written != 1)
-			LOG_WARNING("writing srst failed");
-	}
-
-	/* assume active low */
-	if (trst_fd >= 0) {
-		bytes_written = write(trst_fd, trst ? &zero : &one, 1);
-		if (bytes_written != 1)
-			LOG_WARNING("writing trst failed");
-	}
-}
-
-/* gpio numbers for each gpio. Negative values are invalid */
-static int tck_gpio = -1;
-static int tms_gpio = -1;
-static int tdi_gpio = -1;
-static int tdo_gpio = -1;
-static int trst_gpio = -1;
-static int srst_gpio = -1;
-
-/* helper func to close and cleanup files only if they were valid/ used */
-static void cleanup_fd(int fd, int gpio)
-{
-	if (gpio >= 0) {
-		if (fd >= 0)
-			close(fd);
-
-		unexport_sysfs_gpio(gpio);
-	}
-}
-
-static void cleanup_all_fds(void)
-{
-	cleanup_fd(tck_fd, tck_gpio);
-	cleanup_fd(tms_fd, tms_gpio);
-	cleanup_fd(tdi_fd, tdi_gpio);
-	cleanup_fd(tdo_fd, tdo_gpio);
-	cleanup_fd(trst_fd, trst_gpio);
-	cleanup_fd(srst_fd, srst_gpio);
-}
-
-static void process_remote_protocol(void)
-{
-	int c;
-	while (1) {
-		c = getchar();
-		if (c == EOF || c == 'Q') /* Quit */
-			break;
-		else if (c == 'b' || c == 'B') /* Blink */
-			continue;
-		else if (c >= 'r' && c <= 'r' + 2) { /* Reset */
-			char d = c - 'r';
-			sysfsgpio_reset(!!(d & 2),
-					(d & 1));
-		} else if (c >= '0' && c <= '0' + 7) {/* Write */
-			char d = c - '0';
-			sysfsgpio_write(!!(d & 4),
-					!!(d & 2),
-					(d & 1));
-		} else if (c == 'R')
-			putchar(sysfsgpio_read());
-		else
-			LOG_ERROR("Unknown command '%c' received", c);
-	}
-}
-
-int main(int argc, char *argv[])
-{
-	LOG_WARNING("SysfsGPIO remote_bitbang JTAG driver\n");
-
-	for (int i = 1; i < argc; i++) {
-		if (!strcmp(argv[i], "tck"))
-			tck_gpio = atoi(argv[++i]);
-		else if (!strcmp(argv[i], "tms"))
-			tms_gpio = atoi(argv[++i]);
-		else if (!strcmp(argv[i], "tdo"))
-			tdo_gpio = atoi(argv[++i]);
-		else if (!strcmp(argv[i], "tdi"))
-			tdi_gpio = atoi(argv[++i]);
-		else if (!strcmp(argv[i], "trst"))
-			trst_gpio = atoi(argv[++i]);
-		else if (!strcmp(argv[i], "srst"))
-			srst_gpio = atoi(argv[++i]);
-		else {
-			LOG_ERROR("Usage:\n%s ((tck|tms|tdo|tdi|trst|srst) num)*", argv[0]);
-			return -1;
-		}
-	}
-
-	if (!(is_gpio_valid(tck_gpio)
-			&& is_gpio_valid(tms_gpio)
-			&& is_gpio_valid(tdi_gpio)
-			&& is_gpio_valid(tdo_gpio))) {
-		if (!is_gpio_valid(tck_gpio))
-			LOG_ERROR("gpio num for tck is invalid");
-		if (!is_gpio_valid(tms_gpio))
-			LOG_ERROR("gpio num for tms is invalid");
-		if (!is_gpio_valid(tdo_gpio))
-			LOG_ERROR("gpio num for tdo is invalid");
-		if (!is_gpio_valid(tdi_gpio))
-			LOG_ERROR("gpio num for tdi is invalid");
-
-		LOG_ERROR("Require tck, tms, tdi and tdo gpios to all be specified");
-		return ERROR_JTAG_INIT_FAILED;
-	}
-
-	/*
-	 * Configure TDO as an input, and TDI, TCK, TMS, TRST, SRST
-	 * as outputs.  Drive TDI and TCK low, and TMS/TRST/SRST high.
-	 */
-	tck_fd = setup_sysfs_gpio(tck_gpio, 1, 0);
-	if (tck_fd < 0)
-		goto out_error;
-
-	tms_fd = setup_sysfs_gpio(tms_gpio, 1, 1);
-	if (tms_fd < 0)
-		goto out_error;
-
-	tdi_fd = setup_sysfs_gpio(tdi_gpio, 1, 0);
-	if (tdi_fd < 0)
-		goto out_error;
-
-	tdo_fd = setup_sysfs_gpio(tdo_gpio, 0, 0);
-	if (tdo_fd < 0)
-		goto out_error;
-
-	/* assume active low */
-	if (trst_gpio > 0) {
-		trst_fd = setup_sysfs_gpio(trst_gpio, 1, 1);
-		if (trst_fd < 0)
-			goto out_error;
-	}
-
-	/* assume active low */
-	if (srst_gpio > 0) {
-		srst_fd = setup_sysfs_gpio(srst_gpio, 1, 1);
-		if (srst_fd < 0)
-			goto out_error;
-	}
-
-	LOG_WARNING("SysfsGPIO nums: tck = %d, tms = %d, tdi = %d, tdo = %d",
-		 tck_gpio, tms_gpio, tdi_gpio, tdo_gpio);
-	LOG_WARNING("SysfsGPIO num: srst = %d", srst_gpio);
-	LOG_WARNING("SysfsGPIO num: trst = %d", trst_gpio);
-
-	setvbuf(stdout, NULL, _IONBF, 0);
-	process_remote_protocol();
-
-	cleanup_all_fds();
-	return 0;
-out_error:
-	cleanup_all_fds();
-	return ERROR_JTAG_INIT_FAILED;
-}

contrib/rpc_examples/ocd_rpc_example.py

@@ -1,145 +0,0 @@
-#!/usr/bin/env python3
-"""
-OpenOCD RPC example, covered by GNU GPLv3 or later
-Copyright (C) 2014 Andreas Ortmann (ortmann@finf.uni-hannover.de)
-
-
-Example output:
-./ocd_rpc_example.py
-echo says hi!
-
-target state: halted
-target halted due to debug-request, current mode: Thread
-xPSR: 0x01000000 pc: 0x00000188 msp: 0x10000fd8
-
-variable @ 0x10000000: 0x01c9c380
-
-variable @ 0x10000000: 0xdeadc0de
-
-memory (before): ['0xdeadc0de', '0x00000011', '0xaaaaaaaa', '0x00000023',
-'0x00000042', '0x0000ffff']
-
-memory (after): ['0x00000001', '0x00000000', '0xaaaaaaaa', '0x00000023',
-'0x00000042', '0x0000ffff']
-"""
-
-import socket
-import itertools
-
-def strToHex(data):
-    return map(strToHex, data) if isinstance(data, list) else int(data, 16)
-
-def hexify(data):
-    return "<None>" if data is None else ("0x%08x" % data)
-
-def compareData(a, b):
-    for i, j, num in zip(a, b, itertools.count(0)):
-        if i != j:
-            print("difference at %d: %s != %s" % (num, hexify(i), hexify(j)))
-
-
-class OpenOcd:
-    COMMAND_TOKEN = '\x1a'
-    def __init__(self, verbose=False):
-        self.verbose = verbose
-        self.tclRpcIp       = "127.0.0.1"
-        self.tclRpcPort     = 6666
-        self.bufferSize     = 4096
-
-        self.sock = socket.socket(socket.AF_INET, socket.SOCK_STREAM)
-
-    def __enter__(self):
-        self.sock.connect((self.tclRpcIp, self.tclRpcPort))
-        return self
-
-    def __exit__(self, type, value, traceback):
-        try:
-            self.send("exit")
-        finally:
-            self.sock.close()
-
-    def send(self, cmd):
-        """Send a command string to TCL RPC. Return the result that was read."""
-        data = (cmd + OpenOcd.COMMAND_TOKEN).encode("utf-8")
-        if self.verbose:
-            print("<- ", data)
-
-        self.sock.send(data)
-        return self._recv()
-
-    def _recv(self):
-        """Read from the stream until the token (\x1a) was received."""
-        data = bytes()
-        while True:
-            chunk = self.sock.recv(self.bufferSize)
-            data += chunk
-            if bytes(OpenOcd.COMMAND_TOKEN, encoding="utf-8") in chunk:
-                break
-
-        if self.verbose:
-            print("-> ", data)
-
-        data = data.decode("utf-8").strip()
-        data = data[:-1] # strip trailing \x1a
-
-        return data
-
-    def readVariable(self, address):
-        raw = self.send("ocd_mdw 0x%x" % address).split(": ")
-        return None if (len(raw) < 2) else strToHex(raw[1])
-
-    def readMemory(self, wordLen, address, n):
-        self.send("array unset output") # better to clear the array before
-        self.send("mem2array output %d 0x%x %d" % (wordLen, address, n))
-
-        output = self.send("ocd_echo $output").split(" ")
-
-        return [int(output[2*i+1]) for i in range(len(output)//2)]
-
-    def writeVariable(self, address, value):
-        assert value is not None
-        self.send("mww 0x%x 0x%x" % (address, value))
-
-    def writeMemory(self, wordLen, address, n, data):
-        array = " ".join(["%d 0x%x" % (a, b) for a, b in enumerate(data)])
-
-        self.send("array unset 1986ве1т") # better to clear the array before
-        self.send("array set 1986ве1т { %s }" % array)
-        self.send("array2mem 1986ве1т 0x%x %s %d" % (wordLen, address, n))
-
-if __name__ == "__main__":
-
-    def show(*args):
-        print(*args, end="\n\n")
-
-    with OpenOcd() as ocd:
-        ocd.send("reset")
-
-        show(ocd.send("ocd_echo \"echo says hi!\"")[:-1])
-        show(ocd.send("capture \"ocd_halt\"")[:-1])
-
-        # Read the first few words at the RAM region (put starting adress of RAM
-        # region into 'addr')
-        addr = 0x10000000
-
-        value = ocd.readVariable(addr)
-        show("variable @ %s: %s" % (hexify(addr), hexify(value)))
-
-        ocd.writeVariable(addr, 0xdeadc0de)
-        show("variable @ %s: %s" % (hexify(addr), hexify(ocd.readVariable(addr))))
-
-        data = [1, 0, 0xaaaaaaaa, 0x23, 0x42, 0xffff]
-        wordlen = 32
-        n = len(data)
-
-        read = ocd.readMemory(wordlen, addr, n)
-        show("memory (before):", list(map(hexify, read)))
-
-        ocd.writeMemory(wordlen, addr, n, data)
-
-        read = ocd.readMemory(wordlen, addr, n)
-        show("memory  (after):", list(map(hexify, read)))
-
-        compareData(read, data)
-
-        ocd.send("resume")

contrib/rpc_examples/ocdrpc.hs

@@ -1,56 +0,0 @@
--- OpenOCD RPC example, covered by GNU GPLv3 or later
--- Copyright (C) 2014 Paul Fertser
---
--- Example output:
--- $ ./ocdrpc
--- Halting the target, full log output captured:
--- target state: halted
--- target halted due to debug-request, current mode: Thread
--- xPSR: 0x21000000 pc: 0x00003352 msp: 0x20000fe8
---
--- Read memory, parse the result and show as a list of strings:
--- ["0x20001000","0x0000334d","0x00002abb","0x0000118f","0x00002707","0x00002707","0x00002707","0x00000000","0x00000000","0x00000000","0x00000000","0x00002707","0x00002707","0x00000000","0x00002707","0x00002781"]
--- Resuming
-
-{-# LANGUAGE OverloadedStrings #-}
-module Main where
-
-import Prelude
-import Control.Applicative
-import Network.Socket
-import System.IO.Streams.Core hiding (connect)
-import System.IO.Streams.Network
-import System.IO.Streams.Attoparsec
-import Data.Attoparsec.ByteString.Char8
-import Data.Attoparsec.Combinator
-import Data.ByteString.Char8 hiding (putStrLn, concat, map)
-import Text.Printf
-
-ocdReply = manyTill anyChar (char '\x1a')
-
-ocdExec (oistream, oostream) command = do
-  write (Just $ pack $ command ++ "\x1a") oostream
-  parseFromStream ocdReply oistream
-
--- For each line: dispose of address, then match hex values
-mdwParser = (manyTill anyChar (string ": ") *>
-              hexadecimal `sepBy` char ' ')
-            `sepBy` string " \n"
-
-ocdMdw :: (InputStream ByteString, OutputStream ByteString) -> Integer -> Integer -> IO [Integer]
-ocdMdw s start count = do
-  s <- ocdExec s $ "ocd_mdw " ++ show start ++ " " ++ show count
-  case parseOnly mdwParser (pack s) of
-    Right r -> return $ concat r
-
-main = do
-  osock <- socket AF_INET Stream defaultProtocol
-  haddr <- inet_addr "127.0.0.1"
-  connect osock (SockAddrInet 6666 haddr)
-  ostreams <- socketToStreams osock
-  putStrLn "Halting the target, full log output captured:"
-  ocdExec ostreams "capture \"halt\"" >>= putStrLn
-  putStrLn "Read memory, parse the result and show as a list of strings:"
-  ocdMdw ostreams 0 16 >>= putStrLn . (show :: [String] -> String) . map (printf "0x%08x")
-  putStrLn "Resuming"
-  ocdExec ostreams "resume"

contrib/rtos-helpers/FreeRTOS-openocd.c

@@ -1,20 +0,0 @@
-/*
- * Since at least FreeRTOS V7.5.3 uxTopUsedPriority is no longer
- * present in the kernel, so it has to be supplied by other means for
- * OpenOCD's threads awareness.
- *
- * Add this file to your project, and, if you're using --gc-sections,
- * ``--undefined=uxTopUsedPriority'' (or
- * ``-Wl,--undefined=uxTopUsedPriority'' when using gcc for final
- * linking) to your LDFLAGS; same with all the other symbols you need.
- */
-
-#include "FreeRTOS.h"
-
-#ifdef __GNUC__
-#define USED __attribute__((used))
-#else
-#define USED
-#endif
-
-const int USED uxTopUsedPriority = configMAX_PRIORITIES;

doc/Makefile.am

@@ -1,9 +1,15 @@
 info_TEXINFOS = openocd.texi
 openocd_TEXINFOS = fdl.texi
 man_MANS = openocd.1
-EXTRA_DIST = openocd.1 \
-	manual \
-	INSTALL.txt
+EXTRA_DIST = openocd.1
+
+dist-hook:
+	mkdir $(distdir)/manual
+	cp -p $(srcdir)/manual/*.txt $(distdir)/manual
+	for i in $$(cd $(srcdir)/manual/ && ls -d */); do \
+		mkdir $(distdir)/manual/$$i; \
+		cp -p $(srcdir)/manual/$$i/* $(distdir)/manual/$$i/; \
+	done
 
 MAINTAINERCLEANFILES = \
 	$(srcdir)/Makefile.in \

doc/manual/helper.txt

@@ -23,7 +23,7 @@ portability API.
 
 The Jim API provides access to a small-footprint TCL implementation.
 
-Visit http://jim.tcl.tk/ for more information on Jim.
+Visit http://jim.berlios.de/ for more information on Jim.
 
 This section needs to be expanded to describe OpenOCD's Jim API.
 
@@ -31,95 +31,7 @@ This section needs to be expanded to describe OpenOCD's Jim API.
 
 /** @page helpercommand OpenOCD Command API
 
-OpenOCD's command API allows modules to register callbacks that are then
-available to the scripting services.  It provides the mechanism for
-these commands to be dispatched to the module using a standard
-interface.  It provides macros for defining functions that use and
-extend this interface.
-
-@section helpercmdhandler Command Handlers
-
-Command handlers are functions with a particular signature, which can
-be extended by modules for passing additional parameters to helpers or
-another layer of handlers.
-
-@subsection helpercmdhandlerdef Defining and Calling Command Handlers
-
-These functions should be defined using the @c COMMAND_HANDLER macro.
-These methods must be defined as static, as their principal entry point
-should be the run_command dispatch mechanism.
-
-Command helper functions that require access to the full set of
-parameters should be defined using the @c COMMAND_HELPER.  These must be
-declared static by you, as sometimes you might want to share a helper
-among several files (e.g. @c s3c24xx_nand.h).
-
-Both types of routines must be called using the @c CALL_COMMAND_HANDLER macro.
-Calls using this macro to normal handlers require the name of the command
-handler (which can be a name or function pointer).  Calls to helpers and
-derived handlers must pass those extra parameters specified by their
-definitions; however, lexical capture is used for the core parameters.
-This dirty trick is being used as a stop-gap measure while the API is
-migrated to one that passes a pointer to a structure containing the
-same ingredients.  At that point, this macro will be removed and callers
-will be able to use direct invocations.
-
-Thus, the following macros can be used to define and call command
-handlers or helpers:
-
-- @c COMMAND_HANDLER - declare or define a command handler.
-- @c COMMAND_HELPER - declare or define a derived command handler or helper.
-- @c CALL_COMMAND_HANDLER - call a command handler/helper.
-
-@subsection helpercmdhandlermacros Command Handler Macros
-
-In addition, the following macros may be used in the context of
-command handlers and helpers:
-- @c CMD_CTX - the current @c command_context
-- @c CMD_NAME - invoked command name
-- @c CMD_ARGC - the number of command arguments
-- @c CMD_ARGV - array of command argument strings
-
-@section helpercmdregister Command Registration
-
-In order to use a command handler, it must be registered with the
-command subsystem.  All commands are registered with command_registration
-structures, specifying the name of the command, its handler, its allowed
-mode(s) of execution, and strings that provide usage and help text.
-A single handler may be registered using multiple names, but any name
-may have only one handler associated with it.
-
-The @c register_commands() and @c register_commands() functions provide
-registration, while the @c unregister_command() and
-@c unregister_all_commands() functions will remove existing commands.
-These may be called at any time, allowing the command set to change in
-response to system actions.
-
-@subsection helpercmdjim Jim Command Registration
-
-The command_registration structure provides support for registering
-native Jim command handlers (@c jim_handler) too.  For these handlers,
-the module can provide help and usage support; however, this mechanism
-allows Jim handlers to be called as sub-commands of other commands.
-These commands may be registered with a private data value (@c
-jim_handler_data) that will be available when called, as with low-level
-Jim command registration.
-
-A command may have a normal @c handler or a @c jim_handler, but not both.
-
-@subsection helpercmdregisterchains Command Chaining
-
-When using register_commands(), the array of commands may reference
-other arrays.  When the @c chain field is filled in a
-command_registration record, the commands on in the chained list will
-added in one of two places.  If the record defines a new command, then
-the chained commands are added under it; otherwise, the commands are
-added in the same context as the other commands in the array.
-
-@section helpercmdprimer Command Development Primer
-
-This @ref primercommand provides details about the @c hello module,
-showing how the pieces described on this page fit together.
+This section needs to be expanded to describe OpenOCD's Command API.
 
  */
 

doc/manual/jtag/drivers/remote_bitbang.txt

@@ -1,53 +0,0 @@
-/** @remote_bitbangpage OpenOCD Developer's Guide
-
-The remote_bitbang JTAG driver is used to drive JTAG from a remote process. The
-remote_bitbang driver communicates via TCP or UNIX sockets with some remote
-process using an ASCII encoding of the bitbang interface. The remote process
-presumably then drives the JTAG however it pleases. The remote process should
-act as a server, listening for connections from the openocd remote_bitbang
-driver.
-
-The remote bitbang driver is useful for debugging software running on
-processors which are being simulated.
-
-The bitbang interface consists of the following functions.
-
-blink on
-	Blink a light somewhere. The argument on is either 1 or 0.
-
-read
-	Sample the value of tdo.
-
-write tck tms tdi
-	Set the value of tck, tms, and tdi.
-
-reset trst srst
-	Set the value of trst, srst.
-
-An additional function, quit, is added to the remote_bitbang interface to
-indicate there will be no more requests and the connection with the remote
-driver should be closed.
-
-These five functions are encoded in ascii by assigning a single character to
-each possible request. The assignments are:
-
-	B - Blink on
-	b - Blink off
-	R - Read request
-	Q - Quit request
-	0 - Write 0 0 0
-	1 - Write 0 0 1
-	2 - Write 0 1 0
-	3 - Write 0 1 1
-	4 - Write 1 0 0
-	5 - Write 1 0 1
-	6 - Write 1 1 0
-	7 - Write 1 1 1
-	r - Reset 0 0
-	s - Reset 0 1
-	t - Reset 1 0
-	u - Reset 1 1
-
-The read response is encoded in ascii as either digit 0 or 1.
-
- */

doc/manual/main.txt

@@ -1,6 +1,6 @@
-/** @mainpage OpenOCD Developer's Guide
+/** @mainpage OpenOCD Reference Manual
 
-Welcome to the OpenOCD Developer's Guide -- the developer's resource for
+Welcome to the OpenOCD Reference Manual -- the developer's resource for
 learning about the internal architecture of the OpenOCD project. @par
 
 In addition, this document contains the tactical and strategic plans
@@ -36,22 +36,17 @@ This pages lists Technical Primers available for OpenOCD Developers.
 They seek to provide information to pull novices up the learning curves
 associated with the fundamental technologies used by OpenOCD.
 
+- @subpage primerpatches
 - @subpage primerdocs
 - @subpage primerautotools
 - @subpage primertcl
 - @subpage primerjtag
 
-The above documents should bridge any "ancillary" gaps in contributor
+These documents should bridge any "ancillary" gaps in contributor
 knowledge, without having to learn the complete languages or technology.
 They should provide enough information for experienced developers to
 learn how to make "correct" changes when creating patches.
 
-Beyond the fundamentals, the following primers provide introductory
-tutorials for OpenOCD's sub-systems.  These complement the @ref oocd
-pages that provide more high-level perspective on related topics.
-
-- @subpage primercommand
-
 In all cases, these Primers should use idiomatic conventions that the
 community has agreed are the "right way of doing things".  In this
 respect, these documents typically assume some familiarity with the
@@ -82,7 +77,6 @@ modules are stacked in the current implementation (from bottom to top):
 - @subpage targetdocs
   - @ref targetarm
   - @ref targetnotarm
-  - @ref targetmips
   - @ref targetregister
   - @ref targetimage
   - @ref targettrace

doc/manual/primer/autotools.txt

@@ -53,6 +53,26 @@ The @c autoconf program generates the @c configure script from
 included in the project distribution packages and run by users to
 configure the build process for their system.
 
+@subsection primermaintainermode Maintainer Mode
+
+After a fresh checkout, @c bootstrap, and a simple @c configure, you may
+experience errors when running @c make that some files cannot be found
+(e.g. @c version.texi), and a second @c make will "mysteriously" solve
+the problems.  The isssue is well-known and expected, if unfortunate.
+
+The OpenOCD project requires that all developers building from  the
+git repository use the @c --enable-maintainer-mode option when
+running the @c configure script.  This option ensures that certain files
+are created during the build process that would normally be packaged in
+the distribution tarball.  The @c bootstrap script will remind you of
+this requirement when it runs.
+
+In addition to solving these problems, this option enables Makefile
+rules (provided by automake) that allow the normal @c make process to
+rebuild the autotools outputs, included the automake-generated Makefiles
+themselves.  This avoids the heavy-handed approach of running the
+@c bootstrap script after changing one of these files.
+
 @section primerautomake Automake Makefiles
 
 The @c automake program generates @c Makefile.in files (from @c

doc/manual/primer/commands.txt

@@ -1,138 +0,0 @@
-/** @page primercommand Command Development Primer
-
-This page provides a primer for writing commands by introducing @c hello
-module.  The full source code used in this example can be found in
-hello.c, and the @ref primercmdcode section shows how to use it.
-
-A summary of this information can be found in @ref helpercommand .
-
-@section primercmdhandler Command Handlers
-
-Defining new commands and their helpers is easy.  The following code
-defines a simple command handler that delegates its argument parsing:
-@code
-COMMAND_HANDLER(handle_hello_command)
-{
-	const char *sep, *name;
-	int retval = CALL_COMMAND_HANDLER(handle_hello_args);
-	if (ERROR_OK == retval)
-		command_print(CMD_CTX, "Greetings%s%s!", sep, name);
-	return retval;
-}
-@endcode
-
-Here, the @c COMMAND_HANDLER macro establishes the function signature,
-see in command.h by the @c __COMMAND_HANDLER macro.
-
-The COMMAND_HELPER macro function allows defining functions with an
-extended version of the base signature.  These helper functions can be
-called (with the appropriate parameters), the @c CALL_COMMAND_HANDLER
-macro to pass any e as parameters to the following helper function:
-
-The subsequent blocks of code are a normal C function that can do
-anything, so only complex commands deserve should use comamnd helper
-functions.  In this respect, this example uses one to demonstrate how --
-not when -- they should be used.
-
-@code
-static COMMAND_HELPER(handle_hello_args, const char **sep, const char **name)
-{
-	if (argc > 1)
-	{
-		LOG_ERROR("%s: too many arguments", CMD_NAME);
-		return ERROR_COMMAND_SYNTAX_ERROR;
-	}
-	if (1 == CMD_ARGC)
-	{
-		*sep = ", ";
-		*name = CMD_ARGV[0];
-	}
-	else
-		*sep = *name = "";
-
-	return ERROR_OK;
-}
-@endcode
-
-Of course, you may also call other macros or functions, but that extends
-beyond the scope of this tutorial on writing commands.
-
-@section primercmdreg Command Registration
-
-Before this new function can be used, it must be registered somehow.
-For a new module, registering should be done in a new function for
-the purpose, which must be called from @c openocd.c:
-@code
-
-static const struct command_registration hello_command_handlers[] = {
-	{
-		.name = "hello",
-		.mode = COMMAND_ANY,
-		.handler = handle_hello_command,
-		.help = "print a warm greeting",
-		.usage = "[name]",
-	},
-	{
-		.chain = foo_command_handlers,
-	}
-	COMMAND_REGISTRATION_DONE
-};
-
-int hello_register_commands(struct command_context_s *cmd_ctx)
-{
-	return register_commands(cmd_ctx, NULL, handle_command_handlers);
-}
-@endcode
-
-Note that the "usage" text should use the same EBNF that's found
-in the User's Guide:  literals in 'single quotes', sequences of
-optional parameters in [square brackets], and alternatives in
-(parentheses|with|vertical bars), and so forth.  No angle brackets.
-
-That's it!  The command should now be registered and available to scripts.
-
-@section primercmdchain Command Chaining
-
-This example also shows how to chain command handler registration, so
-your modules can "inherit" commands provided by other (sub)modules.
-Here, the hello module includes the foo commands in the same context
-that the 'hello' command will be registered.
-
-If the @c chain field had been put in the 'hello' command, then the
-@c foo module commands would be registered under it.  Indeed, that
-technique is used to define the 'foo bar' and 'foo baz' commands,
-as well as for the example drivers that use these modules.
-
-The code for the 'foo' command handlers can be found in @c hello.c.
-
-@section primercmdcode Trying These Example Commands
-
-These commands have been inherited by the dummy interface, faux flash,
-and testee target drivers.  The easiest way to test these is by using the
-dummy interface.
-
-Once OpenOCD has been built with this example code, the following command
-demonstrates the abilities that the @c hello module provides:
-@code
-openocd -c 'interface dummy' \
-	-c 'dummy hello' \
-	-c 'dummy hello World' \
-	-c 'dummy hello {John Doe}' \
-	-c 'dummy hello John Doe'  # error: too many arguments
-@endcode
-
-If saved in @c hello.cfg, then running <code>openocd -f hello.cfg</code>
-should produce the following output before displaying the help text and
-exiting:
-@code
-Greetings!
-Greetings, World!
-Greetings, John Doe!
-Error: hello: too many arguments
-Runtime error, file "openocd.cfg", line 14:
-    hello: too many arguments
-dummy hello [<name>]
-      prints a warm welcome
-@endcode
-
- */

doc/manual/primer/jtag.txt

@@ -14,7 +14,8 @@ just a logical interface that allows a uniform channel for communication.
 See @par
 	http://en.wikipedia.org/wiki/Joint_Test_Action_Group
 
-@image html jtag-state-machine-large.png
+and @par
+	http://www.inaccessnetworks.com/projects/ianjtag/jtag-intro/jtag-state-machine-large.png
 
 The first page (among other things) shows a logical representation
 describing how multiple devices are wired up using JTAG.  JTAG does not
@@ -28,7 +29,7 @@ TMS which will select different shift registers.
 
 The first thing you need to do is reset the state machine, because when
 you connect to a chip you do not know what state the controller is in,you need
-to clock TMS as 1, at least 5 times.  This will put you into "Test Logic
+to clock TMS as 1, at least 7 times.  This will put you into "Test Logic
 Reset" State.  Knowing this, you can, once reset, then track what each
 transition on TMS will do, and hence know what state the JTAG state
 machine is in.
@@ -44,9 +45,9 @@ instruction register.
 
 For example, one of the data registers will be known as "bypass" this is
 (usually) a single bit which has no function and is used to bypass the
-chip.  Assume we have 3 identical chips, wired up like the picture(wikipedia)
-and each has a 3 bits instruction register, and there are 2 known
-instructions (110 = bypass, 010 = "some other function") if we want to use
+chip.  Assume we have 3 identical chips, wired up like the picture
+and each has a 3 bit instruction register, and there are 2 known
+instructions (110 = bypass, 010 = some other function) if we want to use
 "some other function", on the second chip in the line, and not change
 the other chips we would do the following transitions.
 
@@ -65,13 +66,13 @@ each chip [110] [010] [110]
 The order is reversed, because we shift out the least significant bit
 first.  Then we transition TMS:
 
-  1 1 1 0 0
+  1 1 1 1 0 0
 
 which puts us in the "Shift DR state".
 
 Now when we clock data onto TDI (again while holding TMS to 0) , the
 data shifts through the data registers, and because of the instruction
-registers we selected ("some other function" has 8 bits in its data
+registers we selected (some other function has 8 bits in its data
 register), our total data register in the chain looks like this:
 
   0 00000000 0
@@ -106,6 +107,10 @@ gets interesting.  But in and of itself, JTAG is actually very simple.
 
 @section primerjtag More Reading
 
+The following link goes to an HTML (or PDF) introduction to JTAG,
+written by one of the original members of the JTAG committee: @par
+http://www.asset-intertech.com/products/boundscan.htm
+
 A separate primer contains information about @subpage primerjtagbs for
 developers that want to extend OpenOCD for such purposes.
 

doc/manual/primer/patches.txt

@@ -0,0 +1,172 @@
+/** @page primerpatches Patch Primer
+
+This page provides an introduction to patching that may be useful
+for OpenOCD contributors who are unfamiliar with the process.
+
+@section primerpatchintro Introduction to Patching
+
+The standard method for creating patches requires developers to:
+- checkout the git repository (or bring a copy up-to-date),
+- make the necessary modifications to a working copy,
+- check with 'git status' to see which files will be modified/added, and
+- use 'git diff' to review the changes and produce a patch.
+
+It is important to minimize the changes to only those lines that contain
+important differences; do not allow stray whitespace changes into your
+patches, and keep the focus to a single logical change.
+
+@section primerpatchcreate Creating Patches
+
+You can create a patch (from the root of your working copy) with a
+command like the following example: @par
+@verbatim
+git diff > patch-name.patch
+@endverbatim
+
+where @a patch-name should be something that is descriptive and unique.
+
+The above command will create a patch containing all of the changes in
+the working copy; if you want to obtain a subset, simply provide the
+list of files to the command: @par
+@verbatim
+git diff doc > <patch-name>-doc.patch
+git diff src > <patch-name>-src.patch
+@endverbatim
+
+This will create two patches, each containing only those changes present
+in the subdirectory specified.
+
+@subsection primerpatchcreate Naming Patches
+
+One developer has evolved an informal standard for naming his patches: @par
+@verbatim
+<project>-<lod>-<action>-<task>.patch
+@endverbatim
+
+where @a project is @c openocd, @a lod (line-of-development) could be a
+subsystem (e.g. @c jtag, @c jlink, etc.) or other group identifier,
+@a action is @c add, @c change, @c fix, @c update, etc., and @a task is
+whatever the patch will accomplish (in 2-4 words).
+
+This scheme does not need to be followed, but it is helpful for
+maintainers that receive many patches.  You do not want your own
+@c openocd.patch file to be accidentally overwritten by another
+submission, sending your patch to the bit bucket on accident.
+
+@section primerpatchpreflight Developer Review
+
+Before sending in patches, please make sure you have updated to the
+latest version of the trunk (using <code>git pull</code>) before creating
+your patch.  This helps to increase the chances that it will apply
+cleanly to the trunk.  However, the content matters most.
+
+When creating a patch using "<code>git diff</code>", git will
+produce a patch that contains all of the changes in your working copy.
+To manage multiple changes at once, you either need one working copy per
+patch, or you can specified specific files and directories when using
+<code>git diff</code>.  Overlapping patches will be discussed in the
+next section.
+
+@todo Does git's treatment of line-endings behave sanely?
+Basically, the repository should use newlines internally,
+and convert to/from CRLF on Windows etc.
+
+@section primerpatchseries Patch Series
+
+As was mentioned above, each patch should contain one logical @c task,
+and multiple logical tasks should be split into a series of patches.
+There are no hard guidelines for how that is to be done; it's an art
+form.  Many simple changes should not have to worry about being split,
+as they will naturally represent a single task.
+
+When working on several different non-intersecting lines of development,
+a combination of multiple working copies and patch series management
+techniques can become critical to efficiently managing change.  This
+again is an area where developers have favorite methodologies that are
+simply a matter of taste or familiarity; your mileage may vary.
+
+Packages such as @c patchutils, @c diffutils, and @c quilt are among
+those that have proved themselves invaluable for these type of tasks.
+Others take their patch management a step further, using stkgit or
+some other framework on top of git.
+
+@subsection primerpatchseriesinterdiff Using @c interdiff
+
+The @c patchutils package includes the @c interdiff command, which
+produces a patch that contains the changes made between two other
+patches.  This command can be used to manage the creation of trivial
+patch series.  For example, the following sequence of commands will
+produce three patches: @par
+@verbatim
+$ cd openocd/
+$ git pull
+...
+$ <<<start changes for patch #1>>>
+...
+$ <<<finish changes for patch #1>>>
+$ git diff > series-1.patch                         # patch #1 is easy
+$ <<<start changes for patch #2>>>
+...
+$ <<<finish changes for patch #2>>>
+$ git diff > series-1+2.patch                       # create patch 1+2
+$ interdiff series-1{,+2}.patch > series-2.patch    #   1 ~  1+2  => #2
+$ <<<start changes for patch #3>>>
+...
+$ <<<finish changes for patch #3>>>
+$ git diff > series-1+2+3.patch                     # create patch 1+2+3
+$ interdiff series-1+2{,+3}.patch > series-3.patch  # 1+2 ~ 1+2+3 => 3
+@endverbatim
+
+This technique falls apart when the repository changes, but this may be
+suitable for small series of patches.
+
+@subsection primerpatchseriesquilt Using @c quilt
+
+The @c quilt package provides scripts to manage series of patches more
+efficiently than can be managed by hand.  For out-of-tree work projects
+that require such patch management, @c quilt provides an indispensable
+tool for solving the problem.
+
+@section primerpatchsubmit Submitting Patches
+
+Write access to the OpenOCD git repository is limited to
+contributors that have demonstrated the ability to produce clear,
+consistent, and frequent patches.  These individuals are responsible
+for maintaining the integrity of the repository for the community.
+
+Thus, commits to the git repository must be handled by one of
+these maintainers.
+
+Patches must be sent to the OpenOCD developer mailing list:
+@par
+	openocd-development@lists.berlios.de
+
+They will be reviewed and committed if the changes are found to be
+acceptable.  If there are problems, you will receive feedback via the
+mailing list; in general, the maintainers prefer all communication to go
+through the list, as the entire community needs to judge contributions
+for possible merits and mistakes.
+
+Contributors may be asked to address certain issues and submit a new
+patch.  In the event that it gets overlooked, you may need to resubmit
+it or prompt for feedback.  Please have patience, as many maintainers
+work on the project voluntarily and without compensation for the time
+that they spend doing these tasks.
+
+@section primerpatchguide Guidelines for Submitting Patches
+
+- Each patch file should contain:
+  - A commit description that describes all of the changes.
+  - A separator line that contains three hyphens: <code>---</code>
+  - A summary of the changes produced by diffstat (optional)
+  - Another separator line (optional)
+  - The actual patch contents, containing a single change.
+
+- Each patch series should include:
+  - A summary of the patches in the series.
+  - Logically-related patches that contain incremental changes.
+
+ */
+/** @file
+This file contains the @ref primerpatches page.
+*/

doc/manual/release.txt

@@ -84,8 +84,8 @@ the minor version will @a also be zero (<code>y = 0, z = 0</code>).
 After these required numeric components, release version strings
 may contain tags such as as <em>-rc1</em> or <em>-rc2</em>.
 These 'rc' tags indicate "release candidate" versions of the package.
-Like major/minor/micro numbers, these are updated
-as part of the release process.
+Like the major/minor/micro numbers, these tags will be manipulated
+by the automated release process.
 
 The release process includes version number manipulations to the tree
 being released, ensuring that all numbers are incremented (or rolled
@@ -107,14 +107,14 @@ original code base.  Each packager release should have a unique
 version.
 
 For example, the following command will add a 'foo' tag to the
-configure.ac script of a local copy of the source tree, giving
+configure.in script of a local copy of the source tree, giving
 a version label like <em>0.3.0-foo</em>:
 
 @code
-tools/release/version.sh tag add foo
+tools/release/version.sh version tag add foo
 @endcode
 
-This command will modify the configure.ac script in your working copy
+This command will modify the configure.in script in your working copy
 only.  After running the @c bootstrap sequence, the tree can be patched
 and used to produce your own derived versions.  You might check that
 change into a private branch of your git tree, along with the other
@@ -125,7 +125,7 @@ each time a derived package is released, incrementing the tag's
 version to facilitate tracking the changes you have distributed.
 
 @code
-tools/release/version.sh bump tag foo
+tools/release/version.sh version bump tag foo
 @endcode
 
 Of course, any patches in your branches must be provided to
@@ -277,126 +277,79 @@ support; the Release Manager isn't the only participant.
 
 The following steps should be followed to produce each release:
 
--# Produce final patches using a local clone of mainline.  Nobody
-   except the RM should be committing anything.  <em>Everyone with commit
-   privileges needs to know and agree to this in advance!</em>  Even the RM
-   only commits a handful of updates as part of the release process
-   itself ... to files which are part of the version identification scheme
-   or release process; and to create the version tag; and then to open the
-   merge window for the next release cycle.
-  -# Finalize @c the NEWS file to describe the changes in the release
+-# Produce final patches to mainline (or a release branch).  Nobody
+   except the RM should be committing anything.
+  -# Finalize @c NEWS file to describe the changes in the release
     - This file is used to automatically post "blurbs" about the project.
-    - This material should have been produced during the development cycle,
-      by adding items for each @c NEWS-worthy contribution, when committed
-      during the merge window.  (One part of closing the merge window, by
-      opening the RC phase of the release, is the commitment to hold all
-      further such contributions until the next merge window opens.)
-    - The RM should make sure nothing important was omitted, as part of
-      the RC1 cycle.  From then on, no more updates to NEWS content should
-      be needed (except to seed the process for the next release, or maybe
-      if a significant and longstanding bug is fixed late in the RC phase).
+    - This material should be produced during the development cycle.
+    - Add a new item for each @c NEWS-worthy contribution, when committed.
   -# Bump library version if our API changed (not yet required)
-  -# Update and commit the final package version in @c configure.ac:
-     (The <code>tools/release/version.sh</code> script might help ensure
-     the versions are named properly.):
+  -# Update and commit the final package version in @c configure.in:
+     <code>tools/release/version.sh</code> may help ensure the versions
+     are named consistently:
     -# Remove @c -dev tag.
-    -# Update any @c -rc tag:
+    -# Update the @c -rc tag:
       - If producing the final release from an -rc series, remove it
       - If producing the first RC in a series, add rc1
       - If producing the next RC in a series, bump the rc number
-    -# Commit that version change, with a good descriptive comment.
+    -# Commit that version change.
   -# Create a git tag for the final commit, with a tag name matching
-     the version string in <code>configure.ac</code> (including <em>-rcN</em>
+     the version string in <code>configure.in</code> (including <em>-rcN</em>
      where relevant):
 @verbatim
 PACKAGE_VERSION="x.y.z"
 PACKAGE_TAG="v${PACKAGE_VERSION}"
 git tag -m "The openocd-${PACKAGE_VERSION} release." "${PACKAGE_TAG}"
 @endverbatim
-  -# Do not push those changes to mainline yet; only builds using the
-     source archives you will be creating should ever be labeled as
-     official releases (with no "-dev" suffix).  Since mainline is a
-     development tree, these will be pushed later, as part of opening
-     the merge window for the next release cycle (restoring the "-dev"
-     suffix for that next release.)  Those version and tag updates are
-     the last ones to be included in the release being made.
--# Produce the release files, using the local clone of the source
-  tree which holds the release's tag and updated version in
-  @c configure.ac ... this is used only to produce the release, and
-  all files should already be properly checked out.
-  -# Run <code>tools/release.sh package</code> to produce the
-	source archives.  This automatically bootstraps and
-	configures the process.
-  -# Run <code>tools/release.sh stage</code> to create an @c archives
-	directory with the release data, including MD5 and SHA1
-	checksum files.
-  -# Sanity check at least one of those archives, by extracting and
-     configuring its contents, using them to build a copy of OpenOCD,
-     and verifying that the result prints the correct release version
-     in its startup banner.  (For example,
-     "configure --enable-ft2232_libftdi --enable-parport"
-     then "make" and run "src/openocd -v" as a sanity check.)
-  -# Run <code>make docs</code> to create the
-     documentation which will be published.
--# Upload packages and post announcements of their availability:
-  -# Release packages into files section of project sites:
-    - SF.net:
-     -# Under "Project Admin", use the "File Manager"
-     -# Create a new folder under "openocd" named "${PACKAGE_VERSION}"
-     -# Upload the @c NEWS file and mark it as the release notes.
-     -# Upload the three source archive files, using the Web interface,
-     	into that folder.  Verify the upload worked OK by checking the
-	MD5 and SHA1 checksums computed by SourceForge against the
-	versions created as part of staging the release.
-     -# Also upload doc/openocd.pdf (the User's Guide) so the version
-        matching each release will be easily available.
-     -# Select each file in the release, and use the property panel
-        to set its type and select the right release notes.
-       - .tar.bz2: Linux, Mac
-       - .tar.gz: BSD, Solaris, Others
-       - .zip: Windows
-       - For openocd.pdf just associate it with the right release notes.
-     -# Create an SF.net project news update.
-  -# Depending on how paranoid you're feeling today, verify the images by
-     downloading them from the websites and making sure there are no
-     differences between the downloaded copies and your originals.
-  -# Publish User's and Developer's Guides to the project web sites:
-     -# Use SCP to update the SF.net web site with PDF and HTML for the
-          User's Guide, and HTML for the developer's guide ... you can
-	  instantiate a shell.sourceforge.net instance and set up symlinks
-	  from your home directory, to simplify this process.
-  -# Post announcement e-mail to the openocd-development list.
-  -# optionally:
-     -# Post an update on the OpenOCD blog.
-     -# Announce updates on freshmeat.net and other trackers.
-     -# Submit updates to news feeds (e.g. Digg, Reddit, etc.).
--# Resume normal development on mainline, by opening the merge window for
-  the next major or minor release cycle.  (You might want to do this
-  before all the release bits are fully published.)
-  - Update the version label in the @c configure.ac file:
+-# Prepare to resume normal development on mainline (major or minor release)
+  - Update the version label
      - Restore @c -dev version tag.
      - For a new minor release cycle, increment the release's minor number
      - For a new major release cycle, increment the release's major number
        and zero its minor number
   - Archive @c NEWS file as "<code>doc/news/NEWS-${PACKAGE_VERSION}</code>".
   - Create a new @c NEWS file for the next release
-  - Commit those changes.
-  - Push all the updates to mainline.
-     - Last updates for the release, including the release tag (you
-       will need to "git push --tags").
-     - Updates opening the merge window
-  - At this point, it's OK for commiters to start pushing changes
-    which have been held off until the next release.  (Any bugfixes to
-    this release will be against a bug-fix release branch starting from
-    the commit you tagged as this release, not mainline.)
-  - Announce to the openocd-development list.  Ideally, you will also
-    be able to say who is managing the next release cycle.
+  - Commit those changes, and push the commit and the release tag
+    to mainline.
+-# Produce the package source archives:
+  -# <em>Start with a new clone of the source tree</em>, with the
+     release's tag.  This is used only for producing these packages.
+  -# Checkout the appropriate tag:
+<code>git checkout "${PACKAGE_VERSION}"</code>
+  -# @c bootstrap, @c configure, and @c make the package.
+  -# Run <code>make distcheck</code> to produce the distribution archives.
+  -# Run <code>make maintainer-clean</code> verify the repository is empty.
+  -# Create signature files using @c md5sum, @c sha1sum, etc.
+-# Publish documentation for the release:
+  - Allow users to access the documentation for each of our releases.
+  - Place static copies of the following files on the project website:
+    - @c NEWS: to provide a blurb for each release
+    - User's Guide, Developer Manual: to allow easy on-line viewing
+-# Upload packages and post announcements of their availability:
+  -# Release packages into files section of project sites:
+    - SF.net:
+     -# Create a new folder named "${PACKAGE_VERSION}"
+     -# Select new folder as the target for uploads.
+     -# Upload files via Web interface into new
+     -# Set platform types for each archive:
+       - .tar.bz2: Linux, Mac
+       - .tar.gz: BSD, Solaris, Others
+       - .zip: Windows
+    - Berlios:
+     -# Create the new release for the new version.
+     -# Provide @c NEWS file, as requested.
+     -# Upload files via FTP to ftp://ftp.berlios.de/incoming/
+     -# Edit descriptions for each file.
+     -# Click button to send E-mail Release Notice.
+  -# Post announcement e-mail to the openocd-development list.
+  -# Announce updates on freshmeat.net and other trackers.
+  -# Submit big updates to news feeds (e.g. Digg, Reddit, etc.).
 
 To start a bug-fix release branch:
 -# Create a new branch, starting from a major or
    minor release tag
 -# Restore @c -dev version tag.
--# Bump micro version number in configure.ac
+-# Bump micro version number in configure.in
 -# Backport bugfix patches from mainline into that branch.
    (Always be sure mainline has the fix first, so it's hard
    to just lose a bugfix.)
@@ -446,7 +399,7 @@ affect its behavior:
 
 @section releasetutorial Release Tutorials
 
-This section should contain a brief tutorial for using the Release
+This section should contain a brief tutorial for using the Release 
 Script to perform release tasks, but the new script needs to be
 used for 0.3.0.
 

doc/manual/server.txt

@@ -207,7 +207,7 @@ upon it, sometimes that is the only scheme available.
 
 As a small group of developers, supporting all the platforms and
 targets in the debugger will be difficult, as there are enough problem
-with the plethora of Adapters, Chips, and different target boards.
+with the plethora of Dongles, Chips, and different target boards.
 Yes, the TCL interface might be suitable, but it has not received much
 love or attention.  Perhaps it will after you read and understand this.
 
@@ -235,7 +235,7 @@ different host-side GDB..
 Sure - a <em>man on a mission</em> can make that work.  The GUI might be
 libopenocd + Perl/TK, or maybe an Eclipse Plug-in.
 That is a development support nightmare for reasons described
-above. We have enough support problems as it is with targets, adapters,
+above. We have enough support problems as it is with targets, dongles,
 etc.
 
 @section serverdocshttpbg HTTP Server Background
@@ -270,8 +270,8 @@ every peripheral register on the target platform.
 
 That also is transportable, regardless of the OpenOCD host
 platform: Linux/X86, Linux/ARM, FreeBSD, Cygwin, MingW, or MacOSX.
-You could even port OpenOCD to an Android system and use it as a
-bit-banging JTAG Adapter serving web pages.
+You could even port OpenOCD to an Google Android and use it as a
+bit-bang dongle JTAG serving web pages.
 
 @subsection serverdocshtmladv Advanced HTML Pages
 
@@ -309,8 +309,17 @@ This section needs to be expanded.
 
  */
 
-/** @page serverhttp OpenOCD http Server API
+/** @page serverhttp OpenOCD HTTP Server API
 
-This section needs to be expanded.
+
+Smoketest:
+
+configure --enable-httpd --enable-dummy --enable-ioutil
+
+openocd -s /usr/local/share/openocd -f httpd/httpd.tcl -f interface/dummy.cfg -f target/lpc2148.cfg
+
+Navigate to: http://localhost:8888/
+
+ 
 
  */

doc/manual/style.txt

@@ -66,9 +66,8 @@ Finally, try to avoid lines of code that are longer than than 72-80 columns:
 - most identifiers must use lower-case letters (and digits) only.
   - macros must use upper-case letters (and digits) only.
   - OpenOCD identifiers should NEVER use @c MixedCaps.
-- @c typedef names must end with the '_t' suffix.
-  - This should be reserved for types that should be passed by value.
-  - Do @b not mix the typedef keyword with @c struct.
+- structure names must end with the '_s' suffix.
+- typedef names must end with the '_t' suffix.
 - use underline characters between consecutive words in identifiers
   (e.g. @c more_than_one_word).
 
@@ -77,12 +76,9 @@ Finally, try to avoid lines of code that are longer than than 72-80 columns:
 - inline functions
 - @c // comments -- in new code, prefer these for single-line comments
 - trailing comma allowed in enum declarations
-- designated initializers ( .field = value )
-- variables declarations should occur at the point of first use
+- designated initializers (@{ .field = value @})
+- variables declarations may be mixed with code
 - new block scopes for selection and iteration statements
-- use malloc() to create dynamic arrays. Do @b not use @c alloca
-or variable length arrays on the stack. non-MMU hosts(uClinux) and
-pthreads require modest and predictable stack usage.
 
 @section styletypes Type Guidelines
 - use native types (@c int or @c unsigned) if the type is not important
@@ -180,7 +176,7 @@ The following guidelines apply to all Doxygen comment blocks:
   -# @c function_name() can be used to reference functions
     (e.g. flash_set_dirty()).
   -# @c struct_name::member_name should be used to reference structure
-    fields in the documentation (e.g. @c flash_driver::name).
+    fields in the documentation (e.g. @c flash_driver_s::name).
   -# URLS get converted to markup automatically, without any extra effort.
   -# new pages can be linked into the heirarchy by using the @c \@subpage
     command somewhere the page(s) under which they should be linked:
@@ -308,7 +304,7 @@ For technical reference material:
    - Else it's a "Config Command" if it must be used before the
      configuration stage completes.
    - For a "Driver", list its name.
-   - Use EBNF style regular expressions to define parameters:
+   - Use BNF style regular expressions to define parameters:
      brackets around zero-or-one choices, parentheses around
      exactly-one choices.
    - Use \@option, \@file, \@var and other mechanisms where appropriate.
@@ -370,7 +366,7 @@ Maintainers must also be sure to follow additional guidelines:
 
 This page contains style guidelines for the OpenOCD autotools scripts.
 
-The following guidelines apply to the @c configure.ac file:
+The following guidelines apply to the @c configure.in file:
 - Better guidelines need to be developed, but until then...
 - Use good judgement.
 

doc/manual/target.txt

@@ -9,7 +9,6 @@ The Target Support module contains APIs that cover several functional areas:
 
   - @subpage targetarm
   - @subpage targetnotarm
-  - @subpage targetmips
   - @subpage targetregister
   - @subpage targetimage
   - @subpage targettrace

doc/manual/target/mips.txt

@@ -1,536 +0,0 @@
-/** @page targetmips OpenOCD MIPS Targets
-
-@section ejatgmem EJTAG Memory Addresses
-
-An optional uncached and unmapped debug segment dseg (EJTAG area) appears in the address range
-0xFFFF FFFF FF20 0000 to 0xFFFF FFFF FF3F FFFF. The dseg segment thereby appears in the kseg part of the
-compatibility segment, and access to kseg is possible with the dseg segment.
-
-The dseg segment is subdivided into dmseg (EJTAG memory) segment and the drseg (EJTAG registers) segment. The
-dmseg segment is used when the probe services the memory segment. The drseg segment is used when the
-memory-mapped debug registers are accessed. Table 5-2 shows the subdivision and attributes for the segments.
-
-dseg is divided in :
-
-  - dmseg (0xFFFF FFFF FF20 0000 to 0xFFFF FFFF FF2F FFFF)
-  - drseg (0xFFFF FFFF FF30 0000 to 0xFFFF FFFF FF3F FFFF)
-
-Because the dseg segment is serviced exclusively by the EJTAG features, there
-are no physical address per se. Instead the lower 21 bits of the virtual address select
-the appropriate reference in either EJTAG memory or registers. References are not mapped through the
-TLB, nor do the accesses appear on the external system memory interface.
-
-Both of this memory segments are Uncached.
-
-On debug exception (break) CPU jumps to the beginning of dmseg. This some kind of memory shared
-between CPU and EJTAG dongle.
-
-There CPU stops (correct terminology is : stalls, because it stops it's pipeline), and is waiting for some action of dongle.
-
-If the dongle gives it instruction, CPU executes it, augments it's PC to 0xFFFF FFFF FF20 0001 - but it again points to dmseg area,
-so it stops waiting for next instruction.
-
-This will all become clear later, after reading following prerequisite chapters.
-
-@section impflags Important flags
-
-@subsection	pnnw PNnW
-
-Indicates read or write of a pending processor access:
-
-  - 0 : Read processor access, for a fetch/load access
-  - 1 : Write processor access, for a store access
-
-This value is defined only when a processor access is pending.
-
-Processor will do the action for us : it can for example read internal state (register values),
-and send us back the information via EJTAG memory (dmseg), or it can take some data from dmseg and write it into the registers or RAM.
-
-Every time when it sees address (i.e. when this address is the part of the opcode it is executing, wether it is instruction or data fetch)
-that falls into dmseg, processor stalls. That acutally meand that CPU stops it's pipeline and it is waitning for dongle to take some action.
-
-CPU is now either waiting for dongle to take some data from dmseg (if we requested for CPU do give us internal state, for example),
-or it will wait for some data from dongle (if it needs following instruction because it did previous, or if the operand address of the currently executed opcode
-falls somewhere (anywhere) in dmseg (0xff..ff20000 - 0xff..ff2fffff)).
-
-Bit PNnW describes character of CPU access to EJTAG memory (the memry where dongle puts/takes data) - CPU can either READ for it (PNnW == 0) or
-WRITE to it (PNnW == 1).
-
-By reading PNnW bit OpenOCD will know if it has to send (PNnW == 0) or to take (PNnW == 1) data (from dmseg, via dongle).
-
-@subsection	pracc PrAcc
-
-Indicates a pending processor access and controls finishing of a pending processor access.
-
-When read:
-
-  - 0 : No pending processor access
-  - 1 : Pending processor access
-
-A write of 0 finishes a processor access if pending;
-otherwise operation of the processor is UNDEFINED
-if the bit is written to 0 when no processor access is
-pending. A write of 1 is ignored.
-
-A successful FASTDATA access will clear this bit.
-
-As noted above, on any access to dmseg, processor will stall. It waits for dongle to do some action - either to take or put some data.
-OpenOCD can figure out which action has to be taken by reading PrAcc bit.
-
-Once action from dongle has been done, i.e. after the data is taken/put, OpenOCD can signal to CPU to proceed with executing the instruction.
-This can be the next instruction (if previous was finished before pending), or the same instruction - if for example CPU was waiting on dongle
-to give it an operand, because it saw in the instruction opcode that operand address is somewhere in dmseg. That prowoked the CPU to stall (it tried operand fetch to dmseg and stopped),
-and PNnW bit is 0 (CPU does read from dmseg), and PrAcc is 1 (CPU is pending on dmseg access).
-
-@subsection spracc	SPrAcc
-
-Shifting in a zero value requests completion of the Fastdata access.
-
-The PrAcc bit in the EJTAG Control register is overwritten with zero when the access
-succeeds. (The access succeeds if PrAcc is one and the operation address is in the legal dmseg segment
-Fastdata area.)
-
-When successful, a one is shifted out. Shifting out a zero indicates a Fastdata access failure.
-Shifting in a one does not complete the Fastdata access and the PrAcc bit is unchanged. Shifting out a
-one indicates that the access would have been successful if allowed to complete and a zero indicates
-the access would not have successfully completed.
-
-@section fdreg Fastdata Register (TAP Instruction FASTDATA)
-
-The width of the Fastdata register is 1 bit.
-
-During a Fastdata access, the Fastdata register is written and read, i.e., a bit is
-shifted in and a bit is shifted out.
-
-Also during a Fastdata access, the Fastdata register value shifted in specifies whether the Fastdata
-access should be completed or not. The value shifted out is a flag that indicates whether the Fastdata access was
-successful or not (if completion was requested).
-
-@section ejtagacc EJTAG Access Implementation
-
-OpenOCD reads/writes data to JTAG via mips_m4k_read_memory() and mips_m4k_write_memory() functions defined in src/target/mips_m4k.c.
-Internally, these functions call mips32_pracc_read_mem() and mips32_pracc_write_mem() defined in src/target/mips32_pracc.c
-
-Let's take for example function mips32_pracc_read_mem32() which describes CPU reads (fetches) from dmseg (EJTAG memory) :
-
-@code
-static const uint32_t code[] = {
-														/* start: */
-	MIPS32_MTC0(15,31,0),								/* move $15 to COP0 DeSave */
-	MIPS32_LUI(15,UPPER16(MIPS32_PRACC_STACK)),			/* $15 = MIPS32_PRACC_STACK */
-	MIPS32_ORI(15,15,LOWER16(MIPS32_PRACC_STACK)),
-	MIPS32_SW(8,0,15),									/* sw $8,($15) */
-	MIPS32_SW(9,0,15),									/* sw $9,($15) */
-	MIPS32_SW(10,0,15),									/* sw $10,($15) */
-	MIPS32_SW(11,0,15),									/* sw $11,($15) */
-
-	MIPS32_LUI(8,UPPER16(MIPS32_PRACC_PARAM_IN)),		/* $8 = MIPS32_PRACC_PARAM_IN */
-	MIPS32_ORI(8,8,LOWER16(MIPS32_PRACC_PARAM_IN)),
-	MIPS32_LW(9,0,8),									/* $9 = mem[$8]; read addr */
-	MIPS32_LW(10,4,8),									/* $10 = mem[$8 + 4]; read count */
-	MIPS32_LUI(11,UPPER16(MIPS32_PRACC_PARAM_OUT)),		/* $11 = MIPS32_PRACC_PARAM_OUT */
-	MIPS32_ORI(11,11,LOWER16(MIPS32_PRACC_PARAM_OUT)),
-														/* loop: */
-	MIPS32_BEQ(0,10,8),									/* beq 0, $10, end */
-	MIPS32_NOP,
-
-	MIPS32_LW(8,0,9),									/* lw $8,0($9), Load $8 with the word @mem[$9] */
-	MIPS32_SW(8,0,11),									/* sw $8,0($11) */
-
-	MIPS32_ADDI(10,10,NEG16(1)),						/* $10-- */
-	MIPS32_ADDI(9,9,4),									/* $1 += 4 */
-	MIPS32_ADDI(11,11,4),								/* $11 += 4 */
-
-	MIPS32_B(NEG16(8)),									/* b loop */
-	MIPS32_NOP,
-                                          				/* end: */
-	MIPS32_LW(11,0,15),									/* lw $11,($15) */
-	MIPS32_LW(10,0,15),									/* lw $10,($15) */
-	MIPS32_LW(9,0,15),									/* lw $9,($15) */
-	MIPS32_LW(8,0,15),									/* lw $8,($15) */
-	MIPS32_B(NEG16(27)),								/* b start */
-	MIPS32_MFC0(15,31,0),								/* move COP0 DeSave to $15 */
-};
-@endcode
-
-We have to pass this code to CPU via dongle via dmseg.
-
-After debug exception CPU will find itself stalling at the begining of the dmseg. It waits for the first instruction from dongle.
-This is MIPS32_MTC0(15,31,0), so CPU saves C0 and continues to addr 0xFF20 0001, which falls also to dmseg, so it stalls.
-Dongle proceeds giving to CPU one by one instruction in this manner.
-
-However, things are not so simple. If you take a look at the program, you will see that some instructions take operands. If it has to take
-operand from the address in dmseg, CPU will stall witing for the dongle to do the action of passing the operand and signal this by putting PrAcc to 0.
-If this operand is somewhere in RAM, CPU will not stall (it stalls only on dmseg), but it will just take it and proceed to nex instruction. But since PC for next instruction
-points to dmseg, it will stall, so that dongle can pass next instruction.
-
-Some instuctions are jumps (if these are jumps in dmseg addr, CPU will jump and then stall. If this is jump to some address in RAM, CPU will jump and just proceed -
-will not stall on addresses in RAM).
-
-To have information about CPU is currently (does it stalls wanting on operand or it jumped somewhere waiting for next instruction),
-OpenOCD has to call TAP ADDRESS instruction, which will ask CPU to give us his address within EJTAG memory :
-
-@code
-address = data = 0;
-mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
-mips_ejtag_drscan_32(ejtag_info, &address);
-@endcode
-
-And then, upon the results, we can conclude where it is in our code so far, so we can give it what it wants next :
-
-@code
-if ((address >= MIPS32_PRACC_PARAM_IN)
-	&& (address <= MIPS32_PRACC_PARAM_IN + ctx->num_iparam * 4))
-{
-	offset = (address - MIPS32_PRACC_PARAM_IN) / 4;
-	data = ctx->local_iparam[offset];
-}
-else if ((address >= MIPS32_PRACC_PARAM_OUT)
-	&& (address <= MIPS32_PRACC_PARAM_OUT + ctx->num_oparam * 4))
-{
-	offset = (address - MIPS32_PRACC_PARAM_OUT) / 4;
-	data = ctx->local_oparam[offset];
-}
-else if ((address >= MIPS32_PRACC_TEXT)
-	&& (address <= MIPS32_PRACC_TEXT + ctx->code_len * 4))
-{
-	offset = (address - MIPS32_PRACC_TEXT) / 4;
-	data = ctx->code[offset];
-}
-else if (address == MIPS32_PRACC_STACK)
-{
-	/* save to our debug stack */
-	data = ctx->stack[--ctx->stack_offset];
-}
-else
-{
-	/* TODO: send JMP 0xFF200000 instruction.
-		Hopefully processor jump back to start of debug vector */
-	data = 0;
-	LOG_ERROR("Error reading unexpected address 0x%8.8" PRIx32 "", address);
-	return ERROR_JTAG_DEVICE_ERROR;
-}
-@endcode
-
-i.e. if CPU is stalling on addresses in dmseg that are reserved for input parameters, we can conclude that it actually tried to take (read)
-parametar from there, and saw that address of param falls in dmseg, so it stopped. Obviously, now dongle have to give to it operand.
-
-Similarly, mips32_pracc_exec_write() describes CPU writes into EJTAG memory (dmseg).
-Obvioulsy, code is RO, and CPU can change only parameters :
-
-@code
-mips_ejtag_set_instr(ctx->ejtag_info, EJTAG_INST_DATA);
-mips_ejtag_drscan_32(ctx->ejtag_info, &data);
-
-/* Clear access pending bit */
-ejtag_ctrl = ejtag_info->ejtag_ctrl & ~EJTAG_CTRL_PRACC;
-mips_ejtag_set_instr(ctx->ejtag_info, EJTAG_INST_CONTROL);
-mips_ejtag_drscan_32(ctx->ejtag_info, &ejtag_ctrl);
-
-//jtag_add_clocks(5);
-jtag_execute_queue();
-
-if ((address >= MIPS32_PRACC_PARAM_IN)
-	&& (address <= MIPS32_PRACC_PARAM_IN + ctx->num_iparam * 4))
-{
-	offset = (address - MIPS32_PRACC_PARAM_IN) / 4;
-	ctx->local_iparam[offset] = data;
-}
-else if ((address >= MIPS32_PRACC_PARAM_OUT)
-	&& (address <= MIPS32_PRACC_PARAM_OUT + ctx->num_oparam * 4))
-{
-	offset = (address - MIPS32_PRACC_PARAM_OUT) / 4;
-	ctx->local_oparam[offset] = data;
-}
-else if (address == MIPS32_PRACC_STACK)
-{
-	/* save data onto our stack */
-	ctx->stack[ctx->stack_offset++] = data;
-}
-else
-{
-	LOG_ERROR("Error writing unexpected address 0x%8.8" PRIx32 "", address);
-	return ERROR_JTAG_DEVICE_ERROR;
-}
-@endcode
-
-CPU loops here :
-
-@code
-while (1)
-{
-	if ((retval = wait_for_pracc_rw(ejtag_info, &ejtag_ctrl)) != ERROR_OK)
-		return retval;
-
-	address = data = 0;
-	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
-	mips_ejtag_drscan_32(ejtag_info, &address);
-
-	/* Check for read or write */
-	if (ejtag_ctrl & EJTAG_CTRL_PRNW)
-	{
-		if ((retval = mips32_pracc_exec_write(&ctx, address)) != ERROR_OK)
-			return retval;
-	}
-	else
-	{
-		/* Check to see if its reading at the debug vector. The first pass through
-		 * the module is always read at the vector, so the first one we allow.  When
-		 * the second read from the vector occurs we are done and just exit. */
-		if ((address == MIPS32_PRACC_TEXT) && (pass++))
-		{
-			break;
-		}
-
-		if ((retval = mips32_pracc_exec_read(&ctx, address)) != ERROR_OK)
-			return retval;
-	}
-
-	if (cycle == 0)
-		break;
-}
-@endcode
-
-and using presented R (mips32_pracc_exec_read()) and W (mips32_pracc_exec_write()) functions it reads in the code (RO) and reads and writes operands (RW).
-
-@section fdimpl OpenOCD FASTDATA Implementation
-
-OpenOCD FASTDATA write function, mips32_pracc_fastdata_xfer() is called from bulk_write_memory callback, which writes a count items of 4 bytes
-to the memory of a target at the an address given.  Because it operates only on whole words, this should be faster than target_write_memory().
-
-In order to implement FASTDATA write, mips32_pracc_fastdata_xfer() uses the following handler :
-
-@code
-uint32_t handler_code[] = {
-	/* caution when editing, table is modified below */
-	/* r15 points to the start of this code */
-	MIPS32_SW(8,MIPS32_FASTDATA_HANDLER_SIZE - 4,15),
-	MIPS32_SW(9,MIPS32_FASTDATA_HANDLER_SIZE - 8,15),
-	MIPS32_SW(10,MIPS32_FASTDATA_HANDLER_SIZE - 12,15),
-	MIPS32_SW(11,MIPS32_FASTDATA_HANDLER_SIZE - 16,15),
-	/* start of fastdata area in t0 */
-	MIPS32_LUI(8,UPPER16(MIPS32_PRACC_FASTDATA_AREA)),
-	MIPS32_ORI(8,8,LOWER16(MIPS32_PRACC_FASTDATA_AREA)),
-	MIPS32_LW(9,0,8),								/* start addr in t1 */
-	MIPS32_LW(10,0,8),								/* end addr to t2 */
-													/* loop: */
-	/* 8 */ MIPS32_LW(11,0,0),						/* lw t3,[t8 | r9] */
-	/* 9 */ MIPS32_SW(11,0,0),						/* sw t3,[r9 | r8] */
-	MIPS32_BNE(10,9,NEG16(3)),						/* bne $t2,t1,loop */
-	MIPS32_ADDI(9,9,4),								/* addi t1,t1,4 */
-
-	MIPS32_LW(8,MIPS32_FASTDATA_HANDLER_SIZE - 4,15),
-	MIPS32_LW(9,MIPS32_FASTDATA_HANDLER_SIZE - 8,15),
-	MIPS32_LW(10,MIPS32_FASTDATA_HANDLER_SIZE - 12,15),
-	MIPS32_LW(11,MIPS32_FASTDATA_HANDLER_SIZE - 16,15),
-
-	MIPS32_LUI(15,UPPER16(MIPS32_PRACC_TEXT)),
-	MIPS32_ORI(15,15,LOWER16(MIPS32_PRACC_TEXT)),
-	MIPS32_JR(15),									/* jr start */
-	MIPS32_MFC0(15,31,0),							/* move COP0 DeSave to $15 */
-};
-@endcode
-
-In the begining and the end of the handler we have fuction prologue (save the regs that will be clobbered) and epilogue (restore regs),
-and in the very end, after all the xfer have been done, we do jump to the MIPS32_PRACC_TEXT address, i.e. Debug Exception Vector location.
-We will use this fact (that we came back to MIPS32_PRACC_TEXT)  to verify later if all the handler is executed (because when in RAM,
-processor do not stall - it executes all instructions untill one of them do not demand access to dmseg (if one of it's opernads is there)).
-
-This handler is put into the RAM and executed from there, and not instruction by  instruction, like in previous simple write
-(mips_m4k_write_memory()) and read (mips_m4k_read_memory()) functions.
-
-N.B. When it is executing this code in RAM, CPU will not stall on instructions, but execute all until it comes to the :
-
-@code
-MIPS32_LW(9,0,8) /* start addr in t1 */
-@endcode
-
-and there it will stall - because it will see that one of the operands have to be fetched from dmseg (EJTAG memory, in this case FASTDATA memory segment).
-
-This handler is loaded in the RAM, ath the reserved location "work_area". This work_area is configured in OpenOCD configuration script and should be selected
-in that way that it is not clobbered (overwritten) by data we want to write-in using FASTDATA.
-
-What is executed instruction by instruction which is passed by dongle (via EJATG memory) is small jump code, which jumps at the handler in RAM.
-CPU stalls on dmseg when receiving these jmp_code instructions, but once it jumps in RAM, CPU do not stall anymore and executes bunch of handler instructions.
-Untill it comes to the first instruction which has an operand in FASTDATA area. There it stalls and waits on action from probe.
-It happens actually when CPU comes to this loop :
-
-@code
-MIPS32_LW(9,0,8),								/* start addr in t1 */
-MIPS32_LW(10,0,8),								/* end addr to t2 */
-												/* loop: */
-/* 8 */ MIPS32_LW(11,0,0),						/* lw t3,[t8 | r9] */
-/* 9 */ MIPS32_SW(11,0,0),						/* sw t3,[r9 | r8] */
-MIPS32_BNE(10,9,NEG16(3)),						/* bne $t2,t1,loop */
-@endcode
-
-and then it stalls because operand in r8 points to FASTDATA area.
-
-OpenOCD first verifies that CPU came to this place by :
-
-@code
-/* next fetch to dmseg should be in FASTDATA_AREA, check */
-address = 0;
-mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
-mips_ejtag_drscan_32(ejtag_info, &address);
-
-if (address != MIPS32_PRACC_FASTDATA_AREA)
-	return ERROR_FAIL;
-@endcode
-
-and then passes to CPU start and end address of the loop region for handler in RAM.
-
-In the loop in handler, CPU sees that it has to take and operand from FSTDATA area (to write it to the dst in RAM after), and so it stalls, putting PrAcc to "1".
-OpenOCD fills the data via this loop :
-
-@code
-for (i = 0; i < count; i++)
-{
-	/* Send the data out using fastdata (clears the access pending bit) */
-	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_FASTDATA);
-	if ((retval = mips_ejtag_fastdata_scan(ejtag_info, write_t, buf++)) != ERROR_OK)
-		return retval;
-}
-@endcode
-
-Each time when OpenOCD fills data to CPU (via dongle, via dmseg), CPU takes it and proceeds in executing the endler. However, since handler is in a assembly loop,
-CPU comes to next instruction which also fetches data from FASTDATA area. So it stalls.
-Then OpenOCD fills the data again, from it's (OpenOCD's) loop. And this game continues untill all the data has been filled.
-
-After the last data has beend given to CPU it sees that it reached the end address, so it proceeds with next instruction. However, rhis instruction do not point into dmseg, so
-CPU executes bunch of handler instructions (all prologue) and in the end jumps to MIPS32_PRACC_TEXT address.
-
-On it's side, OpenOCD checks in CPU has jumped back to MIPS32_PRACC_TEXT, which is the confirmation that it correclty executed all the rest of the handler in RAM,
-and that is not stuck somewhere in the RAM, or stalling on some acces in dmseg - that would be an error :
-
-@code
-address = 0;
-mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
-mips_ejtag_drscan_32(ejtag_info, &address);
-
-if (address != MIPS32_PRACC_TEXT)
-	LOG_ERROR("mini program did not return to start");
-@endcode
-
-@section fdejtagspec EJTAG spec on FASTDATA access
-
-The width of the Fastdata register is 1 bit. During a Fastdata access, the Fastdata register is written and read, i.e., a bit
-is shifted in and a bit is shifted out. During a Fastdata access, the Fastdata register value shifted in specifies whether
-the Fastdata access should be completed or not. The value shifted out is a flag that indicates whether the Fastdata
-access was successful or not (if completion was requested).
-
-The FASTDATA access is used for efficient block transfers between dmseg (on the probe) and target memory (on the
-processor). An "upload" is defined as a sequence of processor loads from target memory and stores to dmseg. A
-"download" is a sequence of processor loads from dmseg and stores to target memory. The "Fastdata area" specifies
-the legal range of dmseg addresses (0xFF20.0000 - 0xFF20.000F) that can be used for uploads and downloads. The
-Data + Fastdata registers (selected with the FASTDATA instruction) allow efficient completion of pending Fastdata
-area accesses.
-During Fastdata uploads and downloads, the processor will stall on accesses to the Fastdata area. The PrAcc (processor
-access pending bit) will be 1 indicating the probe is required to complete the access. Both upload and download
-accesses are attempted by shifting in a zero SPrAcc value (to request access completion) and shifting out SPrAcc to
-see if the attempt will be successful (i.e., there was an access pending and a legal Fastdata area address was used).
-Downloads will also shift in the data to be used to satisfy the load from dmseg’s Fastdata area, while uploads will
-shift out the data being stored to dmseg’s Fastdata area.
-As noted above, two conditions must be true for the Fastdata access to succeed. These are:
-
- - PrAcc must be 1, i.e., there must be a pending processor access.
- - The Fastdata operation must use a valid Fastdata area address in dmseg (0xFF20.0000 to 0xFF20.000F).
-
-Basically, because FASTDATA area in dmseg is 16 bytes, we transfer (0xFF20.0000 - 0xFF20.000F)
-FASTDATA scan TAP instruction selects the Data and the Fastdata registers at once.
-
-They come in order :
-TDI -> | Data register| -> | Fastdata register | -> TDO
-
-FASTDATA register is 1-bit width register. It takes in SPrAcc bit which should be shifted first,
-followed by 32 bit of data.
-
-Scan width of FASTDTA is 33 bits in total : 33 bits are shifted in and 33 bits are shifted out.
-
-First bit that is shifted out is SPrAcc that comes out of Fastdata register and should give us status on FATSDATA write we want to do.
-
-@section fdcheck OpenOCD misses FASTDATA check
-
-Download flow (probe -> target block transfer) :
-
-1) Probe transfer target execution to a loop in target memory doing a fixed number of "loads" to fastdata area of dmseg (and stores to the target download destination.)
-
-2) Probe loops attempting to satisfy the loads "expected" from the target.
-   On FASTDATA access "successful" move on to next "load".
-   On FASTDATA access "failure" repeat until "successful" or timeout.
-   (A "failure" is an attempt to satisfy an access when none are pending.)
-
-Note: A failure may have a recoverable (and even expected) cause like slow target execution of the load loop. Other failures may be due to unexpected more troublesome causes like an exception while in debug mode or a target hang on a bad target memory access.
-
-Shifted out SPrAcc bit inform us that there was CPU access pendingand that it can be complete.
-
-Basically, we should do following procedure :
-
- - Download (dongle -> CPU) :
-You shift "download" DATA and FASTDATA[SPrAcc] = 0 (33 bit scan) into the target. If the value of FASTDATA[SPrAcc] shifted out is "1" then an access was pending when you started the scan and it is now complete.
-
-If SPrAcc is 0 then no access was pending to the fastdata area. (Repeat attempt to complete the access you expect for this data word. Timeout if you think the access is "long overdue" as something unexpected has happened.)
-
- - Upload (CPU -> dongle) :
-You shift "dummy" DATA and FASTDATA[SPrAcc] = 0 (33 bit scan) into the target. If the value of FASTDATA[SPrAcc] shifted out is "1" then an access was pending when you started the scan and it is now complete. The "upload" is the DATA shifted out of the target.
-
-If SPrAcc is 0 then no access was pending to the fastdata area. (Repeat attempt to complete the access you expect for this data word. Timeout if you think the access is "long overdue" as something unexpected has happened.)
-
-Basically, if checking first (before scan) if CPU is pending on FASTDATA access (PrAcc is "1"), like this
-
-@code
-wait(ready);
-do_scan();
-@endcode
-
-which is inefficient, we should do it like this :
-
-@code
-BEGIN :
-	do_scan();
-	if (!was_ready)
-	goto BEGIN;
-@endcode
-
-by checking SPrAcc that we shifted out.
-
-If some FASTDATA write fails, OpenOCD will continue with it's loop (on the host side), but CPU will rest pending (on the target side)
-waiting for correct FASTDATA write.
-
-Since OpenOCD goes ahead, it will eventually finish it's loop, and proceede to check if CPU took all the data. But since CPU did not took all the data,
-it is still turns in handler's loop in RAM, stalling on Fastdata area so this check :
-
-@code
-address = 0;
-mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
-retval = mips_ejtag_drscan_32(ejtag_info, &address);
-if (retval != ERROR_OK)
-	return retval;
-
-if (address != MIPS32_PRACC_TEXT)
-	LOG_ERROR("mini program did not return to start");
-@endcode
-
-fails, and that gives us enough information of the failure.
-
-In this case, we can lower the JTAG frquency and try again, bacuse most probable reason of this failure is that we tried FASTDATA upload before CPU arrived to rise PrAcc (i.e. before it was pending on access).
-However, the reasons for failure might be numerous : reset, exceptions which can occur in debug mode, bus hangs, etc.
-
-If lowering the JTAG freq does not work either, we can fall back to more robust solution with patch posted below.
-
-To summarize, FASTDATA communication goes as following :
-
--# CPU jumps to Debug Exception Vector Location 0xFF200200 in dmseg and it stalls, pending and waiting for EJTAG to give it first debug instruction and signall it by putting PrAcc to "0"
--# When PrAcc goes to "0" CPU execute one opcode sent by EJTAG via DATA reg. Then it pends on next access, waiting for PrAcc to be put to "0" again
--# Following this game, OpenOCD first loads handler code in RAM, and then sends the jmp_code - instruction by instruction via DATA reg, which redirects CPU to handler previously set up in RAM
--# Once in RAM CPU does not pend on any instruction, but it executes all handler instructions untill first "fetch" to Fastdata area - then it stops and pends.
--# So - when it comes to any instruction (opcode) in this handler in RAM which reads (or writes) to Fastdata area (0xF..F20.0000 to 0xF..F20.000F), CPU stops (i.e. stalls access).
-   I.e. it stops on this lw opcode and waits to FASTDATA TAP command from the probe.
--# CPU continues only if OpenOCD shifted in SPrAcc "0" (and if the PrAcc was "1"). It shifts-out "1" to tell us that it was OK (processor was stalled, so it can complete the access),
-   and that it continued execution of the handler in RAM.
--# If PrAcc was not "1" CPU will not continue (go to next instruction), but will shift-out "0" and keep stalling on the same instruction of my handler in RAM.
--# When Fastdata loop is finished, CPU executes all following hadler instructions in RAM (prologue).
--# In the end of my handler in RAM, I jumps back to begining of Debug Exception Vector Location 0xFF200200 in dmseg.
--# When it jumps back to 0xFF200200 in dmseg processor stops and pends, waiting for OpenOCD to send it instruction via DATA reg and signal it by putting PrAcc to "0".
-
-*/

doc/openocd.1

@@ -1,4 +1,4 @@
-.TH "OPENOCD" "1" "November 24, 2009"
+.TH "OPENOCD" "1" "January 08, 2009"
 .SH "NAME"
 openocd \- A free and open on\-chip debugging, in\-system programming and
 boundary\-scan testing tool for ARM and MIPS systems
@@ -22,23 +22,19 @@ please check the \fIopenocd\fR info page for the complete list.
 .SH "OPTIONS"
 .TP
 .B "\-f, \-\-file <filename>"
-This is a shortcut for a \fB\-c "[script \fI<filename>\fB]"\fR
-command, using a search path to load the configuration file
-.IR <filename> .
+Use configuration file
+.BR <filename> .
 In order to specify multiple config files, you can use multiple
 .B \-\-file
-arguments. If no such \fB\-c\fR
-options are included, the first config file
+arguments. If this option is omitted, the config file
 .B openocd.cfg
-in the search path will be used.
+in the current working directory will be used.
 .TP
 .B "\-s, \-\-search <dirname>"
-Add
-.I <dirname>
-to the search path used for config files and scripts.
-The search path begins with the current directory,
-then includes these additional directories before other
-components such as the standard OpenOCD script libraries.
+Search for config files and scripts in the directory
+.BR <dirname> .
+If this option is omitted, OpenOCD searches for config files and scripts
+in the current directory.
 .TP
 .B "\-d, \-\-debug <debuglevel>"
 Set debug level. Possible values are:
@@ -56,17 +52,13 @@ The default level is
 .TP
 .B "\-l, \-\-log_output <filename>"
 Redirect log output to the file
-.IR <filename> .
+.BR <filename> .
 Per default the log output is printed on
 .BR stderr .
 .TP
 .B "\-c, \-\-command <cmd>"
-Add the command
-.I <cmd>
-to a list of commands executed on server startup.
-Note that you will need to explicitly invoke
-.I init
-if the command requires access to a target or flash.
+Run the command
+.BR <cmd> .
 .TP
 .B "\-p, \-\-pipe"
 Use pipes when talking to gdb.
@@ -77,8 +69,10 @@ Show a help text and exit.
 .B "\-v, \-\-version"
 Show version information and exit.
 .SH "BUGS"
-Please report any bugs on the mailing list at
-.BR openocd\-devel@lists.sourceforge.net .
+Please report any bugs at
+.B http://developer.berlios.de/bugs/?group_id=4148
+or on the mailing list
+.BR openocd\-development@lists.berlios.de .
 .SH "LICENCE"
 .B OpenOCD
 is covered by the GNU General Public License (GPL), version 2 or later.
@@ -96,6 +90,9 @@ and
 programs are properly installed at your site, the command
 .B info openocd
 should give you access to the complete manual.
+.PP
+Also, the OpenOCD wiki contains some more information and examples:
+.B http://openfacts.berlios.de/index-en.phtml?title=Open_On-Chip_Debugger
 .SH "AUTHORS"
 Please see the file AUTHORS.
 .PP

ecosflash/Makefile

@@ -0,0 +1,41 @@
+#####ECOSGPLCOPYRIGHTBEGIN####
+## -------------------------------------------
+## This file is part of eCos, the Embedded Configurable Operating System.
+## Copyright (C) 2008 Øyvind Harboe
+##
+## eCos is free software; you can redistribute it and/or modify it under
+## the terms of the GNU General Public License as published by the Free
+## Software Foundation; either version 2 or (at your option) any later version.
+##
+## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+## WARRANTY; without even the implied warranty of MERCHANTABILITY or
+## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+## for more details.
+##
+## You should have received a copy of the GNU General Public License along
+## with eCos; if not, write to the Free Software Foundation, Inc.,
+## 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
+##
+## As a special exception, if other files instantiate templates or use macros
+## or inline functions from this file, or you compile this file and link it
+## with other works to produce a work based on this file, this file does not
+## by itself cause the resulting work to be covered by the GNU General Public
+## License. However the source code for this file must still be made available
+## in accordance with section (3) of the GNU General Public License.
+##
+## This exception does not invalidate any other reasons why a work based on
+## this file might be covered by the GNU General Public License.
+## -------------------------------------------
+#####ECOSGPLCOPYRIGHTEND####
+
+# Create OpenOCD eCos flash driver
+# Syntax: make INSTALL_DIR=ecosinstalldir OUTPUT=outputname
+
+include $(INSTALL_DIR)/include/pkgconf/ecos.mak
+
+all:
+	$(ECOS_COMMAND_PREFIX)gcc $(ECOS_GLOBAL_CFLAGS) $(ECOS_GLOBAL_LDFLAGS) -g -o debug_$(OUTPUT).elf -nostdlib  flash.S flash.c -Wl,--gc-sections -I$(INSTALL_DIR)/include -Wl,$(INSTALL_DIR)/lib/libtarget.a -Wl,-Map,flash.map   
+	cp debug_$(OUTPUT).elf $(OUTPUT).elf
+	$(ECOS_COMMAND_PREFIX)strip $(OUTPUT).elf
+	echo Flash driver $(OUTPUT).elf
+

ecosflash/flash.S

@@ -0,0 +1,90 @@
+/*
+#####ECOSGPLCOPYRIGHTBEGIN####
+## -------------------------------------------
+## This file is part of eCos, the Embedded Configurable Operating System.
+## Copyright (C) 2008 Øyvind Harboe
+##
+## eCos is free software; you can redistribute it and/or modify it under
+## the terms of the GNU General Public License as published by the Free
+## Software Foundation; either version 2 or (at your option) any later version.
+##
+## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+## WARRANTY; without even the implied warranty of MERCHANTABILITY or
+## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+## for more details.
+##
+## You should have received a copy of the GNU General Public License along
+## with eCos; if not, write to the Free Software Foundation, Inc.,
+## 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
+##
+## As a special exception, if other files instantiate templates or use macros
+## or inline functions from this file, or you compile this file and link it
+## with other works to produce a work based on this file, this file does not
+## by itself cause the resulting work to be covered by the GNU General Public
+## License. However the source code for this file must still be made available
+## in accordance with section (3) of the GNU General Public License.
+##
+## This exception does not invalidate any other reasons why a work based on
+## this file might be covered by the GNU General Public License.
+## -------------------------------------------
+#####ECOSGPLCOPYRIGHTEND####
+*/
+
+/*
+	Jump table for flash driver
+	
+	Registers in ARM callling convention is to place args in registers 
+	starting at r0.
+	
+	So for:
+	
+	void foo(int a, int b, int c).
+	
+	a=r0
+	b=r1
+	c=r2
+	
+	
+*/
+	.global _stack_base
+	.global _stack_start
+	.global _workarea
+	.global _start
+	.global _start_bss_clear
+_start:
+	// offset=0
+	// int erase(void *address, int len)
+	ldr     sp,=_stack_start                
+	bl erase
+	nop // Stop CPU here using hw breakpoint
+	
+	// offset=0xc
+	// int program(void *buffer, void *address, int len)	
+	ldr     sp,=_stack_start              
+	bl program
+	nop // Stop CPU here using hw breakpoint
+	
+	// offset=0x18
+	ldr     r0,=_workarea                
+	nop // Stop CPU here using hw breakpoint
+	
+	// offset=0x20
+	// int init() - returns error message if the flash chip can't be detected	
+	ldr     sp,=_stack_start              
+	bl init
+	nop // Stop CPU here using hw breakpoint
+
+    .section ".bss"
+    .balign 4
+_stack_base:
+        .rept 4096
+        .byte 0
+        .endr
+_stack_start:
+    .balign 4
+_workarea:
+        .rept 8192
+        .byte 0
+        .endr
+	// NB!!! we clear bss while the stack is in use, so we start BSS clearing here !!! :-)
+_start_bss_clear:

ecosflash/flash.c

@@ -0,0 +1,104 @@
+/*
+#####ECOSGPLCOPYRIGHTBEGIN####
+## -------------------------------------------
+## This file is part of eCos, the Embedded Configurable Operating System.
+## Copyright (C) 2008 Øyvind Harboe
+##
+## eCos is free software; you can redistribute it and/or modify it under
+## the terms of the GNU General Public License as published by the Free
+## Software Foundation; either version 2 or (at your option) any later version.
+##
+## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+## WARRANTY; without even the implied warranty of MERCHANTABILITY or
+## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+## for more details.
+##
+## You should have received a copy of the GNU General Public License along
+## with eCos; if not, write to the Free Software Foundation, Inc.,
+## 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
+##
+## As a special exception, if other files instantiate templates or use macros
+## or inline functions from this file, or you compile this file and link it
+## with other works to produce a work based on this file, this file does not
+## by itself cause the resulting work to be covered by the GNU General Public
+## License. However the source code for this file must still be made available
+## in accordance with section (3) of the GNU General Public License.
+##
+## This exception does not invalidate any other reasons why a work based on
+## this file might be covered by the GNU General Public License.
+## -------------------------------------------
+#####ECOSGPLCOPYRIGHTEND####
+*/
+
+#include <string.h>
+#define _FLASH_PRIVATE_
+#include <cyg/io/flash.h>
+
+
+
+int myprintf(char *format, ...)
+{
+  return 0;
+}
+
+extern char _start_bss_clear;
+extern char __bss_end__;
+
+int init()
+{
+	// set up runtime environment
+	char *t;
+	for (t=&_start_bss_clear; t<&__bss_end__; t++)
+	{
+		*t=0;
+	}
+	return flash_init((_printf *)&myprintf);
+
+}
+
+
+int checkFlash(void *addr, int len)
+{
+    // Return error for illegal addresses
+    if ((addr<flash_info.start)||(addr>flash_info.end))
+    	return FLASH_ERR_INVALID;
+    if ((((cyg_uint8 *)addr)+len)>(cyg_uint8 *)flash_info.end)
+    	return FLASH_ERR_INVALID;
+    return FLASH_ERR_OK;
+}
+
+
+int erase(void *address, int len)
+{
+	int retval;
+	void *failAddress;
+
+	retval=checkFlash(address, len);
+	if (retval!=0)
+		return retval;
+
+	retval=init();
+	if (retval!=0)
+		return retval;
+	return flash_erase(address, len, &failAddress);
+}
+
+
+
+extern char _end;
+
+// Data follows immediately after program, long word aligned.
+int program(void *buffer, void *address, int len)
+{
+	int retval;
+	void *failAddress;
+	retval=checkFlash(address, len);
+	if (retval!=0)
+		return retval;
+
+	retval=init();
+	if (retval!=0)
+		return retval;
+	//int flash_program(void *_addr, void *_data, int len, void **err_addr)
+	return flash_program(address, buffer, len, &failAddress);
+}

ecosflash/flash.map

@@ -0,0 +1,390 @@
+Archive member included because of file (symbol)
+
+/tmp/ecosboard/ecos/install/lib/libtarget.a(io_flash_flash.o)
+                              /ecos-c/DOCUME~1/oyvind/LOCALS~1/Temp/ccM8Ftqt.o (flash_init)
+/tmp/ecosboard/ecos/install/lib/libtarget.a(devs_flash_arm_eb40a_eb40a_flash.o)
+                              /tmp/ecosboard/ecos/install/lib/libtarget.a(io_flash_flash.o) (flash_hwr_init)
+/tmp/ecosboard/ecos/install/lib/libtarget.a(infra_memcpy.o)
+                              /tmp/ecosboard/ecos/install/lib/libtarget.a(io_flash_flash.o) (memcpy)
+/tmp/ecosboard/ecos/install/lib/libtarget.a(language_c_libc_string_memcmp.o)
+                              /tmp/ecosboard/ecos/install/lib/libtarget.a(io_flash_flash.o) (memcmp)
+
+Memory Configuration
+
+Name             Origin             Length             Attributes
+*default*        0x00000000         0xffffffff
+
+Linker script and memory map
+
+LOAD /ecos-c/DOCUME~1/oyvind/LOCALS~1/Temp/cccPBW5f.o
+LOAD /ecos-c/DOCUME~1/oyvind/LOCALS~1/Temp/ccM8Ftqt.o
+LOAD /tmp/ecosboard/ecos/install/lib/libtarget.a
+                0x00008000                PROVIDE (__executable_start, 0x8000)
+                0x00008000                . = 0x8000
+
+.interp
+ *(.interp)
+
+.hash
+ *(.hash)
+
+.dynsym
+ *(.dynsym)
+
+.dynstr
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+ *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*)
+ *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*)
+ *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*)
+ *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*)
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+                0x0000821c                flash_init
+ .text.flash_dev_query
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+                0x000082a8      0x140 /tmp/ecosboard/ecos/install/lib/libtarget.a(io_flash_flash.o)
+                0x000082a8                flash_erase
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+                0x000083e8                flash_program
+ .text.flash_hwr_init
+                0x0000853c       0xa4 /tmp/ecosboard/ecos/install/lib/libtarget.a(devs_flash_arm_eb40a_eb40a_flash.o)
+                0x0000853c                flash_hwr_init
+ .text.flash_hwr_map_error
+                0x000085e0        0x4 /tmp/ecosboard/ecos/install/lib/libtarget.a(devs_flash_arm_eb40a_eb40a_flash.o)
+                0x000085e0                flash_hwr_map_error
+ .text.__memcmp
+                0x000085e4      0x114 /tmp/ecosboard/ecos/install/lib/libtarget.a(language_c_libc_string_memcmp.o)
+                0x000085e4                memcmp
+                0x000085e4                __memcmp
+ *(.gnu.warning)
+ *(.glue_7t)
+ *(.glue_7)
+
+.2ram.flash_query
+                0x000086f8       0x54
+ .2ram.flash_query
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+                0x000086f8                flash_query
+
+.2ram.flash_erase_block
+                0x0000874c      0x230
+ .2ram.flash_erase_block
+                0x0000874c      0x230 /tmp/ecosboard/ecos/install/lib/libtarget.a(devs_flash_arm_eb40a_eb40a_flash.o)
+                0x0000874c                flash_erase_block
+
+.2ram.flash_program_buf
+                0x0000897c       0xe8
+ .2ram.flash_program_buf
+                0x0000897c       0xe8 /tmp/ecosboard/ecos/install/lib/libtarget.a(devs_flash_arm_eb40a_eb40a_flash.o)
+                0x0000897c                flash_program_buf
+
+.fini
+ *(.fini)
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+                0x00008a64                PROVIDE (_etext, .)
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+ .rodata.str1.4
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+ .rodata.supported_devices
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+
+.rodata1
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+                0x00008e7c                . = (ALIGN (0x100) + (. & 0xff))
+                0x00008e7c                . = ALIGN (0x4)
+                0x00008e7c                PROVIDE (__preinit_array_start, .)
+
+.preinit_array
+ *(.preinit_array)
+                0x00008e7c                PROVIDE (__preinit_array_end, .)
+                0x00008e7c                PROVIDE (__init_array_start, .)
+
+.init_array
+ *(.init_array)
+                0x00008e7c                PROVIDE (__init_array_end, .)
+                0x00008e7c                PROVIDE (__fini_array_start, .)
+
+.fini_array
+ *(.fini_array)
+                0x00008e7c                PROVIDE (__fini_array_end, .)
+
+.data           0x00008e7c        0x0
+                0x00008e7c                __data_start = .
+ *(.data .data.* .gnu.linkonce.d.*)
+
+.data1
+ *(.data1)
+
+.tdata
+ *(.tdata .tdata.* .gnu.linkonce.td.*)
+
+.tbss
+ *(.tbss .tbss.* .gnu.linkonce.tb.*)
+ *(.tcommon)
+
+.eh_frame
+ *(.eh_frame)
+
+.gcc_except_table
+ *(.gcc_except_table)
+
+.dynamic
+ *(.dynamic)
+
+.ctors
+ *crtbegin*.o(.ctors)
+ *(EXCLUDE_FILE(*crtend*.o) .ctors)
+ *(SORT(.ctors.*))
+ *(.ctors)
+
+.dtors
+ *crtbegin*.o(.dtors)
+ *(EXCLUDE_FILE(*crtend*.o) .dtors)
+ *(SORT(.dtors.*))
+ *(.dtors)
+
+.jcr
+ *(.jcr)
+
+.got
+ *(.got.plt)
+ *(.got)
+                0x00008e7c                _edata = .
+                0x00008e7c                PROVIDE (edata, .)
+                0x00008e7c                __bss_start = .
+                0x00008e7c                __bss_start__ = .
+
+.bss            0x00008e7c     0x3024
+ *(.dynbss)
+ *(.bss .bss.* .gnu.linkonce.b.*)
+ .bss           0x00008e7c     0x3000 /ecos-c/DOCUME~1/oyvind/LOCALS~1/Temp/cccPBW5f.o
+                0x00008e7c                _stack_base
+                0x0000be7c                _start_bss_clear
+                0x00009e7c                _workarea
+                0x00009e7c                _stack_start
+ .bss.flash_info
+                0x0000be7c       0x20 /tmp/ecosboard/ecos/install/lib/libtarget.a(io_flash_flash.o)
+                0x0000be7c                flash_info
+ .bss.flash_dev_info
+                0x0000be9c        0x4 /tmp/ecosboard/ecos/install/lib/libtarget.a(devs_flash_arm_eb40a_eb40a_flash.o)
+ *(COMMON)
+                0x0000bea0                . = ALIGN (0x4)
+                0x0000bea0                . = ALIGN (0x4)
+                0x0000bea0                _end = .
+                0x0000bea0                _bss_end__ = .
+                0x0000bea0                __bss_end__ = .
+                0x0000bea0                __end__ = .
+                0x0000bea0                PROVIDE (end, .)
+
+.stab
+ *(.stab)
+
+.stabstr
+ *(.stabstr)
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+.stab.excl
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+.stab.exclstr
+ *(.stab.exclstr)
+
+.stab.index
+ *(.stab.index)
+
+.stab.indexstr
+ *(.stab.indexstr)
+
+.comment
+ *(.comment)
+
+.debug
+ *(.debug)
+
+.line
+ *(.line)
+
+.debug_srcinfo
+ *(.debug_srcinfo)
+
+.debug_sfnames
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+ *(.debug_aranges)
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+ .debug_aranges
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+ .debug_aranges
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+
+.debug_pubnames
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+ .debug_pubnames
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+
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+ .debug_info    0x00000fff      0x123 /tmp/ecosboard/ecos/install/lib/libtarget.a(language_c_libc_string_memcmp.o)
+
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+ .debug_line    0x00000610      0x16c /tmp/ecosboard/ecos/install/lib/libtarget.a(infra_memcpy.o)
+ .debug_line    0x0000077c      0x162 /tmp/ecosboard/ecos/install/lib/libtarget.a(language_c_libc_string_memcmp.o)
+
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+ .debug_frame   0x000001b4       0xac /tmp/ecosboard/ecos/install/lib/libtarget.a(devs_flash_arm_eb40a_eb40a_flash.o)
+ .debug_frame   0x00000260       0x38 /tmp/ecosboard/ecos/install/lib/libtarget.a(infra_memcpy.o)
+ .debug_frame   0x00000298       0x28 /tmp/ecosboard/ecos/install/lib/libtarget.a(language_c_libc_string_memcmp.o)
+
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+                                0x24e (size before relaxing)
+ .debug_str     0x00000283      0x194 /tmp/ecosboard/ecos/install/lib/libtarget.a(devs_flash_arm_eb40a_eb40a_flash.o)
+                                0x2c5 (size before relaxing)
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+                                0x11e (size before relaxing)
+ .debug_str     0x00000495       0x73 /tmp/ecosboard/ecos/install/lib/libtarget.a(language_c_libc_string_memcmp.o)
+                                0x119 (size before relaxing)
+
+.debug_loc
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+
+.debug_macinfo
+ *(.debug_macinfo)
+
+.debug_weaknames
+ *(.debug_weaknames)
+
+.debug_funcnames
+ *(.debug_funcnames)
+
+.debug_typenames
+ *(.debug_typenames)
+
+.debug_varnames
+ *(.debug_varnames)
+
+.stack          0x00080000        0x0
+                0x00080000                _stack = .
+ *(.stack)
+
+.note.gnu.arm.ident
+ *(.note.gnu.arm.ident)
+
+/DISCARD/
+ *(.note.GNU-stack)
+OUTPUT(debug_eb40a.elf elf32-littlearm)
+
+.debug_ranges   0x00000000       0xb8
+ .debug_ranges  0x00000000       0x18 /tmp/ecosboard/ecos/install/lib/libtarget.a(io_flash_flash.o)
+ .debug_ranges  0x00000018       0x48 /tmp/ecosboard/ecos/install/lib/libtarget.a(devs_flash_arm_eb40a_eb40a_flash.o)
+ .debug_ranges  0x00000060       0x30 /tmp/ecosboard/ecos/install/lib/libtarget.a(infra_memcpy.o)
+ .debug_ranges  0x00000090       0x28 /tmp/ecosboard/ecos/install/lib/libtarget.a(language_c_libc_string_memcmp.o)

ecosflash/notes.txt

@@ -0,0 +1,6 @@
+Some of these binaries are build & linked using eCos. 
+
+For source for the flash drivers, see:
+
+http://ecos.sourceware.org/
+

src/Makefile.am

@@ -1,42 +1,30 @@
-include $(top_srcdir)/common.mk
+SUBDIRS = helper jtag xsvf svf target server flash pld
 
-SUBDIRS = \
-	jtag \
-	helper \
-	target \
-	transport \
-	flash \
-	svf \
-	xsvf \
-	pld \
-	server \
-	rtos
-
-noinst_LTLIBRARIES = libopenocd.la
+lib_LTLIBRARIES = libopenocd.la
 bin_PROGRAMS = openocd
 
+if ECOSBOARD
+MAINFILE = ecosboard.c
+else
 MAINFILE = main.c
+endif
 
 openocd_SOURCES = $(MAINFILE)
 openocd_LDADD = libopenocd.la
 
-if INTERNAL_JIMTCL
-openocd_LDADD += $(top_builddir)/jimtcl/libjim.a
-else
-openocd_LDADD += -ljim
-endif
+libopenocd_la_SOURCES = openocd.c
 
-if ULINK
-openocd_LDADD += -lm
-endif
-
-libopenocd_la_SOURCES = \
-	hello.c \
-	openocd.c
-
-noinst_HEADERS = \
-	hello.h \
-	openocd.h
+# set the include path found by configure
+AM_CPPFLAGS = \
+	-I$(top_srcdir)/src \
+	-I$(top_srcdir)/src/helper \
+	-I$(top_srcdir)/src/jtag \
+	-I$(top_srcdir)/src/target \
+	-I$(top_srcdir)/src/xsvf \
+	-I$(top_srcdir)/src/svf \
+	-I$(top_srcdir)/src/server \
+	-I$(top_srcdir)/src/flash \
+	-I$(top_srcdir)/src/pld
 
 libopenocd_la_CPPFLAGS = -DPKGBLDDATE=\"`date +%F-%R`\"
 
@@ -44,10 +32,8 @@ libopenocd_la_CPPFLAGS = -DPKGBLDDATE=\"`date +%F-%R`\"
 # guess-rev.sh returns either a repository version ID or "-snapshot"
 if RELEASE
 libopenocd_la_CPPFLAGS += -DRELSTR=\"\"
-libopenocd_la_CPPFLAGS += -DGITVERSION=\"\"
 else
 libopenocd_la_CPPFLAGS += -DRELSTR=\"`$(top_srcdir)/guess-rev.sh $(top_srcdir)`\"
-libopenocd_la_CPPFLAGS += -DGITVERSION=\"`cd $(top_srcdir) && git describe`\"
 endif
 
 # add default CPPFLAGS
@@ -62,46 +48,48 @@ else
 MINGWLDADD =
 endif
 
+if FT2232_LIBFTDI
+FTDI2232LIB = -lftdi -lusb
+else
+if PRESTO_LIBFTDI
+FTDI2232LIB = -lftdi -lusb
+else
+FTDI2232LIB =
+endif
+endif
+
+if USBPROG
+LIBUSB = -lusb
+else
+if JLINK
+LIBUSB = -lusb
+else
+if RLINK
+LIBUSB = -lusb
+else
+if VSLLINK
+LIBUSB = -lusb
+else
+LIBUSB =
+endif
+endif
+endif
+endif
+
 libopenocd_la_LIBADD = \
 	$(top_builddir)/src/xsvf/libxsvf.la \
 	$(top_builddir)/src/svf/libsvf.la \
 	$(top_builddir)/src/pld/libpld.la \
 	$(top_builddir)/src/jtag/libjtag.la \
-	$(top_builddir)/src/transport/libtransport.la \
 	$(top_builddir)/src/flash/libflash.la \
 	$(top_builddir)/src/target/libtarget.la \
 	$(top_builddir)/src/server/libserver.la \
-	$(top_builddir)/src/rtos/librtos.la \
 	$(top_builddir)/src/helper/libhelper.la \
-	$(LIBFTDI_LIBS) $(MINGWLDADD) \
-	$(HIDAPI_LIBS) $(LIBUSB0_LIBS) $(LIBUSB1_LIBS)
+	$(FTDI2232LIB) $(MINGWLDADD) $(LIBUSB)
 
-STARTUP_TCL_SRCS = \
-	$(srcdir)/helper/startup.tcl \
-	$(srcdir)/jtag/startup.tcl \
-	$(srcdir)/target/startup.tcl \
-	$(srcdir)/flash/startup.tcl \
-	$(srcdir)/server/startup.tcl
-
-EXTRA_DIST = $(STARTUP_TCL_SRCS)
-
-BUILT_SOURCES = startup_tcl.inc
-
-startup.tcl: $(STARTUP_TCL_SRCS)
-	cat $^ > $@
-
-BIN2C = $(top_srcdir)/src/helper/bin2char.sh
-
-# Convert .tcl to c-array
-startup_tcl.inc: startup.tcl $(BIN2C)
-	$(BIN2C) < $< > $@ || { rm -f $@; false; }
-
-# add generated files to make clean list
-CLEANFILES = startup.tcl startup_tcl.inc
-
-# we do not want generated file in the dist
-dist-hook:
-	rm -f $(distdir)/startup_tcl.inc
+if HTTPD
+libopenocd_la_LIBADD += -lmicrohttpd
+endif
 
 MAINTAINERCLEANFILES = $(srcdir)/Makefile.in
 

src/flash/Makefile.am

@@ -1,23 +1,70 @@
-include $(top_srcdir)/common.mk
-
-SUBDIRS = \
-	nor \
-	nand
+AM_CPPFLAGS = \
+	-I$(top_srcdir)/src/helper \
+	-I$(top_srcdir)/src/jtag \
+	-I$(top_srcdir)/src/target
 
 METASOURCES = AUTO
 noinst_LTLIBRARIES = libflash.la
 libflash_la_SOURCES = \
-	common.c \
-	mflash.c
-
-libflash_la_LIBADD = \
-	$(top_builddir)/src/flash/nor/libocdflashnor.la \
-	$(top_builddir)/src/flash/nand/libocdflashnand.la
+	arm_nandio.c \
+	flash.c \
+	lpc2000.c \
+	lpc288x.c \
+	lpc2900.c \
+	cfi.c \
+	non_cfi.c \
+	at91sam7.c \
+	at91sam3.c \
+	davinci_nand.c \
+	str7x.c \
+	str9x.c \
+	aduc702x.c \
+	nand.c \
+	nand_ecc.c \
+	nand_ecc_kw.c \
+	lpc3180_nand_controller.c \
+	stellaris.c \
+	str9xpec.c \
+	stm32x.c \
+	tms470.c \
+	ecos.c \
+	orion_nand.c \
+	s3c24xx_nand.c \
+	s3c2410_nand.c \
+	s3c2412_nand.c \
+	s3c2440_nand.c \
+	s3c2443_nand.c \
+	ocl.c \
+	mflash.c \
+	pic32mx.c \
+	avrf.c \
+	faux.c \
+	mx3_nand.c
 
 noinst_HEADERS = \
-	common.h \
-	mflash.h
-
-EXTRA_DIST = startup.tcl
+	arm_nandio.h \
+	flash.h \
+	lpc2000.h \
+	lpc288x.h \
+	lpc2900.h \
+	cfi.h \
+	non_cfi.h \
+	at91sam7.h \
+	at91sam3.h \
+	str7x.h \
+	str9x.h \
+	nand.h \
+	lpc3180_nand_controller.h \
+	stellaris.h \
+	str9xpec.h \
+	stm32x.h \
+	tms470.h \
+	s3c24xx_nand.h \
+	s3c24xx_regs_nand.h \
+	mflash.h \
+	ocl.h \
+	pic32mx.h \
+	avrf.h \
+	mx3_nand.h
 
 MAINTAINERCLEANFILES = $(srcdir)/Makefile.in

src/flash/aduc702x.c

@@ -0,0 +1,454 @@
+/***************************************************************************
+ *   Copyright (C) 2008 by Kevin McGuire                                   *
+ *   Copyright (C) 2008 by Marcel Wijlaars                                 *
+ *   Copyright (C) 2009 by Michael Ashton                                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ ***************************************************************************/
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "flash.h"
+#include "armv4_5.h"
+#include "binarybuffer.h"
+#include "time_support.h"
+
+
+static int aduc702x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
+static int aduc702x_register_commands(struct command_context_s *cmd_ctx);
+static int aduc702x_erase(struct flash_bank_s *bank, int first, int last);
+static int aduc702x_protect(struct flash_bank_s *bank, int set, int first, int last);
+static int aduc702x_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
+static int aduc702x_write_single(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
+static int aduc702x_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
+static int aduc702x_probe(struct flash_bank_s *bank);
+static int aduc702x_info(struct flash_bank_s *bank, char *buf, int buf_size);
+static int aduc702x_protect_check(struct flash_bank_s *bank);
+static int aduc702x_build_sector_list(struct flash_bank_s *bank);
+static int aduc702x_check_flash_completion(target_t* target, unsigned int timeout_ms);
+static int aduc702x_set_write_enable(target_t *target, int enable);
+
+#define ADUC702x_FLASH				0xfffff800
+#define ADUC702x_FLASH_FEESTA		(0*4)
+#define ADUC702x_FLASH_FEEMOD		(1*4)
+#define ADUC702x_FLASH_FEECON		(2*4)
+#define ADUC702x_FLASH_FEEDAT		(3*4)
+#define ADUC702x_FLASH_FEEADR		(4*4)
+#define ADUC702x_FLASH_FEESIGN		(5*4)
+#define ADUC702x_FLASH_FEEPRO		(6*4)
+#define ADUC702x_FLASH_FEEHIDE		(7*4)
+
+typedef struct {
+	uint32_t feesta;
+	uint32_t feemod;
+	uint32_t feecon;
+	uint32_t feedat;
+	uint32_t feeadr;
+	uint32_t feesign;
+	uint32_t feepro;
+	uint32_t feehide;
+} ADUC702x_FLASH_MMIO;
+
+typedef struct
+{
+	working_area_t *write_algorithm;
+} aduc702x_flash_bank_t;
+
+flash_driver_t aduc702x_flash =
+{
+	.name = "aduc702x",
+	.register_commands = aduc702x_register_commands,
+	.flash_bank_command = aduc702x_flash_bank_command,
+	.erase = aduc702x_erase,
+	.protect = aduc702x_protect,
+	.write = aduc702x_write,
+	.probe = aduc702x_probe,
+	.auto_probe = aduc702x_probe,
+	.erase_check = default_flash_blank_check,
+	.protect_check = aduc702x_protect_check,
+	.info = aduc702x_info
+};
+
+static int aduc702x_register_commands(struct command_context_s *cmd_ctx)
+{
+	return ERROR_OK;
+}
+
+/* flash bank aduc702x 0 0 0 0 <target#>
+ * The ADC7019-28 devices all have the same flash layout */
+static int aduc702x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
+{
+	aduc702x_flash_bank_t *nbank;
+
+	nbank = malloc(sizeof(aduc702x_flash_bank_t));
+
+        bank->base = 0x80000;
+        bank->size = 0xF800; // top 4k not accessible
+	bank->driver_priv = nbank;
+
+        aduc702x_build_sector_list(bank);
+
+        return ERROR_OK;
+}
+
+static int aduc702x_build_sector_list(struct flash_bank_s *bank)
+{
+	//aduc7026_flash_bank_t *aduc7026_info = bank->driver_priv;
+
+        int i = 0;
+        uint32_t offset = 0;
+
+        // sector size is 512
+        bank->num_sectors = bank->size / 512;
+        bank->sectors = malloc(sizeof(flash_sector_t) * bank->num_sectors);
+        for (i = 0; i < bank->num_sectors; ++i)
+        {
+                bank->sectors[i].offset = offset;
+                bank->sectors[i].size = 512;
+                offset += bank->sectors[i].size;
+                bank->sectors[i].is_erased = -1;
+                bank->sectors[i].is_protected = 0;
+        }
+
+	return ERROR_OK;
+}
+
+static int aduc702x_protect_check(struct flash_bank_s *bank)
+{
+	printf("aduc702x_protect_check not implemented yet.\n");
+	return ERROR_OK;
+}
+
+static int aduc702x_erase(struct flash_bank_s *bank, int first, int last)
+{
+        //int res;
+	int x;
+	int count;
+	//uint32_t v;
+	target_t *target = bank->target;
+
+        aduc702x_set_write_enable(target, 1);
+
+	/* mass erase */
+	if (((first | last) == 0) || ((first == 0) && (last >= bank->num_sectors))) {
+		LOG_DEBUG("performing mass erase.\n");
+		target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEDAT, 0x3cff);
+		target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, 0xffc3);
+		target_write_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x06);
+
+                if (aduc702x_check_flash_completion(target, 3500) != ERROR_OK)
+		{
+			LOG_ERROR("mass erase failed\n");
+                        aduc702x_set_write_enable(target, 0);
+			return ERROR_FLASH_OPERATION_FAILED;
+		}
+
+		LOG_DEBUG("mass erase successful.\n");
+		return ERROR_OK;
+	} else {
+                unsigned long adr;
+
+                count = last - first + 1;
+                for (x = 0; x < count; ++x)
+                {
+                        adr = bank->base + ((first + x) * 512);
+
+                        target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, adr);
+                        target_write_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x05);
+
+                        if (aduc702x_check_flash_completion(target, 50) != ERROR_OK)
+                        {
+                                LOG_ERROR("failed to erase sector at address 0x%08lX\n", adr);
+                                aduc702x_set_write_enable(target, 0);
+                                return ERROR_FLASH_SECTOR_NOT_ERASED;
+                        }
+
+                        LOG_DEBUG("erased sector at address 0x%08lX\n", adr);
+                }
+        }
+
+        aduc702x_set_write_enable(target, 0);
+
+	return ERROR_OK;
+}
+
+static int aduc702x_protect(struct flash_bank_s *bank, int set, int first, int last)
+{
+	printf("aduc702x_protect not implemented yet.\n");
+	return ERROR_FLASH_OPERATION_FAILED;
+}
+
+/* If this fn returns ERROR_TARGET_RESOURCE_NOT_AVAILABLE, then the caller can fall
+ * back to another mechanism that does not require onboard RAM
+ *
+ * Caller should not check for other return values specifically
+ */
+static int aduc702x_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
+{
+	aduc702x_flash_bank_t *aduc702x_info = bank->driver_priv;
+	target_t *target = bank->target;
+	uint32_t buffer_size = 7000;
+	working_area_t *source;
+	uint32_t address = bank->base + offset;
+	reg_param_t reg_params[6];
+	armv4_5_algorithm_t armv4_5_info;
+	int retval = ERROR_OK;
+
+	if (((count%2)!=0)||((offset%2)!=0))
+	{
+		LOG_ERROR("write block must be multiple of two bytes in offset & length");
+		return ERROR_FAIL;
+	}
+
+        /* parameters:
+
+        r0 - address of source data (absolute)
+        r1 - number of halfwords to be copied
+        r2 - start address in flash (offset from beginning of flash memory)
+        r3 - exit code
+        r4 - base address of flash controller (0xFFFFF800)
+
+        registers:
+
+        r5 - scratch
+        r6 - set to 2, used to write flash command
+
+        */
+        uint32_t aduc702x_flash_write_code[] = {
+        //<_start>:
+                0xe3a05008,	// mov	r5, #8	; 0x8
+                0xe5845004,	// str	r5, [r4, #4]
+                0xe3a06002,	// mov	r6, #2	; 0x2
+        //<next>:
+                0xe1c421b0,	// strh	r2, [r4, #16]
+                0xe0d050b2,	// ldrh	r5, [r0], #2
+                0xe1c450bc,	// strh	r5, [r4, #12]
+                0xe5c46008,	// strb	r6, [r4, #8]
+        //<wait_complete>:
+                0xe1d430b0,	// ldrh	r3, [r4]
+                0xe3130004,	// tst	r3, #4	; 0x4
+                0x1afffffc,	// bne	1001c <wait_complete>
+                0xe2822002,	// add	r2, r2, #2	; 0x2
+                0xe2511001,	// subs	r1, r1, #1	; 0x1
+                0x0a000001,	// beq	1003c <done>
+                0xe3130001,	// tst	r3, #1	; 0x1
+                0x1afffff3,	// bne	1000c <next>
+        //<done>:
+                0xeafffffe 	// b	1003c <done>
+	};
+
+	/* flash write code */
+	if (target_alloc_working_area(target, sizeof(aduc702x_flash_write_code),
+                &aduc702x_info->write_algorithm) != ERROR_OK)
+	{
+		LOG_WARNING("no working area available, can't do block memory writes");
+		return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
+	};
+
+	retval=target_write_buffer(target, aduc702x_info->write_algorithm->address,
+                sizeof(aduc702x_flash_write_code), (uint8_t*)aduc702x_flash_write_code);
+	if (retval!=ERROR_OK)
+	{
+		return retval;
+	}
+
+	/* memory buffer */
+	while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK)
+	{
+		buffer_size /= 2;
+		if (buffer_size <= 256)
+		{
+			/* if we already allocated the writing code, but failed to get a buffer, free the algorithm */
+			if (aduc702x_info->write_algorithm)
+				target_free_working_area(target, aduc702x_info->write_algorithm);
+
+			LOG_WARNING("no large enough working area available, can't do block memory writes");
+			return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
+		}
+	}
+
+	armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC;
+	armv4_5_info.core_mode = ARMV4_5_MODE_SVC;
+	armv4_5_info.core_state = ARMV4_5_STATE_ARM;
+
+	init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT);
+	init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);
+	init_reg_param(&reg_params[2], "r2", 32, PARAM_OUT);
+	init_reg_param(&reg_params[3], "r3", 32, PARAM_IN);
+	init_reg_param(&reg_params[4], "r4", 32, PARAM_OUT);
+
+	while (count > 0)
+	{
+		uint32_t thisrun_count = (count > buffer_size) ? buffer_size : count;
+
+		retval=target_write_buffer(target, source->address, thisrun_count, buffer);
+		if (retval!=ERROR_OK)
+		{
+			break;
+		}
+
+		buf_set_u32(reg_params[0].value, 0, 32, source->address);
+		buf_set_u32(reg_params[1].value, 0, 32, thisrun_count/2);
+		buf_set_u32(reg_params[2].value, 0, 32, address);
+		buf_set_u32(reg_params[4].value, 0, 32, 0xFFFFF800);
+
+		if ((retval = target_run_algorithm(target, 0, NULL, 5,
+                        reg_params, aduc702x_info->write_algorithm->address,
+                        aduc702x_info->write_algorithm->address + sizeof(aduc702x_flash_write_code) - 4,
+                        10000, &armv4_5_info)) != ERROR_OK)
+		{
+			LOG_ERROR("error executing aduc702x flash write algorithm");
+			break;
+		}
+
+		if ((buf_get_u32(reg_params[3].value, 0, 32) & 1) != 1)
+		{
+			/* FIX!!!! what does this mean??? replace w/sensible error message */
+			LOG_ERROR("aduc702x detected error writing flash");
+			retval = ERROR_FAIL;
+			break;
+		}
+
+		buffer += thisrun_count;
+		address += thisrun_count;
+		count -= thisrun_count;
+	}
+
+	target_free_working_area(target, source);
+	target_free_working_area(target, aduc702x_info->write_algorithm);
+
+	destroy_reg_param(&reg_params[0]);
+	destroy_reg_param(&reg_params[1]);
+	destroy_reg_param(&reg_params[2]);
+	destroy_reg_param(&reg_params[3]);
+	destroy_reg_param(&reg_params[4]);
+
+	return retval;
+}
+
+/* All-JTAG, single-access method.  Very slow.  Used only if there is no
+ * working area available. */
+static int aduc702x_write_single(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
+{
+	uint32_t x;
+        uint8_t b;
+	target_t *target = bank->target;
+
+        aduc702x_set_write_enable(target, 1);
+
+	for (x = 0; x < count; x += 2) {
+                // FEEADR = address
+		target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, offset + x);
+
+                // set up data
+		if ((x + 1) == count)
+                {
+                        // last byte
+                        target_read_u8(target, offset + x + 1, &b);
+                }
+                else
+                        b = buffer[x + 1];
+
+                target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEDAT, buffer[x] | (b << 8));
+
+                // do single-write command
+		target_write_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x02);
+
+                if (aduc702x_check_flash_completion(target, 1) != ERROR_OK)
+                {
+			LOG_ERROR("single write failed for address 0x%08lX\n", (unsigned long)(offset + x));
+                        aduc702x_set_write_enable(target, 0);
+			return ERROR_FLASH_OPERATION_FAILED;
+		}
+
+	}
+        LOG_DEBUG("wrote %d bytes at address 0x%08lX\n", (int)count, (unsigned long)(offset + x));
+
+        aduc702x_set_write_enable(target, 0);
+
+	return ERROR_OK;
+}
+
+int aduc702x_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
+{
+	int retval;
+
+        /* try using a block write */
+        if ((retval = aduc702x_write_block(bank, buffer, offset, count)) != ERROR_OK)
+        {
+                if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE)
+                {
+                        /* if block write failed (no sufficient working area),
+                         * use normal (slow) JTAG method */
+                        LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
+
+                        if ((retval = aduc702x_write_single(bank, buffer, offset, count)) != ERROR_OK)
+                        {
+                                LOG_ERROR("slow write failed");
+                                return ERROR_FLASH_OPERATION_FAILED;
+                        }
+                }
+        }
+
+        return retval;
+}
+
+static int aduc702x_probe(struct flash_bank_s *bank)
+{
+	return ERROR_OK;
+}
+
+static int aduc702x_info(struct flash_bank_s *bank, char *buf, int buf_size)
+{
+	snprintf(buf, buf_size, "aduc702x flash driver info");
+	return ERROR_OK;
+}
+
+/* sets FEEMOD bit 3
+ * enable = 1 enables writes & erases, 0 disables them */
+static int aduc702x_set_write_enable(target_t *target, int enable)
+{
+        // don't bother to preserve int enable bit here
+        target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEMOD, enable ? 8 : 0);
+
+        return ERROR_OK;
+}
+
+/* wait up to timeout_ms for controller to not be busy,
+ * then check whether the command passed or failed.
+ *
+ * this function sleeps 1ms between checks (after the first one),
+ * so in some cases may slow things down without a usleep after the first read */
+static int aduc702x_check_flash_completion(target_t* target, unsigned int timeout_ms)
+{
+        uint8_t v = 4;
+
+        long long endtime = timeval_ms() + timeout_ms;
+        while (1) {
+                target_read_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEESTA, &v);
+                if ((v & 4) == 0) break;
+                alive_sleep(1);
+                if (timeval_ms() >= endtime) break;
+        }
+
+        if (v & 2) return ERROR_FAIL;
+        // if a command is ignored, both the success and fail bits may be 0
+        else if ((v & 3) == 0) return ERROR_FAIL;
+        else return ERROR_OK;
+}
+

src/flash/arm_nandio.c

@@ -0,0 +1,134 @@
+/*
+ * Copyright (C) 2009 by Marvell Semiconductors, Inc.
+ * Written by Nicolas Pitre <nico at marvell.com>
+ *
+ * Copyright (C) 2009 by David Brownell
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the
+ * Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "arm_nandio.h"
+#include "armv4_5.h"
+
+
+/*
+ * ARM-specific bulk write from buffer to address of 8-bit wide NAND.
+ * For now this only supports ARMv4 and ARMv5 cores.
+ *
+ * Enhancements to target_run_algorithm() could enable:
+ *   - ARMv6 and ARMv7 cores in ARM mode
+ *
+ * Different code fragments could handle:
+ *   - Thumb2 cores like Cortex-M (needs different byteswapping)
+ *   - 16-bit wide data (needs different setup too)
+ */
+int arm_nandwrite(struct arm_nand_data *nand, uint8_t *data, int size)
+{
+	target_t		*target = nand->target;
+	armv4_5_algorithm_t	algo;
+	armv4_5_common_t	*armv4_5 = target->arch_info;
+	reg_param_t		reg_params[3];
+	uint32_t		target_buf;
+	uint32_t		exit = 0;
+	int			retval;
+
+	/* Inputs:
+	 *  r0	NAND data address (byte wide)
+	 *  r1	buffer address
+	 *  r2	buffer length
+	 */
+	static const uint32_t code[] = {
+		0xe4d13001,	/* s: ldrb  r3, [r1], #1 */
+		0xe5c03000,	/*    strb  r3, [r0]     */
+		0xe2522001,	/*    subs  r2, r2, #1   */
+		0x1afffffb,	/*    bne   s            */
+
+		/* exit: ARMv4 needs hardware breakpoint */
+		0xe1200070,	/* e: bkpt  #0           */
+	};
+
+	if (!nand->copy_area) {
+		uint8_t		code_buf[sizeof(code)];
+		unsigned	i;
+
+		/* make sure we have a working area */
+		if (target_alloc_working_area(target,
+				sizeof(code) + nand->chunk_size,
+				&nand->copy_area) != ERROR_OK) {
+			LOG_DEBUG("%s: no %d byte buffer",
+					__FUNCTION__,
+					(int) sizeof(code) + nand->chunk_size);
+			return ERROR_NAND_NO_BUFFER;
+		}
+
+		/* buffer code in target endianness */
+		for (i = 0; i < sizeof(code) / 4; i++)
+			target_buffer_set_u32(target, code_buf + i * 4, code[i]);
+
+		/* copy code to work area */
+                retval = target_write_memory(target,
+					nand->copy_area->address,
+					4, sizeof(code) / 4, code_buf);
+		if (retval != ERROR_OK)
+			return retval;
+	}
+
+	/* copy data to work area */
+	target_buf = nand->copy_area->address + sizeof(code);
+	retval = target_bulk_write_memory(target, target_buf, size / 4, data);
+	if (retval == ERROR_OK && (size & 3) != 0)
+		retval = target_write_memory(target,
+				target_buf + (size & ~3),
+				1, size & 3, data + (size & ~3));
+	if (retval != ERROR_OK)
+		return retval;
+
+	/* set up algorithm and parameters */
+	algo.common_magic = ARMV4_5_COMMON_MAGIC;
+	algo.core_mode = ARMV4_5_MODE_SVC;
+	algo.core_state = ARMV4_5_STATE_ARM;
+
+	init_reg_param(&reg_params[0], "r0", 32, PARAM_IN);
+	init_reg_param(&reg_params[1], "r1", 32, PARAM_IN);
+	init_reg_param(&reg_params[2], "r2", 32, PARAM_IN);
+
+	buf_set_u32(reg_params[0].value, 0, 32, nand->data);
+	buf_set_u32(reg_params[1].value, 0, 32, target_buf);
+	buf_set_u32(reg_params[2].value, 0, 32, size);
+
+	/* armv4 must exit using a hardware breakpoint */
+	if (armv4_5->is_armv4)
+		exit = nand->copy_area->address + sizeof(code) - 4;
+
+	/* use alg to write data from work area to NAND chip */
+	retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
+			nand->copy_area->address, exit, 1000, &algo);
+	if (retval != ERROR_OK)
+		LOG_ERROR("error executing hosted NAND write");
+
+	destroy_reg_param(&reg_params[0]);
+	destroy_reg_param(&reg_params[1]);
+	destroy_reg_param(&reg_params[2]);
+
+	return retval;
+}
+
+/* REVISIT do the same for bulk *read* too ... */
+

src/flash/arm_nandio.h

@@ -0,0 +1,25 @@
+#ifndef __ARM_NANDIO_H
+#define  __ARM_NANDIO_H
+
+#include "nand.h"
+#include "binarybuffer.h"
+
+struct arm_nand_data {
+	/* target is proxy for some ARM core */
+	struct target_s		*target;
+
+	/* copy_area holds write-to-NAND loop and data to write */
+	struct working_area_s	*copy_area;
+
+	/* chunk_size == page or ECC unit */
+	unsigned		chunk_size;
+
+	/* data == where to write the data */
+	uint32_t		data;
+
+	/* currently implicit:  data width == 8 bits (not 16) */
+};
+
+int arm_nandwrite(struct arm_nand_data *nand, uint8_t *data, int size);
+
+#endif  /* __ARM_NANDIO_H */