Misc:
- Introduce some "struct reg" temporaries, for clarity
- Shorten lines
- Add some missing whitespace
- Clean up comments
- Add notes about some fault handling issues
- Most of these errata workarounds are for *OLD* chip revisions
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
And add my copyright. MPCore is untested, but it's the
only other ARM11 core to care about.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Command "reset halt" checks if PC properly resets, issueing warning:
"PC was not 0. Does this target need srst_pulls_trst?".
Checking PC against 0 is not always correct.
Removed PC value check, as suggested by Øyvind Harboe.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: U-PROPRIET-28D9DF\PROPRIETAIRE <PROPRIETAIRE@propriet-28d9df.(none)>
This creates the TCL interface for configuring an AT91SAM9 NAND flash
controller and implements the necessary functions to correctly work with
a NAND flash device connected to the chip. This includes updates to the
driver list and the Makefile.am to support building the driver and also
houses the documentation update in openocd.texi.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
In conjunction with manual register setup, this lets the ETM trigger
cause entry to debug state. It should make it easier to test and
bugfix the ETM code, by enabling non-trace usage and isolating bugs
specific to thef ETM support. (One current issue being that trace
data collection using the ETB doesn't yet behave.)
For example, many ARM9 cores with an ETM should be able to implement
four more (simple) breakpoints and two more (simple) watchpoints than
the EmbeddedICE supports. Or, they should be able to support complex
breakpoints, incorporating ETM sequencer, counters, and/or subroutine
entry/exit criteria int criteria used to trigger debug entry.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Change handling of the CYCLE_ACCURATE, BRANCH_OUTPUT, and
TRACE_* flags; also the CONTEXTID size values.
- Convert to symbols matching the actual register bits, instead of
some random *other* bits (and then correcting that abuse).
- Get rid of a now-needless enum.
- Keep those values in etm->control, and remove etm->tracemode.
These values all affect the trace data that's recorded by a trace
pod or in the ETB. I modified the file format used to dump ETB
data; since it's fairly clear nobody can use this mechanism now,
this can't cause anyone trouble.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Provide better comments for the ETM_CTRL bits; use the correct bit
for half/full clock mode; and define a few more of the bits available
from the earliest ETM versions.
The new bit defintions use ETM_CTRL_* names to match their register
(instead of ETM_PORT_* or ETMV1_*). For clarity, and better matching
to docs, they are defined with bitshifting not pre-computed masks.
Stop abusing typdefs for ETM_CTRL values; such values are not limited
to the enumerated set of individual bit values.
Rename etm->portmode to etm->control ... and start morphing it into a
single generic shadow of ETM_CTRL. Eventually etm->tracemode should
vanish, so we can just write etm->control to ETM_CTRL.
Restore an "if" that somehow got dropped.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This command was misplaced; it's not generic to all traceport drivers,
only the ETB supports this kind of configuration. So move it, and
update the relevant documentation.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Much to my surprise, I observed a "flash erase_address ..."
command erasing data which I said should not be erased.
The issue turns out to be generic NOR flash code which was
silently, and rather dangerously, morphing partial-sector
references into unrequested whole-sector ones.
This patch removes that low-level morphing. If desired, it
can and should be done in higher level code. (We might need
to fix some stuff in the GDB server code.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
It's currently allocating a big buffer but writing it out in
units of sizeof(host's pointer) ... sub-optimal.
Plus fix a couple minor coding style goofs.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Word count == size/4; cope. And increase buf_min so it's large
enough to cover the overhead in my tests.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
We can actually do the right thing if the MMU is off; save
the error message for the phys-but-MMU-enabled path, which
is what isn't yet supported.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Try to right-size the SRAM buffers, by not:
- using them for very small writes
- giving up when a large buffer isn't available
- allocating buffers much larger than their data
Also don't:
- bother loading the code unless we allocate the writebuffer too
- be so verbose with messaging:
* be more concise
* reduce importance (e.g. DEBUG not WARNING)
* remove duplication
The minimum buffer size is something of a guess. It's eight
times smaller than before, almost the same size as the code
being downloaded. It probably deserves some tuning.
Also, note an erratum affecting flash protection on some chips;
and narrow many over-wide lines affected by the above changes.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Refactored the write page raw function into two new functions
for writing data to a NAND device and then another function to
finish up a write to a NAND device. This includes some new
updates to introduce more error checking to existing code.
[dbrownell@users.sourceforge.net: fix fault handling, whitespace]
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Added a new function to encapsulate reading a page of data from
a NAND device using either the read_block_data function of a NAND
controller or to use direct reading of data from the NAND device.
This also adds some performance enhancements and uses the read_data
function if the read_block_data function fails safely (because it
can't allocate a buffer in the working area).
[dbrownell@users.sourceforge.net: fix fault handling, whitespace]
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Tweak the "scan_chain" output by removing column separators. Also
remove the "current instruction" state ... which changes constantly.
Now its style resembles the "targets" output, and can even fit on
one line in standard terminals and in the PDF docs.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Someday revisit various issues: Tempest parts support writing
more than one word at a time; for some target firmware it might
be necessary to save and restore flash IRQ configuration. (The
safest policy is likely to always reset after flash updates.)
Plus swap some undesirable TAB characters with SPACE.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Fix potential memory leak: make sure the per-bank data
structures are only allocated in probe(), and that calling
probe() multiple times is a NOP. Use it for auto_probe().
Require probe() to have done its thing: don't make access
routines cope with it not having been called. Shrink a
bunch of failure paths; and in some cases, correct them.
Don't needlessly insist on a halted target for probe().
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
No point in reading and discarding a status value when fetching
part description data. Or having that needless "#if 0" code.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Previously "reading" clock info (and part info) also, as a side
effect, wrote the flash timing register. Instead, be more safe:
"reading" should only read. Write paths still refresh timing,
coping with changes the application code may have made.
Also rename the routine which sets flash timing, indicating what
it's really doing; it's got nothing to do with a "mode".
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
By exhausting data on input, the performance will be more
consistent + the code more clearly distinguishes between
polling and processing. A test showed gdb packet load
performance go from ~1550kByte/s to 1650kBytes/s + being
more stable.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Remove more remnants of the old "jtag_device" syntax.
Don't [format "%s.cpu" $_CHIPNAME] ... it's needless complexity.
Remove various non-supported "-variant" target options; they're not
needed often at all.
Flag some of the board files as needing to have and use target files
for the TAP and target declarations.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
That syntax has been obsolete forever and is now gone; remove a few
remaining references. Shows how seldom this stuff gets used.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Teach ARM11 how to use:
- the new "reset-assert" event
- vector catch to implement "reset halt"
- use SRST more like other cores do
- ... including leaving post-SRST delays up to config scripts
This gives OMAP2420 the ability to reset, and doesn't seem to
cause new iMX31 problems.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Common target.cfg file for LM3S CPU family
[dbrownell@users.sourceforge.net: rename, generalize more]
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
I added the remaining devices and device IDs to stellaris.c, and
removed several devices that don't exist on the Stellaris web page.
Additionally, I found a few devices with duplicate IDs ... the DID1
Version Number for LM3Sxxx parts have DID1 Version = 0x0, and for
LM3Sxxxx have DID1 Version = 0x1. So I extended the comparison to
use the VER and FAM fields from DID1 also.
ID=0x33: LM3S812 (DID1v0) and LM3S2616 (DID1v1)
ID=0x39: LM3S808 (DID1v0) and LM3S2276 (DID1v1)
These are the parts I removed from the file for lack of documentation
(no data sheet to confirm part ID):
LM3S318,
LM3S1101, LM3S1108,
LM3S1615, LM3S1616,
LM3S2016,
LM3S2101, LM3S2108,
LM3S3759, LM3S3768,
LM3S5757, LM3S5767, LM3S5768, LM3S5769,
LM3S6815, LM3S6816,
LM3S6915, LM3S6916,
LM3S6111, LM3S6118.
Also, sort devices according to part number.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add a "-ignore-version" to "jtag newtap" which makes the IDCODE
comparison logic optionally ignore version differences.
Update the "scan_chain" command to illustrate this by showing
the "*" character instead of the (ignored) version nibble.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make these ".h" files adopt the same policy the ".c" files already
follow: don't use <subsystem/...h> syntax for private interfaces.
If we ever get reviewed/supported "public" interfaces they should
come exclusively from some include/... directory; that'll be the
time to switch to <...> syntax for any subsystem's own interfaces.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Don't include <helper/jim.h> from target.h ... not everything
which touches targets needs to be able to talk to Jim. Plus,
most files include this header by another path.
Also, switch the affected files to use the classic sequence
for #included files: all <framework/headers.h> first, then
the "local_headers.h". This helps prevent growth of problematic
layering, by minimizing entanglement.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
For some routines that only returned ERROR_OK and where the
caller never checked ... don't bother. Remove some noise,
and bugfix some comments.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Abstract the DPM breakpoint and watchpoint data structures to
have a shared core for housekeeping.
Abstract the code updating the watchpoint registers so that it
can be used to update breakpoint registers. Then do so, when
something has set up the breakpoint state used by this code.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Properly detect all of these, including the "2" variants;
and bugfix parameter display for LDC and STC.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
ITR register handling seemed to be giving me problems, so I updated
the comments to better say what the code is trying to do ... and to
note the preconditions (one of which seems to be an issue) as listed
in the ARM1136 TRM.
Also removed the unused "ARM11_TAP_DEFAULT" from the ITR scan code;
all the callers already specify an exit path, since this register
isn't usable with such vague semantics.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This fixes the issue under native win32 of the socket interface not being
enabled (via WSAStartup) before init is called from a script.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
I neglected to copy Magnus' copyright when I moved several
declarations from the ARMv7-M header.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Bugfix the read side of flash protection:
- read the right register(s)!
- handle more than 64K
- record the results in the right places
- don't display garbage.
Partially bugfix the write side:
- use 2KB lock regions instead of 1KB pages (!)
- validate input range
- don't try to _remove_ protection (it's write-once)
- #define values we'll need to commit writes.
- ... still doesn't handle pages over 64KB mark, or commit writes
And minor cleanup and fixes:
- get rid of some forward decls
- properly locate a doxygen comment
- fix some bad indentation
- remove superfluous #include
- add a new part ID (many are still missing)
- make the downloaded algorithm code be read-only
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
These were all basically "can't happen" cases ... like having
state be corrupted by an alpha particle after the previous check
for whether a value was in-range.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Most of these happened to be in the target.h file.
Some of those are associated with symbols that could be
removed at some point ... e.g. NVP_ASSERT/true and its
sibling NVP_DEASSERT/false.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The exception being declarations for drivers. Those should
be split out in some clean way -- like driver add/remove calls
made by initialization code -- but that's for another day.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
It's as if despite integers being 32-bits, GCC refuses to
convert a "uint32_t" to one of them.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Low latency low CPU processing power systems(embedded)
will benefit greatly from being able to inline certain
jtag_add_xxx() fn's. The trick is that this has to be
done in such a way as to allow implementing an OpenOCD
API with a shared library(eventually) on a PC hosted
OpenOCD.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Some versions of GCC don't understand that if you mask with 0x3
then have cases 0-3, it's not possible for a variable assigned in
all those branches to have no value at end-of-case. Feh.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
When starting up, say how many hardware breakpoints and watchpoints
are available on various targets.
This makes it easier to tell GDB how many of those resources exist.
Its remote protocol currently has no way to ask OpenOCD for that
information, so it must configured by hand (or not at all).
Update the docs to mention this; remove obsolete "don't do this" info.
Presentation of GDB setup information is still a mess, but at least
it calls out the three components that need setup.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Provide and use debug_reason_name() instead of expecting targets
to call Jim_Nvp_value2name_simple(). Less dependency on Jim, and
the code becomes more clear too.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Have various ARM cores delegate to arm_arch_state() to display
basic information, instead of duplicating that logic.
This shrinks the code, makes them all report when semihosting
is active, and highlights which data are specific to this core.
(Like ARM720 not having separate instruction and data caches.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add a brief "setup with no customization" note showing the
how easily things can work if standard OpenOCD config scripts
already exist. We've had some new users comment that this
information is needlessly hard to find, so that starting to
use OpenOCD is more difficult than it should be.
Plus describe a few other issues that come up when setting
up an OpenOCD server.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Move most declarations in <target/armv4_5.h> to <target/arm.h>
and update users.
What's left in the older file is stuff that I think should be
removed ... the old register cache access stuff, which makes it
awkward to support microcontroller profile (Cortex-M) cores.
The armv4_5_run_algorithm() declaration was moved too, even
though it's not yet as generic as it probably ought to be.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Rename some (mostly) generic ARM functions:
armv4_5_arch_state() --> arm_arch_state()
armv4_5_get_gdb_reg_list() --> arm_get_gdb_reg_list()
armv4_5_init_arch_info() --> arm_init_arch_info()
Cores using the microcontroller profile may want a different
arch_state() routine though.
(Also fix strange indentation in arm_arch_state: use tabs only!
And update a call to it, removing assignment-in-conditional.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Move the ARM opcode macros from <target/armv4_5.h>, and a few
Thumb2 ones from <target/armv7m.h>, to more appropriate homes
in a new <target/arm_opcodes.h> file.
Removed duplicate opcodes from that v7m/Thumb2 set. Protected
a few macro argument references by adding missing parentheses.
Tightening up some of the line lengths turned up a curious artifact:
the macros for the Thumb opcodes are all 32 bits wide, not 16 bits.
There's currently no explanation for why it's done that way...
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Get rid of mrc_opcode() in favor of ARMV4_5_MRC() or, where
arm*20t should have used it, ARMV4_5_MCR() instead.
Basically, *writing* coprocessor registers shouldn't have
used the *read* opcode ... and both should stick to standard
opcode constructors, not rearranging parameter sequence any
more than already needed.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The SRS and RFE instructions speed exception entry/exit by
making it easy to save and restore PC and SPSR. This handles
both ARM and Thumb2 encodings.
Fix minor PLD goofage; that "should never reach this point"
can't happen, so remove it.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The low two bits are defined as should-be-zero-or-presereved.
We'll take the zero option, it's easier to enforce.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Behave like OMAP3530: force global software reset. Given the
patch to teach ARM11 how to use these events, and use VCR to
catch the reset vector, this works better than either the
current reset logic or than using SRST.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Rename the existing 'flash banks' implementation as 'flash list', and
replace the broken 'flash_banks' TCL wrapper with a new command handler.
Adds documentation for the new 'flash list' command in the user guide.
The 'flash banks' command produces a list that needs to be formatted
properly for GDB's 'mem info' to work properly. The flash_banks TCL
wrapper provided this formatting, but wrappers no longer work for
second-level commands as they did in the past. With this patch,
the 'flash_banks' command can be used with the new command syntax
and display the required information.
Fall back to software breakpoint when vector catch isn't available.
Possible enhancements:
- add extra optional command parameter to select high vectors
- add extra optional command parameter to select hardware breakpoint
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Rename nand.h as flash/nand/core.h, chase consumers. The public APIs
need to be sorted out with imp.h, but this allows other changes to
begin improving the separation between policy and mechanism.
Moves #include <target/target.h> and #include "driver.h" into the
internal headers or source files, removing it from <flash/nand/core.h>.
Moves commands into nand/tcl.c and core implementation to 'nand/core.c'
and 'nand/fileio.c'. Eliminates 'flash/nand.c'.
Adds 'nand/imp.h' to share routines between TCL commands and core.
This work parallels the NOR directory, encapsulating the NAND drivers
into a separate file. This takes an extra step by encapsulating the
type of data structure used to manage the drivers, allowing it to be
changed from an array to a dynamic list in the future.
Remove an undesirable use of the CPSR symbol ... it needs to vanish.
Flag mode-to-number stuff as obsolete; say why ... should also vanish.
Get rid of no-longer-used mode and state typedefs.
Comment a few of the implicit ties to "classic ARM".
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
As with Cortex-A8, the WFAR register holds useful information
that should be recorded and, where relevant, displayed.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Tweak scanchain 7 debug messaging:
- show register addresses in decimal, matching ARM docs;
- remove some pointless noise
Avoid some needless roundtrips:
- skip SCAN_N when SCREG already holds that number (speeds up
polling and other common operations)
- avoid zeroing vcr twice on resume
Show the IR opcode as a label ("RESTART") too; and in decimal,
matching ARM docs.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Move the bulk of the flash.h file into flash/nor/core.h, leaving an
empty husk that will be removed in the next patch.
The NOR driver structure is an implementation detail, so move it into
its own private header file <flash/nor/driver.h> along with helper
declaration for finding them by name.
Splits the exec mode commands out of flash.c into the flash/nor/ files.
The routines used by these high-level commands are moved into nor/core.c,
with their internal declarations placed in nor/imp.h.
Fixes distribution of <flash/nor/core.h> header.
Clean up arm_semihosting() entry a bit, comment some issues and just
which SVC opcodes are getting intercepted. Microcontroller profile
cores will need a new entry, since they use BKPT instead (and don't
have either SVC mode or an SPSR register).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Store a flag and errno in in "struct arm".
Have "poll" output report when semihosting is active.
Shrink some of the affected lines.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
List it in the concept index, in the section about target software
changes a project might want to consider, and in the section about
debug messaging.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The newly moved flash TCL routines access the internals of the module
too much. Fix the layering issues by adding new core NOR flash APIs:
<flash/nor/core.h>:
- flash_driver_find_by_name() - self-descriptive
<flash/nor/imp.h>:
- flash_bank_add() - encapsulates adding banks to bank list
- flash_bank_list() - encapsulates retreiving bank list
This allows the externs in flash/nor/imp.h to be removed, and
these mechanisms may now be re-used by other flash module code.
Moves the top-level 'flash' command handlers into flash/nor/tcl.c,
with flash/nor/imp.h providing an internal implementation header
to share non-public API components.
After previous efforts, only one Jim routine remained in jtag/core.c,
and moving it to jtag/tcl.c painlessly finishes separating these layers.
The headers need separating, but the implementation is clean.
When calling module_register_commands, the return value needs to be
checked for failures. Instead of duplicating code, use an array of
function pointers to the identical registration functions to iterate
over during startup.
Semihosting enables code running on an ARM target to use the
I/O facilities on the host computer. The target application must
be linked against a library that forwards operation requests by
using the SVC instruction that is trapped at the Supervisor Call
vector by the debugger. The "hosted" library version provided
with CodeSourcery's Sourcery G++ Lite for ARM EABI is one example.
This is currently available for ARM9 processors, but any ARM
variant should be able to support this with little additional work.
Tested using binaries compiled with Sourcery G++ Lite 2009q1-161
and ARM RVCT 3.0.
[dbrownell@users.sourceforge.net: doc tweaks, NEWS]
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Updates the ARM NAND I/O code to look at and update the op
field of arm_nand_data to reflect the last operation performed.
It uses this field to copy the correct code to the target in the
case where the struct is used for reads and writes.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Modify the arm_nand_data struct to better support both read and
write operations while using the same struct. An additional
field was added, and initialized, to record the last operation
so that the correct code can be loaded to the working area.
[dbrownell@users.sourceforge.net: merge init patch, tweak GPL note]
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Created a new function that handles sending a command and the address
information for pages to a NAND device.
[dbrownell@users.sourceforge.net: tweaked line lengths, name 'oob_only']
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Punt to the armv4_5_arch_state() for all the common stuff, to
shrink code and so we will get any improvements it provides.
Don't hide watchpoint status if we happen to be in "abort" mode.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
No point in both ARM11 and Cortex-A8 having private copies
of the logic sorting out e.g. DBG_REASON_WATCHPOINT.
Add and use a shared routine for this ... there's actually
a bunch more debug entry logic that could be shared, this
is just a start on that. Note that this routine fixes a
bug observed in the ARM11 code, where some abort mode quirks
were displayed as being an unknown debug reason; and also
silences needless ARM11 chatter.
Likewise with private copies of DSCR ... add one to the DPM
struct. Save it as part of setting DBG_REASON_* so later
patches can switch over to using that copy.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
For the bits now defined in "arm_dpm.h", switch to the
shared DSCR_* symbol and remove the ARM11_DSCR_* version.
Define DSCR_INT_DIS and use it instead of the ARM11_DSCR_*
sibling symbol. (Note: for both ARM11 and Cortex-A8, this
should arguably be enabled by default when single stepping.)
Remove some other unused declarations in "arm11.h".
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Move the symbols for these bits from "armv7a.h" to "arm_dpm.h",
where they can be seen and used not just by Cortex-A but also
by the ARM11 (armv6) code.
Change them from bit numbers to bit masks ... this matches the
usage in ARM11 code, and also makes it easier to read.
Rename DSCR_EXT_INT_EN as DSCR_ITR_EN to match the docs; it's
enabling ITR functionality, not external interrupts, so this
changes the name to be less misleading. (There *IS* a bit
affecting interrupts, and this isn't it.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This makes Beagle work again, instead of losing horribly because
the JTAG event handlers are no longer able to e.g. "runtest". I
get the previous quirky behavior ... comes up OK but "reset halt"
somewhat mysteriously makes it all better. (Instead of nothing
being able to work at all...) However, I'm still seeing:
The 'init' command must be used before 'init'.
That seems to come from invoking "jtag init", sometime after it
gets mapped to "ocd_jtag init", according to debug message traces.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
To prevent regression in the behavior of 'init', we allow it to run in
any mode. If provided with -c init and with -c noinit, then the second
init at startup caused a spurious mode failure. Let 'init' handle it.
Use a separate variable for iterating GDB service port numbers than
the one set by the user. Restores the behavior of returning the
original port number and only incrementing the port used on success.
now compiles again after include files were moved about
to reduce -I usage and stop using quotes but rather
angle brackets for include files.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Before we can -I the top-level src/ directory alone, references to
"hello.h" must be updated. This is an internal header, so it does
not need angle brackets.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "xsvf.h"
the following form should be used.
#include <xsvf/xsvf.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "svf.h"
the following form should be used.
#include <svf/svf.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "pld.h"
the following form should be used.
#include <pld/pld.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "telnet_server.h"
the following form should be used.
#include <server/telnet_server.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "server.h"
the following form should be used.
#include <server/server.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "httpd.h"
the following form should be used.
#include <server/httpd.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "gdb_server.h"
the following form should be used.
#include <server/gdb_server.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "s3c24xx_regs.h"
the following form should be used.
#include <flash/nand/s3c24xx_regs.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "ocl.h"
the following form should be used.
#include <flash/nor/ocl.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "nand.h"
the following form should be used.
#include <flash/nand.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "mflash.h"
the following form should be used.
#include <flash/mflash.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "flash.h"
the following form should be used.
#include <flash/flash.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "arm_nandio.h"
the following form should be used.
#include <flash/arm_nandio.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "trace.h"
the following form should be used.
#include <target/trace.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "target_request.h"
the following form should be used.
#include <target/target_request.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "target.h"
the following form should be used.
#include <target/target.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "register.h"
the following form should be used.
#include <target/register.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "mips_ejtag.h"
the following form should be used.
#include <target/mips_ejtag.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "mips32_pracc.h"
the following form should be used.
#include <target/mips32_pracc.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "mips32.h"
the following form should be used.
#include <target/mips32.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "image.h"
the following form should be used.
#include <target/image.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "etm.h"
the following form should be used.
#include <target/etm.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "embeddedice.h"
the following form should be used.
#include <target/embeddedice.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "breakpoints.h"
the following form should be used.
#include <target/breakpoints.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "avrt.h"
the following form should be used.
#include <target/avrt.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "armv7m.h"
the following form should be used.
#include <target/armv7m.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "armv7a.h"
the following form should be used.
#include <target/armv7a.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "armv4_5_mmu.h"
the following form should be used.
#include <target/armv4_5_mmu.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "armv4_5_cache.h"
the following form should be used.
#include <target/armv4_5_cache.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "armv4_5.h"
the following form should be used.
#include <target/armv4_5.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "arm_jtag.h"
the following form should be used.
#include <target/arm_jtag.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "arm_dpm.h"
the following form should be used.
#include <target/arm_dpm.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "arm_adi_v5.h"
the following form should be used.
#include <target/arm_adi_v5.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "arm9tdmi.h"
the following form should be used.
#include <target/arm9tdmi.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "arm966e.h"
the following form should be used.
#include <target/arm966e.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "arm7tdmi.h"
the following form should be used.
#include <target/arm7tdmi.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "arm7_9_common.h"
the following form should be used.
#include <target/arm7_9_common.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "arm11.h"
the following form should be used.
#include <target/arm11.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "algorithm.h"
the following form should be used.
#include <target/algorithm.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "minidriver.h"
the following form should be used.
#include <jtag/minidriver.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "jtag.h"
the following form should be used.
#include <jtag/jtag.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "interface.h"
the following form should be used.
#include <jtag/interface.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "commands.h"
the following form should be used.
#include <jtag/commands.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "types.h"
the following form should be used.
#include <helper/types.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "time_support.h"
the following form should be used.
#include <helper/time_support.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "replacements.h"
the following form should be used.
#include <helper/replacements.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "membuf.h"
the following form should be used.
#include <helper/membuf.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "log.h"
the following form should be used.
#include <helper/log.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "jim.h"
the following form should be used.
#include <helper/jim.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "ioutil.h"
the following form should be used.
#include <helper/ioutil.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "fileio.h"
the following form should be used.
#include <helper/fileio.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "configuration.h"
the following form should be used.
#include <helper/configuration.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "command.h"
the following form should be used.
#include <helper/command.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "binarybuffer.h"
the following form should be used.
#include <helper/binarybuffer.h>
The exception is from .c files in the same directory.
Includes the src directory in the search path, so header files may be
migrated from:
#include "foo.h"
to
#include <module/foo.h>
which is more conducive for installation.
Moves JTAG interface drivers to src/jtag/drivers/,
Adds src/jtag/drivers/Makefile.am.
Builds libocdjtagdrivers.la.
Flattens the rlink driver files into the drivers/ directory, adding
the 'rlink_' prefix or '.rlink' suffix as appropriate.
Remove the remaining extra copy of DSCR, and the register cache
of which it was a part. That cache wasn't a very safe, or even
necessary, idea; it was essentialy letting debugger-private state
be manipulated by Tcl code that couldn't know how to do it right.
This makes the "reg" output of an ARM11 resemble what most other
ARM cores produce ... forward motion in the "make ARM11 work like
the rest of the ARM cores" Jihad!
Just store a clean copy of DSCR in the per-CPU struct, so we
trivially pass a pointer to a recent copy. This replaces the
previous "last_dscr" and cleans up most of the related calling
conventions ... but it doesn't remove the other DSCR copy.
Don't expose the WDTR register through the register cache any
more. If anyone wants Tcl scripts to be able to use DCC based
communication with app code in the target, this wouldn't do it.
Bugfix: don't trust the Tcl-accessible version of DSCR to
flag whether WDTR needs to be restored when resuming.
Don't expose the RDTR register through the register cache any
more. If anyone wants Tcl scripts to be able to use DCC based
communication with app code in the target, this wouldn't do it.
Bugfix: don't trust the Tcl-accessible version of DSCR to
flag whether RDTR needs to be restored when resuming.
Streamline arm11_on_enter_debug_state() entry:
- It should handle the standard updates:
* target->debug_reason
* target->state
- Don't waste time re-reading DSCR; just pass it in
Also rename the routine to "arm11_debug_entry()", matching the
convention used elsewhere in OpenOCD.
The new stubs for httpd and ioutil gave errors like:
ioutil_stubs.c: In function ‘ioutil_init’:
ioutil_stubs.c:27: error: implicit declaration of function ‘LOG_DEBUG’
ioutil_stubs.c:28: error: ‘ERROR_OK’ undeclared (first use in this function)
ioutil_stubs.c:28: error: (Each undeclared identifier is reported only once
ioutil_stubs.c:28: error: for each function it appears in.)
Fix.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add httpd_stubs.c to provide no-op implementations of httpd_start()
and httpd_stop().
Allows these routines to be called unconditionally and ensures the
libocdserver ABI remains unchanged regardless of whether this feature
was built-in or not.
Prints a DEBUG message when the stub implementation is included.
Add ioutil_stubs.c to provide an empty ioutil_init() routine.
Add ioutil.h to prevent applications from needing to declare it.
Allows unconditionally calling that function during startup, and the
resulting libocdhelper library API is now more stable.
Prints a DEBUG message when the stub implementation is included.
Save and display the address of the instruction which triggered the
watchpoint. Because of pipelining, that's well behind the PC value
when debug entry completes. (Example in a subroutine that had been
returned from...)
Remove unused A8 stuff, mostly watchpoint hooks from the header.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Except for USR/SYS mode, the labels for the shadowed SP and LR
registers were reversed. LR is r14; SP is r13. Fix.
This would not affect GDB users; GDB references are positional.
Only folk working directly with OpenOCD register values would
have noticed this bug.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Actually this should handle both breakpoints and watchpoints ... but
the DPM framework only handles watchpoints for now. Works on Beagle.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This is a NOP unless the underlying core exposes two new methods, and
neither of the two cores using this (ARM11xx, Cortex-A8) do so yet.
This patch only updates those cores so they pass a flag saying whether
or not to update breakpoint and watchpoint status before resuming; and
removing some now-needless anti-segfault code from ARM11. Cortex-A8
didn't have that code ... yes, it segfaulted when setting watchpoints.
NOTE: this uses a slightly different strategy for setting/clearing
breakpoints than the ARM7/ARM9/etc code uses. It leaves them alone
unless it's *got* to change something, to speed halt/resume cycles
(including single stepping).
ALSO NOTE: this under-delivers for Cortex-A8, where regions with size
up to 2 GBytes can be watched ... it handles watchpoints which ARM11 can
also handle (size 1/2/4 bytes). Should get fixed later.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
In embedded hosts, the Jim interpreter can come from the
existing context rather than be created by OpenOCD.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
We don't need this code, now that the DPM code handles it.
Neither do we need the ARMv7-A CP15 operations; remove their
remnants too. And disable a mostly-needless diagnostic.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Instead of having separate ARM11 and Cortex-A8 implementations of
this code, have one shared implementation which just builds on the
existing "run instruction via R0" support.
This enables followup patches to remove that now-unused code from
those two drivers. (Patches to move the "mrc" and "mcr" code into
"struct arm" are due too ... MIPS and other cores do not support
those ARM-specific concepts.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Switch "mrc" and "mcr" commands to be toplevel ARM operations,
as they should initially have been.
Correct the usage message for both commands: it matches ARM
documentation (as one wants!) instead of reordering them to
match the funky mrc() and mcr() method usage (sigh).
For Cortex-A8: restore a line that got accidentally dropped,
so the secure monitor mode shadow registers will show again.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The ARMv7-A code uses read_cp15() to access fault registers.
Instead, use DPM operations directly, passing in the relevant
MRC instructions.
This eliminates per-operation overhead (though it'll be hard
to observe, this is uncommon) and helps eliminate read_cp15().
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
There were two chunks of Cortex-A8 code which called the
ARMv7-A CP15 operations; get rid of them, helping prepare
to remove those methods completely:
- post_debug_entry() can use the mrc() method to read
its two registers.
- write_memory() can use dpm->instr_write_data_r0() to
flush the ICache and DCache ... doing it this way is
actually faster since it reduces per-write overhead.
Note that the mrc() method parameters are re-ordered with
respect to the ARM instruction documentation, so that part
can be confusing.
Cleaned up the layout and comments in those areas a bit.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
There is no particular reason to invoke jtag_interface_quit()
on the atexit() handler, it just makes the code more obtuse
and stops other legitimate usage of atexit().
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Ensures that the correct information gets displayed, depending on the
mode of the command being denied. Fixes misreporting all commands as
needing to run "before 'init'".
Clean up two aspects to this routine: bad naming, since it
doesn't restore the context, just the banked registers; and
excess indentation for the bulk of the code.
Also make some of its call sites stash the function's return
code; someday they should use it for error checking.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This "loop over all registers" routine shared the same mess as
full_context() in terms of dozens of needless number_to_mode()
calls. Fix that, and comments, with related cleanup.
The misnamed xscale_restore_context() had a related bug. It
was restoring the *WRONG REGISTERS* ... always from whatever
the current mode was, instead of using the copy from whichever
register bank it was trying to restore. (But it marked the
intended register as having been restored...) Fixed that.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Finish removing references to the 'interp' global variable from the
command module, encapsulating all reference via command_context.
Eliminates use of the global entirely, so it can be removed. Hurrah!
Adds a log_capture_state structure to pass to the log capture
callback used by the command module. Ensures that the capture occurs
in the proper context.
The 'help' text will become more verbose, so its entire text will be
far more than desired when you only borked your syntax. The usage
still allows the commands to be looked up for more help.
command_done() does not need to return an error, but it needed
Doxygen comment. Provide some for copy_command_context as well.
Note: this audit revealed some potential bugs with the command context
implementation. There was a reason that commands were added at the
end of the list. Shallow copying of command_context means that
the list is shared between them. And commands added at the top-level
before the pre-existing commands will not be available in the shared
context as they were before. Yikes!
Fortunately, this does not seem to occur in general use, as
'add_help_text' gets registered in startup.tcl and claims the first slot
in my own test cases. Thus, it seems that we have been masking the issue
for now, but it shows the need for further architectural improvement in
the core command module.
With the ability to defer 'init', users can access the help system while
still in CONFIG mode. This patch omits commands from the help and usage
list when they cannot be run in the current command mode, making it much
easier to see what can be done at a given time.
Adds 'noinit' command to prevent OpenOCD from running 'init' at the end
up startup, allowing it to be given from telnet or TCL. This provides
the old behavior by default, and users can add this command to their
scripts to get the new behavior.
Moves the telnet and TCL server startup to server_init(), moving their
respective command registration in to server_register_commands().
Adds proper error checking for these particular startup processes.
Moves the core server startup to openocd_main(), improving related error
checking and preparing to defer 'init'.
Rework gdb_init to create flexible APIs (gdb_target_add_{one,all}) and
static helper (gdb_target_start) for starting GDB services. Eliminates
duplicated code and provides general mechanisms for adding GDB services.
The 'init' command is updated to call the new API, and later patches can
decouple its policy of adding all targets therein.
Provides the new capability to use both piped and TCP servers when
multiple targets are defined. The first target fills the pipe, and
others will be started on TCP ports (unless disabled, i.e. gdb_port=0).
Add missing COMMAND_REGISTRATION_DONE.
For now the command syntax for zy1000 needs to be compatible
across 0.3/0.4, the world outside OpenOCD interfaces to
zy1000 using the old syntax. Post 0.4 release(0.4.1 even)
I'll switch to subcommand scheme.
Switch to subcommands post 0.3 lifecycle.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Streamline the loop by continuing as soon as we know there's no
work to be done; this lets us un-indent almost everything.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
When fetching all the registers, XScale was doing various stupid
things like calling number_to_mode() a few dozen times instead of
just once, and mapping access to each register three times (again,
instead of just once). Stop that.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use the new mapping interfaces in the debug entry path.
SPSR and the banked registers now have smaller and faster
accessors ... use them.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Code other than main() may invoke "init". When it does so,
customized handlers may need to run ... so make sure the
command context state is updated before they do so.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Those commands presume support for the "classic" set of CPU
modes (FIQ, supervisor, IRQ, etc) ... which aren't supported
by the ARMv7-M or ARMv6-M architectures. They also presume
a "struct arm" base type, which this code doesn't use.
We haven't cleaned up the register handling enough to be able
to share any of those "base" methods.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Eliminate the monolithic tcl_target_func by registering each of its
commands using the new chained command registration mechanism.
Also chains the target's commands under the CPU command, though these
may not work properly without some further modification.
The 'target' command group was implemented using its own command
dispatching, which can be eliminated by using the new chained command
registration mechanism. This patch splits the jim_target() function
into individual handlers, which makes them to be visible to the help and
usage commands. These one-trick handlers are much easier to understand.
Splits bulk of the jtag_tap_configure into jtag_tap_configure_event,
removing three or four levels of indentation in the process.
The resulting code was stylistically improved in other ways, but it
should be functionally identical.
Moves the tertiary jim handlers and required static helpers to the top
of tcl.c, defining them in a new registration array that is chained in
both the top-level context and under the jtag command. The top-level
commands can be removed at some point in the future to reduce clutter.
Explodes the 'jtag' into separate command handlers, which are easier
to understand and extend. Makes the code much easier to understand,
though further simplifications are possible. This patch tries to
minimize the noise when viewed with 'git diff -w'.
Gives these commands improved built-in help and usage information.
Two 'rm' commands were implemented and registered. This removes the
version that would have never been called prior to refactoring the
command registration.
Adds checks for memory allocation failures. Started to use calloc()
instead of malloc()/memset(), but I got carried away. This kind of work
should be done throughout the tree, but it's almost hopeless at present.
Splits the check for a command's ability to run into a helper.
This also fixes a bug whereby commands that specified COMMAND_EXEC
were allowed to run during the configuration stage. This allowed
problematic commands to be called before 'init', defeating the intention
of specifying that command mode. With this change, the run_command()
helper denies access to handlers that should run only after 'init'
during the configuration stage.
Presently, commands registration taks a static handler data pointer.
This patch adds support for commands that require a dynamic pointer,
such as those registered in a dynamic context (e.g. subcommands for a
user-created 'foo.cpu' command). The command_set_handler_data will
update a command (group) to use a new context pointer, while the
CMD_DATA macro allows command handlers to access the value.
Jim handlers should find this value in interp->cmdPrivData.
Updates command registration to provide top-level handlers for all
commands, rather than falling back onto the 'unknown' command. Instead,
that same handler is registered for placeholders, providing the same
functionality under the root verb command name instead. This permits
users to implement their own 'unknown' function, and it resolves some
mind-bending breakage related to function object lookup while recursing.
Changes 'ocd_bounce' to call 'ocd_command' and 'ocd_help' from the
wrapper directly, rather than bouncing through their wrappers. This
prevents endless recursion caused by the above changes, whereby the
'command' wrapper's type check would blow the stack to hell and gone.
Adds 'ocd_bouncer' in startup.tcl that is called as a helper for
all command handlers, shrinking the embedded C wrapper to a mere stub.
Jim handlers are called directly, simple handlers get called with the
wrapper to capture and discard their output on error, and placeholders
call help directly (though the unknown handler still does this too).
It attempts to improve the quality of the error messages as well.
Adds the 'command' group handler, with the 'type' command producing
a string that tells whether the given command is 'native' (for Jim-based
command handlers), 'simple' (for simple built-in commands), 'group'
for command group placeholders, and 'unknown' if not found in the
command registration tables (e.g. core built-ins functions).
There is no DEBUG() macro; don't call one! Always at
least *parse* debug code, to help prevent such errors.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
In target_type.h it's documented that the target must be
halted for add_breakpoint() ... and with slight ambiguity,
also for its add_watchpoint() sibling. So rather than
verifying that constraint in the CPU drivers, do it in the
target_add_{break,watch}point() routines.
Add minor paranoia on the remove_*point() paths too: save
the return value, and print it out in in the LOG_DEBUG message
in case it's nonzero.
Note that with some current cores, like all ARMv7 ones I've
looked at, there's no technical issue preventing watchpoint or
breakpoint add/remove operations on active cores. This model
seems deeply wired into OpenOCD though.
ALSO: the ARM targets were fairly "good" about enforcing that
constraint themselves. The MIPS ones were relied on other code
to catch such stuff, but it's not clear such code existed ...
keep an eye out for new issues on MIPS.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use the new "reset-assert" event; else SRST; else fail.
Tested on an OMAP3, using the event.
NOTE: still doesn't handle "reset halt". For some reason
neither VCR nor PRCR seemed effective; they held the value
that was written, but VCR didn't trigger debug entry when
the reset vector fired (maybe the vector needs configuring?)
and PRCR refused to hold the chip in reset until deassert()
could force the core into debug state.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This defines a "reset-assert" event and a supporting utility
routine, and documents both how targets should implement it
and how config scripts should use it. Core-specific updates
are needed to make this work.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
When writing to a chip's "reset yourself" register, the ARM11 code
was reporting a spurious failure. Just don't bother checking for
correctly incremented pointers given single-unit writes ... it's
a bit faster that way too. (Reads should likely do the same thing.
For that matter, such checks are usually just a waste...)
Shrink an overlong parameter name, and associated lines'o'code.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The command refactoring caused subcommand handlers to produce duplicate
output when run. The problem was introduced by failing to ensure all
such invocations went through a top-level "catcher" script, prefixing
the command name with the 'ocd_' prefix and consuming its results.
The fix is to ensure such a top-level "catcher" script gets created
for each top-level command, regardless of whether it has a handler.
Indeed, this patch removes all command registrations for sub-commands,
which would not have worked in the new registration scheme anyway.
For now, dispatch of subcommands continues to be handled by the new
'unknown' command handler, which gets fixed here to strip the 'ocd_'
prefix if searching for the top-level command name fails initially.
Some Jim commands may be registered with this prefix, and that situation
seems to require the current fallback approach. Otherwise, that prefix
could be stripped unconditionally and the logic made a little simpler.
The same problem must be handled by the 'help' command handler too,
so its lookup process works as intended.
Overall, the command dispatching remains more complicated than desired,
but this patch fixes the immediate regressions.
Move device argument parsing after check for number of arguments;
otherwise, calling this command without any arguments would access
argv[0] before checking whether it even existed.
Fixed the header file to properly specify the doxygen documentation for the
items defined in it.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This updates the functions in the file to all have doxygen comments
describing what they do.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Created a function for copying code to the working area on
a target. The NAND write and read functions are updated to
include use of this function.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Implementation of the NAND read function for ARM NAND I/O that
includes running a local algorithm on a device to increase the
performance of block reads.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Just make these fail, instead of letting them write over
potentially random memory. Users should be able to work
around the lack of real implementations by disbling the
MMU by hand ... until someone provides a Real Fix.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Command upgrading introduced two off-by-one bugs in the flash commands.
This patch fixes the 'flash {protect,erase_sector}' commands to check
that they have been passed the correct number of arguments.
Ammended during commit to fix help text for 'erase_address' too.
Several of the sites now using target_type_name() really
ought to be using an instance-specific name. Create a
function called target_name(), accessing the instance's
own (command) name.
Use it in several places that really should be displaying
instance-specific names. Also in several places which
were already doing so, but which had no wrapper to call.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
There are two names that may matter on a per-target basis.
One is a per-instance name (for example, "at91sam7s.cpu").
The other is the name of its type (for example, "arm7tdmi"),
which is shared among multiple targets.
Currently target_get_name() returns the type name, which is
misleading and is rarely appropriate for target diagnostics.
Rename that as target_type_name().
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Removes redundant assignment of start_ms from log_register_commands().
Eliminates command_context parameter and return value.
Adds Doxygen comment block for this API call.
Alliteration aside, this should provide the final piece of the puzzle
for developers that want to get started writing a new target type.
In this way, it also seeks to complement the 'dummy' interface driver
and 'faux' NOR flash driver.
Removes hello and foo commands from top-level registration. Instead,
the dummy interface driver and faux flash driver have been augmented
to register these commands as sub-commands.
Factors log capture while running script commands, eliminating
duplicated code between script_command and jim_capture. Factors
setting a command's Jim "retval" into a new helper as well.
Using these new helpers in the new unknown command handler's
fixes possible regressions caused by these bits being missing.
The add_usage_text command uses the same C handler, which was updated
to support its new polymorphic role. This patch updates the two script
commands that needed this support: 'find' and 'script'.
Updates httpd_start() to use register_commands() for 'readform' and
'writeform' commands. Adds server/httpd.h to export the new signatures
for this function (and httpd_stop), which allows removing the obsoleted
declarations inside openocd.c.
Adding jim_handler field to command_registration allows removing the
register_jim helper. All command registrations now go through the
register_command{,s}() functions.
Converts callback to an array of command_registration records.
Moves oocd_trace driver definition to end of file to eliminate
useless forward declaration.
Uses chaining of command_registration structures to eliminate all
target_type register_callback routines. Exports the command_handler
registration arrays for those target types that are used by others.
Changes the jtag_interface->register_callbacks field to a list of
commands to be registered. Changes callback to invocation of
register_commands() with that command registration list. Removes all
JTAG interface driver register_command callback functions, which the
previous commits had converted into identical calls.
Use register_commands() with command registration array.
---
This module was broken by previous changes, but no one has complained.
Are there still users for this modules?
Use the new command registration chaining capabilities to eliminate
the foo_register_commands helper, folding its remaining command
handler setup into the hello_command_handlers registration array.
Adds the ability to chain registration structures. Modules can define a
command with the 'chain' and 'num_chain' fields defined in their
registration table, and the register_commands() function will initialize
these commands. If the registration record creates a new command, then
the chained commands are created under it; otherwise, they are created
in the same context as the other commands (i.e. the parent argument).
Use register_commands() to register low-level command handlers,
adding a builtin_command_handlers declaration that is easy to understand.
Splits help and usage information into their appropriate fields.
Adds the usage command, to display usage information for commands.
The output for this command will remain erronenously empty until
commands are updated to use these new coventions.
The register_commands API takes multiple commands in one call, allowing
modules to declare and pass a much simpler (and more explicit) array of
command_registration records.
Add a structure to encapsulate command registration information, rather
than passing them all as parameters. Enables further API changes that
require additional required or optional parameters.
Updates the register_command API and COMMAND_REGISTER macro to use it,
along with their documentation.
Provides a migration path for the widely used register_command API,
which needs to be updated to provide new functionality.
This macro allows the API to change without having to update all of its
callers at the same time.
There was a lot of needless handshaking overhead in the current
Cortex-A8 DCC/ITR operations, since the status read by each step
was discarded rather than letting the next step know it.
This shrinks the handshaking by: (a) passing status along from
previous steps, avoiding re-fetching; which enables the big win
(b) relying on a useful invariant: that the DSCR_INSTR_COMP bit
is set after every call to a DPM method.
A "reg sp_usr" call previously took 17 flushes; now it takes just 9.
This visibly speeds common operations like entry to debug state and
stepping, as well as "arm reg" and so on.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This replaces two versions of register access functions. One
was commented out, and seemed to have uncertain intent. The
other was fairly new, and helped motivate the DPM framework
once I observed that the ARM11 was doing the very same ops.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This implements the DPM interface for Cortex-A8 cores. It
also adds a synchronization operation to the DPM framework,
which is needed by the Cortex-A8 after CPSR writes.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make various functions static, add some comments, report
vector catch as a flavor of DBG_REASON_BREAKPOINT, get
rid of needless/undesirable ARMV4_5_CORE_REG_MODE, etc.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The previous implementation was unnecessarily complex. Get rid of the loops,
let vsnprintf() tell us directly how much storage we need and allocate that. A
second pass writes the actual string. Also add a va_end() that was missing.
This should be much faster for large strings and less wasteful for small ones.
A quirk that has been retained is that some callers patch in a newline at the
end of the returned string and depend on alloc_vprintf to allocate at least
one byte extra.
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Signed-off-by: Zachary T Welch <zw@superlucidity.net>
Rewrite rlink_init routine to use jtag_usb_open helper. Eliminates
some spurious calls to exit().
Wraps a tremendously long line of comment to fit 80 columns too.
Begins to consolidate code used by several USB JTAG interfaces.
This first patch provides the required build system changes and
a common jtag_usb_open routine, which will replace the guts for
probing the busses and devices for possible VID/PID matches.
The following patches convert each driver to use it.
This finishes the basic switchover to the new register code,
for everything except the debug registers. (And maybe we
shouldn't have a cache for *those* which works this way...)
The context save/restore code now uses the new code, but
it's in a slightly different sequence. That should be fine
since the R0/PC/CPSR stuff is all that really matters (and
if we can update those, we can update the rest).
Now there's no longer a way any code can be confused about
which copy of "r1" (etc) to use.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
As with single stepping, the previous stuff was needed because
the ARM11 code wasn't using the standard ARM base type and
register access ... but now those mechanisms work, so we can
switch out that special-purpose glue, in favor of the more
thoroughly tested/capable "standard" code.
Fixes a bug in the resume() implementation: it wasn't handling
two of its arguments correctly, preventing the "flash erase_check"
algorithm from working. (This code needs a *subsequent* update
for correct register handling, though... removing the confusion
about which "r2", for example, to use.)
This should resolve some "FIXME" comments too, for Thumb and
processor mode support. It also gets rid of a nasty exit()
call; servers should only have *clean* shutdown paths.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The previous stuff was needed because the ARM11 code wasn't using
the standard ARM base type and register access ... but now those
mechanisms work, so we can switch out that special-purpose glue.
This should resolve all the "FIXME -- handle Thumb single stepping"
comments too, and properly handle the processor's mode. (Modulo
the issue that this code doesn't yet handle two-byte breakpoints.)
Clarify the comments about the the hardware single stepping. When
we eventually share breakpoint code with Cortex-A8, we can just make
that be the default on cores which support it. We may still want an
override command, not just to facilitate testing but to cope with
"instruction address mismatch" not quite being true single-step.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This provides "standard" ARM register support -- with twenty or
more shadow registers on top of what this code now handles, but
properly associated with the various core modes -- parallel to
the current register code. That is, the current code is stilil
managing the "current" registers; the new code shadows them.
You can see all the registers with "arm reg", modify the shadows
like "r8_fiq" or "sp_abt" with "reg", and see them get properly
written back when you step. (Just don't do that with any of the
registers managed by the "old" code ...)
It also switches to using more standard code, relying on those
standard registers, in two places: (a) the poll status display,
which now shows core state (ARM/Thumb/...) and mode (Supervisor,
IRQ, etc); and (b) GDB register access.
So it's not a full migration, there are warts -- every place that
touches the old register cache is a potential bug -- but it's a
small more-or-less-comprehensible step that's even somewhat useful.
Later patches complete the migration.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This was a private mechanism to snapshot registers before leaving
debug state, and then on reentry to optionally display what changed.
It was coupled to the private register cache, which won't be sticking
around in that form for much longer. Remove (instead of teaching
it how to handle *all* the registers).
(The idea is interesting, but we ought to be able to implement
this in a generic way. Ideally through Tcl scripts that can
automatically be invoked following debug entry...)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This is a very thin layer over some of the current ARM11
debug TAP utilities. The layer isn't yet hooked up.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
First version of interface for sharing code between ARMv6 and ARMv7a
debug modules ... now the architecture includes debug support. (Not
the same as for the trimmed-down v7m or v6m though!) This is a first
version of an interface that will let the ARM11 and Cortex-A8 support
share code, features, and bugfixes. Based on existing code from both
of those cores.
The ARM v7-AR architecture specification calls this commonality the
"Debug Programmer's Model (DPM)", which seemed to be an appropriate
acronym -- a TLA even! -- for use in our code. Made it so. :)
The initial scope of this just supports register access, and is geared
towards supporting top level "struct arm" mechanisms. Later, things
like breakpoint and watchpoint support should be included.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add $HOME/.openocd as the first default script search directory, allowing
the user to override the standard scripts.
Update the user guide with information on where OpenOCD expects to find
configuration files and scripts. Also fixed some minor formatting issues.
Add entry to NEWS as well.
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
For now there's no point in saving this stuff after examine()
checks it out as OK. Ditto exporting symbols that aren't
used outside of the module which defines them. In fact, those
two things needlessly complicate the code...
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make this code look more like the rest of the OpenOCD code.
- Use calloc() directly, not NEW() ... and fix some potential
memory leaks while we're at it.
- Remove FNC_INFO ... it's a NOP that just clutters things,
and it's trivial for developers to add tracing as needed.
- Replace FNC_INFO_NOTIMPLEMENTED with LOG_WARNING calls;
ditto. And stop having those call sites wrongly succeed!
- Waste less space with the CHECK_RETVAL() macro.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This will allow data to be allocated in read only
memory instead of on the stack. Speeds things up
and reduces stack usage.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
buf_set_u32() operated on an uninitialized stack
variable with non-byte boundaries, which led to
warnings about reading uninitialized stack.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Start using the arm_reg_current() call. This shrinks and speeds
the affected code. It can also prevent some coredumps coming from
invalid CPSR values ... the ARMV4_5_CORE_REG_MODE() macro returns
bogus registers if e.g. "Secure Monitor" mode isn't supported by
the current CPU.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
We don't need to use size_t in these places; so it's easy
to be rid of the need for this #ifdef and its MS-derived
portability problems.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
With -O3 when inlining aggressively the total stack usage will
be the sum of many fn's, which can easily get out of hand.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Have arm_set_cpsr() handle the two core state flags, updating
the CPU state. This eliminates code in various debug_entry()
paths, and marginally improves handling of the J bit.
Catch and comment a few holes in the handling of the J bit on
ARM926ejs cores ... it's unlikely our users will care about
Jazelle mode, but we can at least warn of Impending Doom. If
anyone does use it, these breadcrumbs may help them to find
the right path through the code.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Define arm_reg_current() ... returning handle to a given register,
and encapsulating the current mode's register shadowing. It's got
one current use, for reporting the current register set to GDB.
This will let later patches clean up much ARMV4_5_CORE_REG_MODE()
nastiness, saving a bit of code.
Define and use arm_set_cpsr() ... initially it updates the cached
CPSR and sets up state used by arm_reg_current(), plus any SPSR
handle. (Later: can also set up for T and J bits.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Stash a pointer to the CPSR in the "struct arm", to help get rid
of the (common) references to its index in the register cache.
This removes almost all references to CPSR offsets outside of the
toplevel ARM code ... except a pair related to the current ARM11
"simulator" logic (which should be removable soonish).
This is a net minor code shrink of a few hundred bytes of object
code, and also makes the code more readable.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Minor cleanup of ARM11 register handling: remove disabled
register hooks. This should all be handled by shared code,
and this stuff is just clutter.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add this to ease debugging why the standard scripts aren't
found on the default script search path in some build/install
enviroments. Especially on Windows it's not straight forward
where openocd actually looks for the scripts.
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Implementations need to access the register struct they modify;
make it easier and less error-prone to identify the instance.
(This removes over 10% of the ARMV4_5_CORE_REG_MODE nastiness...)
Plus some minor fixes noted when making these updates: ARM7/ARM9
accessor methods should be static; don't leave CPSR wrongly marked
"dirty"; note significant XScale omissions in register handling;
and have armv4_5_build_reg_cache() record its result.
Rename "struct armv4_5_core_reg" as "struct arm_reg"; it's used
for more than those older architecture generations.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Remove two commands that were documented as "debug commands"
and where "you probably don't want to use this". We never
intended to support them, and at least one problem report
boiled down to using this when it shouldn't have been used.
Update the docs on the existing register commands to talk a
bit more about register access and cache behavior. (Those
debug commands existed largely to *bypass* the cache.) And
fix some minor doc goofs that snuck in with recent changes,
renaming "armv4_5" as "arm" and "arm9tdmi" as "arm9".
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Rewrite means for scripts to register help text for commands. These
cause the new commands to be stored in the command heirarchy, with
built-in commands; however, they will never be invoked there because
they do not receive a command handler. The same trick is used for
the Jim commands.
Remove the old helpers that were used to register commands.
For the startup.tcl code to use built-in commands, the context must be
associated with the interpreter temporarily. This will be required to
add help text.
Rewrites 'help' command in C, using new 'cmd_help' for display. Adds the
built-in 'help' COMMAND_HANDLER to provide better output than the
TCL-based script command (e.g. heirarchical listing of commands).
The help string is stored in the command structure, though it conitnues
to be pushed into the Jim environment. The current idiomatic usage
suggests the addition of a usage field as well, to provide two levels
of detail for users to consume (i.e. terse usage list, or verbose help).
Creates a helper function, cmd_help, which displays the help string
for a single command. Presently, it is called from the loop in help.
The routine has been extended to allow indentation of command groups,
so an improved help command can improve the display of information.
Refactors the command registration to use helpers to simplify the code.
The unregistration routines were made more flexible by allowing them
to operate on a single command, such that one can remove all of a
commands children in one step (perhaps before adding back a 'config'
subcommand that allows getting the others back). Eliminates a bit
of duplicated code and adds full API documentation for these routines.
The previous version never wrote dirty registers
for non-current CPU modes ... fix that.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
We *should* be able to read and write registers in any core mode,
instead of being stuck with whatever mode the core was when we
entered debug state. This patch makes them work.
Note that the current restore_context() only handles the current
mode; writing to other-mode registers is a NOP without a followup
patch fixing that. Also, that SPSR access needed some bugfixes;
it was confused with CPSR.
Secure monitor mode also seems dubious; there's probably more to
be done before that's sufficiently understood by the debugger.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Create a generic register_cache_invalidate(), and use it to
replace three all-but-identical core-specific routines:
- armv4_5_invalidate_core_regs()
- armv7m_invalidate_core_regs
- mips32_invalidate_core_regs() too.
Make cache->num_regs be unsigned, avoiding various errors.
Net code shrink and simplification.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Move bulk of for-loop to a new static command helper function.
Adds handle_nand_list_drivers command handler, registered as
'nand drivers'.
Improves command help text and error reporting.
Move variables to point of first use, reducing their scope.
Add driver_name temporary to help arguments be changed later.
Eliminates the useless 'found' variable, changing the code to terminate
the loop immediate and return its success.
After adding support for referencing banks by name, renames
the COMMAND_HELPERs appropriately:
flash_command_get_bank_by_num -> flash_command_get_bank
nand_command_get_device_by_num -> flash_command_get_device
Add get_flash_bank_by_name (and get_nand_device_by_name) helpers
to retrieves struct flash_bank * (struct nand_device *) given a
driver name and an (optional) driver-specific bank index.
These are used to extend flash_command_get_bank_by_num (and
nand_command_get_device_by_num) to allow all flash (nand) commands to
reference defined banks by name, not just by number.
To avoid some code duplication, add the flash/common.[ch] files to hold
functionality common to both types driver. The first two methods are
helpers for the above routines to find a bank specified by a "name" or
"name.index" string. get_flash_name_index() finds the '.index' portion,
while flash_driver_name_matches() performs the string portion matching.
Just pre-allocate memory for the cached register value.
Shrinks heap overhead; increases locality-of-reference.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Combine register names with other per-register data into a
single template structure. This saves space, and makes it
easier to change how registers get handled (by shrinking
the number of places that care about cache indices).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The examine() method has some conceptual breakage. Cope
with it by manually splitting out the run-once parts from
the after-each-reset parts ... this gets rid of memory
leaks and speeds up resets after the first one.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
We don't want an ARMv7-specific core state enumeration just to
add ThumbEE state. Update the generic stuff to handle that,
and replace the V7-specific bits with it.
For Cortex-A8: on debug entry, check both the T and J bits
instead of just the T bit. When the J bit is set, set the
right state and warn appropriately.
(And while we're at it, move the generic arm struct to the front
of the v7a structure, for somewhat better code generation.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The only way ARMv7-A modes differ from ARMv4/ARMv5 flavors
is that v7-A is allowed to include "Secure monitor" support.
That's now handled by our standard top-level ARM code ... so
phase out the stuff that's specific to ARMv7-A.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Removing the fast command eliminates the fast_and_dangerous global,
which was used only by arm7_9_common as an initializer. The command
is not called in the tree; instead, more explicit commands are used.
The jim_global_long function was not used anywhere in the tree.
Adds the foo/bar commands to provide more working examples of command
argument parsing, including the new handle_command_parse_bool helper.
Updates hello command help text to provide useful information.
This patch changes the behavior of all boolean parsing callers to
accept any one of "true/enable/on/yes/1" or "false/disable/off/no/0".
Since one particular pair will be most appropriate in any given
situation, the specific macros should continue to be used in
order to display the most informative error messages possible.
Rewrite arm11_handle_bool to provide a generic on/off command helper.
Refactors COMMAND_PARSE_BOOL to use new command_parse_bool helper,
which gets reused by the new command_parse_bool_any helper.
This later helper is called by the new command helper function to
accepts any on/off, enable/disable, true/false, yes/no, or 0/1 parameter.
Updates all command parsing of simple "enable" and "disable" arguments.
A few case in the tree use a tri-state or extended arguments, which
cannot use this simple macro.
Simlifies the xscale icache/dcache command handler logic.
Adds several macros similar to COMMAND_PARSE_NUMBER, but for parsing
boolean command arguments. Two flavors are provided to provide
drop-in compatibility with existing code, allow for the elimination
of a lot of code bloat while improving the error checking and reporting.
COMMAND_PARSE_ON_OFF parses "on"/"off" command parameters.
COMMAND_PARSE_ENABLE parses "enable"/"disable" command parameters.
Both print the error and return an error out of the calling function.
Change the layout to show the "Secure Monitor" registers too,
when they're present.
Instead of lining registers for each of six (or seven) modes up
in adjacent vertical columns, display each mode's registers (or
shadows) in a single block, avoiding duplicate value displays.
This also lets us shrink the line length to fits in standard 80
character lines ... six or seven 18-character columns can't fit.
Relabel "r13" as "sp", so it's more meaningful.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
When we read the CPSR on debug entry, update the CPSR cache in all
cases, not just when the current processor state is User or System.
Plus minor cleanup of how the (too-many) other registers' cache
entries get updated.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
If the core doesn't provide an optimized version of this
method, provide one without core-specific optimizations.
Use this to make Cortex-A8 support the "arm reg" command.
Related: make the two register access methods properly static,
have the "set" log a "not halted" error too, and make sure
that the "valid" flag is set on successful reads.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
ARMv7-A doesn't need to duplicate all the standard ARM code
for register handling.
- Switch Cortex-A8 to use the standard register code
- Remove duplicated infrastructure from ARMv7-A
- Have ARMv7-A arch_state() show CPSR, like other ARMs
Add comments to show where the Cortex-A8 isn't actually doing
the right thing for register reads/writes, unless core happens
to be in the right mode to start with. (Looks like maybe there
may be generic confusion between saved/current PSR values in all
the ARM code ...)
Make related ARMv7-A and Cortex-A8 symbols properly static.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Teach the "armv4_5" register code to understand about the
secure monitor mode:
- Add the other three shadowed registers to the arrays
- Support another internal mode number (sigh) in mappings
- Catch malloc/calloc failures building that register cache
This should kick in for Cortex-A8 and ARM1176.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
It's used to flag cores with the "TrustZone" extension,
and is used in subsequent patches to set up support for
the registers shadowed by its new secure monitor mode.
The ARM1176 and Cortex-A8 both support this new mode.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The previous changes to move the startup TCL code resulted in segfaults
during startup. This seemingly innocuous patch fixes the problem.
I would explain why changing from 'foo[]' to '*foo' caused this issue,
but the difference seems superficial. For now, this hot fix will do,
but this issue might bear further scrutiny.
Moves definitions for each layer into their own file, eliminating
layering violations in the built-in TCL code. Updates src/Makefile.am
rules to include all files in the final startup.tcl input file, and
others Makefile.am rules to distribute the new files in our packages.
The recent migration broke them, the fixes broken them in a new way,
but this should restore them to working order. Eliminates the
temporary variable, as the CMD_NAME macro can once again be use
in routines that increment CMD_ARGV without nasty side-effects.
Also, this is on the path to increasing the word size for
bit vectors from 8 to something wider(32? natural host machine
width?)
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Add a new is_arm_mode() predicate, and use it to replace almost
all calls to current armv4_5_mode_to_number().
Eventually those internal mode numbers should vanish... along
with their siblings in the armv7a.c file.
Remove a handful of superfluous checks ... e.g. the mode number
was just initialized, or (debug entry methods) already validated.
Move one of the macros using internal mode numbers into the only
file which uses that macro. Make the tables manipulated with
those numbers be read-only and, where possible, static so they're
not confused with part of the generic ARM interface.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add and use arm_mode_name() to map from PSR bits to user
meaningful names. It uses a new table which, later, can
be used to hold other mode-coupled data.
Add definitions for the "Secure Monitor" mode, as seen on
some ARM11 cores (like ARM1176) and on Cortex-A8. The
previous mode name scheme didn't understand that mode.
Remove the old mechanism ... there were two copies, caused
by Cortex-A8 needing to add "Secure Monitor" mode support.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
All ARM cores need to provide obsolete FPA registers in their
GDB register dumps. (Even though cores with floating point
support now generally use some version of VFP...)
Clean up that support a bit by sharing the same dummy registers,
and removing the duplicate copies. Eventually we shouldn't need
to export those dummies.
(This makes the ARMv7-M support include the armv4_5 header, and
cleans up related #includes, but doesn't yet use anything from
there except those dummies.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add --disable-doxygen-html and --enable-doxygen-pdf options to the
configure script, allowing user to change the defaults. These
update the proess of munging the Doxygen configuration file to
use the settings thusly provided. Add options in README.
A single PDF file for the developer manual allows accessing a single
index, browsing, and searching. It takes significantly more time to
build this way, but this patch allows others to look at the results.
Migration Tip: If you have previously built the HTML Doxygen
documentatation, rename your 'doxygen' directory to 'doxygen/html'
to prevent needlessly rebuilding those files.
Adds the command_invocation structure to encapsulate parameters for
all COMMAND_HANDLER routines. Rather than passing several arguments
to each successive subroutine, a single pointer may be passed around.
Changes the CMD_* macros to reference the new fields.
Updates run_command to create an instance and pass it to the handler.
Add additional macros to allow command handling to be migrated easily:
CMD_CTX, CMD_ARGC, and CMD_ARGV. Updates CMD_NAME to use CMD_ARGV.
In addition to making the remaining patches of this series cleaner,
this introduces easily sed-able symbols that could allow us to retire
these once the command handler infrastructure matures (i.e. pre-1.0).
No need to indirect from registered integers to pointers.
Just stash the pointers directly in the register struct,
and don't even bother registering.
This is a small code shrink, speeds register access just
a smidgeon, and gets rid of another rude exit() path.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The code is now much more explicit. It flushes every
N writes. For now flush every time, but tinkering with
the bridge FIFO size and how often we flush clearly
points in the direction of the Avalon write FIFO full
being the culprit.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Shifting by more than 32 is undefined for 32 bit integers according
to the C standard. Robust solution is conditional code.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
And move the rest of the vector_catch stuff into the C file;
it's not part of the module interface.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Also, switch integrity check over to the correct magic number,
and remove duplicate v4/v5 #define.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Have ARM11 register the "standard" ARM commands. For now, only
disassembly really works.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Rename the "armv4_5" command prefix to straight "arm" so it makes
more sense for newer cores. Add a simple compatibility script.
Make sure all the commands give the same "not an ARM" diagnostic
message (and fail properly) when called against non-ARM targets.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Fix bug noted by Øyvind: terminate the IR length autoscan when
the IR is too long, or otherwise broken.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use size_t instead of uint32_t when specifying file sizes. Update all
consumers up through the layers to use size_t when required. These
changes should be safe, but the higher-levels will need to be updated
further to receive the intended benefits (i.e. large file support).
Add error checking for fileio_read and file_write. Previously, all
errors were being silently ignored, so this change might cause some
problems for some people in some cases. However, it gives us the chance
to handle any errors that do occur at higher-levels, rather than burying
our heads in the sand.
Uses unsigned type to pass line numbers.
Use uint64_t to pass sleep routines their milliseconds. Updates sleep
routines to use this type and improve whitespace.
Tweak "standard" ARM disassembler diagnostics to fail if the target
is not "an ARM" (vs. not "an ARMV4/5"), so it makes more sense for
cores inheriting this as the "generic" disassembler.
Also, to use the Thumb2 entry instead of the original Thumb entry.
This makes it work better for both newer cores (which support those
added instructions) and for BL and BLX instructions on older cores.
(Those instructions are 32-bits, which requires curious state-aware
code to go through a 16-bit decode interface...)
Plus minor cleanups, notably to have fewer exit paths and to make
sure they all return failure codes.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
They're really too big to inline, at least for code that's
not in any performance-critical loops.
Also move the associated string table to the rodata section.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The "improve inline binarybuffer helpers" mis-handled bytes
with the high bit set; treat them as unsigned, not signed.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Don't include it in more headers than necessary; just
use it in the few files that actually need it.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The ARRAY_SIZE macro was defined in several target files, so move it
to types.h.
This patch also removes two other identical macros: DIM (from jtag.h)
and asizeof (from arm11.h).
Eliminate redundant check that gets covered by using unsigned type.
Created to eliminate noise from subsequent patches, but this kind of
conversion will be beneficial in similar ways throughout the tree.
The container_of macro is useful as a general solution. It belongs
in types.h, rather than target.h where it was introduced. Requires
the offsetof macro, which comes from <stddef.h> (moved as well).
Add the 'nand verify' command to perform a dump and fake-write
simultaneously, checking the read bits against those generated by the
write process. Appropriate user documentation for this command has
been added to the user guide as well.
The algorithm presently makes a relatively naive comparison. Some chips
that use ECC may not verify correctly using this implementation, but the
new documentation provides details about this limitation.
In some cases, the FILEIO_NONE access mode may be useful as a parameter
to indicate that file access should be disabled. High-level routines can
use it to skip file access calls, as 'fileio_open' will fail presently
if called to open a file using this mode.
This patch eliminates duplicated code in the the NAND 'dump' and 'write'
by using the new static helper functions.
These changes also fix a possible memory leak in nand dump command, in
the case that the dump file failed to open.
Overall, the changes should be functionally equivalent, but the
resulting code will be easier to improve and extend further.
This patch provides helpers APIs that will eliminate duplicated code in
the the NAND 'dump' and 'write' commands by factoring their common code
into static helper functions. These helpers may be useful for creating
new commands, as shown in the final patch to 'verify' flash from a file.
Several previously unreported error conditions now generate messages and
propogate the return codes, such as when the file fails to open and bad
arguments are given. These changes will fix a possible memory leak in
nand dump command, in the case that the dump file failed to open.
Overall, the changes should be functionally equivalent, but the
resulting code will be easier to improve and extend consistently.
Rewrite buf_cmp to use memcpy for bulk of comparison. Add static
helper to perform comparison of trailing byte, which uses another
static helper to perform a maksed comparison. The masked comparison
helper is used by the buf_cmp_mask to simplify its loop.
Improve types to use void *, unsigned, and return bool.
Don't include "target.h" from more headers than necessary. This
avoids needless interdependencies and duplicated include paths.
Don't needlessly include it in source files, either.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Same deal: "register.h" got needlessly included all over the
place because of being in a few widely included headers.
So take it out of the header files which included it, and put
it in files which use it ... reduce needless interdependencies.
Also, don't need that extra "types.h" inclusion.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Lots of files still include it, often through needless
duplicate inclusion of "log.h"; sigh.
This cleans up the inclusion graph a bunch, so there are
fewer inclusion paths, but it doesn't change much otherwise.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Most files in the tree seem to have ended up including this,
and *quite* needlessly ... only code implementing or using
downloadable algorithms actually needs these declarations.
So take it out of the header files which included it, and put
it in files which use it ... reduce needless interdependencies.
Also: "algorithm.h" doesn't need to include "types.h" again;
it already comes from a different header.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Most files in the tree seem to have ended up including this,
and *quite* needlessly ... only code implementing or using
breakpoints actually needs these declarations.
So take it out of the header files which included it, and put
it in files which use it ... reduce needless interdependencies.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Now the ARM11 cores can use the renamed arm_checksum_memory()
and arm_blank_check_memory() routines ... do so.
Sanity checked with "flash erase_check" of both NOR banks on an
OMAP2420 ... the algorithm code dumped four lines of of "poll"
status after each of almost 520 blocks (yes, *very* annoying) but
gave plausible results after producing that spam.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Three changes: remove ARM11_HANDLER() in favor of normal structure
initialization syntax; fix goofy indentation in that structure; and
don't needlessly export arm11_register_commands(), it's only called
through that method table.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The arm7_9_checksum_memory() and arm7_9_blank_check_memory()
routines are not actually specific to the ARM7 and ARM9 core
generations ... they can work for any core which can run
algorithms using basic ARM (not Thumb) instructions.
Rename them; move the declarations to a more generic site;
likewise move the code (and tidy it a bit in the process).
NOTE: the blank_check() method falsely returned a success
status (0) on one error path, when the algorithm failed.
Fixed this bug.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Previously this flag was stored in "target_type", so that for example
if there were two ARM7TDMI targets in a scan chain, both would claim
to have been examined although only the first one actually had its
examine() method called.
Move this state to where it should have been in the first place, and
hide a method that didn't need exposure ... the flag is write-once.
Provide some doxygen. The examine() method is confusing, since it
isn't separating one-time setup from the after-each-reset stuff. And
the ARM7/ARM9 version is, somewhat undesirably, not leaving the debug
state alone after reset ... probably more of an issue for trace setup
than for watchpoints and breakpoints.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Removes unused arm_jtag_buf_* helpers from arm_jtag.[ch]. These could
reappear if patches are provided to conver the tree to use them, but
this code should not be in the master tree until that series is ready.
Purge an unused routine from the tree and remove a layering violation.
If this code is needed, it should reappear somwhere in src/jtag/,
where struct scan_field gets defined.
It's completely unused; the obnoxious "DANGER!!!" comments
don't even explain what it was doing (shorthand SVN magic).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This fixes an issue due to the new command handler syntax caused by the mw handler playing with the args pointer before
using the CMD_NAME macro. Fix is to move this call above the lines changing args.
Create src/openocd.h to hold declarations previously made internally
by src/main.c and src/server/server.c. This ensures all functions
are verified to be in-sync at compile time (rather than at link),
making it easier to track down bugs.
Changed some printf format strings..
[dbrownell@users.sourceforge.net: shrink lines, fix indents]
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Kick in ETM (and ETB) support for ARM11. Tested on OMAP 2420,
so update that configuration. (That's an ARM1136ejs, ETB,
OpenGL ES1.1, C55x DSP, etc.)
Also update the other ARM11 ETM + ETB targets in the tree
to set up these modules. (Not tested.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
These aren't desirable, given "standard" ETM support.
Also remove the now-unused arm11_find_target().
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
No point in having two identical examine methods for the
ARM7TDMI and ARM9TDMI drivers; move, rename, shrink, share.
Add a bit of doxygen; stop needlessly exporting a method.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Return NULL from etm_build_reg_cache() not ERROR_OK; and share
code on that fault path.
Let ETM code handle any tracking of its cache -- not callers.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This will enable reusing many common ARM utilities, in
particular the ETM and ETB support. The ARM11 support
can still be much simplified after this patch, though.
Note: none of those common utilities kick in yet...
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
We have too many different registers, and too many version and
context dependent interpretations, for this type of bitfield
management to be scalable.
(Anyone who really wants bitfield interpretation *can* do that
in Tcl code...)
There are ... quite a few copies of the same ARM dummy registers.
There should eventually be one copy; this many is craziness.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Various cores with an ETB have its TAP misnamed ... either as a
boundary scan TAP or as the iMX "Secure JTAG Controller" (which
is, among other things, a JRC that could be used to shorten
scan chains).
Use the correct name for these TAPs, which we can recognize since
their IDs were assigned by ARM and these chips all document the
presence of an ETB. The 0x2b900f0f is ETB11; the 0x1b900f0f
is an older module, just called "ETB".
Also shrink the ETB's IR configuration; the default IR-Capture
value is fine, and the mask can specify that all four bits are
safe to check (per ARM documentation).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Remove the last external user of arm7_9_get_arch_pointers(), and
that annoying downcast utility. Add an is_arm7_9() predicate.
Stop returning specious success codes on various failure paths
in the ARM7/ARM9 commands which used that downcast utility.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This documentation update provides an introduction to the command
handling facilities provided by command.[ch]. A primer walks the user
through the elements of a pointedly pedantic module: src/hello.c.
A summary of the API is provided in the OpenOCD Architecture section.
The hello module provides the 'hello' command, printing a greetings
to the command console. It can grow to serve as pedagogical example
of services that OpenOCD developers should use: a runnable style guide.
The number of command arguments will always be 0 or more, so use
the right type in handlers. This has a cascading effect up through
the layers, but the new COMMAND_HANDLER macros prevented total chaos.
By using CALL_COMMAND_HANDLER, parameters can be reordered, added, or
even removed in inherited signatures, without requiring revisiting
all of the various call sites.
The FLASH_BANK_COMMAND_HANDLER provides an extended command handler
using the __COMMAND_HANDLER macro, whereby changing that macro is
sufficient to update flash handlers with the new signature. It also
enforces uniform style and scope when implementing this handler.
This patch adds new typedefs for command handler callback functions.
Users of this type signature were updated to use these new types.
It uses the new __COMMAND_HANDLER macro to prevent duplication.
The COMMAND_HANDLER and COMMAND_HELPER macros allow commands to be
defined in a manner that decouples them from the exact order and type of
their parameters. Once converted, incremental changes to the command
handler type can be addressed in incremental patches that do not need to
touch the entire tree.
These macros' implementation, __COMMAND_HANDLER, is used to define the
new command_handler_t type, and additional patches will use it to derive
new macros to define extended command types (e.g. flash, nand, pld).
The CALL_COMMAND_HANDLER provides a means of calling helpers or nested
handlers from withing a command handler.
This patch uses C99 varadic macro expansion. Please report compilers
that cannot handle this code.
The "remove (forward) declarations" patch goofed indentation on the
"cortexa8_target" struct; fix.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
To be more informative (and consistent with flash and pld trees), change
'device' parameter name to 'nand' in NAND source files. This change
eliminates confusing 'device->device->' instance from the code, and
it simplifies the forthcoming command handler patches.
ARM11 and newer cores include updated ETM modules. Recognize
their version codes and some key config differences. Sanity
checked on an OMAP2, with an ETM11RV r0p1 (ETMv3.1).
This still handles only scan chain 6, with at most 128 registers.
Newer cores (mostly, Cortex) will need to use the DAP instead.
Note that the newer ETM modules don't quite fit the quirky config
model of the older ones ... having more port widths is easy, but
the modes aren't the same. That still needs to change.
Fix a curious bug ... how did the register cache NOT get saved??
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This trivial patch allows the config script to find the correct
FTDI2xx libraries under Windows XP x64 using msys.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add the khz and speed_div functions to the parport interface driver.
Add the parport_toggling_time function that tells the parport driver
how long (in nanoseconds) it takes for the hardware to toggle TCK.
[dbrownell@users.sourceforge.net: tweak doc for clarity, mention
multimeter, and whitespace fixes]
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Now that nothing uses the old ETM handle any more, remove it.
Add minimal header tweaks, letting non-ARM7 and non-ARM9 cores
access ETM facilities.
Now ARM11 could support standard ETM (and ETB) access as soon as
it derives from "struct arm" ... its scanchain 6 is used access
the ETM, just like ARM7 and ARM9.
The Cortex parts (both M3 and A8) will need modified access methods
(via ETM init parameters), so they use the DAP. Our first A8 target
(OMAP3) needs that for both ETM and ETB, but the M3 ETM isn't very
useful without SWO trace support (it's painfully stripped down), so
that support won't be worth adding for a while.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make ETM itself use the new toplevel ETM handle, instead
of the to-be-removed lower level one. As of this patch,
nothing should be using the old ARM7/ARM9-specific handle.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make both useful ETM port drivers (etb, etm_dummy) use the new
toplevel ETM handle, instead of the to-be-removed lower level one.
Do the same for the "oocd-trace" prototype too; and fix its
error reporting paths: return failure codes, don't exit(), etc
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make ARM7 and ARM9 cores use the new toplevel ETM handle to
trigger ETM setup, not the to-be-removed lower level one.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Rename "struct armv4_5_common_s" as "struct arm". It needs
a bit more work to be properly generic, and to move out of
this header, but it's the best start we have on that today.
Add and initialize an optional ETM pointer, since that will
be the first thing that gets generalized.
The intent being: all ARMs should eventually derive from
this "struct arm", so they can reuse the current ETM logic.
(And later, more.) Currently the ARM cores that *don't* so
derive are only ARMv7-M (and thus Cortex-M3) and ARM11.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Eliminate duplicate code for linking commands into a list.
Adds a check to ensure the command does not already exist;
if it does, return that one instead of creating a duplicate.
Add help for commands regardless of whether a handler is involved.
With this, all sorts of new commands can be found in 'help' text.
Hopefully, all of them have been documented....
Sadly, the lsort function appears to handle nested lists poorly, such
that sub-commands do not group with their parents.
The command_name function returns a malloced string for a given
command and its parents. This can be used to display a message
to the user, but it is used internally to handle registration
and syntax errors. This helps permit arbitrary command nesting.
Add 'const' keyword to 'char *' parameters to allow command handlers to
pass constant string arguments. These changes allow the 'args' command
handler to be changed to 'const' in a subsequent patch.
Subsequent patches expect all command handlers to use a uniform
parameter naming scheme. In the entire tree, these two files used
standard 'argv' instead of our non-standard 'args'. This patch opts
to reduces the noise required to unify the command handlers, using
dominant 'args' form.
A future patch may be used to convert us back to the standard argv, but
that requires coordination with all developers to minimize disruptions.
Separates various groups of files to be built in logical succession.
In each layer, the core module (target.c, nand.c, etc.) is built _after_
their helper modules (e.g. image.c, nand_ecc.c) but _before_ any of
their drivers (e.g. arm966e.c, mx3_nand.c).
This allows problems introduced at the bottom of the stack to result
in build failures as soon as possible, as the helpers and core should
wrap portions of them.
Various cleanups of ETM related code.
- Saner error return paths
- Simplify arm7_9 init ... no need for extra zeroing!
- Shrink some lines
- Tweak some diagnostics
- Use shorter name for ETM struct type.
- Don't exit()
and similar. The diagnostics look forward to having
this ETM code work with more than just ARM7/ARM9.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The "ARM720 uses the new inheritance/nesting scheme" patch
wrongly scrubbed a calloc() from arm720t_target_create().
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Start switching MMU handling over to a more sensible scheme.
Having an mmu() method enables MMU-aware behaviors. Not having
one kicks in simpler ones, with no distinction between virtual
and physical addresses.
Currently only a handful of targets have methods to read/write
physical memory: just arm720, arm920, and arm926. They should
all initialize OK now, but the arm*20 parts don't do the "extra"
stuff arm926 does (which should arguably be target-generic).
Also simplify how target_init() loops over all targets by making
it be a normal "for" loop, instead of scattering its three parts
to the four winds.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
General rule, this is all board-specific and doesn't belong
in target config files. Some of these were just cosmetic.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Here's a patch for the double-reset problem on STM32. I've tested
downloading and debugging with GDB and Eclipse, and everything seems
to work fine.
This effectively sets reset_config to none. trst_only would also
be ok, but that's better left to a board configuration file since
not all boards wire it up.
The NVIC is used to trigger reset, which at least on this chip also
pulses nSRST so the whole system does get rest -- exactly once.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
First cut of these commands. Øyvind tinkered a bit with
the number parsing to bring it up to speed + rebased it.
Ready for testing.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
- improve some names -- a "default" prefix is not descriptive
- add doxygen @todo entries for some issues
- avr8 isn't ever going to need those MMU hooks
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Contrary to my previous assessment, some opportunities to remove forward
declarations were overlooked. Remove them by moving the definitions
of the command registration and interface structure to the end of files.
Remove useless forward declarations.
Moves command registrations to end of files.
Moves flash structure definitions to end of files.
Signed-off-by: Zachary T Welch <zw@superlucidity.net>
Remove useless forward declarations.
Moves command registrations to end of files.
Moves flash structure definitions to end of files.
Signed-off-by: Zachary T Welch <zw@superlucidity.net>
Remove useless forward declarations.
Moves command registrations to end of files.
Moves flash structure definitions to end of files.
Signed-off-by: Zachary T Welch <zw@superlucidity.net>
Remove useless forward declarations.
Moves command registration to end of file.
Moves flash structure definitions to end of files.
Changes a few references to global flash structure to local refs.
Signed-off-by: Zachary T Welch <zw@superlucidity.net>
Remove useless forward declarations.
Moves command registrations to end of files.
Moves flash structure definitions to end of files.
Signed-off-by: Zachary T Welch <zw@superlucidity.net>
Remove useless forward declarations.
Moves command registration to end of files.
Moves flash structure definition to end of files.
Signed-off-by: Zachary T Welch <zw@superlucidity.net>
Remove useless forward declarations.
Moves command registration to end of file.
Moves flash structure definition to end of file.
Signed-off-by: Zachary T Welch <zw@superlucidity.net>
This patch introduced a bug preventing flash writes from working
on Cortex-M3 targets like the STM32. Moreover, it's the wrong
approach for handling no-MMU targets.
The right way to handle no-MMU targets is to provide accessors
for physical addresses, and use them everywhere; and any code
which tries to work with virtual-to-physical mappings should use
a identity mapping (which can be defaulted).
And ... we can tell if a target has an MMU by seeing if it's
got an mmu() method. No such methood means no MMU.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
It's been about a year since these were deprecated and, in most
cases, removed. There's no point in carrying that documentation,
or backwards compatibility for "jtag_device" and "jtag_speed",
around forever. (Or a few remnants of obsolete code...)
Removed a few obsolete uses of "jtag_speed":
- The Calao stuff hasn't worked since July 2008. (Those Atmel
targets need to work with a 32KHz core clock after reset until
board-specific init-reset code sets up the PLL and enables a
faster JTAg clock.)
- Parport speed controls don't actually work (tops out at about
1 MHz on typical HW).
- In general, speed controls need to live in board.cfg files (or
sometimes target.cfg files), not interface.cfg ...
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Rename the "Drivers, Options, and Commands" sections to be
just "Driver List" matching the earlier reference. Add an
example of parallel CFI flash.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Removes 'extern' keywords from function prototypes in the flash headers.
Wraps long lines to fit into 80 columns.
Adds multiple inclusion protection for s3c2xx_nand.h.
Removes the 'extern' keyword from function declarations.
Wraps long prototypes to fit into 80 columns.
Fixes documentation for jtag_tap_s::{,has}idcode fields.
The "$ocd_HOSTOS" variable was wrongly documented. Fix its
documentation, and its value on Linux.
Shrink a few of the too-long lines.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add comments (Doxygen and normal), remove unused code,
shrink some overlong lines. Get rid of a forward decl.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This patch changes the duration_* API in several ways. First, it
updates the API to use better names. Second, string formatting has
been removed from the API (with its associated malloc). Finally, a
new function added to convert the time into seconds, which can be
used (or formatted) by the caller. This eliminates hidden calls to
malloc that require associated calls to free().
This patch also removes the useless extern keyword from prototypes,
and it eliminates the duration_t typedef (use 'struct duration').
These API also allows proper error checking, as it is possible for
gettimeofday to fail in certain circumstances.
The consumers have all been chased to use this new API as well, as
there were relatively few cases doing this type of measurement.
In most cases, the code performs additional checks for errors, but
the calling code looks much cleaner in every case.
Reduces confusion about location of associated routines and
reduces clutter in the arm11 header.
Removes extra whitespace around the lines touched by these changes.
Make several functions be static. Shrink some of the overlong
lines. Use pure tab indents in some places that mixed in spaces.
This gives a minor object code shrink (about 2% on amd64).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The semantics of "-work-area-virt 0" (or phys) changed with
the patch to require specifying physical or virtrual work
area addresses. Specifying zero was previously a NOP. Now
it means that address zero is valid.
This patch addresses three related issues:
- MMU-less processors should never specify work-area-virt;
remove those specifications. Such processors include
ARM7TDMI, Cortex-M3, and ARM966.
- MMU-equipped processors *can* specify work-area-virt...
but zero won't be appropriate, except in mischievous
contexts (which hide null pointer exceptions).
Remove those specs from those processors too. If any of
those mappings is valid, someone will need to submit a
patch adding it ... along with a comment saying what OS
provides the mapping, and in which context. Example,
say "works with Linux 2.6.30+, in kernel mode". (Note
that ARM Linux doesn't map kernel memory to zero ...)
- Clarify docs on that "-virt" and other work area stuff.
Seems to me work-area-virt is quite problematic; not every
operating system provides such static mappings; if they do,
they're not in every MMU context...
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Resolve serious bug inserted by the "target: require working
area for physical/virtual addresses to be specified" patch.
It forced use of (invalid) virtual addresses when the MMU
was disabled, and vice versa.
Observed to break at least Cortex-M3, ARM926, ARM7TDMI whenever
work areas are used, such as during bulk writes to flash, DDR2,
SRAM, and so on.
Also, fix overlong lines and whitespace goofs.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Move various embedded target structs to the beginnings of
their containers ... pretty much the way C++ or Obj-C
would for single inheritance.
This shrinks code that accesses those embedded structs by
letting common offsets use smaller instructions. Sample
before/after sizes (on amd64):
17181 312 0 17493 4455 arm920t.o
16810 312 0 17122 42e2 arm920t.o
Where the "after" is the smaller number, with this patch
over the ones leveraging that embedding knowledge.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Remove most remaining uses of target->arch_info from ARM
infrastructure, where it hasn't already been updated.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use target_to_armv7a() etc, replacing needless pointer traversals.
Stop using X->arch_info scheme in most ARMv7-A and Cortex-A8 code.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use target_to_arm7_9(), replacing needless pointer traversals.
Also: remove now-useless contents of arm7tdmi struct; it's
almost ready to be removed.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use target_to_arm720(), replacing needless pointer traversals
and simplifying a bunch of nasty code. Stop setting arch_info
for arm720 type parts, it's not used any longer.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use target_to_xscale(), replacing needless pointer traversals
and simplifying a bunch of code.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Replace needless pointer traversals and simplify. Also remove most
remaining contents from arm9tdmi struct; it's almost removable.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use target_to_arm926(), replacing needless pointer traversals
and simplifying a bunch of code.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use target_to_arm920(), replacing needless pointer traversals
and simplifying. Stop setting arm9tdmi->arch_info for arm920
type parts, it's not used any longer.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use new target_to_cm3() and target_to_armv7m() inlines,
instead of a series of x->arch_info conversions. Remove
arch_info, since nothing uses it.
Also fix an omission: the Cortex-M3 commands didn't verify
that they were operating on that kind of target. Add comment
about the ARMv7M version of that omission.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Provide a cleaner way to handle single inheritance of targets
in C, using the same model Linux does: structs containing other
structs, un-nested via calls to a "container_of()" macro that
are packaged in typesafe inline functions.
Targets already use this containment idiom, but make it much
more complicated because they un-nest using embedded "void *"
pointers ... in chains of up to five per target, which is all
pure needless complication. (Example: arm92x core, arm9tdmi,
arm7_9, armv4_5 ... on top of the base "target" class.)
Applying this scheme consistently simplifies things, and gets
rid of many error-prone untyped pointers. It won't change any
part of the type model though -- it just simplifies things.
(And facilitates more cleanup later on.)
Rule of thumb: where there's an X->arch_info void* pointer,
access to that pointer can and should be removed. It may be
convenient to set up pointers to some of the embedded structs;
and shrink their current "*_common" names (annoyingly long).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The forward decls are just code clutter; remove them, by moving
their references after definitions. This is another file which
never needed even one internal forward declaration.
Also shrink a few overly-long lines with function declarations
or definitions; get rid of arm7tdmi_register_commands(), it's
not needed (just delegated); minor whitespace declutter.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Unneeded exports cause confusion about the module interfaces.
Make all functions static. Add a short header comment.
The forward decls are just code clutter; remove them, by moving
their references after definitions. This is another file which
never needed even one internal forward declaration.
Remove unneeded indirection for the write_memory() method. Make
a table static, remove a can't-happen case with nasty exit().
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Unneeded exports cause confusion about the module interfaces.
Make most functions static.
The forward decls are just code clutter; remove them, by moving
their references after definitions. This is another file which
never needed even one internal forward declaration.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The forward decls are just code clutter; remove them, by moving
their references after definitions. This is another file which
never needed even one internal forward declaration.
Also shrink a few overly-long lines with function declarations
or definitions.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Unneeded exports cause confusion about the module interfaces.
Make most functions static.
The forward decls are just code clutter; remove them, by moving
their references after definitions. This is another file which
never needed even one internal forward declaration.
Also remove needless arm966e_init_target(), in favor of the
arm9tdmi routine to which it delegates its work.
This saved over 100 bytes of code on x86_32.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
An init_target() wrapper isn't needed, and target_create()
can shrink a bit. Add a header comment and some doxygen.
Remove arm926ejs_catch_broken_irscan() which has been a NOP
for quite a few months now, and in any case duplicates logic
in the JTAG core to validate IR capture data. But force the
capture mask to 0x0f, so those tests are most effective.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Unneeded exports cause confusion about the module interfaces.
Make most functions static. Add a short header comment.
The forward decls are just code clutter; remove them, by moving
their references after definitions. This is another file which
never needed even one internal forward declaration.
This saved almost 900 bytes of code on x86_32; it seems the
compiler can leverage its knowledge that these functions are
not called from the outside world...
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This eliminates redundant code for parsing and retreiving the bank
specified from a script command argument. This patch was written to
replace existing functionality; however, the parsing logic can be
updated later to allow flash commands to accept bank names as well as
their numbers.
This helper eliminates significant amount of redundant code in command
handler functions throughout the system. It wraps the lower-level
parse_* macros to implement a policy for reporting parse errors to the
active command context (cmd_ctx). If errors do occur, this macro causes
the calling function to abort with the proper return code.
The arm920t has a concept of read modify write cycles
that may have to be represented in the mrcmcr interface
eventually.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Highlight that the "-expected-id" probably comes from vendor
documentation, and that it *should* be used where possible.
Don't use ircapture/irmask in examples, to help discourage
use of those params when they're not required. Explain a
bit better about why/when those params get used.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Fail watchpoint_add() if it's the same address but the
parameters are different ... don't just assume having
the same address means the same watchpoint! (Note that
overlapping watchpoints aren't detected...)
Handle unrecognized return codes more sanely; don't exit()!
And describe command params right.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Expose most DWT registers via Tcl; there are a few more, but
those are mostly for profiling along with the ITM. Having
this set available enables operations which aren't possible
with just the standard watchpoint operations.
The cycle counter may be interesting. Turn it on after reset
by setting the LSB of the dwt_ctrl register, and it counts
CPU clocks. You can program the comparator 0 watchpoint to
trigger on a given cycle count, rather than a data address.
Likewise, comparator 1 may be able to match data values given
address matches from one or two other comparators. (Not all
hardware supports this capability though; try it. That is
something the standard watchpoint methods should eventually
handle, for the single address case.)
Minor cleanup: remove needless functional indirection for
exposing the v7m architctural registers.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
There's no reason to read which interrupts are enabled from
the NVIC; that state isn't used. Plus, it's highly dynamic
since firmware can change it at any time; remove the support
for those state records.
Remove duplicate definition of DWT_CTRL address; shrink a line.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Fix the watchpoint error checks, and do them in add(), not later
in set() when it's mostly too late. Support the full range of
watchpoint sizes (1 to 32K bytes each), and check alignments.
Minor cleanup of DWT access: shrink lines, use "+" for address
calculations, comment a few issues. Add debug message reporting
DWT capabilities, matching the message for FBP, and some minor
code and spec review comments.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add Doxygen for the exported ARMv7-M interfaces.
Make the non-exported stuff static. Remove functions and
data which are now observably unused.
Add comment about a small speedup that the run_algorithm()
logic could use. Shrink a few too-long lines.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
improve default target->read/write_phys_memory, produce
more sensible error messages if the mmu interface
functions have not been implemented yet vs. will
not be implemented(e.g. cortex m3).
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
The quit entry point was not being invoked. Just a source
of confusion at this point. XScale ran 100x reset upon
quit, but that code made no sense, wasn't commented
and never invoke.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Previous patch somehow made GCC lose some of its cookies;
work around, zero-init that struct.
Clean up code from the previous patch.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Config for Intel's "Lubbock" PXA255 development board. Even more
so than the PXA255 itself, this is obsolete. AFAIK this was the
first generally available development platform for PXA255. Intel
stopped providing these after other devel boards became available.
One interesting thing about this board from the OpenOCD perspective
is probably its flash configuration. Each bank is 32 bits wide,
built from two 16-bit StrataFlash chips wired in parallel. This
doubles throughput ... it reads/writes 32 bits in the time a single
chip takes to write just 16 bits.
This conf mostly works, given XScale bugfixes, but has some issues
(notably: no access to the on-board SDRAM) flagged by FIXMEs.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
We currently do something unusual: version codes in config.in get
updated after the release, which means that "git describe" won't
match up to development version labels. Comment that trouble spot.
We can fix this by switching away from the major/minor/micro type
release numbering, as various other projects have done. The major
numbers basically don't tend to change, and doing a good job with
micro versions is so annoying that they rarely change either.
Contrast releases to git snapshot tarballs. Mention that
releases have some quality-improvement focus, with special
non-"dev" version IDs. Explain more about version IDs,
using "openocd -v" to see them, etc;
Make release milestone info be less specific about timing,
and presume we have both a merge window and an RC stage.
Rework the release process information to match reality a
bit more closely. Reference the version.sh script (in one
place the wrong script was referenced). Bugfix branches
get special treatment, while non-bugfix releases are more
or less what *defines* being the mainline branch.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The "source" command isn't accepted by ASH; easy to fix.
Failures with "-e" are harder to fix. Remove the "-e"
(for now) and force bash, for safety.
Un-obfuscate the release steps, by using names instead
of numbers. Comment the version-number manipulation.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Various include files require some other include files
to be included first. Copied solution from net/if.h.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
To support breakpoints, flush data cache line and invalidate
instruction cache when 4 and 2 byte words are written.
The previous code was trying to write directly to the physical
memory, which was buggy and had a number of other situations
that were not handled.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Fixed bug: if virtual address for working memory was not specified
and MMU was enabled, then address 0 would be used.
Require working address to be specified for both MMU enabled
and disabled case.
For some completely inexplicable reason this fixes the regression
in svn 2646 for flash write in arm926ejs target. The logs showed
that MMU was disabled in the case below:
https://lists.berlios.de/pipermail/openocd-development/2009-November/011882.html
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
This change is necessary to debug AT91SAM9260 on my PC with a
FT2232H dongle.
Signed-off-by: Dimitar Dimitrov <dinuxbg@gmail.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Mention the autoprobing as a tool that may be useful when
figuring out how to set up; and add a section showing how
to use that mechanism (with an example).
Strengthen the differences between config and run stage
descriptions; add a section for the latter.
Mention Dragonite.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
For some reason, all the interals are documented by default.
This is wrong for two basic reasons:
- We need to focus on public interfaces, since those are
the architectural interfaces and relationships.
- Since virtually nothing has doxygen support yet, this
maximizes the noise, and minimizes the usefulness of
doxygen output.
So don't expose so much by default.
Gets rid of the runtime warning "stm32.bs: nonstandard IR mask"
[dbrownell@users.sourceforge.net: line lengths, note issue, section ref]
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Just use the array of names we're given, ignoring indices.
The "reserved means don't use" patch missed that change.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This gets rid of runtime warnings from the use of numbers.
STM32 and LPC2103 were tested. Other LPC updates are the
same, and so are safe. The CFI updates match other tested
changes now in the tree.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
There were a few more changes worth mentioning, including support
for more JTAG adapters, boundary scan improvements, another NAND
driver, and the Win64 stuff.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
I'm suspecting this code can never have worked, since the
original commit (svn #335) in early 2008.
Fix is just copy/paste from another (working) function.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add interface configs for two new high speed JTAG
adapters from Olimex. They need some other speed
related tweaks to work well at high speed.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Implement XSVF support for detailed state path transitions,
by collecting sequences of XSTATE transitions into paths
and then calling pathmove().
It seems that the Xilinx tools want to force state-by-state
transitions instead of relying on the standardized SVF paths.
Like maybe there are XSVF tools not implementing SVF paths,
which are all that we support using svf_statemove().
So from IRPAUSE, instead of just issuing "XSTATE DRPAUSE"
they will issue XSTATES for each intermediate state: first
IREXIT2, then IRUPDATE, DRSELECT, DRCAPTURE, DREXIT1, and
finally DRPAUSE. This works now.
Handling of paths that go *through* reset is a trifle dodgey,
but it should be safe.
Tested-by: Wookey <wookey@wookware.org>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Unneeded exports cause confusion about the module interfaces.
Make most functions static, and fix some line-too-long issues.
Delete some now-obviously-unused code.
The forward decls are just code clutter; move their references
later, after the normal declarations. (Or vice versa.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Unneeded exports cause confusion about the module interfaces.
Only the Feroceon code builds on this, so only routines it
reuses should be public.. Make most remaining functions
static, and fix some of the line-too-long issues.
The forward decls are just code clutter; move their references
later, after the normal declarations. Turns out we don't need
even one forward declaration in this file.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The Hex parser uses a fixed number of sections. When the
number of sections in the file is greater than that, the
stack get corrupted and a CHECKSUM ERROR is detected
which is very confusing.
This checks the number of sections read, and increases
IMAGE_MAX_SECTIONS so it works on my file.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Update documentation to reflect GIT methodology. Rewrite release.sh
script to use appropriate process. With this update, tools/release.sh
can be used for producing private release tags on local branches.
The documentation still needs work, but their use for v0.3.x should
help rectify the deficiences.
A '.*' rule prevents the 'git submodule add' from correctly adding the
first submodule, because it creates the .gitmodule file. This file will
not be added (without -f) result in incomplete submodule commits.
The new rules mask the specific files present in my own build tree, but
additional rules may be needed to hide other types of temporary files.
Only type 1 branch instruction has a condition code, not type 2.
Currently they're both tagged with ARM_B which doesn't allow for the
distinction.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
A Thumb BLX instruction is branching to ARM code, and therefore the
first 2 bits of the target address must be cleared.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This patch includes partial support for these new JTAG adapters.
More complete support will require updates to the libftdi code,
for EEPROM access.
[dbrownell@users.sourceforge.net: fix whitespace, linelen, etc ]
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Currently, OpenOCD is always caching the PC value without the T bit.
This means that assignment to the PC register must clear that bit and set
the processor state to Thumb when it is set. And when the PC register
value is transferred to another register or stored into memory then
the T bit must be restored.
Discussion: It is arguable if OpenOCd should have preserved the original
PC value which would have greatly simplified this code. The processor
state could then be obtained simply by getting at bit 0 of the PC. This
however would require special handling elsewhere instead since the T bit
is not always relevant (like when PC is used with ALU insns or as an index
with some addressing modes). It is unclear which way would be simpler in
the end.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Whenever an unconditional branch with the H bits set to 0b10 is met, the
offset must be combined with the offset from the following opcode and not
ignored like it is now.
A comment in evaluate_b_bl_blx_thumb() suggests that the Thumb2 decoder
would be a simpler solution. That might be true when single-stepping of
Thumb2 code is implemented. But for now this appears to be the simplest
solution to fix Thumb1 support.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Calling it first with every opcodes and then testing if the opcode
was indeed a branch instruction is wasteful and rather strange.
If ever thumb_pass_branch_condition() has side effects (say, like
printing a debugging traces) then the result would be garbage for most
Thumb instructions which have no condition code.
While at it, let's make the nearby code more readable by reducing some of
the redundant brace noise and reworking the error handling construct.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Now I can issue "reset halt" and have everything act smoothly;
the vector_catch hardware is obviously not kicking in, but the
rest of the reset sequence acts sanely.
- TAP "setup" event enables the DAP, not omap3_dbginit
(resolving a chicken/egg bug I noted a while back)
- Remove stuff from omap3_dbginit which should never be
used in event handlers
- Cope better with slow clocking during reset
Also, stop hard-wiring the target name: use the input params in
the standard way, and set up $_TARGETNAME as an output param.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make the "dap info" output more comprehensible:
- Don't show CIDs unless they're incorrect (only four bits matter)
- For CoreSight parts, interpret the part type
- Interpret the part number
- Show all five PID bytes together
- Other minor cleanups
Also some whitespace fixes, and shrink a few overlong source lines.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This is the very basic board config for the balloon3 board cpu JTAG
channel.
The rest of the config comprises another 14 .cfg files which I suspect
openocd doesn't really want all of. I'm still not sure how to deal
with this. I'll post another mail/patch to discuss.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Ignore leading '0' characters on hex strings. For example a bit
pattern consisting of 6 bits could be written as 3f, 03f or 003f and
so on.
Signed-off-by: Michael Roth <mroth@nessie.de>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This patch adds basic autoprobing support for the JTAG scan chains
which cooperate. To use, you can invoke OpenOCD with just:
- interface spec: "-f interface/...cfg"
- possibly with "-c 'reset_config ...'" for SRST/TRST
- possibly with "-c 'jtag_khz ...'" for the JTAG clock
Then set up config files matching the reported TAPs. It doesn't
declare targets ... just TAPs. So facilities above the JTAG and
SVF/XSVF levels won't be available without a real config; this is
almost purely a way to generate diagnostics.
Autoprobe was successful with most boards I tested, except ones
incorporating C55x DSPs (which don't cooperate with this scheme
for IR length autodetection). Here's what one multi-TAP chip
reported, with the "Warn:" prefixes removed:
clock speed 500 kHz
There are no enabled taps. AUTO PROBING MIGHT NOT WORK!!
AUTO auto0.tap - use "jtag newtap auto0 tap -expected-id 0x2b900f0f ..."
AUTO auto1.tap - use "jtag newtap auto1 tap -expected-id 0x07926001 ..."
AUTO auto2.tap - use "jtag newtap auto2 tap -expected-id 0x0b73b02f ..."
AUTO auto0.tap - use "... -irlen 4"
AUTO auto1.tap - use "... -irlen 4"
AUTO auto2.tap - use "... -irlen 6"
no gdb ports allocated as no target has been specified
The patch tweaks IR setup a bit, so we can represent TAPs with
undeclared IR length.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Stop allocating three bytes per IR bit, and cope somewhat better
with IR lengths over 32 bits.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Remove needless debug handler state.
- "handler_installed" became wrong as soon as the second TRST+SRST
reset was issued ... so the handler was never reloaded after the
reset removed it from the mini-icache.
This fixes the bug where subsequent resets fail on PXA255 (if the
first one even worked, which is uncommon). Other XScale chips
would have problems too; PXA270 seems to have, IXP425 maybe not.
- "handler_running" was never tested; it's pointless.
Plus a related bugfix: invalidate OpenOCD's ARM register cache on reset.
It was no more valid than the XScale's mini-icache. (Though ... such
invalidations might be better done in "SRST asserted" callbacks.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Bit 5 shouldn't be used. Remove all support for modifying it.
Matches the exception vector table, of course ... more than one
bootloader uses that non-vector to help distinguish valid boot
images from random garbage in flash.
Some cosmetic cleanup, and switch to a single table mapping
between state names and symbols (vs two routines which only
share that state with difficulty).
Get rid of TAP_NUM_STATES, and some related knowledge about
how TAP numbers are assigned. Later on, this will help us
get rid of more such hardwired knowlege.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
- Use the name mappings all the other code uses:
+ name-to-state ... needed to add one special case
+ state-to-name
- Improve various diagnostics:
+ don't complain about a "valid" state when the issue
is actually that it must be "stable"
+ say which command was affected
- Misc:
+ make more private data and code be static
+ use public DIM() not private dimof()
+ shorten the affected lines
Re the mappings, this means we're more generous in inputs we
accept, since case won't matter. Also our output diagnostics
will be a smidgeon more informative, saying "RUN/IDLE" not
just "IDLE" (emphasizing that there can be side effects).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The wrong variable (pc instead of r0) was used. Furthermore, someone
did cover this error by stupidly silencing the compiler warning that
occurred before a dummy void reference to r0 was added to the code.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
When dumping over 100 registers (as on most ARM9 + ETM cores),
aid readability by splitting them into logical groups.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The register names are perversely not documented as zero-indexed,
so rename them to match that convention. Also switch to lowercase
suffixes and infix numbering, matching ETB and EmbeddedICE usage.
Update docs to be a bit more accurate, especially regarding what
the "trigger" event can cause; and to split the issues into a few
more paragraphs, for clarity.
Make "configure" helptext point out that "oocd_trace" is prototype
hardware, not anything "real".
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
XSVF improvements:
- Layer parts of XSVF directly over SVF, calling svf_add_statemove()
instead of expecting jtag_add_statemove() to conform to the SVF/XSVF
requirements (which it doesn't).
This should improve XSTATE handling a lot; it removes most users of
jtag_add_statemove(), and the comments about how it should really do
what svf_add_statemove() does.
- Update XSTATE logic to be a closer match to the XSVF spec. The main
open issue here is (still) that this implementation doesn't know how
to build and submit paths from single-state transitions ... but now
it will report that error case.
- Update the User's Guide to mention the two utility scripts for
working with XSVF, and to mention the five extension opcodes.
Handling of state transition paths is, overall, still a mess. I think
they should all be specified as paths not unlike SVF uses, and compiled
to the bitstrings later ... so that we can actually make sense of the
paths. (And see the extra clocks, detours through RUN, etc.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Don't add extra TCK in current state; exit from RESET had four extras.
Only IDLE --> IDLE needs such an extra clock. (At least one TCK must
be issued.)
Allow entry to RESET; SVF allows it, so must we (despite those entries
being commented out of the statemove table).
When entering RESET, always use TLR ... we might end up with extra clocks
in reset that way, which is harmless, but we'll never end up in any other
state than RESET, which is useful paranoia.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
As decided a while back, this isn't a transition we want to chance.
Whenever someone wants to got to RESET, force it.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
SVF: comment the predefined/default paths; make them static const
SVF, XSVF: whitespace fixes, mostly so copyrights display sanely
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This is unfortunately needed to make stdio work like OpenOCD expects -- matching
the ANSI-C standard, instead of MS-Windows.
I tested it in both MinGW-W64 on Vista 64 and MinGW-W32 on XP, and I don't
see any adverse effects to enabling it for all MinGW versions.
After reading a bit further, it appears that ws2_32 (Windows Sockets 2)
is included in all versions of Windows and backwards compatible with
wsock32, at least according to
http://msdn.microsoft.com/en-us/library/ms740673%28VS.85%29.aspx.
Only Win95 seems to require a manual installation; is not a big deal.
So I think we can drop this whole business of detecting 64 bit MinGW and
just use -lws2_32 for all MinGW platforms.
Compilation on cygwin, using gcc v3 with option -mno-cygwin,
currently produces a large number of the following warnings:
warning: `gnu_printf' is an unrecognized format function type
These have been introduced with the recent MinGW GNU C99 printf
compliance patch, as gnu_printf was only introduced with gcc v4.4
and is not recognized with earlier versions.
The attached fix adds gcc version detection to the previous patch
to avoid the problem.
Passing "--std=gun99" is unfortunately not sufficient to make current
MinGW compilers conform with respect to checking printf format strings.
(The C runtime seems not to have problems.)
Fix by using a "gnu_printf" format specifier not "printf".
Use JIM_WIDE_MODIFIER for the sscanf format, and apply it for MINGW32 as
well as other Windows environments. (Microsoft doesn't conform to the
C99 standard, and uses "%I64d" not "%lld" for "long long".)
NB: __MINGW32__ should work on both w32 and w64,.
Generate a C struct with the data, and use that, instead of an
assembly language file. The assembly language causes issues on
Darwin and MS-Windows, which don't necessarily use GNU AS; or
if they do, don't necessarily use its ELF syntax.
It's also better in two other ways: fewer global symbols; and
the init-time size check gets optimized away at compile time.
(Unless it fails, in which case bigger chunks of the file vanish.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Based on some patches from <redirect.slash.nil@gmail.com>
for preliminary Win64 compilation. More such updates are
needed, but they need work. Compile tested on 64 and 32 bit
Linuxes, and Cygwin.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This makes the documentation a closer match to "help" output:
- "pathmove" somehow was not documented in the User's Guide
- "jtag_nsrst_assert_width" and "jtag_ntrst_assert_width"
are new; both needed descriptions.
- Removed two undocumented and fairly useless script mechanisms:
* production/production_info/production_test ... using it,
requires replacing everything; so having it adds no value.
* cpu ... way out of date; hopeless to keep that current
Note that anyone using that "production" stuff already defines
their own procedures, and can keep using them with no change.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Ofrwarded from Ron, who's not subscribed.
----- Forwarded message from Ron <ron@debian.org> -----
From: Ron <ron@debian.org>
Date: Wed, 14 Oct 2009 04:50:17 +1030
To: wookey@debian.org
Subject: [PATCH] OpenRD board configuration
X-Spam-Status: No, score=-3.6 required=4.5 tests=BAYES_00,RCVD_IN_DNSWL_LOW
autolearn=ham version=3.2.5
This piggybacks on the 'sheevaplug' layout which uses the same Kirkwood SoC.
Signed-off-by: Ron Lee <ron@debian.org>
The LE check is obviously buggy (as easily triggered during some
testing), but I didn't audit the rest of the cases.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Cleanup comments and layout/whitespace in the TMS tables.
Table contents stayed the same (ignoring whitespace).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Resolve a "FIX" comment; yes that was superfluous given that the
JTAG core does that check by default. It was also buggy since it
wrote to a stack frame that went away before the write happened!!
Other fixes: remove pointless malloc(); zero-init scan_field_t
values wherever they appear; whitespace scrub; spelling fix.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Load the XScale debug handler from the read-only data section
instead of from a separate file that can get lost or garbaged.
This eliminates installation and versioning issues, and also
speeds up reset handling a bit.
Plus some minor bits of cleanup related to loading that handler:
comments about just what this handler does, and check fault codes
while writing it into the mini-icache.
The only behavioral changes should be cleaner failure modes after
errors during handler loading, and being a bit faster.
NOTE: presumes GNU assembly syntax, with ".incbin"; and ELF,
because of the syntax of the ".size" directive.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Streamline/shrink some needless JTAG stuff:
- Use #defines for the JTAG instructions; they can't ever change
- Remove an unused (!) shadow of tap->ir_length
- Stop using a copy of target->tap
- Don't bother saving the variant after sanity checking ir_length
Also, make target_create() work as on other targets: build the
register cache later, making init_target() no longer be a NOP.
Handle malloc failure; remove a comment that was obsoleted by the
not-so-new target syntax.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Remove unused and deprecated (in the arch spec) mode for loading
code into the *main* icache (vs the "mini" icache). Disable some
extremely noisy (and rarely useful) low-level debug messages
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Declare almost everything as static.
Move stuff to remove most forward references.
Remove most forward declarations.
Warn if the unimplemented register functions get called.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Just fill out the rest of the cache line with NOPs; don't change
the record of how much data we consumed. Otherwise the count of
how much data is left can roll over from positive to negative
("VERY positive") and skip the loop termination of zero.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add a header comment referencing useful XScale specs.
Make most data static, and the tables readonly.
Scrub extra blank lines.
Return fault codes from one routine.
Remove a needless NOP methood.
(BUGFIX) When we update R0, mark R0 as dirty/valid ... not R15/PC!
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Fix formatting and layout bugs in the new "translating configuration
files" bit. Make it a section within the chapter about config files.
Add a crossreference.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
We added two overridable procedures; document them, and the
two jtag arp_* operations they necessarily expose.
Update the comment about the jtag_init_reset() routine; it's
been obsolete for as long as it's had SRST support.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Startup now mostly works, except that the initial target state
is "unknown" ... previously, it refused to even start.
Getting that far required fixing the ircapture value (which
can never have been correct!) and the default JTAG clock rate,
then providing custom reset script.
The "reset" command is still iffy. DCSR updates, and loading
the debug handler, report numerous DR/IR capture failures.
But once that's done, "poll" reports that the CPU is halted
(which it shouldn't be, this was "reset run"!), due to the
rather curious reason "target-not-halted".
Summary: you still can't debug these parts, but it's closer.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This abstracts the "jtag arp_init-reset" call into a method
called from OpenOCD startup and reset processing.
Platforms which have different requirements for how such hard
resets must be performed can now override "init_reset" instead
of needing to rebuild custom hacked versions of the server.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This is clearly noted in the hardware spec (section 5.2.3); it
works around a chip erratum: "If the MPU_RESET signal is used,
it may cause the EMIFS bus to lock."
I seem to have a board with such an initial build. The chip
is labeled XOMAP. Presumably, parts without that "X" prefix
(eXperimental) resolve this.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Observed:
openocd: core.c:318: jtag_checks: Assertion `jtag_trst == 0' failed.
The issue was that nothing disabled background polling during calls
from the TCL shell to "jtag_reset 1 1". Fix by moving the existing
poll-disable mechanism to the JTAG layer where it belongs, and then
augmenting it to always pay attention to TRST and SRST.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Among other things this causes startup errors to kick in the
fallback "reset harder" logic during server startup. Comments
are also updated a bit, explaining what the various error paths
signify (in at least my observation).
There's one class of validation error that we can still plausibly
ignore: when wrong IDCODE values are observed.
This change seems to have helped make an OMAP5912 behave much
more reliably. There's still some post-reset flakiness, but
it's unrelated to scan verification.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Without some extra delay after releasing SRST, we seemed to
be trying to talk to the TAP before it was ready to respond.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Also, talk about "mainline" not "trunk".
The release.txt and release.sh files need more updates.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2825 b42882b7-edfa-0310-969c-e2dbd0fdcd60
At least some FT2232 based adapters don't necessarily come up
in the expected state, with SRST and TRST disabled. Since
other adapters could suffer the same problem, let's avoid
needing to patch every driver and just force *all* adapters
to initialize those values properly at server startup.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2824 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Instead of just assuming all IDCODE-deprived TAPs violate the
JTAG spec (they don't!), just require TAPs with such problems
to be declared with proper ircapture/irmask values. Example,
with mask and value of zero.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2823 b42882b7-edfa-0310-969c-e2dbd0fdcd60
It had a very little bit of content; move that to the more extensive
chapter on config file guidelines, and give more current "ls" output
to show the available library code.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2820 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- revert to previous default: don't talk JTAG during SRST
- add "srst_nogates" flag, the converse of "srst_gates_jtag"
- with no args, display the current configuration
And update the User's Guide text with bullet lists to be a bit more clear.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2818 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- The guess-rev.sh script is now a tweaked version of "setlocalversion" as
seen in Linux, U-Boot, and various other projects. When it finds source
control support (git, hg, svn) it uses IDs from there. Else (specific
to this project) it reports itself as "-snapshot", e.g. from gitweb.
I verified this new "guess-rev.sh" script runs under Cygwin.
- Also update the generic version strings to be like "0.3.0-dev" (during
development) instead of the very long "0.3.0-in-development". These also
show up in the PDF docs. For better tracking, we might eventually change
these strings to include the version IDs too.
- Change the startup banner version strings so they include the guess-rev
output. Development and release versions with GIT will be like
Open On-Chip Debugger 0.3.0-dev-00282-g7191a4f-dirty (2009-10-05-20:57)
Open On-Chip Debugger 0.3.0 (2009-10-05-20:57)
instead of the previous SVN-specific (even when using git-svn!)
Open On-Chip Debugger 0.3.0-in-development (2009-10-05-01:39) svn:exported
Open On-Chip Debugger 0.3.0 (2009-10-05-01:39) Release
git-svn-id: svn://svn.berlios.de/openocd/trunk@2809 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Bugfix the error message so it shows the disliked value, and add
a debug message showing each TAP's IR capture value, all N bits.
This just changes diagnostics ... it still ignores the parameters
given to us at TAP declaration time.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2801 b42882b7-edfa-0310-969c-e2dbd0fdcd60
The model is that this fires after scanchain verification, when it's
safe to call "jtag tapenable $TAPNAME". So it will fire as part of
non-error paths of "init" and "reset" command processing. However it
will *NOT* trigger during "jtag_reset" processing, which skips all
scan chain verification, or after verification errors.
ALSO:
- switch DaVinci chips to use this new mechanism
- log TAP activation/deactivation, since their IDCODEs aren't verified
- unify "enum jtag_event" scripted event notifications
- remove duplicative JTAG_TAP_EVENT_POST_RESET
git-svn-id: svn://svn.berlios.de/openocd/trunk@2800 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- don't needlessly export this function
- handle "case 0" debug method-of-entry better (silent by default)
The "case 0" is a valid debug entry mode so it doesn't deserve the
warning int now gets. But it probably means that OpenOCD confused
itself somehow; or that it confused the ARM9EJS target.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2799 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- ETB
* report _actual_ hardware status, not just expected status
* add a missing diagnostic on a potential ETB setup error
* prefix any diagnostics with "ETB"
- ETM
* make "etm status" show ETM hardware status too, instead of
just traceport status (which previously was fake, sigh)
- Docs
* flesh out "etm tracemode" docs a bit
* clarify "etm status" ... previously it was traceport status
* explain "etm trigger_percent" as a *traceport* option
ETM+ETB tracing still isn't behaving, but now I can see that part of
the reason is that the ETB turns itself off almost immediately after
being enabled, and before collecting any data.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2790 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Improve and clarify the wording of the introduction.
- Add section on version taggging.
- Some other minor corrections.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2788 b42882b7-edfa-0310-969c-e2dbd0fdcd60
The release process itself does not use this support yet, but it allows
packagers to automate the process of managing their own tags, if they
patch the source code before releasing binaries. The release processes
should be revised to incorporate this feature to support -rc packages.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2786 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- The NEWS step failed due to an empty commit comment.
- The final release step would have failed, because the steps to switch
from the secure to insecure repository (and back again) require both
switch and a URL relocation steps
git-svn-id: svn://svn.berlios.de/openocd/trunk@2782 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Don't issue needless JTAG resets ... only do them after
errors. Normal exit now leaves every TAP in BYPASS.
- Fix an unlikely memory leak on one fault path.
- Remove the oddball limitation that invalid capture LSBs
trigger errors only for TAPs that support IDCODE.
Re the JTAG reset: there are too many of them, and they can
(and do!) change system state. So the needless ones should
get removed. This one was especially pointless.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2777 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Commands were supposed to have been "arm11 memwrite ..."
not "memwrite ..."
- Get rid of obfuscatory macros
- Re-alphabetize
- Add docs for "arm11 vcr"
git-svn-id: svn://svn.berlios.de/openocd/trunk@2776 b42882b7-edfa-0310-969c-e2dbd0fdcd60
When the OpenOCD server starts up it records its state as TAP_RESET,
even though it could be anything. Then when it starts to examine
the scan chain, it calls jtag_add_tlr() which sees it doesn't have
any work to do, and so it does nothing. This can make the next
operations fail because they start from the wrong TAP state...
Instead of caring about the current recorded state, always enter
TAP_RESET by forcing five clocks with TMS high.
(NOTE: it seems most other JTAG adapter drivers have this same bug.)
git-svn-id: svn://svn.berlios.de/openocd/trunk@2763 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Change the handling of the "-ircapture" and "-irmask" parameters
to be slightly more sensible, given that the JTAG spec describes
what is required, and that we already require that conformance in
one place. IR scan returns some bitstring with LSBs "01".
- First, provide and use default values that satisfy the IEEE spec.
Existing TAP configs will override the defaults, but those parms
are no longer required.
- Second, warn if any TAP gets set up to violate the JTAG spec.
It's likely a bug, but maybe not; else this should be an error.
Improve the related diagnostics to say which TAP is affected.
And associated minor fixes/cleanups to comments and diagnostics.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2758 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Ready for discussion and tiny patches that tries out this scheme.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2755 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Added gdb_sync feature that allows GDB to sync up to target state.
Issue "monitor gdb_sync" and the next stepi, will return immediately
with updated register values to GDB.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2754 b42882b7-edfa-0310-969c-e2dbd0fdcd60
make sure that when there are two or more targets, their
various pre/post event reports are correctly ordered.
Previously, only the first target always saw its "pre"
method before SRST was asserted or deasserted.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2753 b42882b7-edfa-0310-969c-e2dbd0fdcd60
only expose the registers which are actually present. They
could be missing for two basic reasons:
- This version might not support them at all; e.g. ETMv1.1
doesn't have some control/status registers. (My sample of
ARM9 boards shows all with ETMv1.3 support, FWIW.)
- The configuration on this chip may not populate as many
registers as possible; e.g. only two data value comparators
instead of eight.
Includes a bugfix in the "etm info" command: only one of the
two registers is missing on older silicon, so show the first
one before bailing.
Update ETM usage docs to explain that those registers need to be
written to configure what is traced, and that some ETM configs
are not yet handled. Also, give some examples of the kinds of
constrained trace which could be arranged.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2752 b42882b7-edfa-0310-969c-e2dbd0fdcd60
system, removes 20 non-existent registers ... but still includes
over 45 (!) ETM registers which don't even exist there ...
- Integrate the various tables to get one struct per register
- Get rid of needless per-register dynamic allocation
- Double check list of registers:
* Remove sixteen (!) non-registers for data comparators
* Remove four registers that imply newer ETM than we support
* Change some names to match current architecture specs
- Handle more register info
* some are write-only
* some are read-only
* record which versions have them, just in case
- Reorganize the registers to facilitate removing the extras
* group e.g. comparator/counter #N registers together
* add and use lookup-by-ID
git-svn-id: svn://svn.berlios.de/openocd/trunk@2751 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Add a header comment
- Line up the ETM context struct, pack it a bit
- Remove unused context_id (this doesn't support ETMv2 yet)
- Make most functions static
- Remove unused string table and other needless lines of code
- Correct "tracemode" helptext
Also provide and use an etm_reg_lookup() to find entries in the ETM
register cache. This will help cope with corrected contents of that
cache, which doesn't include entires for non-existent registers.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2750 b42882b7-edfa-0310-969c-e2dbd0fdcd60
didn't turn up earlier. Is everyone still using gcc 3.x? Or is the x86
version of gcc 4.x much more relaxed?
git-svn-id: svn://svn.berlios.de/openocd/trunk@2749 b42882b7-edfa-0310-969c-e2dbd0fdcd60
of a (NOR) flash chip: allow passing "last" as an alias
for the number of the last sector.
Improve several aspects of error checking while we're at it.
From: Johnny Halfmoon <jhalfmoon@milksnot.com>
git-svn-id: svn://svn.berlios.de/openocd/trunk@2746 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Highlight that the "post-reset" event kicks in before the
scan chain is validated, which limits what can be done
in a post-reset handler.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2745 b42882b7-edfa-0310-969c-e2dbd0fdcd60
It can be sped up later, once it's known the PLLs are active.
Note that modern tools from TI all use adaptive clocking; and
that if that's done with OpenOCD, "too fast" is also a non-issue.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2740 b42882b7-edfa-0310-969c-e2dbd0fdcd60
garbage after the expected data (from the TAPs' BYPASS or IDCODE
registers).
NOTE that there was previously some code that looked like it was
trying to do this ... which didn't work, because it was looping
over the list of expected TAPs, and never checked *after* that
list completed! That could hide some *nasty* reset issues...
Also replace a now-obsolete scanchain length test with one that
behaves correctly; and update reporting of unexpected IDCODEs.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2739 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This patch modifies an error message which, in its original state,
I find somewhat unhelpful. So a small hint was added.
Signed-off-by: Johnny Halfmoon <jhalfmoon at milksnot.com>
git-svn-id: svn://svn.berlios.de/openocd/trunk@2738 b42882b7-edfa-0310-969c-e2dbd0fdcd60
done on exit from the config stage, how JTAG clocking issues can
trigger errors there, and how to avoid such problems.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2737 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Shrink messaging during resets, primarily by getting rid of
"nothing happened" noise that hides *useful* information.
- Improve: the "no IDCODE" message by identifying which tap only
supports BYPASS; and the TAP event strings.
Related minor code updates:
- Remove two needless tests when examining the chain: we know
we have a TAP, and that all TAPs have names.
- Clean up two loops, turning "while"s into "for"s which better
show what's actually being done.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2736 b42882b7-edfa-0310-969c-e2dbd0fdcd60
for disabling TAPs. We don't actually know how to make any
JRCs which do that yet; but when we do, this will matter.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2735 b42882b7-edfa-0310-969c-e2dbd0fdcd60
and Tcl/external):
- Reorder so *both* paths (TCK/TMS or TRST) can enable TAPs with
ICEpick ... first C code flags TAPs that got disabled, then call
any Tcl code that might want to re-enable them.
- Always call the C/internal handlers when JTAG operations can be
issued; previously that wasn't done when TRST was used.
Plus some small cleanups (whitespace, strings, better messaging
during debug and on some errors) to reset-related code.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2730 b42882b7-edfa-0310-969c-e2dbd0fdcd60
avoid a duplicate test.
Plus other cleanup in the same code: be "static", sane line lengths
for source and diagnostics, and fix misleading variable names.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2725 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Erase logic:
- command invocation
+ treat "nand erase N" (no offset/length) as "erase whole chip N"
+ catch a few more bogus parameter cases, like length == 0 (sigh)
- nand_erase() should be static
- on error
+ say which block failed, and if it was a bad block
+ don't give up after the first error; try to erase the rest
- on success, say which nand device was erased (name isn't unique)
Device list ("nand list"):
- say how many blocks there are
- split summary into two lines
- give example in the docs
Doc tweaks:
- Use @option{...} for DaVinci's supported hardware ECC options
For the record, I've observed that _sometimes_ erasing bad blocks causes
failure reports, and that manufacturer bad block markers aren't always
erasable (even when erasing their blocks doesn't trigger an error report).
git-svn-id: svn://svn.berlios.de/openocd/trunk@2724 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- update comments to say so.
- update docs to clarify that the "arm9tdmi" command prefix
is a misnomer.
- bugfix some messages that wrongly assume only ARM9TDMI
based processors use this code.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2719 b42882b7-edfa-0310-969c-e2dbd0fdcd60
JTAG clocking by gating the core clock, and workarounds.
Most details are with the "halt" command, which is one
of the first places this issue will be noticed.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2718 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Update the board config for the DaVinci DM355 EVM so the reset-init
event handler does the rest of the work it should do:
- minor PLL setup bugfixes
- initialize the DDR2 controller
- probe both NAND banks
- initialize UART0
- enable the icache
git-svn-id: svn://svn.berlios.de/openocd/trunk@2699 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Cleanup some the downloaded ARM target algorithm code:
- Provide more complete disassembly of the DCC bulk write code
- Make code blocks "static const", in case GCC doesn't
- Fix some tabbing/layout issues
- Make some arm7_9_common.h flags be "bool" not "int"; and compact
the layout a bit (group most bools together)
git-svn-id: svn://svn.berlios.de/openocd/trunk@2698 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This patch adds target algorithm support for those flash devices that do not support DQ5 polling. So far they could only be programmed with host algorithm, but this was way too slow.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2682 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Infinite loop bugfix when running tap configure a second time
git-svn-id: svn://svn.berlios.de/openocd/trunk@2681 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Optionally shave time off the armv4_5 run_algorithm() code: let
them terminate using software breakpoints, avoiding roundtrips
to manage hardware ones.
Enable this by using BKPT to terminate execution instead of "branch
to here" loops. Then pass zero as the exit address, except when
running on an ARMv4 core. ARM7TDMI, ARM9TDMI, and derived cores
now set a flag saying they're ARMv4.
Use that mechanism in arm_nandwrite(), for about 3% speedup on a
DaVinci ARM926 core; not huge, but it helps. Some other algorithms
could use this too (mostly flavors of flash operation).
git-svn-id: svn://svn.berlios.de/openocd/trunk@2680 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Fix docs on ARM11 MCR and MRC coprocessor commands:
correct read-vs-write; and describe the params.
(ARM920 and ARM926 have cp15-specific commands; this
approach is more generic. MCR2, MRC2, MCRR, MCRR2,
MRRC, and MRRC2 instructions could also get exposed.)
git-svn-id: svn://svn.berlios.de/openocd/trunk@2679 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Provide an "armv7a disassemble" command. Current omissions include
VFP (except as coprocessor instructions), Neon, and various Thumb2
opcodes that are not available in ARMv7-M processors.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2676 b42882b7-edfa-0310-969c-e2dbd0fdcd60
lean up some loose ends with the ARM disassembler
- Add a header comment describing its current state and uses
and referencing the now-generally-available V7 arch spec
- Support some mode switch instructions:
* Thumb to Jazelle (BXJ)
* Thumb to ThumbEE (ENTERX)
* ThumbEE to Thumb (LEAVEX)
- Improve that recent warning fix (and associated whitespace goof)
- Declare the rest of the internal code and data "static". A
compiler may use this, and it helps clarify the scope of these
routines (e.g. what changes to them could affect).
git-svn-id: svn://svn.berlios.de/openocd/trunk@2675 b42882b7-edfa-0310-969c-e2dbd0fdcd60
By enabling this bit, the processor halts when a debug event
such as breakpoint occurs.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2668 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Abstract the orion_nand_fast_block_write() routine into a separate
routine -- arm_nandwrite() -- so that other ARM cores can reuse it.
Have davinci_nand do so. This faster than byte-at-a-time ops by a
factor of three (!), even given the slowish interactions to support
hardware ECC (1-bit flavor in that test) each 512 bytes; those could
be read more efficiently by on-chip code.
NOTE that until there's a generic "ARM algorithm" structure, this
can't work on newer ARMv6 (like ARM1136) or ARMv7A (like Cortex-A8)
cores, though the downloaded code itself would work just fine there.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2663 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Via code review by Steve Grubb <sgrubb@redhat.com>
Almost innocuous; this is value is checked later, this
check being wrong would make it check stack garbage.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2655 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Via code review by Steve Grubb <sgrubb@redhat.com>
Also minor fixes for the message from "fill": the byte
count is unsigned, not signed; and more importantly,
print the real number of bytes written
git-svn-id: svn://svn.berlios.de/openocd/trunk@2652 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Itemize the list of private customization examples
for openocd.cfg
- Add "override defaults" as a customization, specifically
for the work area (back it up or relocate it)
- Highlight some work area location issues
git-svn-id: svn://svn.berlios.de/openocd/trunk@2651 b42882b7-edfa-0310-969c-e2dbd0fdcd60
on the command line ... matching comment in add_default_dirs().
Without this it's impossible to use a private config file which
happens to have the same name as an installed one. Say, because
you're bugfixing a private copy...
git-svn-id: svn://svn.berlios.de/openocd/trunk@2649 b42882b7-edfa-0310-969c-e2dbd0fdcd60
defining ntrst_delay is pointless; don't.
At least the LM3S3748 eval board doesn't need nsrst_delay
either; remove that too.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2645 b42882b7-edfa-0310-969c-e2dbd0fdcd60
that were added after ARMv5TE was defined:
- ARMv5J "BXJ" (for Java/Jazelle)
- ARMv6 "media" instructions (for OMAP2420, i.MX31, etc)
Compile-tested. This might not set up the simulator right for the
ARMv6 single step support; only BXJ branches though, and docs to
support Jazelle branching are non-public (still, sigh).
ARMv6 instructions known to be mis-handled by this disassembler
include: UMAAL, LDREX, STREX, CPS, SETEND, RFE, SRS, MCRR2, MRRC2
git-svn-id: svn://svn.berlios.de/openocd/trunk@2644 b42882b7-edfa-0310-969c-e2dbd0fdcd60
With DCCR we are asking the CPU to halt, we should wait until
the CPU has halted before proceeding with the operation.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2638 b42882b7-edfa-0310-969c-e2dbd0fdcd60
the ITR register but it will only be executed when the DSCR[13]
bit is set. The documentation is a bit weird as it classifies
the DSCR as read-only but the pseudo code is writing to it as
well. This is working on a beagleboard.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2634 b42882b7-edfa-0310-969c-e2dbd0fdcd60
instruction to be finished. This comes from the pseudo code
of the cortex a8 trm.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2632 b42882b7-edfa-0310-969c-e2dbd0fdcd60
"next iteration" step with the rest of the loop overhead.
Cleanup: remove spurious whitespace, and an overlong line;
only assign "tap->hasidcode" once.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2631 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Bugfixes:
* internal osc: it's *12* MHz (not 15 MHz) on _current_ chips
+ except new Tempest parts where it's 16 MHz (and calibrated!)
+ or some old Sandstorm ones, where 15 MHz was valid
* crystal config:
+ read and use the crystal config, don't assume 6 MHz
+ know when that field is 4 bits vs 5
* an RCC2 register may be overriding the original RCC
+ more clock source options
+ bigger dividers
+ fractional dividers on Tempest (NYET handled)
* there's a 30 KHz osc on newer chips (for deep sleep)
* there's a 32768 Hz osc on newer chips (for hibernation)
- Cosmetic
* say "rev A0" not "vA.0", to match vendor docs
* don't always report master clock as an "estimate":
+ give the error bound if it's approximate, like "±30%"
+ else don't say anything
* fix whitespace and caps in some messages
* these are not AT91SAM chips!!
Those clock issues might explain problems sometimes reported when
writing to Stellaris flash banks; they affect write timings.
That 12-vs-15 MHz issue is problematic; there's no consolidated doc
showing which chips (and revs!) have which internal oscillator speed.
It's clear that only older silicon had the faster-and-less-accurate
flavor. What's less clear is which chips are "old" like that.
Lightly tested, on a DustDevil part.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2626 b42882b7-edfa-0310-969c-e2dbd0fdcd60
For ARMv4/ARMv5:
- better command parameter error checking
- don't require an instruction count; default to one
- recognize thumb function addresses
- make function static
- shorten some too-long lines
For Cortex-M3:
- don't require an instruction count; default to one
With the relevant doc updates.
---
Nyet done: invoke the thumb2 disassembler on v4/v5,
to better handle branch instructions.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2624 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Unify the handling of the req_srst parameter, and rip out a
large NOP branch and its associated FIXME. (There didn't seem
to be anything that needs fixing; but that was unclear since
the constraints were scattered all over the place not unified.)
git-svn-id: svn://svn.berlios.de/openocd/trunk@2623 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Unify the handling of the req_tlr_or_trst parameter. Basically,
JTAG TMS+TCK ops ("TLR") is always used ... unless TRST is a safe
option in this system configuration.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2622 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Track whether TRST and/or SRST actually change:
* If they're not changing, don't ask the JTAG adapter to do anything!
(JTAG TCK/TMS ops might still be used to enter TAP_RESET though.)
* Don't change their recorded values until after the adapter says it
did so ... so fault paths can't leave corrupt state.
* Detect and report jtag_execute_queue() failure mode
* Only emit messages saying what really changed; this includes adding
an omitted "deasserted TRST" message.
* Only apply delays after deasserting SRST/TRST if we *DID* deassert!
- Messages say "TLR" not "RESET", to be less confusing; there are many
kinds of reset. (Though "TLR" isn't quite ideal either, since it's
the name of the TAP state being entered by TMS+TCK or TRST; it's at
least non-ambiguous in context.)
So the main effect is to do only the work this routine was told to do;
and to have debug messaging make more sense.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2621 b42882b7-edfa-0310-969c-e2dbd0fdcd60
reset operations. Maybe they can't; or it's a "not yet" thing.
Note that the assert/deassert operations can't yet trigger for
OMAP3 because resets currently include JTAG reset in all cases,
resetting the ICEpick and thus disabling the TAP for Cortex-A8.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2620 b42882b7-edfa-0310-969c-e2dbd0fdcd60
the values that are written in the mini-IC (plus documentation updates that
describe why this is needed).
git-svn-id: svn://svn.berlios.de/openocd/trunk@2613 b42882b7-edfa-0310-969c-e2dbd0fdcd60
nonfunctional cortex_a8 code with something that at least basically
works (for halt/step/resume, without MMU) even if it is incomplete.
(With tweaks from Øyvind, and cleanup from Dave.)
This code has mainly been developed and tested against R1606, it has
been built and tested against R2294 where it runs but step and resume
commands are broken due to regression (which should be fixed now).
This code is really written for OMAP3530. It doesn't identify debug
resources using generic DAP calls to scan the ROM table, or perform
topology detection. The OMAP3530 DAP exposes two memory access ports:
- Port #0 is connected to L3 interconnect (the main bus) with
passthrough to the L4 EMU bus ... so it will be used for most
memory accesses.
- Port #1 is connected to a dedicated debug bus (L4 EMU), with
access to L4 Wakeup, and holds the ROM table ... so it must
be used for most debug and control operations.
The are some defines to handle this in cortex_a8.c, which should be
replaced with more general code. Having access to another Cortex-A8
implementation would help get that right.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2609 b42882b7-edfa-0310-969c-e2dbd0fdcd60
and seed it with DAP access support using the current ADIv5 code.
(With tweaks and cleanup from Øyvind and Dave.)
The ARMv7-AR architecture manual is not publicly available (even
in subset form like the ARMv7-M spec), so it's hard to distinguish
between the Cortex-A8 implementation and the ARMv7-A architecture.
The register set presumably is architectural, and so it's stored
here; it's like earlier ARMs, with small additions. Ditto the
instruction set, though Thumb2 support is used (extending Thumb
support from ARMv6 with more 32-bit instructions) and there's this
ThumbEE thing too. There is a new "debug monitor" mode, not yet
fully addressed here, to support debugging in environments (like
motor control) where halting debug mode is inadvisable.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2608 b42882b7-edfa-0310-969c-e2dbd0fdcd60
The trunk is currently broken for interfaces without
the speed_div function (interface specific clock speed
value to kHz conversion). Example: parport.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2605 b42882b7-edfa-0310-969c-e2dbd0fdcd60
SVF file, making OpenOCD compatible with files generated by
Altera Quatrus II 9.0.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2600 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- warning now issued if high speed ftdi device found and openocd was built using an old driver
git-svn-id: svn://svn.berlios.de/openocd/trunk@2599 b42882b7-edfa-0310-969c-e2dbd0fdcd60
ARMv7-M: A5.3.6 Load/store dual or exclusive, table branch
GCC will generate the table branch instructions, usually with inlined
tables that will confuse this disassembler. LDREX and STREX are not
issued by GCC without inline assembly.
This means all Thumb2 instructions implemented by Cortex-M3 can now
be disassembled. Cortex-A8 cores support more Thumb2 instructions,
but most of those aren't yet publicly documented.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2598 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- spell "address" right
- list bp/wp params as optional
And make those source lines wrap at sane margins.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2596 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- AIRCR_SYSRESETREQ is generic; use it on any system where
SRST won't fly, not just on Stellaris-based ones.
- Reformat and improve comments about the Stellaris quirk; and
xref the only public docs (an email) about the issue.
It seems that *most* Stellaris chips have this problem. Tempest
parts aren't yet in general sampling; and if rev B silicon for
earlier chips exists, it's not very visible yet.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2595 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Simplify dumping of register lists by only printing cached values
if they are marked as valid. Most of the time, they are invalid;
so printing *any* value is just misleading.
Note that for ARM7 and ARM9 most EmbeddedICE registers (except for
debug status) could be cached most of the time; and their register
cache isn't maintained properly (many accesses seem to bypass that
cache code).
git-svn-id: svn://svn.berlios.de/openocd/trunk@2594 b42882b7-edfa-0310-969c-e2dbd0fdcd60
https://lists.berlios.de/pipermail/openocd-development/2009-August/009939.html
1. It can only be built with the FTD2XX driver. libftdi supports FT2232H/FT4232H
since version 0.16
2. A speed value of 0 is used as a RTCK request indicator. This clashes with the
valid clock division value 0 that provide the highest fixed clock frequency.
3. The ft2232_speed_div function return the maximum selectable frequency (30MHz)
when RTCK is activated. It should return 0.
4. The ft2232_khz function return ERROR_OK when RTCK is requested even for
devices lacking RTCK support. It should return ERROR_FAIL so the upper driver layers
can detect this and try to fallback to a fixed frequency.
5. FT2232H/FT4232H have a backward compatibility function that divide the clock
by 5 to get the same frequency range as FT2232D. There is no code that disable
this functionality. I can not find anything about if this is enabled or disabled by default.
I think it is safest to actively disable it.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2591 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Change jtag_rclk behaviour so it can be called before the interface init function
git-svn-id: svn://svn.berlios.de/openocd/trunk@2590 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- remove endianness options; these chips hard-wire "little"
- $_TARGETNAME updates:
* don't pass $_TARGETNAME where a TAP label is required
* flash config uses $_TARGETNAME (it might not be target #0)
* simplify one $_TARGETNAME construction
- update work area setup:
* remove VM spec; these chips have no VM!
* fix some wrong sizes (0x4000 == 16K, not 4K)
* simplify: take defaults
- comment fixups
git-svn-id: svn://svn.berlios.de/openocd/trunk@2589 b42882b7-edfa-0310-969c-e2dbd0fdcd60
issue with this is that the core debug support uses this
mechanism, then trashes its state over reset. Users can
Work around that (for now) by re-assigning the desired
config after reset.
Also fixes "target halted due to target-not-halted" goof.
When we can't describe the reason using OpenOCD's limited
vocabulary, say "reason undefined" instead of saying it's
not halted.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2588 b42882b7-edfa-0310-969c-e2dbd0fdcd60
arrays (error prone) or assume all registers are 32-bits wide (they can
have fewer bits); don't use spaces in register names, so they can be
passed more easily to the "reg" command.
Minor updates for ARM9 vector_catch support: it's an 8-bit value. This
seems to help this core's vector_catch command work a bit better; but its
behavior wih the register cache is still goofy.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2587 b42882b7-edfa-0310-969c-e2dbd0fdcd60
display them as 32 bits unless that's their true size.
(Removes some confusion.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2586 b42882b7-edfa-0310-969c-e2dbd0fdcd60
OpenOCD was able to access only to chips attached to first EMIF
chipselect. This patch fixes chipselect management code and allows
OpenOCD to access to NAND devices attached to any EMIF CS line.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2585 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Add flash programming support for NXP LPC1700 cortex_m3 based family
git-svn-id: svn://svn.berlios.de/openocd/trunk@2579 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Warn about anyone using "jtag_speed" commands; that command is obsolete, and will someday be removed.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2578 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- revert patch from rev1507 as it was causing reset issues with arm9 cores
git-svn-id: svn://svn.berlios.de/openocd/trunk@2574 b42882b7-edfa-0310-969c-e2dbd0fdcd60
A5.3.11 Data processing (shifted register)
The usual kinds of problems; the most noteworthy were that
the "S"et flags bit was mis-handled in these instructions.
---
This is the last patch from a quickie set of tests covering all
encodings of the instructions with 32-bit opcodes. There may
be some corner cases left, plus the instructions that aren't
yet handled, but the Thumb2 disassembler is no longer just
"lightly" tested with GCC output ... the new code paths have
mostly been verified.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2568 b42882b7-edfa-0310-969c-e2dbd0fdcd60
A5.3.5 Load/store multiple
A5.3.7 Load word
There was a longstanding bug in Thumb-1 LDM; the rest of the LDM/STM
fixes are just using width specs to match UAL syntax, except for two
opcode name typos. Load word had two bitmask goofs.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2567 b42882b7-edfa-0310-969c-e2dbd0fdcd60
A5.3.8 Load halfword, unallocated memory hints
It's mostly the usual sort of bitmasking goofage and getting the
width specs right. In one case an older x86 GCC generated bad code
unless I structred a conditional differently (sigh).
git-svn-id: svn://svn.berlios.de/openocd/trunk@2566 b42882b7-edfa-0310-969c-e2dbd0fdcd60
A5.3.5 Load/store multiple
A5.3.7 Load word
There was a longstanding bug in Thumb-1 LDM; the rest of the LDM/STM
fixes are just using width specs to match UAL syntax, except for two
opcode name typos. Load word had two bitmask goofs.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2565 b42882b7-edfa-0310-969c-e2dbd0fdcd60
ARMv7-M arch manual:
A5.3.1 Data processing (modified immediate)
A5.3.3 Data processing (plain binary immediate)
A5.3.4 Branches and miscellaneous control
and other (immediate) encodings referenced there. Several of
these just tweak the new syntax ("Unified" ARM/Thumb: UAL) but
there were a few bugs too.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2564 b42882b7-edfa-0310-969c-e2dbd0fdcd60
with testcases covering several new encodings in these sections
of the ARMv7-M arch manual:
A5.3.12 Data processing (register)
A5.3.13 Miscellaneous operations
A5.3.14 Multiply, and multiply accumulate
A5.3.15 Long multiply, long multiply accumulate, and divide
The issues were mostly in '12 and '13; some new related 16-bit
opcodes had issues too.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2563 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Dump SP on poll, and show whether it's MSP or PSP.
Thread mode can use either stack pointer, so this is
part of the state that's not yet displayed.
Shrink some lines.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2555 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Clean up treatment of registers in ARMv7-M and Cortex-M3.
- At the arch level:
* Just list registers and names; don't impose core-specific
policy about how they are accessed.
* Each register has a symbol.
* Remove the register mode field (irrelevant to debugger)
- At the core/implementation level:
* Just map the registers to their relevant access methods;
don't require the arch level to say how that should work
(cores other than Cortex-M3 could do it differently).
* Don't use undefined bits from register 20.
* Use register IDs that are part of the ARMv7-M interface.
In short, there's now a real distinction between the arch
and core layers.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2554 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Minor updates to the Thumb2 disassembly:
- Bugfixes:
* Distinguish branch from misc via "!=" not "=="
* MRS register shift is 8 bits (vs MSR being 16)
- Format tweaks:
* CPS needed tab (not space)
* add commma before some shifts
* add space after comma in LDM/STM
* use ".W" width spec on various instructions
git-svn-id: svn://svn.berlios.de/openocd/trunk@2553 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Revert parts of the previous ARMv7-M register patch.
It turns out that part of the issue is a documentation
problem for the Cortex-M3 r1 parts. So for the rest,
simpler fixes are possible (in followup patch).
git-svn-id: svn://svn.berlios.de/openocd/trunk@2552 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- fix issue when multiple flash chips are connected, eg. x16 x 2 on 32bit mcu bus
git-svn-id: svn://svn.berlios.de/openocd/trunk@2551 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Move the dap command handler implementations to arm_adi_v5.c,
leaving just thin wrappers in armv7m.c. There should be no
change in functionality here. (From Magnus.)
Minor style cleanup: whitespace, line length, etc. Update spec
references to use docs which are currently available. (From Dave.)
git-svn-id: svn://svn.berlios.de/openocd/trunk@2544 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Some cleanup of the ARMv7-M support:
- Reference the relevant ARMv7-M ARM doc (DDI 0405C to non-Vendors), and
update the Cortex-M3 doc refs (DDI 0337C is no longer available).
- Those registers aren't actually general, and some are incorrect (per all
public docs anyway). Update comments and code accordingly.
* What the Core Debug facility exposes is *implementation-specific*
not architectural. These values aren't fully portable. They match
Cortex-M3 ... so no current implementation will make trouble, but
the next v7m implementation might.
* Four of the registers are actually not exposed that way. Before
Cortex-M3 r2p0 they are read/written through MRS/MSR instructions.
In that newest silicon, they are four bytes in one register, not
four separate registers.
- Update the CM3 code to report when that one register is available,
and not try to access it when it isn't. Also declare the register
numbers that an eventual MRS/MSR solution will need to be using.
- Stop line wrapping the exception labels.
So for parts before r2p0 OpenOCD behavior is effectively unchanged, and
still buggy; but for those newer parts a few things might now be correct.
Most current Cortex-M3 parts use r1p1 (or earlier); this seems to include
most LM3S parts and all STM32 parts. Parts using r2p0 are available, and
include fourth generation LM3S parts ("Tempest") plus AT91SAM3 and LPC17xx
parts which are now sampling.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2543 b42882b7-edfa-0310-969c-e2dbd0fdcd60
More instructions decoded:
A5.3.5 Load/store multiple
The preferred PUSH/POP syntax is shown when appropriate.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2539 b42882b7-edfa-0310-969c-e2dbd0fdcd60
More instructions decoded:
A5.3.14 Multiply, and multiply accumulate
A5.3.15 Long multiply, long multiply accumulate, divide
The EABI requires *adjacent* register pairs, but the long multiply
ops can use any pair of registers; interesting.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2538 b42882b7-edfa-0310-969c-e2dbd0fdcd60
More Thumb2 32-bit opcode support:
A5.3.10 Store single data item
Byte, word, halfword. Offset, pre-index, post-index. And
a "make like you're unprivileged" option when using small
immediate offsets.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2537 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Print old-style Thumb NOP instructions as such. (GCC uses "mov r8, r8"
instead of the architected NOP which is new in Thumb2.)
git-svn-id: svn://svn.berlios.de/openocd/trunk@2536 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Make disassembly of the Thumb load-literal instruction show the
address of the literal being loaded (so users can avoid doing
that math themselves). Add and use an Align(PC,4) utility.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2535 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Make the Thumb2 disassembler handle more 32-bit instructions:
A5.3.3 Data processing (plain binary immediate)
These use mostly twelve bit literals, but there are also bitfield
and saturated add primitives.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2534 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Make the Thumb2 disassembler handle more 32-bit instructions:
A5.3.1 Data processing (modified immediate)
My small sample shows GCC likes to use many of these instructions.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2533 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Make the Thumb2 disassembler handle a bunch of 32-bit instructions:
A5.3.4 Branches and miscellaneous control
Note that this shifts some responsabililty out of helper functions,
making the code and layout simpler for 32-bit decoders: they only
need to know how to format the instruction and its parameters.
Also, technical note: with this patch, Thumb1 decoders could now
call the Thumb2 decoder if they wanted to get nicer treatment of
the exiting 32-bit B/BLX instructions.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2532 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Change layout of Thumb disassembly to work better with Thumb2:
- Move opcode to the left, allowing space for four hex bytes:
* after address, two spaces not one tab (taking 6 spaces)
* after 2-byte opcode, four spaces before tab
- Also, after opcode mnemonic use a tab not a space, to make
operands line up
Sample output (after some patches decoding a few 32-bit instructions):
0x00003e5a 0xf4423200 ORR r2, r2, #131072 ; 0x20000
0x00003e5e 0x601a STR r2, [r3, #0x0]
0x00003e60 0x2800 CMP r0, #0x00
0x00003e62 0xd1f3 BNE 0x00003e4c
0x00003e64 0xf008fa38 BL 0x0000c2d8
The affected lines of code now wrap at sane margins too.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2531 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Initial support for disassembling Thumb2 code. This works only for
Cortex-M3 cores so far. Eventually other cores will also need Thumb2
support ... but they don't yet support any kind of disassembly.
- Update the 16-bit Thumb decoder:
* Understand CPS, REV*, SETEND, {U,S}XT{B,H} opcodes added
by ARMv6. (It already seems to treat CPY as MOV.)
* Understand CB, CBNZ, WFI, IT, and other opcodes added by
in Thumb2.
- A new Thumb2 instruction decode routine is provided.
* This has a different signature: pass the target, not the
instruction, so it can fetch a second halfword when needed.
The instruction size is likewise returned to the caller.
* 32-bit instructions are recognized but not yet decoded.
- Start using the current "UAL" syntax in some cases. "SWI" is
renamed as "SVC"; "LDMIA" as "LDM"; "STMIA" as "STM".
- Define a new "cortex_m3 disassemble addr count" command to give
access to this disassembly.
Sanity checked against "objdump -d" output; a bunch of the new
instructions checked out fine.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2530 b42882b7-edfa-0310-969c-e2dbd0fdcd60
1) Only archive NEWS file on major and minor relesae, not bug-fixes.
2) Switch back to correct development branch during final release step.
3) Add do_svn_switch helper to ensure package variables are reloaded.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2516 b42882b7-edfa-0310-969c-e2dbd0fdcd60
giving --disable-parport-ppdev to configure on some platform(s).
git-svn-id: svn://svn.berlios.de/openocd/trunk@2514 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This patch correctly identifies a running target.
Patch made a tad more palatable by David Brownell <david-b@pacbell.net>
git-svn-id: svn://svn.berlios.de/openocd/trunk@2510 b42882b7-edfa-0310-969c-e2dbd0fdcd60
on ARM9 cores, and update the DaVinci config files so they
no longer explicitly specify it.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2484 b42882b7-edfa-0310-969c-e2dbd0fdcd60
process once again and reconsider it in some detail. In doing so,
some further revisions to the process were required:
1) The URL of the repository is embedded in the released code.
- The packages need to be created from the tagged branch.
- The URL then points to where to get the tagged code.
2) Improve the instructions for NEWS handling.
- NEWS file must be updated for each release; describe that process.
- The NEWS file should be archived an recreated for each release.
3) Add detail steps for the berliOS release process.
4) Minor cleanups to release process doxygen markup.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2475 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Updates to private TAP state tables in amtjtagaccel interface driver.
The first change is the neccesary one to correct a long-standing bug that
caused the IDCODE to be shifted by one bit too many. This was caused by
an incorrect path from state RESET to state DRSHIFT.
The value of those 2 bytes were 0x8a and 0x04. This means that the
bitstream to do this transition is 0b 00100 01010 (send LSB first). This
will bring you from the reset state to the shift state; however, you
enter the shift-state twice, which explains why the ID-CODE that will be
read next will be shifted 1 bit. The fix changes these to 0x05 and 0x00.
This will send the bitstream 0b 00101 (send LSB first). This will bring
the TAP controller from the RESET state to the DRSHIFT state directly,
without entering the DRSHIFT state twice.
After checking the whole table, two other transitions were found that
could be optimized (5 bits in stead of 10 bits).
Summary off all changes:
From To Old values Old Bitstream New values New Bitstream Remarks
---- ------- ---------- ------------- ---------- ------------- -------
RESET DRSHIFT 0x8a 0x04 0b00100 01010 0x05 0x00 0b00101 1,2
IDLE DRSHIFT 0x85 0x08 0b01000 00101 0x04 0x00 0b00100 2
IDLE IRSHIFT 0x8b 0x08 0b01000 01011 0x06 0x00 0b00110 2
[1] Fixes the IDCODE bug
[2] Optimization
git-svn-id: svn://svn.berlios.de/openocd/trunk@2472 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Fix intermittent J-Link interface startup failures:
- Use usb_reset to ensure selected dongle is in known good state.
- Assert emulator reset durning status check to prevent supurious failures.
- Eliminate status check loop; not needed due to other fixes.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2471 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Provide overview of OpenOCD versioning schema.
- Outline responsibilities and authority of the release manager.
- Explain the need for flexibility in the release schedule.
- Add and refine the release process steps.
- Include tutorials for using new release script.
- Many more improvements, too numerous to list.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2462 b42882b7-edfa-0310-969c-e2dbd0fdcd60
reading the output, and both were reported in openocd.log
after making the PDF.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2449 b42882b7-edfa-0310-969c-e2dbd0fdcd60
More minor improvements to README to help polish the 0.2.0 release:
- Add note about Ubuntu 8.04 (in lieu of starting a README.Linux file).
- Fix introductory paragraph to Bulding OpenOCD
- Remove some vestigial texinfo markup.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2448 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Prepare the DaVinci PLL code to support the version 0x0E module
used in newer chips (e.g. dm365): rename the original code so
it's specific to version 0x02 PLL modules, and update the dm355evm
code to use that new name.
Fix two minor bugs in that version 2 code: sysclk3 setup used
the sysclk2 divider address (affecting video processing on dm355,
no worry for now) and sysclk2 setup had a syntax error.
Also minor fixups to dm355evm, mostly to permit use of RTCK.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2447 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Restore some whitespace that got clobbered by over-aggressive
whitepace eradication patches a while back.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2446 b42882b7-edfa-0310-969c-e2dbd0fdcd60
complement to the standard .tar.gz package. Now, pick your poison!
git-svn-id: svn://svn.berlios.de/openocd/trunk@2437 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Add some text to introduce the project to new users.
Move packaging, configuration, and compilation of OpenOCD out of
the User's Guide and into README, where it can be used by users
before configuring and compiling the documentation.
Improve notes about required Subversion repository build steps.
Add reference to the standard GNU INSTALL file.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2436 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Remove INSTALL file; automake generates a copy of the latest version.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2435 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This patch adds support for the Luminary Micro LM3S9B90 target and
LM3S9B92 Evaluation Kit. These kits include a new ft2232 adapter, the
Luminary In-Circuit Debug Interface (ICDI) Board, so this is added as a
new ft2232 layout called "luminary_icdi".
git-svn-id: svn://svn.berlios.de/openocd/trunk@2429 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Add "jtag names" command, mirroring "target names" but returning
TAP names instead of target names. This starts letting TAPs be
manipulated in scripts ... much like what works now for targets.
It's a bit limited just yet, since "jtag cget $TAPNAME" doesn't
expose all TAP attributes. "$TARGETNAME cget" is more functional.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2428 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Move repository URL output associate it with the version; they relate.
- 'openocd --version' output now appears much more terse, as expected.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2421 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Minor bugfix ... previous version was tested *with* ICEpick active.
The "-disable" can swap with "-enable"; but not with an empty string.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2418 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Remove some bogus warnings during server startup for ARM926ejs
targets that were already halted for debug ... e.g. started up
a freshly built instance.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2417 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Improve the PXA255 target config: move all that board-specific
setup to the pxa255_sst board.cfg, to which it evidently belongs
(it's the only PXA255 board now included).
Provide the PXA255 JTAG id from Intel docs, and add a comment
about how this chip is now EOL'd (last orders taken).
Note that I still can't get my old PXA255 board to work. There's
something broken in the reset sequence, which is preventing the
TAP from coming up at all. Old mailing list posts suggest this
is a longstanding bug...
git-svn-id: svn://svn.berlios.de/openocd/trunk@2416 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Warn when people (or scripts) use numeric identifiers for TAPs,
instead of dotted.name values. We want this usage to go away,
so that for example adding more TAPs doesn't cause config scripts
to break because some sequence number changed.
It's been deprecated since late 2008, but putting a warning on
this should help us remove it (say, in June 2010) by helping to
phase out old (ab)usage in config scripts.
Other than in various config files, the only code expecting such
a number was the almost unused str9xpec driver. This code was
changed to use the TAP it was passed, instead of making its own
dubious lookup and ignoring that TAP.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2415 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Minor fixup to the User's Guide, primarily related to the
handful of commands defined in "startup.tcl"; "help" was
not previously documented.
Also, be more consistent about "Config Command" definitions
(and to be explicit about that doc convention).
git-svn-id: svn://svn.berlios.de/openocd/trunk@2414 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Adds new source files to encapsulate static/dynamic module handling.
- Further work should implement the jtag_interface_modules_load routine,
to populate the jtag_interfaces list from shared libraries in a path.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2413 b42882b7-edfa-0310-969c-e2dbd0fdcd60
and some formatting issues with sam7 and stm32 keyword params.
Tweak at91sam3 docs. Remove ninth nibble from flash bank addresses,
clarify "at91sam3 show" variants and that the flash bank layout is
not needed as a parameter (unlike with sam7); formatting fixes.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2400 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Move the short chapter about JIM-Tcl earlier, so that we
can reasonably assume it's been introduced before we start
presenting things that presume such an introduction.
Plus a few minor typo-level fixes.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2355 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This should be my last significant update of the User's Guide for
this release. Mostly it's a rework of the config file chapter's
presentation of board and target config files.
- Give the new path for scripts!
- Move board-config material out of the target-config section
- Add more board-config info, notably for reset-init events
- Link out of the board-config section to NAND, NOR, and Reset chapters
- Emphasize target input vs. output naming conventions
- Other textual improvements
Plus some other updates, like adding my copyright (now that I've
basically rewritten much of this).
git-svn-id: svn://svn.berlios.de/openocd/trunk@2354 b42882b7-edfa-0310-969c-e2dbd0fdcd60
source the STM32 target config instead of using a private clone
git-svn-id: svn://svn.berlios.de/openocd/trunk@2352 b42882b7-edfa-0310-969c-e2dbd0fdcd60
an improved DM355, integrating much better HD video support,
Ethernet, and other goodies.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2351 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- issue is gdb stdin buffer gets full before we redirect openocd output
git-svn-id: svn://svn.berlios.de/openocd/trunk@2350 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This is minimal patch to support FA526 ARMv4 compatible core.
Since it is very similar to ARM920T I tried to reuse as much
code as possible.
CPU and board configs will follow soon.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2292 b42882b7-edfa-0310-969c-e2dbd0fdcd60
The PLD stuff hasn't been documented yet. It's just Virtex2 for now,
but it looks like adding others would be easy.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2273 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Clean up the PLD files:
- Get rid of some extraneous whitespace
- Make various functions static
- Wrap overlong lines
git-svn-id: svn://svn.berlios.de/openocd/trunk@2272 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Various bits of cleanup, mostly to match the style hints
I just got around to writing up.
- Various @cindex improvements
- Cross reference the command line options in a few spots,
notably for @command{debug_level}
- Clean the config file guidelines a bit:
* They're for all users, not just integrators
* Reference the interface config chapter
* Don't emphasize command line usage here
* Tweak board and target config introductory text
Plus two minor bits of cleanup: remove most date references,
and refer to the reader as "you" not "the user".
git-svn-id: svn://svn.berlios.de/openocd/trunk@2271 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Take a whack at providing some texinfo style docs.
Mostly it's just basic "how 2 write sane dox" stuff.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2270 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Update the Beagle setup:
- OMAP3530 updates:
* split ICEpick TAP enable support to its own file, for
reuse and eventually for storing other utility code
like emulation reset
* clean up, including labeling the tap as for DAP not
for the Cortex-A8 and making endianness non-variable
* add a few FIXMEs
- BeagleBoard cleanup: there's no SRST, "endstate" is gone, etc
I'm not sure I'd say it's further than "barely limping" just yet.
Key issues remain lack of Cortex-A8 support, and more complete
support for resetting.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2267 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Fix for a goofy "board" config ... reuse target/pxa270.cfg
instead of using a private copy.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2266 b42882b7-edfa-0310-969c-e2dbd0fdcd60
DM6446 config updates:
- List two more TAPs, as disabled, mostly for doc purposes
- Included basic ICEpick support, still disabled by default
- Shorten line lengths
- Use $_TARGETNAME to configure the ETM and ETB
- This ARM core don't support endianness overriding
For now, boards that can't jumper EMU0/EMU1 will need to tweak
a variable's setting.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2265 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Let jtag_call_event_callbacks() behave when the callback removes itself.
Oddly, this crashed on x86_32 but not x86_64.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2264 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Fix parsing bugs for "$target_name mww addr data [count]" ... it was
always requiring the count, instead of just defaulting it to one.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2263 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Use macro to eliminate duplicate body definitions.
- Rename okay as is_okay; add parenthesis to help "clarify" logic.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2253 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Fix a bug preventing ICEpick "enable that TAP" code from working:
the "runtest" command wrongly finished with a JTAG reset, discarding
the work the TAP enable handler just finished! Instead, JTAG should
stay in RUN/IDLE state.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2252 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Extend the internal JTAG event handlers to cover enable/disable,
and use those events to make sure that targets get "examined" if
they were disabled when the scan chain was first set up:
- Remove "enum jtag_tap_event", merge with "enum jtag_event",
so C code can now listen for TAP enable/disable events.
- Report those events so they can trigger callbacks.
- During startup, make target_examine() register a handler to
catch ENABLE events for any then-disabled targets.
This fixes bugs like "can't halt target after enabling its TAP".
One class of unresolved bugs: if the target has an ETM hooked
up to an ETB, nothing activates the ETB. But starting up the
ETM without access to the ETB registers fails...
git-svn-id: svn://svn.berlios.de/openocd/trunk@2251 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Tighten error handling on TAP enable/disable paths a bit:
- Don't enable/disable unless it's necessary. Those event
handlers could have nasty side effects...
- Don't *succeed* enables/disables if there was no code which
could have implemented that action. This prevents bugs like
wrongly acting as if the scan chain changed.
- Minor whitespace cleanup in enable/disable command code.
The big problem is still the lack of code to verify scan chains
were actually updated as requested; this adds a comment on that.
I suspect the best we can do near term will be to verify IDCODE.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2250 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Fix bug in a warning. It warned about "huge IRlength" for an
older JRC with a two bit instruction register ... wrong!
git-svn-id: svn://svn.berlios.de/openocd/trunk@2249 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Distributing FTDI's "ftd2xx" library with OpenOCD violates the
OpenOCD license (GNU GPLv2 with no exceptions).
Make that clear where that build option is presented, and don't
describe the FTDI libraries as an option for any packager. (It's
fine for personal use, of course.)
Plus some related clarifications: libftdi version 0.16 for the
new FT2232H chips (for RTCK and high speed USB); the Amontec
drivers are just ftd2xx variants.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2248 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Fix some polling issues:
- Don't background-poll disabled TAPs ... this was just a bug
waiting to happen. (And then it happened!)
- Don't fail command line polls of disabled taps; that's not any
kind of error, it's just that you can't do much. But do show
that tap-disabled status.
- Spell "continuous" correctly in the variable name. ;)
Not resolved by this patch: the need for an interlock whereby
other code (like the JTAG layer) can block all other access to
the JTAG layer, e.g. while enabling or disabling TAPs. And
that interlock needs to be timer-safe...
git-svn-id: svn://svn.berlios.de/openocd/trunk@2247 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Doc update: say "jtag newtap ... -disable" records the
state after exiting the RESET state, matching the only
implementation we're working with so far (TI ICEpick-C).
Matching code updates. Now we can be sure that the
"enabled" flag value is correct after JTAG resets.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2246 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Fix a memory leak in jtag_tap_free(): unregister the event
callback too.
Also fix the associated conceptual bug in unregistering JTAG
event callbacks: since the same callback procedure is used
many times with different callback data (a TAP handle), that
data must be considered when unregistering any callback.
This could fix some crashes after TAP registration errors,
by making sure the reset event handler doesn't scribble over
memory that's now used by something else.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2245 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Minor jtag cleanup:
- remove hidden assumption about JTAG event numbering
- move function declarations to a header
- some end'o'line whitespace
- use "calloc" not "malloc + memset"
git-svn-id: svn://svn.berlios.de/openocd/trunk@2244 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Minor updates to the text about reset configuration:
- Mention a new point that it interacts with JTAG routers;
- Talk about a "user" config file not a "system" one;
- Remove text from the "reset_config" description; instead,
cross-reference the more extensive text earlier.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2243 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Add another board ... OMAP2420 "H4" board. This won't be very widely
used with OpenOCD, but with mainline support in both U-Boot and Linux
it at least makes for a more complete set (and another testcase).
This is incomplete support in several respects. The ARM11 support is
not very deep yet; most registers aren't available, and the ETM can't
be hooked up. Plus, there's no script for OMAP-specific stuff like
setting up the SDRAM controller. Eventually the same NAND controller
driver should work with OMAP2 and OMAP3.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2242 b42882b7-edfa-0310-969c-e2dbd0fdcd60
OpenOCD doesn't actually *need* to be keeping all TCP ports
active ... creating security issues in some network configs.
Instead, let config file specify e.g. "tcl_port 0" (or gdb_port,
telnet_port) to disable that particular remote access method.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2240 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Make fast_load_image use the helper coverage the standard load_image.
- Improve whitespace in the moved lines.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2239 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Simplify argument parsing logic using switch statement.
- Use parse_u32 to ensure all values parse properly.
- Return syntax error when mode argument fails to parse.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2236 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Bug fix: return syntax error if remove called without one argument.
- Use parse_u32 to ensure address and length arguments parse properly.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2235 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Change: All local variable types are now unsigned.
- Use parse_u32 to ensure address and value parse properly.
- Use parse_uint to ensure count parses properly.
- Move variables to location of first use.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2231 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Use parse_u32 and parse_uint for address and count, respectively.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2230 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Make argument check use parse_uint to ensure value parses properly.
- Move variable declarations to location of first use.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2228 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Use unsigned type for delay variable.
- Use parse_uint to ensure delay argument parses properly.
- Bug fix: Return syntax error if more than one argument is given.
- Bug fix: Return syntax error when argument fails to parse.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2227 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Currently the "debug_level 3" command tracing ignores commands
that could return values to TCL scripts (by plugging in to a
slightly lower level of the interpreter stack).
Fix that by abstracting the tracing command and starting to
make some of those previously-untraced commands use this new
mechanism.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2224 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Move the discussion of the "scan_chain" command up to go with
the presentation of that topic in the TAP declaration chapter.
This makes the presentation of the TAP and target lists be
parallel, which will be something of an aid to understanding
that they are different (and how).
git-svn-id: svn://svn.berlios.de/openocd/trunk@2223 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Partial fix to the "long IR length" problems.
- Current code could handle up to 32 bit IR lengths with
full functionality, if it didn't just reject may of them
out of hand. So only reject clear errors, where the IR
mask (or capture instruction) needs more than IrLen bits.
- Longer IR lengths can only be handled in BYPASS mode
for now. Example: TI's DSPs use 38-bit IR lengths.
So we can't issue their IDCODE instructions...
A more complete fix would be able to issue longer instructions;
or minimally, would fail cleanly for the non-BYPASS case.
Note that this *could* make some currently broken scripts fail,
since the previous code accepted garbage values so long as
they didn't use more than 16 bits.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2222 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Move the mips32_..._read_mem calls to top-level of read_mem function.
- Change: Only perform mips_m4k_read_mem conversion when retval == ERROR_OK.
- Prevents pointless conversions of bogus read values after failures.
- Eliminate retval variable from mips_m4k_write_mem; return directly.
- Move declaration of retval variable to point of first use.
- Remove the now redundant switch statements testing size:
- argument sanitizing already covers these cases.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2220 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This patch helps fix MIPS big endian (elf32-tradbigmips) targets.
If "-endian big" is not set in target create, the endianess defaults to
little. mw and md commands will still work, but binary file loads will
have the incorrect word order loaded into memory.
The EJTAG processor access data register (PrAcc) is little endian
regardless of the CPU endianness; it is always loaded LSB first. This
is confirmed by the fact that mips_ejtag_drscan_32() uses buf_set_u32()
to load the scan field; buf_set_u32() is a little-endian formatter. For
big endian targets, data buffers have to be modified so the LSB of each
u32 or u16 is at the lower (first) memory location. If the drscan
out_value word order is set using buf_set_u32() then it makes sense to
also fixup the in_value with buf_get_u32(); a symmetry argument. This
has no affect on little endian hosts.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2219 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Use the default KHz speed setting, in case interface is not initialized.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2218 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Bug fix: Always clear high bit of USB bulk out endpoint.
- Use parse_ulong helpers to ensure numeric strings are parsed properly.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2217 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Use parse_uint helper to ensure argument is parsed properly.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2216 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Bug fix: Return a syntax error when less than two arguments are given.
- Bug fix: Use parse_u16 helper to ensure vales are parsed properly.
- Simplify loop termination logic by ensuring argc is always even.
- Move loop induction variable declaration to where it is used.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2215 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Use parse_u32 helper to ensure scan values are parsed properly.
- Clear the fields buffer to ensure partial cleanup occur correctly.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2214 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Show the port number to the user when asking for it or setting it.
- Print an error if the parport_port has already been set.
- Use parse_u16 helper to ensure the parport_port string parses correctly.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2211 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Show the port number to the user when asking for it or setting it.
- Print an error if the amt_jtagaccel_port has already been set.
- Use parse_u16 helper to ensure amt_jtagaccel_port string parses correctly.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2210 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Show the port number to the user when asking for it or setting it.
- Print an error if the parport_port has already been set.
- Use parse_u16 helper to ensure the parport_port string parses correctly.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2209 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Bug fix: Return a syntax error if more than one argument is given.
- Bug fix: Use new parse_uint helper ensure debug_level parses correctly.
- Change: Display the debug_level after it has been set.
- Simplify bounds checking of debug_level.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2208 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Use new parse_ulong to ensure duration parses as a valid number.
- Rework logic to improve readability and seliminate uperfluous braces.
- Change whitespace to improve style.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2207 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Used to improve command argument parsing of unsigned integers values.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2206 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Minor bugfix: command_print_sameline() is what the
headers declare; make the code match.
Minor improvement: make the printf format params always be const.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2205 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Rework the "Simple Configuration Files" chapter so it's more
of a quick-start "how to set up your project" tutorial:
- Say how to hook up the JTAG adapter. This will help new
users, and in any case is worth spelling out somewhere.
- Streamline the previous rather haphazard presentation,
filling in some missing holes along the way:
* Suggest "project directory" structure
* Introduce new term, "user config" file (openocd.cfg)
* Talk about more options for openocd.cfg contents
* ... and about creating new config files
* Add new topic, project-specific utilities (+examples)
- Remove too-short, yet duplicative, chapter 19
Nudge packagers a bit more strongly to send patches (including
config files) upstream.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2204 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Update "arm9tdmi vector_catch" command description to highlight both
use cases (display configuration, or first change that config) and
to explain a bit more about what this is: an alternative to using
hardware breakpoint resources.
Note that I tried this on an arm920t, but it didn't work. Set bits,
then examined them and they weren't set. And it didn't seem to act
as if vector triggering was noticed, either.
Also some minor unrelated tweaks: @ignore some unused or don't-use
event names; fix a few typos; tweak chip-specific reset descriptions.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2203 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Original patch submitted by David Claffey [dnclaffey@gmail.com].
git-svn-id: svn://svn.berlios.de/openocd/trunk@2202 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Bug fix: return a syntax error if the wrong number of arguments are given.
- Add handle_bp_command_list() and handle_bp_command_set().
- Use temporary addr variable to eliminate redundant strtoul() calls.
- Place variable declarations at their point of first use.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2196 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Add target_timer_callback_periodic_restart and target_call_timer_callback.
- Clean up and simplify logic that determines whether to call each callback.
- Move variable declarations to location of first use.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2195 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Add a doxygen block to simplify logic.
- Move declarations to point of first use.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2194 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Return syntax error unless exactly one argument is passed.
- Move variable declaration to point of first use.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2193 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Return syntax error if more than one argument is given.
- Move variables to location of first use.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2192 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Eliminate redundant calls to target_resume with addr temp variable.
- Place variables at location of first use.
- Fix minor whitespace issues.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2191 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Bug fix: return syntax error when more than one argument is given.
- Eliminate redundant calls to step callback with addr temp variable.
- Place variables at location of first use.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2190 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Tweak the csb337 code so that it doesn't enable alignment traps when
it completes the "reset init" sequence. It turns out that the current
CFI code reliably triggers such traps.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2179 b42882b7-edfa-0310-969c-e2dbd0fdcd60
other server configuration. Explain what it's about;
reference the related "$target_name curstate" method.
Update "poll" output to report whether background polling
is enabled or not.
Also fix a small typo; PC's have "complementary" tools.
Some have also "complimentary" ones; but not all.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2178 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Remove once-used XXX_FTD2XX symbols; replace with XXX_DRIVER symbols.
- Enabled when either libftdi or FTD2xx driver should be built.
- Eliminates redundant DRIVERSFILE assignment in JTAG automake input.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2177 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Consolidate all individual driver variables into DRIVERFILES.
- Eliminates all empty 'else' conditional clauses.
- Move minidriver files to top of file.
- Use MINIDRIVER conditional to build only driver(s) that will be linked.
- Eliminate superfluous whitespace.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2176 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Add new jtag_config_khz to increase encapsulation of jtag->khz call.
- Add new jtag_get_speed_readable to encapsulate of jtag->speed_div call.
- Make definition of jtag static in core.c, remove extern from tcl.c.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2171 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Move jtag_event_callbacks struct to core.c; it's an implementation detail.
- Move jtag_*_event_callbacks next to the definition of the new function type.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2169 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Define the function signature used by the JTAG event callback mechanism.
- Provide Doxygen block for new type, including TODO for its return value.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2168 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Move nvp_jtag_tap_event and jtag_tap_handle_event to tcl.c.
- Change both to be static; remove declaration of function from jtag.h.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2166 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Add accessors for setting the jtag_verify_capture_ir flag.
- Use them in handle_verify_ircapture_cpmmand
- Change variable type to bool; make it static.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2164 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Makes jtag_error static, add new get helper function for completeness.
- Improve and add documentation and style for these helpers.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2162 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Update handle_reset_config_command in tcl.c to use new helpers.
- Replace direct accesses in JTAG interface and target drivers.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2161 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Setter calls the interface driver callback to improve core encapsulation.
- Use getter in standard JTAG interface drivers and ZY1000 minidriver.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2159 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Add accessor functions to return their value.
- Use new SRST accessor in cortex_m3.c and mips_m4k.c
git-svn-id: svn://svn.berlios.de/openocd/trunk@2157 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- src/jtag/core.c: contains the low-level JTAG TAP and scanning routines.
- src/jtag/tcl.c: contains high-level JTAG TCL commands that use the core.
- Remove static keywords from routines in core.c, extern from tcl.c:
- jtag, jtag_interface global variables
- jtag_{examine,validate}_chain and jtag_tap_{init,free} functions
- Added myself to the copyright header in both of these files.
- Used 'svn cp' to add files, so versioning was preserved for both.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2149 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Move plain IR scan declaration closer to the other IR scan declarations.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2147 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Remove unused orig_n local variable.
- Merge variable declaration with first use.
- Update code to use current style guidelines.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2143 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Merge declarations of temporary variables with first use.
- Restructure logic to simplify conditional logic.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2142 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Bug fix: Use unsigned type and strtoul when parsing for position number.
- Simplify logic by returning directly when a tap is found by name.
- Reduce scope: declare temporary variables with first use.
- Bring code up to current style guidelines.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2141 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Add new error codes to encode the possible failure conditions.
- Add documentation to describe the routine's possible error codes.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2138 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Change types of tms_bits and tms_count to unsigned, eliminates a cast.
- Use moves[] only if needed; a single move can use goal_state directly.
- Declare loop induction variable inside its control statement.
- Remove retval in favor of direct returns.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2137 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Add configuration for an old AT91rm9200 board, the Cogent CSB 337.
Worth noting from the OpenOCD perspective:
- It got a real hardware trace port connector; wired up here as
much as we can, lacking inexpensive trace-aware dongles.
- This is the first in-tree use of the "arm920t cp15" command.
It adjusts the CPU clocking and enables i-cache, which gives
more than 4x speedup after booting Linux; it's visible even
just running U-Boot.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2134 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Add handle_interface_list_command, used by handle_interface_command.
- Display output of new list to command console.
- Change first index of displayed drivers to 1; it's only cosmetic.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2129 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Reduce indent: invert logic of strcmp test.
- Reduce scope: declare variables upon first use in loops.
- Reduce unsaid: compare end of table with NULL.
- Remove superfluous braces around blocks with one statment.
- Improve language that introduces the list of built-in drivers.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2128 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Add todo for removing keep_alive: is this a layering violation?
- Use jtag_set_error instead of accessing jtag_error directly.
- Remove superfluous retval temporary variable and empty return.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2127 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Use jtag_set_error instead of accessing jtag_error directly.
- Improve error language and whitespace.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2125 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Use jtag_set_error instead of accessing jtag_error directly.
- Wrap function arguments to fit everything in 80 columns.
- Move retval variable to location of first use.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2121 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Use jtag_set_error instead of accessing jtag_error directly.
- Wrap function arguments to fit everything in 80 columns.
- Move retval variable to location of first use.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2120 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Use jtag_set_error instead of accessing jtag_error directly.
- Wrap function arguments to fit everything in 80 columns.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2119 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Use jtag_set_error instead of accessing jtag_error directly.
- Wrap and rename function arguments to fit everything in 80 columns.
- Move retval variable to location of first use.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2118 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Add static inline jtag_error_clear helper to return and clear jtag_error.
- Use new helper to shrink body of function to two lines.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2117 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Make command argument require exactly one argument; do not allow extras.
- Remove superfluous whitespace at end of function.
- Wrap function arguments to fit in 80 columns.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2115 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Make command require exactly two arguments; do not allow more than two.
- Move temporary variable declarations closer to point of first use.
- Remove superfluous braces around single statments.
- Wrap to 80 column width.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2114 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Add support to display the reset delays too, like the other commands.
- Always show the values, so users can see if they are being redundant.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2113 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Fixes for error handling:
- Return a syntax error instead of calling exit(-1).
- Return error when more than one argument is provided too.
- Remove useless braces and indent after the if/return statements.
- Wrap function arguments to fit in 80 columns.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2111 b42882b7-edfa-0310-969c-e2dbd0fdcd60
should return the "is it backed up?" flag, not the work area size.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2108 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Don't let disabled TAPs be set as the current target
- Improve "targets" output:
* Remove undesirable "chain position" number; we discourage using them
* TAP and Target column updates:
+ make them long enough for current usage
+ improve labels, removing guesswork
+ "TapName" label patches scan_chain output
* Highlight the "current" target
* Display "tap disabled" as a new pseudo-state
* Update docs accordingly
git-svn-id: svn://svn.berlios.de/openocd/trunk@2107 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Check for a compiler before looking for libraries or header files.
- Initialize automake before calling other AM_ macros.
- Disable libtool shared libraries by default.
- Remove checks for unused C++, Fortran, and Java compilers.
- Remove redundant AC_CANONICAL_HOST; called by AC_PROG_LIBTOOL.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2105 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Move AC_ARG_ENABLE for secondary parallel port options:
- These macros cause their configure options to appear unconditionally,
so they should not be placed inside conditional logic.
- Groups them with primary parallel port driver option.
- Update these options to show '-' instead of '_'; both still work.
- Update command help text to show host architecture/OS requirements.
- Display a warning when these options have been provided and the
configure script will ignore the setting that the user specified.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2104 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Try to disambiguates minidriver options from "standard" driver options.
- Make minidummy symbols more explict about being a minidriver.
- Move minidummy.c into minidummy directory to put it with its header.
In configure.in:
- Improve configuration option to allow new minidriver implementations:
- Change option from --enable-minidummy to --enable-minidriver-dummy.
- Move it to the end of the list of options.
- Provides a clear pattern for future minidrivers.
- Update handling of HAVE_JTAG_MINIDRIVER_H:
- Check for external jtag_minidriver.h only with --enable-ecosboard.
- Otherwise, define it when --enable-minidriver-dummy is provided.
- Add check to ensure only one minidriver is enabled.
- When a minidriver is enabled, warn user that standard drivers are not built.
- Use proper AC_DEFINE semantics with MINIDRIVER_DUMMY.
In src/jtag/Makefile.am:
- Restructure handling of minidummy source files.
- Include minidummy driver header in the distribution.
In src/jtag/jtag.c:
- Restructure preprocessor logic to include:
- only one minidriver, or
- all configured standard drivers.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2102 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Let disabled targets be ignored during normal operation:
- In target_examine(), ignore disabled TAPs
- Reset handling must not poke at them either:
* fail $target_name arp_* operations on disabled TAPs
* in startup.tcl, don't even issue the arp_* wait ops
ZW: removed superfluous braces from the patch to target.c.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2100 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Clarify docs for the evb_lm3s811 layout: works in
two modes, not just one.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2099 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Rework chapter 12 (CPU configuration) to use @deffn, match
the code more closely, and present things more clearly.
Includes the *current* list of targets.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2097 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Various minor tweaks for the User's guide.
- Fix various minor (but repeated) typographic goofs;
- Talk about TAP "declaration" not "creation" (they exist
even if OpenOCD never learns about their board);
- Encourage board.cfg for reset config, not target.cfg
- Fill in some missing information (e.g. x16_as_x8)
- Add a cross reference to the FAQ on TAP ordering;
- Unclutter the concept index a bit (re core-specific commands)
- Provide a bit more info about TAP states
git-svn-id: svn://svn.berlios.de/openocd/trunk@2096 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Limit scope: move tap and bit_count variables to point of first use.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2090 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Factor TAP ID matching into new helper function.
- Simplifies the main jtag_examine_chain loop logic considerably.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2089 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Minor whitespace and style cleanups in body of jtag_examine_chain.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2088 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Add helper to check for the terminating ID during jtag_examine_chain.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2087 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Factor end-of-chain verfication into new helper routine.
- Change 'unexpected' local variable name to 'triggered' and type to bool.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2086 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Factor output of accepted/incorrect/expected TAP IDs into static helper.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2085 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Reduce indent: invert logic test for unexpected TAP (no IDs).
git-svn-id: svn://svn.berlios.de/openocd/trunk@2081 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Reduce indent: invert logic test for tap in jtag_examine_chain.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2080 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Move definition of maximum JTAG chain size closer to its only uses.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2079 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Move JTAG EXTRACT macros out from the middle of jtag_examine_chain.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2078 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Merge declaration of state with first use.
- Unindent and remove unnecessary 'else' block.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2077 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Purely mechanical transformations to the source files.
- Rename 'jtag_all_taps' as '__jtag_all_taps.'
- Frees original symbol name to rename the accessor function.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2061 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Factor jtag_tap_init() helper out of the end of jim_newtap_cmd.
- Factor jtag_tap_free() helper out of the error case in jim_newtap_cmd.
- Invert test to improve indentation at the end of jim_newtap_cmd.
- Improve whitespace in the newly factored functions.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2056 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Move jtag_tap_name to same location as other TAP functions; export it.
- Factor new jtag_tap_add() from jim_newtap_cmd(); appends TAP to global list.
- Move static chain position counter to global; use in jtag_NumTotalTaps().
- Use jtag_AllTaps for reading tap list, instead of accessing global directly.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2055 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- set TAR size to 12 bits for Cortex-M3.
- Original patch submitted by Magnus Lundin [lundin@mlu.mine.nu].
git-svn-id: svn://svn.berlios.de/openocd/trunk@2051 b42882b7-edfa-0310-969c-e2dbd0fdcd60
this fn has something to do with the queue, which it does not as such.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2050 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Update the "General Commands" (a.k.a. "random stuff") chapter,
and associated chunks of other text:
- Switch to @deffn and review everything that's documented
- Improve descriptions of reset events, with reference to
the setup.tcl code which issues them.
- Move one zy1000-specific command to that driver's doc.
- There is no "script" command; remove its doc.
NOTE: Some things missing from this bit of work are:
1- Reviewing the code to catch various *missing* functions,
mostly from "target.c"
2- Alphabetizing and organizing. This chapter is a real
grab-bag with no evident focus or structural principle.
3- Hole-filling and bugfixing with respect to messaging/logging.
Example, what principle could possibly justify the tcl command
output going into the server output/log instead of just the
telnet session?
4- Not just for this chapter ... but there should be a section
with descriptions of all the supported image file formats,
so every image command can just reference that section.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2039 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Remove pernicious whitespace from ft2232 driver; as usual,
end-of-line noise, but here also much line-internal stuff.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2038 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Minor cleanup of FT2232:
- make Olimex glue warn about Olimex issues instead of JTAGkey issues;
- make some data static+const;
- don't export some internal symbols.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2037 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Remove pernicious whitespace from src/jtag/*c files; mostly
the end-of-line flavor for now, although there's more.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2036 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Convert the Interface/Dongle Config chapter's section
on drivers to use the @deffn syntax, and integrate the
presentation of the driver-specific commands with the
relevant driver. Alphabetize.
Cross-checked against the code ... several adapters were
not listed, and a few commands weren't.
(Maintainers for the versaloon and zy1000 drivers would be
good candidates to add the commands missing from those
sections...)
git-svn-id: svn://svn.berlios.de/openocd/trunk@2035 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Convert the str9xpec driver info to use @deffn; alphabetize;
add the missing part_id command.
Convert the mflash support to use @deffn; alphabetize.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2034 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Update docs for most of the remaining commands in jtag.c:
- switch to @deffn
- these are just the "low level" JTAG commands
- resolve much goofage!
* remove docs for non-existent commands
* add missing docs for some existing commands
* fix incorrect docs for some commands
- just index TAP states overall, not individually
- current name is "RUN/IDLE" not "IDLE"
Cross checked against the source.
This also creates an "Interface Drivers" section, analagous to how
(NOR) Flash and NAND drivers are presented; that's not yet sorted.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2014 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Rework the TAP creation documentation.
- Try to use "TAP" not "tap" everywhere; it's an acronym.
- Update the associated "target config files" section:
* reference the "TAP Creation" chapter for details
* simplify: reference interesting multi-tap config files
* let's not forget CPU configuration (*before* workspace setup)
* streamline it a bit
* move that workspace-vs-mmu issue to a better location
- Clean up TAP creation doc mess
* switch to @deffn
* (re)organize the remaining stuff
* reference the "Config File Guidelines" chapter
- Tweak the "Target Configuration" chapter
* rename as "CPU configuration"; unconfuse vs. target/*.cfg
* bring out that it's not just there for GDB
* move TAP events to the TAP chapter, where they belong (bugfix)
git-svn-id: svn://svn.berlios.de/openocd/trunk@2013 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Cloned the src/jtag/jtag.c file to src/jtag/interface.c.
- For each for of those files, deleted the contents of the other.
- Add new source file to automake input.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2012 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Move the jtag_interface structure definition.
- Move the Cable API declarations.
- Add new header file to automake input.
The next patch will move the implementation to interface.c.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2008 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Wraps all minidriver API functions using API front-ends:
- Outlines jtag_add_dr_out() and jtag_alloc_in_value32().
- Adds interface_ prefix to existing jtag_alloc_invalue_32 routines.
- Re-inline these interface definitions in new header file.
- Re-inline parts of the (mini)driver implementations in minidriver.h.
- Replace INCLUDE_JTAG_MINIDRIVER_H with #include directives.
The next patch will finish removing '#ifdef HAVE_JTAG_MINIDRIVER_H'
from jtag.h.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2006 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- change SWJDP_IR/DR_APACC to DAP_IR/DR_APACC to conform with ARM_ADI docs.
- add swjdp->memaccess_tck field and code for extra tck clocks before accessing memory bus
- Set default memaccess value to 8 for Cortex-M3.
- Add dap memaccess command.
- document all armv7 dap cmds.
- Original patch submitted by Magnus Lundin [lundin@mlu.mine.nu].
git-svn-id: svn://svn.berlios.de/openocd/trunk@2005 b42882b7-edfa-0310-969c-e2dbd0fdcd60
v5/6 jlink seems to have an issue if the first tap move is not divisible by 8, so we send a TLR on first power up
git-svn-id: svn://svn.berlios.de/openocd/trunk@2004 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Initial support for FT2232H/FT4232H devices from FTDI.
- Add --enable-ftd2xx-highspeed option to configure script.
- Original patch submitted by Joern Kaipf <lists@joernline.de>.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1998 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Moves references to global jtag interface to default core implementation.
- Missed this reference in the earlier "pointless" patch. Mea culpa.
Important: this has a side-effect. Previously, the error return inside
the interface routine short-circuited the remainder of that function
when 'init' has not been called. With this patch, the command queue
will be cleared in the case that 'init' has been called. Since that
case indicates a buggy script, this does not seem to be a problem.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1995 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Add jtag_callback_queue_reset() to reset the callback queue.
- Make interface_jtag_execute_queue() use new helper function.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1994 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Make interface_jtag_execute_queue call new helper function.
- Add default_interface_jtag_execute_queue to wrap jtag interface access.
This patch may look useless on its own, but it helps to isolate the core
JTAG variables from the interface_jtag_* routines, so the later can be
moved into jtag_driver.c in a pending patch.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1993 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Rename last_command_pointer as next_command_pointer, because this variable
stores the address where jtag_queue_command() will store a command pointer.
- Make that variable static, since it is only used internally in jtag.c.
- Remove superfluous accessor for that now-static variable.
- Deobfuscate use of variables in jtag_command_queue.
- Add jtag_command_queue_reset helper function.
- Use it in interface_jtag_execute_queue.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1992 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Factor jtag_add_scan_check to call new jtag_add_scan_check_alloc helper.
- Use conditional logic to define two versions of the helper.
- These helpers will be moved to other files in future patches.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1989 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Make the TCL "drscan" and "irscan" commands finish in RUN/IDLE
unless the user specifies otherwise ... usually they'd choose
something like DRPAUSE or IRPAUSE, avoiding RUN/IDLE.
The current "end" state is whatever the preceding commands left
in "cmd_queue_end_state", which to TCL scripts isn't knowable.
This change should forestall various surprises/bugs.
Also check that any "end" state specified is safe in case this
adapter's JTAG clock is free-running. For now, just issue a
warning; eventually a hard failure is probably correct.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1988 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Whitespace fixes in jtag.c ... mostly end-of-line crap.
Flag "jtag_device" command as obsolete in its helptext.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1987 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Remove two sections about deprecated/removed commands, documenting
them briefly in the chapter on deprecated/removed commands. The
"working_area" command just duplicated text; "jtag_device" wasn't
listed in that chapter before.
Also start de-emphasizing those commands. Don't index them, and
include a disclaimer that their documentation may start to vanish
about a year after the code does (e.g. in January 2010).
git-svn-id: svn://svn.berlios.de/openocd/trunk@1986 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This is the missing half of the r1974 patch:
OSK5912 board support, which was split out from
the omap5912 target config.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1985 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Uplevel the arch commands to be a chapter; they really
don't fit in the "general commands" category.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1977 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Fix minor goofage in previous doc updates:
* The ETM dummy driver name is "dummy" not "etm_dummy";
re-alphabetize.
* DCC trace message mode "charmsg" is a format type
(and what Linux needs)
git-svn-id: svn://svn.berlios.de/openocd/trunk@1976 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Various updates, mostly small/formatting changes:
* Small content tweaks:
- Re-title: "OpenOCD User's Guide".
- For users, URLS for latest doc and SparkFun forum
- Mention GIT-SVN
* Fix some front-matter goofage, matching texinfo docs:
- "paragraphintent" location matters
- put release version/date description with the copyright
* Fix some other stuff matching texinfo docs:
- no tabs
- tweak some refs and anchors
* whitespace-at-end-o-line fixes
git-svn-id: svn://svn.berlios.de/openocd/trunk@1975 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Split out OSK5912 board support from the omap5912 target config, and make
it pass sanity checks on my (Rev C/original) hardware:
- Fix syntax error ("-irlen" not "irlen")
- Provide real TAP ids for the ARM926ejs and the C55x dsp
- Label both CPUs appropriately (DSP, ARM)
- List both flash chips
The scan chain looks like this (note truncated DSP instruction code):
TapName | Enabled | IdCode Expected IrLen IrCap IrMask Instr
---|--------------------|---------|------------|------------|------|------|------|---------
0 | omap5912.dsp | Y | 0x03df1d81 | 0x03df1d81 | 0x26 | 0x00 | 0x00 | 0xffffffff
1 | omap5912.arm | Y | 0x0692602f | 0x0692602f | 0x04 | 0x01 | 0x00 | 0x0c
2 | omap5912.unknown | Y | 0x00000000 | 0x00000000 | 0x08 | 0x00 | 0x00 | 0xff
I still don't know what that third TAP is; maybe an early version of
an ICEpick JTAG router.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1974 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Remove broken whitespace ... mostly at end of line, but
also in some cases blocks of inappropriate empty lines.
And spell "comamnd" right. :)
git-svn-id: svn://svn.berlios.de/openocd/trunk@1972 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Move definition of 'struct target_type_s' into new 'target_type.h' file.
- Forward delclaration remains in target.h, with comment pointing to new file.
- Replaces #define with #include in source files.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1971 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- use continuations to break long lines of variable assignments
- makes these variables more patch-friendly and conform to style guide
git-svn-id: svn://svn.berlios.de/openocd/trunk@1970 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Add DEFINE_TARGET_TYPE_S symbol in files that need it defined.
- Forward declare 'struct target_type_s' only, unless that symbol is defined.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1969 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- replaces all calls to target->type->{add,remove}_{break,watch}point.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1967 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- replaces all accesses to target->type->name.
- add documentation in target_s to warn not to access field directly.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1966 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- replaces all calls to target->type->get_gdb_reg_list.
- add documentation in target_s to warn not to invoke callback directly.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1964 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- replaces all calls to target->type->bulk_write_memory.
- add documentation in target_s to warn not to invoke callback directly.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1963 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- replace all checks of target->type->examined with target_was_examined().
- replace all setting of target->type->examined with target_set_examined().
- replace clearing of target->type->examined with target_reset_examined().
- add documentation in target_s to warn not to access field directly.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1962 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- replaces all calls to target->type->run_algorithm.
- add documentation in target_s to warn not to invoke callback directly.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1961 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- replaces all calls to target->type->write_memory.
- add documentation in target_s to warn not to invoke callback directly.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1960 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- replaces all calls to target->type->read_memory.
- add documentation in target_s to warn not to invoke callback directly.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1959 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- fix buffer overrun in mdw; final '\0' would overflow the output buffer.
- return ERROR_COMMAND_SYNTAX_ERROR instead of ERROR_OK if:
- less than one argument is provided
- the command is called with a name other than mdb, mdh, or mdw.
- factor all command output into new handle_md_output function
git-svn-id: svn://svn.berlios.de/openocd/trunk@1958 b42882b7-edfa-0310-969c-e2dbd0fdcd60
The debugging code in jlink_tap_execute() called when _DEBUG_USB_COMMS_ is
defined was using the entire cached scan length to print the results
buffers, and not the correct length of each individual buffer.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1955 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- wordsize will always be 1, 2, or 4 due to preceeding switch statement.
- move call to keep_alive after successful writes, not upon failures
git-svn-id: svn://svn.berlios.de/openocd/trunk@1953 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Add jtag_interface_quit, factored from exit_handler() in openocd.c.
- Remove its extern declaration.
- Add static keyword to its definition.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1952 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Provide basic documentation on the ARM ETM and ETB trace commands.
Fix minor goofs in registration of the ETM commands; and whitespace
issues in the proof-of-concept oocd_trace code. (Plus include a
ref to Dominic's email saying that it's just proof-of-concept code.)
Note that I'm still not sure whether the ETM support works. But
documenting how it's expected to work should help sort out which
behaviors are bugs, which will help get bugs patched.
ZW: whitespace changes were split out of this patch but will follow.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1945 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Make it so the magic "reset_config" keywords can be provided in any
order. This eliminates needless error paths, and makes it easier
to define things at the right level (adapter, board, target).
It also includes two other behavioral changes:
(1) When "handle_reset_config" sees a parameter error, it
exits without changing anything. This is best viewed
as a bugfix. (Old behavior: restore defaults, even if
they weren't previously active.)
(2) Only the behaviors that were explicitly specified get
changed. (Old behavior: everything else gets reset to
the "default".) So for example you can now specify SRST
drive requirements without saying anything about the
three unrelated topics you previously had to specify.
That second one might cause confusion for any configs that end
up calling "reset_config" twice, so it will deserve to be called
out in the release notes. (There were no such configurations in
the current OpenOCD source tree.)
Update docs accordingly. Note that at least some versions of
the texi-to-html tools can't handle "@xref{with spaces}", but
those work properly in PDF and in the info files.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1944 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- provides low-level information about each flash API interface,
- gives driver authors some documentation about the driver interface,
- updated extensively from the original patch provided by Duane Ellis.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1942 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Provide basic documentation for some of the other flash drivers.
avr ... looks incomplete, may work with one AVR8 microcontroller
ecosflash ... can't find docs
lpc288x ... an NXP part, driver seems lpc2888-specific
ocl ... some arm7/arm9 thing, can't find docs
pic32mx ... looks incomplete, for PIC32MX (MIPS 4K) devices
tms470 ... for TI TMS470 parts
Still seems to be mostly arm7tdmi... several of these have no
users in the current tree.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1941 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Start converting the architecture-specific commands to @deffn format,
reviewing against the code.
* armv4_5 disassemble ... now documented; although Jazelle code
is not handled
* It's "armv4_5 core_state" not "core_mode"; although Jazelle state
is not handled
* arm7/9 "debug" commands ... now with other arm7_9 commands, no
longer in a separate section
* arm926ejs cp15 ... previous description was broken, it matched
the code for arm920t instead
* Have separate subsections for ARMv4/ARMv5, ARMv6, and ARMv7; the
latter are new
* Move core-specific descriptions into sub-subsections under those
architectures; XScale and ARM11 descriptions are new
The new XScale and ARM11 command descriptions surely need elaboration
and review. ARM CP15 operation descriptions in general seem to be
confused and incomplete.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1939 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Continue updating the NOR flash coverage to use @deffn syntax, so the
commands have more consistent presentation and formatting. This
reorganizes information and updates its presentation, except where
the information didn't really match the code.
This patch updates the main commands, and finishes making the section
structure parallel the NAND presentation. Of note:
- The "flash fill[whb] addr value length" commands are now documented.
- The "flash bank" command is now presented much earlier
- Explicit mention is made that NOR flash should be read using just
standard memory access commands, like "mdw" and "dump_image".
git-svn-id: svn://svn.berlios.de/openocd/trunk@1938 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Start updating the NOR flash coverage to use @deffn syntax, so the
commands have more consistent presentation and formatting. This
reorganizes information and updates its presentation, except where
the information didn't really match the code.
This patch updates most of the driver specific support, creating one
new (and alphabetized!) section just for driver-specific data, where
previously that data was split over up to three sections. Of note:
- The at91sam7 docs were a bit out of date with respect to the code.
- The "str9xpec" stuff still deserves some work. For now, it sits
in its own subsection; pretty messy.
- Likewise the "mflash" stuff. That's a parallel infrastructure,
and is now in a section of its own.
- The "mass_erase" commands for the Cortex M3 chips got turned into
footnotes. IMO, they should vanish sometime; they're superfluous.
- There are still a bunch of undocumented NOR drivers. Examples:
avr(8), tms470, pic32mx, more.
Plus there are a handful of minor tweaks to the NAND docs (to help make
the NOR and NAND presentations be parallel); the "Command Index" has
been renamed as the "Command and Driver Index"; reference TI instead
of Luminary Micro in several places.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1937 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Fix a bunch of PDF generation bugs in the texi:
* The "overfull" warnings are basically complaints about lines
that are too long, so they ran off the right margin of the
PDF documentation and turn into a "black blot".
* The "underfull" warnings are basically complaints about lines
that look ugly when they get filled, because the tokens are
so long that the line-break algorithm can't do anything good.
In a few cases the simplest fix seemed to be to use more appropriate
texi commands.
In other cases the fix was a content bugfix: "ocd_" not "openocd_";
and many of those "target variants" actually aren't recognized.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1936 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- cut out the "unknown EmbeddedICE version" message with Feroceon
git-svn-id: svn://svn.berlios.de/openocd/trunk@1934 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Silence errors about keep_alive() not being called frequently enough unless
a gdb session is active or debugging is enabled
git-svn-id: svn://svn.berlios.de/openocd/trunk@1933 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Link Scripting Overview into the TCL Primer; both need more work.
- Remove redundant OpenOCD from Scripting Overview subpage title.
- Fix incorrect tag in Doxygen style guide example.
- Fix minor typo in first introductory paragraph of main page.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1932 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This patch allows the vsllink to support very large scan sizes in DMA mode.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1926 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Move src/tcl to tcl/.
- Update top Makefile.am to use new path name.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1919 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Move src/target/{interface,target,board,test}/ into src/tcl/
- Remove existing rules in src/Makefile.am and src/target/Makefile.am.
- Add Makefile.am handling of *.cfg and *.tcl files in top Makefile.am:
- Add dist-hook to include such files under src/tcl in the distribution.
- Add install-data-hook to install contents of '$(top_srcdir)/src/tcl/'.
- Add uninstall-hook to remove the installed script files.
- Change paths to (un)install script files in '$(pkgdatadir)/scripts'.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1918 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- In the File List, these files are listed and link to empty pages.
- This patch adds @file blocks to reference the pages each file contains.
- Remove redundant "OpenOCD" from PATCHES title; it clutters the tree view.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1916 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This patch fixes a segfault when TDO was not received in XXR command:
- allocate space for the value and mask anyway
- clear the mask to zero to effectively skip the output comparison step
git-svn-id: svn://svn.berlios.de/openocd/trunk@1915 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Add svf_get_mask_u32 to generate a mask according to bitlen.
Fix this bug in other functions except for svf_check_tdo.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1914 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Update the "Reset Configuration" information in the User's guide:
- Convert to @deffn syntax
- Move tutorial text from command descriptions into new sections
- Describe several different types of JTAG-visible reset
- Expand descriptions of configuration tweaks for SRST and TRST
- Link to the "reset" command, and vice versa
- Bugfix the "reset_config" description (it didn't match the code)
Plus, be more proscriptive: do it in board config files, except for
the oddball cases where that won't work. (Current target.cfg files
seem to have much goofage there; several seem board-specific.)
git-svn-id: svn://svn.berlios.de/openocd/trunk@1913 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- add tap_state_svf_name since tap_state_name doesn't use SVF standard names
git-svn-id: svn://svn.berlios.de/openocd/trunk@1912 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Doc (mostly) update for jtag_khz:
- switch to @deffn syntax
- add entry for "jtag_rclk"
- move deprecated "jtag_speed" into collection of deprecated calls
And for ft2232, don't be the only adapter to *log* an error if RTCK
is requested; it's already reported properly, like any other nonfatal
command parameter. "jtag_rclk" just works as expected, without any
scarey messages.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1910 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Make startup for the various server ports be quiet, unless
debugging is active: don't emit needless scarey messages.
Update the relevant documentation and its references:
- For these port commands ... cover the default values;
convert to @deffn syntax; include their use outside of
the configuration stage; and alphabetize.
Similar updates to the rest of that small chapter:
- Highlight that there even *IS* a configuration stage, after
which some command functionality is no longer available.
- For GDB commands ... convert to @deffn syntax; alphabetize;
include a missing command (!); add missing helptext (!) for
one non-missing command; update relevant cross-references
and index entries.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1909 b42882b7-edfa-0310-969c-e2dbd0fdcd60
The "Illegal mode for command" diagnostic is deeply useless.
Say "Command '%s' only runs during configuration stage" instead,
letting users know what the real issue is.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1908 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Fix a bug that joined us at the last minute, when an efficient
alloca() call got swapped out for a more portable malloc().
Also log one error, to give a clue in case it appears "in the wild".
git-svn-id: svn://svn.berlios.de/openocd/trunk@1907 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This was forgotten here. All other LPC targets use
this option.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1906 b42882b7-edfa-0310-969c-e2dbd0fdcd60
When the CPU is in the WFI state, the JTAG interface simply doesn't
respond at all and initial tap examination simply fails. Let's simply
do it again when we come around to assert nSRST.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1905 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Update two oddball NAND commands to work with {offset, length}
instead of block numbers, matching the other commands as well
as usage in U-Boot and the Linux-MTD utilities.
Document them accordingly. Update the single in-tree use of
those commands (sheevaplug).
ALSO:
(a) Document the current 2 GByte/chip ceiling for NAND chipsize.
(32 bit offset/length values can't represent 4 GBytes.) Maybe
after the upcoming release, the code can switch to 64-bits.
(b) The "nand check_bad_blocks" should report "bad" blocks. They
are not "invalid" blocks; they're "bad" ones.
(c) Tweak the "nand info" command to handle the "no arguments"
case sanely (show everything, instead of showing garbage) and
not listing the blocksize in hex kbytes (duh).
git-svn-id: svn://svn.berlios.de/openocd/trunk@1904 b42882b7-edfa-0310-969c-e2dbd0fdcd60
NAND support for DaVinci-family drivers, with HW ECC support.
Declare the NAND chip on the DM355 EVM board.
Currently tested on DM355 for Linux interop using the standard
large page (2KB) chip in the EVM socket; "hwecc1" and "hwecc4"
work fine. (Using hwecc4 relies on patches that haven't quite
made it through the Linux-MTD bottlenecks yet.)
Not yet tested: 1-bit on small-page (although it's hard to see
how that could fail); 4-bit on small page (picky layout issues);
the "hwecc_infix" mode (primarily for older boot ROMs; testing
there is blocked on having new bootloader code).
git-svn-id: svn://svn.berlios.de/openocd/trunk@1903 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Fix minor issues with xrefs not liking parentheses around them.
- Change 'Building' section to 'Building OpenOCD'. It reads better.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1902 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- move Doxyfile to Doxyfile.in: type 'make Doxyfile' to recreate it
- create Doxyfile from Doxyfile.in with make rule:
- use sed substitution of $(srcdir) to location directories
- delete all doxygen created files with 'make distclean'
- include all required files (including logger.pl) in distribution
git-svn-id: svn://svn.berlios.de/openocd/trunk@1901 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Changes svf_check_tdo function (checks tdo output matches desired values):
- call buf_cmp_mask function to do comparison instead of using a loop.
- fixes a bug when data length is equal to sizeof(int).
git-svn-id: svn://svn.berlios.de/openocd/trunk@1900 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Rewrite copy to give a better introduction and overview.
- Add subpages: The List, Style Guide, Patch Policies, and Bug Reporting.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1897 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Remove style guide from user guide; moved to doxygen manual.
- Replace with improved introduction for developers and packagers.
- Move introductory paragraph about the project under the About page.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1895 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Add jtag_execute_queue in jtag_add_reset after interface_jtag_add_reset.
- Use tap_set_state to demark TAP_RESET, instead of cmd_queue_cur_state
- cmd_queue_cur_state needs to be retired.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1892 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Updates to the J-Link interface driver to support more device versions:
- Add capability detection:
- if capable, detect protocol version; otherwise, assume v2 protocol.
- if capable, detect buffer size; otherwise, assume minimal.
- Disable command result queries for devices using v2 protocol.
- Defined and use JTAG2 command with v2 protocol; JTAG3 is v3 protocol.
- Add TCL command to allow explicit setting of J-Link protocol version.
With approval, I revised the patch to make the following changes:
- add static keywords to new jlink-specific variables
- factor calculation of major_version to be more readable
- remove braces around simple one-line statements in if/else clauses
- remove (rather than #if 0) duplicate reset code; it is in SVN
- use &function to be clearer when passing function pointers
- add symbols for EMU_CMD_GET_CAPS bits; do not hard-code constants!
- almost renamed jlink_handle_jlink_hw_jtag_command (seriously?!?!)
- rewrote that function using a switch statement.
- made version request processing easier to understand and modify
- improve alternate endpoint detection:
- make code easier to read by using temporary variables
- eliminate extra level of indentation and redundant logging
- use ternary conditional to select JTAG2 or JTAG3 command
- reverse version test in jlink_usb_message to reduce indentation
- this had the biggest effect in cleaning up this patch
- use C99's ability to declare new/changed variables with less scope
- add spaces around binary operators in new/changed code
- revert other superfluous whitespace/comment style changes
git-svn-id: svn://svn.berlios.de/openocd/trunk@1889 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Remove un-implemented and dubious "nand copy" command.
Doing this efficiently would mean doing the copying on
the target CPU, instead of back and forth through JTAG.
If anyone ever needs this functionality, that's what
they should implement.
Also, update on-line "help" for "nand dump" to display
its two optional flags; and for "nand write" to display
a recently added flag.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1883 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Improve support for the DM355 EVM board, and eventually other boards based
on DaVinci chips:
- Provide generic "davinci.cfg" to hold utilities that can be reused by
different chips in this family. Start with PINMUX, PSC, and PLL setup.
- DM355 chip support updates: provide a dictionary with chip-specific
symbols, load those utilities.
- Create a new dm355evm board file, with a reset-init event handler
which uses those utilities to set up PLLs and clocks, configure the
pins, and improve the JTAG speed limit.
Also a minor tweak: provide a virtual address for the work area, matching
what the very latest kernels do. It's probably unwise to use OpenOCD while
the MMU is active though.
The DRAM isn't yet accessible, but NAND access is mostly ready.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1881 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Add a "NAND Commands" section to to the TEXI docs, covering the basic
commands except for those previously discussed as being due for removal
("nand copy") or switching to use byte offsets not block numbers.
This uses the "@deffn..." syntax for defining commands, as somewhat
suggested by the TEXI documentation, and adds a new "Command Index".
We might prefer to merge those indexes for the near term, but I think
the "@deffn" approch is probably worth switching to.
Updates a few other bits to clarify that "flash" doesn't just mean NOR.
And to fix one niggling falsity: the "reset-init" event *is* used, and
in fact it's quite important.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1879 b42882b7-edfa-0310-969c-e2dbd0fdcd60
the key command_*() helper functions, fixng the bugs that turned up.
Several of these bugs were from misuse of PRIi64; that's for 64-bit
integers, NOT for "long long" or "u64" (which work best with %lld).
git-svn-id: svn://svn.berlios.de/openocd/trunk@1873 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Increase DTC status retry count to avoid problems with STM Primer
git-svn-id: svn://svn.berlios.de/openocd/trunk@1871 b42882b7-edfa-0310-969c-e2dbd0fdcd60
-jtag.c, interface_jtag_add_dr_out():
- use pointer 'field' instead of scan->fields[field_count]
- restructure the main loop to clearly separate the two cases: TAP is not bypassed / TAP is bypassed
(this is to keep the function similar to interface_jtag_add_dr_scan())
- fix bug where only the first output field has its tap field set
- add asserts to verify that target_tap points to the one not bypassed TAP
git-svn-id: svn://svn.berlios.de/openocd/trunk@1867 b42882b7-edfa-0310-969c-e2dbd0fdcd60
-jtag.c, interface_jtag_add_dr_scan():
- use pointer 'field' instead of scan->fields[field_count]
- restructure the main loop to clearly separate the two cases: TAP is not bypassed / TAP is bypassed
- add an assert that each non-bypassed TAP receives at least one field
- add an assert that checks that no superfluous input fields were passed
git-svn-id: svn://svn.berlios.de/openocd/trunk@1866 b42882b7-edfa-0310-969c-e2dbd0fdcd60
-jtag.c, interface_jtag_add_ir_scan():
- use pointer 'field' instead of scan->fields[nth_tap]
- add assertion to ensure that input data has correct size for TAP's IR
git-svn-id: svn://svn.berlios.de/openocd/trunk@1865 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- jtag.c: consolidate output scan field initialization in scan functions
- jtag.c: add cmd_queue_scan_field_clone() to handle 1:1 field copies
- jtag.c: fix bug where only the first output field in a dr scan has its tap field set
git-svn-id: svn://svn.berlios.de/openocd/trunk@1864 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- jtag.c: Use single 'for' statement to iterate over list of TAPs in scan functions
git-svn-id: svn://svn.berlios.de/openocd/trunk@1862 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- jtag.c: consolidate all memory allocations in scan functions in one block, add out_fields pointer to set stage for further changes
git-svn-id: svn://svn.berlios.de/openocd/trunk@1861 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- add 'const' qualifier to function parameters in jtag.c that are not to be modified or freed by the function
git-svn-id: svn://svn.berlios.de/openocd/trunk@1860 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- add doxygen comments to scan commands in jtag.c
- move jtag_add_dr_scan next to interface_jtag_add_dr_scan to keep these function pairs together
git-svn-id: svn://svn.berlios.de/openocd/trunk@1859 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Bring the mips step/resume interrupt handling inline with the
rest of openocd.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1850 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- simplify code in interface_jtag_add_plain_dr_scan() by adding a local variable 'scan' to hold the scan_command_t
git-svn-id: svn://svn.berlios.de/openocd/trunk@1849 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- move scan_size in interface_jtag_add_dr_out() into the scope of the inner loop and change it to unsigned
- move loop variable j into for scope
git-svn-id: svn://svn.berlios.de/openocd/trunk@1848 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- simplify code in interface_jtag_add_dr_out() by adding a local variable 'scan' to hold the scan_command_t
git-svn-id: svn://svn.berlios.de/openocd/trunk@1847 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- move scan_size in interface_jtag_add_dr_scan() into the scope of the inner loop and change it to unsigned
git-svn-id: svn://svn.berlios.de/openocd/trunk@1846 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- simplify code in interface_jtag_add_dr_scan() by adding a local variable 'scan' to hold the scan_command_t
git-svn-id: svn://svn.berlios.de/openocd/trunk@1845 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- simplify code in interface_jtag_add_plain_ir_scan() by adding a local variable 'scan' to hold the scan_command_t
git-svn-id: svn://svn.berlios.de/openocd/trunk@1844 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- move scan_size in interface_jtag_add_ir_scan() into the scope of the inner loop and change it to unsigned
git-svn-id: svn://svn.berlios.de/openocd/trunk@1843 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- simplify code in interface_jtag_add_ir_scan() by adding a local variable 'scan' to hold the scan_command_t
git-svn-id: svn://svn.berlios.de/openocd/trunk@1842 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- rename local variable x to num_taps in interface_jtag_add_ir_scan
git-svn-id: svn://svn.berlios.de/openocd/trunk@1841 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- rename input parameters 'num_fields' and 'fields' to 'in_num_fields' and 'in_fields' in all jtag.c interface functions
git-svn-id: svn://svn.berlios.de/openocd/trunk@1840 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Added questions regarding ideas on making tcl-less builds of OpenOCD
git-svn-id: svn://svn.berlios.de/openocd/trunk@1830 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- configure.in: Add AC_TYPE_LONG_LONG_INT to detect 'long long int' support.
- configure.in: Add AC_C_CONST to provide equivalent support as jim.h.
- jim*.c: include config.h when HAVE_CONFIG_H is defined.
- jim*.{h,c}: use HAVE_LONG_LONG_INT definition from config.h.
- jim.h: Remove hard-coded const and HAVE_LONG_LONG definitions.
- jim.h: -DJIM_NO_CONST has been obsoleted; -Dconst is equivalent.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1744 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Enable doxygen's C language optimizations.
- Use dot command (from graphviz package) to generate visual graphs.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1719 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Add libtoolize step too bootstrap script; creates ltmain.sh script.
- Add AC_PROG_LIBTOOL to configure.in to add libtool support to build.
- Change Makefile.am library rules from static (_a) to libtool (_la).
- Install libopenocd.{la,so,a} in $(libdir); update openocd link rules.
- Extend MAINTAINERCLEANFILES in top-level Makefile.am to remove ltmain.sh.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1695 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Remove superfluous #include directives.
* Fix warnings and API usage to cure its bit rot.
* Build into libhelper library (for now).
Add tclapi.h to export tclapi_register_commands().
Register tclapi commands in openocd.c:setup_command_handler().
git-svn-id: svn://svn.berlios.de/openocd/trunk@1691 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Implemented new jtag sequences tap_get_tms_path and tap_get_tms_path_len
git-svn-id: svn://svn.berlios.de/openocd/trunk@1616 b42882b7-edfa-0310-969c-e2dbd0fdcd60
already required autoconf 2.59 (circa 2006), so there is no reason to
support versions of automake older than 1.6 (circa 2002).
The first part of this patch upgrades the configure.in script:
1. Use current calling conventions for the AC_INIT and
AM_INIT_AUTOMAKE macros, bringing their usage up-to-date with
the version of autoconf already specified by AC_PREREQ.
2. Add AC_CONFIG_SRCDIR macro, required by new version of AC_INIT.
3. Automatically enable all of automake's warnings except Makefile
portability (which OpenOCD violates by using GNU make's $(wildcard)).
[[ While automake has its own -Werror option, I did not enabled it
due to existing warnings. ]]
4. Add the missing AM_PROG_C_O check, required by the build rules for
openocd.o in src/Makefile.am.
5. Adjust version number to show progress toward the next release.
6. Include a bug reporting e-mail address to direct users to this list.
This patch makes the following adjustments to the Makefile.am files:
1. Update AUTOMAKE_OPTIONS to require automake version 1.6
2. Rewrite all deprecated INCLUDES assignments as AM_CPPFLAGS
3. Clean-up all AM_CPPFLAGS declarations to be patch-friendly.
4. Remove vestigial references to $(all_includes)
5. Remove erroneous references to @CPPFLAGS@ (only use AM_CPPFLAGS)
6. Remove unused -I and -D directives in helper/, flash/, target/
git-svn-id: svn://svn.berlios.de/openocd/trunk@1591 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Added support for accessport ROM table identification, dap command.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1536 b42882b7-edfa-0310-969c-e2dbd0fdcd60
when the oob_softecc option is passed to the "nand write" command.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1446 b42882b7-edfa-0310-969c-e2dbd0fdcd60
if they're the same for all LPC214x, this number is from an Olimex
LPC-H2148. The chip on that board is LPC2148FBD64.
Also fix a few cosmetic issues and comments in the file and add
more docs and pointers to the datasheet.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1427 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Explicitly mention autoconf >= 2.59 as requirement (as per
configure.in). Also automake >= 1.9 (though I'm not sure which
if that's really the minimum requirement).
- Document various missing configure options.
- Fix various typos and inconsistencies.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1426 b42882b7-edfa-0310-969c-e2dbd0fdcd60
/* Atmel primary extended query table as defined for and used by
*thelinuxkernelcfidriver(asof2.6.20+)
*/
typedefstructcfi_atmel_pri_ext_s
structcfi_atmel_pri_ext
{
u8pri[3];
u8major_version;
u8minor_version;
u8features;
u8bottom_boot;
u8burst_mode;
u8page_mode;
}cfi_atmel_pri_ext_t;
uint8_tpri[3];
uint8_tmajor_version;
uint8_tminor_version;
uint8_tfeatures;
uint8_tbottom_boot;
uint8_tburst_mode;
uint8_tpage_mode;
};
enum{
CFI_UNLOCK_555_2AA,
CFI_UNLOCK_5555_2AAA,
};
typedefstructcfi_unlock_addresses_s
structcfi_unlock_addresses
{
u32unlock1;
u32unlock2;
}cfi_unlock_addresses_t;
uint32_tunlock1;
uint32_tunlock2;
};
typedefstructcfi_fixup_s
structcfi_fixup
{
u16mfr;
u16id;
void(*fixup)(flash_bank_t*flash,void*param);
uint16_tmfr;
uint16_tid;
void(*fixup)(struct flash_bank*flash,void*param);
void*param;
}cfi_fixup_t;
};
#define CFI_MFR_AMD 0x0001
#define CFI_MFR_FUJITSU 0x0004
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