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1565 Commits

Author SHA1 Message Date
Paul Fertser
a5e526d857 The openocd-0.11.0-rc2 release candidate
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
2021-01-25 00:24:17 +03:00
Tarek BOCHKATI
6643b145dc README: add missing items for 0.11
JTAG adapters
  Cadence DPI, Cypress Kitpro, FTDI FT232R, Linux GPIOD, Mellanox rshim,
  Nuvoton Nu-Link, Nu-Link2, NXP IMX GPIO, Remote Bitbang, TI XDS110,
  Xilinx XVC/PCIe

Debug targets
  AArch64, Cortex-M (ARMv8-M), ARCv2, MIPS64, RISC-V, ST-STM8

Flash Drivers
  ATmega128RFA1, Atmel SAM, eSi-RISC, EZR32HG, MAX32, MXC, nRF52, PSoC6,
  Renesas RPC HF and SH QSPI, SiFive Freedom E, ST BlueNRG,
  STM32 QUAD/OCTO-SPI for Flash/FRAM/EEPROM, SWM050, TI CC13xx, TI CC26xx,
  TI CC32xx, TI MSP432, Winner Micro w600, Xilinx XCF

Change-Id: I341618ac5d7189e4f98268cecd66c99447b72af8
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@st.com>
Reviewed-on: http://openocd.zylin.com/6027
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2021-01-24 19:32:30 +00:00
Bohdan Tymkiv
090209275b jlink: fix device discovery when network is off
If user specifies a serial number for the jlink device, openocd
extends the search to network jlink devices too, without checking
if the host has a valid and functional network connection. If the
network is not functional, libjaylink returns error. This error
invalidates the discovery on USB, even if it was successful.

Factor-out parts of the jlink_init into separate jlink_open_device
function, use that function to firstly discover and match USB
devices and, if matching device was not found on the USB bus and
serial number was specified, repeat discovery and matching via TCP.

Fixes: https://sourceforge.net/p/openocd/tickets/294/

Change-Id: Iea0de1640d4e5b21ecc7e9c1dd6d36f214d647c2
Signed-off-by: Bohdan Tymkiv <bohdan200@gmail.com>
Reviewed-on: http://openocd.zylin.com/6025
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
2021-01-24 19:32:09 +00:00
Paul Fertser
047df63018 README.macOS: explain how to install suitable Texinfo
Change-Id: Ic5906111f412eebd906a9be3fd0e133484def3eb
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/6026
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-01-24 19:31:24 +00:00
Antonio Borneo
bd1adcffe7 configure: drop macro 'AC_HEADER_TIME'
The macro AC_HEADER_TIME has been obsoleted by autoconf 2.70.

Not all systems provide 'sys/time.h', plus some old system didn't
allowed to include both 'time.h' and 'sys/time.h' because 'time.h'
was included by 'sys/time.h' and was not properly protected to
allow multiple inclusion.
The macro AC_HEADER_TIME helps to detect such odd case.
Nowadays all the systems properly protect 'time.h', so its safe to
unconditionally include 'time.h', even if it is also included by
'sys/time.h'.

The case of systems without 'sys/time.h' is already covered by
configure.ac through the directive
	AC_CHECK_HEADERS([sys/time.h])

Remove the obsoleted autoconf macro and simplify the code by
including 'time.h' unconditionally and check HAVE_SYS_TIME_H to
include 'sys/time.h'.

Change-Id: Iddb3f3f1d90c22668b97f8e756e1b4f733367a7d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6010
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
2021-01-18 15:32:46 +00:00
Antonio Borneo
8b7569c219 configure.ac: drop macro 'AC_PROG_CC_C99' from autoconf 2.70
The macro AC_PROG_CC_C99 has been obsoleted by autoconf 2.70 and
triggers a set of warnings from both 'aclocal' and 'autoconf'.
The test of AC_PROG_CC_C99 is now included in AC_PROG_CC.

For autoconf 2.69 and earlier the macro is still required, so
cannot be simply dropped.

Use a conditional test to avoid the warning on autoconf 2.70 but
still use AC_PROG_CC_C99 on older autoconf.

Change-Id: I5e8437f5a826fb63be6d07bcb5bb824f94683020
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6009
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
2021-01-18 15:32:34 +00:00
Antonio Borneo
0b248e04c1 driver/ftdi: skip trst in swd mode
When using the adapter olimex arm-jtag-swd (to convert to SWD a
JTAG-only FTDI adapter), the pin trst on JTAG side is re-used to
control the direction of pin SWDIO on SWD side.
There is a single reset API at adapter driver to assert/deassert
either srst and/or trst. A request to assert/deassert srst can
cause also trst to change value, hanging the SWD communication.

In SWD mode, ignore the value passed to trst.

Change-Id: I5fe1eed851177d405d77ae6079da9642dc1a08f1
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6006
Tested-by: jenkins
2021-01-18 15:32:21 +00:00
Tarek BOCHKATI
2dc9c1df81 cortex_m: [FIX] ARMv8-M does not support VECTRESET
ref: Arm®v8-M Architecture Reference Manual (DDI0553B.m)
     D1.2.3: AIRCR, Application Interrupt and Reset Control Register
             Bit [0] is RES0

Change-Id: I6ef451b2c114487e2732852a60e86c292ffa6a50
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@st.com>
Reviewed-on: http://openocd.zylin.com/6014
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-01-18 15:32:03 +00:00
Tarek BOCHKATI
404993b29f target/riscv: fix build error with -Werror=maybe-uninitialized
using gcc 9.3 on ubuntu focal fossa with -Werror=maybe-uninitialized
we get this error:
  /src/target/riscv/riscv.c: In function ‘riscv_address_translate’:
  /src/target/riscv/riscv.c:1536:13: error: ‘pte’ may be used uninitialized

Change-Id: I51e180b43f9b6996e4e4058db49c179b9f81bcdc
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@st.com>
Reviewed-on: http://openocd.zylin.com/6013
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-01-18 15:31:56 +00:00
Tarek BOCHKATI
310c9800c7 flash/stmqspi: fix build error with -Werror=maybe-uninitialized
using gcc 9.3 on ubuntu focal fossa with -Werror=maybe-uninitialized
we get this error:
  /src/flash/nor/stmqspi.c: In function ‘read_flash_id’:
  /src/flash/nor/stmqspi.c:1948:6: error: ‘retval’ may be used uninitialized

Change-Id: Ifd8ae60df847fc61e22ca100c008e3914c9af79b
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@st.com>
Reviewed-on: http://openocd.zylin.com/6012
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-01-18 15:31:51 +00:00
Antonio Borneo
aaa6110d9b doc/manual/primer/autotools.txt: fix doxygen warning
Commit ab90b87778 ("configure: remove AM_MAINTAINER_MODE,
effectively always enabling all the rules") removes the configure
flag '--enable-maintainer-mode' and its documentation, but have
left a reference to the removed subsection 'primermaintainermode'
and this triggers a warning in doxygen:
	doc/manual/primer/autotools.txt:21: warning: unable to
	resolve reference to 'primermaintainermode' for \ref
	command

Remove the obsoleted paragraph.

Change-Id: I56e69ef033d546d159745bed1b47c6105827e7ae
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: ab90b87778 ("configure: remove AM_MAINTAINER_MODE, effectively always enabling all the rules")
Reviewed-on: http://openocd.zylin.com/6003
Tested-by: jenkins
2021-01-13 11:33:57 +00:00
Antonio Borneo
7e64e5a895 openocd: fix doxygen parameters of functions
Add to doxygen comment the missing parameters.
Remove from doxygen comment any non-existing parameter.
Fix the parameter names in doxygen comment to match the one in the
function prototype.
Where the parameter name in the doxygen description seems better
than the one in the code, change the code.
Escape the character '<' to prevent doxygen to interpret it as an
xml tag.

Change-Id: I22da723339ac7d7a7a64ac4c1cc4336e2416c2cc
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6002
Tested-by: jenkins
2021-01-13 11:33:53 +00:00
Antonio Borneo
4cf5ab614b openocd: fix incorrect doxygen comments
Use '@param' in front of function's parameters and '@a' when the
parameter is recalled in the description.

This fixes doxygen complains:
	warning: Found unknown command '@buff16'

While there, fix a minor typo s/occured/occurred/ in a comment and
the typo s/@apram/@param/ in a doxygen comment.

Change-Id: I5cd86a80adef552331310a21c55ec5d11354be21
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6001
Tested-by: jenkins
2021-01-13 11:33:16 +00:00
Antonio Borneo
02bd67db3f Doxyfile.in: exclude libjaylink from doxygen
When build using libjaylink as git submodule, doxygen includes the
libjaylink files and complains for multiple 'mainpage' comment
block, one in OpenOCD and the other in libjaylink:
	src/jtag/drivers/libjaylink/libjaylink/core.c:37: warning:
	found more than one \mainpage comment block! (first
	occurrence: doc/manual/main.txt, line 1), Skipping current
	block!

Exclude libjaylink submodule from doxygen.

Change-Id: I5e856817344c9f21f8c26f077a23c00b83cfbcb5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6000
Tested-by: jenkins
2021-01-13 11:33:14 +00:00
Antonio Borneo
fa476daa60 doc/manual/primer/jtag.txt: remove duplicated section name
The section name 'primerjtag' is used twice, causing doxygen to
complain:
	warning: multiple use of section label 'primerjtag',
	(first occurrence: doc/manual/primer/jtag.txt, line 107)

Rename one of them.

Change-Id: Id307915dbc51a7f647fab4fb28ab431e65344d61
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5999
Tested-by: jenkins
2021-01-13 11:33:10 +00:00
Antonio Borneo
f94495154d Doxyfile.in: fix build out-of-tree
When doxygen is built out-of-tree, it fails to find the generated
file startup_tcl.inc:
	src/openocd.c:59: warning: include file startup_tcl.inc
	not found, perhaps you forgot to add its directory to
	INCLUDE_PATH?

Add '@builddir@/src' to INCLUDE_PATH.

Change-Id: I51f2f6fe7224bba0f8b3db7219f9831de4e67139
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5998
Tested-by: jenkins
2021-01-13 11:33:07 +00:00
Antonio Borneo
a16e8ba455 flash/nor/max32xxx: fix path of include file
The relative path should have three times '..'.

Issue identified by doxygen:
	src/flash/nor/max32xxx.c:85: warning: include file
	../../contrib/loaders/flash/max32xxx/max32xxx.inc not
	found, perhaps you forgot to add its directory to
	INCLUDE_PATH?

Change-Id: Ie7b4948c6770b8acb9eff26e08eea32945ebb219
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5997
Tested-by: jenkins
2021-01-13 11:33:03 +00:00
Antonio Borneo
f83c2b0c7c doc/style: fix doxygen error
Doxygen complains about non-closed nested comments:
	doc/manual/style.txt:423: warning: Reached end of file
	while still inside a (nested) comment. Nesting level 1
	(probable line reference: 149)

This is caused by the string '/**' that is interpreted as the
beginning of a comment.

Escape the string to not let doxygen consider it as a comment

While there, replace @code/@endcode with @verbatim/@endverbatim to
properly render the line.

Change-Id: If2a27c4cf659326e317cc4ac8c0b313e97e40432
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5996
Tested-by: jenkins
2021-01-13 11:32:58 +00:00
Antonio Borneo
3fbcb26f98 udev: fix permission for Ambiq Micro EVK's
Commit 68e204f1e9 ("udev: Add rules for Ambiq Micro EVK's.") was
initially proposed as http://openocd.zylin.com/3429/ then replaced
by http://openocd.zylin.com/3980/
The initial proposal was for file '99-openocd.rules', in which
MODE="664" was the norm.
After merge of http://openocd.zylin.com/2804/ the new udev rules
in '60-openocd.rules' switched to MODE="660", but the evolution of
the above patch missed this change.

Switch udev rules of Ambiq Micro EVK's to MODE="660" and uniform
them to the rest of the file.

Change-Id: I4b4eea535184ee8569da3264bff4f1fafb5bce4d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 68e204f1e9 ("udev: Add rules for Ambiq Micro EVK's.")
Reviewed-on: http://openocd.zylin.com/6004
Tested-by: jenkins
2021-01-13 11:32:47 +00:00
Antonio Borneo
c1270bcb38 target: fix memory leak on multiple '-gdb-port' flag
In the odd case of multiple flags '-gdb-port' during 'target
create' or following 'configure', the new strdup()'ed value will
replace the old one without freeing it.

Free the old value (if it exists) before replacing it.

Change-Id: I1673346613ce7023880046e3a9ba473e75f18b8a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6005
Tested-by: jenkins
2021-01-13 11:32:34 +00:00
Jiri Kastner
e22198c152 contrib: udev file for Cypress SuperSpeed Explorer kit
lsusb output:

Bus 003 Device 011: ID 04b4:0007 Cypress Semiconductor Corp.
Couldn't open device, some information will be missing
Device Descriptor:
  bLength                18
  bDescriptorType         1
  bcdUSB               2.00
  bDeviceClass            0 (Defined at Interface level)
  bDeviceSubClass         0
  bDeviceProtocol         0
  bMaxPacketSize0         8
  idVendor           0x04b4 Cypress Semiconductor Corp.
  idProduct          0x0007
  bcdDevice            0.00
  iManufacturer           1
  iProduct                2
  iSerial                 0
  bNumConfigurations      1
  Configuration Descriptor:
    bLength                 9
    bDescriptorType         2
    wTotalLength          114
    bNumInterfaces          4
    bConfigurationValue     1
    iConfiguration          0
    bmAttributes         0xa0
      (Bus Powered)
      Remote Wakeup
    MaxPower              100mA
    Interface Association:
      bLength                 8
      bDescriptorType        11
      bFirstInterface         0
      bInterfaceCount         2
      bFunctionClass          2 Communications
      bFunctionSubClass       2 Abstract (modem)
      bFunctionProtocol       1 AT-commands (v.25ter)
      iFunction               0
    Interface Descriptor:
      bLength                 9
      bDescriptorType         4
      bInterfaceNumber        0
      bAlternateSetting       0
      bNumEndpoints           1
      bInterfaceClass         2 Communications
      bInterfaceSubClass      2 Abstract (modem)
      bInterfaceProtocol      1 AT-commands (v.25ter)
      iInterface              0
      CDC Header:
        bcdCDC               1.10
      CDC ACM:
        bmCapabilities       0x02
          line coding and serial state
      CDC Union:
        bMasterInterface        0
        bSlaveInterface         1
      CDC Call Management:
        bmCapabilities       0x00
        bDataInterface          1
      Endpoint Descriptor:
        bLength                 7
        bDescriptorType         5
        bEndpointAddress     0x83  EP 3 IN
        bmAttributes            3
          Transfer Type            Interrupt
          Synch Type               None
          Usage Type               Data
        wMaxPacketSize     0x0040  1x 64 bytes
        bInterval              10
    Interface Descriptor:
      bLength                 9
      bDescriptorType         4
      bInterfaceNumber        1
      bAlternateSetting       0
      bNumEndpoints           2
      bInterfaceClass        10 CDC Data
      bInterfaceSubClass      0 Unused
      bInterfaceProtocol      0
      iInterface              0
      Endpoint Descriptor:
        bLength                 7
        bDescriptorType         5
        bEndpointAddress     0x01  EP 1 OUT
        bmAttributes            2
          Transfer Type            Bulk
          Synch Type               None
          Usage Type               Data
        wMaxPacketSize     0x0040  1x 64 bytes
        bInterval               0
      Endpoint Descriptor:
        bLength                 7
        bDescriptorType         5
        bEndpointAddress     0x82  EP 2 IN
        bmAttributes            2
          Transfer Type            Bulk
          Synch Type               None
          Usage Type               Data
        wMaxPacketSize     0x0040  1x 64 bytes
        bInterval               0
    Interface Descriptor:
      bLength                 9
      bDescriptorType         4
      bInterfaceNumber        2
      bAlternateSetting       0
      bNumEndpoints           3
      bInterfaceClass       255 Vendor Specific Class
      bInterfaceSubClass      4
      bInterfaceProtocol      0
      iInterface              0
      Endpoint Descriptor:
        bLength                 7
        bDescriptorType         5
        bEndpointAddress     0x04  EP 4 OUT
        bmAttributes            2
          Transfer Type            Bulk
          Synch Type               None
          Usage Type               Data
        wMaxPacketSize     0x0040  1x 64 bytes
        bInterval               0
      Endpoint Descriptor:
        bLength                 7
        bDescriptorType         5
        bEndpointAddress     0x85  EP 5 IN
        bmAttributes            2
          Transfer Type            Bulk
          Synch Type               None
          Usage Type               Data
        wMaxPacketSize     0x0040  1x 64 bytes
        bInterval               0
      Endpoint Descriptor:
        bLength                 7
        bDescriptorType         5
        bEndpointAddress     0x86  EP 6 IN
        bmAttributes            3
          Transfer Type            Interrupt
          Synch Type               None
          Usage Type               Data
        wMaxPacketSize     0x0040  1x 64 bytes
        bInterval              10
    Interface Descriptor:
      bLength                 9
      bDescriptorType         4
      bInterfaceNumber        3
      bAlternateSetting       0
      bNumEndpoints           0
      bInterfaceClass       255 Vendor Specific Class
      bInterfaceSubClass      5
      bInterfaceProtocol      0
      iInterface              0

Change-Id: I62f0300199da3551c8774a4a5a4cd106a3ab2904
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-on: http://openocd.zylin.com/3611
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-01-13 11:32:22 +00:00
Antonio Borneo
d4bf207566 Makefile.am: fix override of target 'check-recursive'
To prevent executing the Jim Tcl tests, the makefile's target
'check-recursive' has been overridden in commit 56d163ce79
("jimtcl: update to 0.77, the current version, enable only
specific modules").
This causes a runtime warning during build:
	Makefile:6332: warning: overriding recipe for target 'check-recursive'
	Makefile:5098: warning: ignoring old recipe for target 'check-recursive'

Instead of override the makefile's target 'check-recursive',
prevent the recursion by re-assigning as empty the variable
SUBDIRS for this specific target only.

Change-Id: I03d1c467eba42316a59aeed4612d6bdbe6211282
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 56d163ce79 ("jimtcl: update to 0.77, the current version, enable only specific modules")
Reviewed-on: http://openocd.zylin.com/5986
Tested-by: jenkins
2021-01-08 10:23:59 +00:00
Paul Fertser
f67d7a3c48 contrib: rpc_examples: haskell: fix ftbs with current libraries
And get rid of some warnings along the way.

Change-Id: I8fdbe1fa304276be6b0f25249b902b3576aa3793
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/5987
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-01-08 10:23:50 +00:00
Paul Fertser
b5098754cf doc: fix over/underfull hboxes in PDF
This adds some cosmetic changes to make the PDF User Manual look
proper.

Building it now requires Texinfo 5.0 which shouldn't be problematic
according to [0]. Commit 79fdeb37f4 is
effectively reverted.

[0] https://repology.org/project/texinfo/versions

Change-Id: I990bc23bdb53d24c302b26d74fd770ea738e4096
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/5995
Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-01-08 10:23:41 +00:00
Antonio Borneo
cc79bcd587 configure.ac: fix build with libusb0 and without libusb1
Driver 'openjtag' requires both libftdi and libusb1.
The current check is incorrect and the driver is built when
libftdi is present with libusb0 and without libusb1, which causes
the linker to fail resolving the required libusb1 symbols.

Remove the check for libusb0 on driver 'openjtag'.
Create a new adapters group LIBFTDI_USB1_ADAPTERS to hold the
driver 'openjtag'.

Change-Id: I1f5e554b519e51c829d116ede894639cb55a26aa
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5989
Tested-by: jenkins
2021-01-08 10:23:31 +00:00
Paul Fertser
2c82d9ea7d configure: do not make Capstone dependency automagic
This adds regular ./configure options to control dependency on the
Capstone disassembly engine. See [0] for the rationale.

[0] https://wiki.gentoo.org/wiki/Project:Quality_Assurance/Automagic_dependencies

Change-Id: I3e16dc5255d650aa1949ccf896b26dc96e522a75
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/5985
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-01-08 10:23:26 +00:00
Antonio Borneo
c69b4deae3 gdb_server: fix HW thread status at gdb attach
At gdb attach, the event TARGET_EVENT_GDB_ATTACH is in charge of
halting the target.
For HW thread, rtos_update_threads() should be called after the
event to detect and record the new 'halted' status. Instead it is
called immediately before the event, thus reading the status
before the halt.

Move after the event the call to rtos_update_threads().

Change-Id: Iab3480ea0f5283ed6580f0f6c11200083197d1e9
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5983
Tested-by: jenkins
2020-12-26 15:48:17 +00:00
Antonio Borneo
7f74906c2d gdb_server: minor fix for indentation
Use a TAB in place of 4 spaces

Change-Id: Ic34b7c3ef24078d2c36a193d4dd079bca5a7ef2e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: a4cdce0129 ("gdb_server: prevent false positive valgrind report")
Reviewed-on: http://openocd.zylin.com/5982
Tested-by: jenkins
Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li>
2020-12-26 15:48:13 +00:00
Antonio Borneo
433e37f02f rtos/hwthread: fix register list for armv7a
The targets armv7a in file cortex_a.c inherit the register list
from file armv4_5.c thus, depending on the core status, some
register get marked as not existing.
For HW threads other than current target, the registers in the
list are not checked for existence and are all forwarded to GDB
that in turns complains for too many data:
	  Remote 'g' packet reply is too long (expected 68 bytes, got 104 bytes)

Check all the attributes of the registers and pass to GDB only the
valid registers.

To test it, use a SMP cortex-a target (2 cores are enough) and add
	-rtos hwthread
to all the cores. Connect GDB to OpenOCD and issue the GDB command
	info threads

Change-Id: Ie66119fe83a3c8d53e9d18dda39e60fd97769669
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5981
Tested-by: jenkins
2020-12-26 15:47:55 +00:00
Jiri Kastner
6090390a23 tcl/target/rk3308.cfg: add defer-examine
only core0 is brought up by bootloader

Change-Id: I1d6b5e6ba7498beadbf3805f4271f0197e411bd5
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-on: http://openocd.zylin.com/5980
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li>
2020-12-26 15:47:52 +00:00
Antonio Borneo
ed73398eb0 cortex-a: fix reset on dapdirect transports
The target code for assert reset on cortex_a has been patched on
commit b0698501b0 ("cortex_a: fix cortex_a_assert_reset() if
srst_gates_jtag") then in cdba6ba0ad ("cortex_a: fix reset for
SWD transport") to workaround the mismatch between jtag and swd
implementations. See discussion for the second patch at
http://openocd.zylin.com/3641/

While all of these mismatches should hopefully be cleaned by the
reset framework rework, an extension of the workaround of the
second patch is required for dapdirect transports, either
dapdirect_swd and dapdirect_jtag.

Extend the existing workaround to all non-jtag transports.

Change-Id: Ia6a9d43bab524cbb3de4c37ce24c45f25187353d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5979
Tested-by: jenkins
2020-12-26 15:47:48 +00:00
Antonio Borneo
722f579706 armv7m_trace: stop getting traces from adapter at exit
If OpenOCD is reading trace data from the target, at exit it
should stop the adapter to gather data, but should left the target
still producing them.

Add a helper in armv7m_trace to disable the adapter's trace and
call it during OpenOCD teardown.

This also provides a workaround for an issue in the firmware of
ST-Link V3 till version V3J7. If the SWD connection is closed when
trace is active, at following connection the trace does not work
anymore.

Change-Id: I47ccab61405384938555096c5aca789eaa090d27
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5978
Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li>
Tested-by: jenkins
2020-12-26 15:47:44 +00:00
Jonathan McDowell
88592cc1a1 LICENSES: Update GFDL invariant text to match official wording
This was flagged by lintian against the Debian package; the text stating
there are no invariant sections deviates from the official GNU wording.
Update it to match the text at the bottom of:

https://www.gnu.org/licenses/old-licenses/fdl-1.2.en.html

Change-Id: Ie222237a8eede24c1b71218b05e1513b74208a47
Signed-off-by: Jonathan McDowell <noodles@earth.li>
Reviewed-on: http://openocd.zylin.com/5974
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-12-26 15:47:41 +00:00
Antonio Borneo
4fc0f3530c Makefile.am: fix non-POSIX warning from automake
Automake issues a warning
	Makefile.am:46: warning: wildcard $(srcdir: non-POSIX variable name
	Makefile.am:46: (probably a GNU make extension)
because the GNU make function 'wildcard' is not POSIX.
Also the GNU make function 'shell' triggers a similar warning.

Use the POSIX extension '!=', that executes an arbitrary shell
command, to replace the GNU make 'wildcard'.
Don't include the file 'NEWS' because automake already includes it
by default.

Change-Id: Ice560c3789cec4f3f2197a255d6f5af7b1fde634
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5965
Tested-by: jenkins
Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li>
2020-12-26 15:47:37 +00:00
Luca Lindhorst
4bc8fd24fb Correct warning message
The warning message regarding wrong verification checksum for LPC2000, claims that the verification will fail, but the checksum written correctly by openocd. Clarify this in the warning message.

Change-Id: I929ac767f7f9fdad9bace250c8c04a776462800a
Signed-off-by: Luca Lindhorst <l.lindhorst@wut.de>
Reviewed-on: http://openocd.zylin.com/5956
Tested-by: jenkins
Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-12-26 15:47:31 +00:00
Paul Fertser
0dd3b7fa6c Restore +dev suffix
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
2020-12-10 01:43:12 +03:00
Antonio Borneo
77f468893e The openocd-0.11.0-rc1 release candidate
Change-Id: I111fec1304482f5c0f9d6ee988be8a2ea3de3981
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-12-09 20:34:22 +03:00
Antonio Borneo
9d3f337570 doc: document adapter drivers linuxgpiod and sysfsgpio
Change-Id: If894092a7ae04bb95fa1913d2e3c8465c2d0f75c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5961
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-12-09 14:31:00 +00:00
Antonio Borneo
2bbd85a828 flash/nor/stmsmi: fix compile error with clang 12.0.0
The git preliminarily version of clang 12.0.0_r370171
f067bc3c0ad6 reports an error in the expansion of the macro
SMI_READ_REG():

	error: '(' and '{' tokens introducing statement expression
		appear in different macro expansion contexts
		[-Werror,-Wcompound-token-split-by-macro]

Remove one intermediate macro expansion to make clang happy.

Change-Id: I8ae6d9c18808467ba8044d70cbf0a4f76a18d3e6
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5958
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
2020-12-09 14:30:27 +00:00
Łukasz Misek
39380318c8 jtag/drivers/ulink: auto-detect OpenULINK USB endpoints numbers
This should provide greater compatibility with different OpenULINK
targets which might be using various endpoints numbers. Since they're
advertised in the USB descriptor anyway it makes sense to autodetect
them.

Interface is no longer claimed before attempting to load firmware to a
freshly booted device, so I have no idea if this will break on windows
or other uncommon systems (Paul).

Change-Id: Iee10dcb6911dcf46239c430e174d9f98b5bde3c2
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2445
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-12-09 14:29:57 +00:00
Tarek BOCHKATI
cc26808136 flash/nor/sfdp|stmqspi: fix build issue with clang on mac OS
Change-Id: I3b3aa4236125523ad65fd615ada0f5647d26f526
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@st.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5940
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-12-09 14:29:37 +00:00
Antonio Borneo
861e75f54e jimtcl: switch to github
The 'historically' main repository of jimtcl in repo.or.cz has
lost sync with the github current main repository since July 2020.
The new tag 0.80 is not present in repo.or.cz.
The developer of jimtcl has been in contact with the admins of
repo.or.cz to fix the not better described sync issues and has now
decided to stop any further tentative. A new README has been added
on 2020-11-19 in the old repository to inform that it is abandoned
in favour of github. The old content in repo.or.cz will remain due
to forks that still exists in the same server.

Switch OpenOCD git submodules to fetch jimtcl code from the main
development repository in github.

Change-Id: Ia2d59f1347ccfe374538b38131badfd46054eb91
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5948
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-12-05 23:18:52 +00:00
Antonio Borneo
1d3d87695c target/register: use an array of uint8_t for register's value
The use of 'void *' makes the pointer arithmetic incompatible with
standard C, even if this is allowed by GCC extensions.
The use of 'void *' can also hide incorrect pointer assignments.

Switch to 'uint8_t *' and add GCC warning flag to track any use of
pointer arithmetic extension.

Change-Id: Ic4d15a232834cd6b374330f70e2473a359b1607f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5937
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-12-05 23:18:37 +00:00
Antonio Borneo
b5e015357a mips_mips64: fix minor host endianness bug
Commit 80f1a92bd7 ("mips64: Add generic mips64 target support")
adds a log of the target's program counter in function
mips_mips64_debug_entry() by directly casting the little-endian
buffer in pc->value.
This is going to print an incorrect value on big-endian hosts.

Use the function buf_get_u64() to return the register value.

Not tested on real HW. Issue identified with GCC compiler flag
'-Wcast-align=strict' after change http://openocd.zylin.com/5937/
("target/register: use an array of uint8_t for register's value").

Change-Id: Icbda2b54a03fdec287c804e623f5db4252f9cd2a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 80f1a92bd7 ("mips64: Add generic mips64 target support")
Reviewed-on: http://openocd.zylin.com/5944
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-12-05 23:18:33 +00:00
Antonio Borneo
a56b729191 arm7_9_common: fix host endianness bug in arm7_9_full_context()
The original code passes to ->read_core_regs() and to
->read_xpsr() the pointer to the little-endian buffer reg.value.
This is incorrect because the two functions above require a
pointer to uint32_t, since they already run the conversion with
arm_le_to_h_u32() in the jtag callback.
This causes a mismatch on big-endian host and the registers get
read with the incorrect endianness.

Use an intermediate buffer to read the registers as uint32_t and
to track the destination reg.value pointer, then copy the value in
reg.value after the call to jtag_execute_queue().

Tested with qemu-armeb and an OpenOCD built through buildroot
configured for cortex-a7 big-endian.

Note that if jtag_execute_queue() fails, the openocd register
cache is not updated, so the already modified flags 'valid' and
'dirty' are incorrect. This part should be moved after the call to
jtag_execute_queue() too.

Change-Id: Iba70d964ffbb74bf0860bfd9d299f218e3bc65bf
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5943
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-12-05 23:18:29 +00:00
Antonio Borneo
62686ab161 armv4_5: fix output of command 'arm reg'
Commit fc2abe63fd ("armv7m: use generic arm::core_mode") adds
two special modes for ARMv6M and ARMv7M in struct arm_mode_data[].
While these modes do not have any additional register to be dumped
by command 'arm reg', the command still prints an header for these
modes but not followed by any register.

Detect the special modes for ARMv6M and ARMv7M and skip them to
avoid printing the useless header.

Change-Id: I04145769e5742624f143c910eebf9a6f6d8e3cdc
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: fc2abe63fd ("armv7m: use generic arm::core_mode")
Reviewed-on: http://openocd.zylin.com/5942
Tested-by: jenkins
2020-12-05 23:18:22 +00:00
Antonio Borneo
693b8501e5 armv4_5: fix segmentation fault in command 'arm reg'
Commit fed7131049 ("armv4_5: support weirdo ARMv6 secure monitor
mode") introduces the secure mode 28 of ARMv6 as a synonymous of
mode 22 (MON), but does not add it in the switch/case in command
'arm reg'.
When command 'arm reg' scans the array arm_mode_data[] on targets
without secure modes, it does not detect the new secure mode as
not supported by the architecture, thus triggers a segmentation
fault when it try to read the register's value from unallocated
memory.
Issue detected with target arm926ejs.

Add the new mode in the switch/case and treat it as the mode MON.

Change-Id: I2b72cc558e097879a7ee6ea601200bfda6b60270
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: fed7131049 ("armv4_5: support weirdo ARMv6 secure monitor mode")
Reviewed-on: http://openocd.zylin.com/5941
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-12-05 23:18:15 +00:00
Boran Car
ba58d90f6f jep106: Add new IDs from JEDEC
From JEP106AZ, released on May 24, 2019.

Change-Id: I768b7077ec6abcd19ae1530b5715c7ea993add67
Signed-off-by: Boran Car <boran.car@hex-five.com>
Reviewed-on: http://openocd.zylin.com/5244
Tested-by: jenkins
Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-12-05 23:17:48 +00:00
Marc Schink
7b641d3d4e Add initial RTT support
Real Time Transfer (RTT) is an interface specified by SEGGER based on
basic memory reads and writes to transfer data bidirectionally between
target and host.
Every target that supports so called "background memory access", which
means that the target memory can be accessed by the debugger while the
target is running, can be used.

RTT is especially of interest for targets which do not support Serial
Wire Output (SWO) (e.g. ARM Cortex-M0) or where using semihosting is
not possible (e.g. real-time applications) [1].

The data transfer is organized in channels where each channel consists
of an up- and/or down-channel. See [2] for more details.

Channels are exposed via TCP connections. One or more RTT server can be
assigned to each channel to make them accessible to an unlimited number
of TCP connections.

The current implementation does not respect buffer flags which are used
to determine what happens when writing to a full buffer.

Note that the implementation is designed in a way that the RTT
operations can be directly performed by an adapter (e.g. J-Link).

[1] https://devzone.nordicsemi.com/tutorials/6/
[2] https://www.segger.com/jlink-rtt.html

Change-Id: I8bc8a1b381fb74e08b8752d5cf53804cc573c1e0
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/4055
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-12-02 23:15:52 +00:00
Tomas Vanek
d459a2d27d adi_v5_swd: wait for readable DPIDR, ABORT if stalled
Reading of DPIDR is the very first operation after JTAG to SWD sequence.
Without this change if DPIDR read fails then swd connect fails.

Keep trying JTAG to SWD sequence and DPIDR read until success
or timeout 0.5 sec. It makes setting of adapter srst delay on SWD transport
mostly unnecessary.

Also test for ERROR_WAIT (which should not occur according to
IHI 0031E B4.3.2 but a quirk is known) and if bus is kept stalled
then issue abort to make the next connect possible.

Change-Id: Id8fe6618605bbeb4fed5061e987ed55de90a35f2
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5730
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-12-02 23:15:16 +00:00
Tomas Vanek
646c3c9902 arm_adi_v5: prevent possibly endless recursion in dap_dp_init()
If dap_dp_read_atomic() in 30 trials loop fails, dap->do_reconnect is set.
Following dap_dp_read_atomic() calls dap_queue_dp_read() which in case
of SWD transport calls swd_queue_dp_read(). It starts
with swd_check_reconnect() and it calls swd_connect() because
dap->do_reconnect is set. swd_connect() does some initialization,
reads DPIDR and calls dap_dp_init() again!

Moreover if dap_dp_init() is called from cortex_m_reset_(de)assert()
one level of recursion is necessary to reconnect the target.

Introduce dap_dp_init_or_reconnect() for use in cortex_m reset
and similar.
Remove loop of 30 atomic reads of DP_STAT to prevent unwanted recursion.

Change-Id: I54052fdefe50bf5f7c7b59fe751fe2063d5710c9
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5729
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-12-02 23:15:08 +00:00
Tarek BOCHKATI
a8edbd0200 tcl/target: remove deprecated ${target}_${adapter}.cfg files
Change-Id: Ic4837ad3bd06eb353020e44638306f341a923c05
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@st.com>
Reviewed-on: http://openocd.zylin.com/5929
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-11-15 22:11:24 +00:00
Tomas Vanek
a03ac1ba30 helper/command: disable logging of registered commands [RFC]
Every debug log of OpenOCD contains approximately 130 lines like:

Debug: 264 147 command.c:354 register_command_handler(): registering 'flash'...

Because only root name of the command is logged, most of lines is not
too informative. E.g. registering 'flash' is repeated 14 times.

Karl Passon submitted the patch [1] changing the logged cmd name from
root to lowest level. It makes the log better. Unfortunately we also have
'reset_config' and 'cortex_m reset_config' and similar which looks
equal in the log after [1].
Moreover [1] has not been reviewed for 5 years.

So my guess is that nobody uses that crap in debug log.

Save more than 10 kbytes in any debug log and make log analyse easier
by blocking log command in #if 0 block.
If some developer eventually needs to debug cmd registering he can easily
enable logging again.

[1] http://openocd.zylin.com/2765

Change-Id: Ib7e528aadd692fd0da2e3c005b4c5a484551b728
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5928
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
2020-11-15 22:10:35 +00:00
Tomas Vanek
6132694036 flash/nor/stm32f1x: fix error message
Backported from gd32vf103.c

Change-Id: I9c5bb7b36e6efcee0473c97047058ef26cc46eb7
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5927
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2020-11-15 22:10:02 +00:00
Tarek BOCHKATI
726b0c5928 stm32l4x: cosmetic simplification of get_stm32l4_info
Change-Id: I2542f946f64388d908b1502f869643080fce9f9e
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5536
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-11-15 21:55:39 +00:00
Tarek BOCHKATI
3d736e0488 flash/stm32l4x: STM32L55/L56xx basic support (non-secure mode)
STM32L5 have 512 Kbytes of Flash memory with dual bank architecture.
STM32L5 flash is quite similar to L4 flash, mainly register names
and offsets and some bits are changed.
NON-SECURE flash is located at 0x8000000 like L4 devices, so no
big change is needed (secure flash will be subject of another change).

Note: flash driver name is set stm32l5x, in order to extend the commands
with specific L5 commands (to manage TZEN for example ...)

Note: this works only when TZEN=0

Change-Id: Ie758abb4aa19a3f29eeb0702d7dcb43992e4c639
Signed-off-by: Michael Jung <mijung@gmx.net>
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5510
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-11-15 21:55:20 +00:00
Tarek BOCHKATI
dc43ecce5a flash/stm32l4x: introduce table with register offsets
This change is a preparation for STM32L5 support on top of L4 driver
STM32L5 flash is quite similar to L4 flash, mainly register names
and offsets and some bits are changed.

flash_regs table is introduced within stm32l4_flash_bank struct in order
to get correct register offsets, by using the driver internal function
'stm32l4_get_flash_reg_by_index'.

To use efficiently register indexes, stm32l4 _[get|read|write]_flash_reg
functions are surcharged to accept register indexes.

IMPORTANT: stm32l4_write_option is not surcharged, and they always accept
the option register offset.

tested on NUCLEO-G474RE and STM32L4R9I-DISCO

Change-Id: I739d3e97d63b831af6aa569c5629db0000209551
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5509
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-11-15 21:42:17 +00:00
Tarek BOCHKATI
44cf202ef5 60-openocd.rules: add ULINKplus CMSIS-DAP based adapter
Change-Id: I5935e0a184b8995122d197046ef8fb4e7eefb884
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@st.com>
Reviewed-on: http://openocd.zylin.com/5926
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2020-11-15 21:39:06 +00:00
Tomas Vanek
0e0283e582 doc: document CMSIS-DAP v2
Change-Id: Ie54e855901c079b456c26a6239177c7678cdcac7
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5930
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-15 21:38:50 +00:00
Antonio Borneo
9c31457875 jtag/drivers/cmsis_dap: fix build with gcc 10.1.0
Avoid multiple definition of cmsis_dap_usb_backend and
cmsis_dap_hid_backend using 'extern'.
Move the prototypes in cmsis_dap.h.
Remove the useless #if/#endif around the prototypes.

Change-Id: I8d73fe148e2155620244bc887d4235e9af530e30
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5790
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-11-15 21:38:29 +00:00
Tomas Vanek
e6770f1ab6 jtag/drivers/cmsis_dap: fix usb bulk connection logic
http://openocd.zylin.com/4831 has following problems in selecting
USB device/interface to connect:
- attempts connection to any device with user class and 2 bulk endpoints
- regardless of cmsis_dap_vid_pid or cmsis_dap_serial setting
  connects to the first suitable device

Distinguish between real match and no filtering cases and use that info
appropriately.

Add debug messages to show why the interface is refused.

Move CMSIS-DAP interface string detection before checking of class/endpoints
to give more understandable debug log in the case the device is refused.

Keep track of reliable matches in both device and interface enumeration.
First search for the interface with CMSIS-DAP in the interface string.
If it fails, chose the first suitable interface.

Change-Id: Ia1aacd5631a9f5c5db580bfb5745ceb6240d61ad
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5789
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-11-15 21:38:10 +00:00
Mickaël Thomas
8f927d5164 Add CMSIS-DAP v2 support
This change implements CMSIS-DAP v2 which works with raw USB bulk transfers.

The old driver is now split into a generic CMSIS part and a HID backend,
with a new raw USB backend for CMSIS-DAP v2.

New commands:
- cmsis_dap_backend (usb_bulk | hid | auto)
- cmsis_dap_usb interface <interface number>

Change-Id: I4218477b12ccbfe19c9b332321cd21394bf44e30
Signed-off-by: Mickaël Thomas <mickael9@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4831
Tested-by: jenkins
2020-11-15 21:36:56 +00:00
Tomas Vanek
b1f488ec1e target/armv7m, cortex_m: fix misleading comments
Change-Id: I4fea29f07f4d3b8b2578b538ef0eef5f1eea285f
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5876
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-15 21:09:08 +00:00
Tomas Vanek
608299484d flash/nor/psoc6: remove setting of xPSR.T bit from sromalgo_prepare()
PSoC6 erases flash to 0x00 not more common 0xff, so a device
with erased flash loads xPSR.T=0 from the zeroed reset vector.
Wrong thumb bit value caused a target algorithm failed with HardFault.
The low level write to xPSR solved the problem only if xPSR cached
copy was not marked dirty.

Later commit 49bd64347a fixed T setting
for all Cortex-M target algorithms.

Since 49bd64 this part of code is useless as xPSR target_start_algorithm()
sets always xPSR dirty so the effect of the low level write is eliminated
(and proper setting of thumb bit is ensured in target_start_algorithm())

Change-Id: I68aea5e921fbc6203f2fe91a45f10d22869327de
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5875
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-15 21:08:56 +00:00
Tomas Vanek
f32ca2d25d target/cortex_m: remove wrong xPSR.ICI/IT bits handling
If a Cortex-M (not M0, M0+) target was stopped in the middle of
a conditional IT block or in the load/store multiple instruction,
cortex_m_debug_entry() used wrong xPSR bits to detect it and then
cleared 8 bits of the exception number from xPSR
- probably wrong bit mask again.

I believe clearing of the ICI/IT bits in cortex_m_debug_entry() has no
reason as Cortex-M does not use instruction injecting.

Remove the wrong code.

The change was originally a part of http://openocd.zylin.com/4862
It is now re-submitted as #4862 is not ready.

Change-Id: If91cd91d1b81b2684f7d5f10cf20452cde1a7f56
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5874
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-15 21:08:41 +00:00
Tomas Vanek
fc91936be7 target/armv7m: use arch_info[i].value instead of allocated memory
Change-Id: I9422cab484d0769404516947e16da1baa001a4e0
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5328
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-15 21:08:26 +00:00
Antonio Borneo
d811d2838b cortex_m: use the new enum ARMV7M_REGSEL_name
Register xPSR is indexed directly with its value 16 or with the
incorrect enum ARMV7M_xPSR.

Replace them with the new enum ARMV7M_REGSEL_xPSR.

Change-Id: I86600e7f78e39002ce45f66d4792d5067c1f541b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5873
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-11-15 21:08:14 +00:00
Antonio Borneo
4d336e8ffb stlink: handle read/write FPU registers in HLA API
Old stlink firmware in stlink V1 and stlink V2 pre-J15 do not
handle FPU registers in the read_reg() and write_reg() API.

Add code to be compatible with the new API of OpenOCD.

Change-Id: Ib0439c5294b6911ea75efe8c7fa085b014317a4b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5883
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-11-15 21:07:23 +00:00
Antonio Borneo
be631eed16 hla: API: specify that read_reg/write_reg use regsel as parameter
The API of hla have been defined from ST-Link basic operations.
By chance, all the current implementation of hla (st-link, ti-icdi
and nulink) share the same way to handle the parameter 'num' of
the API read_reg() and write_reg(), that is simply using it to
initialize the field REGSEL (bits [6:0]) of armv7m Debug Core
Register Selector Register (DCRSR).

Add a comment in the API definition to highlight this, in case it
get used by a further hla implementation, then rename as 'regsel'
the 'num' parameter.

Change-Id: I4b6a2c7d78b4fc4de2b9b2bdba065414b15c6ba3
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5882
Reviewed-by: Edward Fewell <edwardfewell@hotmail.com>
Tested-by: jenkins
Reviewed-by: Zale Yu
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-11-15 21:07:14 +00:00
Tomas Vanek
62394a6b1c target/cortex_m,hla_target: rework Cortex-M register handling part 4
Consolidate low level register read/write.

Floating point registers were handled by target_read/write_u32
unlike other registers handled by cortexm_dap_read/write_coreregister_u32
There is no reason to do so in cortex_m.
Remove cortexm_dap_read/write_coreregister_u32
and use cortex_m_load/store_core_reg_u32 directly.

Similarly HLA adapters register read/write interface supports all registers
so use it for any floating point and other registers.

Change-Id: Ida679e5f4fec02d94ffb0bd3f265ed7ed2221cdc
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5864
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-15 21:06:45 +00:00
Tomas Vanek
d3a37b0e76 target/armv7m: rework Cortex-M register handling part 3
Move primask/basepri/faultmask/control packing/unpacking from
cortex_m.c and hla_target.c to armv7m.c armv7m_read_core_reg()
and armv7m_write_core_reg() where also the FP 32/64-bit registers
conversion takes place.

Introduce a new hidden register ARMV7M_PMSK_BPRI_FLTMSK_CTRL
for packing/unpacking of special registers in the register cache.

The new packing/unpacking is endianess safe.

While on it improve returned error codes and LOG_ messages.

Just minimal changes in cortex_m.c and hla_target.c, will be
consolidated in the next patch.

Change-Id: Id51e764e243e54b5fdaadf2a202eee7c4bc729fe
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5863
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-15 21:06:23 +00:00
Tomas Vanek
e4160bd422 target/armv7m: rework Cortex-M register handling part 2
Make arm register id coherent with reg_list index.
Without this reg_list[ARMV7M_R12] was possible but
reg_list[ARMV7M_FPSCR] was out of bounds.

Remove unused items from reg_list index.

Change-Id: I84d3b5c496fc1839d07a5b74cb1fd1c3d4ff8989
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5862
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
2020-11-15 21:06:00 +00:00
Tomas Vanek
efbc447ed8 target/armv7m: rework Cortex-M register handling part 1
Define a new enum with DCRSR.REGSEL selectors.
Introduce armv7m_map_id_to_regsel() to unify mapping in one place.
Use DCRSR.REGSEL selectors for low level register read/write.

Change-Id: Ida0ccdfa9cdb1257a1900b8bfbf172b076374d39
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5327
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
2020-11-15 21:05:51 +00:00
Tomas Vanek
f8453ae52c target, register: allow a register hidden from gdb and 'reg' cmd
Introduce a 'hidden' flag in struct reg to support a register cache
containing different views of same data: e.g. Cortex-M has
primask, basepri, faultmask and control registers accessed
as one word. With the hidden flag we can add an reg_list item
corresponding to hw access without exposing the register to user level.

All the struct reg are allocated with calloc() but one in xscale.c
allocated by malloc(). Change this one to use calloc() as well
to guarantee initial value hidden=false

Change-Id: I8da9f5a5a60777ae7ef943a841307487bd80fc6f
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5325
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-15 21:05:37 +00:00
Antonio Borneo
109dc1975f flash/stmqspi: minor fixes on coding style
Add space around operators;
use BIT() macro in place of left shifting constant 1;
remove space between cast operator and value;
do not check a pointer before free() it;
add parenthesis around parameters in macros;
fix indentation using only TABs;
remove line continuation '\' at code lines out of macros.

Change-Id: I809e8ee72d7bfe49d0edf10afb36efe2458de77c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: e44539d66c ("Flash, FRAM and EEPROM driver for STM32 QUAD-/OCTOSPI interface")
Reviewed-on: http://openocd.zylin.com/5932
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
2020-11-15 21:04:29 +00:00
Antonio Borneo
175f30e695 tcl/board: rename board file ST b-l475e-iot01a
Use the board file name as <company>_<name>.cfg

Add the SPDX tag to workaround an error in checkpatch that fails
to recognize as valid a patch that only changes a file name.

Change-Id: I929cd9e5f9fe2e7386950643487534c9a5a05bc6
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: e44539d66c ("Flash, FRAM and EEPROM driver for STM32 QUAD-/OCTOSPI interface")
Reviewed-on: http://openocd.zylin.com/5931
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Tested-by: jenkins
2020-11-15 21:04:21 +00:00
Kevin Yang
06c7a53f1f target/cortex_m: Change sleep to running state
When the core is in sleep mode, the core is no longer retiring
instructions. Cortext M remains in "unknown" state. This patch converts
sleep mode to "running" state.

Change-Id: I1e9b6c9be51fd0f1f6ce81af9b1f5f9f1f43c661
Signed-off-by: Kevin Yang <kangyang@google.com>
Reviewed-on: http://openocd.zylin.com/5921
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2020-11-11 21:22:16 +00:00
Andreas Bolsch
e44539d66c Flash, FRAM and EEPROM driver for STM32 QUAD-/OCTOSPI interface
- write speed up to 150 kByte/s on STM32F469I-disco (due to
  SWD clock and USB connection), up to 1 MByte/s on Nucleo-F767ZI
  with external STLink-V3 or Nucleo-G474RE with two W25Q256FV in
  dual 4-line mode or STM32H73BI-Disco in octal mode
- tested with STM32L476G-disco (64MBit flash, 3-byte addr),
  STM32F412G-Disco, STM32F469I-Disco, STM32F746G-Disco, and
  STM32L476G-Disco (all 128Mbit flash, 3-byte addr),
  STM32F723E-Disco, STM32F769I-Disco (512Mbit flash, 4-byte addr)
  STM32L4R9I-Disco, STM32L4P5G-Disco (512MBit octo-flash, DTR, 4-byte addr)
  STM32H745I-Disco, STM32H747I-Disco (two 512MBit flash, 4-byte addr)
  STM32H73BI-Disco, STM32H735G-Disco (512MBit octo-flash, DTR, 4-byte addr)
- suitable cfg for Discovery boards included
- limited parsing of SFDP data if flash device not hardcoded
  (tested only in single/quad mode as most devices either don't
  support SFDP at all or have empty(!) SFDP memory)
- 'set' command for auto detection override (e. g. for EEPROMs)
- 'cmd' command for arbitrary SPI commands (reconfiguration, testing etc.)
- makefile for creation of binary loader files
- tcl/board/stm32f469discovery.cfg superseded by stm32f469i-disco.cfg
- tcl/board/stm32f7discovery.cfg removed as name is ambiguous
  (superseded by stm32f746g-disco.cfg vs. stm32f769i-disco.cfg)
- dual 4-line mode tested on Nucleo-F767ZI, Nucleo-H743ZI and Nucleo-H7A3ZI-Q
  with two W25Q256FV, and on Nucleo-L496ZP-P and Nucleo-L4R5ZI
  with two W25Q128FV, sample cfg files included and on STM32H745I-Disco,
  STM32H747I-Disco, STM32H750B-Disco
- read/verify/erase_check uses indirect read mode to work around silicon bug in
  H7, L4+ and MP1 memory mapped mode (last bytes not readable, accessing last
  bytes causes debug interface to hang)
- octospi supported only in single/dual 1-line, 2-line, 4-line
  and single 8-line modes, (not in hyper flash mode)

Requirements:
GPIOs must be initialized appropriately, and SPI flash chip be configured
appropriately (1-line ..., QPI, 4-byte addresses ...). This is board/chip
specific, cf. included cfg files. The driver infers most parameters from
current setting in CR, CCR, ... registers.

Change-Id: I54858fbbe8758c3a5fe58812e93f5f39514704f8
Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-on: http://openocd.zylin.com/4321
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Christopher Head <chead@zaber.com>
2020-11-08 22:46:00 +00:00
Antonio Borneo
475f42051e stlink: fix computation of trace prescaler
Use integer rounding for the computation of prescaler.
Improve the test of prescaler range, knowing its value would be
decremented before being written in TPIU ACPR.

Change-Id: I041dde1dca41323904e36a6b6975028a6de902b3
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5909
Tested-by: jenkins
2020-11-07 20:54:08 +00:00
Antonio Borneo
1f6efaada0 stlink: fix max SWV baudrate on stlink v3
While stlink v2 anly accept till to 2 MHz for SWV baudrate, stlink
v3 accepts up to 24 MHz.

Check the stlink version and use the respective max value.

Change-Id: I911207a35983b6acf0b901059076dd31f70e6290
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reported-by: Pawel <phryniszak@users.sourceforge.net>
Fixes: https://sourceforge.net/p/openocd/tickets/283/
Reviewed-on: http://openocd.zylin.com/5908
Tested-by: jenkins
2020-11-07 20:54:02 +00:00
Antonio Borneo
ba564bda66 drivers/jlink: fix check for max prescaler
The value stored in TPIU ACPR is the prescaler value decremented
by one. Thus, the test should verify that prescaler does not
exceed the maximum ACPR value plus one. Also, zero value is not
allowed for prescaler.

Change-Id: I1817f04f2a310b2f413bad726f0cb9dd6a4172e2
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5907
Tested-by: jenkins
Reviewed-by: Adrian M Negreanu <adrian.negreanu@nxp.com>
2020-11-07 20:53:53 +00:00
Antonio Borneo
384e90b06b build: fix build with --enable-minidriver-dummy
Commit 462c012066 ("Add complete JTAG debug logging.") breaks
the build for minidriver, that is enabled either on zy1000 build
and on minidriver-dummy build. The check on BUILD_ZY1000 was added
to pass the auto-build in jenkins. While the build issue with
minidriver-dummy was known, as reported in the comment, it was not
addressed and got ignored for slightly more than one year.

Use the macro HAVE_JTAG_MINIDRIVER_H in place of BUILD_ZY1000 to
take in account both builds that require the minidriver.
Fix also the build in case configure enables the HLA drivers due
to autodetection of libusb. The HLA drivers would not be in the
build and the function transport_is_hla() would be missing.

Change-Id: I1d85c5fa247bf4a85aba29b233c0b573b46665bc
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5911
Tested-by: jenkins
2020-11-07 20:53:39 +00:00
Antonio Borneo
ad06fba6f0 target/arm7tdmi: remove unused/deprecated function parameter
The function arm7tdmi_clock_out() has one unused 'deprecated'
parameter.

Drop the unused 'deprecated' parameter and the FIXME above it.

Change-Id: Ia8de41f5b8258825faccc737bba622e44c81a7ea
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5912
Tested-by: jenkins
2020-11-07 20:53:26 +00:00
Antonio Borneo
3cf95a9d02 doc: remove reference to already dropped tftp support
The only code dealing with tftp in OpenOCD was in eCos build, code
already dropped in commit 39650e2273 ("ecosboard: delete
bit-rotted eCos code") almost 8 years ago.

Drop tftp related documentation too.

Change-Id: I0defc8f844e74c90894dca04a652dcc497a520e1
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5913
Tested-by: jenkins
Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li>
2020-11-07 20:53:13 +00:00
Antonio Borneo
c2311cc18f configure.ac: add libutil to the dependency list
Jimtcl 0.80 (2020-10-29) adds dependency to libutil, which is part
of the GNU libc.
The library is searched and used by jimtcl build, but still has to
be linked in by OpenOCD as indirect dependency.

While OpenOCD is still using jimtcl 0.79, let's prepare to switch
to the next version.
Add libutil search in configure.ac.

Change-Id: I5a8952161b0e5b93fc00d23be256b5274d31e08c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5922
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-11-07 20:53:01 +00:00
Alberto García Hierro
535f5309ba stm32h7x: Fix reset with non-HLA interfaces on macOS
regsub doesn't work correctly on macOS Catalina, which results in
an incorrect CHIPNAME derived from the current target. Since regsub
is only used by this target, replace it with a simple string search
for '.' followed by a substring. This is funcionally equivalent to
what the regular expression was doing, but instead relies in simpler
string operations that should have little to no differences
between systems.

Also, refactor CHIPNAME detection into proc stm32h7x_chipname, so
it's always retrieved in the same way without duplicating the code.

Change-Id: Ia9f63f56b508688e74278b022eaec47e503916e7
Signed-off-by: Alberto Garcia Hierro <alberto@garciahierro.com>
Reviewed-on: http://openocd.zylin.com/5872
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-07 20:52:46 +00:00
Kevin Yang
92ea7e41b9 target: Examine subsequent targets after failure
When a target examination fails, continue to examine subsequent targets.
Return the number of targets that failed to examine.

Change-Id: I883a0c445edc7eb00f496b79271d773771ec6b66
Signed-off-by: Kevin Yang <kangyang@google.com>
Reviewed-on: http://openocd.zylin.com/5855
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-07 20:52:26 +00:00
Marc Schink
73746d78b7 target/image: Use proper data types
While at it, fix some coding style issues.

Change-Id: Id521394d89e0bf787a6f812701c2cc0fe7e4e63f
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5919
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-07 20:52:00 +00:00
Tarek BOCHKATI
6dbfdcd00f GitHub/WorkFlow: fix for CVE-2020-15228
According the CVE-2020-15228 documented in:
 - https://github.com/advisories/GHSA-mfwh-5m23-j46w
 - https://nvd.nist.gov/vuln/detail/CVE-2020-15228

the `set-env` commands will be disabled in the near future
and should be replaced by:
    echo "FOO=BAR" >> $GITHUB_ENV

idem for `add-path`, should be replaced by:
    echo "/path/to/add" >> $GITHUB_PATH

Change-Id: I725c9ccd861a0d1580ac22491b6d716ec65973d1
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5866
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-07 20:51:35 +00:00
Tarek BOCHKATI
2edcb065d4 Github: add capstone in windows snapshots
Change-Id: I402c18ff72de715ce4012bce3df72aaed7159d50
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5915
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-07 20:51:28 +00:00
Tarek BOCHKATI
25e1c0f4c0 contrib/cross-build.sh: build capstone from source
tested with capstone 4.0.2, with the following options
CAPSTONE_CONFIG="CAPSTONE_ARCHS=arm,aarch64
                 CAPSTONE_BUILD_CORE_ONLY=yes
                 CAPSTONE_STATIC=yes
                 CAPSTONE_SHARED=no"

Change-Id: I40297772664e85c3d0f9358c85bfd901b5eba8b1
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5914
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-07 20:51:18 +00:00
Jonathan McDowell
990a01b702 tcl/interface/ftdi: Add HIE JTAG Debugger config
Change-Id: Ibb7a2bb8807c442394982e89258874557a2baaad
Signed-off-by: Jonathan McDowell <noodles@earth.li>
Reviewed-on: http://openocd.zylin.com/5910
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-07 20:50:57 +00:00
Marc Schink
8e281b76ea doc: Improve 'jlink usb' description
Change-Id: Ica44980ac0ba8a4f0ff03b42ce37d1de861d4fb5
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5918
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-07 20:50:37 +00:00
Adrian Negreanu
850e85fa6f semihosting: print the semihosting operation id
Change-Id: If5c3568bd1c99a48ac492137f48da0d9764efe14
Signed-off-by: Adrian Negreanu <adrian.negreanu@nxp.com>
Reviewed-on: http://openocd.zylin.com/5923
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li>
Reviewed-by: Tim Newsome <tim@sifive.com>
2020-11-07 20:50:16 +00:00
Tarek BOCHKATI
9cce6b3c76 armv7m: add a TCP channel to stream captured trace
When trace capturing the trace is enabled using 'tpiu_config internal'
(via the internal mode), OpenOCD can collect the trace buffers then append
it to a specified file or named pipe and propagate the trace to 'tcl_trace'
command.
This change is allowing OpenOCD to stream the captured trace over TCP.

When using this configuration OpenOCD acts like a server and multiple
clients can connect and receive the captured trace.

Example on STM32F7 running at 216MHz:
  itm port 0 on
  tpiu config internal :3344 uart off 216000000


Change-Id: Idea43e7e26e87b98a33da7fb9acf7ea50fe3b345
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5345
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-07 20:49:57 +00:00
Tarek BOCHKATI
7e6556b3ca server: permit the add_service function to return the created service
returning the created service seems useful:

as the only method to get the freshly created service is by getting the
last item in the services linked list, and this seems to be like an
intrusion to service internal mechanism.

possibly, we could get the service from a connection but this is possible
only from [new_connection|input|connection_closed]_handler_t, but this is
not always practical:
  example: armv7m: add a TCP channel to stream captured trace
           http://openocd.zylin.com/#/c/5345/
           here we poll for trace and broadcast to all connections
           outside of these xxx_handler_t functions

also, storing one of the connections in new_connection_handler_t and get
the service from it is possible, but this will make the code less readable.

Change-Id: I5fef1baecec1e054953c6faf5b99d864ecc97f02
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5717
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2020-11-07 20:49:53 +00:00
Antonio Borneo
72a1010c9f openocd: convert function setup_command_handler() to static
The function setup_command_handler() was used in the eCos build of
OpenOCD, thus it was exported and a comment was added to remark it
should remain not-static. Unfortunately the comment was missing
the relevant information of the special build that requires so.
Also unusual is that there is no include file that declares the
prototype of the function.

The comment above the function was added in two steps, in commit
ea3e49f4e2 ("fix embedded builds") and commit fb96b8607a
("openocd: setup_command_handler() must not be static"), again
without info about the special build.
Also the mailing list archive does not report any further detail.
The only hint is in the first commit above that also adds a test
on BUILD_ECOSBOARD in a #if.

Commit 39650e2273 ("ecosboard: delete bit-rotted eCos code")
removes all the eCos code, that effectively includes the both the
prototype and the call to the function setup_command_handler(),
	http://openocd.zylin.com/#/c/503/2/src/ecosboard.c@a1092
but did not reverted the function to static.

With all the 'external' uses of this function being dropped, set
the function setup_command_handler() to static and remove the
obsoleted and misleading comment.

Change-Id: I4d6b83dec2a838119821189fc67949bfca070035
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5902
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-11-04 17:40:14 +00:00
Antonio Borneo
c8628541ae target/adi_v5_jtag: remove unused global variable
Change-Id: Ia4e8b90359c23f4be1d3677b44b0ebd063bb8dcc
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5901
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-11-04 17:39:53 +00:00
Antonio Borneo
9d50f3f3af cortex_m: declare local functions as static
Functions that are not used outside the file should be declared as
static.

Change-Id: Ie81f6bdce91e2a1456364b47f30aa4d35c7ee7bc
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5900
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Tested-by: jenkins
2020-11-04 17:39:47 +00:00
Antonio Borneo
61f872311c rtos: make private the API rtos_try_next()
The function rtos_try_next() is only used internally.
Make it private.

Change-Id: I68c6b8d8e6bbf3d674b0e0199e63bc02d358c04e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5899
Tested-by: jenkins
2020-11-04 17:39:42 +00:00
Antonio Borneo
a8b436c511 transport: remove unused function transports_are_declared()
The only use of this function has been removed with commit
159f11fefc ("jtag: set default "jtag_only" to uninitialized
transports").

Get rid of the unused function.

Change-Id: I79dd1d55bd54ed8edc39ed3443e6c3c01794f063
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5898
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-11-04 17:39:35 +00:00
Antonio Borneo
f3db7f173e server: declare local functions as static
Functions that are not used outside the file should be declared as
static.

Change-Id: I57b2fa6e49e87e14604bd34c4f1d2f037f401507
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5897
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-11-04 17:39:29 +00:00
Antonio Borneo
7beb6a4e5b jtag: declare local symbols as static
Functions and variables that are not used outside the file should
be declared as static.

Change-Id: I58c9f5557d4809db9ccc34d32182c3797f825da1
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5896
Tested-by: jenkins
2020-11-04 17:39:22 +00:00
Antonio Borneo
5ca2301743 target: declare local symbols as static
Functions and variables that are not used outside the file should
be declared as static.

Change-Id: I9f97571a528f0cb3c3c26f873577ab16fdec3cdc
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5895
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-11-04 17:39:17 +00:00
Antonio Borneo
d3bff4e5c4 rtos: declare local symbols as static
Functions and variables that are not used outside the file should
be declared as static.

Change-Id: I9731a35496cd1c7421563c8961da5fa0e3cc71c3
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5894
Tested-by: jenkins
Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li>
2020-11-04 17:39:11 +00:00
Antonio Borneo
21bc36c4d7 flash: declare local symbols as static
Functions and variables that are not used outside the file should
be declared as static.

Change-Id: I52d46ed6d4c9b98a7152eb23274c836416f409a3
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5893
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-11-04 17:39:05 +00:00
Antonio Borneo
5bb0f6befb openocd: add support for libftdi 1.5
The new libftdi 1.5 (2020-07-07) changes some API, deprecating the
old ones. This cause a warning at compile time.

Detect in configure the version of libftdi.
Use the new API in the driver's code.
Add an helper include file 'libftdi_helper.h' that wraps the old
API for backward compatibility with old libftdi.

Change-Id: I7800fbebe17dd0ce62e55b3598d8c08be8875bb7
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: https://sourceforge.net/p/openocd/tickets/286/
Reviewed-on: http://openocd.zylin.com/5891
Tested-by: jenkins
2020-11-04 17:38:45 +00:00
Antonio Borneo
1718e733d6 configure.ac: stop automake to search for scripts in parent dirs
Automake will search for the helper scripts in the folder that
contains the current Makefile.am (typically '.'), then some of the
scripts will be also searched in '..' and '../..'.

If the parent folders '..' or '../..' of OpenOCD source code
contain a file named 'install.sh', then automake will use it and
will assume that the same folder should contains also 'ltmain.sh'.
This situation can either cause the build to fail or automake to
use incorrect helper scripts.

Force automake to only search for helper scripts in the current
directory.

Change-Id: I00bbd6bf9057c94cf5007e5ecda3fefd683481f5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: https://sourceforge.net/p/openocd/tickets/285/
Reviewed-on: http://openocd.zylin.com/5890
Tested-by: jenkins
2020-11-04 17:38:40 +00:00
Antonio Borneo
65de0d3bfa target: handle command 'target current' when no target is present
Is it possible to run OpenOCD without any target, for example to
only dump the rom-tables of an arm dap, or to perform low level
jtag operations.
But without any target created, the command 'target current'
causes OpenOCD to abruptly exit.

Handle in command 'target current' the case of no targets.

Change-Id: Ide15cb13bec84b88ccc3e7126523c04a6d70e636
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5881
Tested-by: jenkins
2020-11-04 17:38:20 +00:00
Antonio Borneo
e2e8a5f467 gdb_server: allow multiple GDB connections to selected targets
The default way of working is to have a single GDB attached to one
target, so OpenOCD accepts only one connection to the GDB port of
each targets and rejects any further connection.

There are some barely safe use cases in which it could get useful
having a second GDB connection to the same target.
One such use case is while using GDB as a 'non-intrusive memory
inspector', as explained in the OpenOCD documentation.
One GDB can be left running an infinite loop to dump some memory
area, or even analysing the content, while keeping a second GDB
ready for user interaction or spot memory check.

Add a target configure option to specify the maximum number of GDB
connections allowed for that target, keeping the default to 1.

Change-Id: I4985a602e61588df0b527d2f2aa5b955c93e125e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5865
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-11-04 17:37:59 +00:00
Antonio Borneo
360b2c2701 tcl: replace '-ctibase' with '-baseaddr'
Replace the deprecated option '-ctibase' with the generic option
'-baseaddr'.

Change generated with command:
	sed -i 's/-ctibase/-baseaddr/g' $(find tcl/ -type f)

Change-Id: If776934d2ac106532708768bb3a4ec6fcffb0368
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5870
Tested-by: jenkins
2020-11-04 17:37:36 +00:00
Antonio Borneo
ec0c23a3ab target/arm_cti: use adiv5_jim_mem_ap_spot_configure()
To avoid code duplication, reorganize the code to replace
cti_configure() with adiv5_jim_mem_ap_spot_configure().

Reorganize 'struct arm_cti_object' and its sub-'struct arm_cti'
moving DAP and mem-AP info in a 'struct adiv5_mem_ap_spot'.
Replace cti_configure() with adiv5_jim_mem_ap_spot_configure().
Deprecate the use of '-ctibase' in favor of '-baseaddr'.

Change-Id: I43740a37c80de67c0f5e4dc79c3400b91a12e9e8
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5869
Tested-by: jenkins
2020-11-04 17:37:25 +00:00
Antonio Borneo
080fab2ecd target/arm_adi_v5: add helper to get mem_ap spot in configure/cget
This is somehow an extension of existing adiv5_jim_configure(),
but includes the 'address' in the mem_ap.
Rewrite adiv5_jim_configure() using the new helper.

Change-Id: Ia7effeeece044004d459b45126ed4961a98b8568
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5857
Tested-by: jenkins
2020-11-04 17:36:13 +00:00
Tarek BOCHKATI
80a5285ea6 stm32h7x.cfg: alignment with RM0399 rev3
in RM0399 rev2, there was these bits in DBGMCU_CR registers:
 - DBGSTBY_D3 : bit 7
 - DBGSTOP_D3 : bit 8

these bits have been changed to reserved in rev3

Change-Id: I9d10d90e383795dc8e25a117d59fa065dc594610
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5861
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-04 17:36:01 +00:00
Tomas Vanek
3099d52d78 jtag/tcl: fix memory leak in error return
Clang static analyzer reported:
Warning:	line 196, column 3
Potential leak of memory pointed to by 'fields'

Free allocated memory pointed by 'fields' and fields[i].in_value

Change-Id: I0b3935d9a235544afc03e39a4648319047e65815
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5906
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li>
2020-11-04 17:35:25 +00:00
Tomas Vanek
49b7099def gdb_server: fix clang static analyzer warning
Warning:	line 373, column 15
Assigned value is garbage or undefined

Most probably a false warning, building the hex string byte
per byte seems too complicated for static analyze.

Change malloc to calloc to silence the warning.

Change-Id: I746d43fa51abf05582ccf2680ed72dc557798a7a
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5905
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li>
2020-11-04 17:35:20 +00:00
Tomas Vanek
a932810f9d helper/command: fix clang static analyzer warning
Warning:	line 955, column 3
Argument to free() is the address of a global variable, which
is not memory allocated by malloc()

It is definitely a false alarm. Simplify concatenation of arguments
and allocate a string always to silence the warning.

Change-Id: I5ac4cc610fc35224df0b16ef4f7102700363249f
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5904
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-11-04 17:35:14 +00:00
Tomas Vanek
cd19f46688 flash/nor/atsamv: fix clang static analyzer warning
Warning:	line 679, column 4
4th function call argument is an uninitialized value

Change-Id: If62d96e1595be945c8e17885bb402e820fb1ec7b
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5903
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li>
2020-11-04 17:35:09 +00:00
Antonio Borneo
91c4c83f44 tcl/board: fix changed target config filenames
In commit a1ce28b118 ("rename some target scripts to be
consistent with the rest") the following renames was applied, but
the old names are still referenced:
	tcl/target/{sam7se512.cfg => at91sam7se512.cfg}
	tcl/target/{sam7x256.cfg => at91sam7x256.cfg}

Fix the board files to use to correct target config filename.

Change-Id: I7698aa0da7db95c2bd9ba7ab8c260905a975c857
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5888
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2020-10-30 22:03:14 +00:00
Antonio Borneo
962697823e tcl/board: drop 'tcl' prefix in 'find' command
When OpenOCD is installed to the host the 'tcl' folder gets
usually installed in /usr/share/openocd/, thus having 'tcl' as
prefix of the target's file causes 'find' to fail.

Remove the 'tcl' folder prefix.

Change-Id: I3dc484c8de6af8f5aae4dd1b230522ee47ae2ba6
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5887
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2020-10-30 22:03:10 +00:00
Antonio Borneo
3da7c1fc83 tcl/interface/ti-icdi: remove empty lines at end of file
Change-Id: I031dc52c20b8f213b12df13c9c974d9ac3ef2164
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5603
Tested-by: jenkins
2020-10-30 22:02:46 +00:00
Moritz Fischer
40e9c77cb6 jtag: xlnx-pcie-xvc: Declare function static
The xlnx_pcie_xvc_execute_stableclocks() function can and
should be static.

Change-Id: I45fb1363caee1f1762b0b1ac2c6bc1bb0153b15b
Signed-off-by: Moritz Fischer <moritzf@google.com>
Reviewed-on: http://openocd.zylin.com/5889
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-10-30 22:02:19 +00:00
Karl Palsson
a92d275fec board: drop open-bldc
This is a) broken and b) doesn't include anything other than the
(broken) target alias.  Don't see any reason for it to exist.

Change-Id: I833635eeac392bf7c0c39f51ff2f76525ba2d406
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-on: http://openocd.zylin.com/5884
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-10-30 22:02:03 +00:00
Cliff L. Biffle
38277fa752 jtag/drivers/stlink_usb: fix SWO prescaler
The config_trace function has an out-parameter for generating the
prescaler for the TPIU. The STLink implementation wasn't always writing
it, causing the tpiu command to load uninitialized stack memory (minus
one) into the TPIU's prescaler register when 'external' was requested.

This change ensures that the out-parameter (and the other one,
trace_freq, which hadn't caused any buggy behavior for me) are written
every time.

Signed-off-by: Cliff L. Biffle <cliff@oxide.computer>
Change-Id: I222975869b1aa49cc6b1963c79d5ea0f46522b8c
Reviewed-on: http://openocd.zylin.com/5656
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-10-30 22:01:32 +00:00
Christopher Head
d05ef53cbd target: restore last run state after profiling
Now that it’s possible to start profiling from either a running or a
halted state, rather than unconditionally halting after profiling
finishes, it makes more sense to restore the processor to whatever state
(running or halted) it was in before profiling started.

Change-Id: If6f6e70a1a365c1ce3b348a306c435c220b8bf12
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5237
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-10-30 22:01:07 +00:00
Christopher Head
d3aa2d3536 target/cortex_m: reduce duplication in profiling
The Cortex-M implementation of profiling contains a bunch of
conditionals and checks to handle both chips which have PCSR and chips
which do not. However, the net effect of the non-PCSR branches is
actually exactly the same as what target_profiling_default does. Rather
than duplicating this code, just detect the situation where PCSR isn’t
available and delegate to target_profiling_default.

Change-Id: I1be57ac77f983816ab6bf644a3cfca77b67d6f70
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5236
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-10-30 22:00:57 +00:00
Christopher Head
a7502ee8b9 target: allow profiling from running
There are a handful of implementations of profiling. There is the
default implementation, which repeatedly halts and resumes the target,
sampling PC each time. There is the Cortex-M implementation, which
uses PCSR if available, otherwise falling back to halting and resuming
and sampling PC. There is the OR1K implementation, which reads NPC
repeatedly. Finally, there is the NDS32 implementation which uses some
kind of AICE commands with which I am unfamiliar.

None of these (with the possible exception of the NDS32
implementation) actually require the target to be halted when starting
profiling. The Cortex-M and OR1K actually resume the target as pretty
much their first action. The default implementation doesn’t do this,
but is written in such a way that the target just flips back and forth
between halted and running, and the code will do the right thing from
either initial state. The NDS32 implementation I don’t know about.

As such, for everything except NDS32, it is not really necessary that
the target be halted to start profiling. For the non-PCSR Cortex-M and
default implementations, there is no real harm in such a requirement,
because profiling is intrusive anyway, but there is no benefit. For
the PCSR-based Cortex-M and the OR1K, requiring that the target is
halted is annoying because it makes profiling more intrusive.

Remove the must-be-halted check from the target_profiling function.
Add it to the NDS32 implementation because I am not sure if that will
break when invoked with a running target. Do not add it to any of the
other implementations because they don’t need it.

Change-Id: I479dce999a80eccccfd3be4fa192c904f0a45709
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5235
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-10-30 22:00:49 +00:00
Tomas Vanek
c1f4d9e6e8 flash/nor/nrf5: unify size of HWID
HWID is a part of 32 bit CONFIGID register. hwid member of struct nrf5_info
was typed uint32_t to enable direct CONFIGID read and masked afterwards.

Change to uint16_t to unify with hwid in struct nrf5_device_spec
and RM description.

Change-Id: Ib720d3ce23c301aee41d074ea78a6f00a23aed68
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5589
Tested-by: jenkins
2020-10-28 10:51:57 +00:00
Tomas Vanek
a5bf98f846 flash/nor/nrf5: improve handling of nRF52 flash errors
nRF52 devices indicate a flash error by emitting hard fault
exception (unlike nRF51 series).

Change error message when NVMC READY read fails. A hard fault
from flash erase/write operation is detected here.

Check exit point of the flash write algo to ensure a failed
write is recognised.

Change-Id: I637eda268a6bf45f7f41bcb9dcd82db8f5cb41b4
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5587
Tested-by: jenkins
2020-10-28 10:51:48 +00:00
Tomas Vanek
491636c8b8 flash/nor/nrf5: check protection before flash erase/write on nRF51
nRF51 devices have a clumsy flash protection based on UICR CLENR0.
A code running in RAM can write to a protected flash region without
any hint the protection gets violated.
NVMC flash page erase obeys protection setting but fails absolutely
silently.

Before this change the first problem was not addressed in the code.
To justify the second one, protection was loaded during probe,
after protection setting and after a mass erase.

Move protection updates to the beginning of erase/write operation
and limit them to nRF51 series only. Check for protected sectors
before write.

The change also fixes the problem of 'nrf5 mass_erase' on
nRF52833/840 devices. They use ACL flash protection, which is not
supported in nrf5 driver. mass_erase then looked like it failed.

Change-Id: Ie58cda68eb104d410b02777c3df5b343408e2666
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5522
Tested-by: jenkins
2020-10-28 10:51:29 +00:00
Tomas Vanek
c97ccc8971 flash/nor/nrf5: fix protection setting on nRF51
Protection setting has not ever worked. UICR CLENR0 register cannot
be simply written but has to programmed because it resides in UICR
page of the flash.

Enable flash programming before writing CLENR0 and set back to r/o
afterwards.

Inform the user that reset might be required.

Change-Id: Ib0f96c74ba3583ac33f4394ddb57d8c8895adf53
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5586
Tested-by: jenkins
2020-10-28 10:50:49 +00:00
Diego Herranz
895d4a5995 tcl/interface/ftdi: Add Steppenprobe open hardware interface
https://github.com/diegoherranz/steppenprobe

Change-Id: Ief2c3f4a8707fa628650697d93893b2355015898
Signed-off-by: Diego Herranz <diegoherranz@diegoherranz.com>
Reviewed-on: http://openocd.zylin.com/5653
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-10-28 10:13:15 +00:00
Brian Brooks
9e2a0effb2 server/telnet: Handle Ctrl+K
Handle Ctrl+K shortcut which clears the line from the cursor position
to the end of line.

Change-Id: I2ecff5284473cef7c11cf9cb7e1c0c97d55f6c1c
Signed-off-by: Brian Brooks <brooks.brian@gmail.com>
Reviewed-on: http://openocd.zylin.com/5868
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
2020-10-24 23:25:33 +01:00
Evgeniy Didin
0d3a67b23f target/arc: introduce watchpoints support
With help of actionpoint mechanism now it is possible to introduce
watchpoints support for ARC.

Change-Id: I5887335d0ba38c15c377bc1d24a1ef36e138cf65
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5867
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-10-24 23:25:03 +01:00
John Pham
ebb88156ce Added comment to ti-icdi.cfg
Added comment to ti-icdi.cfg specifying how to get serial and an example of
specifying hla_serial for ti-icdi devices. This has been implemented in revision
2121a8f92969804611412b705af8114697a647dc

Change-Id: I648458a4dea176beae6a3f1a4e5641d0206077eb
Signed-off-by: John Pham <jhnphm@gmail.com>
Reviewed-on: http://openocd.zylin.com/2528
Tested-by: jenkins
Reviewed-by: Matthew Trescott <matthewtrescott@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-10-24 23:24:45 +01:00
John Pham
e8f483139d Enable hla_serial for TI ICDI devices
Used jtag_libusb_open from libusb_helper.h instead of
libusb_open_device_with_vid_pid to get device handle,
as well as managing context, i.e. similar to stlink_usb.
Direct calls to libusb1 are left in for the moment.

(When this Gerrit revision was originally created,
the jtag_libusb_ wrappers did not return error conditions.)

Tested w/ a TM4C123GXL board

Change-Id: I71e9a366356c125444d4813e58ddd9b6c6498bf0
Signed-off-by: John Pham <jhnphm@gmail.com>
Signed-off-by: Matthew Trescott <matthewtrescott@gmail.com>
Reviewed-on: http://openocd.zylin.com/2527
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-10-24 23:24:38 +01:00
Tarek BOCHKATI
5829646343 flash/stm32l4: add support of STM32G4 category 4 devices (G491/G4A1)
STM32G4 cat.4 devices are up to 512 KB of flash memory (single bank)
organized into pages of 2KB each.

Reference: RM0440 rev.4

Change-Id: I0f510e2806c8f824fff8083e2d4f90d68f01046b
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5793
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-10-22 21:23:43 +01:00
Tomas Vanek
6436f1919c tcl/target/nrf52: fix nrf52_recover
nrf52_recover was merged in pre "Handle Tcl return values consistently"
state - remove ocd_ prefixes.

Erase and unlock sequence was changed to comply Nordic semiconductor
recommendation:
https://infocenter.nordicsemi.com/index.jsp?topic=%2Fnwp_027%2FWP%2Fnwp_027%2FnWP_027_erasing.html

Change-Id: Ic54236c27cf25ad8091e9e572ba1ef846f0d47c2
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reported-by: Pieter De Gendt <pieter.degendt@gmail.com>
Reviewed-on: http://openocd.zylin.com/5845
Tested-by: jenkins
Reviewed-by: Pieter De Gendt <pieter.degendt@gmail.com>
2020-10-22 21:19:59 +01:00
Sylvain Chouleur
5e61d59c90 cortex_m: support control.FPCA
Bit 2 of control register is used if the processor includes the FP
extension

Change-Id: Ie21bc9de8cae5bad9d841e1908eff3aa0bb29d4b
Signed-off-by: Sylvain Chouleur <schouleur@graimatterlabs.ai>
Reviewed-on: http://openocd.zylin.com/5853
Reviewed-by: Sylvain Chouleur <sylvain.chouleur@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-10-22 21:19:12 +01:00
Antonio Borneo
4fc61a2f9d riscv: fix compile error
The commit b68674a1da ("Upstream tons of RISC-V changes.") was
proposed well before commit 3ac010bb9f ("Fix debug prints when
loading to flash"), but the merge got in different order.
After latest merge, the master branch fails to compile.

Fix the compile error.

Change-Id: Ia3bd21d970d589343a3b9b2d58c89e0c49f30015
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5856
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Jan Matyas <matyas@codasip.com>
2020-10-14 11:05:22 +01:00
Tim Newsome
b68674a1da Upstream tons of RISC-V changes.
These are all the changes from https://github.com/riscv/riscv-openocd
(approximately 91dc0c0c) made just to src/target/riscv/*. Some of the
new code is disabled because it requires some other target-independent
changes which I didn't want to include here.

Built like this, OpenOCD passes:
* All single-RV32 tests against spike.
* All single-RV64 tests against spike.
* Enough HiFive1 tests. (I suspect the failures are due to the test
suite rotting.)
* Many dual-RV32 (-rtos hwthread) against spike.
* Many dual-RV64 (-rtos hwthread) against spike.

I suspect this is an overall improvement compared to what's in mainline
right now, and it gets me a lot closer to getting all the riscv-openocd
work upstreamed.

Change-Id: Ide2f80c9397400780ff6780d78a206bc6a6e2f98
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/5821
Tested-by: jenkins
Reviewed-by: Jan Matyas <matyas@codasip.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
2020-10-14 05:43:05 +01:00
Benedikt-Alexander Mokroß
fc7edd57ac flash/nor/at91sam4: ATSAMG55x19 Rev.B
Add support for ATSAMG55x19 Rev.B.
Both chips have nearly the same cidr, however, Rev.B has an incremented version.

Change-Id: I5939c41fa5d54c4d3bfb850964974b878f709d13
Signed-off-by: Benedikt-Alexander Mokroß <mokross@gessler.de>
Reviewed-on: http://openocd.zylin.com/5825
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2020-10-14 05:40:27 +01:00
Antonio Borneo
3ffa14b043 target/aarch64: fix use of 'target->private_config'
The function adiv5_jim_configure() casts the void pointer
'target->private_config' to a struct adiv5_private_config pointer.
This is tricky in case of aarch64, where the private data are in a
struct aarch64_private_config that has as first element the struct
adiv5_private_config.

While the current solution is working fine, it's not clean and
requires special attention for any further code development.

Override 'target->private_config' to the correct pointer while
calling adiv5_jim_configure().

Change-Id: Ic2fc047dd1e57013943d96e6d5879a919d1eb7b3
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5847
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-10-11 15:53:52 +01:00
Kevin Yang
63d3640add target/aarch64: Use apnum setting
Change aarch64 to use ap-num setting if provided. Fall back to original
behavior of using first AP when ap-num is invalid.

Change-Id: I0d3624f75c86ba5fd5a322ac60856dbbb6e71eaf
Signed-off-by: Kevin Yang <kangyang@google.com>
Reviewed-on: http://openocd.zylin.com/5831
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-10-11 15:53:43 +01:00
Antonio Borneo
9a877a83a1 drivers/jlink: fix (again) calculate_swo_prescaler formula
The prescaler computation should round at the nearest integer
value, not to the next integer value.

Change-Id: I957e0774421211f3c4ba4b312738b1c67b87c4a2
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 051e80812b ("drivers/jlink: fix calculate_swo_prescaler formula")
Reviewed-on: http://openocd.zylin.com/5846
Tested-by: jenkins
Reviewed-by: Adrian M Negreanu <adrian.negreanu@nxp.com>
2020-10-03 11:23:22 +01:00
Andreas Fritiofson
87d2651edc Update user dir config file search path
Search in XDG_CONFIG_HOME as per XDG Base Directory Specification
in addition to $HOME/.openocd.

On Darwin, search in ~/Library/Preferences/org.openocd/ which
appears to be one of the conventional locations.

Make $OPENOCD_SCRIPTS highest priority on all platforms, previously
it was only higher on WIN32.

Update the documentation to reflect the search order.

Change-Id: Ibaf4b59b51fdf452712d91b47ea2b5312bb5ada9
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3890
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-10-03 11:23:12 +01:00
Karl Palsson
2ff1824a87 FreeRTOS: strip duplicate line returns
Log lines already print a new line, so these superfluous \r\n result in
blank lines being printed in the log.  Remove per review comment
request.

Change-Id: I8f5b20776634cf70ce4490fc4f732c916130928a
Signed-off-by: Karl Palsson <karlp@etactica.com>
Reviewed-on: http://openocd.zylin.com/5843
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2020-10-03 11:22:52 +01:00
Karl Palsson
4dade98c44 FreeRTOS: properly read on big endian systems.
Remember, don't cast your pointers between types of different sizes!

While the FreeRTOS handlers attempt to account for different pointer and
list widths, the types used are always fixed, so this will _remain_
broken if/when someone targets FreeRTOS on 8/16/64 bit targets. (Note
that this patch does not _change_ that, it was fixed to 32bit before as
well)

In the meantime, this properly handles 32bit reads on a mips BE system
(ath79) as well as remaining fully functional on x86_64.

Change-Id: I677bb7130e25dccb7c1bee8fabaee27371494d00
Signed-off-by: Karl Palsson <karlp@etactica.com>
Reviewed-on: http://openocd.zylin.com/5842
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2020-10-03 11:22:06 +01:00
Kevin Burke
cbbec2dce5 ARM|Driver: Add DPI Driver for emulation
This driver provides support for Cadence JTAG BFM

The "jtag_dpi" driver implements a JTAG driver acting as a client for the
SystemVerilog Direct Programming Interface (DPI) for JTAG devices.
DPI allows OpenOCD to connect to the JTAG interface of a hardware model
written in SystemVerilog, for example, on an emulation model of
target hardware.

Tested on Ampere emulation with Altra and Altra Max models

Change-Id: Iaef8ba5cc1398ee2c888f39a606e8cb592484625
Signed-off-by: Kevin Burke <kevinb@os.amperecomputing.com>
Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Reviewed-on: http://openocd.zylin.com/5573
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-10-03 11:21:51 +01:00
Daniel Trnka
87b95ab212 target/cortex_m.c: vector_catch command checks if a target is examined
If a target is not examined, command vector_catch crashes while accessing
the debug_ap NULL pointer.

maskisr and reset_config commands don't require this check.

Change-Id: I949b6f6e8b983327dd98fbe403735141f8f0b5d6
Signed-off-by: Daniel Trnka <daniel.trnka@gmail.com>
Reviewed-on: http://openocd.zylin.com/5813
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-10-03 11:21:33 +01:00
Mete Balci
d7d70c2719 target/aarch64: a64 disassembler
Add A64 (AArch64) Disassembler using Capstone framework.

Change-Id: Ia92b57001843b11a818af940a468b131e42a03fd
Signed-off-by: Mete Balci <metebalci@gmail.com>
[Antonio Borneo: Rebased on current HEAD]
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5004
Tested-by: jenkins
2020-10-03 11:21:15 +01:00
Ulrich-Lorenz Schlüter
a31e579e87 tcl: board/dp_busblaster_v4 Busblaster v4.1a by Seed Studio added
Change-Id: I53141d7f6f022f9dee641858f5fb0e0b70c049f8
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Ulrich-Lorenz Schlüter <audiomobster@gmail.com>
Reviewed-on: http://openocd.zylin.com/5549
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-10-03 11:20:59 +01:00
Jan Kowalewski
1593e4a47e tcl/board: Add QuickLogic QuickFeather configuration
Add configuration for QuickLogic QuickFeather development kit.

Change-Id: I39120714bf0bcafa86e0071c38da84a7d9f12a0d
Signed-off-by: Jan Kowalewski <jkowalewski@antmicro.com>
Reviewed-on: http://openocd.zylin.com/5803
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2020-10-03 11:20:43 +01:00
Jan Kowalewski
c3166b43e4 tcl/target: Add QuickLogic EOS S3 MCU configuration
Add configuration for QuickLogic EOS S3 MCU target.

Change-Id: I375057ff387a826e632f194843dbd92148b0c5dd
Signed-off-by: Jan Kowalewski <jkowalewski@antmicro.com>
Reviewed-on: http://openocd.zylin.com/5802
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-10-03 11:20:30 +01:00
Adrian Negreanu
051e80812b drivers/jlink: fix calculate_swo_prescaler formula
a) TPIU_ACPR is defined as:
	SWO_baudrate = TRACECLKIN/(TPIU_ACPR +1)

b) TPIU_ACPR is set by armv7m_trace_tpiu_config()
	target_write_u32(target, TPIU_ACPR, Prescaler-1), so
	TPIU_ACPR = Prescaler-1

Replacing TPIU_ACPR in a), we get:
	SWO_baudrate = TRACECLKIN/Prescaler, so

c)	Prescaler = TRACECLKIN/SWO_baudrate

The Prescaler calculated by calculate_swo_prescaler() is greater by 1:
	Prescaler = TRACECLKIN/SWO_baudrate + 1

The second problem is that even in situations when
an exact baudrate match is possible,
the resulting TRACECLKIN/Prescaler already has a 3% deviation.

For example, TRACECLKIN=88000000, SWO_baudrate=500000,
calculate_swo_prescaler will return Prescaler=171.
The correct value should be Prescaler=176 (TPIU_ACPR=175).

Might be related to https://sourceforge.net/p/openocd/tickets/263/

Change-Id: Ib4d6df6e34685a9be4c2995cb500b2411c76e39b
Signed-off-by: Adrian Negreanu <adrian.negreanu@nxp.com>
Reviewed-on: http://openocd.zylin.com/5807
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-09-27 17:40:12 +01:00
Tarek BOCHKATI
35e580373a Add support of STM32H72x/73x 1M (0x483)
STM32H72x/73x flash is similar to STM32H74x/75x,
except STM32H72x/73x devices have only one single flash bank.

Change-Id: I3d3422dc60234f8273172924f426200210f388cc
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5792
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-09-27 17:39:59 +01:00
Marc Schink
67008e1bea Use capstone for ARM disassembler
Change-Id: I1c9bf3f8178d4a06babe23a918e4411833ebc418
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/4812
Tested-by: jenkins
Reviewed-by: Fredrik Hederstierna <fredrik@hederstierna.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-09-27 17:39:44 +01:00
Tarek BOCHKATI
762ddcb749 cortex_m: add detection of Cortex M35P and M55
Change-Id: I52599b2b09c2dc50c95d64059213c832d380ea31
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5799
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-09-20 14:35:48 +01:00
Tarek BOCHKATI
f2c83fade3 cortex_m: read and display core security state
Change-Id: I0fce3c66af7e98df2dc2258daf0d6af661e29ae7
Signed-off-by: Laurent LEMELE <laurent.lemele@st.com>
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5798
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-09-20 14:35:44 +01:00
Tarek BOCHKATI
6e33947899 armv8-m: add SecureFault exception
Change-Id: I4e1963631e834b6334bc917e956c2db4464b7b08
Signed-off-by: Laurent LEMELE <laurent.lemele@st.com>
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5797
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-09-20 14:35:04 +01:00
Tarek BOCHKATI
c20f65b632 GitHub: add workflow to provide an openocd snapshot binaries for win32
This change could be used within OpenOCD GitHub forks.

Once workflow actions are enabled in the GitHub project, this workflow
will be run automatically on each push into OpenOCD.

This workflow will provide a neutral build of openocd for win32, then
the package will be available for download in Actions section.
Note: the artifact will be deleted after 90 day (actual GitHub rules)

If the push is a tag, the generated package will be uploaded to release
pane under the corresponding release, and it will resides forever.

The built openocd enables libusb1, hidapi and libftdi adapters,
and could be extended to cover more adapters and Oses

PS: ./contrib/cross-build.sh updated to build libftdi from source like
libusb1 and hidapi.

Change-Id: I290c8aa14a12548e2dcb6a0eee456430ea44ab9f
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5594
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-09-20 14:34:48 +01:00
Antonio Borneo
3934483429 target: avoid checking for non NULL pointer to free it
The function free() can be called with a NULL pointer as argument,
no need to check the argument before. If the pointer is NULL, no
operation is performed by free().

Remove the occurrences of pattern:
	if (ptr)
		free(ptr);

In target/openrisc/jsp_server.c, an error is logged if the ptr was
already NULL. This cannot happen since the pointer was already
referenced few lines before and openocd would have been already
SIGSEGV in that case, so remove the log.

Change-Id: I290a32e6d4deab167676af4ddc83523c830ae49e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5809
Tested-by: jenkins
2020-09-05 20:47:11 +01:00
Antonio Borneo
0dad8cbfe9 drivers/buspirate: remove empty lines at end of file
Change split from http://openocd.zylin.com/5172/ to avoid
conflicts with other pending changes in gerrit.

Change-Id: Id3e21c92b3da7ddce7b00664280da2143c06f172
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5604
Tested-by: jenkins
2020-09-05 18:44:19 +01:00
Antonio Borneo
24db985f60 jtag: avoid checking for non NULL pointer to free it
The function free() can be called with a NULL pointer as argument,
no need to check the argument before. If the pointer is NULL, no
operation is performed by free().

Remove the occurrences of pattern:
	if (ptr)
		free(ptr);

Change-Id: I2938e333bd1eac5218bd67aefb9d8f373da017a8
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5810
Tested-by: jenkins
2020-09-05 18:42:20 +01:00
Stafford Horne
a098a14eb5 openrisc: Fix segv jsp due to free of unallocated data
The prompt pointer in the jtag serial port is never zero'd or allocated.
Completely remove it since there is not much use for it as the target
software will provide the actual prompt.

Change-Id: Id95d8ccb9f725e53b9d03386b11d91eba1cd6ef4
Signed-off-by: Stafford Horne <shorne@gmail.com>
Reviewed-on: http://openocd.zylin.com/4093
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-09-05 18:11:54 +01:00
Antonio Borneo
f788949651 openocd: fix command's usage string
The usage string should contain only the command parameters.
OpenOCD will automatically prepend the command name to the usage
string while dumping the usage or help message.

Remove the repeated command name from the usage string.

Change-Id: If10a0f1c254aee302b9ca08958390b7f21cdb21b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5824
Tested-by: jenkins
2020-09-05 17:13:10 +01:00
Antonio Borneo
25b8b37638 jtag/aice: fix command's usage string
The usage string should contain only the command parameters.
OpenOCD will automatically prepend the command name to the usage
string while dumping the usage or help message.

Remove the repeated command name from the usage string.

Change-Id: Idbc301b34fab19e221131d232577c1629568e6ea
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5823
Tested-by: jenkins
2020-09-05 17:13:05 +01:00
Antonio Borneo
42faa8a4bc target/arc: fix command's usage string
The usage string should contain only the command parameters.
OpenOCD will automatically prepend the command name to the usage
string while dumping the usage or help message.

Remove the repeated command name from the usage string.

Change-Id: I691094a6395acb0e4ea3bea2347ff38379002464
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5822
Tested-by: jenkins
2020-09-05 17:13:00 +01:00
Antonio Borneo
d3249fd45a openocd: use proper format with uint32_t
Modify the format strings to properly handle uint32_t data types.

Change-Id: I4de49bf02c9e37b72240224c23fc83abe8a4fa83
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5819
Tested-by: jenkins
2020-09-05 17:12:44 +01:00
Antonio Borneo
99add6227f target: use proper format with uint32_t
Modify the format strings to properly handle uint32_t data types.

While there, fix prototype mismatch between header and C file of
the function armv7a_l1_d_cache_inval_virt().

Change-Id: I434bd241fa5c38e0c15d22cda2295097050067f5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5818
Tested-by: jenkins
2020-09-05 17:12:39 +01:00
Antonio Borneo
e66593f824 flash: use proper format with uint32_t
Modify the format strings to properly handle uint32_t data types.

Change the type of variable retval in 'nor/ambiqmicro.c' to match
both the value to carry and the returned type of the function.

Fix the prototype mismatch of function lpc2900_address2sector()
between the header and the C file.

Change-Id: I68ffba9bd83eec8132f83bff3af993861fd09d84
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5816
Tested-by: jenkins
2020-09-05 17:12:32 +01:00
Antonio Borneo
2f62883161 jtag: use proper format with uint32_t
Modify the format strings to properly handle uint32_t data types.

Change the prototype of detect_swo_freq_and_prescaler() in
'jlink.c' to avoid an implicit cast in the caller function.

Change the type of the variable retlen in some functions in
'usb_blaster.c' to properly pass their pointer to the local read
and write functions.

Use the proper parser COMMAND_PARSE_NUMBER(u32, ...).

Change-Id: I5227dbce04ee59881f173724db90790b7b9cc7af
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5815
Tested-by: jenkins
2020-09-05 17:12:25 +01:00
Antonio Borneo
d493b53e8c jtag/aice: avoid abusing of int32_t type
In several cases the 'int' status value returned by libusb and by
aice internal functions is taken in a variable of type 'int32_t',
requiring an implicit (but trivial) cast.
This makes compulsory using 'PRId32' in the format strings that
print such 'int32_t' result and requires an additional implicit
conversion to return the 'int32_t' as 'int'.

Replace to type 'int' all the occurrences of 'int32_t result' and
fix accordingly the format strings.

Plus, all the size of aice commands are stored as int32_t const
variables with uppercase name, violating the coding style, and are
then passed as 'int' parameter to the read/write functions.

Replace the variables with C macros carrying an 'int' value.

While there, replace also a 'uint32_t' loop index with 'unsigned'
and fix the format string in the loop.

Change-Id: Ic57d58770f1af95f003b5a02fbcb7c926ec06fd1
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5814
Tested-by: jenkins
2020-09-05 17:12:19 +01:00
Antonio Borneo
4e98d44fd1 openocd: avoid checking for non NULL pointer to free it
The function free() can be called with a NULL pointer as argument,
no need to check the argument before. If the pointer is NULL, no
operation is performed by free().

Remove the occurrences of pattern:
	if (ptr)
		free(ptr);

While there replace a sequence malloc(size)+memset(,0,size) with a
calloc(1,size).
Replace a pointer assignment to '0' with an assignment to NULL.
In server/*, an error is logged if the ptr was already NULL. This
cannot happen since the pointer was already referenced few lines
before and openocd would have been already SIGSEGV in that case,
so remove the log.

Change-Id: I10822029fe8390b59edff4070575bf7f754e44ac
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5808
Reviewed-by: Adrian M Negreanu <adrian.negreanu@nxp.com>
Tested-by: jenkins
2020-09-05 17:11:50 +01:00
Antonio Borneo
62329444ab flash: avoid checking for non NULL pointer to free it
The function free() can be called with a NULL pointer as argument,
no need to check the argument before. If the pointer is NULL, no
operation is performed by free().

Remove the occurrences of pattern:
	if (ptr)
		free(ptr);

There are cases where the pointer is set to NULL after free(), but
then re-assigned within few lines. Drop the setting to NULL when
this is evident. Anyway, the compiler will remove the useless
assignment so no reason to be too much aggressive in this change.

Change-Id: I55b2ce7cbe201410016398933e34d33a4b66e30b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5811
Tested-by: jenkins
2020-09-05 17:11:34 +01:00
Antonio Borneo
47d29ebe11 adi_v5: use macro DP_APSEL_MAX to allocate struct adiv5_ap
Commit 11019a824d ("adi_v5: enforce check on AP number value")
introduces the macro DP_APSEL_MAX and use it in place of hardcoded
magic numbers for the upper limit of AP selection value.

Use the macro also while defining the array of struct adiv5_ap in
struct adiv5_dap.

Change-Id: I88f53ceb710f92a48a8026a365709fbf2d9e6912
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5806
Tested-by: jenkins
2020-09-05 17:11:11 +01:00
Antonio Borneo
aa628304e2 helper: fix minor typos
Change-Id: I785e388148c0329e51cb0b39ab30e8ee44f5a7cd
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5801
Tested-by: jenkins
2020-09-05 17:10:54 +01:00
Antonio Borneo
60f104f450 hla_transport: split command registration per transport
All the HLA transports (hla_swd and hla_jtag) register the same
set of commands. Such commands are mainly aimed at handling JTAG
compatibility that is required for the transport hla_jtag only.

Split per transport the command registration and limit the
commands to only those required by the transport itself.
Replace the command "hla newtap" with the transport specific
"swd newdap" or "jtag newtap".
Deprecate the command "hla".

Change-Id: I79c78fa97b707482608516d3824151a4d07644c0
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4877
Tested-by: jenkins
2020-09-05 17:10:38 +01:00
Antonio Borneo
1457a1ab42 tcl/target: use command 'jtag newtap' to add a boundary scan TAP
A JTAG TAP for boundary scan should be added in the scan chain
through the command "jtag newtap".
In some TCL target script the boundary scan TAP is added through
the command "swj_newdap", command that is inappropriate in this
context because specific for arm adi-v5 SWJ-DP.
This situation was probably created to bypass the error with HLA
framework, caused by missing command "jtag newtap".

Add the command "jtag newtap" in HLA, by reusing the existing
code for command "hla newtap".
Fix the TCL target scripts to use the command "jtag newtap" for
the boundary scan TAPs.

The TCL script target/psoc6.cfg has no evident reference to HLA,
so the reason for using "swj_newdap" is less clear. Nevertheless
it uses the wrong command and, once HLA is fixed, there is no
reason to avoid fixing it too.

Change-Id: Ia92f8221430cf6f3d2c34294e22e5e18963bb88c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4873
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-09-05 17:10:14 +01:00
Alexandre Bourdiol
f1d77a485c tcl/board/st_nucleo_l1.cfg use dualbank configuration
st_nucleo_l1.cfg is based on STM32L152RET6 which support
dualbank flash.

Change-Id: I7ecdb7b7557229465e23eed667f20cd84197dfc7
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Reviewed-on: http://openocd.zylin.com/5829
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-09-05 16:48:26 +01:00
Samuel Obuch
3ac010bb9f Fix debug prints when loading to flash
While loading to flash with debug level at least 3,
OpenOCD tries to print the whole loaded bitstream.
This will be very-very-slow due to implementation of
conversion from buffer to string.

* fix condition on selected debug level in jtag/core.c
* replace slow buf_to_str function from helper/binarybuffer.c
  with faster but_to_hex_str function

Change-Id: I3dc01d5846941ca80736f2ed12e3a54114d2b6dd
Signed-off-by: Samuel Obuch <sobuch@codasip.com>
Reviewed-on: http://openocd.zylin.com/5800
Tested-by: jenkins
Reviewed-by: Jan Matyas <matyas@codasip.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-09-05 16:48:08 +01:00
Jan Kowalewski
764b25c814 tcl/interface/ftdi: fix comment in minimodule-swd.cfg
Change-Id: I160faca11f231e3e839046ae2045e37e350ca613
Signed-off-by: Jan Kowalewski <jkowalewski@antmicro.com>
Reviewed-on: http://openocd.zylin.com/5804
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-09-05 16:47:41 +01:00
Andreas Fritiofson
d46f28c2ea Refer to cross-build script in README
Change-Id: Ic983d2505e40891ba0d0eea3468a71a7741f5c3a
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/5711
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-08-17 14:11:25 +01:00
Antonio Borneo
d88765a7e2 log: handle LOG_*() before calling to log_init()
There are cases where LOG_*() functions are called before the logs
are initialized with log_init().
E.g. in transport_register() that is executed in gcc constructors,
thus called even before main().
With debug_level set to LOG_LVL_USER=-1 all the LOG_ERROR() get
dropped.
Properly initializing debug_level cause segmentation fault due to
log_output still not initialized.

Initialize debug_level to LOG_LVL_INFO so errors get printed.
Handle separately the case of log_output still NULL, meaning that
log_init() is not called yet.

Change-Id: I2ea32c87a4955fb44e79b38131c456e25dfbc327
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5602
Tested-by: jenkins
2020-08-16 11:49:31 +01:00
Christopher Head
401086186f server/gdb_server: fix incorrect condition check
The warning message should be printed if the target is NOT halted, not
if it IS halted.

Change-Id: I0a38292a8a2e20e4a4a5ada92b475d551d4cbf38
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5794
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-08-16 11:49:20 +01:00
Hellosun Wu
105f8386ad tcl: Add support for NDS V5 target and xc7/Corvette-F1
The "Corvette-F1" is an Arduino-compatible evaluation platform,
which fully supports AndesCore. The board has FTDI FT2232 to
connected to FPGA's JTAG interface.

The "ADP-XC7KFF676" is a development and prototyping board that
provides capacity for evaluation of AndesCore processors.
It works with AICE in-circuit debugging tools.

This patch also include target/nds32v5.cfg to support AndesCore
N22/N25F and AndeShape Platform AE250.

Change-Id: I144d5063d5086d00ec44634a5028b5ea5d2eba33
Signed-off-by: Hellosun Wu <wujiheng.tw@gmail.com>
Reviewed-on: http://openocd.zylin.com/5338
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-08-16 11:48:53 +01:00
Christopher Head
6ec2ec4d32 src/flash/nor/virtual: handle null pointers
Either of protect and protect_check driver callbacks can be NULL. In
virtual_protect, reuse flash_driver_protect which checks for that case
and generates a nice error message and return code. In
virtual_protect_check, there is no corresponding flash_driver_*
function, so add the NULL check directly.

Change-Id: Ia63d85ede640a8382cf5cad0760f5d1ffe4d7cfe
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5782
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-08-09 15:30:23 +01:00
Christopher Head
37eac2dfbc flash/nor/stm32f2x: clean up data types
Change-Id: I677bc4487fc2eff2c32e14ca2db5470fddaa63b5
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5778
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-08-09 15:30:00 +01:00
Christopher Head
998e60e917 src/flash/nor/stm32h7x: fix format strings
* use proper type codes
* add 0x in front of hex values
* remove some concatenated empty strings

Change-Id: I06a8344d0ed62de7a0f3e2dd8fba69b17eeb3626
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5783
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-08-09 15:29:45 +01:00
Antonio Borneo
cd06642314 target: fix memory leaks on target_create() fail
There are failure cases of target_create() that are not checked.
Plus, in case of failure the memory allocated in not properly
released before returning error.

Check all the possible failure in target_create().
Change current_target only when target is successfully created.
Add the new target to all_targets list only when target is
successfully created.
Release all the allocated memory before quit on failure.
Use malloc() instead of calloc() for target->type, because the
struct will be fully populated with memcpy().

Change-Id: Ib6f91cbb50c28878e7c73dc070b17b8d7d4e902f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5776
Tested-by: jenkins
2020-08-08 22:17:43 +01:00
Antonio Borneo
2f92598f0d gdb_server: refuse gdb connection if target is not examined
If the target is not examined, many internal data required for the
gdb connections are not ready nor allocated. This causes OpenOCD
to hit a segmentation fault.

After the execution of the gdb-attach event handler, check if
target has been examined and eventually return error to refuse the
gdb connection.

Plus, since OpenOCD does not implements non-stop mode yet, gdb
expects the target to be halted by the inferior when the
connection is established.
Print a warning to inform the user in case the target is not
halted, but still accept the gdb connection to permit the
non-intrusive memory inspection with gdb, as explained in
http://openocd.org/doc/html/GDB-and-OpenOCD.html#gdbmeminspect

Change-Id: If727d68f683c3a94e4826e8c62977de41274ceff
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5201
Tested-by: jenkins
2020-08-08 22:17:31 +01:00
Mikhail Rasputin
6d45e485f9 target: fix registers reading from non examined target
If a target is not examined when the debugger tries to connect to it
then it can lead to undesired/undefined behavior.

In particular it leads to a zero pointer dereference on the aarch64.


Change-Id: I67f2b714ab8b2727fd36f3de16d7f9017b4c55fe
Signed-off-by: Mikhail Rasputin <mikhail.godlike.rasputin@yandex.ru>
Reviewed-on: http://openocd.zylin.com/5727
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-08-08 22:17:08 +01:00
R. Diez
86777768eb Fix 2 warnings about obsolete Autoconf macros.
Those changes were automatically suggested by tool "autoupdate".

Change-Id: Id70bdeacc3c80816f3f5c65d1abceabb5cdf3873
Signed-off-by: R. Diez <rdiezmail-openocd@yahoo.de>
Reviewed-on: http://openocd.zylin.com/5638
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-08-08 22:16:49 +01:00
Antonio Borneo
fa9a4d4db5 tcl/interface: snps_sdp: fix minor typo s/similiar/similar/
Change-Id: I4fd6af560278b3e114cc5d8ee1b49b5c4521d8be
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: b2821b6074 ("Introduce tcl config files for Synopsys HSDK board")
Reviewed-on: http://openocd.zylin.com/5788
Tested-by: jenkins
Reviewed-by: Evgeniy Didin <didin@synopsys.com>
2020-08-02 10:49:20 +01:00
Antonio Borneo
e0c16c4c8f tcl/target/armada370: remove useless 'init' command
As the comment states, the 'init' command is issued before the
command 'dap apsel', otherwise it fails.
This dependency has been already fixed in commit e48690cb26
("target/arm_adi_v5: allow commands apsel and apcsw during init
phase"), so the command 'dap apsel' can now be issued directly.

Remove both the unneeded 'init' command and the comment that
documents and justify its presence.

Change-Id: I50f0a820fa7ead6f5a3bd9cc5180d521070822c9
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5786
Tested-by: jenkins
2020-08-02 10:49:09 +01:00
Antonio Borneo
7c66df13ef target/arm11: fix memory leaks, including register cache
There is no deinit_target method, so few memory allocations leak
at openocd exit.
Issue identified by tracking all calls to arm_dpm_setup().

Implement the method arm11_dpm_deinit() to free all the memory
allocated in arm11_dpm_init() and call it in the new
arm11_deinit_target().

NOT TESTED on real HW.

Change-Id: Icab86e290fc2db14f70eb84c8286357aadb02a35
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5694
Tested-by: jenkins
2020-08-02 10:48:52 +01:00
Antonio Borneo
768502403e target: use one second timeout while halting target at gdb attach
By default GDB timeouts after 2 seconds, even if this value can be
modified with GDB command "set remotetimeout".
On OpenOCD side, the default event for GDB attach is to halt the
target and wait it to halt. But here the default timeout of the
halt command is 5 seconds!
If the target cannot be halted (e.g. it's kept in reset by another
core or the debugger doesn't have enough privileges) then GDB will
timeout while OpenOCD is still waiting and is unable to
communicate with GDB.

Decrease the halt timeout to 1 second in the default GDB attach
event handler.

Change-Id: I231c740816bb6a0d74b0bc679a368a6cbfb34824
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5687
Tested-by: jenkins
2020-08-02 10:48:41 +01:00
Antonio Borneo
33b52174e6 nulink: add minimal support for Nu-Link2
Implementation largely taken from Nuvoton github
	https://github.com/OpenNuvoton/OpenOCD-Nuvoton

Reset is still not fully compatible with OpenOCD framework.
Adapted to hidapi.

Change-Id: Ieb1791b1b7f0b444c15c9668f8f2bcf34975d48f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Zale Yu <cyyu@nuvoton.com>
Reviewed-on: http://openocd.zylin.com/5720
Tested-by: jenkins
Reviewed-by: Saravanan Sekar <saravanan@linumiz.com>
Reviewed-by: Marc Schink <dev@zapb.de>
2020-08-02 10:48:20 +01:00
Michael Betz
c6a2621f9f nor/spi.c: add N25Q032A flash chip
this flash is used on the Digilent CMODA7 FPGA board

Change-Id: I6749ca3fbebf2e384051a26a3fd253da5d6e25fb
Signed-off-by: Michael Betz <michibetz@gmail.com>
Reviewed-on: http://openocd.zylin.com/5787
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-08-02 10:47:29 +01:00
Zale Yu
b12fca236d jtag/drivers: add support for Nu-Link (Nuvoton ICE) over usb
Add support for Nu-Link1 over usb hidapi and config file.

The original work is fetched from Nuvoton github.
Code cleanup, fix merge conflicts, compile and runtime issues.
Switch the code from libusb to hidapi, being the device HID based.
Add documentation.
Merge fixes for multi-word memory read.

Reset is not fully compatible with openocd framework; currently
the target is reset and then halt at openocd start.

Change-Id: I9738de4e26783ba462ea3e39ec32069fd5bb7d94
Signed-off-by: Zale Yu <cyyu@nuvoton.com>
Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5635
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
2020-08-02 10:47:02 +01:00
R. Diez
583a65644b Make autotools warnings visible.
Change-Id: Ibcdac7100faca7a66d9b3440431e74a8a8c5f042
Signed-off-by: R. Diez <rdiezmail-openocd@yahoo.de>
Reviewed-on: http://openocd.zylin.com/5639
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-07-30 12:26:24 +01:00
Michal Potrzebicz
fb739651c7 cmsis_dap_usb: Support for Microchip's nEDBG CMSIS-DAP interface
This commit fixes support for the nEDBG CMSIS-DAP interface
which is used ie. on the Curiosity Nano SAMD21 board.
nEDBG, similarily to mEDBG, does not support 512 byte HID packets.
This patch adds its USB PID to the exclusion list to make sure that
we stick with the default 64 bytes.

Change-Id: I9010b0cf77c0b1347269a759b5d16ee5155abb16
Signed-off-by: Michal Potrzebicz <michal@elevendroids.com>
Reviewed-on: http://openocd.zylin.com/5756
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-07-30 12:16:23 +01:00
Antonio Borneo
480ba8ca88 target: fix minor typos and duplicated words
Change-Id: I8deb0017dc66a243e3dd51e285aa086db500decd
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5766
Tested-by: jenkins
2020-07-26 23:09:45 +01:00
Antonio Borneo
3e6f4f8b21 drivers/bitbang: blink LED on SWD
The blinking was implemented for JTAG only.

Extend it to SWD.
There is no error check on SWD exchange. Add a FIXME for further
fix.

Change-Id: I42a6708c54b1eefaf691e0fe09ca58c42b2764fd
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5771
Tested-by: jenkins
2020-07-26 20:15:42 +01:00
Antonio Borneo
9b32a06dad drivers/linuxgpiod: add led
Bitbang interface allows having a LED on one of the GPIO.

Let also linuxgpiod driver to specify and use the LED connection.

Change-Id: Id3d8772ee1808b92354fd073ba3947bacd8253ef
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5770
Tested-by: jenkins
2020-07-26 20:15:34 +01:00
Antonio Borneo
d62b3c51df svf: fix minor typos
Change-Id: I40ac2d01c1feb2771ce96a26c4a4d05a1e816a61
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5761
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-07-26 20:15:20 +01:00
Antonio Borneo
02ecd452c2 flash: fix minor typo s/fifo's/fifos/
Change-Id: I21feee50377b13cd0d48749c19abb12d499fe199
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5769
Tested-by: jenkins
2020-07-26 20:15:04 +01:00
Antonio Borneo
29a899f3d2 contrib: fix minor typos
While there, replace s/return(0)/return 0/ that causes checkpatch
to fail.

Change-Id: I5ad54cffca629475563c471114a9f77301a9e4f8
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5768
Tested-by: jenkins
2020-07-26 20:14:51 +01:00
Antonio Borneo
4c8753a83c jtag: fix minor typos
Change-Id: I3a3370db438f8fd045fb22e7c9fff4e83794a3b7
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5767
Tested-by: jenkins
2020-07-26 20:14:37 +01:00
Antonio Borneo
890048eec4 xsvf: fix minor typos
Change-Id: Ib36b2178eacf79dd26ebd2e15ba385853825c198
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5765
Tested-by: jenkins
2020-07-26 20:14:22 +01:00
Antonio Borneo
fbaa134eda transport: fix minor typos
Change-Id: I481d69f9953e04c881124b2da4d092213591e4ae
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5764
Tested-by: jenkins
2020-07-26 20:14:14 +01:00
Antonio Borneo
1f08ada366 server: fix minor typos
Change-Id: Ibf835dc174a1a160ec0d57000a113c35f2713045
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5760
Tested-by: jenkins
2020-07-26 20:14:00 +01:00
Antonio Borneo
e527937779 rtos: fix minor typos
Change-Id: I9ed4e2150a0a057397538b608d4a72bc48d0d64f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5759
Tested-by: jenkins
2020-07-26 20:13:41 +01:00
Antonio Borneo
9db3e9879d flash: fix typos and duplicated words
Fix typos and duplicated words in comments and strings.

Change-Id: I64282c7018462deefeeb8e5f4d0d81942425b3fc
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5758
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Christopher Head <chead@zaber.com>
2020-07-26 20:13:22 +01:00
Antonio Borneo
f5cc8360fd target/arm720t: fix memory leak of register cache
There is no method to free the register cache, allocated in
arm720t_init_target().
Issue identified by tracking all calls to arm7tdmi_init_target().

Implement the method arm720t_deinit_target() by calling directly
arm7tdmi_deinit_target().

NOT TESTED on a real arm720t target.
Tested on a arm926ejs (SPEAr320) by hacking the target type and
pretending it is a xscale:
	sed -i s/arm926ejs/arm720t/ tcl/target/spear3xx.cfg

Change-Id: I53c1f46c1a355a710e8df01468b19220671569dc
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5697
Tested-by: jenkins
2020-07-26 20:12:56 +01:00
Antonio Borneo
19aa77cc7f target/arm7tdmi: fix memory leak of register cache
There is no method to free the register cache, allocated in
arm7tdmi_init_target(), so we get a memory leak.
Issue identified by tracking all calls to arm_build_reg_cache().

Implement the method arm7tdmi_deinit_target() that in turn calls
arm7tdmi_free_reg_cache().

NOT TESTED on a real arm7tdmi target.
Tested on a arm926ejs (SPEAr320) by hacking the target type and
pretending it is a arm7tdmi:
	sed -i s/arm926ejs/arm7tdmi/ tcl/target/spear3xx.cfg

Change-Id: Iad465b708eb4ebb298725d7155fea76357e9045c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5696
Tested-by: jenkins
2020-07-26 20:12:48 +01:00
Antonio Borneo
df1dcc27ee target/xscale: fix memory leak of register cache
There is no method to free the register cache, allocated in
xscale_build_reg_cache(), so we get a memory leak.
Issue identified by tracking all calls to arm_build_reg_cache().

Implement the method xscale_deinit_target() that in turn calls the
new xscale_free_reg_cache().
Fix leak of struct xscale.

NOT TESTED on a real xscale target.
Tested on a arm926ejs (SPEAr320) by hacking the target type and
pretending it is a xscale:
	sed -i s/arm926ejs/xscale/ tcl/target/spear3xx.cfg

Change-Id: Ibb2104c42411b76f4bb77c2fa387d1b85a3d2d5d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5695
Tested-by: jenkins
2020-07-26 20:12:34 +01:00
Antonio Borneo
580b8f5da0 target: fix memory leaks on targets based on arm9tdmi
Similarly to the fix for arm926ejs (also base on arm9tdmi), fix
the other targets based on arm9tdmi.
The fix for arm926ejs is tested on SPEAr320 target.

This fix is proposed separately because is not tested on a correct
target device, but tested on SPEAr320 by hacking the target type
and pretending it is the correct one, e.g.:
	sed -i s/arm926ejs/arm920t/ tcl/target/spear3xx.cfg

The memory leaks detected and fixed are:
- arm register cache;
- EmbeddedICE register cache;
- arm_jtag_reset_callback internal data;
- struct <target_type>_common.

Change-Id: I565f9a5bf144a9df78474434d86a64127ef0fbe5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5699
Tested-by: jenkins
2020-07-26 20:12:21 +01:00
Daniel Krebs
6a78c8581d rtos: add support for RIOT
Add threads support for RIOT (https://github.com/RIOT-OS/RIOT).
Original code is from Daniel Krebs.

Change-Id: I83fe3b91dd75949e800b5aea1015d8fa37b09c61
Signed-off-by: Daniel Krebs <github@daniel-krebs.net>
Signed-off-by: Vincent Dupont <vincent@otakeys.com>
Signed-off-by: Benjamin Valentin <benpicco@googlemail.com>
Reviewed-on: http://openocd.zylin.com/4256
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-07-26 20:11:52 +01:00
Marc Schink
cf902f7034 tcl/target: Add initial GigaDevice GD32VF103 support
There is no flash bank support at the moment.

Change-Id: I52a2bde39425d94d9333cda002e5df0a1ef63c08
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5755
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-07-26 20:11:28 +01:00
Marc Schink
c1a3f2ce6b libjaylink: Update to 0.2.0 release
Change-Id: Ib53a98d0c715f91bdced1df6f157d2a50326fa8c
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5757
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-07-26 20:11:11 +01:00
Jiri Kastner
a80650ac3c tcl/target: add Rockchip RK3308 target
Change-Id: Ia8c2cec0761c37623fa8a416bcfc405f2af6a6b3
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-on: http://openocd.zylin.com/5774
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2020-07-26 20:10:50 +01:00
Jiri Kastner
2f40d069a1 src/target/arm_adi_v5.c: add Cortex-A35 related entries
ROM Table registers:
https://developer.arm.com/documentation/100236/0100/debug/rom-table/rom-table-peripheral-identification-registers
Debug reisters:
https://developer.arm.com/documentation/100236/0100/debug/memory-mapped-debug-registers/external-debug-peripheral-identification-registers
PMU registers:
https://developer.arm.com/documentation/100236/0100/debug/pmu-registers/performance-monitors-peripheral-identification-registers
CTI registers:
https://developer.arm.com/documentation/100236/0100/debug/cti-registers/cti-peripheral-identification-registers

Change-Id: Ibd57d91fb9b66bc46929f4e93d0bf23c2a32f11a
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-on: http://openocd.zylin.com/5773
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2020-07-26 20:10:40 +01:00
Jiri Kastner
765c319277 src/target/arm_adi_v5.c: resorted ids
Change-Id: Ieeccf48254032244a86d6cd35793f8f6076527e9
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-on: http://openocd.zylin.com/5772
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-07-26 20:09:30 +01:00
Christopher Head
36caeddf71 src/flash/nor/stm32f2x: fix format strings
* use proper type codes
* add 0x in front of hex values
* remove some concatenated empty strings

Change-Id: I77e8dd161887f02ecf8019b43d3e8e7cc122ad0e
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5780
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-07-26 20:09:10 +01:00
Christopher Head
bc987c8e31 doc/target/mips: fix grammar
Change-Id: Ib9012a1cfccbe4f69682d106688536c4d92392dd
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5777
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2020-07-26 20:08:48 +01:00
Evgeniy Didin
b2821b6074 Introduce tcl config files for Synopsys HSDK board
With this commit we add tcl configure files
for ARCv2 HS Development kit(HSDK). HSDK board
has Quad-core ARC HS38 CPU with L1 and L2
caches.

Change-Id: I372ef45428c7c7ca1421a6da3e5ed08b86f705e0
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5784
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-07-26 20:08:31 +01:00
Evgeniy Didin
8fea8460db target/arc: Introduce Actionpoints support
Actionpoint mechanism allows to setup HW breakpoints and watchpoints on Synopsys ARC CPUs.
This mechanism is controlled by DEBUG register and by a set of auxilary registers.
Each actionpoint is controlled by 3 aux registers: Actionpoint(AP) match mask(AP_AMM),
AP match value(AP_AMV) and AP control(AC).

Note: some fields of actionpoint_t structure will be used in further
support of watchpoints.

Change-Id: I4efb24675f247cc19d9122501c9e63c3126fcab4
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5763
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-07-26 20:08:21 +01:00
Hellosun Wu
07df04b3b1 spi: add MX25U1635E flash
* Macronix 16 MBit SPI flash
* https://www.macronix.com/en-us/products/NOR-Flash/Serial-NOR-Flash/Pages/spec.aspx?p=MX25R1635F&m=Serial%20NOR%20Flash&n=PM2161
* used e.g. on Andestech ADP-XC7KFF676

Change-Id: Ida701cf3832e3302aa29b4dded1c390c5ff8c482
Signed-off-by: Hellosun Wu <wujiheng.tw@gmail.com>
Reviewed-on: http://openocd.zylin.com/5428
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-07-21 17:44:45 +01:00
Antonio Borneo
68611efcdf cmsis-dap: fix USB interface for NXP LPC-Link2
The adapter NXP LPC-Link2 is a USB composite device that provides
five interfaces; among three of them that are of HID class, only
one is cmsis-dap.

Accordingly to ticket 255, OpenOCD code is not opening the right
HID interface; then it fails to communicate with the cmsis-dap
while checking the adapter's info.

Unfortunately, hidapi does not provide any support for reading the
string descriptor of the interface, otherwise it would have been
trivial to look for the right cmsis-dap interface.
In fact the cmsis-dap specification reports:
	The CMSIS-DAP Firmware can be also part of a USB composite
	device. If this case, the HID Interface String must
	contain the sub-string CMSIS-DAP.
This requirement is satisfied by the USB device descriptor of the
LPC-Link2 reported below, but cannot be used.

Add a quirk to let OpenOCD only accept interface number zero on a
LPC-Link2 device.

Bus 001 Device 050: ID 1fc9:0090 NXP Semiconductors
Device Descriptor:
  bLength                18
  bDescriptorType         1
  bcdUSB               2.00
  bDeviceClass          239 Miscellaneous Device
  bDeviceSubClass         2
  bDeviceProtocol         1 Interface Association
  bMaxPacketSize0        64
  idVendor           0x1fc9 NXP Semiconductors
  idProduct          0x0090
  bcdDevice            1.00
  iManufacturer           1 NXP Semiconductors
  iProduct                2 LPC-LINK2 CMSIS-DAP V5.224
  iSerial                 3 I3F4AABA
  bNumConfigurations      1
  Configuration Descriptor:
    bLength                 9
    bDescriptorType         2
    wTotalLength       0x00ab
    bNumInterfaces          5
    bConfigurationValue     1
    iConfiguration          0
    bmAttributes         0x80
      (Bus Powered)
    MaxPower              500mA
    Interface Descriptor:
      bLength                 9
      bDescriptorType         4
      bInterfaceNumber        0
      bAlternateSetting       0
      bNumEndpoints           2
      bInterfaceClass         3 Human Interface Device
      bInterfaceSubClass      0
      bInterfaceProtocol      0
      iInterface              4 LPC-LINK2 CMSIS-DAP V5.224
        HID Device Descriptor:
          bLength                 9
          bDescriptorType        33
          bcdHID               1.00
          bCountryCode            0 Not supported
          bNumDescriptors         1
          bDescriptorType        34 Report
          wDescriptorLength      35
         Report Descriptors:
           ** UNAVAILABLE **
      Endpoint Descriptor:
        bLength                 7
        bDescriptorType         5
        bEndpointAddress     0x81  EP 1 IN
        bmAttributes            3
          Transfer Type            Interrupt
          Synch Type               None
          Usage Type               Data
        wMaxPacketSize     0x0400  1x 1024 bytes
        bInterval               4
      Endpoint Descriptor:
        bLength                 7
        bDescriptorType         5
        bEndpointAddress     0x01  EP 1 OUT
        bmAttributes            3
          Transfer Type            Interrupt
          Synch Type               None
          Usage Type               Data
        wMaxPacketSize     0x0400  1x 1024 bytes
        bInterval               4
    Interface Descriptor:
      bLength                 9
      bDescriptorType         4
      bInterfaceNumber        4
      bAlternateSetting       0
      bNumEndpoints           2
      bInterfaceClass         3 Human Interface Device
      bInterfaceSubClass      0
      bInterfaceProtocol      0
      iInterface              7 LPC-LINK2 DATA PORT
        HID Device Descriptor:
          bLength                 9
          bDescriptorType        33
          bcdHID               1.00
          bCountryCode            0 Not supported
          bNumDescriptors         1
          bDescriptorType        34 Report
          wDescriptorLength      35
         Report Descriptors:
           ** UNAVAILABLE **
      Endpoint Descriptor:
        bLength                 7
        bDescriptorType         5
        bEndpointAddress     0x84  EP 4 IN
        bmAttributes            3
          Transfer Type            Interrupt
          Synch Type               None
          Usage Type               Data
        wMaxPacketSize     0x0400  1x 1024 bytes
        bInterval               1
      Endpoint Descriptor:
        bLength                 7
        bDescriptorType         5
        bEndpointAddress     0x04  EP 4 OUT
        bmAttributes            3
          Transfer Type            Interrupt
          Synch Type               None
          Usage Type               Data
        wMaxPacketSize     0x0400  1x 1024 bytes
        bInterval               1
    Interface Association:
      bLength                 8
      bDescriptorType        11
      bFirstInterface         1
      bInterfaceCount         2
      bFunctionClass          2 Communications
      bFunctionSubClass       2 Abstract (modem)
      bFunctionProtocol       0
      iFunction               5 VCOM
    Interface Descriptor:
      bLength                 9
      bDescriptorType         4
      bInterfaceNumber        1
      bAlternateSetting       0
      bNumEndpoints           1
      bInterfaceClass         2 Communications
      bInterfaceSubClass      2 Abstract (modem)
      bInterfaceProtocol      0
      iInterface              5 VCOM
      CDC Header:
        bcdCDC               1.10
      CDC Call Management:
        bmCapabilities       0x01
          call management
        bDataInterface          2
      CDC ACM:
        bmCapabilities       0x02
          line coding and serial state
      CDC Union:
        bMasterInterface        1
        bSlaveInterface         2
      Endpoint Descriptor:
        bLength                 7
        bDescriptorType         5
        bEndpointAddress     0x83  EP 3 IN
        bmAttributes            3
          Transfer Type            Interrupt
          Synch Type               None
          Usage Type               Data
        wMaxPacketSize     0x0010  1x 16 bytes
        bInterval               4
    Interface Descriptor:
      bLength                 9
      bDescriptorType         4
      bInterfaceNumber        2
      bAlternateSetting       0
      bNumEndpoints           2
      bInterfaceClass        10 CDC Data
      bInterfaceSubClass      0
      bInterfaceProtocol      0
      iInterface              5 VCOM
      Endpoint Descriptor:
        bLength                 7
        bDescriptorType         5
        bEndpointAddress     0x02  EP 2 OUT
        bmAttributes            2
          Transfer Type            Bulk
          Synch Type               None
          Usage Type               Data
        wMaxPacketSize     0x0200  1x 512 bytes
        bInterval               0
      Endpoint Descriptor:
        bLength                 7
        bDescriptorType         5
        bEndpointAddress     0x82  EP 2 IN
        bmAttributes            2
          Transfer Type            Bulk
          Synch Type               None
          Usage Type               Data
        wMaxPacketSize     0x0200  1x 512 bytes
        bInterval               0
    Interface Descriptor:
      bLength                 9
      bDescriptorType         4
      bInterfaceNumber        3
      bAlternateSetting       0
      bNumEndpoints           2
      bInterfaceClass         3 Human Interface Device
      bInterfaceSubClass      0
      bInterfaceProtocol      0
      iInterface              6 LPCSIO
        HID Device Descriptor:
          bLength                 9
          bDescriptorType        33
          bcdHID               1.11
          bCountryCode            0 Not supported
          bNumDescriptors         1
          bDescriptorType        34 Report
          wDescriptorLength      33
         Report Descriptors:
           ** UNAVAILABLE **
      Endpoint Descriptor:
        bLength                 7
        bDescriptorType         5
        bEndpointAddress     0x85  EP 5 IN
        bmAttributes            3
          Transfer Type            Interrupt
          Synch Type               None
          Usage Type               Data
        wMaxPacketSize     0x0040  1x 64 bytes
        bInterval               2
      Endpoint Descriptor:
        bLength                 7
        bDescriptorType         5
        bEndpointAddress     0x05  EP 5 OUT
        bmAttributes            3
          Transfer Type            Interrupt
          Synch Type               None
          Usage Type               Data
        wMaxPacketSize     0x0040  1x 64 bytes
        bInterval               2
Device Qualifier (for other device speed):
  bLength                10
  bDescriptorType         6
  bcdUSB               2.00
  bDeviceClass            0
  bDeviceSubClass         0
  bDeviceProtocol         0
  bMaxPacketSize0        64
  bNumConfigurations      1
Device Status:     0x0000
  (Bus Powered)

Change-Id: Ib3d46f87743a2d35a266842cb356035d898d466e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Suggested-by: Masatoshi Tateishi <tateishim3@gmail.com>
Reported-by: Donald Bailey <donaldb@users.sourceforge.net>
Fixes: https://sourceforge.net/p/openocd/tickets/255/
Reviewed-on: http://openocd.zylin.com/5732
Tested-by: jenkins
2020-07-14 00:39:58 +01:00
Antonio Borneo
97b7101316 cmsis-dap: prevent hidapi to search again for the adapter
The code in cmsis_dap_usb_open() already searches for the right
HID device that corresponds to the adapter. By calling hid_open()
it asks hidapi to re-search the adapter again based on the VID:PID
and the serial string of the adapter it has just found!

Apart from being a run-time overhead, this has an additional
drawback; there are USB adapters built as composite USB devices
that, beside the cmsis-dap HID interface, have other HID
interfaces for other purposes.
A typical example is the NXP LPC-Link2, that over the 5 interfaces
	0) cmsis-dap (HID)
	1) VCOM-CDC
	2) VCOM-CDC
	3) LPCSIO (HID)
	4) LPC-LINK2 DATA PORT (HID)
has 3 of them of HID class.
The code in cmsis_dap_usb_open() could select the right interface
but then cannot propagate this information to hid_open().

Replace the call to hid_open() with hid_open_path(), passing as
parameter the "unique" path of the HID device already found.

Checking in hidapi source code, the implementation of hid_open()
consists in enumerating the HID devices, scan for the first one
matching VID:PID and serial number, and opening it by calling
hid_open_path(). This analysis highlights that using directly
hid_open_path() should not introduce any regression.

While applying these changes, move hid_init() before enumerating
the HID devices. This has no real consequences because the HID API
is marked as optional but, logically, it should be called before
any other HID API.

Change-Id: I77ec01dca64223ec597f21f188f363366d0049c6
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Suggested-by: Masatoshi Tateishi <tateishim3@gmail.com>
Reviewed-on: http://openocd.zylin.com/5731
Tested-by: jenkins
2020-07-14 00:39:52 +01:00
Antonio Borneo
e466f389a9 jtag/drivers: replace perror() with LOG_ERROR()
The function perror() sends the output to stderr, but OpenOCD
cannot intercept such output to send it to the log.

Replace all occurrences of perror() with LOG_ERROR(), but keeping
the same output format of perror().

The replacement is done automatically through:
	sed -i 's/perror("\([^":]*\)[: ]*")/LOG_ERROR("\1: %s", strerror(errno))/' src/jtag/drivers/*.c

Change-Id: I4c140bdb09235d56cfd8bef75da9b56fbe7c2aec
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5728
Tested-by: jenkins
2020-07-14 00:39:39 +01:00
Antonio Borneo
3a5f84f818 doc: remove duplicated words
Remove occurrences of duplicated words in the documentation.

Change-Id: Ib6ef1607fc5e6387764be108b2b9c0c93ac10a62
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5754
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-07-14 00:39:18 +01:00
Antonio Borneo
6962da0028 tcl/interface: add example of linuxgpiod through dln-2
The USB adapter DLN-2 provides 32 GPIO (beside I2C, SPI, ...).
Use the first 6 GPIO for a SWD/JTAG bitbanging example through
linuxgpiod driver.

Change-Id: I229c2078142ec648fc6430b5d123539045dcfbda
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5561
Tested-by: jenkins
2020-07-14 00:38:59 +01:00
Antonio Borneo
aa277fb358 contrib/60-openocd.rules: add udev rules for Linux gpiod
Change-Id: I767776d3659adddefe81a63f351794318463fd50
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5560
Tested-by: jenkins
2020-07-14 00:38:55 +01:00
Antonio Borneo
93be480c90 jtag/drivers: add linuxgpiod driver
New adapter driver for GPIO bitbanging over Linux GPIO descriptors
through the library libgpiod.
On Debian based distribution, the package libgpiod-dev is required
for build.

Change-Id: I1ce1a4f1ca79096d6d476b01b523c8c10f2cac07
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5559
Tested-by: jenkins
2020-07-14 00:38:48 +01:00
Antonio Borneo
ee86f3ef92 bcm2835gpio: enable only the transport specific gpio
Change-Id: Ice6744600079d5994d628bb3b782aa36e71f862e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5558
Tested-by: jenkins
2020-07-14 00:38:42 +01:00
Antonio Borneo
a8e483a2bf imx_gpio: enable only the transport specific gpio
Change-Id: Idb1fabbc1e9385f8c23b643584bf7863ea91ffbf
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5557
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-07-14 00:38:36 +01:00
Antonio Borneo
ed17994757 sysfsgpio: enable only the transport specific gpio
If the configuration file specifies both SWD and JTAG gpios, the
current code request all of them. In case of overlap a warning is
generated when the same gpio is released for the second time.

Require and release only the gpio needed by the specified
transport.

Change-Id: I41a0970980ceeb559afa98ab34cfe93dffed2e1c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5556
Tested-by: jenkins
2020-07-14 00:38:28 +01:00
Antonio Borneo
964680ecff bitbang: split jtag and swd operations
The split in OpenOCD between SWD and JTAG has been already fully
implemented. The bitbang driver still keeps a single API write()
to drive the output lines.

Introduce a new SWD specific API swd_write().
Move the existing SWD bitbang drivers to the new API by extracting
the available conditional implementation.
Cleanup some function prototype.
Remove the now unused global swd_mode, handled implicitly.
Rename bitbang_exchange() as bitbang_swd_exchange() to track its
scope for SWD only.

Change-Id: Ie53080b941cb1ac7a34a1f80bad8bee4e304454d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5555
Tested-by: jenkins
2020-07-14 00:38:21 +01:00
Antonio Borneo
49232a80d2 bitbang: remove superfluous switch between jtag and swd
The SWD framework already takes care of switching between JTAG and
SWD by calling driver's switch_seq() in swd_connect() and in
swd_quit(); there is no need for the driver to force the switch
again.

Remove the extra switch between jtag and swd.

Change-Id: I84de4bffb593374b96fce31951c6cc83f92d2578
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5554
Tested-by: jenkins
2020-07-13 23:52:44 +01:00
Antonio Borneo
1f5962203a bitbang: document bitbang callbacks
Change-Id: I732c2eeb452f3ba8a2385d0e02fccbe86381812c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5553
Tested-by: jenkins
2020-07-13 23:52:38 +01:00
Tomas Vanek
fd9a7a8c8a flash/nor/kinetis: fix FCF handling
Kinetis Flash Configuration Field needs special handling to prevent unwanted
locking of the device. Warn user about any difference between generated
FCF and FCF data in the programmed file. Inform user that re-programming
of already programmed FCF may fail on devices with FTFE flash module.

While on it remove useless setting of is_erased flag after erase.

Change-Id: I3911f436674547fa12ef3886c7d5e8cd889f9e2b
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Fixes: https://sourceforge.net/p/openocd/tickets/270/
Reported-by: Noel Diviney <vk3avm@users.sourceforge.net>
Reviewed-on: http://openocd.zylin.com/5753
Tested-by: jenkins
2020-07-13 19:27:53 +01:00
Tomas Vanek
8d7ca43775 flash/nor/kinetis: use target_get_working_area_avail()
Since e22c6484ea the trial/error allocation shows
"not enough working area available(requested 2048)" message
on klx.cfg. The message is not clear if it means a problem or not.

Replace with new style allocation using target_get_working_area_avail()

Change-Id: I87fe1e38248fcac29982b72aaba12217a0552f38
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5752
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-07-13 19:27:45 +01:00
Antonio Borneo
e8cfdd4a72 gdb_server: suggest user to prefer GDB extended mode
In case of GDB connection not using extended mode, issue a warning
message to suggest the user to switch using the extended mode.
Issue the message only once at each run of OpenOCD, to avoid too
much noise.
Update the documentation to suggest using extended mode.

Change-Id: I9326e84f748d5d7912d5a48f00f0fb541ca19221
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5311
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
2020-07-08 22:08:40 +01:00
Antonio Borneo
996ff5bcfc coding style: add arguments to function prototypes
Issue identified by checkpatch script from Linux kernel v5.1 using
the command

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types FUNCTION_ARGUMENTS -f {} \;

This patch also fixes an incorrect function prototype in zy1000.c.
ZY1000 minidriver implementation overrides the function
arm11_run_instr_data_to_core_noack_inner(), but the prototype is
not the same as in src/target/arm11_dbgtap.c and to avoid compile
error it was changed also the prototype of the called function
arm11_run_instr_data_to_core_noack_inner_default().

Change-Id: I476cda8cdb0e1e280795b3b43ca95c40d09e4a3d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5630
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-07-08 22:08:19 +01:00
Antonio Borneo
e2315ccffd coding style: fix space separation
The checkpatch script from Linux kernel v5.1 complains about using
space before comma, before semicolon and between function name and
open parenthesis.
Fix them!

Issue identified using the command

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types SPACING -f {} \;

The patch only changes amount and position of whitespace, thus
the following commands show empty diff
	git diff -w
	git log -w -p
	git log -w --stat

Change-Id: I1062051d7f97d59922847f5061c6d6811742d30e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5627
Tested-by: jenkins
2020-07-08 22:08:08 +01:00
Antonio Borneo
bf34629294 coding style: fix print of hex values as decimal
It is an error to prefix with "0x" the print of values in decimal.
Replace the incorrect decimal format specifier with PRIx32.

Issue identified by checkpatch script from Linux kernel v5.1 using
the command

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types PRINTF_0XDECIMAL -f {} \;

Change-Id: I2eb867ef654527b2737ba573a405ec8f97c6a739
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5624
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-07-08 22:07:56 +01:00
Antonio Borneo
f29d157882 target/arm926ejs: fix memory leaks
The memory leaks detected and fixed are:
- arm register cache;
- EmbeddedICE register cache;
- arm_jtag_reset_callback internal data;
- struct arm926ejs_common.

Issue identified with valgrind.
Tested on SPEAr320 based on arm926ejs.

Change-Id: If2bed02c516051ce4d0eb29b204a3f3337fe5d6a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5698
Tested-by: jenkins
2020-07-08 22:07:38 +01:00
Antonio Borneo
6a81bad3b9 configure: split build of hla layouts
Current hla driver supports two "layout": stlink and ti-icdi.
The configure script allows to independently enable/disable the
the two layout. But in reality by selecting only one of them the
whole hla driver is built, including both "layouts".
This is currently not a big issue because the dependencies of the
two layout are the same (libusb), so we are sure that selecting
one of them would permit to build both.
This is going to change with the merge of a third "layout" for
Nuvoton Nu-Link, because it would be based on hidapi.
We need, at least, to decouple the build of libusb and hidapi
"layouts". A full decouple of each "layout" is also welcome to
match the selection done during configure.

Introduce a new automake macro for each of the two "layout" and
use them to conditionally build the "layout" files.
Use the existing autoconf macros to conditionally compile the code
that depends by the "layout".

Change-Id: Ia20da7a260002a8d2af883425aa401b8920d3f36
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5719
Tested-by: jenkins
2020-07-08 22:07:21 +01:00
Marc Schink
327d18220f flash/nor/w600: Use 'bool' data type
Change-Id: Ia71ffba82b23ed1860acc5daf6c66fa574a0d797
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5751
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-07-08 22:06:49 +01:00
Marc Schink
86131594d4 flash/nor/stmsmi: Use 'bool' data type
Change-Id: I0b9d3eb6fa40cc9fed6491c8f583580fb471bcac
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5750
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-07-08 22:06:46 +01:00
Marc Schink
707291cf38 flash/nor/stm32h7x: Use 'bool' data type
Change-Id: Ib9c567e2287f2a99172bd3bd35a81e3205cea421
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5749
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-07-08 22:06:43 +01:00
Marc Schink
4acd965573 flash/nor/sh_qspi: Use 'bool' data type
Change-Id: Id5567102013648b1565078310abc27bee4446992
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5748
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-07-08 22:06:40 +01:00
Marc Schink
37196876f6 flash/nor/pic32mx: Use 'bool' data type
Change-Id: I9a0b60bc07781401f26df31303b8c04822b7ddc2
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5747
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-07-08 22:06:37 +01:00
Marc Schink
ad8e1507eb flash/nor/mrvlqspi: Use 'bool' data type
Change-Id: Icc64d9ba56841ff6eb96efcbdc9545938ebb7347
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5746
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-07-08 22:06:34 +01:00
Marc Schink
99914f3c04 flash/nor/mdr: Use 'bool' data type
Change-Id: I1eced61e5cb062445078e05507f6ad1a5a594c8d
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5745
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-07-08 22:06:28 +01:00
Marc Schink
703a893f8a flash/nor/max32xxx: Use 'bool' data type
Change-Id: I828cdd6d97a59fd0692eb22ba8fc0a5759029432
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5744
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-07-08 22:06:24 +01:00
Marc Schink
5ac425365a flash/nor/lpcspifi: Use 'bool' data type
Change-Id: I0485a7885fe154f983c7a7ce84cbedb0ba32ca31
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5743
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-07-08 22:06:20 +01:00
Marc Schink
e6e154e103 flash/nor/jtagspi: Use 'bool' data type
Change-Id: I0e81dd476c6b3ec7fee6c84ab1bfcf9bca90c532
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5742
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-07-08 22:06:17 +01:00
Marc Schink
20196f86d4 flash/nor/fm3: Use 'bool' data type
Change-Id: Ic90ab762488063f6958f5e775c1b2fe5f3f1718f
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5741
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-07-08 22:06:12 +01:00
Marc Schink
02fac04b4d flash/nor/fespi: Use 'bool' data type
Change-Id: I4583b4475b2fa2733db0861bfe8f52f0a514c472
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5740
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-07-08 22:06:08 +01:00
Marc Schink
19e1a30991 flash/nor/em357: Use 'bool' data type
Change-Id: I251b62275d204fdc315cd167685799c15d4e7cf4
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5739
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-07-08 22:06:04 +01:00
Marc Schink
f23525e5dd flash/nor/cfi: Use 'bool' data type
Change-Id: I25198223175c26aded9ad667b802da09883e94ee
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5738
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-07-08 22:05:52 +01:00
Marc Schink
46238fabb9 flash/nor/atsamv: Use 'bool' data type
Change-Id: Id4ceaf38dc5eba5b0eb62416fc357fdfc7ea21c0
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5737
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-07-08 22:05:45 +01:00
Marc Schink
8375deea2c flash/nor/ath79: Use 'bool' data type
Change-Id: Iecd29dcfcc1ae983e4e0828025d2d174944c1e9d
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5736
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-07-08 22:05:40 +01:00
Marc Schink
7e8efccb59 flash/nor/at91sam4: Use 'bool' data type
Change-Id: Iade91ac58a995676c412606a63e62b70337427f1
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5735
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-07-08 22:05:36 +01:00
Marc Schink
6a1de20a7c flash/nor/at91sam3: Use 'bool' data type
Change-Id: Ibaf599a4ab88ea36a84b3389e2f704554d465434
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5734
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-07-08 22:05:32 +01:00
Marc Schink
8fc00a38bc flash/nor/ambiqmicro: Use 'bool' data type
Change-Id: Ia8492905dc506d518266343d699c3245efbc1ab1
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5733
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-07-08 22:05:27 +01:00
Mikhail Rasputin
70f69f8728 jtag/tcl: fix a double free of jim object
The Jim_SetResultFormatted() frees jim object earlier and the
Jim_FreeNewObj() does it second time. It breaks the memory heap.

To avoid it the Jim_IncrRefCount() + Jim_DecrRefCount() should be used
instead of the Jim_FreeNewObj() call.

Change-Id: Ifa5f38009b2d617624b5f27e916720888a3dbad9
Signed-off-by: Mikhail Rasputin <mikhail.godlike.rasputin@yandex.ru>
Reviewed-on: http://openocd.zylin.com/5724
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-07-08 22:05:06 +01:00
Marc Schink
ef14384b68 flash/nor: Use proper data types in driver API
Use 'unsigned int' and 'bool' instead of 'int' where appropriate.
While at it, fix some coding style issues.

No new Clang analyzer warnings.

Change-Id: I700802c9ee81c3c7ae73108f0f8f06b15a4345f8
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/4929
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-07-07 05:23:54 +01:00
Michael Hope
a2e6982a18 flash/nor/atsame5: Fix a timeout when erasing
According to the datasheet, erasing a block can take up to 200 ms.
When using a Segger J-Link with a 2 MHz clock the current loop
finishes after < 50 ms, ignores the timeout, and then fails when
erasing the next block.

Switch to a time based check, add an explicit yield, and report an
error on timeout.

Change-Id: I8255401d1e59f427a08d2cccb8a66143dcdbb324
Signed-off-by: Michael Hope <mlhx@google.com>
Reviewed-on: http://openocd.zylin.com/5706
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-07-07 05:18:14 +01:00
Antonio Borneo
7c88e76a76 target: do not print an error on shutdown in target events
Before commit b3ce5a0ae5 ("target: use LOG_USER to print errors
in events") an error in an event handler was silently lost, while
now the associated message is printed out.

A "shutdown" command in a target event (e.g. in gdb-detach) causes
the event to end with error code ERROR_COMMAND_CLOSE_CONNECTION,
that triggers the error message:
	shutdown command invoked
	Error executing event <event-name> on target <target-name>:

The error code returned by the command "shutdown" is required to
stop the execution in a script/proc and avoid executing any
further command in the script/proc.
It is then normal to get an error code from the "shutdown" command
and it should not be printed out.

Intercept the return code of the event in case of "shutdown", then
skip scheduling other target events and return without printing
the incorrect error message.

Change-Id: Ia3085fb46beacb90a5e4bf0abf7c6e28bb9e6a9b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reported-by: Laurent Lemele <laurent.lemele@st.com>
Reviewed-on: http://openocd.zylin.com/5710
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Tested-by: jenkins
2020-06-27 15:34:51 +01:00
Moritz Fischer
64733434e2 jtag: drivers: xlnx-pcie-xvc: Add support for SWD mode.
Add support for SWD debug to the Xilinx XVC/PCIe driver.

This is possible since the device is essentially a shift-register.
So doing SWD vs JTAG is a matter of wiring things correctly on the
RTL side (use TMS for SWDI, TDO for SWDO).

The clang static checker doesn't find any new problems with this change.

Change-Id: I3959e21440cd1036769e8e56a55e601d3e4aee9a
Signed-off-by: Moritz Fischer <moritzf@google.com>
Reviewed-on: http://openocd.zylin.com/5447
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-06-27 15:34:38 +01:00
Evgeniy Didin
057aed11a2 target/arc: Introduce L1I,L1D,L2 caches support
With this commit we introduce L1 and L2 cache
flush and invalidate operations which are necessary for
getting/setting actual data during memory r/w operations.

We introduce L2 cache support, which is not presented
on currently support EMSK board. But L2 is presented
on HSDK board, which soon will be introduced.

Change-Id: I2fda505a47ecb8833cc9f5ffe24f6a4e22ab6eb0
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5688
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-06-27 15:34:24 +01:00
Lucas
2e6904eef5 aarch64: Add support for debugging in HYP mode on ARMv8-A cores
When debugging an ARMv8-A/AArch32 target running HYP mode, OpenOCD would
throw the following error to GDB on most operations (step, set breakpoint):

	cannot read system control register in this mode

The mode in question is 0x1A, a privilege level 2 mode available on cores
that have the virtualization extensions (such as the Raspi 3).

Note: this mode is only used when running in AArch32 compatibility mode.

Signed-off-by: Lucas Jenss <public@x3ro.de>
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Change-Id: Ia8673ff34c5b3eed60e24d8da57c3ca8197a60c2
Reviewed-on: http://openocd.zylin.com/5255
Tested-by: jenkins
Reviewed-by: Lucas Jenß <lucas.jenss@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-06-27 15:33:57 +01:00
Marc Schink
8833c889da libjaylink: Update to latest Git version
This update is for testing the upcoming 0.2.0 release.

Change-Id: I400b09eb3ead4306c83c7980c621124101aaef7e
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5723
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2020-06-23 18:55:53 +01:00
Marc Schink
5a79481d3b target/armv7m_trace: Calculate prescaler for external capture devices
This fixes a regression introduced in "2dc88e1479f29ef0141b05bfcd907ad9a3e2d54c"

Change-Id: I04dc19ed30118a4c499b83732700b2ee0fdb67b6
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5610
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-06-18 10:11:02 +01:00
Edward Fewell
11116ef6ad target/icepick.cfg: Add support for Test TAPs in ICEPick C
In addition to the debug TAPs, the ICEPick C also supports
a bank of Test TAPs (limited functionality intended for
non-debuggable targets). Added support for Test TAPs to
the icepick_c_tapenable routine. Port numbers of 0 to 15
will continue to be handled as a debug TAP number. Test
TAPs will be port numbers of 16 to 31.

This functionality will be needed for doing a flash
mass erase on CC26xx/CC13xx targets. It is possible
for user application to block even adding the Cortex M
TAP to the scan chain, so the only way to unbrick the
target and erase the flash is using a component on a
test TAP of the device's ICEPick router.

Change-Id: I0aa52a08d43a00cbd396efdeadd504fc31c98510
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/5715
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-06-14 14:25:07 +01:00
Marc Schink
b7d41ef96a flash/nor/stm32l4x: Fix check for number of arguments
The current version erroneously allows any number of arguments >= 1.

Change-Id: I64156c11b48d411c72bebbf866954818cd036ff2
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5716
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-06-14 14:24:39 +01:00
Tarek BOCHKATI
bd6072072e stlink: code factorization by introducing stlink_usb_exit_mode
Change-Id: I4abd6432c4ef969e382bfed96cd19a49d9610000
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5612
Tested-by: jenkins
2020-06-14 14:24:08 +01:00
Tarek BOCHKATI
9a690c6bdb openocd: fix issue in WIN32 with TCP adapters
Issue: server_quit is called before adapter_quit:
  In WIN32 only in server_quit we do an WSACleanup,
  which terminates/closes all active sockets.
  So if the adapter is TCP based, the adapter.quit handler
  will fail if it will need to send some commands through TCP.

Example: close_socket in jtag_vpi_quit will fail in WIN32
  because the socket is already closed
  and the errno is set as "Bad File Descriptor"

To fix that we introduced new functions called server_host_os_entry/quit
to manage specific OS setup (hence WSA for sockets in WINDOWS) in order
to delay WSACleanup after adapter_quit().

Change-Id: Ie4afacafe123857f6ae300e376bdfcf0d8c027ac
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5456
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-06-14 14:23:48 +01:00
Alistair Francis
7e78c04f1c board: Add the HiFive1 revB board configuration
Change-Id: If186afcfd2c87414b9323569a16aed9a6054c883
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-on: http://openocd.zylin.com/5680
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tim Newsome <tim@sifive.com>
2020-06-14 14:23:23 +01:00
Alistair Francis
4a5de86f58 flash: Add the Freedom E310-G002 SPI Flash
Change-Id: Id9f4a209a6eacf186931b142e70a5b0458517be0
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-on: http://openocd.zylin.com/5679
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tim Newsome <tim@sifive.com>
2020-06-14 14:23:17 +01:00
Antonio Borneo
f0909fe9e5 coding style: fix multi-line dereferencing
Issue identified by checkpatch script from Linux kernel v5.1 using
the command

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types MULTILINE_DEREFERENCE -f {} \;

Change-Id: Icba05613e22a72ecc3e6a0aad7cb6b479496146f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5629
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
2020-06-06 18:06:05 +01:00
Antonio Borneo
bd425de3fb jtag/tcl: fix memory leak in command 'irscan'
If the function parse_u64() fails, we jump to return, thus leaking
the memory just allocated in 'v'.
Issue identified by clang.

Move earlier the call to parse_u64() and the associated test,
before memory allocation.

While there, fix a possible NULL pointer dereferencing in case the
calloc() fails, by testing for allocation failure.

Change-Id: I6a77ee17aceb282bbdfefe7cdafeba2e0e7012f1
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5692
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-06-06 18:05:46 +01:00
Antonio Borneo
6f88aa0fb3 target/cortex_a: fix memory leak of register cache
There is no method to free the register cache, allocated in
armv4_5, so we get a memory leak.
Issue identified by valgrind.

Implement the method arm_free_reg_cache() and call it in cortex_a
deinit and to exit for error during arm_dpm_setup().
Tested on dual cortex-A stm32mp15x.
This change is inspired from similar fix in commit b01b5fe13a
("armv7m: Fix memory leak in register caching.").

The same allocation is also used by target types "arm7tdmi",
"arm9tdmi", "arm11" and "xscale" but they all lack the deinit
method and I do not have relevant HW to test the fix. For such
reasons they are not addressed in this patch.

Change-Id: I4da1e1f12e36ec245d1f3b11a4eafcbd9a1d2e25
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5693
Tested-by: jenkins
2020-06-06 18:05:29 +01:00
Antonio Borneo
061cae171c target/mem_ap: fix two memory leaks
The target mem_ap misses the method 'deinit_target' and does not
free the memory allocated during 'target create' and 'configure'.

Add the missing method and free the allocated memory.
Issue identified with valgrind.

Change-Id: If0d0114a75dd76a8b65c2d46d96c6085fd31a09d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5700
Tested-by: jenkins
2020-06-06 18:05:08 +01:00
Antonio Borneo
f6b4079ce5 libusb_helper: fix memory leak when no adapter is found
When jtag_libusb_open() fails to find the adapter, it returns
error but left libusb initialized causing memory leak of libusb
internal data.
Issue found with valgrind when no adapter or board is connected to
the host, e.g.
	valgrind openocd -f board/st_nucleo_f4.cfg

Close the libusb operations if jtag_libusb_open() has to return
error.

Change-Id: Ieb2f110be15705dafe80c099e7d83c07056c2a41
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5701
Tested-by: jenkins
2020-06-06 18:04:57 +01:00
Antonio Borneo
37330f89d7 target/cortex-m: enable C_DEBUGEN during examine
Current code for Cortex M does not set C_DEBUGEN as soon as
possible, (which means during target examine), but later-on either:
1) at command 'halt' (e.g. for 'gdb-attach' event);
2) at command 'soft_reset_halt';
3) at commands 'reset', 'reset halt' or 'reset init';
4) during polling, but only if the target:
    = enter in 'double fault', or
    = exit from a reset, or
    = halts (not possible if C_DEBUGEN is not set)

Plus, if commands in 1) or 2) are executed before the very first
poll of the target, the value of 'cortex_m->dcb_dhcsr' is used not
initialized while writing it back in DCB_DHCSR.

Another side effect of this situation is that it's possible to set
a HW breakpoint with the target running, while C_DEBUGEN is not
set. Accordingly to [1], C1.3.1 "Debug authentication":
    When DGBEN is LOW and DHCSR.S_HALT == 0:
    ...
    FPB breakpoints do not generate an entry to Debug state and,
    if no DebugMonitor exception is generated, will escalate to
    HardFault, Lockup, or be ignored.
On STM32MP15x I get HW breakpoint ignored, while on STM32F411 I
get HardFault.
E.g. following these steps:
- power-on a pre-flashed board that starts running the firmware;
- connect openocd, without halting or resetting the board;
- set a HW breakpoint to some address often executed;
- wait, but the board doesn't halt ...;
- type the command 'halt';
- if the Cortex-M has HardFault it would be visible and the fault
  is at the breakpoint address;
- if no HardFault then type the command 'resume';
- wait and the board will finally halt at the HW breakpoint.

A similar issue has been detected on Cortex-A code and fixed by
commit bff87a7f28 ("target/cortex_a: enable DSCR_HALT_DBG_MODE
during examine").
Follow the same approach and set C_DEBUGEN during examine.
Also, initialize 'cortex_m->dcb_dhcsr' during examine.

[1] ARM DDI 0403E "ARM v7-M Architecture Reference Manual"

Change-Id: I5b0b23403634f7dfce38f104bba9f59c33eb3e99
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5702
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Moritz Fischer <moritzf@google.com>
2020-06-06 18:04:36 +01:00
Antonio Borneo
1fa66d3633 log: fix kept_alive() and report expired timeout
The kept_alive() function is called to inform the keep-alive code
that a keep-alive as been just kicked through some other path.
But kept_alive() erroneously resets the timeout counter without
checking if it has already expired, thus masking a potential
timeout.

Check if timeout counter has expired during kept_alive().
While there, put the timeout values in macros and explicit the
units in the timeout messages.

Change-Id: Iaf6368b44e5b5352b1cc4e7efbb2368575dcfa08
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5705
Reviewed-by: <jonatan_zeidler@gmx.de>
Tested-by: jenkins
2020-06-06 18:04:14 +01:00
Antonio Borneo
ffc1ca4b91 nor/kinetis: add keep-alive during flash write
Flashing Kinetis MCU MK22FX512VLH12 takes longer than one second,
thus gdb connection can timeout. Before commit 7f260f5009
("helper/command: Handle Tcl return values consistently") the
openocd timeout warning was masked by a bug in gdb_put_packet()
that resets the timeout counter if any message is logged out.
The commit above removes one log message and the timeout warning
is now triggered.

While the bug in gdb_put_packet() is still to be fixed, the reason
of the timeout is the lack of keep_alive() calls in kinetis flash
driver.

Add keep_alive() call at every iteration in function
kinetis_write_sections(), that is reported as core write function
in chunks of 1024 bytes in the log from the reporter.
Add also a keep_alive() call at every iteration in function
kinetis_write_inner(). This part is not present in the log but, by
code analysis, it represents another critical loop.

Change-Id: I38e631b36c7eb2f1e21cef68710ce47c03d3edda
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reported-by: Jonatan Hatakeyama Zeidler <jonatan.zeidler@medineering.de>
Reviewed-on: http://openocd.zylin.com/5703
Tested-by: jenkins
Reviewed-by: <jonatan_zeidler@gmx.de>
2020-06-06 18:03:58 +01:00
Tarek BOCHKATI
2d3bbcd566 arm_adi_v5: dap_ti_be_32_quirks_command minor simplification
use handle_command_parse_bool within dap_ti_be_32_quirks_command to make
it shorter and simpler.

Change-Id: Ice179cc477933b27e27235dc2ade23fe655e233d
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5708
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-06-06 18:03:12 +01:00
Tarek BOCHKATI
cdb6918c87 arm_adi_v5: enhance command error reporting
avoid the usage of ERROR_COMMAND_SYNTAX_ERROR when
ERROR_COMMAND_ARGUMENT_INVALID is more adequate.

Change-Id: Ic9aaedb93fedd45efee1b39f8ea20185f01af2da
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5654
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-06-06 18:02:21 +01:00
tscn92
93e4bed056 jtag/drivers/bcm2835gpio: bcm2835gpio_init has been updated
For jtag/drivers/bcm2835gpio dev_mem_fd has been updated within
bcm2835gpio_init with the add on of gpio to mem. This permits the
access to memory of GPIO without the need for root access.
For failed attempt, a fallback to original memory follows.
It should be noted that any printed error is relative to original
memory ("dev/mem").
Tested on EFM32GG12B390F board

Change-Id: I4540bdf62fb3b91a51221e277881adfae138dcc5
Signed-off-by: tscn92 <tscn@kamstrup.com>
Reviewed-on: http://openocd.zylin.com/5568
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-06-06 18:01:57 +01:00
Marc Schink
ae4113d877 tcl/boards: Rename 'ek-tm4c1294xl.cfg' to 'ti_ek-tm4c1294xl.cfg'
The new filename has a proper vendor prefix. Keep the old
configuration file for now but show a "deprecated" warning
at runtime.

Change-Id: If7465a752f47f3292e430c8b311148badfd384cd
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5478
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-06-06 18:01:31 +01:00
Marc Schink
fe13f61539 tcl/boards: Rename 'ek-tm4c123gxl.cfg' to 'ti_ek-tm4c123gxl.cfg'
The new filename has a proper vendor prefix. Keep the old
configuration file for now but show a "deprecated" warning
at runtime.

Change-Id: I13871ec13709055843e23b1b6da90694fd60505e
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5477
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-06-06 18:01:22 +01:00
Marc Schink
3076fc601d tcl/boards: Rename 'dk-tm4c129.cfg' to 'ti_dk-tm4c129.cfg'
The new filename has a proper vendor prefix. Keep the old
configuration file for now but show a "deprecated" warning
at runtime.

Change-Id: I30fcb8f291d401acaa1fe665db0eeabc250d24b6
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5476
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-06-06 18:01:15 +01:00
Diego Elio Pettenò
4c364b4534 Update Autotools Mythbuster link to avoid multiple redirects.
While I'm hoping to maintain the chain of redirects for the foreseeable
future, it makes sense to point at the final URL now that Autotools
Mythuster has had its domain for a long while.

Change-Id: I6d912e3be0f81b25bec14746ebfee58f29f144b6
Signed-off-by: Diego Elio Pettenò <flameeyes@flameeyes.com>
Reviewed-on: http://openocd.zylin.com/5709
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-06-02 18:41:09 +01:00
Antonio Borneo
d8ac0086f9 helper/command: remove unused functions and make static local ones
The function command_find_in_parent() is never used in OpenOCD, so
remove it.

The functions command_name() and [un]register_command() are only
used internally in command.c, so make them static.

Change-Id: Ide9842659796f4884fb6c1fcf5979b3b71b67abb
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5663
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2020-05-24 21:36:48 +01:00
Antonio Borneo
3b5a24c13b openocd: properly use jim data types
The jim library exports all the data types through typedef, so
there is no need to use the internal struct types.

Fix the few remaining inconsistencies in the code.

Change-Id: Id4ae0083563ea7a371833374e7b39f17158f66a4
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5662
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2020-05-24 21:36:43 +01:00
Antonio Borneo
80e8b019b0 helper/command: fix check on value returned by jim API
Either Jim_CreateCommand() and register_command_handler() return
the jim error code JIM_OK/JIM_ERR.

Fix the check and the initialization of retval.

Change-Id: I3073c66764670128706ad979a43bb3edbbeb0ab0
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5661
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2020-05-24 21:36:38 +01:00
Antonio Borneo
3008756604 helper/command: strip replicated command name in log
After commit 0840414f0e ("helper/command: do not replace new
commands with ocd_ prefix"), the command name is present in
argv[0], so there is no need to pass it directly. The current code
causes the command name to be logged twice, once explicitly and
then from the content of argv[0]:
	openocd -c 'debug_level 3; echo hello; shutdown'
	<snip>
	Debug: 13 3 command.c:142 script_debug(): command - echo echo hello
	<snip>
	Debug: 16 4 command.c:142 script_debug(): command - shutdown shutdown

Remove the command name from the arguments of the function
script_debug().

Change-Id: I57860774f450ff717ee71ef9dc07590549a84319
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5660
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2020-05-24 21:36:29 +01:00
Antonio Borneo
7456e6bac5 stlink: fix open AP for v2j37 and v3j7
The new stlink firmware requires opening the AP before issuing
any operation.
In the current code we have a 'questionable' check about the core
model to set the TAR autoincrement, that is issued without opening
the AP, thus causing a STLINK_BAD_AP_ERROR.

Modify the AP open API to handle this case and open AP#0 before
the memory access to check the core model.

Change-Id: I576955b5094bd41d63ff1fbad7b4fd9433253321
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reported-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-on: http://openocd.zylin.com/5691
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
2020-05-24 21:36:02 +01:00
Antonio Borneo
b342c67f77 stlink: fix incorrectly returned error on v2j28
Firmware v2j28 introduces the API to open and close the AP, but
closing AP always returns error 0x1d (STLINK_BAD_AP_ERROR).

Ignore the error returned by the bogus firmware on closing AP.

Change-Id: I992ddbf7acb10f1d376ed8f781eeb3344605b85d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5683
Tested-by: jenkins
2020-05-24 21:35:47 +01:00
Antonio Borneo
af0db36f92 stlink: default dapdirect to SWD instead of JTAG
When the transport is not specified, OpenOCD uses the first listed
by the selected adapter driver.
The old HLA driver for stlink lists SWD as first. The new driver
dapdirect instead lists JTAG, making more difficult a fallback to
HLA when dapdirect is not available due to old stlink FW.
Plus, in case of JTAG wiring, SWD is still possible, while the
opposite is not.

Reorder the list of transports to grant the default to SWD.

Change-Id: Id9c529e921b148d5b352d4603a9028c2a5f15d83
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Suggested-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5538
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-05-24 21:35:16 +01:00
Ake Rehnman
2bc24c06d3 stm8 target: make adapter speed settings work
Previously the adapter speed settings were hard-coded to
connect with low speed then switch over to high speed
regardless what was mentioned in the cfg files. Now the
stm8 target intercept adapter speed settings and configure
the stm8 control registers accordingly.

Change-Id: I7419514e5214e4b43b9d51253cf5b7f04a233533
Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com>
Reviewed-on: http://openocd.zylin.com/5548
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-05-24 21:34:48 +01:00
Antonio Borneo
1156fcd79e tcl/board: add board ST nucleo-8l152r8
The transport SWIM is selected twice, in board and in target, thus
a warning is generated at run-time. It should be fixed by remove a
line in the target file, but does not harm so let's keep it there
for the time being.

Change-Id: I479004dc16005a330d552c8dbd5def61690f9b9f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5543
Tested-by: jenkins
2020-05-24 21:34:18 +01:00
Antonio Borneo
cc5889883f Revert "adapter: expose HLA interface in struct adapter_driver"
No reason to keep longer this temporary hack.
Remove it by reverting the original commit.

Change-Id: I5c6dcdb1f4755b7dba4c03a5033913ef8db35e18
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5533
Tested-by: jenkins
2020-05-24 21:34:05 +01:00
Antonio Borneo
ce9e21b769 stlink: simplify handling of SWIM
Now that SWIM is not accessed through HLA anymore, decouple the
SWIM code and remove the conditional execution.

Fix the inconsistency of the return type for stlink_usb_state() in
case of SWIM (returns ERROR_OK while type is enum target_state)
introduced by commit 3de6b5f6e5 ("jtag/drivers/stlink_usb :
implemented and repaired SWIM support").
The code added by commit above in stlink_usb_state() is an hack to
reuse existing HLA API to perform a reconnect.
Move the SWIM specific code from stlink_usb_state() to a dedicated
stlink_swim_op_reconnect() that provides consistent data type.

Change-Id: I3fe175fef00b0735bea6139b057f217a080c9d38
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 3de6b5f6e5 ("jtag/drivers/stlink_usb : implemented and repaired SWIM support")
Reviewed-on: http://openocd.zylin.com/5532
Tested-by: jenkins
2020-05-24 21:33:22 +01:00
Antonio Borneo
72f67790cf stlink: simplify mem R/W with SWIM
Thanks to API separation between SWIM and the other transports, we
can easily split the memory read/write for SWIM from the rest of
the code.
While there, use the macro STLINK_DATA_SIZE as size of data chunks
that can be read/write in SWIM. This was not implemented before.

Change-Id: I7d913c92539007e4d914480bacc0126a8f0e9705
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5531
Tested-by: jenkins
2020-05-24 21:32:48 +01:00
Antonio Borneo
ffe6bc8220 swim: add new transport
Add SWIM and STM8 to documentation and update TODO file.
Introduce transport "swim" and command "swim newtap".
Switch in swim.c from HLA API to the new SWIM API.
Implement in stlink driver the SWIM APIs as wrappers of existing
HLA functions.
Remove any SWIM related reference from HLA files.
Update stm8 config files and stlink-dap interface config file.

Change-Id: I2bb9f58d52900f6eb4df05f979f7ef11fd439c24
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5530
Tested-by: jenkins
2020-05-24 21:32:05 +01:00
Antonio Borneo
ac05f929ed swim: fix adapter speed handling
SWIM transport only supports two adapter speeds:
- "low speed"  equal to 363 kHz (8 MHz / 22)
- "high speed" equal to 800 kHz (8 MHz / 10)

Replace the previous convention that use "0" or "1" for "low" or
"high" speed with the effective speed in kHz.
Rework the implementation of stlink_speed_swim().
Set low speed in the stm8 config files, because only low speed is
permitted at debug connection; the previous code ignores the
initial value.

Change-Id: I2484c9419a2c554c59eb6b9216339393ab0b54f3
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5529
Tested-by: jenkins
2020-05-24 21:31:21 +01:00
Antonio Borneo
ac18e960ce swim: abstract the transport in stm8 target
SWIM is implemented by (ab)using the HLA API. This was acceptable
when OpenOCD code did not provided a clear separation between
transports and related APIs. Still today SWIM in OpenOCD is only
supported by STLink, so the decision to re-use the HLA API was the
simpler way to implement it.
After commit efd1d64222 ("adapter: switch from struct
jtag_interface to adapter_driver") the transports API are better
split and SWIM can be implemented as a separate set of API. This
would open the possibility to extend OpenOCD for other adapters
that provide SWIM, e.g. versaloon, or through SPI emulation [1].

Introduce a new set of files swim.[ch] to handle the SWIM API.
Beside the API that almost match the transport low-level data
communication (system_reset, read_mem, write_mem), add a further
API reconnect. Today, inside HLA STLink code, the reconnect is
implemented by hacking the HLA API state(). Please notice that
due to this hack the return type is incorrect; stlink_usb_state()
returns ERROR_OK in SWIM mode, while its return type is enum
target_state. Ignore the type mismatch and still call the HLA API
state in the new SWIM API reconnect. Further commit will fix it.

[1] http://kuku.eu.org/?projects/stm8spi/stm8spi

Change-Id: I52018e1e2200cbd41af8e5031f7b35dc761b61d6
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5528
Tested-by: jenkins
2020-05-24 21:29:42 +01:00
Antonio Borneo
93c4c0fcbe adapter: expose HLA interface in struct adapter_driver
The transition of STM8/SWIM out of HLA will require a new struct
swim_ops in struct adapter_driver.
To simplify the development, make the HLA interface temporarily
accessible through the struct adapter_driver.
This commit will be reverted after the swim rework.

Change-Id: I1e4f370cf64641164d7bcaa22f75ac58c9240052
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5527
Tested-by: jenkins
2020-05-24 21:29:11 +01:00
Antonio Borneo
94dfa68647 stlink: reduce use of hla specific enum hl_transports
In the driver's code it's widely used the enum hl_transports for
any check concerning the current transport, even for the non-hla
transport dapdirect.
The driver already provides a stlink specific enum stlink_mode
that can be used in place of the hla one.

Replace the hla enum with the stlink one allover the code.
Introduce a hla specific wrapper stlink_usb_hl_open() to cope with
the only API that requires the hla specific enum.

The overall behaviour is not changed, with exception for a debug
message in stlink_usb_open() than now prints the numeric value of
stlink enum in place of the numeric value of the corresponding hla
one.

This change prepares the road for moving SWIM transport out of hla
by removing any reference to the macro HL_TRANSPORT_SWIM from the
stlink driver.

Change-Id: Ieeea34f312245a94bfc1333087afdb8eb9f77139
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5526
Tested-by: jenkins
2020-05-24 21:27:34 +01:00
Marc Schink
17789d3762 flash/nor/sh_qspi: Fix dead assignment
Change-Id: I6a99076fea30062535e615244895698e51107441
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5645
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-05-24 21:27:08 +01:00
Tarek BOCHKATI
ac870d80a9 arm_disassembler: fix typo 'ARM_UNKNOWN_INSTUCTION' to '.._INSTRUCTION'
Change-Id: I3a3d566fe96fb1497cf8337389e993e0f728a64b
Signed-off-by: Laurent LEMELE <laurent.lemele@st.com>
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5657
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-05-24 21:26:47 +01:00
Edward Fewell
763f2549ad nor/flash: Add keep_alive() during flash write handler
Added keep_alive() call inside main flash write loop. Large
files where causing a gdb timeout warning.

Change-Id: I525dad2d644e248dd9ecf678e4d8e33c22eefdf2
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/5682
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-05-24 21:26:26 +01:00
Tomas Vanek
9a5af06f82 flash/nor/jtagspi: propagate error from jtag_execute_queue()
Change-Id: Ib985bdf3d60345a1e701f9cc98f89a47ff74d3e2
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5684
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-05-24 21:25:48 +01:00
Marc Schink
ec30634c13 rtos/ChibiOS: Fix some coding styles
Change-Id: I2648479df1a2dd95f8a57868c4ed4259e0fbbe11
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4989
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-05-24 21:25:25 +01:00
Alistair Francis
0637047c65 contrib: Add HiFive1 to udev rules
Change-Id: I4ba9219e1c673d650931f8f9426d554de8322abf
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-on: http://openocd.zylin.com/5678
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-05-24 21:25:01 +01:00
Paul Fertser
e41c0f4906 flash: nor: jtagspi: make read_status report errors
This is a follow-up to 3c9bd7c6f3.

Change-Id: If430f7fcfbba084d9cd74b32344ad43508a96a77
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4383
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-05-18 04:50:02 +01:00
Antonio Borneo
11c5efd2ec target/arc: fix build with clang
Commit da41bce3ae ("target/arc: introduce breakpoint
functionality") introduces a mismatch between the format string
and one int constant.

Change the format string to match the int constant.

Change-Id: I0d59552205551b90e165c0a2e3fef247ad0c7701
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: da41bce3ae ("target/arc: introduce breakpoint functionality")
Reviewed-on: http://openocd.zylin.com/5655
Tested-by: jenkins
Reviewed-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-05-14 20:28:24 +01:00
iosabi
dadf46f618 cortex_m: make bit fields in cortex_m unsigned.
Expression like (0xffff << 16) evaluate to type int, which is not able
to hold that value, producing a warning when compiling with
-fsanitize=undefined. This patch makes most of the cortex_m constants
unsigned using the BIT() macro or appending "ul" when possible to fix
the undefined behavior warning.

Signed-off-by: iosabi <iosabi@protonmail.com>
Change-Id: I7af194305ef612d7a32e74eaf9f11dd85fa87f32
Reviewed-on: http://openocd.zylin.com/5583
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-05-12 06:05:45 +01:00
Marc Schink
b604bc6c4c flash/nor/bluenrg-x: Minor code cleanups
Change-Id: I7844eb30d58b0a23ca5bcc94181066cca6fa0861
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5462
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-05-12 06:03:49 +01:00
Antonio Borneo
59cc1f6629 coding style: open function's brace at beginning of new line
Issue identified by checkpatch script from Linux kernel v5.1 using
the command

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types OPEN_BRACE -f {} \;

Change-Id: I6d1356ed11e2699525f384efb7556bc2efdc299f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5628
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
2020-05-09 14:41:31 +01:00
Antonio Borneo
e41c3f78d1 coding style: wrap lines longer than 120 chars
The coding style is quite permissive allowing 120 chars per line,
but abuses are still present.
Fix them, wrapping the lines.

Change-Id: I94d66b651d759a60ec35f7ba115c43933e70ed69
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5626
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-05-09 14:40:52 +01:00
Antonio Borneo
4625257007 coding style: join consecutive string fragments
The re is no need to split a long string, apart for fitting the
predefined line width.
Join the consecutive string fragments.

Issue identified by checkpatch script from Linux kernel v5.1 using
the command

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types STRING_FRAGMENTS -f {} \;

Change-Id: I8de52d572b0e3d4788c1d4d2b0cf8f94c7f08409
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5625
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-05-09 14:40:40 +01:00
Antonio Borneo
1946b50dba coding style: let "else" follow the close brace
The statement "else" should not be on a new line when follows a
close brace '}'. Fix it!

Issue identified by checkpatch script from Linux kernel v5.1 using
the command

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types ELSE_AFTER_BRACE -f {} \;

Change-Id: I8af247ec3f75a69713d7cb1e73881254d16c189e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5623
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2020-05-09 14:40:14 +01:00
Antonio Borneo
3883e769f4 coding style: remove useless return statement from void functions
For void functions, a return as last statement is useless.
Remove it.

Issue identified by checkpatch script from Linux kernel v5.1 using
the command

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types RETURN_VOID -f {} \;

Change-Id: Ie0616fe98623f30d2d7b04ac9517d669774092de
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5622
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2020-05-09 14:40:07 +01:00
Antonio Borneo
3474aa223a coding style: prototype of functions with no parameters
Functions that have no parameters should use "void" as parameter
in the function declaration.

Issue identified and fixed by script checkpatch from Linux kernel
v5.1 using the command

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types FUNCTION_WITHOUT_ARGS --fix-inplace -f {} \;

Change-Id: If104ac75b44e939ec86155ff7b5720f2e33c6b39
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5621
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2020-05-09 14:39:59 +01:00
Antonio Borneo
185834ef8a coding style: add missing space when split strings
Long strings are split across few lines; usually split occurs at
the white space between two words.
Check that the space between the two words is still present.
While there, adjust the amount of space between words.

Issue identified by checkpatch script from Linux kernel v5.1 using
the command

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types MISSING_SPACE -f {} \;

Change-Id: I28b9a65564195ba967051add53d1c848c7b8fb30
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5620
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2020-05-09 14:39:44 +01:00
Antonio Borneo
4f459660a9 coding style: avoid unnecessary line continuations
Line continuation, adding a backslash as last char of the line, is
requested in multi-line macro definition, but is not necessary in
the rest of C code.

Remove it where present.

Identified by checkpatch script from Linux kernel v5.1 using the
command

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types LINE_CONTINUATIONS -f {} \;

Change-Id: Id0c69e93456731717a7b290b16580e9f8ae741bc
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5619
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2020-05-09 14:39:29 +01:00
Antonio Borneo
e66bb9d312 coding style: add parenthesis around the argument of sizeof
The script checkpatch available in new Linux kernel offers an
experimental feature for automatically fix the code in place.
While still experimental, the feature works quite well for simple
fixes, like parenthesis.

This patch has been created automatically with the script under
review for inclusion in OpenOCD, using the command:

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types SIZEOF_PARENTHESIS --fix-inplace -f {} \;

Change-Id: I8adb325bdb0e13211f8bae8b4770ec1979c176bf
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5618
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2020-05-09 14:39:19 +01:00
Antonio Borneo
9b29cb58ac coding style: remove useless break after a goto or return
In a switch/case statement, a break placed after a goto or return
is never executed.
The script checkpatch available in Linux kernel v5.1 issues a
warning for such unused break statements.
In the process of reviewing the new checkpatch for its inclusion
in OpenOCD, let's get rid of these warnings.

The script checkpatch is unable to fixup automatically this case.
Thanks to having "break" command using a single code line, this
patch has been generated using the script below:

	find src/ -type f -exec ./tools/scripts/checkpatch.pl -q \
	 --types UNNECESSARY_BREAK -f {} \; \
	| sed -n '/^#/{s/^.*FILE: //;s/:$//;s/:/ /;p}' \
	| awk 'function P() {print "sed -i '\''"b"'\'' "a};
	       {
	         if ($1!=a) {
	           if (a) {P()};
	           a=$1;
	           b=$2"{d}";
	         } else {
	           b=b";"$2"{d}"
	         }
	       };
	       END {P()}'

Change-Id: I56ca098faa5fe8d1e3f712dc0a029a3f10559d99
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5617
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2020-05-09 14:39:05 +01:00
Antonio Borneo
5df5e89cf3 tcl: remove trailing whitespace
The script checkpatch available in new Linux kernel offers an
experimental feature for automatically fix the code in place.
While still experimental, the feature works quite well for simple
fixes, like spacing.

This patch has been created automatically with the script under
review for inclusion in OpenOCD, using the command:
	find tcl/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types TRAILING_WHITESPACE --fix-inplace -f {} \;

The patch only changes amount and position of whitespace, thus
the following commands show empty diff
	git diff -w
	git log -w -p
	git log -w --stat

Change-Id: Ie7e3a236f4db9c70019e3b3c7e851edbd3a9dd84
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5616
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2020-05-09 14:38:40 +01:00
Antonio Borneo
6d3cb807aa tcl: fix typo and spelling
Identified by checkpatch script from Linux kernel v5.7-rc1 using
the command
	find tcl/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types TYPO_SPELLING --strict -f {} \;

Change-Id: I7b523f0ab5ec047ff167742a44c29984ac672cf4
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5615
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2020-05-09 14:37:35 +01:00
Antonio Borneo
3a28cdc7cb doc: fix typo and spelling
Identified by checkpatch script from Linux kernel v5.7-rc1 using
the command
	find doc/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types TYPO_SPELLING --strict -f {} \;

Change-Id: I1269ac966027439e16eb6e63179e43925bec37fa
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5614
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2020-05-09 14:37:25 +01:00
Antonio Borneo
307ee6db47 doc: fix texinfo warning on @deffn not at the line beginning
Commit 87a4158acf ("drivers: xds110: Clean up command syntax and
documentation") does not follow the documentation structure that
lists the adapters in cpt 2 "Debug Adapter Hardware" then lists
the adapter commands in cpt 8.2 "Interface Drivers"; it puts all
in cpt 2.
While doing that, uses an incorrect texinfo syntax that causes the
following warnings at compile time:
	doc/openocd.texi:543: warning: @deffn should only appear at the beginning of a line
	doc/openocd.texi:547: warning: @deffn should only appear at the beginning of a line
	doc/openocd.texi:552: warning: @deffn should only appear at the beginning of a line

Move the documentation of xds110 commands in the proper chapter
and fix the texinfo syntax.

Change-Id: I0b3f0fe0c687f194bb02e2d81aca86fcd4fdd718
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 87a4158acf ("drivers: xds110: Clean up command syntax and documentation")
Reviewed-on: http://openocd.zylin.com/5613
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Edward Fewell <efewell@ti.com>
2020-05-09 14:37:17 +01:00
Antonio Borneo
4738a55da4 helper/ioutil: silence gcc-8 on strncpy
Starting from version 8, gcc issues a warning if strncpy could be
able to truncate a string (so without adding the zero-termination
char in destination) by copying exactly "size" char from a source
string not shorter than "size".
Such truncation from strncpy could actually be the desired code
behaviour, but the way to silent gcc only locally (without global
disabling with -Wno-stringop-truncation) through pragma has other
side effects on portability.

In current code, the source string is always "eth0", because has
been checked right above. So this is a false positive from gcc,
being always strlen("eth0") < 16, the sizeof(ifreq.ifr_name).

Silent gcc by decrementing the "size" and remove:
	error: ‘strncpy’ specified bound 16 equals destination
		size [-Werror=stringop-truncation]

This file is only optionally compiled together with ZY1000 driver
with --enable-zy1000 --enable-ioutil. This combination is not
checked in jenkins, so the error passed unnoticed.
Plus, the configure flags above are both deprecated!

Change-Id: I229e66227cfd3513139feeaffa47a6e1ec00767b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5631
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-05-09 14:36:56 +01:00
Antonio Borneo
8807a5937e helper/command: register all commands through register_commands()
The commands "ocd_find" and "capture" are registered directly
through the jim API, instead of the common way to describe them
in a struct command_registration that is then passed to the helper
register_commands().
This cause the two commands above to not have either "help" nor
"usage" string nor a properly identified "mode".

Since the following line registers the commands listed in struct
command_builtin_handlers, simply add the two commands above in the
same struct.

Change-Id: Id6ee11dac3b18364deeed65ee8e18ad80152750a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5644
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-05-09 14:36:44 +01:00
Antonio Borneo
2a8303b0bd tcl: stm32mp15x: fix "reset halt" on CM4 in engineering boot
The state machine of cortex-m have to pass through a set of state
before it get in "halted".

Add one more "arp_poll" to achieve the proper state during a
"reset halt" command in engineering boot.

Change-Id: I90828bf20ef75bd4018f8b911f727ae69c4d6e8f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5649
Tested-by: jenkins
Reviewed-by: Richard Braun <rbraun@sceen.net>
2020-05-09 14:36:27 +01:00
Marc Schink
fdad56ecb0 flash/nor/efm32: Some small code cleanups
Change-Id: I547970ce31435f75bae01d6d2cc96ebc9c15588c
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5420
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-05-09 14:36:04 +01:00
Marc Schink
82f71aa274 server/telnet: Fix history output
Restore the prompt after the "history" command is invoked.

Change-Id: I3d0744abbc58e82b039e06f21675efa180e8e1b0
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3414
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-05-09 14:35:43 +01:00
Tarek BOCHKATI
6f91aae159 hla: remove unused hl_interface_param_s.api
Change-Id: I90a23293c7e3a6067d56e56d186f9f452af7c15e
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5611
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2020-05-09 14:35:01 +01:00
Marc Schink
22797616ac flash/nor/avrf: Minor code cleanups
Change-Id: I64aa8e41f336584b524445e0ee7f986a0032852a
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5461
Tested-by: jenkins
Reviewed-by: Lars Poeschel <poeschell+openocd@mailbox.org>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-05-09 14:34:32 +01:00
Marc Schink
ed8d4a2e3b flash/nor/kinetis: Minor code cleanups
Change-Id: Id74cb6c238b803d1a1566fc615e22ea478f2e15e
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5459
Tested-by: jenkins
Reviewed-by: Lars Poeschel <poeschell+openocd@mailbox.org>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-05-09 14:34:15 +01:00
Evgeniy Didin
da41bce3ae target/arc: introduce breakpoint functionality
With this patch we introduce set/unset breakpoints
routines and add/remove bp handlers.
Currently soft breakpoints are only supported.

Changes since v1:
* Change if-statement in arc_remove_breakpoint
* Squash changes from http://openocd.zylin.com/#/c/5641/
  in this commit to fix build.

Change-Id: Ib10ccdb02fd1606e4f407f012b1bee106a8ffccd
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5641
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-05-08 21:23:05 +01:00
Evgeniy Didin
c693508f77 target/arc: introduce arc_read/write_instruction functions
This commit introduces helper instruction read/write functions
for further bp functionality.

Change-Id: I619fbe2870ef6365c29ed1618bb83b6f7eb84690
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5640
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-05-08 15:09:46 +01:00
Evgeniy Didin
0af37282c7 target/arc: Add initial stepping functions
Change-Id: I84845f2ec6f1cff975990f0a495165a02de33227
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5643
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-05-08 05:57:12 +01:00
Tim Newsome
05eb9a357c Add get_thread_reg() and set_reg() for hwthread
get_thread_reg() allows gdb to request the register value of a specific
"thread."
set_reg() allows register writes without getting a giant list of
registers first.

Signed-off-by: Tim Newsome <tim@sifive.com>
Change-Id: I87faa1c8793916b9ee476dd696f0695a07ca2b41
Reviewed-on: http://openocd.zylin.com/5324
Tested-by: jenkins
2020-05-07 21:32:32 +01:00
Tomas Vanek
968d3851e7 loaders/flash/nrf5: add CPU type to loader source
Change-Id: Ia65ac21bd99d76c8dace4e9ede060e870cad14de
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5588
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-05-03 21:43:36 +01:00
Tarek BOCHKATI
880508f68f flash/stm32l4x: always use stm32l4_get_flash_reg
this change is a preparation for STM32L5 support on top of L4 driver
STM32L5 flash is quite similar to L4 flash, mainly register names
and offsets and some bits are changed.
a table with register offset will be introduced, thus correct register
addresses will be obtained using this table and the driver internal
function 'stm32l4_get_flash_reg' will be responsible of this.

Change-Id: I74bf61a83fe53575623640af0328b3253ecc796f
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5508
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Michael Jung <mijung@gmx.net>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-05-03 21:43:13 +01:00
Andreas Bolsch
f6cf185564 revision id for STM32L4P5/Q5 corrected
According to RM0432 rev. 6, only 0x1001 "Z" rev. applies for STM32L4P5/Q5.
Verified on real device. Whether other revisions exist is unclear.

Change-Id: I761ae077d089b06925fc0fe1ff2b1e478b8a66fa
Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-on: http://openocd.zylin.com/5521
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-05-03 21:42:46 +01:00
Tomas Vanek
e888fe3987 target/armv7m: cosmetic refactorization
Introduce a variable 'size' and reduce the number of dereferencing
*reg_list_size by using the variable.

Change-Id: I3bdf1485a4ed8e34435e8acb3efd0df8d802508c
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5326
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-05-03 21:42:23 +01:00
Antonio Borneo
8f2afaafe2 jtag: remove unused function adapter_driver_modules_load()
Commit c2cecc74b0 ("Move JTAG interface list to new files.")
merged in mid 2009 introduces an unused and empty function that
the developer expects to use for loading adapter drivers from
shared libraries. This have never happened and the function is
still empty and unused.

Remove it.

Change-Id: I7c88dbf8a9747e96e5ca4e6e7038ac0f232604fd
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5601
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2020-05-02 15:41:21 +01:00
Antonio Borneo
ebc2871005 server: set tcp port and bind address before init
All the servers open the listening socket during openocd "init";
it's not possible to change the tcp port or the bind address
after "init".

In current code, the call order during "init" permits to change
the port and bind address of tcl and telnet server if the related
command is issued after "init" in the same script or on openocd
command line. This is not guaranteed to work if the call order
during "init" changes, so it's incorrect.

Change the commands "bindto" and "*_port" to COMMAND_CONFIG.

Change-Id: Id88f225a67a872b4bcaf3b799466bddedc248015
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reported-by: Christopher Head <chead@zaber.com>
Fixes: https://sourceforge.net/p/openocd/tickets/264/
Reviewed-on: http://openocd.zylin.com/5595
Reviewed-by: Christopher Head <chead@zaber.com>
Tested-by: jenkins
2020-05-02 15:40:57 +01:00
Antonio Borneo
837de9fd10 coding style: contrib: remove empty lines at end of text files
Empty lines at end of text files are useless.
Remove them.

Change-Id: I4efbd9af5be7e16213dcc7cb95de936ecde2fcef
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5173
Tested-by: jenkins
2020-05-02 15:40:26 +01:00
Antonio Borneo
6572dd97b3 coding style: src: remove empty lines at end of text files
Empty lines at end of text files are useless.
Remove them.

Change-Id: Ibac9b36682d58f81e34ca2b51e6260e7d472fb0e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5172
Tested-by: jenkins
2020-05-02 15:40:21 +01:00
Antonio Borneo
9e23c9ae35 coding style: tcl: remove empty lines at end of text files
Empty lines at end of text files are useless.
Remove them.

Change-Id: I503cb0a96c7ccb132f4486c206a48831121d7abd
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5171
Tested-by: jenkins
2020-05-02 15:40:12 +01:00
Andreas Fritiofson
c60252ac2b bitbang: Fix FTBFS with GCC 10
GCC 10 defaults to -fno-common which breaks the sharing of bitbang_swd
struct between bitbang drivers due to a missing extern.

Change-Id: I2b4122f7939cec91a72284006748f99a23548324
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/5592
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li>
2020-04-24 17:44:13 +01:00
Ilya Kharin
bed0215573 flash/nor/stm32l4x: cast wrpxxr_mask to uint16_to to print
Fix build error on Mac OS X Catalina (10.15.4) caused by formatting
stm32l4_info->wrpxxr_mask, which is uint32_t, as uint16_t in the debug
log message. Adding casting to uint16_t before substitution because only
lower 16 bits are significant for debug purposes.

Change-Id: Iddb87cd156dfc84ab1f91cd15a1ddee6b646d412
Signed-off-by: Ilya Kharin <akscram@gmail.com>
Reviewed-on: http://openocd.zylin.com/5590
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-04-24 17:43:30 +01:00
Leonard Crestez
38d205ecc5 ftdi: Report an error if no ftdi_vid_pid is specified
By default the list of VID/PID is empty so if ftdi_vid_pid is not called
then no matches are attempted. The only message is at -d3:

	Command 'init' failed with error code -100"

Check for this condition explicitly to make life easier for people
configuring adapters.

Change-Id: If0f93370c9e9ddc9700aae7c346c1c6dd319152e
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-on: http://openocd.zylin.com/5440
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-04-24 17:40:07 +01:00
Kevin Burke
86cf8d9fb0 target/armv8: Add ARM target name on halt status
The CPU target name is added to the HALT status message so the user
can see which target halted at the designated program counter.

Tested on an Ampere eMAG8180 and Quicksilver silicon

Change-Id: I51e6f21296c85a822df28c5b7c4068e8ff66f29e
Signed-off-by: Kevin Burke <kevinb@os.amperecomputing.com>
Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Reviewed-on: http://openocd.zylin.com/5571
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-04-24 17:39:41 +01:00
Tomas Vanek
ff9ee132e5 target/armv7m: minor fixes of target algo exit point check
Introduce a new ERROR_TARGET_ALGO_EXIT as currently used
ERROR_TARGET_TIMEOUT should be reserved for the timeout only.

Do not load PC directly from CPU HW as the register value
has already been cached.

Change-Id: I0d3630da41fd021676789dc12b52545cc0432ba8
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5329
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-04-21 16:49:02 +01:00
Tomas Vanek
6e86ad6166 flash/nor: add flash mdw/h/b commands
Some flash banks are not mapped in the target memory
(e.g. SPI flash, some special pages).

Add flash version of mdw/h/b which reads data using
the flash driver.

Change-Id: I66910e0a69cf523fe5ca1ed6ce7b9e8e176aef4a
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4776
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-04-21 16:47:43 +01:00
Tomas Vanek
73a5f58adb tcl/target/nrf52.cfg: detect AP lock and add command to recover
Change-Id: I8d2e29ed88a957d412473255e42b022a00dfb9cb
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4984
Tested-by: jenkins
2020-04-21 16:46:58 +01:00
Aurélien Martin
ec16e522bf nrf5: Comment the flash loader
Change-Id: Ia84b5b8ede53f59299a02dc6163d6bbaa31e0fbd
Signed-off-by: Aurélien Martin <martaurel@gmail.com>
Reviewed-on: http://openocd.zylin.com/5272
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-04-21 16:45:04 +01:00
Aurélien Martin
3c8aa12859 nrf5: Refresh the watchdog while flashing
If watchdog is enabled, there's no way we can disable it while the flashing firmware
is running. (Halt disables it, but software reset doesn't.) So let's have the flashing
firmware refresh the watchdog regularly, in case it has been enabled by previously
running software. Failure to do so could lead to a watchdog reset in the middle of
the chip bieng programmed.

Change-Id: I79d41593948aae0080480e891552e1c2ee3ccbd0
Signed-off-by: Aurélien Martin <martaurel@gmail.com>
Reviewed-on: http://openocd.zylin.com/5266
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-04-21 16:40:35 +01:00
Aurélien Martin
65d8fdf0d1 nrf5: Include generated loader code
Dump legacy hexadecimal machine code

Change-Id: I336efa461058bccc3894131cb22473785b68479c
Signed-off-by: Aurélien Martin <martaurel@gmail.com>
Reviewed-on: http://openocd.zylin.com/5267
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-04-21 16:38:58 +01:00
Florian Fainelli
5c6e32612d Remove BUILD_TARGET64
BUILD_TARGET64 creates a larger test matrix and mostly gates the
building of the aarch64/armv8 target, make that unconditional, which
would help fixing any issues with 64-bit address types anyway.

Rebased by Antonio Borneo after commit 1fbe8450a9 ("mips: Add
MIPS64 support")

Change-Id: I219f62b744d540d9dde9a42e6b63fd7d91df3dbb
Suggested-by: Matthias Welwarsky <matthias@welwarsky.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5240
Tested-by: jenkins
2020-04-21 12:55:41 +01:00
Liming Sun
5c8de6a725 jtag/drivers/rshim: Disable the driver by default
This is a follow-up change of commit 6d6a69d5 to disable it by
default. The driver was introduced in 6d6a69d5 and enabled by
default in order to run the jenkins build.

Signed-off-by: Liming Sun <lsun@mellanox.com>
Change-Id: I5c5fc6711b971b65dd5846a6163025879044ec40
Reviewed-on: http://openocd.zylin.com/5563
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-04-21 11:18:25 +01:00
Liming Sun
699a8475a1 jtag/drivers: add debugging support for Mellanox BlueField SoC
This commits adds debugging support for the Mellanox BlueField
SoC via rshim, which is an interface accessible from external USB
or PCIe (for SmartNIC case) via the rshim driver. It implements
the arm dap interfaces based on the existing dapdirect framework.

Change-Id: I18eb1c54293ec2c581f853e0e55b3f96d7978b56
Signed-off-by: Liming Sun <lsun@mellanox.com>
Reviewed-on: http://openocd.zylin.com/5457
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-04-21 11:18:11 +01:00
Antonio Borneo
76a1524b5e tools/checkpatch.sh: remove flag --no-tree
Commit c5d8988316 ("checkpatch.pl:
check for openocd tree, not for kernel tree") has already fixed
the check for OpenOCD tree, thus we do not need to skip it in the
shell wrapper.

Remove flag --no-tree from the shell wrapper.

Change-Id: I8be497258624d89bde7742fee141a8f56bf9188e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5110
Tested-by: jenkins
2020-04-21 10:51:36 +01:00
Marek Vasut
278c7adcce tcl/target: Drop reference to renesas_gen2_common.cfg
Drop bogus reference to board/renesas_gen2_common.cfg , which is a
non-existing file.

Fixes: a01474bb4c ("tcl/target: Switch Renesas R-Car Gen2 boards to new config")
Change-Id: Icb22d8456b7ac94d3a9a4ed354b246ee1332b122
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5564
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-04-21 10:02:08 +01:00
Antonio Borneo
7a94d0a19f tcl: stm32mp15x: add target and board config files
The stm32mp15x has one or two Cortex-A7 (depending on the P/N) and
one Cortex-M4.
The second core is automatically detected by the target script.
In "engineering boot" all the cores are accessible.
In "production boot" the Cortex-M4 is kept in reset state after
power-on or NRST.

The board DK2 includes a ST-Link/V2, but only SWD is connected.

Change-Id: Ib6ebefcc696b1716e0f98694cadf0b04fd7d11d6
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5454
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-04-21 08:52:48 +01:00
Tomas Vanek
3c296bd194 jtag/drivers/ulink: fix clang static analyzer warnings
scan-build-9:
Description: Potential leak of memory pointed to by 'cmd'
File: /home/vanekt/openocd/scanbuild9/../src/jtag/drivers/ulink.c
Line: 1075

Description: Potential leak of memory pointed to by 'cmd'
File: /home/vanekt/openocd/scanbuild9/../src/jtag/drivers/ulink.c
Line: 1275

ulink_append_xxx_cmd() functions allocate memory for cmd
and then call ulink_allocate_payload(), which allocates cmd->payload_out
or cmd->payload_in.

ulink_append_queue() checks the size of queue and if the new payload
does not fit, calls ulink_execute_queued_commands() and then
ulink_post_process_queue(). If any of these two fails, an error is
returned, allocated cmd struct leaks and the queue is left in an undefined
state.

Change ulink_append_queue() flow to proceed to appending cmd to the queue
even in the case of fail in previous ulink_execute_queued_commands()
or ulink_post_process_queue(). In case of fail then clear the queue
including the last appended cmd.

Change-Id: I967c07af19e9020c93bcb4ef403cf1f557dd1db1
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5370
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-04-20 18:26:58 +01:00
Tomas Vanek
6dcd255b7b jtag/drivers/ulink: fix clang static analyzer warning
scan-build-9:
Description: Access to field 'payload_in' results in a dereference
 of a null pointer (loaded from field 'queue_start')
File: src/jtag/drivers/ulink.c
Line: 2216

Set input/output_signals conditionally if ulink_append_get_signals_cmd()
and ulink_execute_queued_commands() returns no error.
Do not fail driver initialisation as the signals are only printed.

Change-Id: I6c842f0e9a604712abf7444a2fa95ba5810de1ff
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5520
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-04-20 18:26:33 +01:00
Tomas Vanek
c064440162 jtag/drivers/ulink: fix clang static analyzer warning
scan-build-9:
Description: Potential leak of memory pointed to by 'tdo_buffer'
File: src/jtag/drivers/ulink.c
Line: 1629

Free the buffer before error return.

Change-Id: Ic47651a5ae78c7a47ae4fcbad225f329b14c45cb
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5519
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-04-20 18:25:53 +01:00
Tomas Vanek
46f077aa00 flash/nand/core: fix clang static analyzer warning
core.c:446:
The left operand of '>>' is a garbage value

There are many places where an error code returned from nand->controller
operations are ignored. To keep the change minimal, the error checks are
added only to reading of extended nand info as it was suspected
to be the cause of the warning.

Addition of the error checks did not fix the warning.
scan-build-9 report was inspected and IMHO the warning is bogus:
the term (nand->device->erase_size == 0) cannot give false at line 395
and then evaluate true at line 462. Fixed by zeroing id_buff.

Change-Id: I97ed7ce0fdf1aa23d746d5fb898bacd050e20ae8
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5518
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-04-20 18:25:36 +01:00
Evgeniy Didin
ea4f98046f target/arc: remove saving context during reset
In arc_poll() function we handle the cases, when jtag indicates, that
processor is halted, but target->state is not TARGET_HALTED.
In case, when processor was halted and target->state was TARGET_RUNNING,
we should save context. At the same time if target->state was TARGET_RESET
we do not need to save context.

Changes: 16.04:
Fix - Move setting target->state = TARGET_HALT after
"target->state == TARGET_RUNNIG" check, otherwise
this check makes no sense

Change-Id: I92ab6ec71cf58273bb8401d14a562035de3deab4
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5524
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-04-20 18:22:53 +01:00
Evgeniy Didin
a7d98680e2 Add documentation section for ARCv2
Changes since v1:
-Moved from http://openocd.zylin.com/#/c/5332/4
 into separate commit.

28.02.2020:
-Removed multiple cpu configuration section, currently
 only ARC EM is supported.

17.03.2020:
-Some cleanup
-For "arc set-reg-exists" command limitize the number of
 arguments (50 maximum).

17.03.2020(v2):
-Revert limitation for "arc set-reg-exist" command

Change-Id: I4b06f89df95f2773bfde6e1bd2ae2b6b880bfaa8
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Cc: Alexey Brodkin <abrodkin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5351
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-04-20 18:19:14 +01:00
Evgeniy Didin
435e6101c6 Introduce ARCv2 tcl config files
With this commit we add tcl files which describes
ARCv2 architecture features and configure files
for ARCv2 EMSK board.

Changes since v1:
-Moved from http://openocd.zylin.com/#/c/5332/4
 into separate commit.

Changes:
22.01.2020:
-Removed "actionpoints" handling code in
 tcl/cpu/arc/v2.tcl because this capability
 is not supported yet.

Changes:
17.03.2020:
-Update Licence headers
-Cleanup indents
-Removed "reset halt" in boards .tcl
-Updated adapter frequency commands

Changes:
15.03.2020:
-Removed "init" in the of boards .tcl

Change-Id: I51bf620abe7b8e046e1dccc861a7d963965d3a42
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Cc: Alexey Brodkin <abrodkin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5350
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-04-20 18:16:44 +01:00
Tomas Vanek
a1c51caafb Revert "rtos/FreeRTOS: Fix FreeRTOS thread list reading"
This reverts commit 6568d29cc1.
The reverted change caused some tasks were missing in thread list.

While on it add a comment explaining the relation of uxTopUsedPriority
and configMAX_PRIORITIES, introduce config_max_priorities and
change types to unsigned.

Change-Id: I4371c8882470d13ee7360ef21b132c56ecb95af8
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5577
Tested-by: jenkins
2020-04-15 12:40:31 +01:00
tscn92
10b39c3db0 flash/nor/efm32: Chip support extension (EFM32GG12B Giant)
For flash/nor/efm32 the EFM32GG12B Giant chip has been added to the
efm32_family along with its respective series and msc_rebase.
Testen on EFM32GG12B390F board

Change-Id: Idd7dfa93f26ac22566aed1be28f30db678cc0a25
Signed-off-by: tscn92 <tscn@kamstrup.com>
Reviewed-on: http://openocd.zylin.com/5567
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
2020-04-13 17:53:26 +01:00
Tarek BOCHKATI
e7f9ad3932 server: set connection::input_pending type to bool
Change-Id: Ifae8ac2761a7a8fa12732b71c2de456e7558bd2b
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5565
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
2020-04-13 17:52:06 +01:00
Tarek BOCHKATI
ef6eb5691a server/gdb_server: set gdb_connection::ctrl_c type to bool
Change-Id: I828b83b181f7a222ee2e6cb67eb337c6cd8712ac
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5566
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
2020-04-13 17:51:42 +01:00
Ake Rehnman
b9a30e0892 Entering SWIM mode on ST-LINK does not update swim status word.
As a consequence of a previous failed SWIM command any
subsequent attempts to enter SWIM mode fails. Change
stlink_usb_mode_enter to use stlink_usb_xfer_noerrcheck
instead.

Change-Id: I5c6a1a8e68d3dc77ec37264880383366fa6a75d9
Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com>
Reviewed-on: http://openocd.zylin.com/5547
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-04-12 22:06:29 +01:00
Tarek BOCHKATI
68e200c660 stlink: always use a valid endpoint
In order to extend the driver to support stlink-server over TCP,
we should always use a valid endpoint, as stlink-server is not permissive
and do not accept the invalid STLINK_NULL_EP.

STLINK_NULL_EP value was used for commands without an expected reply,
this value could be replaced with a valid endpoint without any impact
when the size is set to zero.

Change-Id: I003ad364e03d3a10bc036772db86310d996cbe81
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5455
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-04-12 22:06:02 +01:00
Antonio Borneo
263296e549 jtag: flush queue after reset for drivers using old reset model
Not all the jtag drivers have been migrated to the new reset model
and for those only we need to flush the jtag queue to make the
reset working with command 'adapter [de]assert ...'.

Add a queue flush and a FIXME comment to remove both when all the
drivers would be migrated.

Change-Id: Ib6667f987b1be2bce492841040302e742dd1cad1
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5430
Tested-by: jenkins
2020-04-12 22:05:46 +01:00
Antonio Borneo
16706256e4 gdb_server: print the target associated to the gdb port
While running OpenOCD on multi-target SoC, it's not immediate to
detect which target is associated to each GDB port. The log only
reports:
	Info : Listening on port 3333 for gdb connections
and a verbose debug log is required to get such info.

Promote to LOG_INFO() the existing debug message that already
reports the association, obtaining for each port:
	Info : starting gdb server for stm32mp15x.cpu0 on 3333
	Info : Listening on port 3333 for gdb connections

Change-Id: I1bd75655a3449222c959e6e82f5e0f8f5acd908a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5525
Tested-by: jenkins
Reviewed-by: Jan Matyas <matyas@codasip.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-04-12 22:03:55 +01:00
Antonio Borneo
17ac52360f cortex_m: remove deprecation for soft_reset_halt
The command "soft_reset_halt" is deprecated since mid 2013 with
the commit 146dfe3295 ("cortex_m: deprecate soft_reset_halt").
Nevertheless it is still extremely useful with multicore chips
where it allows to reset only one of the cores, option not
available through asserting the chip-wide srst.
It also get useful to handle the reset on some problematic chip,
as in http://openocd.zylin.com/5489

Replace the warning about deprecation with a more light debug
message.

Change-Id: I52de6359475ba31014ae77e596a87fe88b252177
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5514
Tested-by: jenkins
Reviewed-by: Edward Fewell <efewell@ti.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-04-12 22:03:22 +01:00
Antonio Borneo
4873503ae4 cortex_a: don't wait for target halted in deassert_reset()
The tcl script src/target/startup.tcl has already the proper
centralized support to wait for all targets to halt after the
command "reset halt". The extra wait in cortex_a_deassert_reset()
is not required.
This extra wait is also an issue for multi-core support, because
waiting for one core to halt can delay the halt request to the
other cores.

Replace the indirect call to cortex_a_halt(), that embeds the wait
for halt, with a low-level halt sequence.

The on-going work on the reset framework is compatible with this
change; in fact it keeps in startup.tcl the wait for targets to
halt, even if current code proposal for cortex_a simply removes
the function cortex_a_deassert_reset().

Change-Id: Ic661c3791a29ba7d520e31f85a61f939a646feb5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5472
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-04-12 22:03:00 +01:00
Antonio Borneo
cbbc56f7f7 stlink: remove only instance of useconds_t
The usleep() function, and its associated useconds_t type
specifier, has been obsoleted by POSIX.1-2008.

OpenOCD has 28 call to usleep(), that should be migrated to the
replacement nanosleep(), but due to the different prototype
	int nanosleep(const struct timespec *req, struct timespec *rem);
this can take some effort.

The type useconds_t is used in only one case, where it's used both
as parameter of usleep() and as value passed to LOG_DEBUG(). Due
to different implementation of useconds_t, there are cases that
trigger a compile warning in LOG_DEBUG() when useconds_t is more
than 32 bit.
E.g. with unistd.h in MinGW 4.x, useconds_t is defined as unsigned
long, thus being 32 or 64 bits depending on the target.

Replace the only instance of useconds_t.

Change-Id: I21724f8b06780abdb003a57222ff1d6840ff5419
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5544
Tested-by: jenkins
Reviewed-by: Ake Rehnman <ake.rehnman@gmail.com>
2020-04-12 22:02:19 +01:00
Antonio Borneo
02903916dd flash/nor/nrf5: pass unsigned char to isalnum()
In newlib, the argument of isalnum() and the similar functions in
ctype.h is checked to be either an int or an unsigned char.
Using a normal (signed) char triggers a compile time warning
	warning: array subscript has type ‘char’ [-Wchar-subscripts]

Rewrite the function to separate the internal unsigned char
operations from the (signed) char parameter.

Change-Id: I5f19115f0b2de2b5b35dc07ef4b58a96161268ee
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reported-by: Åke Rehnman <ake.rehnman@gmail.com>
Fixes: 5da746fa09 ("flash/nor/nrf5: detect newer devices without HWID table")
Reviewed-on: http://openocd.zylin.com/5545
Tested-by: jenkins
Reviewed-by: Ake Rehnman <ake.rehnman@gmail.com>
2020-04-12 22:02:01 +01:00
Antonio Borneo
27d04d4284 sysfsgpio: minor fix for bool types
Return bool value in functions that return bool.
Change return type to bool to function is_gpio_valid().

Change-Id: Ic2e62be737772b22e69881c034956549f659370b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5552
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
2020-04-12 22:01:18 +01:00
Marek Vasut
21b9a0e1e3 travis: Add .travis.yml
Add basic Travis-CI .travis.yml, to let Travis CI run automated build tests.

Change-Id: Iceae442c13f30b57842b300c0920108b614c75f7
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5414
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-04-10 13:58:09 +01:00
Jan Matyas
25efc15069 target: added events TARGET_EVENT_STEP_START and _END
Events TARGET_EVENT_STEP_START and TARGET_EVENT_STEP_END
have been added - analogous to already existing events
TARGET_EVENT_RESUME_*.

This is an example of a concrete use case where having
these events is important:

In RISC-V processors without Debug Program Buffer, OpenOCD
cannot execute fence/fence.i when resuming or single-
stepping. With these events implemented, the user can
instead provide custom operations to achieve that same
effect prior to resuming the processor.

Change-Id: I786348ff08940759d99b0f24e9e0ed5a44581094
Signed-off-by: Jan Matyas <matyas@codasip.com>
Reviewed-on: http://openocd.zylin.com/5551
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
2020-04-09 11:06:39 +01:00
Sasha Kozaruk
0a804222da flash/stm32h7x: Use proper flash regs base for bank 1
On stm32h747 writing/erasing bank 1 didn't work. It was because the
flash register base was always set for bank 0.
Tested on STM32H747I-DISCO board.

Change-Id: I7e8c43ecdda9dc70b114905f5ec6a6753ca29d82
Signed-off-by: Sasha Kozaruk <alkhozar@gmail.com>
Reviewed-on: http://openocd.zylin.com/5534
Reviewed-by: Christopher Head <chead@zaber.com>
Tested-by: jenkins
2020-04-05 14:28:17 +01:00
Edward Fewell
eb427864e8 tcl/target: Use vectreset for CC13xx/CC26xx targets.
nSRST and sysreqreset are both broken for these targets. Upon a
hard reset, the target disables the TDO/TDI pins and the
ICEPick router will remove the target's TAP from the scan
chain. The scripts to do these tasks are run, but then
OpenOCD throws the reset again breaking the debug connection.

Until that issue can be resolved, vectreset is the only
reset that works without breaking the debug connection.

Update: original patch didn't have the correct reset command.

Change-Id: If7c985b703c87399a13364609d370d6222f4a66c
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/5511
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-04-05 14:27:07 +01:00
Laurent LEMELE
d14eac569c stlink: remove 18 MHz jtag freq for stlink v2
While stlink v2 allows setting the jtag clock frequency till a max
of 18 MHz, the firmware seams unstable and not properly working.

Remove the entry for 18 MHz, at least until a fix get available.

Change-Id: I503e1b6a5709b5fbf1f1147fd3b5f34a0c5ee98c
Signed-off-by: Laurent LEMELE <laurent.lemele@st.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5465
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-04-05 14:12:26 +01:00
Laurent LEMELE
56ff1ecddb stlink: fix speed setting in dap mode
stlink accepts a set of values for "adapter speed".
Fix the api khz() to return one of the allowed speed values.

Change-Id: Iac640b6f76935891ca25ac168cab3809707f19d9
Signed-off-by: Laurent LEMELE <laurent.lemele@st.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5464
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-04-05 14:12:21 +01:00
Tarek BOCHKATI
4ce4aa752b armv8: log the register name which we failed to read or write
when openocd fails to read armv8 register, the user is not informed
which register has caused the error.

for example, in AArch32 state ESR_EL3 read/write is not supported,
thus armv8_dpm_read_current_registers is always failing without mentioning
which register has caused the error.

Change-Id: I24c5abbda9fac24fb77a01777ed15261aeaaf800
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5516
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-04-05 14:11:43 +01:00
Marc Schink
af82b97834 flash/nor/cfi: Minor code cleanups
Change-Id: I2d45fcc5b9d232db66218aab5fef3add5830bcd7
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5463
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-04-05 14:11:18 +01:00
Tarek BOCHKATI
1c16d76c00 flash/stm32f1x: fix maximum flash size for some devices
For STM32F0xxx, according to RM0360 Rev 4 and RM0091 Rev 9,
the accurate flash sizes are in RM0360, Table 4 and 5

  DEV_ID=0x440 => F030x8 => 64K (64 * 1K)
                  F05xxx => idem
  DEV_ID=0x442 => F030xC => 256K (128 * 2K)
                  F09xxx => idem
  DEV_ID=0x444 => F030x4 => 16K (16 * 1K)
                  F030x6 => 32K (32 * 1K)
  DEV_ID=0x445 => F070x6 => 32K (32 * 1K)
                  F04xxx => idem
  DEV_ID=0x448 => F070xB => 128K (64 * 2K)

For STM32 F100xx HD VL (0x428), max_flash_size_kb is 512 (was 128)
  refer to RM0041 Rev5: Table 5. Flash module organization (high-density
  value line devices) => (256 page of 2 Kbytes each)

Change-Id: I4ead13093f8f4b8ec900482ee049a6fc83dcc664
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5444
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-04-05 14:10:47 +01:00
Roman Elshin
fa329f2852 cmsis_dap_usb: Light up the leds while connected
Tested with Keil ULINK2 CMSIS-DAP.

Change-Id: I331224d23412bed8b2dea25abacbf9096ddd18b1
Signed-off-by: Roman Elshin <roxmail@list.ru>
Reviewed-on: http://openocd.zylin.com/5385
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-04-05 14:09:41 +01:00
Edward Fewell
0690361abc flash/nor: Change missing protect_check message from WARN to Info.
Change the current message when a flash driver does not implement
the protect_check function to LOG_INFO() from LOG_WARNING(). The
user is still notified that the procedure isn't available, but
changes the tone to indicate this is expected with this flash
driver and not something that necessarily is a problem to fix.

Change-Id: If8a2e86a23c852d562346ca36734e5d02df4a851
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/5539
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-04-05 14:09:24 +01:00
Tarek BOCHKATI
d6541a811d doc: add missing target types
missing target types are arm946e, avr32_ap7k, cortex_r4, dsp5680xx,
hla_target, mips_mips64, nds32_v2, nds32_v3, nds32_v3m, quark_d20xx,
quark_x10xx, riscv, stm8 and testee

Change-Id: I38f6ed78ee88c09add4b779cd409ebb1e219304f
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5487
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@casualhacker.net>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-03-27 07:14:38 +00:00
Tarek BOCHKATI
8f221f32bc doc: enhance target types description
target types are sorted alphabetically
minor changes for some precision:
 - cortex_a : it's an ARMv7-A core
 - cortex_m : besides the ARMv7-M it support the v6-M and v8-M cores

Change-Id: I37ade2392fe3948fba4156a2831bbd8739fa9993
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5486
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-03-27 07:12:53 +00:00
Tarek BOCHKATI
af69f5ad0b doc: fix OpenRISC target documentation
OpenRISC correct target name is 'or1k' not 'openrisc'
http://openocd.zylin.com/3096 introduced a conflict between 'openrisc'
and 'ls1_sap' documentations

Change-Id: Iedebbf9809300e1272334c5b63d0b31a41062282
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5485
Tested-by: jenkins
Reviewed-by: Esben Haabendal <esbenhaabendal@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-03-27 07:11:45 +00:00
Evgeniy Didin
f00070edaf target/arc_cmd: Improve argument checks for commands
Add more argument check for "add-reg" command.

Changes since first revision:
-Removed arguments limitation(50 maximum) for "arc_set_reg_exists".

Changes:
25.03:
Removed inconsistency in "add-reg" function. Actually
"-type" option is optional and if it is not set,
register type is "int".

Change-Id: Ia21e6baf4fbda162f7811cd0fe305fc86ddafcfd
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5523
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-03-27 07:09:41 +00:00
Marc Schink
5ceae0eef4 target: Add possibility to remove all breakpoints
Change-Id: I46acd57956846d66bef974e0538452462b197cd0
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4916
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-03-26 19:30:45 +00:00
Marc Schink
9960e805b3 target: Add function to remove all breakpoints
Change-Id: I4718926844a2c8bcfd78d7a8792f6ded293548ef
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4915
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-03-26 19:30:34 +00:00
Lars Poeschel
d9ffe75e25 avrf.c: Add ATmega256RFR2 to known flash list
This adds the ATmega256RFR2 to the list of know devices for flashing.

Change-Id: Ib24a508762aaa84ba08ba37409db2ae674b46288
Signed-off-by: Lars Pöschel <poeschell+openocd@mailbox.org>
Reviewed-on: http://openocd.zylin.com/5504
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-03-24 21:34:35 +00:00
Lars Poeschel
a708b6d25e avrf.c: Use extended addressing for flash > 0x20000
The current method used for flash addressing uses 16 bit. Every access
to flash is 16 bit wide. With 16 address bits one can address 0x10000
unique locations á 16 bits thats 0x20000 bytes.
For flashes bigger than that avrs have an extended addressing with more
than 16 address bits. This is now implemented and used for flashs larger
than 0x20000 bytes.

Change-Id: Id8b6337dde3830fb3c56b9042872e040bb67c12d
Signed-off-by: Lars Pöschel <poeschell+openocd@mailbox.org>
Reviewed-on: http://openocd.zylin.com/5502
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-03-24 21:34:18 +00:00
Antonio Borneo
85dc630113 jtag: fix command "adapter [de]assert" with dap direct
The commit fafe6dfc9c ("adapter: add command "adapter [de]assert
srst|trst [[de]assert srst|trst]"") was proposed in gerrit well
before commit a61ec3c1d7 ("adi_v5_dapdirect: add support for
adapter drivers that provide DAP API") get merged, so it didn't
include a complete support for dap direct.
The merge upstream of the two commits lacks the support by command
"adapter [de]assert" for dap direct

Let command command "adapter [de]assert" handle dap direct.

Change-Id: I1a69f8ee877c8fd57598ed4ad9d71da61d15457c
Fixes: commit fafe6dfc9c ("adapter: add command "adapter [de]assert srst|trst [[de]assert srst|trst]"")
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5515
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-03-24 17:27:39 +00:00
Antonio Borneo
b7c13323e7 doc: fix texinfo files attributes on Windows
While installing git on Windows, the user is prompted by a dialog
"Configuring the line ending conversions" to select the value for
the git property "core.autocrlf". The default choice proposed by
the installer is "Checkout Windows-style, commit Unix-style line
endings", that corresponds to "core.autocrlf=true".
Even if the dialog provides technical explanation of the different
choices, most users will blindly accept the default proposal.

With "core.autocrlf=true" git will convert to DOS mode all the
text files during "clone" (so can be edited by any crap Windows
tool) and convert back to UNIX mode during "push" operation.
While this is safe enough for C and TCL files, it breaks the
texinfo files.
The trailing '@' character used for command continuation in
	https://www.gnu.org/software/texinfo/manual/texinfo/html_node/Def-Cmd-Continuation-Lines.html
does not accept being followed by CR+LF (DOS mode), generating a
build error. Same error can be replicated on Linux by passing the
file doc/openocd.texi through "unix2dos" command.
Tentative to fix this has already been proposed in
	http://openocd.zylin.com/5294
	http://openocd.zylin.com/5413
by breaking the command continuation syntax, which is a no go.
The correct fix would require to force/suggest all the Windows
users to get rid of the crap DOS mode, but this could have side
effects.

To workaround the issue, add a .gitattributes file in the doc
folder, specifying a local conversion attribute for the files .txt
and .texi in the doc folder and overriding the eventual incorrect
global value of "core.autocrlf" selected during installation.
The local attribute "text eol=lf" is equivalent to the global one
"core.autocrlf=input".

Change-Id: I468a8f8125b6bc4628fce6c66eb082824ba3413f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5499
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-03-24 17:20:19 +00:00
Edward Fewell
4d7c48fb80 tcl/target: Enable using vectreset for CC3320SF targets
On CC32xx family of devices, sysrequest is disabled, and
vectreset is blocked by the boot loader (stops in a while(1)
statement). srst reset can leave the target in a state
that prevents debug.

This change enables using vectreset on SF variants by
moving the PC to the start of the user application in
internal flash. This allows for a more reliable reset,
but with two caveats:

1) This only works for the SF variant with internal
   flash.

2) This only resets the CPU and not any peripherals.

Tested on CC3220SF rev B Launchpad in both SWD and
JTAG modes. Confirmed proper behavior of reset,
reset init, reset halt, and reset run commands.

Update: reworked per comment in code review. Re-tested
with CC3220SF Launchpad as both CC3220SF and as
CC32xx board to confirm reset behavior as expected.

Update: Added adapter srst delay 1100 line to the
CC3200 LaunchXL configuration file.

Change-Id: Ibc042d785c846c2223ae55b8f2410b75ed2df354
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/5489
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-03-24 17:18:31 +00:00
Edward Fewell
d35c44c743 drivers: xds110: Add support of alternate XDS110 configurations
The XDS110 supports alternate configurations, each of which has
a unique vid/pid:

0451/bef3 -- Standard (legacy) configuration
0451/bef4 -- Drag-n-Drop configuration
1cbe/02a5 -- CMSIS-DAP 2.0 on BULK interface configuration

It's not important to OpenOCD what the differences are except
that OpenOCD needs to know how to connect using the different
vid/pids and, in the case of the last one, use a different
interface for the debug connection.

Updated the XDS110 source to search for all possible
configurations, and updated the udev rules file to enable
user access to the alternate configuraitons.

For the curious, you can download the latest XDS emupack from
software-dl.ti.com/ccs/esd/documents/xdsdebugprobes/emu_xds_software_package_download.html
Install to an empty directory, and documentation for the
XDS110 is located in the .../ccs_base/common/uscif/xds110
of the installation.

Updated for comments in code review. Changed const variable
names to lower case. Reworked interface/endpoint setting
to use arrays suggestion.

Change-Id: Icc9d11c6618f43d87ae8171c78ebf238800d3ac2
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/5494
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-03-24 17:18:14 +00:00
Edward Fewell
87a4158acf drivers: xds110: Clean up command syntax and documentation
Arrange all commands under a top level xds110 command. Fix
documentation to properly reflect the current functionality.

Also updated the links in the document to the new permanent
links for the XDS110 only support.

Patch updated for comments from code review. Return
ERROR_COMMAND_SYNTAX_ERROR for wrong number of args in
commands. Added deprecated commands to src/jtag/startup.tcl.

Change-Id: Ica45f65e1fdf7fa72866f4e28c4f6bce428d8ac9
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/5495
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-03-24 17:17:45 +00:00
Edward Fewell
76ba9bd0b3 tcl/target: Use sysresetreq for MSP432 targets
Confirmed that sysresetreq is supported and works better
for MSP432P4 and MSP432E4 targets than srst that was
previously being used.

Tested on MSP432P4111, MSP432P401R, and MSP432E401Y
Launchpads.

Change-Id: I1454c3379b9300bc133f82a766daeaefb98dbaac
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/5488
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-03-24 17:17:22 +00:00
Edward Fewell
c9ebd488ea drivers: xds110: Add support TCK changes in firmware update
Starting with XDS110 firmware version 3.0.0.0, the peak TCK
frequency became 14,000 kHz. So the delay count calculation
in the current driver has been updated to use the new
formula for setting the TCK speed depending on which version
of the firmware is detected. And because of the changes, the
default TCK settings for the XDS110 based Launchpads can be
adjusted to take advantage of the higher TCK performance.
Note that the values used have been determined through
testing in the automated test labs to be the highest TCK
frequency with the XDS110 that are still reliable.
Different boards have a different peak TCK setting that
should be safe.

Change-Id: I4d66e90d8fac8272641ba4db4a3a510e3b444d86
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/5493
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-03-24 17:17:02 +00:00
Tarek BOCHKATI
bff1b6f05a flash/stm32l4x: add support of STM32WB3x devices
STM32WB3x devices' flash are quite similar to STM32WB5x,
except the maximum flash size, which is 512K for WB3x and 1M for WB5x

Change-Id: I3098d7153a7429e0e72c75cec962c05768b0b018
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5475
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-03-23 22:09:44 +00:00
Tarek BOCHKATI
c999fcef3e flash/stm32l4x: add support of STM32WLEx devices
STM32WLEx devices are based on arm Cortex-M4 running at 48MHz,
contains a single bank of maximum 256 Kbytes of flash memory.

there is 3 variants with different Flash/RAM sizes:
  STM32WLE5JC : 256K/64K
  STM32WLE5JB : 128K/48K
  STM32WLE5J8 :  64K/20K

the work-area size is set to 20 kb to fit in STM32WLE5J8

Change-Id: Ie8e186fe4be97cbc25c53ef0ade4b4dbbcee6f66
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5450
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-03-23 21:52:10 +00:00
Tarek BOCHKATI
4b4389a2d6 stlink: workaround serial bug with old ST-Link DFU
Old ST-LINK DFU returns an incorrect serial in the USB descriptor
 example for the following serial "57FF72067265575742132067"
  - the correct descriptor serial is:
    0x32, 0x03, 0x35, 0x00, 0x37, 0x00, 0x46, 0x00, 0x46, 0x00 ...
    this contains the length (0x32 = 50), the type (0x3 = DT_STRING)
    and the serial in unicode format.
    the serial part is: 0x0035, 0x0037, 0x0046, 0x0046 ... >>  57FF ...
    this format could be read correctly by 'libusb_get_string_descriptor_ascii'
    so this case is managed by libusb_helper::string_descriptor_equal
  - the buggy DFU is not doing any unicode conversion and returns a raw
    serial data in the descriptor:
    0x1a, 0x03, 0x57, 0x00, 0xFF, 0x00, 0x72, 0x00 ...
            >>    57          FF          72       ...
    based on the length (0x1a = 26) we could easily decide if we have to fixup the serial
    and then we have just to convert the raw data into printable characters using sprintf

example for an old ST-LINK/V2 standalone:
  before : 'W?rreWWB g'
  after  : '57FF72067265575742132067'
  => same as the displayed value in STM32CubeProgrammer

tested using these commands
  using the buggy serial
    -c "hla_serial \x57\x3f\x72\x06\x72\x65\x57\x57\x42\x13\x20\x67"
  using the computed serial
    -c "hla_serial 57FF72067265575742132067"

Change-Id: I1213818257663eeb8e76f419087d3127d0524842
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5396
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-03-22 08:17:14 +00:00
Tarek BOCHKATI
6ecccc8895 jtag/libusb_helper: permit adapters to compute their custom serials
introduce a callback function that could be passed to jtag_libusb_open
to permit adapters to compute their custom/exotic serials.

the callback should return a non NULL value only when the serial could not
be retrieved by the standard 'libusb_get_string_descriptor_ascii'

Change-Id: Ib95d6bdfc4ee655eda538fba8becfa183c3b0059
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5496
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-03-22 08:17:06 +00:00
Tarek BOCHKATI
1891c2d26e flash/stm32h7x: use proper data type (bool) for has_dual_bank
+ minor changes in comments' alignment to please our eyes

Change-Id: Ifa35a1032afc4e9aee524f596c0298a9eea49c37
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5500
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
2020-03-20 07:08:40 +00:00
Christopher Head
140fe7f714 flash/nor: check fill pattern fits in word size
Change-Id: Idad527a428ceed2b53f3da41fb0c64bf8e62614a
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5492
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-03-17 16:40:53 +00:00
Marc Schink
aff486b6a0 rtos: Destroy RTOS and fix memory leak
The memory leak can be reproduced by using an arbitrary RTOS
and valgrind:

 $ valgrind --leak-check=full --show-leak-kinds=all

[...]
==9656== 224 (80 direct, 144 indirect) bytes in 1 blocks are definitely lost in loss record 3 of 3
==9656==    at 0x483CD99: calloc (in /usr/lib/x86_64-linux-gnu/valgrind/vgpreload_memcheck-amd64-linux.so)
==9656==    by 0x1C541A: os_alloc (rtos.c:79)
==9656==    by 0x1C569E: os_alloc_create (rtos.c:111)
==9656==    by 0x1C569E: rtos_create (rtos.c:153)
==9656==    by 0x1AE332: target_configure (target.c:4899)
==9656==    by 0x1AF228: jim_target_configure (target.c:4952)
==9656==    by 0x1C9EF9: command_unknown (command.c:1066)
==9656==    by 0x313284: JimInvokeCommand (jim.c:10364)
==9656==    by 0x313FB6: Jim_EvalObj (jim.c:10814)
==9656==    by 0x3154A3: Jim_EvalFile (jim.c:11207)
==9656==    by 0x316015: Jim_SourceCoreCommand (jim.c:15230)
==9656==    by 0x313284: JimInvokeCommand (jim.c:10364)
==9656==    by 0x313B8B: JimEvalObjList (jim.c:10605)
[...]

Change-Id: I2cd41a154fb8570842601ff4e3e76502f5908f49
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5479
Tested-by: jenkins
Reviewed-by: Moritz Fischer <moritzf@google.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-03-17 16:40:14 +00:00
Tarek BOCHKATI
dca1c6ca1f flash/startup.tcl: add STM32G0 and G4 aliases
STM32G0 and G4 uses the same flash driver as the stm32l4x

Change-Id: Ic1c4be70aaee809536912e0390f07893efb9a082
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5482
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-03-16 15:26:03 +00:00
Andreas Bolsch
ba131f30a0 Flash driver for STM32G0xx and STM32G4xx
Flash module of STM32G0/G4 family is quite similar to the one of
STM32L4, so only minor changes are required, in particular
adaption of flash loader to Cortex-M0. Register addresses
passed to flash loader to simplify integration of L5.
Added re-probe after option byte load.
Added flash size override via cfg file.
WRPxxR mask now based on max. number of pages instead of fixed 0xFF,
as G4 devices fill up unused bits with '1'.
Sizes in stm32l4_probe changed to multiples of 1kB.

Tested with Nucleo-G071RB, G030J6, Nucleo-G431RB and Nucleo-G474RE.
Gap handling in G4 Cat. 3 dual bank mode tested with STM32G473RB.
This handling isn't optimal as the bank size includes the
size of the gap. WB not tested.

Change-Id: I24df7c065afeb71c11c7e96de4aa9fdb91845593
Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-on: http://openocd.zylin.com/4807
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-03-16 15:25:10 +00:00
Marek Vasut
e03de33c41 tcl/target: Fix naming of RZ/A1 SoC
The RZ/A1 is not part of the R-Car family, but is rather an RZ family.
Fix the naming.

Change-Id: I5f882b2467e87e534e0f1c827554e664a7d55664
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5445
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-03-14 20:39:47 +00:00
Edward Fewell
a34c336cbf drivers: xds110: Fix errors in routine that toggles
TCK during nSRST assert/deassert code.

To support LPRF targets (CC13xx/CC26xx), TCK must be toggled
for 50 ms while nSRST is asserted and right after it is
released. This allows the core to halt in boot ROM before
code is run that might interfere with debug access.

The current routine has two issues. It shouldn't be run at
all if the target is using SWD. And the delay needs to
be a real-time 50 ms, so the number of TCK periods should
be calculated off the set speed.

Change-Id: If993031b84cf2a505ea67a6633602c4b01cd8e1e
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/5497
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-03-14 19:16:42 +00:00
Antonio Borneo
b5d2b1224f target/cortex_a: add hypervisor mode
Hypervisor mode is present only if the optional virtualization
extensions are available. Moreover, virtualization extensions
require that also security extensions are implemented.

Add the required infrastructure for the shadowed registers in
hypervisor mode.
Make monitor shadowed registers visible in hypervisor mode too.
Make hypervisor shadowed registers visible in hypervisor mode
only.
Check during cortex_a examine if virtualization extensions are
present and then conditionally enable the visibility of both
hypervisor and monitor modes shadowed registers.

Change-Id: I81dbb1ee8baf4c9f1a2226b77c10c8a2a7b34871
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5261
Tested-by: jenkins
2020-03-12 10:11:19 +00:00
Antonio Borneo
6900c5af4e armv7a: access monitor registers only with security extensions
Accordingly to ARM DDI 0406C at B1.5, the security extensions for
armv7a are optional extensions and can be detected by reading
ID_PFR1.
The monitor mode is part of the security extensions and the shadow
registers "sp_mon", "lr_mon" and "spsr_mon" are only present with
the security extensions.

Read the register ID_PFR1 during cortex_a examine, determine if
security extension is present and then conditionally enable the
visibility of the monitor mode shadow registers.

Change-Id: Ib4834698659046566f6dc5cd35b44de122dc02e5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5259
Tested-by: jenkins
2020-03-12 10:10:33 +00:00
Antonio Borneo
9626402c5a target/armv4_5: remove unused macro
The macro ARMV4_5_CORE_REG_MODENUM() is unused.
Remove it!

Change-Id: I183df57bd86c9428710ea3583e43fba88fd26e0a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5260
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
2020-03-12 10:09:15 +00:00
Antonio Borneo
fba438fde7 arm: Use different enum for core_type and core_mode
The fields core_type and core_mode use the same enum arm_mode
but encode different information, making the code less immediate
to read.

Use a different enum arm_core_type for the field core_type.
The code behavior is not changed.

Change-Id: I60f2095ea6801dfe22f6da81ec295ca71ef90466
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5258
Tested-by: jenkins
2020-03-12 10:05:42 +00:00
Antonio Borneo
f447c31b30 arm: fix reg num for Monitor mode
Commit 2efb1f14f6 ("Add GDB remote target description support
for ARM4") inserts two additional registers "sp" and "lr" in the
table arm_core_regs[], thus shifting by two the position of the
last three registers already present
	"sp_mon" moved from index 37 to 39
	"lr_mon" moved from index 38 to 40
	"spsr_mon" moved from index 39 to 41
Part of the code is updated (e.g. enum defining ARM_SPSR_MON and
array arm_mon_indices[]), but it's missing the update of mapping
in armv4_5_core_reg_map[].

Fix armv4_5_core_reg_map[].

Change-Id: I0bdf766183392eb738206b876cd9559aacc29fa0
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 2efb1f14f6 ("Add GDB remote target description support for ARM4")
Reviewed-on: http://openocd.zylin.com/5257
Tested-by: jenkins
2020-03-12 10:05:30 +00:00
Antonio Borneo
fbbfbb2516 ftdi: flush mpsse queue after a level change on reset pins
The function ftdi_set_signal() does not propagate the pin change
until next call to mpsse_flush(). Current code does not toggles
immediately the reset pins if polling is turned off.

Call mpsse_flush() at the end of ftdi_reset().
While there, remove the duplicated LOG message.

Change-Id: I79eacfe4fc32b5cdf2dc1b78f3660d96988466bc
Fixes: 8850eb8f2c ("swd: get rid of jtag queue to assert/deassert srst")
Reported-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5431
Tested-by: jenkins
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-03-12 10:05:09 +00:00
Antonio Borneo
2e1dfebc8e jimtcl: update to tag 0.79
OpenOCD is stuck at jimtcl tag 0.77 that is 3 years old.
The latest tag 0.79 (2019-11-20) is already used by debian build,
which packs jim library separately, as shown in [1]. Today only
the build for architecture powerpcspe is still not updated to
latest package version.
I have been using jim 0.79 since the day of the release, without
any issue.

Switch jimtcl to latest tag 0.79

[1] https://packages.debian.org/sid/openocd

Change-Id: I3426e68c32f88ecde74d4278303925423db451e0
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5403
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-03-12 10:04:25 +00:00
Antonio Borneo
939febecca target: fix crash with jimtcl 0.78
The jimtcl commit 41c5ff1809f5 ("jim.c: Fix Object leak in zlib
support") https://repo.or.cz/jimtcl.git/commit/41c5ff1809f5
makes Jim_SetResultFormatted() freeing the parameters that have
zero refcount.

OpenOCD commit 559d08c19e ("jim tests: use installed") adds the
only code instance in OpenOCD that first passes a zero refcount
object to Jim_SetResultFormatted() and then frees it.
By switching jimtcl version to 0.78 or newer this causes a crash
of OpenOCD.
To trigger the crash in a telnet session, check that the current
target is running and type:
	[target current] arp_waitstate halted 1

Remove the call to Jim_FreeNewObj() after the call to
Jim_SetResultFormatted().

Change-Id: I5f5a8bca96a0e8466ff7b789fe578ea9785fa550
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5453
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-03-12 10:03:57 +00:00
Antonio Borneo
44967a9e07 jtag: report API reset as synchronous
The jtag API reset() is synchronous, but this was not highlighted
in the description.

Change-Id: I76ffb7eec97c8608cfbef0b9268ee18a5f50b221
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 8850eb8f2c ("swd: get rid of jtag queue to assert/deassert srst")
Reviewed-on: http://openocd.zylin.com/5471
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2020-03-12 10:03:42 +00:00
Tarek BOCHKATI
221fe49879 semihosting: add semihosting handlers to AArch64
note: this works only when the PE is in AArch64 state

Change-Id: Id6a336ca7d201df72bd1aaaeccce4185473fc1bd
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5474
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-03-12 09:48:56 +00:00
Matthias Welwarsky
afe899f938 cortex_a: warn on broken debug_base setting
A common problem with target configurations appears to be broken
debug base address configuration. ARM DDI0406C.d specifies in App. D,
1.4.1, that bit 31 of the debug base address serves as identification
of an external debugger, as opposed to an internal access to memory
mapped debug registers by the CPU. External accesses are treated
as privileged and require no debug authentification via the lock
access register.

Sometimes the base address of a debug component is wrong even
in the targets' ROM table. In this case, the correct base address
must be specified using the -dbgbase argument when creating the
target.

This patch adds a warning when bit 31 of the debug base address
is not set, as a hint to the user.

Change-Id: I9c41d85a138123c657ef655e3436a2aa39249dcc
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/5105
Tested-by: jenkins
Reviewed-by: Tommy Vestermark <tov@vestermark.dk>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-03-12 09:48:25 +00:00
Tarek BOCHKATI
a8b1bd8376 target/armv8_opcodes: use T32 instructions when the PE is in AArch32 state
As stated in ARM v8-A Architecture Reference Manual (ARM DDI 0487E.a)
in Chapter H4.3 DCC and ITR access modes:
    Writes to EDITR trigger the instruction to be executed if the PE
    is in Debug state:
      - If the PE is in AArch64 state, this is an A64 instruction.
      - If the PE is in AArch32 state, this is a T32 instruction

But in armv8_opcodes specifically in t32_opcodes we were using some
A32 instructions for HLT, LDRx and STRx opcodes.

Using the correct LDRx and STRx opcodes, fixes 16 and 8 bits memory access
when the PE is in AArch32 state.

Change-Id: Ib1acbdd4966297e7b069569bcb8deea3c3993615
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5346
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-03-12 09:47:08 +00:00
Tarek BOCHKATI
a154973896 target/aarch64: fix soft breakpoint when PE is in AArch32 state
Before this patch aarch64_set_breakpoint was using either A64, or A32
HLT opcode by relying on armv8_opcode helper.
This behaviors ignores the fact that in AArch32 state the core could
execute Thumb-2 instructions, and gdb could request to insert a soft
bkpt in a Thumb-2 code chunk.

In this change, we check the core_state and bkpt length to know the
correct opcode to use.

Note: based on https://sourceware.org/gdb/current/onlinedocs/gdb/ARM-Breakpoint-Kinds.html
      if bkpt length/kind == 3, we should replace a 32-bit Thumb-2 opcode,
      then we use twice the 16 bits Thumb-2 bkpt opcode and we fix-up the
      length to 4 bytes, in order to set correctly the bpkt.

Change-Id: I8f3551124412c61d155eae87761767e9937f917d
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5355
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-03-12 09:46:43 +00:00
Tarek BOCHKATI
4845b54372 target/aarch64: fix minor stepping issue with gdb
when using step command from gdb the step happens without any issue,
but aarch64_step call explicitly aarch64_poll which consumes the
status change to HALTED, so it does not inform gdb that the step has
finished.

by removing this call, all is back to normal and openocd could inform gdb
that the step has finished.

Change-Id: I9366aecd20f7d52259b050b8653189b67d9299d0
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5354
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-03-12 09:45:36 +00:00
Tomas Vanek
9f4659ae6b target: add examine-fail event
A configuration script may want to check the reason why examine fails
e.g. device has security lock engaged.

tcl/target/kx.cfg and klx.cfg is modified to use the new event
for testing of the security lock of Kinetis MCU

Change-Id: Id1d3a79d24e84b513f4ea35586cd2ab0437ff9b3
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4289
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-03-12 09:43:55 +00:00
Anton V. Kirilchik
69f0105324 Add target config for STM8S103 chip...
Change-Id: I693e5b7933fc61956010a96be57ee6eb8abd3c31
Signed-off-by: Anton V. Kirilchik <kosmonaffft@gmail.com>
Reviewed-on: http://openocd.zylin.com/5422
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-03-12 09:41:41 +00:00
Tarek BOCHKATI
a99bf2ea94 semihosting: reorganize semihosting commands
the same semihosting handlers chain is declared twice:
 1. in src/target/armv4_5.c
 2. in src/target/riscv/riscv.c

to make it simpler we moved the declaration into
'src/target/semihosting_common.c' under semihosting_common_handlers[].
then we used this into both of armv4_5.c and riscv.c

Change-Id: If813b3fd5eb2476658f1308f741c4e805141f617
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5473
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Liviu Ionescu <ilg@livius.net>
2020-03-10 20:20:22 +00:00
Tarek BOCHKATI
123e10288d flash/stm32h7x: fix bank sizes for devices with trimmed flash
STM32H7yxxI: dual independent 1 MByte banks
STM32H7yxxG: dual independent 512 Kbyte banks
STM32H7yxxB: single 128 Kbyte bank

where y = [4/5] or [A/B]

references: (documents are available in www.st.com)
 - STM32H7[4/5]x[G/I] : DS12110 Rev 7
    >> 3.3.1 Embedded Flash memory
 - STM32H750xB : RM0433 Rev 6
    >> Table 11. Flash memory organization on STM32H750xB devices
 - STM32H7[A/B]x[B/G/I] : RM0455 Rev 3
    >> 4.3.4 Flash memory architecture and usage


Change-Id: Ic9346964ef2554abf47f5832e25adfdc77bd323e
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5442
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
2020-03-10 20:18:47 +00:00
Marek Vasut
b304971f38 tcl/target: Unify Renesas R-Car JTAG reset config
Both Gen2 and Gen3 used the same init_reset{} implementation,
pull it into common file and include it from both generations.
Moreover, this behavior is SoC specific, not board specific,
so move the common init_reset into target/ directory.

Change-Id: I5489a4bff9a786da8cb7fd7a515b0c9ce9dc16e3
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5400
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-03-09 05:59:39 +00:00
Edward Fewell
82a5c55dc3 flash/nor: update support for TI MSP432 devices
Added fixes for issues found in additional code reviews.

Fixed host Endianness issues with using buffer reads
and writes instead of the *_u32 variants.

Changed code that tried to ID banks by hardcode
bank_number values to use instead the bank base
address. This fixes problems using configurations
with multiple devices.

Note that this replaces Change 4786 which has
been abandoned because of extensive changes to
the code to stop IDing banks by name.  And I
think I really messed up a rebase/merge on the
document file.

Tested on MSP432P401R, MSP432P4111, and MSP432E401Y
Launchpads.

Change-Id: Id05798b3aa78ae5cbe725ee762a164d673ee5767
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/5481
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-03-07 15:32:24 +00:00
luca vinci
e9932ef23d bluenrg-x: simplyfied the driver
Adopted only fast algorithm for flash programming:
- write_word and write_byte methods have been removed.
- start and end write alignments have been defined.
Moved flash controller registers offsets in a common file
shared with the flash algorithm.
- the flash base address is passed to the flash algorithm
  as a parameter.
Removed unused functions

Change-Id: I80aeab3994e477044bbcf02e66d9525dae0cb491
Signed-off-by: luca vinci <luca.vinci@st.com>
Reviewed-on: http://openocd.zylin.com/5393
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Michele Sardo <msmttchr@gmail.com>
2020-03-07 15:31:09 +00:00
luca vinci
6bc0a77a6e bluenrg-x: added support for BlueNRG-LP device
Extended bluenrg-x flash driver with BlueNRG-LP flash controller.
Changes include:
- register set for the flash controller
- made software structure prone to support more easily future devices
- updated target config file

Change-Id: I2e2dc70db32cf98c62e3a43f2e44a4600a25ac5b
Signed-off-by: luca vinci <luca.vinci@st.com>
Reviewed-on: http://openocd.zylin.com/5343
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-03-07 15:31:02 +00:00
Tomas Vanek
a2e822834d helper/binarybuffer: fix clang static analyzer warnings
Writing bits to an uninitialized buffer generated false warnings.
Zero buffers before setting them by buf_set_u32|64()
(do it only if bit-by-bit copy loop is used,
zeroed buffer is not necessary if a fast path write is used)

Change-Id: I2f7f8ddb45b0cbd08d3e249534fc51f4b5cc6694
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5383
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-03-07 15:30:05 +00:00
Tomas Vanek
4e981bc27c target/arm920t: fix clang static analyzer warning
Change-Id: I570dfb8b20a3f187f1fe660343cf0b75691e2c30
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5375
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-03-07 15:29:44 +00:00
Tomas Vanek
2ebedbdf38 rtos/linux: fix use of memory after it is freed
Discovered by clang static analyzer

Change-Id: I9f64a67f281b95562d8fd6e2ebb0ae3f79ae8039
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5371
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-03-07 15:29:37 +00:00
Tomas Vanek
b07604cc6a jtag/drivers/openjtag: fix clang static analyzer warnings
Change-Id: I900ce8157b3e220a4647871080bb9abc772446d1
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5369
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-03-07 15:29:24 +00:00
Tomas Vanek
6ff852e415 jtag/aice: fix clang static analyzer warnings
Change-Id: I6c801c2406cd117f2bcf930a5b329c441ab5f1ff
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5368
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-03-07 15:29:14 +00:00
Tomas Vanek
c84f75de81 flash/nor/numicro: use flash infrastructure to align write
The aligning code generated a clang static analyzer warning and
imposed huge memory leak. This part of code was removed and
flash infrastructure to alignment is used instead.

Not tested on hw!

Change-Id: I7c71da87547e71d595a7e7071ae5adcc1cecc827
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5367
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-03-07 15:29:03 +00:00
Tomas Vanek
e1051e1090 flash/nor/fm4,tms470: fix clang static analyzer warnings
Change-Id: I18c1501918d40453fea6aeeb6f035e46d41fc524
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5366
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-03-07 15:28:53 +00:00
Tomas Vanek
b852429500 src/flash/nor/at91sam3|4l|7: fix clang static analyzer warnings
Change-Id: I5cd2b2ebb2bd1980bdd1632b5c35bda9718a1089
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5365
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-03-07 15:28:40 +00:00
Marc Schink
122c80087c flash/nor/stm32f1x: Group and cleanup device list
Group device list based on the device family and add clear
device family names.

Change-Id: I7a2dab1d1c0c8d141df02656c1964cb2c3fcbcd1
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5423
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-03-07 15:28:01 +00:00
Marc Schink
51dd4ce6bb drivers: Rename 'libusb1_common' to 'libusb_helper'
The name 'common' does not make sense anymore. While at it,
remove some unnecessary #includes.

Change-Id: If9798a5cce179438d89428a598d8ca05c8e5f20c
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5434
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-03-03 09:12:02 +00:00
Marc Schink
93c6bf2cce drivers: libusb1_common code cleanup
Remove unncessary wrapper functions and 'jtag_' prefixes.

Change-Id: I0fd866ff1e1cf7386c4d58a808dfda2c1c0a1518
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5433
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-03-03 07:24:33 +00:00
Marek Vasut
8ce51b6a20 tcl/target: Drop old Renesas Gen2 SoC configs
Drop old Renesas Gen2 SoC configurations, as they were superseded by
the new unified config.

Change-Id: I7c2ccbdc13b01a552ce9cafdc1538f226beaa9f2
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5399
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-03-03 06:49:59 +00:00
Oleksij Rempel
8abe91cff9 remove libusb0_common support
Supporting two libusb versions provides additional development challenges
without additional advantage. In most cases we need to patch libusb0_common and
libusb1_common without real ability to test libusb0_common.

Change-Id: Icbb19c6809b14533fe2acf7a877377b3be4cbd61
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/5432
Tested-by: jenkins
2020-03-03 06:48:43 +00:00
Marek Vasut
a01474bb4c tcl/target: Switch Renesas R-Car Gen2 boards to new config
Switch Renesas R-Car Gen2 boards which are currently supported from
the old ad-hoc SoC configuration to the new unified configuration.

Change-Id: I8a67bceb3ae92d840ae4dbac20868c75e83f7d58
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5398
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-03-02 15:32:33 +00:00
Marek Vasut
3a8bffbef6 tcl/target: Add unified config for Renesas R-Car Gen2 targets
Add configuration for the Renesas R-Car Generation 2 targets.
These are SoCs with Cortex A15s and A7s. All cores currently
supported by OpenOCD are supported here as well as two new
cores, M2N and V2H, for the sake of support completeness.

Change-Id: Ib6fe70a91360b4f8bd69822ee28b6dea530cfa0a
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5397
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-03-02 15:32:27 +00:00
Marek Vasut
d55bcde16c tcl/target: Abort on invalid SoC selection on R-Car Gen3
Instead of printing error message and continue, abort on invalid SoC
selection right away.

Change-Id: I9c7a7111b590c6c49a0826562380b881a162a8dc
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5439
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-03-02 15:32:23 +00:00
Tarek BOCHKATI
0b7eca1769 flash/stm32h7x: add support of STM32H7Ax/H7Bx devices
this new device has the following features:
 - single core cortex-M7
 - 2MB flash - dual bank
    - page size 8k
    - write protection grouped by 4 sectors
    - write block size 128 bits (16 bytes)

the bit definition of FLASH_CR is different than STM32H74x,
that's why we introduced a helper to compute the FLASH_CR value

Change-Id: I4da10cde8dd215b1b0f2645f0efdba9d198038d1
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5441
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-03-02 15:13:00 +00:00
Michael Stoll
98ea23a7ff Add support for SAMD21E17D device
Change-Id: Id0a533f8899b20cc87e3a9143383ddf279c86301
Signed-off-by: Michael Stoll <michael.stoll@meadow-robotics.com>
Reviewed-on: http://openocd.zylin.com/5458
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-03-02 15:11:45 +00:00
Evgeniy Didin
39d54ee969 target/arc: fix clang static analyzer warnings
Fixes:
* Removed typo in *bitfields initializations.
* Removed potentional memory leak allocating
  reg_data_type_struct_field/reg_data_type_flags_field objects.
* Initialize buffers with "0" before usage in buf_set_u32().
* Removed memory leak in jim_arc_add_reg().

Change-Id: Iefde57cd4a48c4f3350c376475df8642607f52ff
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5480
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-02-29 15:58:21 +00:00
Evgeniy Didin
9ee9bdd2f9 Introduce ARCv2 architecture related code
This patch is an initial bump of ARC-specific code
which implements the ARCv2 target(EMSK board) initializing
routine and some basic remote connection/load/continue
functionality.

Changes:
03.12.2019:
-Add return value checks.
-Using static code analizer next fixes were made:
        Mem leak in functions:
                arc_jtag_read_memory,arc_jtag_read_memory,
                arc_jtag_write_registers, arc_jtag_read_registers,
                jim_arc_add_reg_type_flags, jim_arc_add_reg_type_struct,
                arc_build_reg_cache, arc_mem_read.
        Dead code in "arc_mem_read";
        In arc_save_context, arc_restore_context correct arguments
        in"memset" calls.
        In "build_bcr_reg_cache", "arc_build_reg_cache" check
        if list is not empty.

29.12.2019
-Moved code from arc_v2.c to arc.c
-Added checks of the result of calloc/malloc calls
-Reworked arc_cmd.c: replaced spagetty code with functions
-Moved to one style in if statements - to "if(!bla)"
-Changed Licence headers

22.01.2020
-Removed unused variables in arc_common
-Renamed register operation functions
-Introduced arc_deinit_target function
-Fixed interrupt handling in halt/resume:
        * add irq_state field in arc_common
        * fix irq enable/disable calls ( now STATUS32 register is used)
-Switched from buf_set(get)_us32() usage to target_buffer_set(get)_u32()
-Made some cleanup

30.01.2020
-Removed redundant arc_register struct, moved target link to arc_reg_desc
-Introduced link to BCR reg cache in arc_common for freeing memory.
-Now arc_deinit_target frees all arc-related allocated memory.
	Valgrind shows no memory leaks.
-Inroduced arch description in arc.c

01.02.2020
-Remove small memory allocations in arc_init_reg. Instead created reg_value
	and feature fields in arc_reg_desc.
-Add return value for arc_init_reg() func.
-Replaced some integer constants(61,62,63) with defines.
-Removed redundant conversions in arc_reg_get_field().
-Moved iccm/dccm configuration code from arc_configure()
	to separate functions.

19.02.2020
-Change sizeof(struct) to sizeof(*ptr) in allocations
-Changed if/while(ptr != NULL) to if/while(ptr)
-Removed unused variables from struct arc_jtag
-Add additional structs to arc_reg_data_type
 to reduce amount of memory allocations calls
 and simplifying memory freeing.
-Add helper arc_reg_bitfield_t struct which includes
 reg_data_type_bitfield object and char[] name. Reduces
 memory allocations calls.
-Add limit for reg_type/reg_type_field names(20 symbols).
-Add in jim_arc_add_reg_type*() functions additional
 argnument checks(amount of field/name size).
-In jim_arc_add_reg_type*() reduced amount of memory allocations.
-Cleanup of jim_arc_add_reg_type*() functions.
-For commands update ".usage" fields according docopt.
-Cleanup in arc_jtag.c
-Renamed functions which require jtag_exeutre_queue() to arc_jtag_enque_*()
-Add arc_jtag_enque_register_rw() function, which r/w to jtag ir/dr regs
 during regiter r/w.

24.02:
-Change include guards in arc* files according coding style
-Remove _t suffix in struct arc_reg_bitfield_t
-Some cleanup

Change-Id: I6ab0e82b12e6ddb683c9d13dfb7dd6f49a30cb9f
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Cc: Alexey Brodkin <abrodkin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5332
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-02-27 06:46:51 +00:00
Antonio Borneo
3bfe492663 coding style: doc: remove empty lines at end of text files
Empty lines at end of text files are useless.
Remove them.

Change-Id: I30e4d3d03c4ce846aa7bcefa7366f88732275557
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5170
Tested-by: jenkins
2020-02-24 10:31:29 +00:00
Antonio Borneo
6bac2828b2 coding style: testing: remove empty lines at end of text files
Empty lines at end of text files are useless.
Remove them.

Change-Id: Id05a7bd944edccaa03ed9eb48599b2e262664cf0
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5169
Tested-by: jenkins
2020-02-24 10:31:17 +00:00
Antonio Borneo
74634d177b coding style: tools: remove empty lines at end of text files
Empty lines at end of text files are useless.
Remove them.

Change-Id: Iea4c8425e137d6252fb2e5b62e0b124c73a01cb6
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5168
Tested-by: jenkins
2020-02-24 10:31:06 +00:00
Antonio Borneo
9d5767b6b0 coding style: add newline at end of text files
Some text file is missing newline at EOF.
Add it.

Change-Id: Ieebc790096f40961283c644642e56fde975e957f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5167
Tested-by: jenkins
2020-02-24 10:30:53 +00:00
Antonio Borneo
e7306d361b coding style: fix space around pointer's asterisk
The script checkpatch available in new Linux kernel offers an
experimental feature for automatically fix the code in place.
While still experimental, the feature works quite well for simple
fixes, like spacing.

This patch has been created automatically with the script under
review for inclusion in OpenOCD, using the command
	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types POINTER_LOCATION --fix-inplace -f {} \;
then manually reviewed.

OpenOCD coding style does not mention the space around pointer's
asterisk, so no check is enforced. This patch only makes the style
uniform across the files.

The patch only changes amount and position of whitespace, thus
the following commands show empty diff
	git diff -w
	git log -w -p
	git log -w --stat

Change-Id: Iefb4998e69bebdfe0d1ae65cadfc8d2c4f166d13
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5197
Tested-by: jenkins
2020-02-24 10:30:36 +00:00
Antonio Borneo
86d8c05eb6 log: let command "log_output" to set back its default
The default log output is stderr. After the command "log_output"
has been used to set an output log file, it is possible to return
back to stderr only on *NIX hosts specifying a new log output file
as "/dev/stderr", but this is not intuitive, not documented and
not portable out of *NIX.

Make command "log_output" able to set back the default output to
stderr when the parameter is either "default" or is missing.
While there, add debug message to log the change and make the
command return error on incorrect syntax.

Change-Id: I8c7c929780f58e2c23936737c8e7274a96734786
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5233
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-02-24 10:30:10 +00:00
Antonio Borneo
beb610555a adi_v5_dapdirect: fix connect under reset
Deassert the reset only if connect under reset is not required;
otherwise, assert the reset.
This fix aligns the behavior of connect under reset in dapdirect
with the behavior in jtag and swd.

Change-Id: I937ef4320b44e51ef6cb0e349e12348dbfbe4abb
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5415
Tested-by: jenkins
2020-02-24 10:28:46 +00:00
Marc Schink
066aa24e85 flash/nor/stm32l4x: Minor code cleanups
Change-Id: I3053bbe888ac1f0a0593ef51bf9ca564f1cc27ec
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5449
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-02-24 10:26:02 +00:00
Marc Schink
98e9d96239 flash/nor/stm32h7x: Minor code cleanups
Change-Id: Ia212b1877abeda27f507de29a3aee2b171c1b8c6
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5448
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
2020-02-24 10:25:52 +00:00
Mara Bos
608105dff8 Support bitbanging on 64-bit ARM CPUs.
The configure.ac file restricted this to only 'arm' CPUs, but
${host_cpu} is 'aarch64' (not 'arm') for 64 bit ARM CPUs.

Tested on a Raspberry Pi compute module 3.

Change-Id: I6cb1d7e7fadc51dbb12419176f1faf0a0cb0b228
Signed-off-by: Mara Bos <m-ou.se@m-ou.se>
Reviewed-on: http://openocd.zylin.com/5274
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-02-24 10:25:41 +00:00
Tarek BOCHKATI
22df29eee8 tcl/board: update ST NUCLEO-H745ZI-Q configuration file to use dapdirect
this board embeds and STLINK DAP capable firmware

Change-Id: I276e9f44ad6cf7d1ff664898bbc884676bdbc967
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5316
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-02-23 21:37:30 +00:00
Tomas Vanek
35f846fd52 target/adi_v5_swd: fix clang static analyzer warning
Change-Id: I24b3e74b62fad469e3150ad97a10a9ab69c2793b
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5374
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-02-23 21:36:36 +00:00
Tarek BOCHKATI
1ef468edc5 flash/nor/tcl.c: add filld command to write double-word with 64-bit value
Change-Id: I2eeda7af7d855ed1284083d025994f8fa9531969
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5443
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-02-23 21:33:58 +00:00
Tomas Vanek
61ef89ce4b flash/nor/stm32l4x: lock flash after error
Also add locking after option write, it was missing at all.

Change-Id: I0227c6a74866f0fe8e40aa58616f0b3115ad5af0
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5361
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-02-23 21:33:25 +00:00
Leonard Crestez
da181fc3ec tcl/board: Add imx8mp-evk
Board includes an internal adapter (interface/ftdi/imx8mp-evk.cfg) and a
standard external ARM-10 connector.

Change-Id: Ibb301011665b1edfb95be1213d8100143f6839dd
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-on: http://openocd.zylin.com/5427
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-02-23 21:32:37 +00:00
Leonard Crestez
4617630456 tcl/interface/ftdi: Add imx8mp-evk internal JTAG interface
The imx8mp-evk board has a FT4232H chip connected to the chip's JTAG
pins.

Switching between this on-board interface and the external ARM-10
connector is controlled by an GPIO which is behind an i2c expander
connected to the same FTDI chip.

Switching can be performed using the NXP bcu tool:

	https://github.com/NXPmicro/bcu

Change-Id: Ic910515f76eaf09ea6d0f755b026fb09cf09ccfc
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-on: http://openocd.zylin.com/5426
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-02-23 21:32:30 +00:00
Christopher Head
a6dacdff58 flash/stm32h7x: use alignment infrastructure
Report the 32-byte alignemnt requirement via the bank structure rather
than enforcing it ad-hoc in the write routine. This allows people to do
non-32-byte-aligned writes if they want, with the infrastructure fixing
up the addresses passed to the low-level driver.

Change-Id: I2c4f532f2000435954a900224dbc9f2c30d1cc94
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5388
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-02-23 12:38:38 +00:00
Marc Schink
2a60ae7fee flash/nor/stm32f1x: Some small code cleanups
Change-Id: I1fc08b96b179a1376af233b713ae50d6ad7867a0
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5404
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-02-23 12:28:29 +00:00
Christopher Head
a08d7b7093 flash/nor/stm32h7x: check OPTCHANGEERR
Without this, a failed attempt to change option bytes will silently
appear to succeed but without actually changing the option bytes
(confusingly, the option bytes will still read back as if they had been
changed until a reboot as well!).

Change-Id: Id529c6c384a8a16be75f5702310670d99d8fac79
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5418
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-02-23 12:27:35 +00:00
Christopher Head
f1f1f3fe1f flash/nor/stm32h7x: fix incorrect array indexing
Change-Id: Iec2246df284953d1442dfefdad8e70041690dfe2
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5417
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-02-23 12:26:45 +00:00
Antonio Borneo
ee56c50260 stlink: add trace support in DAP direct mode
Reuse the existing tracing functionality of HLA mode to support
tracing in DAP direct mode.

Change-Id: I75a01e88ba5d3e45717e4108b99697ac3225db9e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5409
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-02-15 15:39:16 +00:00
Antonio Borneo
5481401514 armv8: check the core state to pass the correct arch to gdb
Commit 3799eded67 ("target/aarch64: add support for
multi-architecture gdb") passes the constant string "aarch64" as
architecture to gdb. This is not working if the core is running
in 32 bits mode; gdb reports:
	Truncated register 8 in remote 'g' packet
then closes the connection with OpenOCD.

Make the architecture string dependant from the current state of
the core.

Change-Id: I16e1614ea02ba29bf87f450b3dfe25c83c9a3612
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5234
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
2020-02-15 15:38:39 +00:00
Antonio Borneo
1492a103db coding style: use ARRAY_SIZE() when possible
We have the macro ARRAY_SIZE() already available. Use it!

Issue identified by checkpatch script from Linux kernel v5.1 using
the command

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types ARRAY_SIZE -f {} \;

Change-Id: Ic7da9b710edf118eacb08f9e222f34208c580842
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5198
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-02-15 15:37:40 +00:00
Antonio Borneo
8105c46ba5 coding style: remove unnecessary parentheses
Identified by checkpatch script from Linux kernel v5.1 using the
command

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types UNNECESSARY_PARENTHESES -f {} \;

then fixed manually.

Change-Id: Ia2d9a0953d9b89fc87dc1195aa05c7f63c068c48
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5196
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-02-15 15:37:20 +00:00
Antonio Borneo
def7318edd jtag/startup.tcl: remove trailing whitespaces
Change-Id: I1d6f4f47ee6f8985c84ddb2647e029c5f4e6a55a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5194
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
2020-02-15 15:37:06 +00:00
Antonio Borneo
b5c883f298 target/nds32: fix type of magic number
The macro NDS32_COMMON_MAGIC was cast-ed to int to avoid compile
time error for comparison type mismatch while comparing it with
the field common_magic.
This is incorrect because the macro value is a 32 bit unsigned
value; better changing the type of the field common_magic to keep
the unsigned value.

Issue identified by checkpatch script from Linux kernel v5.1 using
the command

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types TYPECAST_INT_CONSTANT -f {} \;

Change-Id: Ib5924b6cecdffe70ab5c78d3b30a9c8e4deb7c7b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5193
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-02-15 15:36:56 +00:00
Marc Schink
9cf7dff974 flash/nor/stm32lx: Minor code cleanups
Change-Id: I6440a4eb1f65a2f8ae2914b38f21a59955e85e0d
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5438
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-02-15 15:34:01 +00:00
Jan Matyas
4882acef80 jtag_vpi: added an option to stop simulation on exit
Command CMD_STOP_SIMU had been defined in jtag_vpi for a long time
(since the beginning?) but has not been utilized until now.
Its purpose is to signal to the jtag_vpi server (i.e. the RTL
simulation software) that the simulation shall be stopped.

This commit adds a TCL configuration command that selects whether
CMD_STOP_SIMU will be sent to the jtag_vpi server when OpenOCD is
about to exit. This functionality is off by default to maintain
identical behavior as in previous OpenOCD versions, unless the user
enables it explicitly.

Change-Id: If3894af6efa61038ccf6c9191f664e2128f2ef11
Signed-off-by: Jan Matyas <matyas@codasip.com>
Reviewed-on: http://openocd.zylin.com/5407
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-02-15 15:32:53 +00:00
Piotr Kasprzyk
e8c747048f Include start-of-region address
When $ADDRESS == $BASE that address used to be excluded.

After this commit $ADDRESS == $BASE is within the range.

Now the rule for "iswithin" is:
$BASE <= $ADDRESS < ($BASE + $LEN)

Thanks to Antonio Borneo <borneo.antonio@gmail.com> for noticing this.

Change-Id: I74373c6010e069372d886fa7ecd8120892616834
Signed-off-by: Piotr Kasprzyk <ciri@ciri.pl>
Reviewed-on: http://openocd.zylin.com/4799
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-02-15 15:30:55 +00:00
Tarek BOCHKATI
0a11537b32 flash/stm32lx: mention explicitly that this driver covers STM32 L0 and L1
this is to avoid confusion with STM32 L4, L4+ and L5 families

also:
 - a warning message is changed to error
 - stm32l0x and stm32l1x aliases has been created to permit
   the usage of either names

Change-Id: If3f16d2a3b7d1369959aa7407da37a9076ea91d7
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5437
Reviewed-by: Marc Schink <dev@zapb.de>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-02-13 20:21:24 +00:00
Tarek BOCHKATI
6dfcc3f5a5 flash/startup.tcl: update stm32 flash driver aliases
This will enable us to use either name when calling flash driver commands.

For example the stm32wbx family use the same flash driver as the stm32l4x, so
the user has to use 'stm32l4x lock 0' which can be confusing.
Now the user can also use 'stm32wbx lock 0' with the same result.

Change-Id: Ic0d8da9afc202d7cc82d9b9949827e958a1cc824
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5436
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-02-13 20:18:51 +00:00
Marek Vasut
853a05287c jtag: Fix copy-paste error in 'irscan' help
Replace "Instruction Register (DR)" with "Instruction Register (IR)",
that is sed "s@DR@IR@", which was likely a copy-paste error.

Change-Id: I3e625872c855d655485b3efa5f50fe1c00ecbf52
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5446
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2020-02-09 20:06:32 +00:00
Marc Schink
b27173d563 tcl: Remove executable bit
Change-Id: Ib452435b13c3cb8d14453d983151936238b9601d
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5419
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-02-08 23:27:18 +00:00
Frank Hunleth
d51cec275c efm32: add EFR32ZG13P and EFR32ZG14P parts
This adds the EFR32 Zen Gecko Family parts. The device family values are
found in table 4.7.11 of
https://www.silabs.com/documents/public/reference-manuals/efr32xg14-rm.pdf.

Change-Id: I3858b7ba815784b1150e2214a2833e8ff7d249e1
Signed-off-by: Frank Hunleth <fhunleth@troodon-software.com>
Reviewed-on: http://openocd.zylin.com/5364
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
2020-02-08 23:24:00 +00:00
Antonio Borneo
324a45e029 stlink: fix max packet size for 8 bit R/W on stlink-v3
While ST internal documentation for STLINK-V3 reports that 8 bits
read/write commands handle 512 bytes of data, a firmware bug makes
it crashing on high data size.
This is fixed with firmware V3J6 (shipped together with V2J36).

Check for firmware version to use the proper data size.

Change-Id: Iaba6cd26bbe130097c1c19de610680e0e8b69bfc
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: https://sourceforge.net/p/openocd/tickets/259/
Reviewed-on: http://openocd.zylin.com/5408
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-02-08 09:13:44 +00:00
Antonio Borneo
7da165a11f jtag: flush jtag queue after jtag_add_tlr()
If the TLR sequence is sent as result of the command "adapter
assert trst" while polling is off, the TLR sequence is not sent out
until a following jtag operation.

Flush the jtag queue before return.

Change-Id: I20efd7137cb7b1d1c4f73c1362cbe4e57aeaae49
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5405
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-02-08 09:12:54 +00:00
Christopher Head
7d6156fae8 Switch to HTTPS for submodules
repo.or.cz already redirects HTTP requests to HTTPS. There is therefore
no possible benefit to keeping the submodule URLs using HTTP—anyone who
can’t access via HTTPS will fail anyway, immediately after the redirect.
Changing the submodule URLs eliminates one unnecessary HTTP request and,
more importantly, eliminates SSLStrip-style attacks.

Change-Id: I9faf1ec8aa87bcfd1acafe2c445a0baf2abfbd09
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5406
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-02-08 09:12:14 +00:00
Antonio Borneo
095809648b tcl: fix remaining scripts after rework adapter commands
Some script have been added or modified after the patches for
reworking the adapter commands were pushed in gerrit.
Such scripts use the old command syntax and trigger a "deprecated"
warning at runtime.

Fix them with the same sed commands used for the other scripts:
	sed -i 's/^interface /adapter driver /' $(find tcl/ -type f)
	sed -i 's/adapter_khz/adapter speed/g' $(find tcl/ -type f)
	sed -i 's/adapter_nsrst_delay/adapter srst delay/g' $(find tcl/ -type f)
	sed -i 's/adapter_nsrst_assert_width/adapter srst pulse_width/g' $(find tcl/ -type f)

Change-Id: I0824d6c506a9af3eb9129b74c02a92b4eb1b100d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5424
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
2020-02-06 21:15:55 +00:00
Andreas Fritiofson
b4dc073881 tcl: Add interface config for isodebug isolated JTAG/SWD+UART
Currently only used internally at Unjo.

Change-Id: I7786e95e1bd755a73156ecad5b6d7f6273d8ddef
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/5251
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-02-06 21:00:44 +00:00
Antonio Borneo
d91e19eb16 jtag: drivers: xlnx-pcie-xvc: fix build on Linux pre v4.10
The macro PCI_CFG_SPACE_EXP_SIZE is exposed to userspace from
Linux kernel v4.10, with commit cc10385b6fde ("PCI: Move config
space size macros to pci_regs.h")
http://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=cc10385b6fde

Define the macro in the driver code, if not already defined.

Change-Id: I610219a2587eff2c142102b9f7830e3da882af78
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5435
Reviewed-by: Moritz Fischer <moritzf@google.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Tested-by: jenkins
2020-02-06 20:22:49 +00:00
Marek Vasut
c2e2deb4dd flash/nor: Add Renesas RPC HF driver
Add driver for the RPC block in HF mode on Renesas R-Car Gen3 SoCs.
This driver allows operating the on-SIP HF memory.

Note that HF is CFI compliant flash, but it is not memory mapped,
hence the need to replace all the memory accessors and read/write
functions. The write function is entirely replaced to increase
performance and is Spansion/AMD specific, since there is no known
SIP with other HF from another vendor.

Add the following two lines to board TCL file to bind the driver on
R-Car Gen3 SoC using HyperFlash:

  set _FLASHNAME $_CHIPNAME.flash
  flash bank $_FLASHNAME rpchf 0x08000000 0x4000000 2 2 $_CHIPNAME.a57.0

Change-Id: Ie18729d017eeb46e1363333ffe002d010dfc5ead
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5149
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-02-06 17:15:21 +00:00
Marek Vasut
25f5a8f6be flash/nor: Export various functions from the CFI core
Export various functions needed by other driver, specifically the
upcoming Renesas RPC HF driver. No functional change.

Change-Id: I551258979a7221288fb4f4382f857db5cfe0b0de
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5148
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-02-06 17:15:16 +00:00
Leonard Crestez
09ac9ab135 jtag: Fix jtag_reset fallback
The fallback provided for the jtag_reset command always fails with a
strange message: 'Error: invalid command name "de"'

This is caused by incorrect quoting inside the warning message.

Fixes: c07b774e8f ("jtag: replace command "jtag_reset" with "adapter [de]assert"")

Change-Id: Icd47fca2b5a7b33474bfb0040e88193a0968f301
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-on: http://openocd.zylin.com/5416
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-29 10:06:58 +00:00
Antonio Borneo
38ac08c1c2 tcl: replace the deprecated commands with "adapter ..."
Avoid annoying "deprecated" messages while running the scripts
distributed with OpenOCD code.
Change automatically created with commands
	sed -i 's/adapter_khz/adapter speed/g' $(find tcl/ -type f)
	sed -i 's/adapter_nsrst_delay/adapter srst delay/g' $(find tcl/ -type f)
	sed -i 's/adapter_nsrst_assert_width/adapter srst pulse_width/g' $(find tcl/ -type f)

Minor indentation issue fixed manually in
	tcl/board/at91sam9g20-ek.cfg
	tcl/target/at91sam9260_ext_RAM_ext_flash.cfg

Change-Id: I425fd56c0c88cd6b06124621306eeb89166dfe71
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5284
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-29 06:34:43 +00:00
Antonio Borneo
0d598535a3 doc: replace example command "interface" with "adapter driver"
Keep documentation consisted after commands renaming.

Change-Id: I97b43887cae9d7c224b07e4ba0b7d04915a19fc4
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5285
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-29 05:37:05 +00:00
Antonio Borneo
2aa2ed1d8a tcl: replace command "interface" with "adapter driver"
Avoid annoying "deprecated" messages while running the scripts
distributed with OpenOCD code.
Change automatically created with command
	sed -i 's/^interface /adapter driver /' $(find tcl/ -type f)

Change-Id: I2291dfb96e164beecbeb3366ce83f9df2ad6c197
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5283
Reviewed-by: Marc Schink <dev@zapb.de>
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-29 05:36:56 +00:00
Antonio Borneo
291d1511aa openocd: fix minor inconsistencies after renaming "adapter" command
Replace in the code any reference to the deprecated commands.

Change-Id: I75d28064017d664990b4024967900f32e196230a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5282
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-29 05:36:30 +00:00
Oleksij Rempel
70babcc00b move ftdi_location deprecation helper to proper place
Change-Id: I927d4e918acbf321aea1dd7a8de95fbaa8fbbbf0
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/5278
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-01-29 05:35:36 +00:00
Oleksij Rempel
5280eb618a jtag: adapter: rework adapter related commands
currently we have different types of same command group:
- starting with adapter_*
- starting with interface*
- without adapter or interface prefix.

Since interface name is already used, we can only use "adapter" command
group by keeping old commands as well.

Change-Id: Id0a1cb63a2ea6860c67ae1e7a3a06a37ddf464f4
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-on: http://openocd.zylin.com/4774
Reviewed-by: Marc Schink <dev@zapb.de>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-29 05:33:39 +00:00
Tomas Vanek
e7e681ac2b flash/nor/stm32l4x: fix minor errors in flash write/async algo
Fix comment of tested errors in asm src.

List all relevant errors in FLASH_ERROR mask: FLASH_PROGERR was missing
and any trial to re-program already programmed double word ended up
in the error bit held uncleared and flash write permanetly repeating
the error message until reset.

Lock the bank also after unsuccesfull write_block run.

Set async target algo block size to size of double word.

Remove warning in case of write_block success. In case of error
use LOG_ERROR instead of warning.

Change-Id: Ibf6d5e306a4c2eaa43de67d636b4902c737f02f3
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5360
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-01-27 17:03:40 +00:00
Tomas Vanek
c2cb4e40b8 flash/nor/stm32l4x: use flash infrastructure to align write
The original code paded the write chunk with random bytes by overrunning
the buffer. An user can easily regard the random bytes to
be a programming error.

Change-Id: Ib0f47b5bc406bc6a7c32f3d929bf324a17c7c1e1
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5359
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-01-27 16:59:57 +00:00
Marc Schink
634e09f4e7 tcl/board: Add config for STM32WB Nucleo board
Change-Id: Ic29802306c706bcf3e261c60facd01d101c9e1ce
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5358
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Ilya Kharin <akscram@gmail.com>
2020-01-27 16:59:21 +00:00
Tomas Vanek
dc95dd036f target/arm_cti: fix regression from Tcl_return_values series
Since commit 7f260f5009 native OpenOCD
command handlers should not directly use Jim_SetResult functions.
The Tcl result of a native command is built as concatenation of
command_print() strings and Jim_SetResult() is called after return
of the command handler.

Replace "wrong number of args" error messages (now not delivered to user)
by simply return ERROR_COMMAND_SYNTAX_ERROR

Change-Id: I40c1374a13859cefbdef68e0f1c13ab93538bd50
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5363
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-01-27 09:19:17 +00:00
Marek Vasut
ddbd8dcf91 flash/nor/nrf5: Fix build error on OSX
The chip->hwid is uint32_t , fix the print format.
This was detected by TravisCI on OSX, where this triggers a build error.

Change-Id: I776a7bb50e396c8fccc24500dec4750190da7982
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5401
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Ilya Kharin <akscram@gmail.com>
2020-01-27 09:16:49 +00:00
Antonio Borneo
60aaf14837 jtag: drivers: xlnx-pcie-xvc: fix build after merge
Commit [1] was submitted in gerrit well before the conflicting
commit [2] get merged in master branch. While it was fine
committing in master branch [1] alone, it should not be
committed "as is" after [2].
Unfortunately gerrit did not complained committing [1] after [2].
The result is that master branch does not build anymore when the
driver xlnx-pcie-xvc is enabled at configure time by the optional
flag --enable-xlnx-pcie-xvc.

Apply to the driver the required changes as in [2].
While there, remove the duplicated struct xlnx_pcie_xvc_transports
and the struct field already implicitly initialized to zero.

[1] ff6d0704ec ("jtag: drivers: xlnx-pcie-xvc: Add support for
    Xilinx XVC/PCIe")
[2] efd1d64222 ("adapter: switch from struct jtag_interface to
    adapter_driver")

Change-Id: I5498479b802a231afbee1b845ae9775e1da7c728
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5402
Reviewed-by: Moritz Fischer <moritzf@google.com>
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-01-22 12:49:59 +00:00
Marek Vasut
8b72657001 flash/nor/sh_qspi: Add SH QSPI driver
Add driver for the SH QSPI controller. This SPI controller is often
connected to the boot SPI NOR flash on R-Car Gen2 platforms.

Add the following two lines to board TCL file to bind the driver on
R-Car Gen2 SoC and make SRAM work area available:

  flash bank flash0 sh_qspi 0xe6b10000 0 0 0 ${_TARGETNAME}0 cs0
  ${_TARGETNAME}0 configure -work-area-phys 0xe6300000 -work-area-virt 0xe6300000 -work-area-size 0x10000 -work-area-backup 0

To install mainline U-Boot on the board, use the following procedure:

  proc update_uboot {} {
    # SPL
    flash erase_sector 0 0x0 0x0
    flash write_bank 0 /u-boot/spl/u-boot-spl.bin 0x0
    # U-Boot
    flash erase_sector 0 0x5 0x6
    flash write_bank 0 /u-boot/u-boot.img 0x140000
  }

Change-Id: Ief22f61e93bcabae37f6e371156dece6c4be3459
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
---
V2: - Add Makefile and linker script for the SH QSPI IO algorithm
    - Include the algorithm code instead of hard-coding it
Reviewed-on: http://openocd.zylin.com/5143
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-22 05:50:20 +00:00
Oleksij Rempel
d612baacaa jtag_libusb_bulk_read|write: return error code instead of size
A USB bulk write/read operation may fail with different errors:
 LIBUSB_ERROR_TIMEOUT if the transfer timed out (and populates transferred)
 LIBUSB_ERROR_PIPE if the endpoint halted
 LIBUSB_ERROR_OVERFLOW if the device offered more data, see Packets and overflows
 LIBUSB_ERROR_NO_DEVICE if the device has been disconnected
 another LIBUSB_ERROR code on other failures

Current OpenOCD code is using the transfer size based error detection.
Which may not always work. For example for LIBUSB_ERROR_OVERFLOW as libusb
documentation says:
"Problems may occur if the device attempts to send more data than can fit in
the buffer. libusb reports LIBUSB_TRANSFER_OVERFLOW for this condition but
other behaviour is largely undefined: actual_length may or may not be accurate,
the chunk of data that can fit in the buffer (before overflow) may or may not
have been transferred."

This patch is refactoring code to use actual error return value for
error detection instead of size.

Change-Id: Iec0798438ca7b5c76e2e2912af21d9aa76ee0217
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-on: http://openocd.zylin.com/4590
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-22 05:33:31 +00:00
Jiri Kastner
f98099507f mips_ejtag: there is no DCR.MIPS64 bit
available revisions (2.60, 3.10, 5.06 and 6.10) of
MD00047 (EJTAG specification), have only in IMPCODE
MIPS32/MIPS64 bit/flag.

Change-Id: If9191b6ced760c59bb7551bb041cd72b0a060bb1
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-on: http://openocd.zylin.com/4628
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
2020-01-20 06:28:49 +00:00
Moritz Fischer
ff6d0704ec jtag: drivers: xlnx-pcie-xvc: Add support for Xilinx XVC/PCIe
Add support for Xilinx Virtual Cable over PCIe JTAG controller.
It is commonly used in Xilinx based PCI Express designs with JTAG IP
in the FPGA fabric.

Access to the JTAG registers happens via the PCI Express extended
configuration space.

This can be used to debug soft-cores instantiated in the FPGA fabric.

The clang static checker doesn't find any new problems with this change.

Change-Id: Ib12ede0d1f26dacfda808d5e05b947b640c5bde7
Signed-off-by: Moritz Fischer <moritzf@google.com>
Reviewed-on: http://openocd.zylin.com/5314
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Marex
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-17 05:21:29 +00:00
Marek Vasut
f22883e8c1 flash/nor: Rename flash_address() to cfi_flash_address()
This is a preparatory change, align the function name with the rest
of the API, no functional change.

Change-Id: I6a810d2a54edcd13ad9a87d24a7334802c41623b
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5391
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-16 12:26:23 +00:00
Marek Vasut
76de1c8de1 flash/nor: Rename get_cfi_info() to cfi_get_info()
This is a preparatory change, align the function name with the rest
of the API, no functional change.

Change-Id: Ib967520f027b03eb1792b36ede52335df8e23941
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5390
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-16 12:26:16 +00:00
Marek Vasut
3192717ae9 flash/nor: Allow CFI memory read/write functions be overriden
Add possibility to supply custom CFI memory accessors via cfi_info
and override the default memory-mapped ones.

Change-Id: I1b6bc1db69fc33e8cdef96c41742c40e6d8917e9
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5147
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-16 12:26:03 +00:00
Marek Vasut
515a30f720 flash/nor: Drop size argument of cfi_target_{read,write}_memory()
The size argument is always set to bank->bus_width and bank pointer
is now passed into cfi_target_{read,write}_memory(), so the size
can be accessed through the bank pointer inside the function instead
of being explicitly passed in.

Change-Id: I0abc1cc3bf513281c10cb5de7a21cb0e75cb7676
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5389
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-16 12:25:53 +00:00
Marek Vasut
f83ce0a2ef flash/nor: Pass flash_bank to memory accessors
Replace passing in struct target with passing in struct flash_bank,
so that the later can contain function pointers to custom per-driver
memory accessor functions.

Change-Id: Id2573a6d5f1a73ed9c4f73c53592a9a335a11c99
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5146
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-16 12:25:44 +00:00
Tomas Vanek
7fffa3cbc6 target/xscale: remove duplicated command
Reported by clang static analyzer.

Change-Id: I893af10852af4885507ed62d024008159a80dd56
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5382
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-16 09:46:38 +00:00
Tomas Vanek
af0dda8266 target/etm: add check for calloc error
and fix one more clang static analyzer warning.

Change-Id: I17f03e318e1cf7617e7f753e7ca960552be547e5
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5381
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-16 09:46:27 +00:00
Tomas Vanek
fe6bb7eac8 target/semihosting_common: fix minor memory leak
Reported by clang static analyzer.

Change-Id: Ie663f49d92588c0d8b502cfdd8fc34004b308066
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5380
Reviewed-by: Liviu Ionescu <ilg@livius.net>
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-16 09:46:12 +00:00
Tomas Vanek
57afa176ce target/target: fix clang static analyzer warnings
Change-Id: I23e6586be60915f21a7179a994a1ec93fb9b2c36
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5379
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-16 09:45:58 +00:00
Tomas Vanek
b04d9c05f0 target/avr32_jtag: fix error returns
Fixed only 2 error returns discovered by clang static analyzer.
There are obviously many more missing error tests in avr32_jtag.c
These was not fixed to keep this change minimal.
Not tested with hw.

Change-Id: I6c79f6248db774990ddb42c0dacdb621651ed69e
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5378
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-16 09:45:37 +00:00
Tomas Vanek
8bb1998e6a target/arm_dpm: add missing error returns
Discoverd by clang static analyzer.

Change-Id: I93d5de0a36216e62b170fe8cc870431226a7777f
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5377
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-16 09:45:30 +00:00
Tomas Vanek
5dd5cf26bd target/arm946e: add missing error detection
Discoverd by clang static analyzer.
While on it remove useless type casts from arm946e_read_cp15() parameter.

Change-Id: I549e19685b431400243800ee0f7d1bbe6cdb14b4
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5376
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-16 09:45:19 +00:00
Tomas Vanek
98a8b99ef3 server/server: fix clang static analyzer warning
Change-Id: I317e189b62540e3688a20d88a95f551280317f14
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5373
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-16 09:44:49 +00:00
Tomas Vanek
35d9bf9917 xsvf: fix memory leak
Discovered by clang static analyzer.

Change-Id: I2980586aea5ee43226adb1f4cf72e7ba1dfddd83
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5372
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-16 09:44:33 +00:00
Tarek BOCHKATI
251eb035fc flash/nor/stm32l4x: add support of STM32L4P5/L4Q5x devices
STM32L4P/Q devices have:
 - similar flash layout as STM32L4R/S devices
 - 1024K of flash memory (some parts have 512K only)

tested on NUCLEO-L4P5ZG using board/st_nucleo_l4.cfg

Change-Id: I77047351bc7dcd7c76d0f31a77be73005104a06f
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5392
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-16 09:41:35 +00:00
Tarek BOCHKATI
a6a642bf72 flash/nor: add support of STM32WB on top STM32L4 flash driver
Change-Id: I9fb6700085d817d35a691f6484193f67939a4e0f
Signed-off-by: Laurent LEMELE <laurent.lemele@st.com>
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/4933
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-16 09:38:52 +00:00
Tarek BOCHKATI
8536306b6e flash/nor: add support of STM32L41/L42xx
tested using STM32L412KB

Change-Id: I1e2ae93d8c740db219f0fb579940de7f2fffac15
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/4934
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-16 09:36:33 +00:00
Tarek BOCHKATI
cc85ebc5ac flash/nor/stm32l4x : add structure containers to hold devices' information
This rework is inspired from the 'flash/nor/stm32h7x.c'
This rework will ease the support of new devices on top of this driver:
  for example: STM32WB have different flash base and size addresses

Notes:
 - stm32l4_probe modified in order to charge the correct part_info from
   the defined stm32l4_parts according to the device id
 - stm32l4_flash_bank.bank2_start is replaced by .part_info->bank1_sectors
 - STM32_FLASH_BASE is removed , part_info->flash_regs_base will be used instead
   based on that flash register addresses are changed to offsets,
   >> stm32l4_get_flash_reg was modified accordingly
 - stm32l4_read_option and stm32l4_write_option was modified to accept an
   offset instead of an absolute address, luckily this is the commands'
   argument by default
 - stm32l4_mass_erase modifications :
     - use MER2 only on top of dual bank devices
     - wait for BUSY bit before starting the mass erase

Change-Id: Ib35bfc3cbadc76bbeaaaba9005b82077b9e1e744
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/4932
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
2020-01-16 09:34:42 +00:00
Christopher Head
ed8fa09cff target/target: parse value as proper type
The `value` variable is passed into `target_fill_mem` as its
second-to-last parameter. That parameter is of type `uint64_t`. It is
appropriate to parse the value as that type, since otherwise a target
with a 32-bit address space but 64-bit data write capabilities would not
be able to exercise those capabilities.

Change-Id: Ib336d47d42c27cd2b5ba1206b04e8f740f167dba
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5219
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2020-01-14 11:41:11 +00:00
Antonio Borneo
d2308da6e9 stlink: fix handling of DPv1 and DPv2 banked registers
Arm DPv1 and DPv2 support banked registers by setting the bank in
field DPBANKSEL of register DP_SELECT.
Old ST-Link firmware don't support banked registers and setting a
bank other than bank zero on DPv1 or DPv2 cause issues in the
firmware because it cannot set back bank zero to read CTRL/STAT.
New ST-Link firmware mask away DPBANKSEL bits while writing in
DP_SELECT but support banked register using the same packed method
used by OpenOCD:
	#define BANK_REG(bank, reg) (((bank) << 4) | (reg))

Add a new macro STLINK_F_HAS_DPBANKSEL for firmware that support
arm DPv1 and DPv2, plus trigger an error if banked registers are
requested on old firmware.
Prevent changing DPBANKSEL on old firmware.
Log a debug message when changing DPBANKSEL will be ignored.

Change-Id: Iaa592517831d63f8da2290db54f6b32504e3081b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4978
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-14 11:40:45 +00:00
Antonio Borneo
944d3e6771 stlink: add DAP direct driver
STLINK-V3 and the new firmware V2J24 for ST-LINK/V2 provide API
to directly access the DAP registers.
This mode permits to use the native target in cortex_m.c, with no
need to override it with the target in hla_target.c.
Other advantages wrt HLA are: support for Cortex-A cores, support
for SoC multi-core and/or multi AP, support for OpenOCD commands
"dap" thus including control of CSW.
This obsoletes the existing HLA driver for ST-Link, that should
anyway be kept for those cases where it's not possible to update
the ST-Link firmware.

This commit introduces the minimal implementation for direct DAP
access. The implementation is much slower than the HLA because
every memory transfer requires several USB packets. Further
commits will close the performance gap.
The whole ST-Link driver is compiled under BUILD_HLADAPTER, to
remove the need to split the driver between the two modes. This
has to be reworked, but it's quite invasive!
A new interface file stlink-dap.cfg is added and should be used
in place of stlink.cfg to enable the DAP mode.
Documentation is updated and reports limitation on the maximum AP
number that can be accessed by ST-Link for some firmware already
tested.

Change-Id: I932ffe16bc81d00b1fe489e2944fda13470cce9b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4904
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-14 11:40:36 +00:00
Antonio Borneo
a61ec3c1d7 adi_v5_dapdirect: add support for adapter drivers that provide DAP API
Some high level adapters, like STLINK-V3 and new firmware for
ST-Link/V2, provide API to directly access the DAP registers
hiding the details of the physical transport JTAG or SWD.
OpenOCD has already the intermediate API in struct dap_ops that
are suitable for such adapters, but are not exposed to the
adapter drivers.

Add in struct adapter_driver two independent struct dap_ops for
the cases of physical JTAG and SWD transport.
Add new transport names "dapdirect_jtag" and "dapdirect_swd", to
be used by the drivers that provide one or both DAP API.
Add the necessarily glue in target/adi_v5_dapdirect.c

Change-Id: I2bb8e3a80fba750f2c218d877cfa5888428e3c28
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4903
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-14 11:40:25 +00:00
Antonio Borneo
c6b6fdeb2c TODO: add restructuring of JTAG/adapter layer
SWD is already implemented, so remove the item.
Rename the section JTAG as Adapter, including the subsections.
Add an initial list of pending activities after the restructure
of the JTAG layer.

Change-Id: I540777344c62a746df8347538fe8b29e4d72e1c7
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4901
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-14 11:39:44 +00:00
Antonio Borneo
efd1d64222 adapter: switch from struct jtag_interface to adapter_driver
To reorganize the adapters code, introduce an adapter_driver
struct that contains all the adapter generic part, while
keeping in two separate struct the specific API jtag_ops and
swd_ops.
Move the allocation of *adapter_driver from the JTAG-specific
file core.c to the more adapter-specific file adapter.c
While splitting the old jtag_interface for every driver, put
the fields in the same order as in the struct declaration so
we keep a consistent code across all the drivers.

While other transport specific API could/would be added as
separate ops, nothing is done here for HLA.

Change-Id: I2d60f97ac514c0dd2d93a6ec9be66fd9d388dad5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4900
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-14 11:39:37 +00:00
Antonio Borneo
7268ff22c3 drivers/kitprog: remove unused JTAG execute_queue method
kitprog is SWD only and we do not rely on JTAG queue anymore.
Remove the remaining JTAG heritage.

Change-Id: Ic586278368301eb669bc6e4e641f683a81cb171d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4899
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-14 11:39:25 +00:00
Antonio Borneo
b5621bf2f9 hla: remove empty JTAG execute_queue method
We do not rely on JTAG queue anymore.
Remove the remaining JTAG heritage.

Change-Id: I6c87d9ffebaa383c998cf273188b3e7f28b3fe95
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4898
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-14 11:38:39 +00:00
Antonio Borneo
f275ae586b jtag: print an errmsg on using jtag API for non jtag transport
After the cleanup of swd and hla, there should be no more calls
to jtag_execute_queue() or to queue jtag commands if current
transport is not jtag. Thus we can start removing the jtag
specific code from adapters that do not support jtag.

To prevent some remaining call to jtag_execute_queue() to crash
openocd, verify the transport, print an error message if the
transport is not jtag, call the adapter's jtag_execute_queue()
only if it exist.
To identify code that still add commands in the jtag queue even
if transport is not jtag, print an error message in the function
jtag_queue_command(). For the moment, still queue the message,
even if will cause a memory leak if there is no following call
to jtag_execute_queue(); the target is to identify the issue and
cleanup the code, thus solving also the leak.

Change-Id: I8fc85f754aa057aad1df05ff0448c8619897da23
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4897
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-14 11:38:23 +00:00
Antonio Borneo
0f24549ce9 hla: use the new system_reset API
HLA uses its own internal driver's API to control the adapter's
system reset, but at the same time it calls jtag_add_reset() to
avoid breaking the internal logic of OpenOCD. This implicitly
forces HLA to rely on jtag queue mechanism, even if HLA has no
link with JTAG state machine. It requires HLA to implement an
empty execute_queue() to comply with the JTAG queue.

Modify the HLA framework and the HLA targets to use the new
adapter API for system_reset and decouple HLA from JTAG queue.
Rename the HLA static functions adapter_assert_reset() and
adapter_deassert_reset() to avoid overlap with the global
functions with same name.
While there, fix a minor typo in a comment s/incase/in case/.

Do not remove from HLA the JTAG specific API execute_queue(),
even if not required anymore, because OpenOCD code still has
calls to jtag_execute_queue() in case of non JTAG transport.

Change-Id: I0e65e3e557bd665bd3d3aeaa84ea609b55a05e48
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4896
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-14 11:37:34 +00:00
Antonio Borneo
9daec098a9 bitbang: jtag-only drivers: switch to new reset API
Remove the JTAG_RESET command from the bitbang execute queue now
that all bitbang drivers have moved away from old reset method.
Remove also the internal reset API in struct bitbang_interface.

Tested parport only.

Change-Id: I12b157ef442f4c9912406b19b7a4d32ba6ec0b53
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5300
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-14 11:16:24 +00:00
Antonio Borneo
8850eb8f2c swd: get rid of jtag queue to assert/deassert srst
The transport SWD uses the JTAG queue to assert/deassert the
system reset srst. This is the major inconsistency that has to be
removed to properly split JTAG and SWD.

Introduce a new driver API, reset(), to controls both the signals
trst and srst in the driver, skipping the JTAG queue. Put the new
API in struct jtag_interface, even if in this patch it's used for
SWD only; the goal is to get it reused by the other transports.

Add the implementation of the API in all the drivers that
implement SWD. Such implementation is almost the same of the old
code in JTAG queue.

Create a wrapper adapter_system_reset() to use the new API and
remove the SWD specific swd_add_reset(). In the wrapper replace
jtag_add_sleep() with jtag_sleep(), because the former uses the
JTAG queue too.
Rename the old jtag_add_reset() as legacy_jtag_add_reset() with
the target to remove it when all drivers would be ported to the
new reset API. Create a new jtag_add_reset() that calls the
legacy function for drivers still on the old reset API.

Use the new API also on JTAG transport for the drivers that can
support both SWD and JTAG.

For the moment, do not modify the implementation of JTAG-only
drivers, which will continue using the usual method. This should
be cleaned-up in future commits.

Change-Id: I32331c88313f6059b25e12c6bb0156aebc1c074f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4895
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-14 11:15:12 +00:00
Marek Vasut
db23c13d42 flash/nor: Factor out CFI memory read/write functions
Create separate memory read/write functions which facilitate access
to the CFI NOR, so that they can be replaced by controller-specific
functions if necessary. This would become necessary when implementing
support for e.g. HyperFlash controllers, which do not directly map
the HyperFlash into the address space.

Change-Id: I1bba1edfd397cb37bfedb43efe2dd03feb26a375
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5145
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2020-01-05 14:29:57 +00:00
Marek Vasut
790bd27181 flash/nor: Factor out cfi_spansion_unlock_seq()
Factor out the spansion unlock sequence to deduplicate the code.

Change-Id: Id78522e9a2f0e701870ef816772289d08257476a
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5144
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2020-01-05 14:26:54 +00:00
Keir Fraser
9f1529da4f flash/nor/stm32f2x: Support value line chips with trimmed flash
The current code assumes an STM32's flash bank is laid-out in either of
two configurations:
- 4 x 16kB + 1 x 64kB + n x 128kB
- 4 x 32kB + 1 x 128kB + n x 256kB

This is quite ad-hoc but works fine in practice, as long as there are at
least 5 sectors (if n=0). Unfortunately, some newer STM32s are shipping
with only 64 kB of flash (4 x 16kB sectors).

This patch still assumes the same sector layout, but only keeps adding
sectors to the bank if the bank's capacity has not been reached. This
prevents openocd from crashing on some newer STM32s.

Change-Id: If00e5d7a328d11b399babc0bb2111e3ad8a3217e
Signed-off-by: Romain Goyet <romain.goyet@numworks.com>
Signed-off-by: Keir Fraser <keir.xen@gmail.com>
Reviewed-on: http://openocd.zylin.com/4926
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-03 10:28:45 +00:00
Antonio Borneo
be2d25efcc arm_adi_v5: add API send_sequence() and use it
The method to send an arbitrary sequence to DAP depends on the
transport and is thus different on JTAG and SWD. This is already
coded in dap_to_jtag() and dap_to_swd().

Add a new API send_sequence() in struct dap_ops.
Add the implementations of send_sequence() in adi_v5_jtag.c and
adi_v5_swd.c
Rewrite dap_to_jtag() and dap_to_swd() using the new API.
Move the enum swd_special_seq in arm_adi_v5.h to solve a circular
dependencies among swd.h and arm_adi_v5.h

Change-Id: I9db13a00f129761eab283783c094cfff2dd92610
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4902
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-02 21:24:54 +00:00
Antonio Borneo
5d08bcb715 tcl: update scripts after "jtag_reset" got deprecated
Avoid annoying "deprecated" messages in the scripts
distributed with OpenOCD code.

Change-Id: I82d27cd420db30f0653efbd286a627ef56a8c1fd
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5287
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-02 21:24:45 +00:00
Antonio Borneo
c07b774e8f jtag: replace command "jtag_reset" with "adapter [de]assert"
Replace the JTAG transport specific command with a more generic
one. Deprecate "jtag_reset" and update the documentation.
While there, fix an error in the documentation, where the command
"jtag_reset" was used in place of command "reset_config".

Change-Id: I41a988d37ce69f7b35a960cbaf5306aab0299b99
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5286
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-02 21:24:38 +00:00
Antonio Borneo
fafe6dfc9c adapter: add command "adapter [de]assert srst|trst [[de]assert srst|trst]"
Inspired from http://openocd.zylin.com/#/c/3720/1

Add commands to control the adapter's signals srst and trst.
Add macros for the flag's values assert/deassert to make clear what
they mean and to propose a uniform set of values across the code.

Change-Id: Ia8b13f4ded892942916cad7bda49540a896e7218
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5277
Tested-by: jenkins
2020-01-02 21:24:30 +00:00
Jan Matyas
deff24afa1 jtag_vpi: multiple improvements
- Fix: Proper handling of read_socket() and write_socket()
in case of "partial" read/write.

- Added low-level JTAG IO debug capability (_DEBUG_JTAG_IO_)

- Zero-fill packet buffers, avoid sending pieces of uninitialized
memory over the network (memset struct vpi_cmd)

- Use close_socket() instead of close() - needed for Win32

- Fixed usage messages of jtag_vpi_command_handlers

Change-Id: I8bd19bc5c9512fe8e798600212e8a95213f50f5b
Signed-off-by: Jan Matyas <matyas@codasip.com>
Reviewed-on: http://openocd.zylin.com/5177
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-02 21:22:33 +00:00
Oleksandr Redchuk
7f5caa24e3 flash/nor/stm32f1x: fix options reading from locked chip
In commit cea40152f8 option bytes
reading was changed to direct access to option bytes area.
While there are no problems with stm32f0xx and stm32f3xx chips,
option block (0x1ffff800..0x1ffff80F) is unreadable from locked
stm32f10x chips.
As a result, stm32f1x unlock command writes dirty values to user
options, user data and write protection bits.

Option bytes reading reverted from direct access to option bytes area
to reading currently loaded bytes from  FLASH_OBR/FLASH_WRPR registers.

Tested on stm32f100, stm32f103, stm32f107 as well as on stm32f030 and
stm32f303.

Change-Id: Iad476351ffdaca5ace12e02272dacea7f3d08f52
Signed-off-by: Oleksandr Redchuk <real@real.kiev.ua>
Reviewed-on: http://openocd.zylin.com/4940
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-02 21:22:07 +00:00
Marc Schink
223c28f9b9 contrib/rpc_examples: Add (dis)connect methods
Add these methods such that the OpenOcd class can also be used outside
of a 'with' statement.

Change-Id: I927c93fff2dc05cc74daa56360a7262e736a639f
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/5189
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-02 21:21:12 +00:00
Rahul Masurkar
6568d29cc1 rtos/FreeRTOS: Fix FreeRTOS thread list reading
Change-Id: I749ae94ec7279907b1905c02ecc1e9661f43ef70
Signed-off-by: Rahul Masurkar <rahulgm@marvell.com>
Reviewed-on: http://openocd.zylin.com/5273
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-02 21:20:29 +00:00
Tomas Vanek
bb1c7ae4ae flash/nor/kinetis: fix clang static analyzer warnings
Use assert to remove "Dereference of null pointer" warnings.

Change-Id: Ie204c234a71758e6470351e1d9f22da3dd887f56
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5357
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-01-02 21:20:06 +00:00
Tarek BOCHKATI
0750a7c085 target/arm_cti: add new 'ack' and 'channel' commands
these commands have been introduced to ease the manipulation of CTI trough
script files, these commands are:
 - $cti_name ack $event : to acknowledge a CTI event
 - $cti_name channel $channel_number $operation: to perform an operation
    on a specific channel, the possible operations are:
    gate, ungate, set, clear and pulse

Change-Id: I35463867a3c85072f3776c3aeb1e5788953ec435
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5315
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2020-01-02 21:19:27 +00:00
Tarek BOCHKATI
bc0667c237 flash/nor/stm32h7: (minor) use proper variable names and enhance logging
-fsize_base should be fsize_addr as it is the address of FLASH_SIZE register
-flash_base should be flash_regs_base to avoid confusion with flash block start
-add LOG_ERROR to functions stm32x_[read|write]_flash_reg(...)

Change-Id: I86f035314bcd616fc0bdf445692d945a85c15481
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5362
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-02 21:18:22 +00:00
Icenowy Zheng
9c5c3ab3d6 tcl/target: swm050: fix to allow to use with ST-Link
Currently the code assumes the adapter uses raw SWD, and the expected ID
code of the CPU is even wrong. An adapter speed is also not specified.
All these prevents the config file to be used with ST-Link.

Fix the config file, to allow it to be used with ST-Link.

Change-Id: I1244320fabfe8ee23da5a56a592dbeddc72cc8d5
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-on: http://openocd.zylin.com/5297
Tested-by: jenkins
Reviewed-by: Caleb Szalacinski <contact@skiboy.net>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-02 21:17:00 +00:00
Marc Schink
2dc88e1479 target/armv7m_trace: Improve SWO frequency auto-detection
The SWO frequency auto-detection with J-Link adapters does not work
properly in the current implementation. This is because the trace layer
has only information about the highest possible SWO frequency supported
by the adapter. With that the trace layer calculates the SWO prescaler
which usually leads to a frequency deviation greater than what is
permitted by J-Link adapters.

Move the calculation of the SWO prescaler from the trace layer into the
trace configuration of the adapter to overcome this problem.
The adapter has the necessary information to choose a suitable SWO
frequency and calculate the corresponding prescaler that complies with
the maximum allowed frequency deviation.

Tested with:
  - STM32L152RC Discovery Kit (ST-Link)
  - EFM32GG-STK3700 (J-Link)

Change-Id: I38ff2b89d32f0a92c597989b590afe5c75cf4902
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3903
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2019-12-21 19:25:32 +00:00
Antonio Borneo
90bd7d1482 helper/command: remove unused field in struct command_registration
The field jim_handler_data in struct command_registration is never
assigned, thus has always value NULL. It was added in commit
17a9dea53a ("add jim_handler to command_registration") on Nov 23
2009, together with the homonym field jim_handler_data in struct
command, but never used since then.
Only the field jim_handler_data in struct command is used.

Remove the field from struct command_registration and use NULL
where it was referenced (or remove the assignment if the recipient
is already zero, e.g. allocated with calloc()).

Removing the field decreases the total size of OpenOCD binary by
only 4944 byte on a 64 bit x86. Not a significant improvement from
this point of view.

Change-Id: I9f1d281e3de6b2eb398e2d883c5e9ff92628aecd
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5225
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-12-19 20:43:08 +00:00
Antonio Borneo
e8d4074cf8 target/armv4_5: use c99 array designator to init arm_core_regs[]
During code analysis and development, counting again and again the
lines to find the index of the register is a boring error-prone
brain-damaging activity.
Use the c99 syntax and add once forever the array designators to
specify the index values.
The code behavior is not changed.

Change-Id: I2c70f70794475679efb91a8dfadc00f50715bd3f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5256
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-12-19 20:42:41 +00:00
Antonio Borneo
49d71d06d1 sysfsgpio: give time to udev to change gpio permission
When a gpio is exported by writing in /sys/class/gpio/export, the
corresponding gpio control files appear immediately in sysfs but
with default access permission for root user only. The daemon udev
requires some time to get notified of the new files before it can
change the permissions to allow access to unprivileged users.
Due to this race condition, sysfsgpio can fail with EACCES error
if OpenOCD is executed by any unprivileged user.

Give 0.5 seconds to udev to identify the new files and change the
permission.

Tested with udev rules:
	SUBSYSTEM=="gpio*", PROGRAM="/bin/sh -c 'find -L /sys/class/gpio/ -maxdepth 2 -exec chown root:uucp {} \; -exec chmod g=u {} \; || true'"

Change-Id: I1316c66ff103ffe23e5e4720f33372dc272a3766
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5302
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-12-19 20:42:01 +00:00
Antonio Borneo
964c4db9ce gdb_server: fix extended_protocol for multi-target
The flag extended_protocol is currently a single static variable
thus, in case of multiple targets, it is shared among all the gdb
connections. This is an issue if the gdb connections are not all
using extended protocol, but also when one connection get closed
because the code sets the flag to zero impacting the other
connections still open.

Move the flag extended_protocol in the per-connection struct
gdb_connection.

Change-Id: I19d565f925df6a31767fd8d392242f60867109f2
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5310
Tested-by: jenkins
Reviewed-by: Moritz Fischer <moritzf@google.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-12-19 20:41:18 +00:00
Antonio Borneo
f476c9eec4 gdb_server: fix string length with semihosting_fileio
The GDB file-I/O remote protocol extension, used for implementing
the semihosting file I/O, requires the length of strings to
include the trailing zero character, as explicitly stated inside a
comment in GDB source code [1]:
	/* 1. Parameter: Ptr to pathname / length incl. trailing zero.  */

ARM specification for semihosting [2] requires the string length
to not include the trailing zero character, e.g. in SYS_OPEN
specifications:
	"field 3: An integer that gives the length of the string
	 pointed to by field 1. The length does not include the
	 terminating null character that must be present."

The mismatch above requires OpenOCD to add "one" to the string
length before passing it to GDB. Such conversion is missing
either in the generic semihosting provider of the data, the
function semihosting_common(), and in the consumer of the data,
the gdb_server function gdb_fileio_reply().
The conversion is already implemented in the target specific
function nds32_get_gdb_fileio_info(), but it's not the preferred
place for such GDB specific requirement.

This issue affects the semihosting calls "open", "unlink",
"rename" and "system".

Remove the "+1" conversion from nds32_get_gdb_fileio_info().
Add the "+1" conversion in gdb_fileio_reply().

[1] http://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;f=gdb/remote-fileio.c;h=11c141e42c4d#l381
[2] "Semihosting for AArch32 and AArch64, Release 2.0"
    https://static.docs.arm.com/100863/0200/semihosting.pdf

Change-Id: I35461bcb30f734fe2d51f7f0d418e3d04b4af506
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5322
Tested-by: jenkins
Reviewed-by: Steven Stallion <sstallion@gmail.com>
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-12-19 20:40:55 +00:00
Tomas Vanek
104a5cbef8 flash/nor/stm32f2x: fix clang static analyzer warning
Using a signed variable as a parameter of FLASH_SNB() macro
generated "warning: The result of the left shift is undefined
because the left operand is negative"

Change-Id: I8b3fe840f9308962460906097df6ddd848c07b25
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5356
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-12-17 15:35:24 +00:00
Jan Matyas
881484708d jtag_vpi: ensured constant packet size & endianness
Made sure that size and endianness of jtag_vpi structures sent
over the network is the same, regardless of the platform.

Little endian chosen to maintain as much compatibility
with existing OpenOCD builds as possible.

Matching change in the original jtag_vpi server:
https://github.com/fjullien/jtag_vpi/pull/4

Change-Id: Ib839fea9bb2d5190b5643c970b89333b286dce71
Signed-off-by: Jan Matyas <matyas@codasip.com>
Reviewed-on: http://openocd.zylin.com/5152
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2019-12-16 23:27:32 +00:00
Tomas Vanek
22b4abc46c flash/nor/nrf5: remove check for protected sector
The new "Access control list" flash protection scheme used in nRF52840
is not yet supported. Do not prevent sector erase if protection
state is unknown.

Change-Id: Iae9a869a54ffbdc888fb3ec478dafb5c942d9ea0
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5348
Tested-by: jenkins
2019-12-12 14:31:59 +00:00
Jimmy
0f12d792ed server/tcl_server.c: Fix buffer overrun
The input buffer size is checked only after writing past its end.

Change-Id: I6a9651c5b7d82efe338468d67bf6caca41004b01
Signed-off-by: Jimmy <nhminus@gmail.com>
Reviewed-on: http://openocd.zylin.com/5352
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-12-12 14:31:42 +00:00
Paul Fertser
1e427fd580 server: gdb_server: fix memory map generation on a 32-bit BE host
Due to lack of printf format check wrong specifier was used and it
actually broke operation on a 32-bit BE host.

So fix this and add the necessary function attributes so that the bugs
like that can be uncovered automaticaly.

Reported and pinpointed by Karl Palsson on IRC.

Change-Id: I254ec28fcd9bb30594d607f74a6dba5456c2c7a1
Tested-by: Karl Palsson <karlp@tweak.net.au>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/5342
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-12-10 10:43:03 +00:00
Tarek BOCHKATI
678fb4f60b target/stm32h7x: add support of dual core variant of STM32H7
STM32H7x7 and STM32H7x5 devices contains two cores : CM7 + CM4
The second core creation is only done when
  * DUAL_CORE variable is set to true
  * non HLA interface is used

A second check for the second core existence is done in cpu1 examine-end
Once the second core is detected it gets examined.

Furthermore, the script provides a configurable CTI usage in order to halt
the cores simultaneously.

Tested on Rev X and V devices.

PS: the indentation was a mix of spaces and tabs, all changed to tabs.

Change-Id: Iad9c30826965ddb9be5dee628bc2e63f953bbcb8
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5130
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-12-07 13:07:00 +00:00
Peter Mamonov
80f1a92bd7 mips64: Add generic mips64 target support
Change-Id: I2bdd2573f23e65652686d18031698f423eec77c0
Signed-off-by: Konstantin Kostyukhin <kost@niisi.msk.ru>
Signed-off-by: Aleksey Kuleshov <rndfax@yandex.ru>
Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
CC: Dongxue Zhang <elta.era@gmail.com>
CC: Paul Fertser <fercerpav@gmail.com>
CC: Salvador Arroyo <sarroyofdez@yahoo.es>
CC: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/2322
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2019-11-28 19:49:10 +00:00
Peter Mamonov
1fbe8450a9 mips: Add MIPS64 support
The patch adds support for processors implementing MIPS64 instruction set.

Change-Id: I79a983dfdead81553457a0f3e9e739a9785afaac
Signed-off-by: Konstantin Kostyukhin <kost@niisi.msk.ru>
Signed-off-by: Andrey Sidorov <anysidorov@gmail.com>
Signed-off-by: Aleksey Kuleshov <rndfax@yandex.ru>
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
CC: Dongxue Zhang <elta.era@gmail.com>
CC: Paul Fertser <fercerpav@gmail.com>
CC: Salvador Arroyo <sarroyofdez@yahoo.es>
CC: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/2321
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2019-11-28 16:59:15 +00:00
Christopher Head
20a310deb7 target/stm32h7x: Use AP2 to access DBGMCU when non HLA adapter is used
The STM32H7 has three access ports. The DBGMCU component is available
through AP0 at 0x5C001000 and through AP2 at 0xE00E1000. Using the
latter is preferable for early configuration because it works in all
power states and while SRST is asserted, whereas the former does not.

Change-Id: Iaf8f01d769efb6655040060a8e1e951e1f7e50ab
Signed-off-by: Christopher Head <chead@zaber.com>
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/4742
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-11-27 16:08:46 +00:00
Tarek BOCHKATI
9c196b0b2b flash/nor/stm32h7x: remove options cache and some driver enhancements
functions managing option bytes cache (stm32x_read/write_options)
have bee removed, and a new functions to modify a single option byte
have been introduced (stm32x_write/modify_option).

by the way, some helpers have been introduced to access flash registers:
  - stm32x_read_flash_reg(bank, offset, *value): int
  - stm32x_write_flash_reg(bank, offset, value): int

and a new commands to read and write a single flash option register:
  - stm32h7x option_read <bank> <option_reg offset>
  - stm32h7x option_write <bank> <option_reg offset> <value> [mask]

also lock and unlock handlers' have been reduced by using the same routine
(stm32x_set_rdp) and have been optimized to not write options unless
there is a change in RDP level.

finally, several functions have been fixed to lock flash / options in case
of failure.

Change-Id: I75057949ab9f5b4e0f602bafb76f9f80d53a522b
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5293
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-11-27 06:16:51 +00:00
Tarek BOCHKATI
8d8c6df557 flash/nor/stm32h7x: fix option bytes handling to work with both banks
To achieve that we need to avoid using FLASH_REG_BASE_B0, and use
bank registers instead:
   For dual bank devices, each option register is mapped in 2 addresses
   at the same offset from flash_bank_reg_base.
   This is true for OPTCR, OPTKEYR, OPTSR_CUR/PRG, OPTCCR according to
   RM0433 Rev6 (refer to section 3.9: FLASH registers)

In stm32x_write_options, according to RM0433 Rev6, after OBL launch we
should wait for OPTSR_CUR.BSY bit instead of FLASH_SR.QW

Change-Id: Ie24a91f069d03c9233797390fc2e925c737dad90
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5291
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-11-27 06:16:40 +00:00
Tarek BOCHKATI
1b276c0ad5 flash/nor/stm32h7x: remove stm32x_options.protection2
Each bank had to store its options only, there is no need for bank1
to sneak into bank2 options.
Furthermore, some variants do not have a second bank.

Change-Id: I9229eb8ab4b5860ba2b0c5dbe626a54a84bca4d6
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5290
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-11-27 06:16:28 +00:00
Tomas Vanek
21bc29d1d6 flash/nor/nrf5: fix allocation of driver_priv and sector array
Drop static pointer to allocated struct nrf5_info, iterate over
the flash bank list to find previously allocated nrf5 instances.
nrf5 is swd only device, so static allocation makes no harm,
but we should avoid copying the wrong code to other flash drivers.

Free sector array before allocating it to avoid memory leak on
re-probing device.

Change-Id: I781d8f4418a91c043f2393e5ecc5278fc6df3566
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4910
Tested-by: jenkins
2019-11-26 07:20:53 +00:00
Tomas Vanek
d8288a22c1 flash/nor/nrf5: show RAM size on old nRF51 devices (rev 1, 2)
Change-Id: I2452c084b9bd9e401bd49e15791428a53df1cd1d
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4868
Tested-by: jenkins
2019-11-26 07:20:41 +00:00
Tomas Vanek
e2ca8914f2 flash/nor/nrf5: do not check FICR PPFC on nRF52
Change-Id: I6beee9b85a542040f2495513b5ba51bd8e1389db
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4867
Tested-by: jenkins
2019-11-26 07:20:31 +00:00
Tomas Vanek
882df85ec1 flash/nor/nrf5: rename registers by nRF series
Change-Id: I70af671c52665b27a28508e06e7d3e5e40a621f7
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4866
Tested-by: jenkins
2019-11-26 07:20:05 +00:00
Tomas Vanek
e3fb76374c flash/nor/nrf5: refactor sector allocation to use alloc_block_array()
Change-Id: Ied8ea917cec492fc6bb8836a92d8c4ceaf3b499b
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4865
Tested-by: jenkins
2019-11-26 07:19:59 +00:00
Tomas Vanek
b2dbaf9e15 flash/nor/nrf5: implement BPROT protection check for nRF52810,832
Also refuse 'flash protect' on any nRF52.
Fail protection check on nRF52840 until ACL protection is implemented.

Change-Id: I84fcf117427e4894147c3ad92e2a3597566b4fcf
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4864
Tested-by: jenkins
2019-11-26 07:19:50 +00:00
Tomas Vanek
5da746fa09 flash/nor/nrf5: detect newer devices without HWID table
nrf5 flash driver detected devices by looking up the HWID in the table
of known devices. Unfortunately chips are produced with many different
HWIDs for each type.

All nRF52 devices have FICR INFO field suitable for device identification
without need of HWID lookup.
Some newer nRF51 devices have FICR INFO too although undocumented.
Use this information to identify the device.

nrf5_info() is reworked to show just concise info.
Decoding FICR and UICR registers was moved from nrf5_info()
to a new command 'nrf5 info' without functional changes.

The flash bank for UICR page has the same size as program flash sector.

Change-Id: I900095b9ae23ee995f8e2bef8539b75d00300da5
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4848
Tested-by: jenkins
2019-11-26 07:19:43 +00:00
Tomas Vanek
006d8e5444 flash/nor/nrf5: remove useless page padding and UICR autoerase
nRF5 flash controller can write a word at a time. Ask flash
infrastructure to handle alignment and padding.

Fix mixing of offset and address in nrf5_ll_flash_write()
- the original code worked just because NRF5_FLASH_BASE is 0

Change-Id: Ibe8bdf899a1764cf4117b2deda1a4618eeb16697
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4819
Tested-by: jenkins
2019-11-26 07:19:25 +00:00
Antonio Borneo
be36573073 helper: skip including sys/sysctl.h on Linux
Starting from glibc 2.30, the header file sys/sysctl.h gets
deprecated on Linux, after the commit 744e82963716 ("Linux:
Deprecate <sys/sysctl.h> and sysctl")
	https://sourceware.org/git/?p=glibc.git;a=commitdiff;h=744e82963716

The associated NEWS reports
	The Linux-specific <sys/sysctl.h> header and the sysctl
	function have been deprecated and will be removed from a
	future version of glibc.

Latest automake 1.16.1 still does not handle this case.
Current OpenOCD build fails with warning and requires configure
with "--disable-werror" to build.

Prevent including sys/sysctl.h on Linux build.

Change-Id: I5310976573352a96e5aef123352f73475f0c35fe
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5317
Tested-by: jenkins
Reviewed-by: Moritz Fischer <moritz.fischer.private@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2019-11-23 22:47:33 +00:00
Andreas Fritiofson
6d54d90541 CVE-2018-5704: Prevent some forms of Cross Protocol Scripting attacks
OpenOCD can be targeted by a Cross Protocol Scripting attack from
a web browser running malicious code, such as the following PoC:

var x = new XMLHttpRequest();
x.open("POST", "http://127.0.0.1:4444", true);
x.send("exec xcalc\r\n");

This mitigation should provide some protection from browser-based
attacks and is based on the corresponding fix in Redis:

8075572207/src/networking.c (L1758)

Change-Id: Ia96ebe19b74b5805dc228bf7364c7971a90a4581
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reported-by: Josef Gajdusek <atx@atx.name>
Reviewed-on: http://openocd.zylin.com/4335
Tested-by: jenkins
Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2019-11-22 18:25:34 +00:00
Ake Rehnman
9de7d9c81d STM8 Target relicensing to GPLv2 and later
Change-Id: I21126945c0475399aaf12239b8972fde5fddd845
Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com>
Reviewed-on: http://openocd.zylin.com/5331
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2019-11-07 08:21:40 +00:00
Alexandru Gagniuc
4333339680 jtag: usb_blaster: Add missing 'default' to switch statement
If a new JTAG command is added, then GCC will complain that
enumeration value not handled in switch. This is the only driver not
to have a default case, so add it.

Change-Id: Icb838087bb7525d057a911bd256300e256da1668
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://openocd.zylin.com/5333
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-11-07 08:21:19 +00:00
Alexandru Gagniuc
4f779a88db jtag: jtag_vpi: Add missing 'default' to switch statement
If a new JTAG command is added, then GCC will complain that
enumeration value not handled in switch. Make this consistent with
other drivers, and add a 'default' case.

Change-Id: I66d6d0db3fcae93ea246f2d4882ffff5dec14693
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://openocd.zylin.com/5340
Tested-by: jenkins
Reviewed-by: Jan Matyas <matyas@codasip.com>
Reviewed-by: Franck Jullien <franck.jullien@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-11-07 08:21:02 +00:00
Marc Schink
ded6799025 libjaylink: Update to latest Git version
This version adds two new USB PIDs and fixes a build issue under MSYS2.

Change-Id: I753fab827783ea64e55e59d833742c9f70a28a2b
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/5309
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-10-19 13:27:29 +01:00
Mirko Vogt
382f4f064e nrf5: update links to compatibility matrixes for nrf5x variants
Change-Id: If51aa992ccbb8c9a2e502b74827a36a62010546d
Signed-off-by: Mirko Vogt <mirko.vogt@sensorberg.com>
Reviewed-on: http://openocd.zylin.com/4843
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-10-18 09:24:25 +01:00
Florian Fainelli
16065e06ad target/cortex_a: Extract code to read/write from/to register to/from DCC
In preparation for supporting the ARM MCRR and MRRC commands which will
require using two 32-bit registers to read/write a 64-bit internal
register, extract the common logic to read/write from/to a register
to/from DCC and make that parameterized such that we can do this through
not just r0.

Change-Id: Iadb73f5cde8cf5961b5a18ddd198bf39d791e610
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-on: http://openocd.zylin.com/5227
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-10-18 09:22:58 +01:00
Antonio Borneo
e99a43a276 drivers/gw16012: remove useless cast on gw16012_port
The variable gw16012_port is of type uint16_t.
There is no need for a cast to print it.

Change the format modifier to PRIx16

Change-Id: I16fe688b9d235bae46525635d07849a00fba9548
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5195
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2019-10-18 09:22:34 +01:00
Andreas Fritiofson
a944ee28d9 gdb_server: Support vRun packet, allow setting cmdline from GDB
GDB uses the vRun packet if available to restart a running process in
extended remote mode. Support this like the R packet and set the
semihosting command-line to allow it to be specified from GDB.

Change-Id: I9cb812b22170630f782113c9927e46e0cd5b1f0f
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/5186
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-10-18 09:21:56 +01:00
Alexey Brodkin
c983f8ee00 gdb-server: Create arch-specific structure type for every feature
As it is mentioned here [1] type's ID is unique name within containing feature.

That said if regs of the same type located in different features it's required
to insert type definition at least in each feature.

See more details in discussion here [2].

[1] https://sourceware.org/gdb/onlinedocs/gdb/Target-Description-Format.html#Types
[2] 2a5f5125ac (r33460077)

Change-Id: Id92b061cfbf47d5c032a02c2c406b28affd0b02a
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5179
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-10-18 09:21:45 +01:00
Antonio Borneo
5dc5ed5714 target/cortex_a: use aligned accesses for read/write cpu memory slow
Armv7a is able to read and write memory at un-aligned address, but
only when bit SCTLR.A (Alignment check enable) is zero and the
address belongs to a memory space with attribute "Normal" (see [1]
chapter A3.2.1 "Unaligned data access"). In all the other cases
the memory access will trigger an alignment fault data abort
exception.
Memory attributes are explained in [1] chapter A3.5 "Memory types
and attributes and the memory order model".

Disabling the MMU cause a change in memory attribute, as explained
in [1] chapter B3.2 "The effects of disabling MMUs on VMSA
behavior".
This can cause several issues. e.g. a SW breakpoint on un-aligned
4-byte Thumb instruction, set when MMU is on, can be impossible to
remove when MMU turns off.

While is possible to check all the possible conditions before an
un-aligned memory access, it's clearly more maintainable to skip
such complexity and only perform aligned accesses.

Check the alignment and eventually modify the data size before
calling the functions cortex_a_{read,write}_cpu_memory_slow().
Change the comment in the two functions above to comply with the
new behaviour.

[1] ARM DDI 0406C.d - "ARM Architecture Reference Manual, ARMv7-A
    and ARMv7-R edition"

Change-Id: I57b4c11e7fa7e78aaaaee4406a5734b48db740ae
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5138
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-10-18 09:20:58 +01:00
Bohdan Tymkiv
5f42124a40 adi_v5_jtag: avoid RAM exhaustion by limiting jtag queue size
Issue has been found when I tried to read 64 MiB QSPI flash bank.
Bank is memory mapped, default_flash_read() is used for 'flash read_bank'
command. OpenOCD consumed as much as 6.8 GiB of RAM during this
process. Investigation showed that this happens because JTAG queue
is not limited in any way. OpenOCD queues 16 millions of AP reads
allocating all corresponding data structures.

Most of this memory is allocated in:
cmd_queue_alloc (commands.c) - 4.2 GiB
dap_cmd_new (adi_v5_jtag.c) - 2.25GiB

This patch implements a pool of "struct dap_cmd" objects using
linked list. Objects are taken from a pool in "dap_cmd_new()" and
returned to the pool when they are not needed. Size of the pool
is limited to 64K of objects, JTAG queue is forcibly executed
when this limit is reached.

Checked with Valgrind and Clang analyzer - no new warnings.

Change-Id: I5aaaecce5ed71414f7965a2598f49742f6a6b2b5
Signed-off-by: Bohdan Tymkiv <bhdt@cypress.com>
Reviewed-on: http://openocd.zylin.com/4948
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-10-18 09:20:49 +01:00
Piotr Kasprzyk
03beb01239 Fix wrong end-of-region calculation
Correct check for end-of-region is:
$BASE + $LEN > $ADDRESS

And it is currently (wrongly) calculated as:
$ADDRESS > $BASE - $LEN

Change-Id: If10bfee19b0c7dbc085731ac1eda943f5d8a36a3
Signed-off-by: Piotr Kasprzyk <ciri@ciri.pl>
Reviewed-on: http://openocd.zylin.com/4798
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-10-18 09:19:09 +01:00
Andreas Fritiofson
3afb357934 nrf5: Fix misuse of flash bank number
Make driver_priv point directly into the corresponding chip bank structure
and add a pointer to it to get back to its chip when it's needed. This
removes the need to keep track of any bank number, either global or chip-
local.

In addition, it simplifies the cases where the chip structure was just used
to access the chip bank fields; now they are directly accessible.

Change-Id: Iaa353cd4fa7d8ff94c2ef69028c7cb32fade0420
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/4775
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-10-18 09:19:05 +01:00
Andreas Färber
0bb011f004 tcl/target: Add Infineon TLE987x
Prepare a config for Infineon TLE9879.

Change-Id: Ic667ae822fd514cac365993bc3f39b4185f1a118
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/4339
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-10-18 09:18:41 +01:00
Felipe Balbi
3e7cfc6709 stm32l0|l1: don't corrupt RCC registers
instead of overwriting Reset settings, let's
read-modify-write RCC registers.

Change-Id: I21b7e26e6007d3c3d73803c681c980c6947f5910
Signed-off-by: Felipe Balbi <balbi@kernel.org>
Reviewed-on: http://openocd.zylin.com/3601
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-10-18 09:17:33 +01:00
Andreas Fritiofson
f545044c2a target: Switch to target_read_buffer() in verify_image fallback
The current code checks the count to determine whether to read bytes or
words. However it fails to consider whether the base address is suitably
aligned.

Instead use the target_read_buffer() function which is for exactly this
purpose and generates optimal accesses with natural alignment.

Change-Id: I32ab5417890ee2219902df1529bc220fe353b4c7
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3217
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-10-18 09:17:24 +01:00
Al Dyrius
3a50bb46dc Update FTDI C232HM cfg, and add two new cfgs from cable modem research
Change-Id: Idbeffcd5ff4380b1e7c9fd5ef6ba3ca77cc22d99
Signed-off-by: Al Dyrius <aldyrius42@gmail.com>
Reviewed-on: http://openocd.zylin.com/5307
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2019-10-15 09:01:14 +01:00
Moritz 'Morty' Strübe
51ce53d044 src/flash/startup.tcl: Add preverify to program command
The preverify option allows to check whether flashing is necessary.
If the target is flashed often/automatically this can save time and
preserve the flash. This is expecially helpful in CI environments.

Change-Id: Iead0a269e1a772b751d4dd9e8b53b2fecc874624
Signed-off-by: Moritz 'Morty' Strübe <moritz.struebe@redheads.de>
Reviewed-on: http://openocd.zylin.com/5292
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2019-10-15 09:00:45 +01:00
Tomas Vanek
b4a7ff291c doc: emphasize the role of 'reset init' before flash commands
Change-Id: I4a4061ad0fa6e5dfb1e33f01d62145ca9bf12148
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5304
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-10-15 09:00:00 +01:00
Tim Newsome
462c012066 Add complete JTAG debug logging.
Sample output, with default_interface_jtag_execute_queue replaced by
dijeq to satisfy commit message line length check:
Debug: 646 18 core.c:847 dijeq(): JTAG IR SCAN to RUN/IDLE
Debug: 647 18 core.c:852 dijeq():   5b out: 11
Debug: 648 18 core.c:847 dijeq(): JTAG DR SCAN to RUN/IDLE
Debug: 649 18 core.c:852 dijeq():   40b out: 4400000001
Debug: 650 18 core.c:857 dijeq():   40b in: 4400000000

Signed-off-by: Tim Newsome <tim@sifive.com>
Change-Id: I014e9e3a77755413b36edfcede2ab8f6aa08061b
Reviewed-on: http://openocd.zylin.com/4451
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-10-15 08:59:00 +01:00
Tim Newsome
d214cadfef Add wall clock timeout warning to mpsse_flush()
I think that libusb_handle_events_timeout_completed is supposed to make
progress or time out, but sometimes we hit a case where it makes no
progress, and mpsse_flush() loops forever. This wall clock timeout
notifies the user that this is going on.

When I wrote this code, this bug would reproduce every hour or two, but
right now it's not happening for me.

Change-Id: I7eb66f43462298e263a48048aa0c8769095661eb
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4767
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2019-10-15 08:58:56 +01:00
Christian Meusel
0a13ca1a8a efm32: use device-specific MSC base for EFM32TG11B
According to the reference manual it should be 0x40000000. Flashing (and
booting) a firmware with this MSC base was successful.

Change-Id: I739e67d36555b8170a3b8e26f54cf1c09ce8424b
Signed-off-by: Christian Meusel <christian.meusel@posteo.de>
Reviewed-on: http://openocd.zylin.com/5263
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-10-02 17:34:07 +01:00
Seth LaForge
3110092720 src/jtag/aice: Fix obviously incorrect bit op.
Fix expression "(pin_status | 0x4)" which was always true rather than
testing a bit. Untested - was clearly not expressing the intent of the
author by inspection. Found by automated tooling and rtrieu@google.com.

Signed-off-by: Seth LaForge <sethml@google.com>
Change-Id: I4bb91e60e8ce9757bf21976cc48de6f85a39c68d
Reviewed-on: http://openocd.zylin.com/5301
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-09-24 05:47:43 +01:00
Christopher Head
31a3324b68 helper/command: clear errno before calling parser
The C standard says that errno is set to ERANGE if an out-of-range value
is returned by strtol, strtoul, et. al., but it does not say that errno
is cleared if the function is successful (and, indeed, it is not on
glibc). This means that, if errno is ERANGE before strtol is called, and
if the value to be converted is exactly the maximum (or, for a signed
conversion, the minimum) legal value, COMMAND_PARSE_NUMBER will
erroneously indicate that the value is out of range.

Change-Id: I8a8b50a815b408a38235968f1c1d70297ea1a6aa
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5298
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-09-24 05:47:18 +01:00
Marc Schink
181d594205 flash/nor/tcl: Fix usage of 'flash erase_sector' command
Change-Id: I2141e377a0531cab8d1140049a2ee7721d30cfdc
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/5299
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-09-24 05:46:52 +01:00
Marc Schink
85a460d5a3 tcl/board: Add Rigado BMD-300 Evaluation Kit
Change-Id: Iba8e12818e2041e51214dab413eb57f0e5bf3f75
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/5218
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-09-20 07:27:27 +01:00
Khem Raj
101345270b esirisc_flash: Rename PAGE_SIZE to FLASH_PAGE_SIZE
PAGE_SIZE is defined in system includes on some systems, this would
avoid the unintended conflict

Fixes
| src/flash/nor/esirisc_flash.c:95:9: error: 'PAGE_SIZE' macro redefined [-Werror,-Wmacro-redefined]
| #define PAGE_SIZE                       4096
|         ^
| /mnt/a/yoe/build/tmp/work/core2-64-yoe-linux-musl/openocd/0.10+gitrAUTOINC+7ee618692f-r0/recipe-sysroot/usr/inclu
de/limits.h:89:9: note: previous definition is here
| #define PAGE_SIZE PAGESIZE

Change-Id: I195b303fc88a7c848ca4e55fd6ba893796df55cc
Signed-off-by: Khem Raj <raj.khem@gmail.com>
Reviewed-on: http://openocd.zylin.com/5180
Tested-by: jenkins
Reviewed-by: Steven Stallion <sstallion@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2019-09-18 07:05:08 +01:00
Tarek BOCHKATI
09eb941cb8 flash/nor/stm32h7x: remove unused 'pages_per_sector' from stm32h7x_part_info
Change-Id: I1b79c25cada574e3a9849f506443c836bd707604
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5289
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
2019-09-08 11:55:19 +01:00
Tarek BOCHKATI
5b06b88af8 flash/nor/stm32h7x: remove flash size information from device name
There is no sense in displaying the max size (2M) as there is variants
of this device with reduced flash size

Change-Id: I40574064d75fdf2a038044c81038a6d7abc6c4dd
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5288
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-09-08 11:54:34 +01:00
Caleb Szalacinski
5a235226f0 flash/nor: flash driver for Synwit SWM050 MCUs
SWM050 is a series of MCU product by Foshan Synwit Tech, which is
available in TSSOP-8 or SSOP-16 packages.

Adds flash driver for the internal 8KiB flash of the MCU. The registers
are based on reverse engineering the J-Flash blob provided by the
vendor.

Also adds a pre-made cfg file.

Change-Id: I0b29f0c0d062883542ee743e0750a4c6b6609ebd
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Caleb Szalacinski <contact@skiboy.net>
Reviewed-on: http://openocd.zylin.com/4927
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2019-09-08 11:53:12 +01:00
Han Hartgers
642a9310ca target/dsp563xx: dsp563xx restore reg support
Added "exist=true" field to the reg_list struct to make access to the
dsp563xx registers again possible. Without it defaults to exist=false
and all the reg related functions will return nothing.

Fixes regression from b5964191f0

Change-Id: I9c256346735b8d66919c4ba83f528a8afca46ff9
Signed-off-by: Han Hartgers <han.hartgers@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5239
Tested-by: jenkins
2019-09-08 11:52:06 +01:00
Seth LaForge
844c82934e src/flash/nand: Fix some operator precedence bugs.
Fix two expressions where precedence of operator | vs ?: was clearly confused.
Untested - was clearly not expressing the intent of the author by inspection.
Found by automated tooling and rtrieu@google.com.

Change-Id: I46f190154797f8affc761caf3a15a1a9db53d702
Signed-off-by: Seth LaForge <sethml@google.com>
Reviewed-on: http://openocd.zylin.com/5281
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2019-09-08 11:51:21 +01:00
Tim Newsome
0819541366 gdb_server, rtos: Fine-grained RTOS register access
1. Add get_thread_reg() to rtos. It's used in rtos_get_gdb_reg() to read
the value of a single register, instead of reading all register values
by calling get_thread_reg_list().
2. Add set_reg() to rtos. gdb_server uses this to change a single
register value for a specific thread.
3. Add target_get_gdb_reg_list_noread() so it's possible for gdb to get
a list of registers without attempting to read their contents.

The clang static checker doesn't find any new problems with this change.

Change-Id: I77f792d1238cb015b91527ca8cb99593ccc8870e
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/5114
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-08-28 08:07:37 +01:00
Tarek BOCHKATI
16496488d1 flash/nor/core: fix some minor typo
Change-Id: I03832b3e4a6eaadfd87729a3a898e0a2cd30931a
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5264
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-08-04 09:31:38 +01:00
Marc Schink
320f7517c4 contrib/rpc_examples: Adapt to new command line handling
Change-Id: I844ef7fbf57a22097a936f4614b4a4c7e980bef6
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/5248
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-08-04 09:08:18 +01:00
Andreas Fritiofson
7a93c9e087 mflash: Remove this broken flash driver
This is causing repeated build failures. Its design is so fundamentally
broken that if someone actually wants to use it, a full rewrite is the
only option. So it's not even worth deprecating in the hope that someone
will notice and fix it, just get rid of it.

Change-Id: I513069919a3873bd69253110f7fb6f622ee7d061
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/5243
Tested-by: jenkins
Reviewed-by: Jeffrey Booher-Kaeding <Jeff.Booher-Kaeding@arm.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-07-28 21:17:47 +01:00
Marc Schink
263deb3802 configure.ac: Fix ST-Link adapter description
The ST-Link driver supports not only JTAG but also SWD and SWIM.

Change-Id: I9f0e7b018cae54ed8e73a724151647e050e7bb49
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/5247
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2019-07-07 20:13:51 +01:00
Antonio Borneo
6ea43726a8 cortex_m: set C_DEBUGEN in soft_reset_halt
The command "soft_reset_halt" is deprecated since mid 2013 with
the commit 146dfe3295 ("cortex_m: deprecate soft_reset_halt").
Nevertheless it is still extremely useful with multicore chips
where it allows to reset only one of the cores, option not
available through asserting the chip-wide srst.
Without a better replacement of the command, it's worth fixing it.

Accordingly to ARM DDI 0403E.d, chapter C1.4.1 "Entering Debug
state on leaving reset state", to halt the core at reset both bits
DHCSR.C_DEBUGEN and DEMCR.VC_CORERESET must be set.
Current code only sets the latter bit, relying on having C_DEBUGEN
already set through other commands, e.g. "halt". This prevents the
command "soft_reset_halt" to work if issued as very first command.

Set the bit C_DEBUGEN in command "soft_reset_halt".

Change-Id: I66bfd6a0da1fca5049dea037b4d258cf6f842966
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4987
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-20 19:51:01 +01:00
Antonio Borneo
a521d93b7a helper/options: simplify the code using command_run_linef()
Thanks to command_run_linef() there is no need to pre-build the
command using alloc_printf().

Change-Id: Iccfebd6063d1ac162f090fe2309b1f51bebf0214
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5226
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-20 19:50:38 +01:00
Christopher Head
77a8914b7f helper/command: make command_run_line reentrant
The `command_run_line` function contains a comment saying it should be
reentrant. However, it isn’t: it NULLs out `current_target_override` and
doesn’t restore it before returning, and it changes the `context`
associated data of the `interp` object and then deletes that associated
data before returning rather than restoring it to its previous value.

Change-Id: I84fd46ef7173f08cf7c57b9a5b76e4986a60816f
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5223
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-20 19:50:22 +01:00
Kevin Gillespie
23b6aa9bf8 doc: makeinfo extra whitespace
Extra whitespace in file creating build errors with makeinfo.

Change-Id: Ib764850c1c8ff596d3c753eadd8e27f8c5982d20
Signed-off-by: Kevin Gillespie <kgills@gmail.com>
Reviewed-on: http://openocd.zylin.com/5229
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-20 19:49:56 +01:00
Marc Schink
42cee465c2 tcl/board: Add SAML11 Xplained Pro Evaluation Kit
Change-Id: I118929cdecd9ba1f39d6e2791c114ac7e347b3f5
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/5206
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-19 10:18:19 +01:00
Marc Schink
56de276d91 tcl/target: Add initial Microchip SAML1x support
There is not flash bank support at the moment.

Change-Id: I833c009d9d21cdeb70b57d67eb557d50ed0fb4de
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/5205
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-19 10:17:57 +01:00
Marc Schink
0d47d85ff5 target/cortex_m: Add support for AHB5-AP
The AHB5-AP is implemented in Cortex-M23/33 based devices.

Change-Id: I505954a2e2c6462ce0aa96eba1d55b016c5028b9
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/5232
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Tested-by: jenkins
2019-06-19 10:17:38 +01:00
Marc Schink
1f1558e74b target/arm_adiv5: Add type for AHB5-AP
This access port type comes with the AMBA 5 protocol specification,
see 'C1.3 AP' in ARM IHI 0031D.

Change-Id: I3c4f0a69230daaf4f5f979de6213fe3c025a089a
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/5231
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
2019-06-19 09:51:54 +01:00
Omair Javaid
ae449bb5f9 Configs for ARM corelink SSE-200 target and Musca A board
This patch adds configuration files for ARM CoreLink SSE-200 SoCs. Also
adds configuration file for SSE-200 based Musca A board. Flash programming
support for Musca A QSPI flash is still not functional. This configuration
will be updated once that support lands into OpenOCD.

Please refer to ARM documentation for more information about SSE-200 and
Musca A.

Change-Id: Id3783c34d6e2609d659ef91c0bf7252c39439874
Signed-off-by: Omair Javaid <omair.javaid@linaro.org>
Reviewed-on: http://openocd.zylin.com/5006
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-19 09:36:02 +01:00
Omair Javaid
bc94ca241a Support for debugging on ARMv8-M CPUs
This patch adds ARMv8-M CPUs detection logic in ARMv7m target specific code.

Also adds a slightly different watchpoint manipulation logic for ARMv8-M.

This is based on ARMv8-M architecture reference manual.

Tested on ARM Musca A board.

Change-Id: I0652560954ef02c378a7067fab586edf39d3e9cc
Signed-off-by: Omair Javaid <omair.javaid@linaro.org>
Reviewed-on: http://openocd.zylin.com/4997
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-19 09:35:05 +01:00
Antonio Borneo
4dbcb1e79d target/cortex_a: remove dependency from jtag queue
Replace jtag specific API jtag_add_reset() with transport
independent API adapter_{de}assert_reset().

Change-Id: I1b917a4c1205115c4e0315373d81a9305e931258
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4944
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-14 12:10:56 +01:00
Antonio Borneo
18f4ef0f5e target/aarch64: remove dependency from jtag queue
Replace jtag specific API jtag_add_reset() with transport
independent API adapter_{de}assert_reset().

Change-Id: I32c43e2e47366363521fa3f387de9e2fb1c20852
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4943
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-14 12:10:40 +01:00
Antonio Borneo
9879f9bf04 jtag: fix error on TCL command "return" in jtag event handler
The TCL command "return" always returns error code JIM_RETURN, to
indicate that the effective error code and message are elsewhere.

In the current implementation, the caller of jtag's event only
checks for return code JIM_OK and considers any other value,
including JIM_RETURN, as an error condition.

It can be tested running openocd on a jtag target and adding a
jtag event "setup" with a single line "return", e.g.
	openocd -f board/ti_cc3200_launchxl.cfg \
	-c 'jtag configure cc32xx.cpu -event setup return'
to get the message:
	../src/jtag/core.c:1599: Error:
	in procedure 'jtag_init' called at file "../src/jtag/core.c",
	line 1599

Modify jtag_tap_handle_event() to detect the specific return value
of the "return" command and to test the real error code that is,
eventually, specified to the TCL "return" command.

Change-Id: I6d6febc15ef169638afffbffc1810e0b84fcf5c8
Reported-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5199
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-13 12:40:51 +01:00
Antonio Borneo
1af83682e0 target: fix error on TCL command "return" in target event handler
The TCL command "return" always returns error code JIM_RETURN, to
indicate that the effective error code and message are elsewhere.

In the current implementation, the caller of target's event only
checks for return code JIM_OK and considers any other value,
including JIM_RETURN, as an error condition, thus dumping the
call-trace. The execution is not stopped because the error is not
further propagated, but the error message is annoying and
misleading.

It can be tested running
	openocd -f ./test.cfg
using the following script "test.cfg". You can replace the board
file in line 1, to use a board available in your lab:
  1	source [find board/st_nucleo_f4.cfg]
  2	[target current] configure -event reset-start {}
  3	[target current] configure -event reset-end {return}
  4	init
  5	proc a {} {[target current] invoke-event reset-start}
  6	proc b {} {[target current] invoke-event reset-end}
  7	proc c {} {a;b;echo "arrived at the end"}
  8	c
  9	shutdown
The execution produces:
	./test.cfg:7: Error:
	in procedure 'c' called at file "./test.cfg", line 8
	in procedure 'b' called at file "./test.cfg", line 7

	arrived at the end
that shows the call-trace but does not halt the execution.

The developer can avoid using the "return" command in the event
body by defining a TCL procedure that implements the handler and
that contains the "return" command, reducing the handler body to
a simple call to the procedure above. But this approach is either
not documented nor always intuitive while writing the handler,
causing waste of time to look for the false error.

Modify target_handle_event() to detect the specific return value
of the "return" command and to test the real error code that is,
eventually, specified to the TCL "return" command.

Change-Id: I2b860bab7233c6ed13ee4098e348d7533e1c4626
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4974
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-13 12:40:37 +01:00
Tarek BOCHKATI
e6990bdd00 flash/stm32h7x: fix register names to comply with RM0399 Rev2 and RM0433 Rev6
Change-Id: I085d86a2a47f4aeef93a99238e3b80ee294d46df
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5192
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-13 12:40:16 +01:00
Tilman Sauerbeck
8ed19a2e29 jtag: drivers: buspirate: chunk SWD switch sequence transfer.
Commit c2e18bfaea changed the size of the JTAG-to-SWD sequence
from 15 bytes to 17 bytes. This broke SWD switch sequence transfer
for buspirate, since buspirate packets can only hold a payload of up
to 16 bytes and we tried to fit the whole sequence in a single packet.

Splitting up the sequence transfer in appropriately sized packets
makes buspirate SWD work again (successfully tested with buspirate
firmwares v6.1 and v7.0).

Change-Id: Ib5b412b9e77287d705d2762e31c16d30318b50e3
Signed-off-by: Tilman Sauerbeck <tilman@code-monkey.de>
Reviewed-on: http://openocd.zylin.com/5200
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-13 12:39:38 +01:00
Christopher Head
b6fa208759 jtag/drivers/jtag_usb_common: fix typo
Change-Id: If1f56fd5d610b993a4ecbc900fac9f90638037c9
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5202
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-13 12:39:09 +01:00
Tomas Vanek
20396e56b7 target: make target re-configuration possible again
Before commit 877cec20dc
("command: check command mode for native jim commands") all the jim commands
were erroneously treated as they had mode COMMAND_ANY.

The command '$_TARGET configure -xxx' was therefore applicable on running
OpenOCD to change the target configuration. It is handy e.g. for changing
an event handler or changes of the work area.

Change 'configure' command .mode to COMMAND_ANY to make it possible again.

The only parameter which cannot be re-configured after init is -gdb-port.
Test the command mode and refuse setting of gdb port after init.

Change-Id: I88493ac10a46647dc52a88fbc9f8ce6b5ba3bcd0
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5214
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-12 15:15:51 +01:00
Michael Schwingen
7a27423e31 fix XScale register access
since b5964191f0, all XScale-specific registers were missing, breaking
config scripts.

Change-Id: Ia56f3ca17500ba54bd08f417e9a5aaaa8a1be8c4
Signed-off-by: Michael Schwingen <spam-openocd@discworld.dascon.de>
Reviewed-on: http://openocd.zylin.com/5136
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-12 15:15:40 +01:00
Antonio Borneo
48478967db mem_ap: fix format of logged addresses
The macro TARGET_ADDR_FMT, defined in helper/types.h, already
includes the prefix "0x" in front of the hexadecimal number,
being defined as:
	#define TARGET_ADDR_FMT "0x%8.8" TARGET_PRIxADDR
An additional "0x" is present in mem_ap; it prints debug messages
with a double "0x" before the address:
	Debug: 2921 34180 mem_ap.c:153 mem_ap_write_memory():
	Writing memory at physical address 0x0x5000000c; size 4;
	count 1

Remove the incorrect hexadecimal prefix.

Change-Id: I38f19ed2a2f542bd5df53e947a2604f1cbe80e08
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5222
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-12 15:15:29 +01:00
Daniel Goehring
88728abee1 ARMv8: Update rtos_reg storage from 8 to 16 bytes
To support 128 bit registers, the rtos_reg structure value
array needs to be updated from 8 to 16 bytes.

Tested by reading ARMv8 NEON FP regs on an Ampere eMAG 8180 with GDB.

Change-Id: I7f3fe1a5b2def599d021787fbe9cdd51f92859a4
Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Reviewed-on: http://openocd.zylin.com/5209
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-12 15:15:15 +01:00
Florian Fainelli
f935f39cda armv7a_mmu: Add support for decoding Super Sections
The ARMv7-A architecture supports super sections which allows mapping
physical addresses up to 40-bit into a 32-bit virtual address using the
short descriptor format (see ARM DDI 0406C.c section B4.1.112 for
details).

Change-Id: I8e64d0e93e36ae7a7da7b7bf2a8342856bb044f1
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-on: http://openocd.zylin.com/5212
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-12 15:14:50 +01:00
Florian Fainelli
eeabbd58c0 armv7a_mmu: Do not restrict virtual addresses to uint32_t
In preparation for adding super section decoding, do not restrict
armv7a_mmu_translate_va_pa() to 32-bit virtual addresses since ARMv7-A
processors with VMSA extensions (including LPAE) can issue wider
physical addresses. Update casting to uint32_t where necessary.

Change-Id: Id1c3d0d5ac324cbdc334259d9ea75fe4981671a1
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-on: http://openocd.zylin.com/5211
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-12 15:14:44 +01:00
Florian Fainelli
604dded6f1 armv7a_mmu: Remove armv7a_mmu_translate_va()
This function is not used anywhere in the tree, remove it, such that we
only have a single function moving forward that might need to deal with
short vs. long format specifics.

Change-Id: I80e81cd7eba1e028d1afaeaedb675b46c0ca6fa1
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-on: http://openocd.zylin.com/5213
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-12 15:14:37 +01:00
Florian Fainelli
ba11adb833 armv7a_mmu: Check earlier for PAR read
Check earlier that the read of the PAR register was successful instead
of starting the decoding and then checking for an error reading that
register.

Change-Id: Id96c2b2f76d2d1c745fcfa55ad4c1e6db92106f9
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-on: http://openocd.zylin.com/5215
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-12 15:14:27 +01:00
Antonio Borneo
6f87df80fe contrib/rpc_examples: remove 'ocd_' command prefix from haskell example
The prefixed commands has been removed in commit 0840414f0e
("helper/command: do not replace new commands with ocd_ prefix").

Change-Id: I9f101beb85533973041386896bbb215bb141962f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5191
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2019-06-10 20:37:25 +01:00
Marc Schink
c8184bac20 contrib/rpc_examples: Remove 'ocd_' command prefix
The prefix is not necessary anymore.

Change-Id: Ie0df06a70ff51e6719d7564396739d28618b0196
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/5190
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-06-10 20:36:50 +01:00
Tomas Vanek
215f14bec8 target/armv7m: fix register number in armv7m_get_core_reg()
armv7m_get_core_reg() calls arm->read_core_reg()
arm->read_core_reg() expects the register number as an index
to core reglist, not an ARMv7M specific register code.
Use reg->number instead of armv7m_reg->num.

The change solves assert
  src/target/armv7m.c:222: armv7m_read_core_reg: Assertion
  `num < (int)armv7m->arm.core_cache->num_regs' failed.
when gdb 'info reg' is issued on a Cortex-M target and
no cortex_m_debug_entry() has been called since OpenOCD start
(target was halted before OpenOCD start).

Change-Id: I32a2294693ef979b613be93aeceb3b0eb06ee6df
Ticket: https://sourceforge.net/p/openocd/tickets/216/
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5203
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-06-10 20:35:39 +01:00
Antonio Borneo
159f11fefc jtag: set default "jtag_only" to uninitialized transports
For legacy support, drivers that do not define a list of
transports get identified as jtag_only.

Cleanup this old crust and initialize properly the transports
field in the jtag_interface for all the drivers.

Change-Id: I9c86064e5d05bd0212bc18f4424414e615e617fe
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4893
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-06 16:45:31 +01:00
Antonio Borneo
0cba5b4ea3 gdb_server: remove call to jtag_execute_queue()
In the initial commit 6c9b804d61
in 2007's svn://svn.berlios.de/openocd/trunk@246
a target script gdb_program_config was called before gdb flash
programming. To guarantee the script does not left any pending
command in the jtag queue, a call to jtag_execute_queue() was
inserted after the execution of the script.

In following commit ef1cfb2394
in 2008's svn://svn.berlios.de/openocd/trunk@975
the script was replaced by the event "old-gdb_program_config" and
the call to jtag_execute_queue() get executed in every case, even
if the event handler was not present.

At last, commit bb3793c9a4
("target: remove legacy target events") stripped away the
obsolete event but left the call to jtag_execute_queue(), now
completely useless.

Remove the call to jtag_execute_queue() and clean-up the code
around it.

Change-Id: I284f54d656d431ad6cdc25ca18218c09db31bd25
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4911
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-06 16:33:41 +01:00
Antonio Borneo
02cd1e39cc target/cortex_m: remove dependency from jtag queue
Since the first commit 09883194f8 that introduced cortex_m, the
code has a delay of 50ms after srst has been asserted.
The specific delay is implemented through the JTAG_SLEEP command
sent in the jtag queue.

To remove the dependency from the jtag queue, replace the delay
with a transport independent function.

In case of jtag transport, this change keeps the same behaviour
only if the jtag queue has been flushed before the delay. This
does not happen if the call to dap_dp_init(), few lines above,
fails while calling a dap_queue_dp_{read,write}(); in this case
the jtag queue will be flushed later, after the delay, while in
the original code the delay would follow the flushing of the
commands already queued. Anyway, this different behavior would
only happen in case of DAP already not responsive so anticipating
the delay in such error condition is not supposed to add further
problems.

Change-Id: If15978246764e4266b10e707d86c03e5ed907de7
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4912
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-06 16:33:30 +01:00
Antonio Borneo
e5177a5ad4 helper: add bitmap helper primitives
Mainly copied/inspired from Linux kernel code in
- include/linux/types.h
- include/linux/bitmap.h
- include/linux/bitops.h

Change-Id: I317b542993ab81530c86553f339b79505d0fef0f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4894
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-06 16:32:57 +01:00
Antonio Borneo
e26910fdad jtag: simplify management of non-implemented handlers
There is just a single entry point for the jtag API .khz(),
.speed_div(), .power_dropout(), .srst_asserted().

Simplify the code by in-lining the default handler.
The overall code behaviour is not changed.
This change prevents modifying at run-time the content of
struct jtag_interface.

Inspired from change http://openocd.zylin.com/943
by Evan Hunter <ehunter@broadcom.com>

Change-Id: I09aeb76d614db57b1884ac7ee9f00c152cd77849
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4892
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-06 16:21:23 +01:00
Antonio Borneo
7cddeb0af2 swd: remove unused API frequency()
The specific SWD API to change/query the adapter speed is never
called because the equivalent JTAG API is used in place of it.
In the restructure of struct jtag_interface, the JTAG API is
promoted as global adapter API, thus a specific SWD one is not
anymore required.

Change-Id: I1e810d255b4dfcd5791b4fac8ae1260c31a057fd
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4891
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-06 16:20:58 +01:00
Andreas Fritiofson
8b9560349f Convert DEBUG_JTAG_IO to LOG_DEBUG_IO
Change-Id: Ifee9723a57fea93a7022be3299f69680860f236b
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3910
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-04 21:48:39 +01:00
Bohdan Tymkiv
eea508d9af gdb_server: fix GDB_BUFFER_SIZE usage, fix unaligned access during bulk transfers
Currently size of the GDB buffer is 16384 bytes but it is treated as
nul-terminated string in most of the code, so effective size of the
buffer is actually 16383 bytes. OpenOCD responds with `PacketSize=3fff`
to qSupported request. Result of GDB's `m` command is encoded in hex so
each data byte uses two bytes in the buffer. As a result GDB will split
bulk read requests into chunks 0x1fff bytes each. This causes troubles
on targets (or memory regions) which support only aligned, word-sized
access (such as MMIO buffers).

Steps to reproduce (psoc6 target):
gdb> dump binary memory dump.bin 0x040320000 (0x040320000 + 65536)

OpenOCD:
Error: Failed to read memory at 0x40321ffe
Error: Failed to read memory at 0x40321000
Error: Failed to read memory at 0x40323000
Error: Failed to read memory at 0x40325ffe
Error: Failed to read memory at 0x40329ffa
Error: Failed to read memory at 0x40329ffc
Error: Failed to read memory at 0x4032bffc
Error: Failed to read memory at 0x4032dffa

Consolidate GDB_BUFFER_SIZE usage: ensure size of each buffer is
(GDB_BUFFER_SIZE + 1), add explicit comment that additional byte is used
for nul-termination. Report correct size of the buffer to GDB (0x4000)
as recommended in GDB's docummentation: `if the stub stores packets in a
NUL-terminated format, it should allow an extra byte in its buffer for
the NUL`

Checked with clang-asan, clang-analyzer, valgrind - no new errors.

Change-Id: I909e8a2c6b010c5d4a304641808d4a807a4ec18d
Signed-off-by: Bohdan Tymkiv <bhdt@cypress.com>
Reviewed-on: http://openocd.zylin.com/5109
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-04 21:37:41 +01:00
Oleksij Rempel
85ed41d210 jlink: add usb location support
this patch needs latest extended libjaylink version

Change-Id: Ib688ba18740717ccce7863e08c09425975b5f153
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4596
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-31 08:49:38 +01:00
Marc Schink
9655da5aed jtag/drivers/jtag_usb_common: Fix variable name
Change-Id: I3773afa75724dc71801af39cc9135b7b9585bc47
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/5154
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-31 08:49:08 +01:00
Oleksij Rempel
37ad15bcb3 libjaylink: Update to latest Git version
This version introduces jaylink_device_get_usb_bus_ports()

Change-Id: Ib3fea95c3545c1340a6798e100f5ca644ec89510
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-on: http://openocd.zylin.com/4629
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-31 08:48:12 +01:00
Marc Schink
cbf99d2df3 jtag/drivers/jtag_usb_common: Remove warning
The warning appears for every possible device during enumeration
and provides no useful information for an end-user.

Change-Id: I56e7889a5d9d4656de13ad9e21be3a6e1906e05f
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/5155
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-31 08:47:41 +01:00
Leonard Crestez
2288394b45 arm_adi_v5: Split CSW bits into AHB/APB/AXI
The implementation-defined bits have different semantics for each bus
and different recommended defaults.

Change-Id: I562fe24643bb1f3abc696339e382a75ccf2f2873
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-on: http://openocd.zylin.com/5124
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-25 21:50:30 +01:00
Tomas Vanek
51ef02a5d1 target: make handle_md_output() global
Remove a copy of handle_md_output() from src/target/dsp563xx.c

Change-Id: Iadd003fd1dcdbc7990d46a58ee2e7c30826ac6af
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5175
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-05-23 22:16:39 +01:00
Antonio Borneo
9ce5e8bc26 configure.ac: fix minor typo
s/overide/override/

Change-Id: Iecacf0d6839a4d23cb1b029f867d7e1a21d482a4
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5164
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-23 22:14:35 +01:00
Antonio Borneo
545a3de09b guess-rev.sh: fix minor typo
s/reecognized/recognized/

Change-Id: I7129090d464d780632c0b7504e48fb90e847b30d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5163
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-23 22:14:30 +01:00
Antonio Borneo
f9bd26dfe0 HACKING: fix minor typos
s/additonal/additional/
s/seperately/separately/
Use uppercase after a '.'

Change-Id: I933894ae44924363d634fa07d3de4ceeb4b329e2
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5162
Tested-by: jenkins
Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-23 22:14:22 +01:00
Tarek BOCHKATI
5b768b0d39 cortex_m: set the debug reason to DBGRQ when NVIC_DFSR indicates EXTERNAL
By definition the EXTERNAL bit in Debug Fault Status Register indicates
that an external debug request (EDBGRQ) signal was asserted.

Usage example: this could be done by CTI in multicore devices in order to
halt all the cores together.

Change-Id: I7830455ce5da6702b7d08c8fa7bfe80e4d8a5055
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5157
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-23 22:13:41 +01:00
Antonio Borneo
f912649968 helper/command: remove dead code in command_unknown()
Commit 89fa493a3b removes the top
level command "unknown" and adds in command_unknown() some unclear
code that should detect a user-implemented "unknown" command.
But, all the commands that trigger the execution of the function
command_unknown() are registered in register_command_handler() and
have the command name prefixed with "ocd_".
Due to such "ocd_" prefix in cmd_name, the condition
	if (strcmp(cmd_name, "unknown") == 0) { ... }
is always false.
Nobody complained for almost 10 years so we can proceed to remove
this dead code, before merging any change that obsoletes the
prefix "ocd_" and potentially makes the condition true.

Remove the dead code guarded by the condition above.

Change-Id: Icf11a956bb2d68fc84e6eb5779edf8e35db8fa53
Fixes: 89fa493a3b ("remove unknown handler")
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5096
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-23 22:13:09 +01:00
Antonio Borneo
5fbf4d4cc3 target: remove unused function target_buffer_get_u8()
Left unused after commit "target: unify memory read/write
commands", can be removed.

Change-Id: Iea6ef9204c8071283a66a679b3d6edbb0c929c5c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5153
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-23 22:11:30 +01:00
Christopher Head
39504a695f stm32f7x: Use CHIPNAME-specific name for ITCM bank
Change-Id: Icf67eaecd56ac3fb88bcfa2b7084b846109454e6
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5102
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2019-05-23 20:04:25 +01:00
Steven Stallion
11e5f02276 doc/openocd.texi: fix bad aarch64 merge
The documentation added for commit b3d29cb544
was merged after the end of the eSi-RISC section rather than AARCH64.
This patch relocates this hunk to the correct location.

Change-Id: I46a2d24442556e9e8000b46a5e1af03b83de6d98
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/5181
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-05-22 10:33:44 +01:00
Marek Vasut
af952850b5 tcl/target: Fix V3M/V3H SoC chipname
The V3M SoC is R8A77970 while the V3H SoC is R8A77980 . Update the
CHIPNAME and swap the SoCs to keep the list sorted.

Change-Id: I7e1777c0c7181e5e0beac98333f2047cb443d0df
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5140
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-05-20 11:17:05 +01:00
Marek Vasut
82e3a0e7cf tcl/target: Add Renesas RZ/A1H target
Add configuration for the Renesas RZ/A1H target.
This is an SoC with one Cortex A9 ARMv7a core and
up to 10 MiB of on-SoC SRAM.

Change-Id: I20fd54b385fe1ba1cc325451c3fdfa3a835d4884
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5141
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-05-20 11:16:54 +01:00
Marek Vasut
5b053ffd43 tcl/board: Add Renesas RZ/A1H GR-Peach board
Add configuration for the Renesas RZ/A1H GR-Peach board,
which is a cheap development kit for the RZ/A1H SoC.

Change-Id: I7f5596ae47e6dff8e6d06cffd4dddca20f57d0ca
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5142
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-05-20 11:16:42 +01:00
Antonio Borneo
2b78f65aa9 helper/command: print the command output in case of error
In case of error, a command should use command_print() to report
the error message, so it get printed only on the session that run
the command itself, and the message can be intercepted with the
tcl command catch if it has to be handled differently.
Current code drops the command output when the command returns
error, claiming that it's the command that *should* have printed
it already. This is true only if we *abuse* of the LOG functions,
but accepting the side issue of having the LOG printed in every
session and being unable to catch{} the error message.

Since we have switched to command_print(), change the code to
propagate the command output also in case of error.

Change-Id: I95de424a65e63702bdb3b2277749a0ac6aaaa503
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5178
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-17 19:46:13 +01:00
Marc Schink
e162200ab2 Fix 'adapter usb location' documentation
Change-Id: Ifd1d21f2a3cc25ee25e3c7dd04dbb8190d41a1ea
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/5156
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-16 22:39:38 +01:00
Jan Matyas
04ebb43f93 jtag/drivers/imx_gpio: fixed calls to command_print
Two calls to command_print() in imx_gpio fixed - the first parameter
adjusted (CMD_CTX -> CMD) per the changes from this commit:
6cb5ba6f11

Change-Id: I6cb0909439a632d3109edfc68070b9b561f86d49
Signed-off-by: Jan Matyas <matyas@codasip.com>
Reviewed-on: http://openocd.zylin.com/5176
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2019-05-15 08:02:41 +01:00
Antonio Borneo
ea45029829 drivers/bcm2835gpio: fix build for ARM host
The commit 84ca4995ad ("drivers/bcm2835gpio: fix usage messages")
has been merged before commit 6cb5ba6f11 ("helper/command: change
prototype of command_print/command_print_sameline") introducing two
new call to command_print() that were not modified by the second
commit.
This triggers a compile error on ARM host.

Fix the incorrect function call.

Change-Id: I2736bae24141685b7590fd6b4aa5e6a29b2cab29
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5174
Tested-by: jenkins
2019-05-15 05:33:59 +01:00
Jan Matyas
b3d4c97b9f jtag_vpi: fixed state transitions in "stableclocks"
In jtag_vpi_stableclocks() the TMS line needs to be set properly
based on the current JTAG TAP state (TMS=1 in TAP_RESET state vs.
TMS=0 in other cases).

Change-Id: Id49622ba83015f97b61b6a896edde4448f1fbdc6
Signed-off-by: Jan Matyas <matyas@codasip.com>
Reviewed-on: http://openocd.zylin.com/5151
Tested-by: jenkins
Reviewed-by: Franck Jullien <franck.jullien@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-14 20:50:19 +01:00
Megan Wachs
6dab4c70c8 jtag_vpi: correct runtest behavior
Prevent the State Machine from moving at the end
of several cycles during run_test_idle
state.

Change-Id: Iabdf90a58334dd3d0e6e34b02983a85662062825
Signed-off-by: Megan Wachs <megan@sifive.com>
Reviewed-on: http://openocd.zylin.com/3635
Tested-by: jenkins
Reviewed-by: Jan Matyas <matyas@codasip.com>
Reviewed-by: Franck Jullien <franck.jullien@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-14 20:50:03 +01:00
Marc Schink
4f9ad16610 target: Fix breakpoint usage
Change-Id: I28630e5062ffb16939250f7ec7549200f3a9b285
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/5139
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-14 20:03:11 +01:00
Antonio Borneo
92b582ed62 helper/command: fix printing usage for incomplete commands
The commit "helper/command: do not replace new commands with
ocd_ prefix" breaks the print of usage text when a multi-word
command is typed incompletely.

Fix it by explicitly running the "usage" command.

Change-Id: I46f8e521d9b6ac617bff8938cf8fc96f0ade45c8
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5166
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-14 19:42:25 +01:00
Antonio Borneo
c826746068 helper/command: send command output only to the right server
When opening multiple telnet connections, the command output on
one console is broadcast to all the other console.

Send the command output only to the output handler that has been
set for that context.
For the moment, still broadcast the errors.

Note that contexts which doesn't explicitly set the output handler
(e.g. gdb_server), will inherit the global output handler
configuration_output_handler() that will broadcast the output.

Change-Id: I1f2d6e6a3bbf730f5fa77246730fce1445742a1e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5093
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-14 19:40:14 +01:00
Antonio Borneo
31c67cc830 target: fix output of command "targets"
Part of the output is generated with log functions.

Change prototype of find_target() and use command_print() for all
the output of the command.

Change-Id: Ia9fdb653fd5b27be427381053a037545faa34414
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5092
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2019-05-14 19:40:04 +01:00
Antonio Borneo
3605cb9625 tcl/psoc4: remove "ocd_" prefixed commands
The commands prefixed with "ocd_" are removed.
Remove them from configuration files.

Change-Id: Ib44627ee17a39f3d06b479507ab5a025073bf9a8
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5090
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2019-05-14 19:39:25 +01:00
Antonio Borneo
83af3d992e TODO: remove references to "ocd_" prefix in documentation
The commands prefixed with "ocd_" are removed.
No need to review the documentation.

Change-Id: Idad95e62f6c8574ff8b61930aeef04e9727fae8a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5089
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2019-05-14 19:39:19 +01:00
Antonio Borneo
24bfdf53fd doc: remove references to "ocd_" prefixed commands
The commands prefixed with "ocd_" are removed.
Remove any reference in the documentation.

Change-Id: I27cebaa4752752ec8700757bf1c98b267c24f15b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5088
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2019-05-14 19:39:08 +01:00
Antonio Borneo
9eea9cce3f helper/command: remove search for "ocd_" prefix
We do not register commands with special "ocd_" prefix anymore.

Change-Id: I588816eb22c2435a97be5fbfa87ee5584274b02f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5087
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-14 19:39:02 +01:00
Paul Fertser
6da0512092 helper/command: remove command "command type"
Once the wrapper "ocd_bouncer" is removed (which was the only user
of this command), there is no reason to keep the command any
longer.

Remove it.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: I979ce1c147babedb44dd77418751133f589f827c
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5084
Tested-by: jenkins
2019-05-14 19:38:51 +01:00
Paul Fertser
0840414f0e helper/command: do not replace new commands with ocd_ prefix
The TCL return values are now consistent, no need anymore for the
hack of registering the commands with "ocd_" prefix and override
them with proc ocd_bouncer.

Clean-up the command registration and remove the proc ocd_bouncer.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: I2a467e73ecb068686ea3fda91bf961aba6db6427
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5086
Tested-by: jenkins
2019-05-14 19:38:43 +01:00
Paul Fertser
a72561ba91 helper/command: do not capture log in script_command_run()
Command's output should be put in JimTcl result.
We should not anymore capture the log output and pack it as a
JimTcl result.

Remove the log capture feature in script_command_run().

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: Id326c8719e1cee9156d7fc15ae8355ec79a74951
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5085
Tested-by: jenkins
2019-05-14 19:38:37 +01:00
Paul Fertser
7f260f5009 helper/command: Handle Tcl return values consistently
Rationale:

1. There's logging output and there're return values;

2. If a function should return something, it should do it explicitly,
same for logging;

3. Interactive interfaces (telnet, Gdb and Tcl RPC) must always return
the result of the evaluation for the given expression. You can
suppress this output by adding ``; after 0'' to the end of your
expression.

4. Some commands "throw an exception" and if you want to be able to
collect both the return value (when it succeeds) and the log output
(when something goes wrong) you can use do like this:

set log_output [capture "catch {reset_config} return_value"]

So what I'm proposing is following:

1. Every jim_handler command should set the return value the standard
JimTcl way, without any tricks. If it needs to print some logging
output, it should use LOG_* functions.

2. The usual commands (COMMANDS) can easily construct their return
value by appending strings with command_print() and
command_print_sameline(). This required changing "struct
command_invocation" and passing a pointer to it to command_print*
functions.

The code is already functional, please test and comment.

TODO items:

1. Modify all jim_handler commands to properly return or log values
(some of them are commented out for now in this patch).

2. Properly document "capture" command and provide a convenience
function to automate log_output + return_value gathering.

3. Add appropriate Doxygen comments.

4. Add Tcl RPC interface description to the manual, all the example
clients in different languages (from the mailing list) to contrib/.

This change is the core part of http://openocd.zylin.com/1815 from
Paul Fertser. It has been extracted and rebased to simplify the
review and provided again as 1815.

Change-Id: I675c91aa9da1e4e7c6f0a8fe6112a00550b9e4db
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/1815
Tested-by: jenkins
2019-05-14 19:38:22 +01:00
Paul Fertser
2caa3455ad flash/nor: use command_print() in command "flash banks"
The command uses LOG_USER() instead of command_print().
Fix it.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: I92e5e5954a75b96093b3ed6af73a7536c063b639
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5083
Tested-by: jenkins
2019-05-14 19:38:12 +01:00
Paul Fertser
585fcea14a nor/niietcm4: fix indentation
After replace CMD_CTX with CMD, the indentation is incorrect.
Fix it.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: I5d7c40227ceda2e9db8dab88088d74012d2254c4
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5082
Tested-by: jenkins
2019-05-14 19:38:00 +01:00
Antonio Borneo
6cb5ba6f11 helper/command: change prototype of command_print/command_print_sameline
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should switch to CMD as
first parameter.

Change prototype of command_print() and command_print_sameline()
to pass CMD instead of CMD_CTX.
Since the first parameter is currently not used, the change can be
done though scripts without manual coding.
This patch is created using the command:
	sed -i PATTERN $(find src/ doc/ -type f)
with all the following patters:
	's/\(command_print(cmd\)->ctx,/\1,/'
	's/\(command_print(CMD\)_CTX,/\1,/'
	's/\(command_print(struct command_\)context \*context,/\1invocation *cmd,/'
	's/\(command_print_sameline(cmd\)->ctx,/\1,/'
	's/\(command_print_sameline(CMD\)_CTX,/\1,/'
	's/\(command_print_sameline(struct command_\)context \*context,/\1invocation *cmd,/'

This change is inspired by http://openocd.zylin.com/1815 from Paul
Fertser but is now done through scripting.

Change-Id: I3386d8f96cdc477e7a2308dd18269de3bed04385
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/5081
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-14 19:37:11 +01:00
Paul Fertser
6916550938 jlink: change prototype of show_config*() functions
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should be ready to switch
to CMD as first parameter.

Change prototype of show_config*() functions to pass CMD instead
of CMD_CTX.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: I131a904774bf60ad1bf9d90dbc65927c246ac23a
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5080
Tested-by: jenkins
2019-05-14 19:37:00 +01:00
Paul Fertser
7060286175 target/esirisc_trace: change prototype of trace dump functions
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should be ready to switch
to CMD as first parameter.

Change prototype of esirisc_trace_dump*() functions to pass CMD
instead of CMD_CTX.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: Ia43bff112372cbb76e1aea9f59f4a9b6df05c15d
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5079
Tested-by: jenkins
Reviewed-by: Steven Stallion <sstallion@gmail.com>
2019-05-14 19:36:53 +01:00
Paul Fertser
3f8f7352d2 target/esirisc_trace: change prototype of trace analyse functions
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should be ready to switch
to CMD as first parameter.

Change prototype of esirisc_trace_analyze*() functions to pass CMD
instead of CMD_CTX.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: Ie7cfd323fe591a987ea648a20be2bb9c7273dde8
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5078
Tested-by: jenkins
Reviewed-by: Steven Stallion <sstallion@gmail.com>
2019-05-14 19:36:46 +01:00
Paul Fertser
fd66dfb61d target: change prototype of binprint()
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should be ready to switch
to CMD as first parameter.

Change prototype of binprint() to pass CMD instead of CMD_CTX.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: I5ebdc50417d97c791c98ac0cfe2218319809eb7f
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5077
Tested-by: jenkins
2019-05-14 19:36:41 +01:00
Paul Fertser
20184ea861 target: change prototype of handle_bp_command_set()
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should be ready to switch
to CMD as first parameter.

Change prototype of handle_bp_command_set() to pass CMD instead of
CMD_CTX.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: If00f9cfb784b53bb3df92d4469178e2f930a146a
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5076
Tested-by: jenkins
2019-05-14 19:36:34 +01:00
Paul Fertser
fa765f1374 target: change prototype of handle_bp_command_list()
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should be ready to switch
to CMD as first parameter.

Change prototype of handle_bp_command_list() to pass CMD instead
of CMD_CTX.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: Ibff636d476bcd59784ce3da5409d930225cfe637
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5075
Tested-by: jenkins
2019-05-14 19:36:29 +01:00
Paul Fertser
eaa70635dc target: change prototype of handle_md_output()
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should be ready to switch
to CMD as first parameter.

Change prototype of handle_md_output() to pass CMD instead of
CMD_CTX.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: I2150201fad3fd3bc0be89249dcbd314b38a6f860
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5074
Tested-by: jenkins
2019-05-14 19:36:21 +01:00
Paul Fertser
d50e92e7f7 target/arm_adi_v5: change prototype of dap_rom_display()
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should be ready to switch
to CMD as first parameter.

Change prototype of dap_rom_display() and dap_info_command() to
pass CMD instead of CMD_CTX.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: Idb97b20759c03fcecbac1184c354966f469caa5f
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5073
Tested-by: jenkins
2019-05-14 19:36:14 +01:00
Paul Fertser
5a330d1d74 target/etm: change prototype of etmv1_analyze_trace()
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should be ready to switch
to CMD as first parameter.

Change prototype of etmv1_analyze_trace() to pass CMD instead of
CMD_CTX.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: Ic923af5480a54c7272d2ff1abbe235ba941cf1a0
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5072
Tested-by: jenkins
2019-05-14 19:36:08 +01:00
Paul Fertser
0f488acbba target/x86_32_common: change prototype of handle_iod_output()
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should be ready to switch
to CMD as first parameter.

Change prototype of handle_iod_output() to pass CMD instead of
CMD_CTX.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: I67f594c80d6bbbbf6c9567069a545f16877b1e94
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5071
Tested-by: jenkins
2019-05-14 19:36:01 +01:00
Paul Fertser
105cfac552 target/armv7a_cache_l2x: change prototype of arm7a_handle_l2x_cache_info_command()
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should be ready to switch
to CMD as first parameter.

Change prototype of arm7a_handle_l2x_cache_info_command() to pass
CMD instead of CMD_CTX.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: Ib926cd7380ac8b6fb89f64e0a85d81d124633315
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5070
Tested-by: jenkins
2019-05-14 19:35:54 +01:00
Paul Fertser
95caf7714d target/armv7a: change prototype of armv7a_handle_cache_info_command()
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should be ready to switch
to CMD as first parameter.

Change prototype of armv7a_handle_cache_info_command() to pass CMD
instead of CMD_CTX.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: I27f507869cb41c74722a759e69dfd45658fcd4be
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5069
Tested-by: jenkins
2019-05-14 19:35:47 +01:00
Paul Fertser
54ecec2e85 target/armv4_5_cache: change prototype of armv4_5_handle_cache_info_command()
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should be ready to switch
to CMD as first parameter.

Change prototype of armv4_5_handle_cache_info_command() to pass
CMD instead of CMD_CTX.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: Ib6ab3ec2fc6504c2a0635b654697a4b6e12a3750
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5068
Tested-by: jenkins
2019-05-14 19:35:41 +01:00
Paul Fertser
cff570b22f target/dsp563xx: change prototype of handle_md_output()
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should be ready to switch
to CMD as first parameter.

Change prototype of handle_md_output() to pass CMD instead of
CMD_CTX.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: Ib0b84c933689ac8c940c9bbe62d9c95fd015c4f5
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5067
Tested-by: jenkins
2019-05-14 19:35:34 +01:00
Paul Fertser
c867806f0d target/armv8: change prototype of display_cache_info()
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should be ready to switch
to CMD as first parameter.

Change prototype of display_cache_info(),
armv8_handle_inner_cache_info_command() and
armv8_handle_cache_info_command() to pass CMD instead of CMD_CTX.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: I13519c79af82cdba57d5205ba84a5a27fce65a36
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5066
Tested-by: jenkins
2019-05-14 19:35:25 +01:00
Paul Fertser
c779387279 target/xscale: change prototype of xscale_display_instruction()
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should be ready to switch
to CMD as first parameter.

Change prototype of xscale_display_instruction() and of
xscale_analyze_trace() to pass CMD instead of CMD_CTX.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: I8420f19c1b2ff0d2a2f2a8d3627767f7acda437c
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5065
Tested-by: jenkins
2019-05-14 19:35:19 +01:00
Paul Fertser
32470a973f target/xscale: change prototype of xscale_verify_pointer()
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should be ready to switch
to CMD as first parameter.

Change prototype of xscale_verify_pointer() to pass CMD instead of
CMD_CTX.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: Id047fab41ec4f673a46756b0ab901e659e088544
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5064
Tested-by: jenkins
2019-05-14 19:35:12 +01:00
Paul Fertser
7b164d21ba target/mips_m4k: change prototype of mips_m4k_verify_pointer()
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should be ready to switch
to CMD as first parameter.

Change prototype of mips_m4k_verify_pointer() to pass CMD instead
of CMD_CTX.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: I9fa3e883d2ca9cc858caaefd33586f78638702f5
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5063
Tested-by: jenkins
2019-05-14 19:35:02 +01:00
Paul Fertser
42bc2051aa target/mips32: change prototype of mips32_verify_pointer()
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should be ready to switch
to CMD as first parameter.

Change prototype of mips32_verify_pointer() to pass CMD instead of
CMD_CTX.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: Ic4a4de10518ee009d6df420e7278fd028e1f22ca
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5062
Tested-by: jenkins
2019-05-14 19:34:56 +01:00
Paul Fertser
07632ab94c target/cortex_m: change prototype of cortex_m_verify_pointer()
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should be ready to switch
to CMD as first parameter.

Change prototype of cortex_m_verify_pointer() to pass CMD instead
of CMD_CTX.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: Icf6d1e5f8b4a3ce115c4253e49769df19a5211ae
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5061
Tested-by: jenkins
2019-05-14 19:34:49 +01:00
Paul Fertser
c734202dc8 target/arm946e: change prototype of arm946e_verify_pointer()
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should be ready to switch
to CMD as first parameter.

Change prototype of arm946e_verify_pointer() to pass CMD instead
of CMD_CTX.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: Ib7119e2b009d05eec47b50c3b9d32feaebc97538
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5060
Tested-by: jenkins
2019-05-14 19:34:43 +01:00
Paul Fertser
2f3ab89a78 target/arm720t: change prototype of arm720t_verify_pointer()
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should be ready to switch
to CMD as first parameter.

Change prototype of arm720t_verify_pointer() to pass CMD instead
of CMD_CTX.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: I7fa0628fabacd9ceb62ce921192f88edca659c15
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5059
Tested-by: jenkins
2019-05-14 19:34:37 +01:00
Paul Fertser
6a453e5cf0 target/arm966e: change prototype of arm966e_verify_pointer()
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should be ready to switch
to CMD as first parameter.

Change prototype of arm966e_verify_pointer() to pass CMD instead
of CMD_CTX.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: I92745591256ad56a588b6386842028e0b18dec96
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5058
Tested-by: jenkins
2019-05-14 19:34:29 +01:00
Paul Fertser
c104617584 target/arm926ejs: change prototype of arm926ejs_verify_pointer()
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should be ready to switch
to CMD as first parameter.

Change prototype of arm926ejs_verify_pointer() to pass CMD instead
of CMD_CTX.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: Ibbb03429a7fe8b9979f9bb9e513f9eb86aee3b5b
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5057
Tested-by: jenkins
2019-05-14 19:34:22 +01:00
Paul Fertser
fce3b698fb target/arm920t: change prototype of arm920t_verify_pointer()
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should be ready to switch
to CMD as first parameter.

Change prototype of arm920t_verify_pointer() to pass CMD instead
of CMD_CTX.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: I9a603d7c032df91b3913aadb242de89dbed0358e
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5056
Tested-by: jenkins
2019-05-14 19:34:15 +01:00
Paul Fertser
d06b952376 nor/at91sam4: change prototype of get_current_sam4()
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should be ready to switch
to CMD as first parameter.

Change prototype of get_current_sam4() to pass CMD instead of
CMD_CTX.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: I8dfa66f3f6be318d6ba89649279b1b4502f375d9
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5055
Tested-by: jenkins
2019-05-14 19:34:07 +01:00
Paul Fertser
30de1bfda4 nor/at91sam3: change prototype of get_current_sam3()
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should be ready to switch
to CMD as first parameter.

Change prototype of get_current_sam3() to pass CMD instead of
CMD_CTX.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: Ia1e7af79d0fc89d229b4e10df37317a374bbab62
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5054
Tested-by: jenkins
2019-05-14 19:33:58 +01:00
Paul Fertser
962267ba1a nand/tcl: pass CMD to nand_list_walker()
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should be ready to switch
to CMD as first parameter.

Pass CMD instead of CMD_CTX as parameter to nand_list_walker().

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: Ia11887dfc6dc58d5458a88ba84780cd895b8c253
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5053
Tested-by: jenkins
2019-05-14 19:33:51 +01:00
Paul Fertser
dae5a32c05 nand/fileio: change prototype of nand_fileio_start()
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should be ready to switch
to CMD as first parameter.

Change prototype of nand_fileio_start() to pass CMD instead of
CMD_CTX.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: I7993f6aba997a2d2917949563651c8d0c213730d
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5052
Tested-by: jenkins
2019-05-14 19:33:43 +01:00
Antonio Borneo
ce6340d8ce target_request: replace command_print() with command_output_text()
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should be ready to switch
to CMD as first parameter.

When dumping traces or semihosting text, the command that enabled
it is already completed, so CMD is not a valid value.
Plus, we want the dump to be printed in the command context where
the enable command was executed.

Replace command_print() with command_output_text().

Change-Id: I297a2b799a914233499641062407cf6e8b9fe012
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5051
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-14 19:33:34 +01:00
Antonio Borneo
79a92d467d target: unify memory read/write commands
Current code provides two independent implementations for the
memory read/write commands:
a) jim_target_md()/jim_target_mw() for the target specific
   commands "<target> m[dw][bhw]"
b) handle_md_command()/handle_mw_command() for the current target
   commands "m[dw][bhwd]"
The case a) misses the handling of doubleword and calls functions
command_print_sameline() with first parameter NULL because defined
as jim handler.

Remove the code in jim_target_md()/jim_target_mw() and use the
same code in b) for the target specific memory read/write.
This approach also provides support for 64-bit data size, not
present in the implementation in a).
The only drawback is that the implementation of memory read in b)
prints the data also as human readable ASCII characters, feature
missing in the implementation in a). This could introduced later
if it's really needed.

Update the documentation to:
- add 64-bit support
- add phys parameter
- add the count parameter

Add attribute "unused" to target_buffer_get_u8(), now not used
anymore.

Change-Id: Ib11ff924c409ad87e77fe708d628b2cc82b74d6a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5050
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-14 19:33:21 +01:00
Antonio Borneo
b3ce5a0ae5 target: use LOG_USER to print errors in events
Events are supposed to be executed asynchronously and not linked
with any command, so it's incorrect printing out an eventual error
using command_print().
Even in the case of events triggered by the command
	<target> invoke-event <event-name>
the eventual error in the event handler is not propagated to the
command, so the command_print() is still not appropriate.

Replace command_print() with LOG_USER() in target_handle_event().
Add further info in the log to identify which event has generated
the error and its associated target.
Before return, clean-up the error message and the stacktrace from
the error already displayed, to avoid propagate them.

Change-Id: I5966aa25e7c81348f4ad4d6e7ce5d4dee44ea4c8
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5049
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-14 19:33:13 +01:00
Antonio Borneo
74cd25a4d3 target: change prototype of target_process_reset()
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should be ready to switch
to CMD as first parameter.

Change prototype of target_process_reset() to pass CMD instead of
CMD_CTX.
Replace NULL parameter of command_print().
Remove extra newline, already added by command_print().

Change-Id: Ieb820c2586e1ff74a0c2b63a9c8693ca7710dfb7
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5048
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-14 19:33:03 +01:00
Antonio Borneo
84cfb727df helper/command: add macro CMD
Accessing the variable "cmd" in a COMMAND_HANDLER is confusing
because the variable definition is not visible in the prototype,
thus "cmd" can be identified by the reader as a global variable
defined somewhere else.

Add the new macro CMD to make more evident it is a part of the
COMMAND_HANDLER.

Change-Id: I8f63da593a931045cc404323f143b88c5c80ab5e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5047
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-14 19:32:49 +01:00
Tomas Vanek
5e027407e3 target/arm946e: rewrite jim_arm946e_cp15 to arm945e_handle_cp15
jim_arm946e_cp15() used command_print() in the jim handler.

Change-Id: I0a258aad5a60f45672b9b6fa6819691507d4f0f6
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5000
Tested-by: jenkins
2019-05-14 19:32:37 +01:00
Tomas Vanek
1ce51507a1 target: rewrite jim_target_event_list to handle_target_event_list
jim_target_event_list handler used command_print() in jim handler.

Rewriting the jim handler to the OpenOCD command is easy
as get_current_target() returns proper target for prefixed commands since
bb9d9c6026

Change-Id: I3e937249386ca5dbd7a5dd6ebb0ccde0911325d8
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4993
Tested-by: jenkins
2019-05-14 19:32:21 +01:00
Christopher Head
250185c096 stm32h7x: fix incorrect indentation
Change-Id: I5dc16031c38576d853774b6123c93be1e1b4aa96
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5133
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-04 19:45:50 +01:00
Tarek BOCHKATI
7ee618692f flash/nor/stm32h7x: use of wait queue flag instead of the busy flag
Based on RM0433.rev5 > Section 3.3.9 : Flash program operations:
  QW1/2: this bit indicates that a write, erase or option byte change
  operation is pending in the write queue or command queue buffer.
  It remains high until the write operation is complete.
  It supersedes the BSY1/2 status bit.

On this basis, stm32x_wait_status_busy is renamed accordingly to be
  'stm32x_wait_flash_op_queue'

Note : In this commit there is a fix of SR_ERROR_MASK value in flash loader algo
Note : This modification is mandatory for revision X, and backward compatible
  with old revisions

Change-Id: I59d2973317d76b01fbb0fb5e4a472a47d0a7a5b5
Signed-off-by: Laurent LEMELE <laurent.lemele@st.com>
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/4883
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-04 19:44:54 +01:00
Tomas Vanek
f78a7046a9 flash/nor/atsame5: fix typo in dsu_reset_deassert help text
Change-Id: Iebed1a160376717d19c5f56b2553f7d4d1eed3a7
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5095
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2019-05-04 19:44:05 +01:00
Tim Newsome
bbdb820c82 flash/fespi: Use COMMAND_PARSE_ADDRESS
Signed-off-by: Tim Newsome <tim@sifive.com>
Change-Id: If4d22fe1440f926271274820f96428718a127ac2
Reviewed-on: http://openocd.zylin.com/5100
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-04-24 21:11:18 +01:00
Leonard Crestez
c63c73c743 target/imx8m: Cleanup defaults
* Add mem_ap for direct access to axi bus (without halting cpu)
* Mark m4 core with -defer-examine because it's not used by default
* Make a53.0 default target since it's the boot core

Change-Id: Id031533c5d4af346eb08a9ac2532fa1bca602913
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-on: http://openocd.zylin.com/5036
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-24 14:11:46 +01:00
Leonard Crestez
23836fc5be target/imx6ul: Initial support
Unlike the rest of imx6 the 6UL 6ULL 6ULZ chips are based on Cortex-A7
which is at a different address so a custom script is required.

Tested on imx6ull-14x14-evk

Change-Id: I72822d2241045c318389fadbc66d7aaabaaf4cb5
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-on: http://openocd.zylin.com/5040
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-24 14:11:33 +01:00
Leonard Crestez
b13055069c target/imx6sx: Initial support
Unlike the rest of imx6 a Cortex-M4 was added with a second CoreSight
DAP so a separate script is required.

Tested on imx6sx-sdb running linux

Change-Id: I1561910b233015f42508f341175822c0827655ec
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-on: http://openocd.zylin.com/5041
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-24 14:11:22 +01:00
Leonard Crestez
537bbefcbd target/imx7ulp: Initial support
Unlike imx7d/solo supported by imx7.cfg the M4 core is on a different AP
and is always running by default so no -defer-examine is required.

There is also only one Cortex-A7

Tested on imx7ulp-evk

Change-Id: Ifa923d1b9a372c788e6654bc2233fd4d9073a32d
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-on: http://openocd.zylin.com/5043
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-24 14:11:07 +01:00
Antonio Borneo
ae4b2720a4 doc/openocd.texi: fix cross referencing
Commit b04c7c2ca5 adds the cross
reference target "adapter_usb_location", but references it with
the command @xref inside a text, where command @ref should be
used. This triggers a compile warning:
	doc/openocd.texi:2517: warning: `.' or `,' must follow @xref, not c

Replace @xref with @ref and adapt both the text and the command
syntax.

Change-Id: I1520ffecb7d1d375f924492b1884d5b47f399007
Fixes: b04c7c2ca5 ("ftdi: use "adapter usb location" instead of
ftdi_location command")
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5045
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-24 14:10:31 +01:00
Tommy Vestermark
83515b60c9 armv7a: Improve parsing of MPIDR register to avoid error message for Cortex R5
References:
- ARM DDI0406C ARMv7 Architecture Reference Manual, section B4.1.106
- ARM DDI0460D Cortex-R5 Technical Reference Manual section 4.3.6
- ARM 100048_0002_0 Cortex-A73 Technical Reference Manual section 4.5.2

Tested on: TMS570LC4357

Change-Id: Ie0d45fb697697f78cc4ad4e7a0116be9772590ba
Signed-off-by: Tommy Vestermark <tov@vestermark.dk>
Reviewed-on: http://openocd.zylin.com/5108
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-24 14:10:13 +01:00
Alexander Kurz
33281a87b6 tcl/board: Add config for the Amazon Kindle 2 and DX
Add a config to access the Amazon Kindle Model No. D00701 and D00801.
Both ebook readers are based on a Freescale i.MX31. A JTAG interface is
included in a 40 pin FFC connector marked "J9" on both variants.

Change-Id: I58bb1ded3d6706bc3798af488ca8bafb7dc45225
Signed-off-by: Alexander Kurz <akurz@blala.de>
Reviewed-on: http://openocd.zylin.com/3956
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-24 14:10:00 +01:00
Antonio Borneo
f9986394dc target/cortex_a: use extensively cortex_a_wait_dscr_bits()
We have the function to wait for bits in dscr. Use it whenever
possible.

When the bit to test is DSCR_INSTR_COMP, use instead the wrapper
function cortex_a_wait_instrcmpl().

Change-Id: I5c54c239a00f489712af448eb97752210b4b38b8
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5113
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-24 14:09:37 +01:00
Antonio Borneo
d870ecf5ff target/cortex_a: check dscr before timeout
In function cortex_a_wait_dscr_bits() the last read on dscr gets
ignored in case of timeout, even if it finally provides the value
that would trigger a successful return.

Check the returned value before testing the timeout.
Also, print a message on failure reading dscr.

Change-Id: I261ac1545113db39374833a55be911a4da71d893
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5112
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-24 14:09:32 +01:00
Antonio Borneo
d3a9e535d5 target/cortex_a: fix waiting for target halted after step
Depending on adapter speed, the function cortex_a_poll() can take
time to execute and can complete successfully when the timeout is
already expired. Checking the timeout at function return causes a
timeout error while that could be avoided.

Check the target status at cortex_a_poll() return, before checking
for the timeout.

Change-Id: I4c1581f6e718298c566df7b1359255e16e3955d5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5111
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-24 14:09:26 +01:00
Christopher Head
a4ac56152d target/cortex_m: Implement maskisr steponly option
`maskisr steponly` disables interrupts during single-stepping but
enables them during normal execution. This can be used as a partial
workaround for 702596 erratum in Cortex-M7 r0p1. See "Cortex-M7 (AT610)
and Cortex-M7 with FPU (AT611) Software Developer Errata Notice" from
ARM for further details.

Change-Id: I797a14e4d43f6dcb3706528ee4ab452846ebf133
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4673
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2019-04-10 20:05:32 +01:00
Mete Balci
5b263d7b0c fix for sanitizer errors in left shifts
The modified lines cause "runtime error: left shift of <X> by <Y>
places cannot be represented in type 'int'", because integer
literal is cast to int by default.

Change-Id: Ie38119b5eb46ee470e0d149959e523b48ac4d66d
Signed-off-by: Mete Balci <metebalci@gmail.com>
Reviewed-on: http://openocd.zylin.com/5005
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-04-10 16:37:51 +01:00
Marc Schink
d5936dc688 target/riscv: Free registers to avoid memory leak
Tested with SiFive HiFive1 development board.

Change-Id: I96a9a528057fcf9fc54d3da46a672d2cd54c3d5f
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4885
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-04-10 16:37:21 +01:00
Christopher Head
6aae614cc2 flash/stm32h7x: include IO_HSLV in user3_options
Bit 29 of OPTSR is IO_HSLV. It ought to be read in stm32x_read_options
and written in stm32x_write_options. Adjust the bitmasks to do this.

Change-Id: I785a5291c991c98b774177f960dc58f2b5e045e2
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4745
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-04-10 16:36:54 +01:00
Antonio Borneo
6f04bc1568 helper/command: log an error for commands without usage
Every command has been fixed with proper usage field.
Change LOG_DEBUG with LOG_ERROR so a developer will get a visible
alert for missing usage field when adds a new command.

Change-Id: I077c3745fd6265aded8e54b3f9d202d4d6516966
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5026
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-04-10 16:35:41 +01:00
Leonard Crestez
38d053d11b target/imx6: Update list of supported TAPIDs
Copy all SJC TAPIPs from imx6 reference manuals.

Some imx6 chips are based on Cortex-A7 or have an additional Cortex-M4
and need separate scripts.

Change-Id: I3b07d94058c2c5e6313cfc8bb43134a90682a62e
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-on: http://openocd.zylin.com/5034
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-10 10:20:07 +01:00
Leonard Crestez
3b291a369c target/imx6: Fix indentation in DAP_TAPID handling
OpenOCD scripts are usually indented with 4 spaces but here there are 8.

Change-Id: Iaad53e3b377d246d99119bb7bb5fd75d4422f564
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-on: http://openocd.zylin.com/5039
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-10 10:17:17 +01:00
Leonard Crestez
55d53fb64c target/imx6: Add -ignore-version
Looking through imx6 manuals all of them claim that "In follow-on
silicon revisions the ID value is subject to change by incrementing the
first nibble".

Handle this by passing -ignore-version to jtag newtap command.

Change-Id: I7fc4779f9757d527ea20a5174a8c90f919580013
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-on: http://openocd.zylin.com/5031
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-10 10:17:03 +01:00
Leonard Crestez
2fc82eae3c target/imx7: Add ahb mem_ap
This allows bus access even when CPU is off.

Change-Id: I2d5c5581cd0169aecb92ac7b610810988a8dcef4
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-on: http://openocd.zylin.com/5032
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-10 10:16:19 +01:00
Leonard Crestez
84e3f63a8c jtag: tcl: Add cget -idcode
This can be used to dynamically distinguish between similar chips in tcl
code.

Change-Id: Ic4dfb61693e78616355173142dc7f9b9683a9f73
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-on: http://openocd.zylin.com/5033
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-10 10:16:06 +01:00
Christopher Head
ca7ba6b58d Fix incorrect commas in URLs
In Texinfo, a comma inside an @url separates parameters to the @url
function rather than being included as part of a parameter. Use @comma{}
instead to resolve this.

Change-Id: I8b38939462cf4452e5bc2582ee484220aaf83ae0
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5028
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-10 10:10:36 +01:00
Christopher Head
487710da6d Document the mem_ap target type
Change-Id: I56e971b38f20db8c4ad0cdee5cc42b42a25319ea
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5029
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-10 10:10:25 +01:00
Tomas Vanek
1f4596cc46 target: fix copy&paste error in cget -coreid
Command should return target->coreid, not target->working_area_size
Solution appeared as an off topic fix in http://openocd.zylin.com/4935

Change-Id: Ic9701ce2001c75060dbaa75fbd013ed475a352e5
Suggested-by: Graham Sanderson <graham.sanderson@gmail.com>
Reported-by: Tim Newsome <tim@sifive.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5035
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-10 10:10:15 +01:00
Rocco Marco Guglielmi
a3dc54d2d3 topic: Remapped Flash over ITCM region in STM32F7x script
This patch remaps the Flash over ITCM region as virtual to ensure that
any breakpoint placed in this area will be automatically set as an
hardware breakpoint. This patch is a fix to a regression introduced with
changes #4429.

Change-Id: I03d46d8537ef06b33a3d4a2328274667c6481969
Signed-off-by: Rocco Marco Guglielmi <roccomarco.guglielmi@gmail.com>
Reviewed-on: http://openocd.zylin.com/5097
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested-by: jenkins
2019-04-09 09:28:25 +01:00
Antonio Borneo
c19de41a0f helper/command: handle empty "usage" with add_help_text/add_usage_text
By using the command "add_help_text" to add a help text to a TCL
procedure it implicitly creates a new command_registration struct
that has field .usage set to NULL. This triggers a debug message
	BUG: command '%s' does not have the '.usage' field filled out

Use an empty string if usage field is NULL.

Plus, do not annoy the user with a LOG_INFO when the command
"add_usage_text" replaces an empty usage.

Change-Id: I4a72646e0fb704ba354f938d774055540cde3967
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5025
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-04-07 08:19:52 +01:00
Antonio Borneo
b61e454869 Set empty usage field for commands that do not need parameters
The missing field causes runtime debug message
	BUG: command '%s' does not have the '.usage' field filled out

While there, fix some minor typo in the help messages:
	s/deasert/deassert/
	s/Deasert/Deassert/

Change-Id: If3dd18265cda103ca0d05609f67f4ca58e7cbb27
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5024
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-04-07 08:19:34 +01:00
Antonio Borneo
b6ea92247d target/adi_v5_swd: add "usage" field to command "swd"
The missing field causes runtime debug message
	BUG: command 'swd' does not have the '.usage' field filled out

Change-Id: I5a36c0fc822c4d5d74ef2d1c75e369648c6f7d4d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4830
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-04-07 08:19:15 +01:00
Antonio Borneo
fcfbb1792c drivers/at91rm9200: fix help and usage to command "at91rm9200_device"
Add usage and fix the help text of the command

Change-Id: I0e157d76f5d87bcda80f82a110912994908c8e03
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5023
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2019-04-07 08:18:48 +01:00
Antonio Borneo
6e9571164b flash/nor/str9xpec: fix help and usage for command "part_id"
Remove the numeric parameter <bank> from help and add it to usage

Change-Id: I630ca5450955210299f54e16fe5c9e8e51b3b266
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5022
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2019-04-07 08:18:40 +01:00
Antonio Borneo
80ca927ebc flash/nor/at91samd: set usage for command "set-security"
The only allowed parameter is the string "enable"

Change-Id: Iefdad38f1b4177e4194e58caf2be654357299ded
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5021
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-04-07 08:18:25 +01:00
Antonio Borneo
3d59e0f612 drivers/vsllink: add help and usage to commands
Change-Id: I4a8a68147011525191ca79e65fc3d7e760371ae1
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5020
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-04-07 08:18:18 +01:00
Antonio Borneo
84ca4995ad drivers/bcm2835gpio: fix usage messages
The notation "(tck tms tdi tdo)* " is incorrect, because it means the
quadruple of gpio can be repeated on the command-line.
The correct syntax of the command requires instead to provide either
all the four gpio numbers (in order to set the values) or to pass an
empty command-line (to dump the values previously set).

Change the .usage field to "[tck tms tdi tdo]".
Change similarly the corresponding .usage field for SWD command.
Add the .usage field for the commands that individually set each gpio
or gpio property.
Dump the previously set values when commands bcm2835gpio_speed_coeffs
or bcm2835gpio_peripheral_base are executed with empty command-line.

Change-Id: Ie45d8268c1de331aded0bb52d5e6b8f0e8766a5b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5019
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2019-04-07 08:17:58 +01:00
Antonio Borneo
f9056d222c drivers/imx_gpio: fix usage messages
The notation "(tck tms tdi tdo)* " is incorrect, because it means the
quadruple of gpio can be repeated on the command-line.
The correct syntax of the command requires instead to provide either
all the four gpio numbers (in order to set the values) or to pass an
empty command-line (to dump the values previously set).

Change the .usage field to "[tck tms tdi tdo]".
Change similarly the corresponding .usage field for SWD command.
Add the .usage field for the commands that individually set each gpio
or gpio property.
Dump the previously set values when commands imx_gpio_speed_coeffs or
imx_gpio_peripheral_base are executed with empty command-line.

Change-Id: Id56a68622817101bd0a46fed1fead6d2cd2b6ec6
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5018
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-04-07 08:17:48 +01:00
Antonio Borneo
57962f4d1c command_registration: add empty usage field to chained commands
Chained command require a subcommand as first argument. The usage
field for chained commands is not really important because the
"help" command will list all the subcommands with their respective
usage.

Add a empty usage field on all chained command.
The command "jlink config" can be either followed by a subcommand
or used alone, so use a dedicated usage string.

Change-Id: I43c3f8a766f96a9bdab4e709e3c90713be41fcef
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5017
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-04-07 08:17:36 +01:00
Antonio Borneo
a5a882c5c8 target/armv7a: simplify help description of command "l2x"
There is no need to split the string in two lines.

Change-Id: Ifc574904acd06c31fab589643334e86f4dd0a122
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5016
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-04-07 08:15:33 +01:00
Antonio Borneo
c239ee020b flash/xmc4xxx: use coherent indentation in struct initialization
Keep using the same indentation rules while initializing struct
command_registration.

Change-Id: I900924600753ee7a72ca45da13db4112ab4b1522
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5015
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2019-04-07 08:15:10 +01:00
Antonio Borneo
04354fbc59 flash/kinetis: use coherent indentation in struct initialization
Keep using the same indentation rules while initializing struct
command_registration.

Change-Id: Ie69d9d6a786e1ef0abbcfd3eef89a61206238ebe
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5014
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2019-04-07 08:15:01 +01:00
Antonio Borneo
69ba2a677b target/riscv: use coherent syntax in struct initialization
While initializing struct command_registration, the field's name "name"
is not specified, thus relying on the fact that it is the first field
declared in the struct and it's initialization value can be listed as
the first one.

Be coherent in the struct initialization and always use the field's
name.

Change-Id: Iefaeb15cc051db9f1e0f0140fe2f231b45f5bb12
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5013
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
2019-04-07 08:14:50 +01:00
Antonio Borneo
a18c1f289d target/openrisc: use coherent syntax in struct initialization
While initializing struct command_registration, the field's name "name"
is not specified, thus relying on the fact that it is the first field
declared in the struct and it's initialization value can be listed as
the first one.

Be coherent in the struct initialization and always use the field's
name.

Change-Id: I65d32870bf4d3df845db69682fe445c71642f976
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5012
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2019-04-07 08:14:44 +01:00
Antonio Borneo
a5fe9d6e24 target/armv4_5: use coherent syntax in struct initialization
While initializing struct command_registration, the field's name "name"
is not specified, thus relying on the fact that it is the first field
declared in the struct and it's initialization value can be listed as
the first one.

Be coherent in the struct initialization and always use the field's
name.

Change-Id: I9ef7ac08e7cd5b82a6a7896c47017943d668925f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5011
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2019-04-07 08:14:24 +01:00
Antonio Borneo
d303a2864d target/arm7_9_common: use coherent syntax in struct initialization
While initializing struct command_registration, the field's name "name"
is not specified, thus relying on the fact that it is the first field
declared in the struct and it's initialization value can be listed as
the first one.

Be coherent in the struct initialization and always use the field's
name.

Change-Id: I743457acf7757df4646c9bc4e5ea1a6f9c841516
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5010
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2019-04-07 08:14:15 +01:00
Antonio Borneo
6949b5393d log: add const qualifier to commands struct
The struct log_command_handlers[] is never modified.
Add const qualifier to it.

Change-Id: I5785aeb09ae9c23eaf7c34a05b88d0c7285f2d78
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5009
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2019-04-07 08:14:02 +01:00
Paul Fertser
92c50fda2b contrib: rpc_examples: python: fix memory retrieval
mem2array returns a Tcl (associative) array and so the order of elements
is not guaranteed. Treat it as such.

Change-Id: Ie4d1219faac1e60247ca13bc2eedf22041a9a9e9
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4487
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
2019-04-04 21:26:40 +01:00
Peter Lawrence
5202d82a95 tcl_server: fix minor typo in comment
ctrl-z usage is incorrectly commented as ctrl-d

Change-Id: I54fe1775760ee984154bbae380baa38bcaffa04e
Signed-off-by: Peter Lawrence <majbthrd@gmail.com>
Reviewed-on: http://openocd.zylin.com/4863
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-04-03 21:59:59 +01:00
Mete Balci
0627e4686a target/arm_adi_v5: fix typo
Fixed the small typo.

Change-Id: Ia8834b23302d25e92cb2fa0802bebb2a9416595b
Signed-off-by: Mete Balci <metebalci@gmail.com>
Reviewed-on: http://openocd.zylin.com/5001
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-04-03 21:59:16 +01:00
Tomas Vanek
07da3b3913 flash/nor/core.h: clarify comment flash_sector::is_erased
Setting of flash_sector::is_erased in flash erase and mass erase
is popular folklore. Make clear it is useless.

Change-Id: Ide397eb6d24fc8fa38931e6c8a0693d39668a5d2
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4768
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
2019-04-03 21:58:07 +01:00
Antonio Borneo
076802606a helper/startup.tcl: remove proc exit
The TCL command exit is already replaced by the OpenOCD command
exit in server/telnet_server.c, no need to redefine it in the
script.
Moreover, the implementation is broken because the proc ocd_throw
has been removed in mid 2008 with pre-git-era commit dfbb9f3e89
in svn rev 849.

Remove completely the unused proc exit.

Change-Id: I0365d740eccc47631eb459aab77b865b0877c1f7
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4986
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-04-03 21:57:22 +01:00
Florian Fainelli
11a2bfc2bc armv7a_mmu: Remove warning on va = pa
Depending on how the MMU is configured it is possible to have a 1:1
mapping between virtual and physical addresses, thus making this warning
bogus. We already check that the MMU is enabled in the caller:
cortex_a_virt2phys().

Change-Id: I09f4c53ef933c8d1e268da5215a769449be014bc
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-on: http://openocd.zylin.com/5007
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Kamal Dasu <kdasu.kdev@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-03 11:12:16 +01:00
Tomas Vanek
d73de4c07c target/cortex_m: remove target halted check when removing a breakpoint
Remove the target halted check from cortex_m_remove_breakpoint()
as there is no such check in cortex_m_set_breakpoint() and bp can be
safely removed from the running target.

While on it return the error code from cortex_m_unset_breakpoint()
to higher level.

Change-Id: I2b358c3661feed84297913e9f589bdf1e4de7e64
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4887
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Jānis Skujenieks <janis.skujenieks@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
2019-04-03 11:08:51 +01:00
Tomas Vanek
4db5299b5b target/cortex_m: remove fp_code_available counting
fp_code_available looses sync with the real number of free comparators
as soon as cortex_m_set_breakpoint() returns an error. Remove the counter
and always go through the fp_comparator_list to find a free one.

Change-Id: I9f6e06c36d8a57ad11df5155e8a1a3aff6d833a5
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4870
Tested-by: jenkins
Reviewed-by: Jānis Skujenieks <janis.skujenieks@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-01 10:48:51 +01:00
Tomas Vanek
16432e681e target/cortex_m: simplify cortex_m_unset_breakpoint()
Cortex-M uses only 2 byte breakpoint instruction.
cortex_m_unset_breakpoint() does not need to check breakpoint->length,
use the length as the size argument in target_write_memory()

Change-Id: I20bb869f6abce2fc61f0469e34a638bc4dc6f7ce
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4889
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Jānis Skujenieks <janis.skujenieks@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
2019-04-01 09:32:38 +01:00
Christopher Head
a7479fa89d Constify struct flash_driver instances
Instances of struct flash_driver are never written to at runtime. For a
small amount of memory saving and also robustness (fewer things for
stray pointer writes to hit), mark them const.

Change-Id: Iadbbbc2fac0976d892699200000c5f02856729f3
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4803
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-03-27 08:57:14 +00:00
Antonio Borneo
84a2cab596 smp: move sub-command "smp_gdb" in file smp.c
The code for this command is currently replicated in cortex_a and
in mips_m4k and is going to be added again for cortex_m.
Plus, it is going to be obsoleted by the HW thread pseudo RTOS.

Consolidate in smp.c a single instance of the command. This will
simplify both obsoleting it and adding it to cortex_m, whatever
change comes first.

Change-Id: I03cd857e21fa3f7202fdcee36bcbd5aae30a609d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4991
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-03-27 08:56:07 +00:00
Antonio Borneo
246782229f smp: replace commands smp_on/smp_off with "smp [on|off]"
Seams over-engineered having two separate commands to turn SMP
on/off. Plus it is missing the possibility to dump the current
status of SMP and would be weird adding an additional command
for it. Moreover, such commands are replicated in few targets so
it would make sense centralizing them.

- Deprecate the commands "smp_on" and "smp_off".
- Add a new command "smp" that accepts optional parameters
  "[on|off]" and prints the SMP status when run without
  parameters. This replaces the two commands above.
- Put the deprecated and the new command handlers in smp.c
- Update the documentation, except for mips_m4k, since it is not
  available yet.
- Promote the macro foreach_smp_target to global context and use
  it where possible.

Change-Id: Ia72841c1a3bd6edd4db4cc809046322f498617e6
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4615
Tested-by: jenkins
Reviewed-by: Graham Sanderson <graham.sanderson@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-03-27 08:55:03 +00:00
Angus Ainslie
d496da2c20 imx8m: add an m4 target to the imx8m
The imx8m also has a Cortex m4 so add a target for it.

Change-Id: I2abf62b6232c547fe9b12507f459835b11c63a6d
Signed-off-by: Angus Ainslie <angus@akkea.ca>
Reviewed-on: http://openocd.zylin.com/4501
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-03-27 08:53:48 +00:00
Tomas Vanek
21ef7e30d4 flash/nor/core: adjust flash_iterate_address_range_inner() for 64-bit
Use target_addr_t exclusively for comparison of sector boudaries and
address range.

Use the last addres for both address range end and sector end.
It avoids problems with a flash bank mapped at the very end of
target address space.

Change-Id: Idf97c837453d97cbc4cf8a1c76ad799f4142f19e
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4985
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-03-27 08:53:29 +00:00
Tim Newsome
bc72695f67 Lots of RISC-V improvements.
This represents months of continuing RISC-V work, with too many changes
to list individually. Some improvements:
* Fixed memory leaks.
* Better handling of dbus timeouts.
* Add `riscv expose_custom` command.
* Somewhat deal with cache coherency.
* Deal with more timeouts during block memory accesses.
* Basic debug compliance test.
* Tell gdb which watchpoint hit.
* SMP support for use with -rtos hwthread
* Add `riscv set_ir`

Change-Id: Ica507ee2a57eaf51b578ab1d9b7de71512fdf47f
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4922
Tested-by: jenkins
Reviewed-by: Philipp Guehring <pg@futureware.at>
Reviewed-by: Liviu Ionescu <ilg@livius.net>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-03-27 08:53:09 +00:00
Frans-Willem Hardijzer
89f07325f2 stlink: Set speed before entering JTAG/SWD mode
Some boards require a slower clock speed because of passive components on the
JTAG/SWD lines. The previous implementation would first try to discover the
chips on the default speed, and only after discovery switch to the requested
adapter_khz speed.

This patch moves the speed change to just before entering the SWD/JTAG mode,
which should alleviate this problem.

Tested on an STLink V2 clone.

Change-Id: I9734452dcc8bb28d6629e64d9a7e32ef92868cf9
Signed-off-by: Frans-Willem Hardijzer <fw@hardijzer.nl>
Reviewed-on: http://openocd.zylin.com/4818
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-03-26 08:20:06 +00:00
Marek Vasut
b2e56656dc mips32: pracc: Fix indent
Fix indent of the macros in header file, no functional change.

Change-Id: I4d1dba5725155200148d1543c45bad919f6cd37e
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/4995
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2019-03-23 17:43:30 +00:00
Marek Vasut
2b66816a4d mips32: pracc: Fix UPPER/LOWER macros
These macros are missing parenthesis around the argument, which can
lead to side effects, add them. Replace the argument name to avoid
conflict with uint32_t data type, since the macro can be applied to
other data types as well.

Change-Id: I32d2ffec6c062795d7c8bb23d1dfa3378bfc3a58
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/4994
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2019-03-23 17:43:17 +00:00
Marc Schink
8f518d3592 target/mips: Use 'bool' data type
Change-Id: Ifb114bfc062ed7c0ff6e4f37a1a6d546f5415344
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4970
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-03-14 14:20:35 +00:00
Marc Schink
b9eecd9c26 target/xscale: Use 'bool' data type
Change-Id: I4e117f4e6c8c0850f565587f68f41d88da0d6b0b
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4968
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-03-14 14:20:20 +00:00
Marc Schink
489eaadf56 target/dsp563xx: Use 'bool' data type
Change-Id: Ie7ee82bf04c76ef899ae8b19105158e71b69ae2c
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4962
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-03-14 14:20:01 +00:00
Christopher Head
8d748f426c flash/stm32h7x: remove IWDG1_SW separate variable
Bit 4 in OPTSR is IWDG1_SW (the code originally called it IWDG1_HW, but
the reference manual refers to it as IWDG1_SW). This is broken out into
a separate variable, independent_watchdog_selection, in stm32x_options.
However, this is not necessary: bit 4 is included in the user_options
field, which includes all of bits 2 through 7, and
independent_watchdog_selection is not referenced anywhere else. Delete
the field and just rely on user_options to transport that bit, along
with all the other bits it contains, between stm32x_read_options and
stm32x_write_options.

Change-Id: I4da63df9272cf091267b956c412b95671ea1d3c9
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4744
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-03-14 14:18:30 +00:00
Antonio Borneo
0323c9bcbd target/adi_v5_swd: improve error check while updating DP_SELECT
Write to register DP_SELECT can fail, but both functions
swd_queue_dp_bankselect() and swd_queue_ap_bankselect() return
void and do not propagate the error.

Change the return type of the two functions to int and check the
returned value.
Invalidate the cached value of DP_SELECT if the write fails.

Change-Id: Iba6ef8b0c2332e7f7efb66337d558fb7a4a0d39c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4980
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-03-14 14:17:48 +00:00
Antonio Borneo
420a692e0f target/adi_v5_swd: update cached value on write to DP_SELECT
When the register DP_SELECT is written directly, e.g. with command
	<dap> dpreg 8 <value>
the cached value in OpenOCD is not completely updated with the new
value, thus creating issues in the following AP and DP read/write
that rely on the cached value.

Update the cached value while writing to DP_SELECT.

Change-Id: I8221b10cd6fc1fbe73e6b834b68820b43480e1a2
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4979
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-03-14 13:50:49 +00:00
Tomas Vanek
380502d820 target/breakpoints: make internal functions static
While on it add two missing new lines.

Change-Id: I0d54740479bc462b734f91686f0931824796b598
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4888
Tested-by: jenkins
Reviewed-by: Marc Schink <openocd-dev@marcschink.de>
2019-03-12 06:43:49 +00:00
Tomas Vanek
d8e1622e4c flash/nor/tcl.c: use COMMAND_PARSE_ADDRESS
instead of conditional compilation #if BUILD_TARGET64

Change-Id: I005ae0b3a4ed127c0f59219b1c6b185a2c76c76e
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4977
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
2019-03-12 06:43:17 +00:00
Tim Newsome
c3b90c052a flash/nor: use target_addr_t for flash bank base
This should allow users to configure flash at >32-bit addresses.

Change-Id: I7c9d3c5762579011a2d9708e5317e5765349845c
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4919
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-03-08 14:05:35 +00:00
Tim Newsome
57e30102ea gdb_server, target: Add target_address_bits()
Targets can use this to expose how many address bits there are.
gdb_server uses this to send gdb the appropriate upper limit in the
memory-map. (Before this change the upper limit would only be correct
for 32-bit targets.)

Change-Id: Idb0933255ed53951fcfb05e040674bcdf19441e1
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4947
Tested-by: jenkins
Reviewed-by: Peter Mamonov <pmamonov@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-03-08 14:05:19 +00:00
Matthias Welwarsky
85ba2dc4c6 rtos/hwthread: add hardware-thread pseudo rtos
This patch adds "hwthread", a pseudo rtos that represents cpu cores
in an SMP system as threads to gdb. This allows to debug SMP
system kernels in a more sensible manner and removes the current
atrocities of switching gdb manually between CPU cores to update
the context.

Change-Id: Ib781c6c34097689d21d9e02011e4d74a4a742379
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3999
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Graham Sanderson <graham.sanderson@gmail.com>
2019-03-08 12:54:47 +00:00
Antonio Borneo
56568b7996 drivers/stlink_usb: use command STLINK_DEBUG_APIV2_READ_IDCODES
API v2 deprecates using command STLINK_DEBUG_READCOREID to read
the core ID.
Switch to STLINK_DEBUG_APIV2_READ_IDCODES on new stlink firmware
version.

Change-Id: Iabadfc116c57f2c31f08f2e77baefea0cf90bdc3
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4826
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-03-08 07:06:28 +00:00
Antonio Borneo
05c6c871e3 drivers/stlink_usb: check error code returned by st-link
Most of ST-Link commands return an error code, but this is almost
never checked.

Check for the error code for every command that returns it.

Change-Id: Ifc4e32f8c73196de23700ba0989bfdfe0f5b46e3
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4825
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-03-08 06:41:37 +00:00
Antonio Borneo
d46b28983d drivers/stlink_usb: fix stlink_usb_read_regs() for API v2
API v2 implementation for command READALLREGS returns the status
in the first two bytes, followed by two bytes of padding.
This makes the reply 4 bytes longer and changes the offset of the
first register value to 4.

Fix it for the case API v2 and clean-up the management of the
return value.

Change-Id: I448c82bcc0baa72d66fdfe7f0c525b94f8a4468b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4824
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-03-08 06:01:52 +00:00
Antonio Borneo
720380f9e3 stlink: handle error GET_IDCODE
When the connection with target is lost on the physical JTAG/SWD
link (either wire disconnected or DAP/TAP in reset), STLINK fail
to connect and returns error STLINK_JTAG_GET_IDCODE_ERROR.

Add it in the list of known errors.

Change-Id: Iabd6e6892111726f614345497d9286554bfe4ac0
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4982
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2019-03-07 21:00:53 +00:00
Antonio Borneo
5c55fbb065 stlink: handle error bad-AP
The new firmwares for ST-Link support handling multiple AP, but
are (actually) limited to the AP number in range [0..8].
Any tentative to operate on AP number higher than 8 returns an
error "bad AP".
Add the error code and the related message.

Change-Id: I78a98b2612d10e580d03fc43ed9f2b09619d39d8
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4981
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2019-03-07 21:00:41 +00:00
Marc Schink
e243075962 target/openrisc/x86_32_common: Use 'bool' data type
Change-Id: I395a36ddd7ac7e85bc54f6bb073a93b0c6f24db0
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4972
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-03-06 16:21:06 +00:00
Marc Schink
6431a85b0a target/openrisc/or1k: Use 'bool' data type
Change-Id: I6393bb8503d64947a1f2349e1d14c1552cabf927
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4971
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-03-06 16:20:32 +00:00
Marc Schink
c69da2eb0c target/lakemont: Use 'bool' data type
Change-Id: I9baaf617c2bfabd07ac3ca195e486893d7950398
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4969
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-03-06 16:19:28 +00:00
Marc Schink
ffd8e2b630 target/feroceon: Use 'bool' data type
Change-Id: I30b8d07ee198e8f67cd98f83c4bec15bcfe8be08
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4967
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-03-06 16:17:24 +00:00
Marc Schink
61a55f6278 target/etb: Use 'bool' data type
Change-Id: I536036b15af10bb1879dbbec84576134fd3dce35
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4966
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-03-06 16:16:59 +00:00
Marc Schink
0118dc5e47 target/arm_semihosting: Use 'bool' data type
Change-Id: I05245b7dc9c37ea8e0e40672070fb3e87cb7683f
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4965
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-03-06 16:16:29 +00:00
Marc Schink
8be87420db target/embeddedice: Use 'bool' data type
Change-Id: I0f237e0769786aa560d1a472a71499d3856ab25c
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4964
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-03-06 16:15:56 +00:00
Marc Schink
8795090edc target/cortex_a: Use 'bool' data type
Change-Id: I055767f1c20af539159ee59e35de8dd20b399fa4
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4963
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-03-06 16:15:23 +00:00
Marc Schink
5db10c0559 target/avr32_ap7k: Use 'bool' data type
Change-Id: I49f1a6c6ee6d175935eb40b49abf8ebdf56a0b6e
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4961
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-03-06 16:14:36 +00:00
Marc Schink
bc1f5cabc0 target/arm926ejs: Use 'bool' data type
Change-Id: I3016a8ba37942d674017c09e4540d9813c832872
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4960
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-03-06 16:14:11 +00:00
Marc Schink
fc8885a9c3 target/arm920t: Use 'bool' data type
Change-Id: I5f2c95d9a4bdb14cc31d72eb026f58710fb07db5
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4959
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-03-06 16:13:55 +00:00
Marc Schink
7fafb3e961 target/arm720t: Use 'bool' data type
Change-Id: I9838d0d0ba472f029169ab37597ef367a6084fbf
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4958
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-03-06 16:13:33 +00:00
Marc Schink
7779c8f7ac target/aarch64: Use 'bool' data type
Change-Id: Ibfe4413b88ed0759a556a8777dac40f0c2c64922
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4957
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-03-06 16:13:16 +00:00
Marc Schink
093f9d1c85 target/armv8: Use 'bool' data type
Change-Id: I65def33f24187ab336db5732ce35200ca5cd8f5f
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4956
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-03-06 16:13:00 +00:00
Marc Schink
8c8c93c185 target/armv7m: Use 'bool' data type
Change-Id: I9cfbba9d81601cc72e2b54ec410e21c7edc4f1c4
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4955
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-03-06 16:11:49 +00:00
Marc Schink
31a3e35348 target/arm11: Use 'bool' data type
Change-Id: Ia09adeab88eaf66c009f94be25ab82b0b8f88f61
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4954
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-03-06 16:10:33 +00:00
Marc Schink
ae02b84cf8 target/armv7_9_common: Use 'bool' data type
Change-Id: I5af27247f39cf47c925260784e21292f34665471
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4953
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-03-06 16:10:20 +00:00
Marc Schink
de58a6d1b7 target/armv4_5: Use 'bool' data type
Change-Id: I82e3963ea662844bb96943aee849dab35ea96bb3
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4952
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-03-06 16:10:04 +00:00
Marc Schink
92f51c50ae target/register: Use 'bool' data type
Change-Id: I3633ced9cb2bfe6afb0ef49aa42fd1b54f155a66
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4951
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-03-06 16:09:44 +00:00
Marc Schink
351ef7bf3c target/cortex_m: Use 'bool' instead of 'int'
Change-Id: I273d24997e2c844015e144a15981f8f0af522261
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4950
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-03-06 16:09:22 +00:00
Marc Schink
f426d8dd33 target: Remove unused variable 'has_percent'
Change-Id: Ib080fc33e8a0305990ee334019547e7643c446ac
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4949
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-03-06 15:39:18 +00:00
Antonio Borneo
d470b84b51 helper/command: return proper JIM error code
The function command_unknown() is expected to return a value
recognized as JIM error code, as it is correctly done in the
other cases it returns.

Fix the only case in which command_unknown() does not return
a JIM error code, by s/ERROR_FAIL/JIM_ERR/

Change-Id: Ib98b75755ae36870bd68c17f8839ddbfa06c6312
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4973
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-03-06 15:38:07 +00:00
Antonio Borneo
79a8594130 stlink: remove unused assignment
Fix a warning identified by clang 7.0.1:
stlink_usb.c:1092:3: warning: Value stored to 'p' is never read
	p += sprintf(p, "S%d", swim);
	^    ~~~~~~~~~~~~~~~~~~~~~~~

Change-Id: Ic9da57e19ceecb0e3d65d3ea3412a05e1c2c779a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4945
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-03-06 15:36:14 +00:00
Antonio Borneo
334c5096eb gdb_server: fix 'null' pointer passed as 'nonnull' parameter
The null pointer used as second parameter to gdb_put_packet() is
passed as second parameter to the memcpy() in line 408 of
gdb_put_packet_inner(). In this case memcpy() does not segfault
because also the parameter length is zero. Nevertheless, the
prototype of memcpy() requires a nonnull pointer.

Fixed by passing an empty string in place of the null pointer.

Issue highlighted by clang 7.0.0 with warning message:
"Null pointer passed as an argument to a 'nonnull' parameter"

Change-Id: Ib3dde95d76fcc5fb245ee2d6669e5535d0e0b127
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4946
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-03-06 15:35:16 +00:00
Diego Herranz
4db695c66c src/jtag/drivers/ftdi: fix swd pin comment and links
- TDI/DO is not pin 2 and in fact, we don't even need to mention which
pin number it is. "TDI/DO pin" is descriptive enough.

- FT2232D link didn't work anymore. It could have been updated to the
current working FT2232D link but changed to link the FT2232H instead
which is the latest generation and the most commonly used these days.

- Taking advantage of the change, link to the MPSSE document updated.
It still worked but through a redirection, so updated just in case the
redirection stops working.

Change-Id: Ia7d01bbcac2158026831edb010a6b50f58351e42
Signed-off-by: Diego Herranz <diegoherranz@diegoherranz.com>
Reviewed-on: http://openocd.zylin.com/4908
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2019-03-05 08:04:47 +00:00
Antonio Borneo
45d90aa380 gdb_server: remove warning for stepi after gdb_sync
The command "gdb_sync" is used to resynchronize gdb with OpenOCD.
It is supposed to be follow by the gdb command "stepi" that will
be ignored by OpenOCD.

Don't annoy the user with a warning message when the stepi
command is ignored, but simply log a debug message.

Change-Id: Ie4cffa89e761d7335e5961900b62e31f209d4b1b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4764
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-03-04 20:02:19 +00:00
Matthias Welwarsky
db429c34d0 armv8: allow halt on exception
add command 'catch_exc' to halt a core on entering any of Secure EL1 or
EL3 or Non-Secure EL1 or EL2.

Change-Id: I0c68e247af68dd96616855a9bc1063c277d222e5
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4479
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-03-04 11:53:00 +00:00
Marc Schink
21687eb983 Use enum for target_register_timer_callback()
Change-Id: I268e8c5d783914aa97cbde301448b2c5bc3cb9e6
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4921
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-03-01 08:32:03 +00:00
Marc Schink
17a052d6fe target: Use proper data types for timer callback
Change-Id: I5ca6da767f9e96180c43b179b2c682b1b7c98563
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4920
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-03-01 08:31:50 +00:00
Moritz Fischer
f21c12abec flash: stm32f2/f4/f7: Add One-Time-Porgrammable (OTP) support
The OTP is part of the flash memory. It has 512 (1024 for F7) bytes
and is organized in 16 sectors with 32 (64 for F7) bytes each.
The OTP is exposed as separate flash bank 1 and can be used
with the usual flash commands.

Writing the OTP can be done as follows:

> stm32f2x otp 1 enable
> flash write bank 1 foo.bin 0
> mdw 0x1fff7800 4
> verify_image foo.bin 0x1fff7800
> stm32f2x otp 1 disable

Note: This patch is largely a rebase/cleanup of a patch
from 2012 by Laurent Charpentier and he did most of the work.

No new Clang-Analyzer warnings.

Change-Id: I5e6371f6a7c7a9929c1d7907d6ba4724f9d20d97
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Reviewed-on: http://openocd.zylin.com/829
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-02-27 00:16:50 +00:00
Paul Fertser
2c76f1ac0e jtag: drivers: cmsis-dap: correct vendor request code
While at it, change the macro name to make it obvious it's a string,
not some numeric ID. This also matches ARM code that's using

Change-Id: Id35ba5b95cef0ac77657c40985b24c1ae2720748
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3855
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-02-25 23:53:48 +00:00
Antonio Borneo
f473f84840 aarch64: fix a potential memory leak in aarch64_target_create()
If the function aarch64_target_create() exits for an error, the
value of pointer aarch64 get lost, causing a memory leak.

Move the allocation of aarch64 after the check on the parameters.
While there, add a check on the value returned by calloc().

Issue highlighted by clang 7.0.0.

Change-Id: Ib9ad27f4acd940da308c01fdbf33cfe51ab0c639
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4924
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-02-25 21:54:22 +00:00
Antonio Borneo
1c6f7075f7 mem_ap: fix a potential memory leak in mem_ap_target_create()
If the function mem_ap_target_create() exits for an error, the
value of pointer mem_ap get lost, causing a memory leak.

Move the allocation of mem_ap after the check on the parameters.
While there, add a check on the value returned by calloc().

Issue highlighted by clang 7.0.0.

Change-Id: Ia2c11b14fde9694f28bf6efe01d278923db0f0d4
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4923
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-02-25 21:53:59 +00:00
Antonio Borneo
3b39618eb5 cortex_a: fix a potential memory leak in cortex_a_target_create()
If the function cortex_a_target_create() or the function
cortex_r4_target_create() exit for an error, the value of pointer
cortex_a get lost, causing a memory leak.

Move the allocation of cortex_a after the check on the parameters.
While there, add checks on the value returned by calloc().

Issue highlighted by clang 7.0.0.

Change-Id: Ic6eeb9c3b39922d016f6d0319eada1a97a6681f0
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4925
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-02-25 21:53:30 +00:00
Tomas Vanek
6f66267f85 server: fix small mem leak of bindto_name
Change-Id: Ib9c8003e164a156f1c4d3cde47e4158d867d82c6
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4909
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-02-21 07:49:08 +00:00
Armin van der Togt
a4d50544de Fix support for single-bank stm32l4 processors
Recent patches for STM32L4+ assumed all STM32L4 processors have a dual-
bank option. This is not the case for STM32L4{3,4,5,6}xx processors and
therefore, these processors (like STM32L433) failed when attempting to
flash the second half of the flash memory. This patch fixed this issue.
Tested on STM32L433xC, STM32L476xG and STM32L471xG.

Change-Id: I8262ba4f05190802c5868d753f3e7af50e581811
Signed-off-by: Armin van der Togt <armin@otheruse.nl>
Reviewed-on: http://openocd.zylin.com/4913
Tested-by: jenkins
Reviewed-by: Peter Tettelaar <peter@float-iot.nl>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Mark Schulte <mschulte@lyft.com>
2019-02-21 06:19:55 +00:00
Oleksij Rempel
b04c7c2ca5 ftdi: use "adapter usb location" instead of ftdi_location command
Use unified "adapter usb location" instead of driver specific
command.

Change-Id: I568a76b87d09cea0f40f1580cf81f7c51402f6f1
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-on: http://openocd.zylin.com/4771
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-02-19 08:53:47 +00:00
Tomas Vanek
fd8a3c9516 target, breakpoints: improve error handling
handle_bp_command_set() showed the error message
"Failure setting breakpoint, the same address(IVA) is already used"
on any error returned from (xxx_)breakpoint_add().
Paradoxically breakpoint_add() returned ERROR_OK if it detected
duplicated bp address.
context_breakpoint_add() and hybrid_breakpoint_add() returned -1
instead of OpenOCD compatible error if they detected duplicity.

Introduce ERROR_TARGET_DUPLICATE_BREAKPOINT
Unify error handling to LOG_ERROR() any error in (xxx_)breakpoint_add()
Remove misleading error messages from handle_bp_command_set()
handle_bp_command_set() returns error if the target does not implement
add_context_breakpoint or add_hybrid_breakpoint.

Change-Id: If17dfad1756d82a77028ebdc4b305f9c8e1365ba
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4871
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-02-15 13:09:53 +00:00
Oleksij Rempel
1c22f5b7de doc: fix typo in "adapter usb location" command
Change-Id: If959c5461904cdf4bcdf1887a9afaa9c2c94282b
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-on: http://openocd.zylin.com/4907
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-02-14 14:31:49 +00:00
Tomas Vanek
dd9b7296bd doc/openocd.texi: fix xref warning
Xref without trailing '.' or ',' was introduced in
deaf3d2641

Change-Id: I99afd40e1ffeddd1298b7b07e4deba3dcc41799f
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4905
Tested-by: jenkins
2019-02-14 09:29:00 +00:00
Marc Schink
a851b91c4c target/riscv-011: Fix memory leak in handle_halt_routine()
Tested with SiFive HiFive1 development board.

Change-Id: Ie0d9fa0899804d17ccdd84b03ba4028e97b632b8
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4884
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-02-14 09:28:33 +00:00
Marc Schink
6c2020eb48 jlink: Use correct SWD buffer size
Currently, the SWD buffer size is adjusted corresponding to the free
device memory. However, the adjusted size is not used.

This fixes SWD operations on devices with small device memory, such as
EFM32PG12 Pearl Gecko STK. It should also fix #184.

Change-Id: I2ec5cf25c62f18bd9e99a2f4aa1aa8d85ed0821b
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4878
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2019-02-07 19:32:41 +00:00
Antonio Borneo
d869c5d3d7 drivers/bitbang: remove unused extern declaration of jtag_interface
After commit a6c4eb0345 ("swd: Remove DAP from parameter list")
the global variable jtag_interface is not referenced in the driver.

Remove the extern declaration.

Change-Id: I72018a59c9cecaa52d9a49ec0d7816ac0e656314
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4874
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2019-02-07 19:32:14 +00:00
Antonio Borneo
3117a318d4 command: fix the mode for command "jtag configure"
Before commit 877cec20dc ("command:
check command mode for native jim commands") all the jim commands
were erroneously treated as they had mode COMMAND_ANY.
The commit above fixes the code in order to check the mode and
permit running the commands only if the mode is respected.

Those jim commands that have incorrect mode were not detected nor
fixes because the wrong mode was masked by the missing mode check.
After the commit above, the wrong mode triggers error in several
existing configuration scripts.
A complete list of commands that now does not run anymore as
CONFIG_ANY is reported in ticket 225, but most of them have the
mode set correctly.
At least two instances of command "jtag configure" have the wrong
mode.

Fix the mode to CONFIG_ANY for command "jtag configure" in files
src/jtag/aice/aice_transport.c and src/jtag/tcl.c

Change-Id: I3f96c5fd24d7d463712cbaf1295284fe0dc56b23
Ticket: https://sourceforge.net/p/openocd/tickets/225/
Reported-by: Bill Paul <wpaul@users.sourceforge.net>
Fixes: 877cec20dc ("command: check command mode for native jim commands")
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4886
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2019-02-07 19:01:15 +00:00
Oleksij Rempel
20ceec69a2 doc: add documentation for "adapter usb location" command
Change-Id: Ia3fbe0c3894b1b96464bbfda5d4101123827b761
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-on: http://openocd.zylin.com/4769
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-02-07 09:04:59 +00:00
Tomas Vanek
9f021c2bc1 target/cortex_m: fix clang static analyzer warning
Fix "Potential leak of memory pointed to by 'cortex_m'"
and test for NULL return from calloc in cortex_m_target_create()

Change-Id: I4d2bb5bccc57f0ed60696f3d588297a858b8ea60
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4881
Tested-by: jenkins
Reviewed-by: Moritz Fischer <moritz.fischer@ettus.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-02-07 08:03:18 +00:00
Tomas Vanek
96903e6df4 target/hla_target: fix clang static analyzer warning
Added an error msg in case of no memory

Change-Id: I7a7d266ca4aa1e4a0ff02a2d1cc672a3cd2746c3
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4882
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-02-07 08:02:57 +00:00
Kevin Vermilion
ecc2f4a694 at91samd: Add flash programming support for SAMC2?N* parts
Added id, name, flash size and RAM size for following parts to samc20_parts[]:
SAMC20N18A
SAMC20N17A
And the following to samc21_parts[]:
SAMC21N18A
SAMC21N17A

Change-Id: Ie8cf1c531a60bfaed6e814d436d232afb89dae3f
Signed-off-by: Kevin Vermilion <kevin.vermilion@gmail.com>
Reviewed-on: http://openocd.zylin.com/4880
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-02-07 08:02:10 +00:00
Jean-Christian de Rivaz
740c3ec238 target start_algorithm: Don't copy the IN mem_params fix uninitialised value.
Fix the write only out params TODO on armv7m.c
Fix conditional move depends on uninitialised value.
It was detected while programming a LPC8Nxx with a FTDI adapter.
valgrind --leak-check=full --show-leak-kinds=all --track-origins=yes
[...]
==8696== Conditional jump or move depends on uninitialised value(s)
==8696==    at 0x16E4D3: buf_set_u32 (binarybuffer.h:52)
==8696==    by 0x16E4D3: ftdi_swd_queue_cmd (ftdi.c:1206)
==8696==    by 0x18D76D: swd_queue_ap_write (adi_v5_swd.c:271)
==8696==    by 0x18E33B: dap_queue_ap_write (arm_adi_v5.h:382)
==8696==    by 0x18E33B: mem_ap_write (arm_adi_v5.c:420)
==8696==    by 0x197CD9: target_write_buffer_default (target.c:2176)
==8696==    by 0x2464B3: armv7m_start_algorithm (armv7m.c:383)
==8696==    by 0x246AEB: armv7m_run_algorithm (armv7m.c:330)
==8696==    by 0x19D846: target_run_algorithm (target.c:814)
==8696==    by 0x1DF3A6: lpc2000_iap_call.isra.3 (lpc2000.c:818)
==8696==    by 0x1E0CF6: lpc2000_erase (lpc2000.c:992)
==8696==    by 0x185BDF: flash_driver_erase (core.c:44)
==8696==    by 0x18650D: flash_iterate_address_range_inner (core.c:541)
==8696==    by 0x18650D: flash_iterate_address_range (core.c:567)
==8696==    by 0x18732F: flash_erase_address_range (core.c:584)
==8696==    by 0x18732F: flash_write_unlock (core.c:928)
==8696==  Uninitialised value was created by a heap allocation
==8696==    at 0x4C2BBAF: malloc (vg_replace_malloc.c:299)
==8696==    by 0x220EF9: init_mem_param (algorithm.c:30)
==8696==    by 0x1DF247: lpc2000_iap_call.isra.3 (lpc2000.c:777)
==8696==    by 0x1E0CF6: lpc2000_erase (lpc2000.c:992)
==8696==    by 0x185BDF: flash_driver_erase (core.c:44)
==8696==    by 0x18650D: flash_iterate_address_range_inner (core.c:541)
==8696==    by 0x18650D: flash_iterate_address_range (core.c:567)
==8696==    by 0x18732F: flash_erase_address_range (core.c:584)
==8696==    by 0x18732F: flash_write_unlock (core.c:928)
==8696==    by 0x18ACDF: handle_flash_write_image_command (tcl.c:457)
==8696==    by 0x1B7D99: run_command (command.c:623)
==8696==    by 0x1B7D99: script_command_run (command.c:208)
==8696==    by 0x1B7FD9: command_unknown (command.c:1033)
==8696==    by 0x2E2D37: JimInvokeCommand (jim.c:10364)
==8696==    by 0x2E3865: Jim_EvalObj (jim.c:10814)
==8696==
==8696== Conditional jump or move depends on uninitialised value(s)
==8696==    at 0x16E506: buf_set_u32 (binarybuffer.h:52)
==8696==    by 0x16E506: ftdi_swd_queue_cmd (ftdi.c:1207)
==8696==    by 0x18D76D: swd_queue_ap_write (adi_v5_swd.c:271)
==8696==    by 0x18E33B: dap_queue_ap_write (arm_adi_v5.h:382)
==8696==    by 0x18E33B: mem_ap_write (arm_adi_v5.c:420)
==8696==    by 0x197CD9: target_write_buffer_default (target.c:2176)
==8696==    by 0x2464B3: armv7m_start_algorithm (armv7m.c:383)
==8696==    by 0x246AEB: armv7m_run_algorithm (armv7m.c:330)
==8696==    by 0x19D846: target_run_algorithm (target.c:814)
==8696==    by 0x1DF3A6: lpc2000_iap_call.isra.3 (lpc2000.c:818)
==8696==    by 0x1E0CF6: lpc2000_erase (lpc2000.c:992)
==8696==    by 0x185BDF: flash_driver_erase (core.c:44)
==8696==    by 0x18650D: flash_iterate_address_range_inner (core.c:541)
==8696==    by 0x18650D: flash_iterate_address_range (core.c:567)
==8696==    by 0x18732F: flash_erase_address_range (core.c:584)
==8696==    by 0x18732F: flash_write_unlock (core.c:928)
==8696==  Uninitialised value was created by a heap allocation
==8696==    at 0x4C2BBAF: malloc (vg_replace_malloc.c:299)
==8696==    by 0x220EF9: init_mem_param (algorithm.c:30)
==8696==    by 0x1DF247: lpc2000_iap_call.isra.3 (lpc2000.c:777)
==8696==    by 0x1E0CF6: lpc2000_erase (lpc2000.c:992)
==8696==    by 0x185BDF: flash_driver_erase (core.c:44)
==8696==    by 0x18650D: flash_iterate_address_range_inner (core.c:541)
==8696==    by 0x18650D: flash_iterate_address_range (core.c:567)
==8696==    by 0x18732F: flash_erase_address_range (core.c:584)
==8696==    by 0x18732F: flash_write_unlock (core.c:928)
==8696==    by 0x18ACDF: handle_flash_write_image_command (tcl.c:457)
==8696==    by 0x1B7D99: run_command (command.c:623)
==8696==    by 0x1B7D99: script_command_run (command.c:208)
==8696==    by 0x1B7FD9: command_unknown (command.c:1033)
==8696==    by 0x2E2D37: JimInvokeCommand (jim.c:10364)
==8696==    by 0x2E3865: Jim_EvalObj (jim.c:10814)

Change-Id: I50f9a8c4516b686cf62ac3c76f47c53465e949da
Signed-off-by: Jean-Christian de Rivaz <jcamdr70@gmail.com>
Reviewed-on: http://openocd.zylin.com/4811
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-02-07 08:01:25 +00:00
Jan Vojtech
9f576d3f48 flash/nor/stm32f1x: Ability to change user option bytes.
Adds ability to change the user data in STM32F1x/STM32F3x MCU's option byte.
Since OpenOCD prints the content of user data in option byte registers, it
is seems logical to also provide a way how to change this data.

Change-Id: Ie6cb756b4f11b5c6dabd34bc89434a358eb758ff
Signed-off-by: Jan Vojtech <honza.vojtech@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4663
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2019-02-07 07:52:44 +00:00
Tomas Vanek
7a3eec2b4d target algo: do not write reg_param if direction is PARAM_IN
Without this change xxx_start_algorithm() writes all register
parameters no matter of their direction. It usually results
in writing of uninitialized reg_params[].value - possibly
reported by valgrind.

While on it fix the wrong parameter direction in
kinetis_disable_wdog_algo(). This bug did not have any
impact because of unconditional write of reg_params.

Change-Id: Ia9c6a7b37f77d5eb6e5f5463012dddd50471742b
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4813
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-02-07 07:51:50 +00:00
Antonio Borneo
0d48104e03 drivers/imx_gpio: fix polarity of srst and trst
The comment above the function is correct, but the code set
the GPIO with wrong (reversed) polarity.

Change-Id: Ifd09688150d3d2018af73521e0da3926bb1b7f84
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4847
Tested-by: jenkins
Reviewed-by: Grzegorz Kostka <kostka.grzegorz@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-02-07 07:51:41 +00:00
Oleksij Rempel
a1b308abd4 jtag: drivers: provide initial support for usb path filtering
With this patch drivers will be able to use usb path filtering.
The path format is identical to the format provided by linux kernel:
bus-port.port....
With this format it should be easier just to copy and paste
path found in dmesg.

Change-Id: I8bafa6fcb7a66ff68cc961a376f97f4f3dee35aa
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-on: http://openocd.zylin.com/4580
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-02-07 07:51:30 +00:00
Tomas Vanek
deaf3d2641 flash/nor: flash driver and cfg for SAM E54, E53, E51 and D51
The new Microchip (former Atmel) series powered by Cortex-M4 looks
very similar to older M0+ powered SAM D2x at the first sight.
Unfortunately the new series differs a lot in important details.
NVMCTRL has different register addresses, moved important bits
and even changed binary command set. An universal driver for all SAM D/E
would be very complicated. That's why a new driver was derived.

Tested on Microchip SAM E54 Xplained Pro kit (board cfg included).

Adjusted for the restructured dap support.
Checked by valgrind and clang static analyzer.

Change-Id: I26c67047a552076f4b207b9b89285a53d69b4ca4
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4272
Tested-by: jenkins
Reviewed-by: Andres Vahter <andres.vahter@gmail.com>
2019-02-05 17:45:18 +00:00
Tomas Vanek
346ce2f13f flash/nor/stm32f1x: use address instead of offset in stm32x_write_block()
stm32x_write_options() uses stm32x_write_block() at STM32_OB_RDP address.
The change eliminates subtracting bank->base (and later adding it back).

Change-Id: Icdd24afc7178b814be58e6033d4b93fdfb2d2a16
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4859
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
2019-02-04 10:26:47 +00:00
Tomas Vanek
e978e53c77 flash/nor/stm32f1x: fix minor error messages
Change-Id: I1e9e62979c4629c8ba1d5ae89ca7392259969eb6
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4858
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
2019-02-04 10:26:22 +00:00
Tomas Vanek
4b998cb5f5 cortex_m: fix stepping on FPB rev 1
Stepping in the maskisr auto mode sets breakpoint to step over interrupt
service tasks. If the device has FPB rev 1, setting hard breakpoint
is impossible on address over 0x1fffffff.

Use soft type breakpoint for adresses over 0x1fffffff if FPB is rev 1.
This may eventually fail if the code memory is not writeable, but there
is nothing to do in such case.

Change-Id: Ibdeeb506903a35d550b64f82c24c37a668de62b3
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4857
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-02-04 10:25:44 +00:00
Guillaume Revaillot
5105e6037f flash/nor/at91samd: add samr34j18.
samr34/r35 combine SAML21 and SX1276 (lora transceiver). This one was found on
xplaned pro evaluation kit. Ids for other r34/r35 chips are apparently not yet
documented.

Change-Id: I4054dd56ea53c9bae8d17abd5a3e4e65e1b9c8b1
Signed-off-by: Guillaume Revaillot <g.revaillot@gmail.com>
Reviewed-on: http://openocd.zylin.com/4872
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-02-04 10:24:01 +00:00
Antonio Borneo
7a80a74e81 arm_adi_v5: rewrite dap_to_jtag and dap_to_swd
The functions dap_to_jtag() and dap_to_swd() have been introduced by
3ef9beb52c ("ADIv5 DAP ops switching to JTAG or SWD modes") in
arm_adi_v5.c by using the JTAG queue only.
Later, in 6f8b8593d6 ("ADIv5 transport support moves to separate
files") the functions has been moved in adi_v5_swd.c and adi_v5_jtag.c
but keeping the dependency from JTAG queue.
The functions does not work if the current transport is not JTAG.

Move back the functions in arm_adi_v5.c, replace the input parameter
"target" with "dap", use the transport to detect if the JTAG queue is
present, in case of SWD transport use the proper method, for other
transports report error.
Reuse the ADI v5 sequences already present in jtag/swd.h.
Also, OpenOCD does not support switching to another transport after
the initial selection, so do not change DAP's ops vector.

Change-Id: Ib681fbaa60cb342f732bc831eb92de25afa4e4db
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4852
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-01-30 14:29:10 +00:00
Matthias Welwarsky
bda2d73718 aarch64: support for aarch32 ARM_MODE_SYS
Treat ARM_MODE_SYS like all other Aarch32 processor modes,
except for the special case of missing SPSR.

Change-Id: I60b21703659b264f552884cdc0f85fd45f7836de
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4494
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-01-30 09:01:59 +00:00
Tomas Vanek
7345801b69 target: do not allow 'target create' after init
A target created after init lacks target_init_one() call
and is not added to gdb targets.

Steps to reproduce:
- start OpenOCD with a dap target
- connect by telnet
 target create ap0.mem mem_ap -dap $_CHIPNAME.dap -ap-num 0
 reset

Segmentation fault is rised because target->check_reset is NULL.

Change-Id: I2a62f3b450e4db3005c7041a22fb8f952e68c3b6
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4842
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-01-27 20:59:54 +00:00
Tomas Vanek
877cec20dc command: check command mode for native jim commands
The command mode was checked only for simple type of commands.
Native commands (handled by jim_handler) was treated as
they had mode COMMAND_ANY

Change-Id: Iab1d8cbb0b8c6f6b9f3cf942600432dec9a703ff
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4841
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-01-27 20:59:42 +00:00
Tomas Vanek
d479020950 target/cortex_m: inform if an external reset occurs
Change-Id: I873e73012c44aac7af3b21b633bd096d8e299d07
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4840
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-01-27 20:59:13 +00:00
Tomas Vanek
d0eb66f729 command: Log the failed command by full name
Commit 44009186cf added logging
of failed cmd name but it used c->name only. It might be confusing:

Debug: 244 105 command.c:644 run_command(): Command 'init' failed with error
 code -4
User : 245 106 command.c:711 command_run_line():
Debug: 246 107 command.c:644 run_command(): Command 'init' failed with error
 code -4

The command on line 244 is 'dap init'
Use full name of cmd including parents.

Change-Id: Iff131ce6454ef70b353ce1bc6d0a480b92820545
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4837
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Jean-Christian de Rivaz <jcamdr70@gmail.com>
2019-01-27 20:58:10 +00:00
Tomas Vanek
d9cb5593cd hla_target: fix adapter_poll() to preserve TARGET_DEBUG_RUNNING state
Without this change TARGET_DEBUG_RUNNING changes to TARGET_RUNNING
after adapter_poll()

Change-Id: I1c965a43527b50fa723d78fb6eae56585a7ede03
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4820
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-01-27 20:58:03 +00:00
Antonio Borneo
fc348bc086 command: initialize the command mode for every command
All the commands in OpenOCD have been inspected and have the
command mode initialize, apart for two of them.
This is not critical, because the uninitialized value (0) is
equivalent to the enum COMMAND_EXEC, that is also the correct
value for the two mentioned commands.

To keep the code consistent, initialize the command mode to
COMMAND_EXEC.

Change-Id: Iaf043364cbd1005418d787ed045a3ec653612382
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4861
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-27 11:45:01 +00:00
Peter Lawrence
8417a569fe tcl: Support for Analog Devices ADSP-SC58x / ADSP-SC584-EZBRD
The original script was broken by changes to the Cortex-A code.  The
recent introduction of the mem_ap target provided a new mechanism to
allow the script to be fixed.  This also adds an example board script
for the ADSP-SC584-EZBRD.

Change-Id: I36bc1ac6b6c036539f4175f1e65223ba10a35355
Signed-off-by: Peter Lawrence <majbthrd@gmail.com>
Reviewed-on: http://openocd.zylin.com/4855
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-26 22:32:10 +00:00
Antonio Borneo
f63b519385 jtag: cmsis-dap: use macro SWJ_PIN_SRST in place of magic value
While connecting under reset, use the already defined macro
SWJ_PIN_SRST to assert the srst pin.

Change-Id: Icebed462c0fe8f8c15f6522dc56625aa580b8858
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4846
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-23 15:27:13 +00:00
Moritz Fischer
731dc36a67 rtos: Add RTOS task awareness for Chromium-EC
Add RTOS task awareness for Chromium-EC. Currently
only supports ARM Cortex-M0/M3/M4 based targets.

No new Clang Analyzer warnings.

Change-Id: Iea56fcb1be220e2437613922879b63d6e553703d
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Reviewed-on: http://openocd.zylin.com/4685
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-01-23 15:27:01 +00:00
Jonathan McDowell
d2fb461621 Correct ZynqMP configuration to be appropriately named
The xilinx_ultrascale.cfg target is actually the configuration for a
ZynqMP, which is a combination of an UltraScale+ FPGA core and a quad
core A53. Update the filename/comments to reflect this, and include
the tap IDs for all known FPGA cores for this part.

Change-Id: I70dfcc99861a482b83b6a795e83021d9cf1fe047
Signed-off-by: Jonathan McDowell <noodles@earth.li>
Reviewed-on: http://openocd.zylin.com/4850
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-01-23 15:26:48 +00:00
Antonio Borneo
45b4998e93 arm_opcode: fix encoding of ARMv5 breakpoint instruction
The encoding of BKPT instruction is 0xE12###7#, where the four '#'
characters should be replaced by the 16 bits immediate value.
The macro uses an incorrect shift amount, thus the immediate value
is not properly coded and bits 20~23 of the opcode could get
corrupted.

Fixed by using the proper shift amount.

Change-Id: I32db8224ab57aad6d3b002f92f9f259056593675
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4854
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-01-23 15:26:39 +00:00
Antonio Borneo
c2e18bfaea arm_adi_v5: fix and update sequences to spec IHI 0031E
Fix the SWD line reset sequence accordingly to Arm specification IHI
0031E that requires at least 2 idle clocks after the 50 clocks with
SWDIO high.
Fix the value of the activation code in the (currently unused)
sequence dormant-to-SWD.
Make each sequence's length multiple of 8, so it is compatible with
adapters that have such limitation (e.g. buspirate) and try to split
and comment each part of the sequence (when possible keep each part
byte aligned, inspired from commit 3ef9beb52c). This slightly
increases the sequence length but does not impact run-time
performance because these are rarely used sequences.
Add the missing sequence dormant-to-JTAG and JTAG-to-dormant, not
used yet.

On devices that implements the dormant state, IHI 0031E deprecates
the direct switching between SWD and JTAG, and recommends using a
transition through dormant. This is not implemented.

Change-Id: Iad18c0e736cfd9366be175d22658d664b0c61eab
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4851
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-01-23 15:26:28 +00:00
Tomas Vanek
418515b21e target/arm_dap: fix segmentation fault in 'dap info' cmd
'dap info' command fails hard on a hla target.

Change-Id: Ia188b1afe527e0ed64512d1bddadd507f978e40b
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4860
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-01-23 15:25:53 +00:00
Mirko Vogt
8896abbf07 nrf5: add nrf5 device definition for HWID 0x00E3
This hardware id is e.g. used by the Insight SiP ISP1507-AX.

Change-Id: I82568d292f9882372ab061d8e3e36906b0cc5882
Signed-off-by: Mirko Vogt <mirko.vogt@sensorberg.com>
Reviewed-on: http://openocd.zylin.com/4845
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2019-01-21 00:01:16 +00:00
Tarek BOCHKATI
d140fb27c6 cortex_m: fix bug in poll() machine state (external resume awareness)
This patch covers the fact that cortex_m could be resumed externally by
Cross Trigger Interface or by direct write to DHSCR ...

To reproduce:
 - halt the target
 - then run the core through DHCSR (mww 0xe000edf0 0xa05f0001)
 => this resumes the core, but target state in OpenOCD remains HALTED.

Change-Id: Ifa1ae18645bfeb863acc78a039bbf04873fd78fe
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/4817
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-16 10:53:24 +00:00
Tarek BOCHKATI
63aa917015 cortex_a_poll: minor code factorization to enhance readability
cortex_a_debug_entry and update_halt_gdb are called in two consecutive
conditions which are complementary, so externalizing the common code
makes the conditions' body lighter

With the removal of LOG_DEBUG(" ") since it does not look too informative

Change-Id: I0c54e413619576bb3af164f2dcf256c5a862c5fd
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/4832
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2019-01-16 10:52:43 +00:00
Severin Junker
c915e70568 at91samd: added SAM-DA1 parts
Change-Id: I1b206461052ee1897432e379505fdf95372a9e24
Signed-off-by: Severin Junker <s.junker@cartelsol.com>
Reviewed-on: http://openocd.zylin.com/4835
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-16 10:52:06 +00:00
Antonio Borneo
c4a7a62262 helper/command: check for malloc failure in __command_name
If malloc fails in __command_name, the following strcpy will
segfault, thus preventing __command_name to return.
The actual calls to command_name() implement the correct check
for the NULL pointer, but propagate error -ENOMEM, that is not
an error value coherent within OpenOCD. Plus, in one case it
overwrites an already detected error.

Check the pointer returned by malloc and, in case of failure,
issue an error message and return the NULL pointer.
Let the caller of command_name() to keep the already detected
error or to return ERROR_FAIL in case of end of memory.

Change-Id: I151a24569409777dd5bc09a3daf5dba2b8e2829b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4838
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-16 10:51:28 +00:00
Tomas Vanek
c0ec54d8ae target/stm8: add missing destroy_reg_param()
Change-Id: Ibd8a423a4400226790cfbb9a6f113b7ea762c436
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4814
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Ake Rehnman <ake.rehnman@gmail.com>
2019-01-14 08:46:36 +00:00
Antonio Borneo
87adca299d drivers/sysfsgpio: fix usage messages
The notation "(tck tms tdi tdo)* " is incorrect, because it means the
quadruple of gpio can be repeated on the command-line.
The correct syntax of the command requires instead to provide either
all the four gpio numbers (in order to set the values) or to pass an
empty command-line (to dump the values previously set).

Change the .usage field to "[tck tms tdi tdo]".
Change similarly the corresponding .usage field for SWD command.
Add the .usage field for the commands that individually set each gpio.

Change-Id: If5b3c618097b71dfe7fcf988fb3c1499ae03a6d5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4833
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-14 08:45:35 +00:00
Tim Newsome
31ea7037b3 Add flash support for SiFive's Freedom E platforms
Valgrind and Clang Static Analyzer have no complaints about this change.

Change-Id: I7757615ec52448372bdc57729cdf97c7016d97e8
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4656
Tested-by: jenkins
Reviewed-by: Philipp Guehring <pg@futureware.at>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-11 19:50:09 +00:00
Austin Phillips
42d8fa899c stlink_usb: Submit multiple USB URBs at once to improve performance
Commands to stlink devices are typically comprised of multiple
transactions with each transaction completing before moving to the next.
This change allows for multiple USB transactions to be issued at once
followed by a check that all transactions completed successfully.  This
improves performance on some machines where there is a large turn-around
time between USB transfers such as is seen on some virtual machines.

This change is only supported when compiled with libusb1 as libusb1
supports and asynchronous interface.

Multi-transaction queueing introduced in this change paves the way for
improving speed of other transactions in the future such as memory and
register reads where multiple USB transactions in succession are
required to complete a command.  Multiple USB transactions can be
submitted at once using jtag_libusb_bulk_transfer_n function.

Change-Id: I924e049217a789ef445b14e00aa1983576970fbf
Signed-off-by: Austin Phillips <austin_phillips@hotmail.com>
Reviewed-on: http://openocd.zylin.com/4484
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-01-08 10:05:36 +00:00
Antonio Borneo
3792f3c114 libusb: add debug message on adapter not found due to wrong serial
When few adapters of the same type are in use, the serial string is
the way to select the right one.
Currently a serial string that does not match any of the connected
adapters will just fail the open, without specific information to
track the issue.

Add a specific message to highlight that the open failure is caused
by a serial mismatch.

Change-Id: I5cb77f1045cc746e532d395b2e5ced40a23ab638
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4701
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-01-08 10:04:42 +00:00
Antonio Borneo
bf7a363b44 jtag/drivers/usb_common: return oocd error values
Where possible, keep the same style for returning error.

Change-Id: I3a04220c0b9f129a36e9fe83038b7c19dd57fe61
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4699
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-01-08 10:02:43 +00:00
Antonio Borneo
1b8091d253 libusb0: return oocd error values
Commit d1b7437633 fixes libusb1 to
return OpenOCD error values instead of negative errors in Linux
kernel's style.
The same fix should be applied to libusb0 too.

Fix return value of libusb0 to uniform it to OpenOCD style.

Change-Id: I68478c29c91c6be720074f58c432fe51477e03ed
Fixes: d1b7437633 ("libusb: return oocd error values")
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4698
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-01-08 10:01:48 +00:00
Antonio Borneo
3799eded67 target/aarch64: add support for multi-architecture gdb
GDB can be built for multi-architecture through the command
	./configure --enable-targets=all && make
Such multi-architecture GDB requires the target's architecture to
be selected either manually by the user through the GDB command
"set architecture" or automatically by the target description sent
by the remote target (i.e. OpenOCD).

Commit e65acd889c ("gdb_server: add
support for architecture element") already provides the required
infrastructure to support multi-architecture gdb.

aarch64-linux-gnu-gdb 8.2 uses "aarch64" as default architecture,
but also supports the value "aarch64:ilp32" and all the values
supported by arm-none-eabi-gdb.
These values can be displayed on arm gdb prompt by typing
"set architecture " followed by a TAB for autocompletion.

Set the gdb architecture value for aarch64 target to "aarch64".

Change-Id: I63e9769f47d8e73f048eb84fa73e082dd1c8e52c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4755
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-01-08 10:00:09 +00:00
Antonio Borneo
5c941edc7b target/arm: add support for multi-architecture gdb
GDB can be built for multi-architecture through the command
	./configure --enable-targets=all && make
Such multi-architecture GDB requires the target's architecture to
be selected either manually by the user through the GDB command
"set architecture" or automatically by the target description sent
by the remote target (i.e. OpenOCD).

Commit e65acd889c ("gdb_server: add
support for architecture element") already provides the required
infrastructure to support multi-architecture gdb.

arm-none-eabi-gdb 8.2 uses "arm" as default architecture, but also
supports the following values: "arm_any", "armv2", "armv2a",
"armv3", "armv3m", "armv4", "armv4t", "armv5", "armv5t", "armv5te",
"armv5tej", "armv6", "armv6k", "armv6kz", "armv6-m", "armv6s-m",
"armv6t2", "armv7", "armv7e-m", "armv8-a", "armv8-m.base",
"armv8-m.main", "armv8-r", "ep9312", "iwmmxt", "iwmmxt2", "xscale".
These values can be displayed on arm gdb prompt by typing
"set architecture " followed by a TAB for autocompletion.

Set the gdb architecture value for all arm targets to "arm".

Change-Id: I176cb89878606e1febd546ce26543b3e7849500a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4754
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-01-08 09:59:42 +00:00
Antonio Borneo
97afb8b372 target/stm8: add support for multi-architecture gdb
GDB can be built for multi-architecture through the command
	./configure --enable-targets=all && make
Such multi-architecture GDB requires the target's architecture to
be selected either manually by the user through the GDB command
"set architecture" or automatically by the target description sent
by the remote target (i.e. OpenOCD).

Commit e65acd889c ("gdb_server: add
support for architecture element") already provides the required
infrastructure to support multi-architecture gdb.

The gdb patches for stm8 are still not merged in the official
repository and are temporarily hosted in
	https://stm8-binutils-gdb.sourceforge.io/
The latest patch set
	stm8-binutils-gdb-sources-2018-03-04.tar.gz
define only one possible value ("stm8") for this architecture; it
can be displayed typing "set architecture " followed by a TAB for
autocompletion in gdb for stm8.

Set the gdb architecture value for stm8 to "stm8".

Change-Id: I643ceba662de46cecf061d1dc672b9178a077f1b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4753
Tested-by: jenkins
Reviewed-by: Ake Rehnman <ake.rehnman@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-01-08 09:58:17 +00:00
Cody P Schafer
49bd64347a armv7m: always set xPSR.T=1 when starting an algorithm
xPSR.T sets the processor to Thumb mode when set to 1. ARMv7-M only
supports execution of Thumb instructions, so it must always be set to 1.

If xPSR.T is set to 0 on armv7m, a usage fault is generated when a
instruction execution is attempted.

On armv7m, issuing a reset causes the vector table to be examined. PC
and xPSR.T  are loaded from the vector table at byte offset 4. xPSR.T is
taken from the least significant bit this value, PC from the remaining
bits.  This occurs even with `reset halt`, as the reset itself causes
this load to occur without the execution of any instructions.

As a result of this, following a reset with a "bad" value programmed in
the vector table, openocd would be unable to run algorithms on the
target, as running them would immediately result in a usage fault due to
xPSR.T being unset (0).

Allow algorithms to run regardless of the content of the vector table by
explicitly setting xPSR so that xPSR.T=1 prior to executing an
algorithm. One can think of this as openocd more closely emulating a
reset or branch instruction in executing it's algorithms.

Ticket: https://sourceforge.net/p/openocd/tickets/203/
Signed-off-by: Cody P Schafer <openocd@codyps.com>
Change-Id: I4dc3427ab195d06c3fd780ea768027fefccc4c28
Reviewed-on: http://openocd.zylin.com/4658
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-01-08 09:56:48 +00:00
Edward Fewell
5fd1cb0e5b icepick.cfg: add cancel reset bit to TAP register writes
The Agama family of devices (CC26x2/CC13x2) required an
additional bit to be set when adding the core's TAP into
the scan chain. The cancel reset bit 0x10000 tells the
ICEPick to take the bus out of reset so that the other
bits will take effect. This bit is a NOP on other devices
and ICEPicks, so the change shouldn't adversely affect
other devices.

Change-Id: I9245eef0936ea7eea28ae84ab5e8ce05fa63af40
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/4789
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-01-08 09:51:13 +00:00
Edward Fewell
615a066629 drivers: xds110: Add support for XDS110 stand-alone probe
The XDS110 stand-alone version has the ability to supply
voltage to the target board via it's AUX FUNCTIONS port.
Added command to enable setting the voltage on the XDS110
stand-alone.

Change-Id: I2f21c4a3d15ed99e649f3a83973c5e724c4bfeb6
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/4793
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-01-08 09:49:03 +00:00
Jerome Forissier
9388915dc6 HACKING: add note about refs/for/master
The fact that one needs to always push contributions to a single
remote reference (refs/for/master) might seem odd to people unfamiliar
with Gerrit. GitHub, for instance, hosts personal repositories where
developers typically create topic branches for each contribution and
use a proprietary mecanism to request a review (the "pull request").
More generally, one normally does not expect to be able to push
non-fast-forwarding stuff to a remote branch.

This commit adds a clarifying note to the patch guidelines.

Change-Id: Ia750b815b82b18e92b6109c07f451000dcbecf9b
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-on: http://openocd.zylin.com/4806
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2019-01-08 09:46:04 +00:00
Jerome Forissier
a6f5a16705 HACKING: replace refs/publish/master with refs/for/master
refs/publish/master is deprecated and gives a warning in newer Gerrit.
Replace with refs/for/master.

Change-Id: I56871cc6e80c014ba81f4458230cd67dc318ecb3
Suggested-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-on: http://openocd.zylin.com/4810
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2019-01-08 09:45:52 +00:00
Rod Boyce
b3ed97a492 NOR: lpc2000 Add support for LPC84x devices
These devices differ from LPC8xx devices in that they have a different
IAP entry point, but everything else is the same.  Using Tcl to pass
different IAP entry point.
no new Clang analyser warnings and no new build sanitizers issues.

Change-Id: I2d654dd250f416e74262c0228cad8713a283402f
Signed-off-by: Rod Boyce <developer@teamboyce.co.uk>
Reviewed-on: http://openocd.zylin.com/4684
Reviewed-by: Jean-Christian de Rivaz <jcamdr70@gmail.com>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-02 21:54:03 +00:00
Oleksij Rempel
8f777bc1a6 flash: nor: ath79: remove base calculation
Currently it is impossible to flash ELF with correct offsets. The reason
is a bogus offset calculation extracted from base.
Since any other spi drivers do not care about base, do the same for
ath79 as well.

Change-Id: I9e46e01c9e7a709c2d07da9203c634f302603afd
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/4821
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-02 21:53:41 +00:00
Jānis Skujenieks
08e64a828c flash/nor/nrf5: set correct timeout for nvmc operations
Longest erase all FLASH for nRF5 series is 295.3 ms for nRF52832.
Timeout period now is set to 340 ms (295.3 + 15%)

Change-Id: Iae00ed7b634f111b9798db11e35e4e066d4aaa95
Signed-off-by: Jānis Skujenieks <janis.skujenieks@gmail.com>
Reviewed-on: http://openocd.zylin.com/4822
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-02 21:52:58 +00:00
Tarek BOUCHKATI
db070eb85d target/arm_cti : export CTI APPPULSE and INACK register
this permits the full control of CTI from config files

Change-Id: Ia27ac8e12e08ec72da05f26dcbd81d24fa1a0f6f
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/4815
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2018-12-27 12:47:47 +00:00
Tarek BOCHKATI
d1c7b0ab8a target/arm_cti: add debug message when an incorrect CTI register name is used
the patch also contains some typo fixes

Change-Id: Ia4267036068455144cdcbfdffed15518d48f445e
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/4816
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2018-12-27 12:47:35 +00:00
Jean-Christian de Rivaz
44009186cf command: Log the failed command name
Change-Id: I03938a845110002755636a9514b17a213bf1cc72
Signed-off-by: Jean-Christian de Rivaz <jcamdr70@gmail.com>
Reviewed-on: http://openocd.zylin.com/4808
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2018-12-25 19:01:48 +00:00
Jean-Christian de Rivaz
a15c11d7d0 Add LPC8Nxx and NHS3xx support.
Change-Id: I0bdbca8dd9b234aca355230af7269463c9f70bd1
Signed-off-by: Jean-Christian de Rivaz <jcamdr70@gmail.com>
Reviewed-on: http://openocd.zylin.com/4515
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-23 15:08:36 +00:00
Simon Qian
fdaa8711ae add w600 support
w600 is a wifi soc from winner micro(www.winnermicro.com).

Change-Id: Ib8ccd6e52baefca6547fb97d29db75db0ee73948
Signed-off-by: Simon Qian <versaloon@simonqian.com>
Reviewed-on: http://openocd.zylin.com/4801
Tested-by: jenkins
Reviewed-by: yichen <wdyichen@wdyichen.cn>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-21 07:11:19 +00:00
Tomas Vanek
463257903e flash/nor/spi: add adesto AT25DF081A
8Mbit SPI flash on SAM D21 Xplained board

Change-Id: Iec087f5d889c1cbdd4fed90863e73511f6101cec
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4802
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-19 13:16:45 +00:00
Tomas Vanek
270725f8ad target: allow moving and resizing working area on running target
target configure -work-area-xxx calls target_free_all_working_areas()
and sets the desired new parameter. Without this change the working area
does not get reallocated if it has been allocated before.
target_free_all_working_areas() results in work area containing one block
marked as free.

Completely free working area in target_free_all_working_areas()

Change-Id: I79c681082f32f2a96a2b40eb3b8751e427549693
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4797
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-19 13:16:25 +00:00
Tomas Vanek
71eeda5da1 target: move all working_area functions to one block
The block of code moved without any changes

Change-Id: I70b82dc3315dcc3f34de0537b362bee230007d02
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4796
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-19 13:16:03 +00:00
Tomas Vanek
936dc7cbd9 target/cortex_m: fix cortex_m reset_config help and check for syntax error
Remove option 'srst' which is not recognized from on-line help and texi.
Check parameter and return syntax error if wrong option is entered.

Change-Id: I87daa423a9f53193a0b015080594820b933628f5
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4795
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-19 13:14:27 +00:00
Tomas Vanek
cb5c6477f5 target/cortex_m: do not use VECTRESET on Cortex-M0, M0+ and M1
Cortex-M0, M0+ and M1 do not support VECTRESET bit in AIRCR.
Without this change the 'reset' command silently fails if VECTRESET
is requested.

Detect these cores, show warning if VECTRESET is about to use
and use SYSRESETREQ instead.

Change-Id: Ief174373e3ef0e6b287c57911c0aca4dfa8209f2
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4794
Tested-by: jenkins
Reviewed-by: Jean-Christian de Rivaz <jcamdr70@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-19 13:14:09 +00:00
Liming Sun
651998e337 target: armv8: Add TARGET_HALTED check for gdb connect
This commit adds TARGET_HALTED check in armv8_get_core_reg32()
and armv8_set_core_reg32() to void a crash issue when gdb connects
but fails to halt the ARM core. Similar logic can be found in
armv8_get_core_reg() and armv8_set_core_reg().

Below is the call stack information of this case when gdb connects.

(gdb) bt
    regnum=regnum@entry=0, dpm=0x990110) at src/target/armv8_dpm.c:657
    r=0x9c7240, regnum=0, mode=<optimized out>) at src/target/armv8_dpm.c:974
    at src/target/armv8.c:1487
    packet=0x8ec8e0 <gdb_packet_buffer.9962> "g",
    packet_size=<optimized out>, connection=<optimized out>)
    at src/server/gdb_server.c:1200
    at src/server/gdb_server.c:3180
    command_context=command_context@entry=0x935010)
    at src/server/server.c:566
...

Change-Id: I159837b533f110998184f910a0abe48409bd58f1
Signed-off-by: Liming Sun <lsun@mellanox.com>
Reviewed-on: http://openocd.zylin.com/4758
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-12-18 13:23:07 +00:00
Antonio Borneo
bff87a7f28 target/cortex_a: enable DSCR_HALT_DBG_MODE during examine
Arm architecture reference manual DDI0406C reports at page 2024 in
table C3-1 the processor behaviour on debug events depending on
the debug-mode (none, monitor or halt), mode selected through the
bits MDBGen and HDBGen in DSCR register.

The halt request is served independently from the debug-mode. Thus
it's useless to enable the halt debug-mode in cortex_a_halt() by
setting the bit HDBGen (macro DSCR_HALT_DBG_MODE).

On the other side, halting for a breakpoint, a watchpoint or a
vector catch requires being in halt debug-mode.
Today HDBGen is set only in cortex_a_halt(), so we are forced to
halt the core at least once before it can be halted for hitting a
breakpoint/watchpoint/vector-catch. This is annoying since there
is no need to halt the target to set a HW breakpoint.

Move in cortex_a_init_debug_access() the selection of the halt
debug-mode, so the mode is set during examine.
To prevent a misconfigured hardware breakpoint/watchpoint/vector
catch to halt the target when OpenOCD has already quit, return to
debug-mode none at OpenOCD exit.

Change-Id: I68a1c51de3572ca1b89e90caf7eb20374268e926
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4783
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-12-18 13:22:55 +00:00
YanLin Zhu
322d2fa12c adi_v5_jtag: fix build break when open DEBUG_WAIT macro
DEBUG_WAIT is useful to debug adi_jtag issue,
and the WCR register is replaced by DLCR for DP registers update
in commit 150b7d26f2.

Change-Id: I3faa9ea8a6adacd3d5275e40382801da731db32f
Signed-off-by: YanLin Zhu <zhuyanlin@pinecone.net>
Reviewed-on: http://openocd.zylin.com/4804
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
2018-12-17 10:02:15 +00:00
Antonio Borneo
334552bc83 helper/startup.tcl: fix execution stack frame of wrapped commands
The OpenOCD commands that have been wrapped with 'ocd_bouncer' are
executed within two levels of nested proc's:
	# see register_command_handler() in src/helper/command.c
	proc my_command {args} {eval ocd_bouncer my_command $args}

	# see ocd_bouncer in src/helper/startup.tcl
	proc ocd_bouncer {name args} {
		... [eval ocd_my_command $args] ...
	}
This causes the stack frame of 'ocd_my_command' to be the same one
of proc 'ocd_bouncer', thus two levels below the stack frame of the
caller of 'my_command'. This is an issue with commands that receive
a variable by name and have to resolve them to access the value.

E.g. the command
	<target> mem2array arrayname bitwidth address count
is wrapped; it receives the name of the array but fails to resolve
it in the current stack frame. Instead, the commands
	mem2array arrayname bitwidth address count
	ocd_<target> mem2array arrayname bitwidth address count
are not wrapped and can directly access the array because they share
the same stack frame of the caller.
Same situation with the symmetric commands 'array2mem'.

How to test:
within a telnet connection, run the following set of commands,
eventually replacing the address 0x08000000 with a valid readable
address of your <target>,
	unset -nocomplain v1 v2 v3
	info vars v?
	mem2array v1 32 0x08000000 1
	<target> mem2array v2 32 0x08000000 1
	ocd_<target> mem2array v3 32 0x08000000 1
	info vars v?
and notice that only v1 and v3 are now allocated. The array v2 has
been allocated in the temporarily stack frame of proc ocd_bouncer,
together with its local variables, and then lost when proc ended.

Fixed by executing the wrapped commands with the command 'uplevel'
instead of 'eval'. The amount of levels to skip is checked to avoid
errors in the unusual case 'ocd_bouncer' is called directly without
the first level of wrapper.

Change-Id: Iff90fb8921faf9b5ab04f61062a530578cc20d78
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4731
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-15 07:18:13 +00:00
Bohdan Tymkiv
02279e2f5e flash/nor/core: Fix chunk size calculation in default_flash_mem_blank_check
Slow version of blank check procedure reads target memory sector-by-sector
using 1 KB chunks. Due to bug in chunk size calculation algorithm the actual
size of the chunk is always 1 KB even if sector size is smaller.
This causes out-of-boundary read of the last sector.

Steps to reproduce:
1) Use target with small sectors (e.g. psoc6 with 512-byte sectors)
2) set WORKAREASIZE_CM0 0
3) flash erase_check 1

Running slow fallback erase check - add working memory
Info : SWD DPIDR 0x6ba02477
Error: Failed to read memory at 0x14008000
unknown error when checking erase state of flash bank #1 at 0x14000000
	Bank is erased

Change-Id: I03d0d5fb3a1950ae6aac425f5e24c7fd94b38325
Signed-off-by: Bohdan Tymkiv <bhdt@cypress.com>
Reviewed-on: http://openocd.zylin.com/4785
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2018-12-12 18:13:00 +00:00
Steven Stallion
f197483f57 flash/esirisc: refactor register write protection
This patch removes use of register write protection in protect() and
protect_check() now that Change 4765 has merged.

Change-Id: I42c429dc283c5b53989a6b98ebfc58214274ff16
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/4791
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-12 08:48:11 +00:00
Steven Stallion
c5eb990825 esirisc: support eSi-Trace
This patch adds support for instruction tracing to eSi-RISC targets. The
command interface is borrowed heavily from ETM; eSi-Trace uses a less
sophisticated model for tracing, however the setup and usage is similar.
This patch also cleans up the command interfaces of the other esirisc
command groups and adds additional debugging information to log messages
when dealing with CSRs.

This patch "finalizes" support for 32-bit eSi-RISC targets.

Change-Id: Ia2a9de79a3c7c066240b5212721fb1b7584a9a45
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/4780
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-12 08:47:44 +00:00
Jiri Kastner
7ae6b04b98 fix cc32xx related changes
original CC3200 launchpad works only with ti-icdi driver
which stopped to work after merging to master commit
d02de3a8a9

Change-Id: I247b5d99831fa744de1fdc5b8a7cffdf49fe953c
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-on: http://openocd.zylin.com/4792
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-12 08:47:18 +00:00
Antonio Borneo
8b66c96974 armv7a_mmu: s/LOG_ERROR/LOG_WARNING/ on address translation failure
When GDB analyses the status of the target it try to guess the
current stack frame and issues few memory read.
E.g. on ARM targets GDB uses R11 value as a potential frame-pointer
and reads at the address pointed by R11.
The address of such memory read is not always valid and can trigger
an address translation failure.

Replace LOG_ERROR with LOG_WARNING in case the virtual address does
not have a hit in TTB; print the virtual address in the warning
message and discriminate the two identical messages with [1]/[2].

Change-Id: I288b8cd26bec2543c4f1c16b7c06dc47d5d843d1
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4602
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-12 08:47:01 +00:00
Antonio Borneo
ff5d13a5f8 libusb0: add compatibility define for transfer type bulk
For compatibility with libusb1, define LIBUSB_TRANSFER_TYPE_BULK
in libusb0.
Remove the #ifdef HAVE_LIBUSB1 in jtag/driver/aice

This also fixes a compile error in jtag/drivers/openjtag with
libusb0.

Change-Id: I827b77eac10216759eb31aab461b2b63cabaf195
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4700
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2018-12-11 13:29:21 +00:00
bob
077d454157 flash/nor: Add support for sector erase in stm32l4x.c for L4+ family
Updates support for L4+ device id: 0x470 added by #4310
Extends #4641 to account for L4+ use of multiple DBANK option bits
Enables L4+ 1M and 2M devices to be programmed using sector erase

Change-Id: I42bb379d7d97986f4506423e3da503d07c787c6b
Signed-off-by: bob <rea952@gmail.com>
Reviewed-on: http://openocd.zylin.com/4777
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-11 13:27:49 +00:00
Edward Fewell
cbe00ef688 flash/nor: update cc3220sf for issue found in code review
Remove inappropriate use of bank_number.

Change-Id: I11be1f2540cb09a3ccede35312f90bc8276af338
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/4788
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-11 13:27:29 +00:00
Edward Fewell
f56e28b2c8 flash/nor: update CC26xx/CC13xx support
Added fixes found in additional code reviews.

Remove inappropriate use of bank_number field and updated
documentation to reflect the change.

Restored functionality to cc2538.cfg file because previous
change removed the cc26xx.cfg file because the flash support
changes made it obsolete. Rolled the previous cc26xx.cfg
file into cc2538.cfg and updated it to work with other
recent changes.  Tested using a SmartRF06 Evaluation
board with embedded XDS100v3 and external XDs110.

Change-Id: Ia19d00cf8055c5c0f1acc53aa23fd06a80fd2ebc
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/4787
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-11 13:27:17 +00:00
Reto Schneider
a50964246d jtag: sysfsgpio: clean up swd gpios
All SWD GPIOs should be un-exported when no longer needed, not just
srst.

Change-Id: I998377afe43b72446cab3da2d4406fc2912ff8c3
Signed-off-by: Reto Schneider <code@reto-schneider.ch>
Reviewed-on: http://openocd.zylin.com/4784
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-11 13:26:22 +00:00
Antonio Borneo
8f47a09cc5 helper/log: remove dead code in log_forward()
Commit f1be0e6af2 ("HELPER/LOG:
review unused symbols") removed a set of unused functions and,
as consequence, there is no code anymore that sets the variable
"log_forward_count". But, the commit above did not removed the
code (now dead) that depends on "log_forward_count" set.

Remove the code dependant on "log_forward_count" set and the
variable itself.

Change-Id: I6efe93d1dccbe13c409c5bc55ba47a2684c0e3ac
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4779
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-11 13:26:05 +00:00
Tomas Vanek
d5f82eea3d jtag: cmsis-dap: developer tool - enter a command by hex nuber
Handy to test vendor commands in a CMSIS-DAP adapter.

Change-Id: Ieeaa276edf770b1a3076a186e9056b4e5180362a
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3103
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-11 13:24:55 +00:00
Spencer Oliver
68f09deb4f doc: add ARMv6-M info regarding TAP Declaration
Change-Id: I89095fd0c830fdc2ce40e5d23f8af98502b0ff50
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/4782
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2018-12-06 13:08:35 +00:00
Antonio Borneo
32aec3b5c8 doc: fix some typo about STMicroelectronics name
s/ST/STMicroelectronics/
s/ST Micro/STMicroelectronics/
s/ST Microelectronics/STMicroelectronics/

Change-Id: I62aef331d172db22a70841a089c1889e37997cde
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4718
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-06 13:07:06 +00:00
Antonio Borneo
0bad9a42a3 stlink: add support for STLINK-V3
Extend the driver to include the minimal functionality to support
the HLA model.
Due to the small change in the name (ST-LINK/V2 => STLINK-V3), fix
the existing names in the comments in udev rules.

Change-Id: Ied33e38063a6da81d9bf249ed195444d7cdf4f03
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4717
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-06 13:06:59 +00:00
Antonio Borneo
5babb63462 stlink: fix printed version for new STM8 nucleo board
The ST-LINK/V2.1 embedded in the new nucleo boards for STM8 does
not follow the normal versioning rules, and puts mass-storage and
swim version in the field normally used respectively for jtag and
mass-storage version.

Apply the check suggested by STMicroelectronics to discriminate
the two cases and print the correct version.

Change-Id: I0dd1da11013be3f1e56084489e28cfba98bb07af
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4716
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-06 13:06:34 +00:00
Antonio Borneo
6807e6b23d stlink: dump version in the same format of ST firmware upgrade tool
This should help comparing the versions before deciding for a
firmware update.

Change-Id: I7012a60587587539b2fd1a5f9c3b1ce72877793f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4715
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-06 13:06:10 +00:00
Antonio Borneo
3e2967c75a stlink: add STLINK_F_HAS_GETLASTRWSTATUS2
Starting from stlink V2J15 the API
STLINK_DEBUG_APIV2_GETLASTRWSTATUS
is obsoleted and replaced by the new API
STLINK_DEBUG_APIV2_GETLASTRWSTATUS2.

Manage the two cases to be prepared for an eventual future
removal of the obsolete API.

Change-Id: Ic4498a652865b2eb6148825138c2f6855a06ba47
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4714
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-06 13:05:49 +00:00
Antonio Borneo
717d3af087 stlink: remove reset pulse when entering in JTAG
Until version J14 the behaviour of ST-Link was to send a reset
pulse to the target when the debug connection is started in JTAG
mode. No reset pulse is sent, instead, in SWD mode.
Version J15 introduces a new parameter to avoid the reset pulse in
JTAG mode, aligning the behaviour with SWD.

This reset from the ST-Link, if propagated to the target, prevents
attaching a running target.

Actually this reset pulse is very short (few microsecond) and can
be easily filtered out by an on-board capacitor, usually present
on the reset wire (mainly to filter the bounces of the reset
button). Moreover, most of the use cases for ST-Link are with SWD
(not with JTAG) and this has probably further masked this JTAG
specific behaviour.

OpenOCD can tolerate it but requires the flag "connect_assert_srst"
to the command "reset_config", but the flag is not present in any
configurations in folder tcl. This enforces the guess it was not
noticed due to on-board capacitors or missing connection of reset
pin or ST-Link only used in SWD; so it's safe applying this patch.

Change the default behaviour to avoid reset in JTAG at connection.
There is no need to manage the ST-Link version here, since every
parameter that is not recognized by older ST-Link is treated as
"connect in JTAG with reset pulse", keeping backward compatibility.

Change-Id: Idc97a1457279e3970fd0839cadbff22d9b0302d4
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4713
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-06 13:05:44 +00:00
Antonio Borneo
80ce68b42c stlink: simplify api version handling
The API version is hardcoded in the STLINK device and depends on
the specific firmware version. There is no way to switch between
different API. Thus, it make no sense to keep in two separate
variables the current and the max API supported because they are
always equal to "the only" API supported by the specific STLINK.

Collapse h->version.jtag_api_max and h->jtag_api in a single
variable h->version.jtag_api
Remove an extra print of api version; this is already advertised
while printing the STLINK version.

Change-Id: I0519694a34748e5a0aa330932c1256080a6d5f20
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4712
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-06 13:05:38 +00:00
Antonio Borneo
861730f732 stlink: add STLINK_F_HAS_MEM_16BIT
Change-Id: I51a160a105342ddbab99c4182d89650a436f5945
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4711
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-06 13:05:27 +00:00
Antonio Borneo
85223bb500 stlink: add STLINK_F_HAS_JTAG_SET_FREQ
Change-Id: I591543f218c6bb30aaeb6321ba8a9425a2b5b6e2
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4710
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-06 13:05:06 +00:00
Antonio Borneo
d705389f67 stlink: add STLINK_F_HAS_SWD_SET_FREQ
Change-Id: Ibba786c7e18bf15a04b85a2071c79f631a252ccf
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4709
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-06 13:04:30 +00:00
Antonio Borneo
ab9221f805 stlink: add STLINK_F_HAS_TARGET_VOLT
Use an alias to STLINK_F_HAS_TRACE, both are added in the same version

Change-Id: Iabf2fdac407f5c4737c3da942323d60ee50c3470
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4708
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-06 13:04:09 +00:00
Antonio Borneo
3148bf838d stlink: add STLINK_F_HAS_TRACE
Fix the condition for ST-Link/V1; it does not support trace.
Trace is added on ST-Link/V2 and ST-Link/V2.1 only.

Change-Id: I17416edd05a2c8ece605560b7533edac4f982cfc
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4707
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-06 12:59:53 +00:00
Antonio Borneo
9252a94218 stlink: simplify maintenance of version and features
The number of stlink firmware version is growing, each carrying new
features. Today's code has several check distributed here and there
and it's already hard to track them and verify the correctness.
The introduction of STLINK-V3 will make the situation much worst,
and the code much less readable.

Add a "flags" bitmask in the struct stlink_usb_version to allow
setting individual bits for each feature available or for specific
quirks and workarounds.
This patch does not implement setting nor testing "flags"; it would
be introduced in following patches, one bit at a time.

Change-Id: I09d78202646a6c8330731f8aa96dc9d295fa5655
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4706
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-06 10:03:14 +00:00
Antonio Borneo
1822c2fb94 stlink: check for SWD support
The old ST-Link/V1 can either run an obsolete firmware with API_V1 or
a more recent firmware (from V1J11 to last V1J13) with API_V2.
SWD is only provided by the latter API.

Return error is SWD is selected on adapters that does not support it.

Change-Id: Iac4ba54d191ba80fb445a7cd3d8c2621dc7a4846
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4705
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-06 10:03:05 +00:00
Laurent LEMELE
81142fa6da stlink: add support for 16 bit memory read/write
Recent stlink version V2J26 introduces support for 16 bit memory
read/write.
Add the new API and modify the wrappers stlink_usb_{read|write}_mem
For older version of stlink keep the same behavior as in current
code.
While there, fix some minor typo in comments inside the wrappers.
This fixes ticket #204 ("st-link can't flash stm32f2x based flash
without target algorithms").

Change-Id: Id7d404e588f10a4b0f8a93d7ca44cef8e4c49b4f
Author: Laurent LEMELE <laurent.lemele@st.com>
Rebased-by: Antonio Borneo <borneo.antonio@gmail.com>
Ticket: https://sourceforge.net/p/openocd/tickets/204/
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4704
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-06 10:02:55 +00:00
Laurent LEMELE
1a51d493de stlink: add JTAG speed selection
ST-Link uses two separate API for setting the interface speed in SWD
and JTAG.
Add the missing API for JTAG and run the proper API depending on the
selected mode.

Change-Id: I71e955e23c1d82c2ea1c8bfade7612c5a0377a74
Author: Laurent LEMELE <laurent.lemele@st.com>
Rebased-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4703
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-06 10:02:43 +00:00
Antonio Borneo
5d9dad6de1 stlink: add usb pid for v2.1 without mass storage device
New version of ST-Link/V2.1 without mass storage device.
From debug point of view, it is compatible with existing ST-Link/V2.1
It uses a new USB PID because the USB endpoints and interfaces are
different from usual ST-Link/V2.1

Add the new PID in the driver, in the tcl interface script and in the
udev configuration script.

Change-Id: Id2e1b5a5d0347c5d951a86a9cdb76be52cfd4ea3
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4702
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-06 10:02:33 +00:00
Antonio Borneo
9d67f00670 flash/stmsmi: fix byte order for big-endian host
The original code was written for and tested on little-endian
host only.

Rewrite it to be independent by host endianess.
Not tested on real HW; I don't own anymore a SPEAr device.

Change-Id: I2f427a804693f56cb9dea4936c525eb814c48c28
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reported-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4778
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-06 09:40:19 +00:00
Steven Stallion
82dd17e248 mem_helper: add mrh command
This patch adds support for reading halfword values from memory. This
command compliments existing support for writing halfwords (mwh).

Change-Id: I8ec628e65c05a7f00aa57e3af0f228eb8bd4d14e
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/4781
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2018-12-06 09:38:41 +00:00
EMARD
dc415cb26c jtag: drivers: ft232r: unhardcoded
FT232R: introducing configurable parameters for pinout,
initial buffer size, state of RS232 signals at exit with
option to reattach kernel driver. All this was hardcoded before.
New parameters are documented in "openocd.texi" file.
Allows hopfully self-explainable and user-friendly adaptation to
various pinouts and similar chips like FT230X and FT231X.

Change-Id: Ib807f2ea3d4c1a164d351d65aeacd1978318d217
Signed-off-by: EMARD <vordah@gmail.com>
Reviewed-on: http://openocd.zylin.com/4681
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-12-06 08:51:01 +00:00
Tomas Vanek
63fcef493a flash/nor: use default_flash_blank_check() instead of dummy
Some flash drivers had a dummy method for erase_check.
Use default_flash_blank_check() instead if possible.

Change-Id: Iddfeff45ce477007328d061fcb5c553d93c3be98
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4766
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
2018-12-05 07:55:53 +00:00
Andreas Bolsch
42f1cc576a SPI table updates (some new devices and new info)
read_cmd, qread_cmd, pprog_cmd added as some recent high densities devices
use variants for 4-byte addressing.

Some new flash and FRAM device ids added. FRAMs don't have write pages nor
erase commands or sector sizes. The corresponding entries are marked as
"not used" (i. e. zero). Checks in existing SPI flash drivers added to
handle these cases gracefully.

Change-Id: I5104bce7c815ac22f98bc32c1bb6db66b984404a
Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-on: http://openocd.zylin.com/4773
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-11-29 08:18:24 +00:00
Darius Rad
eb8dfd5ca8 Set TCP_NODELAY for local connections to jtag_vpi.
This increases performance drematically for local connections, which is the
most likely arrangement for a VPI connection.

Change-Id: Id15b29ae663f5d8100b2175357649bd03d05b7c8
Signed-off-by: Darius Rad <darius@bluespec.com>
Reviewed-on: http://openocd.zylin.com/4549
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-11-26 09:35:48 +00:00
Tomas Vanek
9542cb7c3d flash/nor: consolidate flash protect/protect_check
Make flash_driver methods protect() and protect_check()
optional.

Remove dummy definitions of these methods from the drivers
which do not implement protection handling.

Some drivers did not define protect method. It raised segfault
before this change and now it is handled properly.

Lot of drivers returned ERROR_OK from dummy protect()
- now flash_driver_protect() returns an error if not handled by the driver.

Change-Id: I2d4a0da316bf03c6379791b1b1c6198fbf22e66c
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4765
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
2018-11-26 09:31:35 +00:00
Tomas Vanek
ff555afc02 tcl/target, board: remove useless gdb-attach event definitions
Since commit bae76053dc
gdb-attach event is defined as halt by default.
Remove useless and in case of bcm281xx wrong definitions of the event.

Change-Id: I8e69780a93722eb9392673303f54d502e71eceb6
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4763
Tested-by: jenkins
Reviewed-by: Steven Stallion <sstallion@gmail.com>
2018-11-26 09:31:09 +00:00
Alex J Lennon
20113201df stm32l4x: Fix stm32l4x dual bank support
The dual bank option was being incorrectly read and the
bank b base incorrectly set. This is tested with 512kB
dual bank configuration but needs checking with other
configurations (e.g. 256kb).

This fix should remove the need to use a mass_erase command
prior to programming with OpenOCD

Change-Id: I6e920f11b794c4c1fd34c0e44fb8fa01e7fe8f85
Signed-off-by: Alex J Lennon <alex.lennon@s19.tech>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4641
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Thomas Søhus <soehus@gmail.com>
2018-11-26 09:28:01 +00:00
Tomas Vanek
1b864d6e49 tcl/target: ti_tms570.cfg restructure dap support
ti_tms570 was probably omitted in commit
2231da8ec4

Change-Id: Idd4828fd5ea3641bda6c73c7f07a598c1e512ef6
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4762
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-11-20 13:06:04 +00:00
Andreas Kemnade
e406f2b0dc efm32: correct erase address if bank->base != 0
Prepare for additional flash banks not located at address 0

Change-Id: I60b78c917f94fa52bf24df9e3315536f776eec84
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Reviewed-on: http://openocd.zylin.com/4440
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-11-18 08:22:18 +00:00
Bohdan Tymkiv
5b350bf05c target/image: Add support for S6 record in Motorola SREC files
S6 record is equivalent to S5 but it uses 24-bit value (instead of 16-bit)
to store total number of data records. It can be found in big srec files
with total number of data records bigger than 65535

Handle S6 record in the same way as S5 (simply ignore it)

Change-Id: I3e15a4e8f784fd38803c00accf422f803e8469cd
Signed-off-by: Bohdan Tymkiv <bhdt@cypress.com>
Reviewed-on: http://openocd.zylin.com/4645
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-11-18 08:21:25 +00:00
Christopher Head
3da1b2e657 target/stm32f7x: clarify reset_config comment
The reset_config line in the config file does not actually set
connect_assert_srst (the default is connect_deassert_srst), but it reads
as if it does. Clarify that the target is compatible with
connect_assert_srst, without suggesting that the file actually sets it
to that value.

Change-Id: I14e9445ab282d386b5d0055f6adf03d7c8878a8c
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4743
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-11-18 08:21:05 +00:00
Christopher Head
ea41048830 Permit null target on TCL connection
In previous versions of OpenOCD, it was possible to connect to the TCL
RPC interface without a current target. In `tcl_new_connection`, the
curent target would be queried by number, and the possibility of a null
current target was handled properly.

In commit bb9d9c6026, the
`get_target_by_num` call was replaced by a `get_current_target` call,
without noticing that `get_current_target` aborts if there is no current
target, whereas `tcl_new_connection` is perfectly able to handle that
situation.

Provide a `get_current_target_or_null` function for use by consumers who
are OK with a null current target, and use it in `tcl_new_connection`.

Change-Id: I06f7e1e149f1169e23c73ba328c7ad9f9425cc2a
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4730
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Franck Jullien <franck.jullien@gmail.com>
2018-11-13 07:02:58 +00:00
Paul Fertser
8d914e4d97 README: fix stlink instructions
Since 31c58c139d there is a unified config
for all stlink versions.

Change-Id: Id736063496ecd96e2024ed69dcb67a22c44b80bb
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4672
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2018-11-10 21:58:41 +00:00
Spencer Oliver
a2a282c7b4 docs: fix typo in manual
Change-Id: I28717105eb2a907b0cb4b03f4b5ff1f47194413b
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/4751
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2018-11-10 21:34:42 +00:00
Christopher Head
5ea55a3975 target/stm32h7x: Fix documentation of reset_config
The stm32h7x.cfg does not specify connect_assert_srst or
connect_deassert_srst in its reset_config. The comment claims that it
will therefore connect in reset. However, per the manual, the default
configuration is actually connect_deassert_srst, not
connect_assert_srst. In actual fact, connect_assert_srst does not work
on the STM32H7 because, while SRST is asserted, everything on the AXI
bus is inaccessible. The CPU core is accessible, but since the
examine-end event handler also pokes at the DBGMCU peripheral, that will
fail in connect_assert_srst mode. So using connect_deassert_srst is
appropriate, so fix the comment accordingly.

Change-Id: If3e32e871fb19cc61183bdf911b7c5efd80b62e2
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4741
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-11-10 21:16:27 +00:00
xuguangxiao
8262e8a2c0 jtag/bitq: array boundary overflow
The for loop inside bitq_path_move function is not correct, this will
overflow the cmd->path array and produces an unpredictable result.

Change-Id: I81e3bc9ee6d1dd948acd2fe4c667103ac22bb26f
Signed-off-by: xuguangxiao <szgxxu@qq.com>
Reviewed-on: http://openocd.zylin.com/4733
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-11-10 21:15:39 +00:00
Matthias Welwarsky
010b09121c armv7a: ARMv7-A MMU tools
factor out mmu-related code from armv7a.c, add a 'dump' command for
page tables.

Change-Id: Ic1ac3c645d7fd097e9d625c7c8302e7065875dd4
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4327
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-11-08 09:10:09 +00:00
Antonio Borneo
29c81a8051 target/cortex_a: remove duplicate code to read target registers
The functions cortex_a_dap_{read,write}_coreregister_u32() are
duplicate of the functions dpm_{read,write}_reg().

Remove both duplicated functions in cortex_a.c while export only
dpm_read_reg(), since dpm_write_reg() is currently not used.
Rename dpm_read_reg() as arm_dpm_read_reg() to keep uniform the
naming style.

Change-Id: I501bc99dc402039e630c47917a086a0bb382782c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4747
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Tested-by: jenkins
2018-11-06 12:42:24 +00:00
Antonio Borneo
cf9c0fba9b target/arm_dpm: uniform names of exported functions
The name of the function dpm_modeswitch() does not follow the
common style of the other function names in the same file.

Rename it as arm_dpm_modeswitch().

Change-Id: Idebf3c7bbddcd9b3c7b44f8d0dea1e5f7549b0eb
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4756
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-11-06 12:18:40 +00:00
Antonio Borneo
fac9be64d9 target/cortex_a: remove buggy memory AP accesses
The armv7m debug port provides a direct access to the CPU memory
bus, allowing the debugger to bypass the CPU for every memory
operation.
The armv7a debug port doesn't offer the same feature, mainly
because CPU caches and MMU makes the direct memory access more
tricky. Nevertheless most SoC with armv7a provide direct memory
access through an AHB bus available on another DAP access port,
different from the debug port.

The original port of cortex_a in OpenOCD was inspired from the
working cortex_m code, and provided optional memory access
through the AHB, if present.
The code for AHB access is problematic and partially buggy due
to incomplete management of cache coherency and missing check of
page boundary during virtual address operations.

With the commit 5d458cf727
("target/mem_ap: generic mem-ap target") we have a clean support
for memory access through system buses connected to DAP AP, which
obsoletes the buggy memory AP hack in cortex_a.

Remove any code that uses the memory AP accesses in cortex_a.

Change-Id: I7cd1f94885e5817448058953e043d8da90dea3cc
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4748
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-11-06 12:18:32 +00:00
Antonio Borneo
e63dab0898 target/cortex_a: remove unused code controlled by "fast_reg_read"
The variable fast_reg_read is always zero, causing some code to
never be executed.
Such code try to read the target registers by dumping them in
memory and then reading back the memory through the debugger. But
it is broken due to lack of cache and MMU management.
This code also uses the broken memory_ap access that is going to
be removed soon.

Remove all the code that depends on fast_reg_read not zero.
Add a missing check on arm_dpm_read_current_registers() return.
Keep the unused function cortex_a_dap_write_coreregister_u32()
to balance the used "read" version.

Change-Id: If2ff28a8c49eb0a87dc85207f5431978efd158db
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4746
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-11-06 12:17:48 +00:00
Dominik Peklo
cea40152f8 flash/nor/stm32f1x: Use of protection blocks, improved option bytes handling
Handle write protection status in blocks instead of sectors, removing
unnecessary complexity in the process. Now closer to stm32f2x.
Support sequential modification of option bytes by read/modify/write
directly to option bytes area instead of always starting with the
currently loaded bytes from FLASH_OBR/WRPR registers.
Added new command 'options_load' to force re-load of option bytes w/o
having to power cycle target.

Change-Id: I5c76191e29c17a1e11482df06379d10ca8d6d04d
Signed-off-by: Dominik Peklo <dom.peklo@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4576
Tested-by: jenkins
Reviewed-by: Jan Vojtěch <honza.vojtech@gmail.com>
2018-11-03 11:18:18 +00:00
Antonio Borneo
1e3ba2046c arm_adi_v5: do not deactivate power domains while trying to clear sticky error
At OpenOCD start-up the operation of clearing the sticky error in
CTRL/STAT register ignores the current value of the power domains
bits CDBGPWRUPREQ and CSYSPWRUPREQ in the same register and
incorrectly set them to zero.
This abrupt disable does not follow the requirement in IHI0031 to
wait for the acknowledgment of power disabled before continuing.
The power domains are then re-enabled immediately after; it is
possible that such short disable period has passed undetected or
has been tested only on devices that do not implement the power
domains.
Anyway, this sequence is incorrect and can generate unexpected
and hard-to-debug issues while OpenOCD attaches to a running
target that implements power domains.

Anticipate the initialization of dap->dp_ctrl_stat and use it
while clearing the sticky bit. This has the additional effect of
avoiding a power disable in the error recovery part of the
function dap_dp_read_atomic().
Keep the same sequence of read/write in dap_dp_init() to avoid
breaking the initialization of some problematic target.
Add comments to document these choices.

Change-Id: I8d6da788f2dd11909792b5d6b69bc90fbe4df25d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4677
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-11-03 09:33:19 +00:00
Tomas Vanek
17de29c526 flash/nor/at91samd: add SAMR21E19A DID
While on it correct RAM amount of SAMR21x16A devices

Change-Id: Ie9ab9de1551bdceff17af7597a9a2ee41f5aebe0
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4734
Reviewed-by: Eduardo Montoya
Tested-by: jenkins
2018-11-02 11:55:49 +00:00
Paul Fertser
2ed21488cd tcl: target: omit apcsw for hla
When using stlink for CM7 targets we have to rely on its firmware
to do the right thing as direct DAP access is not possible.

Change-Id: Ieee69f4eeea5c911f89f060f31ce86ed043bdfd0
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4732
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-10-31 21:15:52 +00:00
Tomas Vanek
da4b2d5beb drivers/cmsis-dap: speed up sending multiple HID requests
The performance of CMSIS-DAP in long data transfers was improved substantially in
ef02b69b14. But it not as good as some
other USB/MCU based adapters. Using HID and therefore interrupt endpoint
is slower than USB bulk transfer.

CMSIS-DAP adapter implements multiple HID buffer handling and OpenOCD already
reads number of buffers from info command.

This change adds capability to sumbit more than one HID requests before
driver waits for a HID response. This scenario is used for long transfers only.
Results show about double speed on USB FS and ~140% speed on USB HS:

                                         | w/o this change | with multi HIDrq
-----------------------------------------+-----------------+-----------------
Open source CMSIS-DAP, USB FS, adapter_khz 1000
dump_image ram32k.bin 0x1fffe000 0x8000  |   23.225 KiB/s  |   45.901 KiB/s
load_image ram32k.bin 0x1fffe000         |   23.324 KiB/s  |   46.552 KiB/s

Cypress' Kitprog in CMSIS-DAP mode, USB FS, adapter_khz 1000 (over firmware limit)
dump_image ram64k.bin 0x20000000 0x10000 |   15.537 KiB/s  |   42.558 KiB/s
load_image ram64k.bin 0x20000000         |   15.605 KiB/s  |   43.291 KiB/s

Atmel's EDBG, USB HS, adapter_khz 10000 (#3945 applied)
dump_image ram384k.bin 0x20400000 0x6000 |  248.402 KiB/s  |  345.250 KiB/s
load_image ram384k.bin 0x20400000        |  256.039 KiB/s  |  365.945 KiB/s

Change-Id: I9edbe018086176d357c6aaba5d6b657a5e5e1c64
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4080
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-10-28 07:29:41 +00:00
Kevin Gillespie
fe732bad94 target/target.c: adding keep_alive() to while loop.
Adding the call to keep_alive() to suppress warnings when
running the async flash algorithm. Issue observed when
loading large pieces of code on slower debuggers.

Change-Id: I7660fa05f68ebd7be07b2ca0a55b0f3b6ae718f3
Signed-off-by: Kevin Gillespie <kgills@gmail.com>
Reviewed-on: http://openocd.zylin.com/4686
Tested-by: jenkins
Reviewed-by: Jesse Marroquin
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-10-28 07:28:08 +00:00
Moritz Fischer
abd78a0ff8 zynq_7000: Add zynqpl_program command
This allows for programming the PL part of the Xilinx Zynq 7000

Change-Id: I89e86c0f381951091f6948c46802d17d7f1f3500
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Reviewed-on: http://openocd.zylin.com/4177
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-10-27 15:02:04 +01:00
Antonio Borneo
cf81de7052 target/cortex_a: fix temporary breakpoint during step
Commit c8926d1457 introduces the
context and hybrid breakpoint types beside existing SW and HW
types. The new field "asid" is non-zero only for these new types.

The commit above did not properly initialize "asid" to 0 for a
temporarily HW breakpoint used during single step. This causes
cortex_a_unset_breakpoint() to identify this breakpoint as of
type "hybrid".

Identified through valgrind error:
Conditional jump or move depends on uninitialised value(s)
Actually valgrind triggers a total of 10 messages about use of
uninitialized variables, but they are all caused by the first
conditional jump bases on "asid != 0".

Fixed by initializing "asid" to 0 in cortex_a_step().

Fixes: c8926d1457 ("cortex_a hybrid & context breakpoints")
Change-Id: Ib674d8457d1e02e10332fd9d73554d13719ef93d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4613
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-10-27 14:58:02 +01:00
William D. Jones
988a002a30 xilinx-xc7: Add additional IDCODEs.
Add/detect missing IDCODEs for the Spartan 7 family and Artix 25T
and Artix 12T.

Change-Id: Ib6c83c5592e90df1eb8e715e79b279da9a95f9c6
Signed-off-by: William D. Jones <wjones@wdj-consulting.com>
Reviewed-on: http://openocd.zylin.com/4428
Reviewed-by: Robert Jördens
Tested-by: jenkins
Reviewed-by: Rohit Singh <rohit91.2008@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-10-27 14:37:43 +01:00
William D. Jones
0cdb44a9db tcl/board: Add Arty-S7 Spartan 7 FPGA Development Board
Change-Id: I8bfe780cb67a1777d5112a68e8a9781bfe4f2038
Signed-off-by: William D. Jones <wjones@wdj-consulting.com>
Reviewed-on: http://openocd.zylin.com/4525
Reviewed-by: Robert Jordens <jordens@gmail.com>
Tested-by: jenkins
Reviewed-by: Rohit Singh <rohit91.2008@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-10-27 14:37:31 +01:00
Antonio Borneo
1ba715422f target/arm_adi_v5: fix sync CSW cache on apreg write
Commit 0057c71ab6 updates the OpenOCD
cached values of CSW and TAR registers if these registers are modified
by an apreg command.
The condition to force the update of CSW cache is incorrect and it will
erase the default CSW value.
Moreover, calling mem_ap_setup_csw() does not honor the value requested
in the apreg command because such value is incorrectly bitwise or-ed
with csw_default.

Fix it by updating csw_value, instead of erasing csw_default, and writing
directly in CSW register the new value from the command line.

Change-Id: I40273cb64d22ccfb9b6d3499bd39b586eb60de38
Fixes: 0057c71ab6 ("target/arm_adi_v5: sync CSW and TAR cache on apreg write")
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4679
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-10-27 14:37:05 +01:00
Rohit Singh
d0be1630dc tcl: Add support for the Numato Lab Mimas A7 board
The Mimas A7 FPGA board has FTDI FT2232 whose channel B is connected to
Artix-7 FPGA's JTAG interface. Hence, OpenOCD can easily interface with
it via the its ftdi driver interface. Tested to be working great up to
30 MHz.

Change-Id: Ieda015fbc6135bf95ad5a069cbf38650da45911e
Signed-off-by: Rohit Singh <rohit91.2008@gmail.com>
Reviewed-on: http://openocd.zylin.com/4720
Tested-by: jenkins
Reviewed-by: Tim "mithro" Ansell <me@mith.ro>
Reviewed-by: Robert Jordens <jordens@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-10-17 10:08:49 +01:00
Steven Stallion
7c298a7637 ftdi: demote unhelpful debug messages
Some protocols make use of empty scan fields for optional padding, which
causes the log to fill with unhelpful messages that a field is empty.
The remaining LOG_DEBUG messages in ftdi_execute_scan have been demoted
to DEBUG_JTAG_IO such that these messages are only seen when debugging
JTAG.

Change-Id: I61fd4551411ce851da34e67d003bca5d7a71cd92
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/4112
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2018-10-16 18:07:02 +01:00
Steven Stallion
05e0d633ba rtos: check symbol list when updating uCOS-III
This patch corrects a crash in uCOS-III on a new GDB connection when
RTOS autodetection is not used. The crash was caused by not checking if
the symbol list had been loaded prior to updating threads.

Change-Id: I64c5133e02fe22fc8d14584cc40d87b49c935b0b
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/4719
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-10-16 11:59:11 +01:00
Steven Stallion
4ab75a3634 esirisc: support eSi-RISC targets
eSi-RISC is a highly configurable microprocessor architecture for
embedded systems provided by EnSilica. This patch adds support for
32-bit targets and also includes an internal flash driver and
uC/OS-III RTOS support. This is a non-traditional target and required
a number of additional changes to support non-linear register numbers
and the 'p' packet in RTOS support for proper integration into
EnSilica's GDB port.

Change-Id: I59d5c40b3bb2ace1b1a01b2538bfab211adf113f
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/4660
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-10-16 11:58:24 +01:00
Steven Stallion
e72b2601e7 jtag: make cmd_queue_scan_field_clone public
This patch makes the cmd_queue_scan_field_clone function public. This
permits targets to insert fields without affecting the submitted
scan_field list. This will be used in an upcoming target implementation
that needs to insert additional padding bits.

Change-Id: I8fbd3b9b4e413432471f4f1444048932c8fa189e
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/4082
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-10-16 11:58:17 +01:00
Steven Stallion
e65acd889c gdb_server: add support for architecture element
This change adds optional support for a target to report architecture
information in the target description to GDB. This is needed by some GDB
implementations to properly support remote target with custom behavior.
More information on the architecture element can be found here:

    https://sourceware.org/gdb/onlinedocs/gdb/Target-Description-Format.html#Target-Description-Format

Change-Id: I57b19cae5ac3496256e4e5cc52cf6526ca5c322d
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/4078
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-10-16 11:58:10 +01:00
Steven Stallion
d92adf8abf rtos: support gdb_get_register_packet
This patch adds support for p packet responses by targets configured
with RTOS support. This change required moving to a rtos_reg struct,
which is similar to struct reg used by targets, which resulted in
needing to update each stacking with register numbers. This patch also
allows targets with non-linear register numbers to function with RTOSes
as well.

Change-Id: I5b189d74110d6b6f2fa851a67ab0762ae6b1832f
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/4121
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-10-16 11:58:03 +01:00
Steven Stallion
b5964191f0 register: support non-existent registers
This patch fixes a number of bugs caused by incomplete support for
non-existent registers. This is needed for targets that provide optional
registers or non-linear register numbers.

Change-Id: I216196e0051f28887a2c3da410959382369eed80
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/4113
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-10-16 11:57:53 +01:00
Antonio Borneo
06589d2de4 drivers: cmsis-dap: fix connection in JTAG mode
Commit 5aceec2412 ("drivers:
cmsis-dap: pull up common connect code") breaks the driver and it
cannot connect anymore in JTAG mode.
The issue is caused in cmsis_dap_init() by anticipating the call to
cmsis_dap_usb_open(), which then sets cmsis_dap_handle and makes the
following test to always fail.
Actually the original code was quite tricky:
	if (swd_mode)
		do something that also sets cmsis_dap_handle;
	if (cmsis_dap_handle == NULL)
		do something for !swd_mode;

Convert the sequence of tricky "if"s in a single "if-then-else" to
handle clearly the cases swd_mode and !swd_mode.

Change-Id: I359a23bf26a3edc2461f4352daa0be83e78868f7
Fixes: 5aceec2412 ("drivers: cmsis-dap: pull up common connect code")
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4697
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2018-10-09 08:35:34 +01:00
Anders Westrup
76ee93a81d flash/nrf5: support for nRF52810
Change-Id: I01c430bfa593d20ea7a51c90d67052e374d239b3
Signed-off-by: Anders Westrup <anders@westrup.se>
Reviewed-on: http://openocd.zylin.com/4680
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Slowcoder <slowcoder@gmail.com>
2018-10-08 19:07:05 +01:00
Adam Bass
1afec4f561 tcl/board: Add Renesas R-Car Salvator-X(S) boards.
Add configuration for the Renesas R-Car Salvator-X
and Renesas R-Car Salvator-XS boards.

Change-Id: I898008f56adb31908d30760f18217583fabf1c51
Signed-off-by: Adam Bass <adam.bass@renesas.com>
Reviewed-on: http://openocd.zylin.com/4670
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-10-01 21:01:32 +01:00
Adam Bass
2f15407107 tcl/target: Add Renesas R-Car Gen3 targets
Add configuration for the Renesas R-Car Generation 3 targets.
These are SoCs with Cortex A57s, A53s, and R7s. All cores
are supported.

Change-Id: I795233210e4f647a1a2a0adea7c058ae98b5db70
Signed-off-by: Adam Bass <adam.bass@renesas.com>
Reviewed-on: http://openocd.zylin.com/4669
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-10-01 20:59:13 +01:00
Antonio Borneo
24654759d5 gdb_server: avoid gdb server for virtual targets
Virtual targets, like mem_ap, do not or cannot implement the required
functionality to accept a GDB connection. In the case of mem_ap, the
method get_gdb_reg_list() is missing and a following connection from
gdb causes OpenOCD to segfault.
OpenOCD opens a GDB port for each target; it's always possible to
connect, by mistake, GDB to one virtual target.

Add a method to check if the target supports GDB connections (for the
moment just checking if get_gdb_reg_list is implemented).
Skip opening a gdb server for every targets that don't support GDB
connections.

Change-Id: Ia439a43efe1a9adbb1771cd9d252db8ffa32eb9d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4676
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-10-01 20:58:52 +01:00
Christopher Head
6823a97beb target/atsamv: make APCSW cacheable
Change-Id: Ic00d3192642c682f370a6f7f8b70ae29744eb746
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4678
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-09-27 16:13:06 +01:00
Christopher Head
bdef93520a target/stm32: make APCSW cacheable
Change-Id: I7c5c9720ded329848647f17db95f845e46c01c19
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4674
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-09-27 16:12:44 +01:00
Antonio Borneo
723fc07ddc contrib/60-openocd.rules: provide hint to reload udev rules
No need to reboot the Linux box when new rules are added to udev.
Suggest the command in the script header.

Change-Id: Ie95383bfd73914a3d2e2c05d77fa3eb32e68b7e2
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4665
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2018-09-25 20:59:28 +01:00
Christopher Head
ce8937a987 target/cortex_m: fix typo
The subunit of the debug unit is called the Flash Patch and Breakpoint
unit, abbreviated (by ARM no less) as FPB, not FBP.

Change-Id: Ia2f08470da705f0f1518feeca878f0f500507308
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4675
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2018-09-25 20:58:37 +01:00
Tim Newsome
e2b6f347c7 Clarify what exactly the RISC-V code supports.
Change-Id: I8da657426cc52c738ab41bfb0164cbc6721c0aef
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4655
Tested-by: jenkins
Reviewed-by: Philipp Guehring <pg@futureware.at>
Reviewed-by: Liviu Ionescu <ilg@livius.net>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-09-25 20:57:58 +01:00
Thomas Søhus
b2d259f67c Added support for STM32L4X option bytes writing.
Enables the programming of Write protection lock bits.

- Updated/re-factored with option_read, option_write and option_load commands.

Change-Id: I86358c7eb1285c3c0baac1564e46da8ced5fd025
Signed-off-by: Thomas Søhus <tls@ceepro.dk>
Reviewed-on: http://openocd.zylin.com/4654
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-09-19 05:37:33 +01:00
Antonio Borneo
4423a58b4d doc: fix use of deprecated config file in the example
Commit 31c58c139d ("jtag: drivers: stlink: handle all versions with
single config") deprecates the use of "interface/stlink-v2-1.cfg" in
favor of a unique config file "interface/stlink.cfg".

Update the example in the documentation.

Change-Id: I1aed7c70e15f4edb4f81a3ee8e3bce575fde873b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4667
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2018-09-17 17:18:55 +01:00
Kai Geissdoerfer
08a79c71f2 flash/nrf5: support for nRF52840 Q1AAC0
Change-Id: Id3280dadece84e1d68544936e44d506c7930a55d
Signed-off-by: Kai Geissdoerfer <kai.geissdoerfer@tu-dresden.de>
Reviewed-on: http://openocd.zylin.com/4649
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-09-17 17:15:20 +01:00
Kai Geissdoerfer
ad41246cf6 flash/nrf5: time-based timeout waiting for flash controller
Change-Id: Id214df154dc359ca130c8d8fe1554d106621b9cd
Signed-off-by: Kai Geissdoerfer <kai.geissdoerfer@tu-dresden.de>
Reviewed-on: http://openocd.zylin.com/4648
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-09-17 17:15:03 +01:00
Antonio Borneo
8c67115c7b arm_adi_v5: remove useless cast to int
The field ap_num in struct adiv5_private_config is already of type int.
Casting it to type int has no sense.

Change-Id: Ida642e808c02591bb58609425eccd096d404e2c4
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4666
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-09-13 16:22:58 +01:00
Guido Günther
1f37b94859 tcl/board: Add Emcraft imx8 SOM BSB support
Tested with Olimex ARM-USB-TINY-H adapter

Simple commands work fine but there are currently issues when attaching
remote gdb or running virt2phys:

    https://sourceforge.net/p/openocd/tickets/201/

Change-Id: I86ccf1d93c5d23870bb522f92b3e2af190d529e8
Signed-off-by: Guido Günther <agx@sigxcpu.org>
Reviewed-on: http://openocd.zylin.com/4646
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-09-12 15:14:55 +01:00
Antonio Borneo
56cdc3f3d5 target/cortex_a: poll all targets in SMP node after halt
The periodic poll scans all the targets in the same order they
have been declared in the configuration file.
When one target in a SMP node halts, the transition is detected
in the following poll and this triggers a halt request to all the
other cores of the SMP node.
The targets that will be polled afterwards will be identified as
"halted", but the targets already scanned will remain as
"running" until the next periodic poll.
This creates a race condition with GDB; GDB sets the breakpoints
when runs the target and removes them as soon as the target is
halted. When it receives the halt event, it starts removing the
breakpoints and fails on the targets that are still reported as
"running".

Fixed by polling all the targets in the SMP node before informing
GDB about the halt event.
This implementation is almost copy/paste from the one in aarch64.

Change-Id: Id2bd99f1e56b014e48e9e34ccb891b4219c518f8
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4622
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-09-12 15:14:42 +01:00
Oleksij Rempel
2253a31fb1 ftdi: extend ftdi_location format
To existing <bus>:<port>,<port> format add <bus>-<port>.<port> support.
The last format is used by kernel and other drivers.

Change-Id: I6528970d3af4f6a8bf7b27a0f7a763b5957fdf2b
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-on: http://openocd.zylin.com/4631
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-09-10 11:55:43 +01:00
Steven Stallion
9e2883b07d interface: adapter configuration for FTDI C232HM
This patch adds support for the C232HM-DDSL-0 and C232HM-EDSL-0
FT232H-based cables from FTDI. For more information, see:
http://www.ftdichip.com/Products/Cables/USBMPSSE.htm

Change-Id: Ic97423eb1e2f6b5ebae04943cd5cce86f38771d5
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/4081
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-09-10 09:38:06 +01:00
Matthias Welwarsky
5d458cf727 target/mem_ap: generic mem-ap target
This pseudo target allows attaching to any access point on the DAP at the
MEM-AP level and read and write addresses on the connected bus. For
example, one can create a mem_ap target on the APB-AP and read and write
registers of debug components directly. This allows many diagnostic
and other features be programmed entirely using TCL, without necessity
of adding drivers to OpenOCD.

Change-Id: I53229ffd68fb0f96fb68be15b0f3a76cc8843c8e
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4002
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Leonard Crestez <cdleonard@gmail.com>
2018-09-10 09:37:03 +01:00
Cody Schafer
23cd59cdf2 flash/stm32f2x: add stm32f7 revision Z identification
Signed-off-by: Cody P Schafer <openocd@codyps.com>
Change-Id: Ia0169514d494bae2a98d92ebc97c8eccc10bc6c4
Reviewed-on: http://openocd.zylin.com/4657
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-09-09 21:10:05 +01:00
Steven Stallion
724fddcba0 rtos-helpers: fix minor typo in uC/OS-III helper
This patch corrects a spelling error in uCOS-III-openocd.c.

Change-Id: I6d1923ff1f5e6361358c45cec3dd6c08ca9ccef0
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/4659
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2018-09-07 08:19:29 +01:00
Oleksij Rempel
d1b7437633 libusb: return oocd error values
keep same return style where possible

Change-Id: I2f9b85dbc307a483609f76a84de77e3c74d346c7
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-on: http://openocd.zylin.com/4588
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-09-07 08:18:53 +01:00
Antonio Borneo
ab858febb6 gdb_server: add per target option "-gdb-port"
The argument passed to global config command "gdb_port" is usually,
but not always, a TCP port number. In case of multiple targets, this
numeric value is used as the first port of a set of consecutive TCP
ports assigned one per target.
If the argument is not a numeric value (e.g. "pipe", "disabled", ...)
then incrementing it for the next target has no sense.

Add the option "-gdb-port number" to the commands "target create" and
"$target_name configure" to override, for the specific target, the
general global configuration.

This permits to use a per target "-gdb-port disabled", when no gdb
port is required for that specific target.

It also makes possible to choose a custom TCP port number for each
target, overriding the usual sequence of consecutive port numbers.

Change-Id: I3b9a1910b28ab4bc757e839d0e5d08ffc29f7ab4
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4530
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-09-07 08:18:22 +01:00
Antonio Borneo
11019a824d adi_v5: enforce check on AP number value
The AP number value is restricted in 8 bits unsigned by ADI-v5
specification. Nevertheless, an "invalid" value is used by
target cortex-m to force an automatic detection of the AP.

Replace magic numbers by using new macros for AP max number and
for the value of AP invalid.
Check the value passed through -ap-num flag during configuration.

Change-Id: Ic19a367db0ab11c0ebd070750eca0647d25279a5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4668
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-09-07 08:17:42 +01:00
Guido Günther
2a3b709aa5 target: armv8: Ensure target is halted for virt2phys
Othewise the error reported as

    Timeout waiting for dpm prepare

Change-Id: Ieed2fdcd94ae4e877a749df3eec07a01dbf80b10
Closes: https://sourceforge.net/p/openocd/tickets/201/
Found-by: Matthias Welwarsky <matthias@welwarsky.de>
Signed-off-by: Guido Günther <guido.gunther@puri.sm>
Reviewed-on: http://openocd.zylin.com/4647
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-08-22 08:23:08 +01:00
Tomas Vanek
704d7ac2d0 rtos/linux.c: fix clang static analyzer warning
Remove sizeof(int64_t) from string size computation.

Change-Id: I029b394df5d62a2594a723c4c0e13608b3423b9b
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4640
Tested-by: jenkins
2018-08-21 19:26:26 +01:00
Tomas Vanek
6ec5fe8269 flash/at91sam4: fix clang static analyzer warning
Change-Id: I5e5319d855c868adfa012f68086f7f809ec5a069
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4639
Tested-by: jenkins
2018-08-21 19:26:14 +01:00
Tomas Vanek
d78cf6f312 flash/at91sam4: set wait states only once per write
Read-modify-write setting of FMR register requires an USB turnaround.
Setting FMR before each page write is not necessary and decreases the
write speed.

Change-Id: I67844c898aaf117f155c762c979840b603c767ed
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4611
Tested-by: jenkins
Reviewed-by: Svetoslav Enchev <svetoslav.enchev@gmail.com>
2018-08-21 19:26:00 +01:00
Tomas Vanek
20922f47c7 flash/at91sam4: emit flash bank info
Change related LOG_INFO to LOG_DEBUG

Change-Id: I0c09b1ec83da631b26980dc8632b9031fe2921a3
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4610
Tested-by: jenkins
Reviewed-by: Erwin Oegema <blablaechthema@hotmail.com>
Reviewed-by: Svetoslav Enchev <svetoslav.enchev@gmail.com>
2018-08-21 19:25:53 +01:00
Tomas Vanek
e537e807f6 flash/at91sam4: run probe just once
Reread registers in sam4_GetInfo()

Change-Id: I3b023b3e642a9c052b5c41673d196317f7e7f2e3
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4609
Tested-by: jenkins
Reviewed-by: Erwin Oegema <blablaechthema@hotmail.com>
Reviewed-by: Svetoslav Enchev <svetoslav.enchev@gmail.com>
2018-08-21 19:25:45 +01:00
Kevin Gillespie
6060545458 max32xxx: Support for MAX32XXX devices.
Adding flash programming support for Maxim Integrated MAX32XXX
devices.

Change-Id: I5b0f57a885f9d813240e4bc2d9f765b743e1cfc3
Signed-off-by: Kevin Gillespie <kgills@gmail.com>
Reviewed-on: http://openocd.zylin.com/3543
Tested-by: jenkins
Reviewed-by: Ismail H. KOSE <ihkose@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2018-08-21 19:24:58 +01:00
Svetoslav Enchev
404495b191 target/riscv/riscv-011: fix compile warning about uninitialized variable
In MSYS2 MinGW 64-bit
git clone git://git.code.sf.net/p/openocd/code openocd
$ gcc --version
gcc.exe (Rev1, Built by MSYS2 project) 8.2.0
./bootstrap
./configure --prefix=
$ cat config.status | grep CFLAGS
CFLAGS='-g -O2'
make bindir = "bin-x64"

depbase=`echo src/target/riscv/riscv-011.lo | sed 's|[^/]*$|.deps/&|;s|\.lo$||'`;\
/bin/sh ./libtool  --tag=CC   --mode=compile gcc -DHAVE_CONFIG_H -I.  -D__USE_MINGW_ANSI_STDIO -I./src -I./src -I./src/helper -DPKGDATADIR=\"/mingw64/share/openocd\" -DBINDIR=\"bin-x64\" -I./jimtcl -I./jimtcl  -Wall -Wstrict-prototypes -Wformat-security -Wshadow -Wextra -Wno-unused-parameter -Wbad-function-cast -Wcast-align -Wredundant-decls -Werror -g -O2 -MT src/target/riscv/riscv-011.lo -MD -MP -MF $depbase.Tpo -c -o src/target/riscv/riscv-011.lo src/target/riscv/riscv-011.c &&\
mv -f $depbase.Tpo $depbase.Plo
libtool: compile:  gcc -DHAVE_CONFIG_H -I. -D__USE_MINGW_ANSI_STDIO -I./src -I./src -I./src/helper -DPKGDATADIR=\"/mingw64/share/openocd\" -DBINDIR=\"bin-x64\" -I./jimtcl -I./jimtcl -Wall -Wstrict-prototypes -Wformat-security -Wshadow -Wextra -Wno-unused-parameter -Wbad-function-cast -Wcast-align -Wredundant-decls -Werror -g -O2 -MT src/target/riscv/riscv-011.lo -MD -MP -MF src/target/riscv/.deps/riscv-011.Tpo -c src/target/riscv/riscv-011.c -o src/target/riscv/riscv-011.o
src/target/riscv/riscv-011.c: In function 'poll_target':
src/target/riscv/riscv-011.c:1799:6: error: 'reg' may be used uninitialized in this function [-Werror=maybe-uninitialized]
      reg_cache_set(target, reg, ((data & 0xffffffff) << 32) | value);
      ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
src/target/riscv/riscv-011.c:1686:17: note: 'reg' was declared here
    unsigned int reg;
                 ^~~
cc1.exe: all warnings being treated as errors
make[2]: *** [Makefile:3250: src/target/riscv/riscv-011.lo] Error 1

Change-Id: I6996dcb866fbace26817636f4bedba09510a087f
Signed-off-by: Svetoslav Enchev <svetoslav.enchev@gmail.com>
Reviewed-on: http://openocd.zylin.com/4635
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-08-14 04:32:46 +01:00
Cody P Schafer
471c3cdb2d tcl/board: update all uses of interface/stlink-v2-1 to interface/stlink
Change-Id: I5e27e84d022f73101376e8b4a1bdc65f58fd348a
Signed-off-by: Cody P Schafer <openocd@codyps.com>
Reviewed-on: http://openocd.zylin.com/4456
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-08-14 04:32:12 +01:00
Christopher Head
c6cc60e0e1 target/cortex_m: restore C_MASKINTS after reset
The cortex_m maskisr user-facing setting is not changed across a target
reset. However, the in-core C_MASKINTS bit was always cleared as part of
reset processing, meaning that a cortex_m maskisr on setting would not
be respected after a reset. Set C_MASKINTS based on the user-facing
setting value rather than always clearing it after reset.

Change-Id: I5aa5b9dfde04a0fb9c6816fa55b5ef1faf39f8de
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4605
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-08-14 04:31:38 +01:00
Christopher Head
45f0c15912 doc: fix typo in cortex_m maskisr command
Change-Id: I37795c320ff7cbf6f2c7434e03b26dbaf6fc6db4
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4621
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-08-14 04:30:46 +01:00
Tim Newsome
fd0446002f Add detail to wrong register size error.
Signed-off-by: Tim Newsome <tim@sifive.com>
Change-Id: Id31499c94b539969970251145e42c89c943fd87c
Reviewed-on: http://openocd.zylin.com/4577
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-08-08 20:30:09 +01:00
Antonio Borneo
527113ad2b target/armv7a_cache: add gdb keep-alive and fix a missing dpm finish
Depending on range size, the loop on cache operations can take quite
some time, causing gdb to timeout.

Add keep-alive to prevent gdb to timeout.
Add also a missing dpm->finish() to balance dpm->prepare().

Change-Id: Ia87934b1ec19a0332bb50e3010b582381e5f3685
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4627
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-08-08 10:36:28 +01:00
Antonio Borneo
766d6114fe target/cortex_a: allow command dacrfixup during init phase
There is no reason to restrict the command "cortex_a dacrfixup"
to the EXEC phase only.
Change the command mode to ANY so the command can be used in
the initialization phase too.

Change-Id: I498cc6b2dbdc48b3b2dd5f0445519a51857b295f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4623
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-08-06 11:19:20 +01:00
Antonio Borneo
e48690cb26 target/arm_adi_v5: allow commands apsel and apcsw during init phase
The current implementation of apsel cannot be executed during the
initialization phase because it queries the DAP AP to retrieve and
print the content of IDR register, and the query is only possible
later on during the exec phase.
But IDR information is already printed by the dedicated command
apid, making redundant printing it by apsel too.
Being unable to run apsel during initialization, makes also apcsw
command (that depends on apsel) not usable in such phase.

Modify the command apsel to only set the current AP, without making
any transfer to the (possibly not initialized yet) DAP. When run
without parameters, just print the current AP number.
Change mode to COMMAND_ANY to apsel and to apcsw.

Change-Id: Ibea6d531e435d1d49d782de1ed8ee6846e91bfdf
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4624
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-08-06 11:19:11 +01:00
Oleksij Rempel
f8367dbb49 tcl/target: add Allwinner V3s SoC support
Change-Id: I2459d2b137050985b7301047f9651951d72d9e9e
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/4427
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-08-02 12:06:50 +01:00
Dominik Peklo
1eeb547abc tcl/target/stm32f0x: Allow overriding the Flash bank size
Copy & paste from another stm32 target.

Change-Id: I0f6cbcec974ce70c23c1850526354106caee1172
Signed-off-by: Dominik Peklo <dom.peklo@gmail.com>
Reviewed-on: http://openocd.zylin.com/4575
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-08-02 10:18:48 +01:00
Christopher Head
c04a59286e target/cortex_m: fix incorrect comment
The code sets C_MASKINTS if that bit is not already set (correctly). Fix
the comment to agree.

Change-Id: If4543e2660a9fa2cdabb2d2698427a6c8d9a274c
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4620
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-08-01 14:37:20 +01:00
Marc Schink
9bcd2b2fa3 server/server: Add ability to remove services
Add the ability to remove services while OpenOCD is running.

Change-Id: I4067916fda6d03485463fa40901b40484d94e24e
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4054
Tested-by: jenkins
Reviewed-by: Fredrik Hederstierna <fredrik@hederstierna.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-08-01 14:34:13 +01:00
Masatoshi Tateishi
9ec306e95a rtos: add support for NuttX
This patch introduces RTOS support for NuttX. Currently,
only ARM Cortex-M (both FPU and FPU-less) targets are supported.

To use, add the following lines to ~/.gdbinit.

define hookpost-file
  eval "monitor nuttx.pid_offset %d", &((struct tcb_s *)(0))->pid
  eval "monitor nuttx.xcpreg_offset %d", &((struct tcb_s *)(0))->xcp.regs
  eval "monitor nuttx.state_offset %d", &((struct tcb_s *)(0))->task_state
  eval "monitor nuttx.name_offset %d", &((struct tcb_s *)(0))->name
  eval "monitor nuttx.name_size %d", sizeof(((struct tcb_s *)(0))->name)
end

And please make sure the above values are the same as in
src/rtos/nuttx_header.h

Change-Id: I2aaf8644d24dfb84b500516a9685382d5d8fe48f
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Signed-off-by: Masatoshi Tateishi <Masatoshi.Tateishi@jp.sony.com>
Signed-off-by: Nobuto Kobayashi <Nobuto.Kobayashi@sony.com>
Reviewed-on: http://openocd.zylin.com/4103
Tested-by: jenkins
Reviewed-by: Alan Carvalho de Assis <acassis@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-08-01 14:33:50 +01:00
Jim Paris
7ce8624dbf nrf5: add free_driver_priv
Change-Id: I429a9868deb0c4b51f47a4bbad844bdc348e8d21
Signed-off-by: Jim Paris <jim@jtan.com>
Reviewed-on: http://openocd.zylin.com/4608
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-08-01 14:33:12 +01:00
Antonio Borneo
6738e447c5 target/arm_adi_v5: add command "dpreg"
For very low level debug or development around DAP, it is useful
to have direct access to DP registers.

Add command "dpreg" by mimic the syntax of the existing "apreg"
command:
	$dap_name dpreg reg [value]

Change-Id: Ic4ab451eb5e74453133adee61050b4c6f656ffa3
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4612
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-08-01 14:32:53 +01:00
Bohdan Tymkiv
d92773b205 flash/nor/tcl.c: fix flash bank bounds check in 'flash fill' command handler
Steps to reproduce ( STM32F103 'Blue Pill', 128KiB of flash ):
> flash fillh 0x0801FFFE 00 1
wrote 2 bytes to 0x0801fffe in 0.019088s (0.102 KiB/s)
> flash fillw 0x0801FFFE 00 1
Error: stm32f1x.cpu -- clearing lockup after double fault
Error: error waiting for target flash write algorithm
Error: error writing to flash at address 0x08000000 at offset 0x0001fffe

Change-Id: I145092ec5e45bc586b3df48bf37c38c9226915c1
Signed-off-by: Bohdan Tymkiv <bhdt@cypress.com>
Reviewed-on: http://openocd.zylin.com/4516
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-08-01 14:32:26 +01:00
Antonio Borneo
64bb624479 zy1000: fix compile error with gcc 8.1.1
The fall-through comment is not taken in consideration by gcc 8.1.1
because it is inside the braces of a C-code block.

Move the comment outside the C block.

Change-Id: I22d87b2dee109fb8bcf2071ac55fdf7171ffcf4b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4614
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-08-01 14:32:03 +01:00
Antonio Borneo
5e13e01141 server: explicitly call "shutdown" when catch CTRL-C or a signal
Every TCL command can be renamed (or deleted) and then replaced by
a TCL proc that has the same name of the original TCL command.
This can be used either to completely replace an existing command
or to wrap the original command to extend its functionality.
This applies also to the OpenOCD command "shutdown" and can be
useful, for example, to set back some default value to the target
before quitting OpenOCD.
E.g. (TCL code):
	rename shutdown original_shutdown
	proc shutdown {} {
		puts "This is my implementation of shutdown"
		# my own stuff before exit OpenOCD
		original_shutdown
	}

Unfortunately, sending a signal (or pressing CTRL-C) to terminate
OpenOCD doesn't trigger calling the original "shutdown" command
nor its (eventual) replacement.

Detect if the main loop is terminated by an external signal and
in such case execute explicitly the command "shutdown".
Replace with enum the magic numbers assumed by "shutdown_openocd".

Please notice that it's possible to write a custom "shutdown" TCL
proc that does not call the original "shutdown" command. This is
useful, for example, to prevent the user to quit OpenOCD by typing
"shutdown" in the telnet session.
Such case will not prevent OpenOCD to terminate when receiving a
signal; OpenOCD will quit after executing the custom "shutdown"
command.

Change-Id: I86b8f9eab8dbd7a28dad58b8cafd97caa7a82f43
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4551
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-08-01 14:31:37 +01:00
Antonio Borneo
d537cce7ef target/riscv: fix compile error with gcc 8.1.1
Fix compile error:
src/target/riscv/riscv-011.c: In function ‘slot_offset’:
src/target/riscv/riscv-011.c:238:4: error: this statement may fall through
 [-Werror=implicit-fallthrough=]
    switch (slot) {
    ^~~~~~
src/target/riscv/riscv-011.c:243:3: note: here
   case 64:
   ^~~~

Fixes: a51ab8ddf6 ("Add RISC-V support.")
Change-Id: I7fa86b305bd90cc590fd4359c3698632d44712e5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4618
Tested-by: jenkins
Reviewed-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-08-01 08:26:44 +01:00
Oleksij Rempel
c8c7788825 target|board: Add Intel (Altera) Arria 10 target and related board
Target information about this SoC can be found here:
https://www.altera.com/products/fpga/arria-series/arria-10/overview.html

Achilles Instant-Development Kit Arria 10 SoC SoM:
https://www.reflexces.com/products-solutions/development-kits/arria-10/achilles-instant-development-kit-arria-10-soc-som

Change-Id: Id78c741be6a8b7d3a70f37d41088e47ee61b437a
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-on: http://openocd.zylin.com/4583
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-07-31 18:57:17 +01:00
Oleksij Rempel
36c3e0719d fpga/altera-10m50: add all device id
add all currently know Intel (Alter) MAX 10 device ids

Change-Id: I6a88fef222c8e206812499d41be863c3d89fa944
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-on: http://openocd.zylin.com/4598
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-07-31 18:56:14 +01:00
Oleksij Rempel
c1b8824d19 tcl/board: add DPTechnics DPT-Board-v1
it is Atheros AR9331 based IoT dev board.

Change-Id: I6fc3cdea1bef49c53045018ff5acfec4d5610ba6
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/4424
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-07-31 15:58:17 +01:00
Oleksij Rempel
bebdbe8b73 tcl/target/atheros_ar9331: add documentation and extra helpers
Sync it with experience gathered on Qualcomm QCA4531 SoC. This
chips are in many ways similar.

Change-Id: I06b9c85e5985a09a9be3cb6cc0ce3b37695d2e54
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/4423
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-07-31 15:57:58 +01:00
Oleksij Rempel
bfdccf4c8a tcl/target/atheros_ar9331: add DDR2 helper
this helper works on many different boards, so it is
good to have it in target config

Change-Id: I068deac36fdd73dbbcedffc87865cc5b9d992c1d
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/4422
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-07-31 15:56:58 +01:00
Antony Pavlov
dcf977c89a tcl/target|board: move common AR9331 code to atheros_ar9331.cfg
The ar9331_25mhz_pll_init and ar9331_ddr1_init routines
can be used not only for TP-Link MR3020 board,
so move them to the common atheros_ar9331.cfg file.

Change-Id: I04090856b08151d6bb0f5ef9cc654efae1c81835
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Reviewed-on: http://openocd.zylin.com/2999
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-07-31 15:56:31 +01:00
Oleksij Rempel
87610a4179 tcl/board: add config for 8devices LIMA board
More information about this board can be found here:
https://www.8devices.com/products/lima

Change-Id: Id35a35d3e986630d58d37b47828870afd107cc6a
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/4406
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-07-31 15:56:05 +01:00
Oleksij Rempel
8e8b50f65d tcl/target: add config for Qualcomm QCA4531
The QCA4531 is a two stream (2x2) 802.11b/g/n single-band programmable
Wi-Fi System-on-Chip (SoC) for the Internet of Things (IoT).
https://www.qualcomm.com/products/qca4531

Change-Id: I58398c00943b005cfaf0ac1eaad92d1fa4e2cba7
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/4405
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-07-31 15:55:33 +01:00
Oleksij Rempel
16e95146be mips_m4k: add optional reset handler
In some cases by using SRST we can't halt CPU early enough. And
option PrRst is not available too. In this case the only way is
to set BOOT flag over EJTAG and reset CPU or SoC from CPU itself.
For example by writing to some reset register.

This patch is providing possibility to use user defined reset-assert
handler which will be enabled only in case SRST is disabled. It is
needed to be able switch between two different reset variants on run
time.

Change-Id: I6ef98f1871ea657115877190f7cc7a5e8f3233e4
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/4404
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-07-31 15:54:28 +01:00
Paul Bartholomew
4896c83ce8 target/cortex_a: fix compile error for uninitialized variable
Commit ad6c71e151 introduced the
variable "mmu_enabled" whose pointer is passed to cortex_a_mmu()
that initialises it.
This initialization is not visible to the compiler that issue
a compile error.
The same situation is common across the same file and the usual
workaround is to initialize it to zero; thus the same fix i
applied here.

Ticket: https://sourceforge.net/p/openocd/tickets/197/
Fixes: commit ad6c71e151 ("cortex_a: fix virt2phys when mmu is disabled")
Change-Id: I77dec41acdf4c715b45ae37b72e36719d96d9283
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4619
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-07-27 14:12:08 +01:00
Christopher Head
11e3b6fb09 target/cortex_m: make a variable local
The vec_ids variable is not referenced anywhere other than the vector
catch command handler. Make it local to that function.

Change-Id: Ie5865e8f78698c19a09f0b9d58269ced1c9db440
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4606
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-07-25 14:18:44 +01:00
Karl Palsson
1e374d508b drivers: cmsis-dap: print serial if available
Helpful for sanity checking connections

Change-Id: Ife0d8b4e12d4c03685aac8115c9739a4c1e994fe
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-on: http://openocd.zylin.com/3405
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-07-25 14:17:00 +01:00
Matthias Welwarsky
ad6c71e151 cortex_a: fix virt2phys when mmu is disabled
When the MMU is not enabled on debug state entry, virt2phys cannot
perform a translation since it is unknown whether a valid MMU
configuration existed before. In this case, return the virtual
address as physical address.

Change-Id: I6f85a7a5dbc200be1a4b5badf10a1a717f1c79c0
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4480
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-07-24 13:08:12 +01:00
Daniel Glöckner
e57f8e12da usb_blaster: Don't unnecessarily go through DR-/IR-Pause
There is no need to pass through DR-/IR-Pause after a scan if we want to
go to DR-/IR-Update. We just have to skip the first step of the path to
the end state because we already did that step when shifting the last
bit.

v2:
 - Fix comments as remarked in review of v1

Change-Id: I3c10f02794b2233f63d2150934e2768430873caa
Signed-off-by: Daniel Glöckner <daniel-gl@gmx.net>
Reviewed-on: http://openocd.zylin.com/4245
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-07-24 13:07:44 +01:00
Tim Newsome
a51ab8ddf6 Add RISC-V support.
This supports both 0.11 and 0.13 versions of the debug spec.

Support for `-rtos riscv` will come in a separate commit since it was
easy to separate out, and is likely to be more controversial.

Flash support for the SiFive boards will also come in a later commit.

Change-Id: I1d38fe669c2041b4e21a5c54a091594aac3e2190
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4578
Tested-by: jenkins
Reviewed-by: Liviu Ionescu <ilg@livius.net>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-07-24 13:07:26 +01:00
Antonio Borneo
9363705820 arm_adi_v5: put SWJ-DP back to JTAG mode at exit
When SWD mode is used, current OpenOCD code left the SWJ-DP in
SWD mode at exit. Also, current code is unable to switch back the
SWJ-DP in JTAG at next run, thus a power cycle of both target and
interface is required in order to run OpenOCD in JTAG mode again.

Put the SWJ-DP back to JTAG mode before exit from OpenOCD.

Use switch_seq(SWD_TO_JTAG) instead of dap_to_jtag(), because the
latter is not implemented on some interfaces. This is aligned
with the use of switch_seq(JTAG_TO_SWD) in swd_connect().

Change-Id: I55d3faebe60d6402037ec39dd9700dc5f17c53b0
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4493
Tested-by: jenkins
Reviewed-by: Bohdan Tymkiv <bhdt@cypress.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-07-24 13:06:59 +01:00
Antonio Borneo
c5658364b2 drivers: cmsis_dap_usb: implement cmd JTAG_TMS
Simply add a wrapper around cmsis_dap_cmd_DAP_SWJ_Sequence()

Change-Id: Icf86f84b24e9fec56e2f9e155396aac34b0e06d2
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4517
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-07-23 14:12:10 +01:00
Tim Newsome
4cd5c64122 Remove FSF mailing address.
Checkpatch complains about this (FSF_MAILING_ADDRESS).

Change-Id: Ib46a7704f9aed4ed16ce7733d43c58254a094149
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4559
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-07-23 14:06:23 +01:00
Darius Rad
fe38562dbe Avoid dereferencing NULL pointer.
If a NULL pointer is passed, don't attempt to increment it.  This avoids
passing the now not-NULL pointer on and eventually segfaulting.  Also
remove some unnecessary temporary variables.

Change-Id: I268e225121aa283d59179bfae407ebf6959d3a4e
Signed-off-by: Darius Rad <darius@bluespec.com>
Reviewed-on: http://openocd.zylin.com/4550
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2018-07-23 14:04:42 +01:00
Antonio Borneo
42097baf19 armv7a: read ttbcr and ttb0/1 at every entry in debug state
Commit bfc5c764df avoids reading
ttbcr and ttb0/1 at every virt2phys translation by caching them,
and it updates the cached values in armv7a_arch_state().
But the purpose of any (*arch_state)() method, thus including
armv7a_arch_state(), is to only print out and inform the user
about some architecture specific status.
Moreover, to reduce the verbosity during a GDB session, the
method (*arch_state)() is not executed anymore at debug state
entry (check use of target->verbose_halt_msg in src/openocd.c),
thus the state of translation table gets out-of-sync triggering
	Error: Address translation failure
or even using a wrong address in the memory R/W operation.

In addition, the commit above breaks the case of armv7r by
calling armv7a_read_ttbcr() unconditionally.

Fixed by moving in cortex_a_post_debug_entry() the call to
armv7a_read_ttbcr() on armv7a case only.
Remove the call to armv7a_read_ttbcr() in armv7a_identify_cache()
since it is (conditionally) called only in the same procedure
cortex_a_post_debug_entry().

Fixes: bfc5c764df ("armv7a: cache ttbcr and ttb0/1 on debug
state entry")
Change-Id: Ifc20eca190111832e339a01b7f85d28c1547c8ba
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4601
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-07-22 09:09:06 +01:00
Brent Roman
c584686fd1 server: Improve signal handling under Linux
Commit 5087a955 added custom signal handlers for the openocd
server process.

Before this commit, when openocd is run as a background process
having the same controlling terminal as gdb, Control-C would be
handled by gdb to stop target execution and return to the gdb prompt.

However, after commit 5087a955, the SIGINT caused by pressing
Control-C also terminates openocd, effectively crashing the
debugging session.  The only way to avoid this is run openocd in
a different controling terminal or to detach openocd from its
controlling terminal,
thus losing all job control for the openocd process.

This patch improves the server's handling of POSIX signals:
1) Keyboard generated signals (INT and QUIT) are ignored
   when server process has is no controlling terminal.
2) SIGHUP and SIGPIPE are handled to ensure that .quit functions
   for each interface are called if user's logs out of X
   session or there is a network failure.

SIG_INT & SIG_QUIT still stop openocd
when it is running in the foreground.

Change-Id: I03ad645e62408fdaf4edc49a3550b89b287eda10
Signed-off-by: Brent Roman <genosensor@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3963
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2018-07-21 07:43:23 +01:00
Dennis Ostermann
e59bb6c285 target/aarch64: Call aarch64_init_debug_access() earlier in aarch64_deassert_reset()
On Renesas R-Car, calling 'reset halt' and 'reset init' always made DAP inaccessible. Calling 'reset' and 'halt' seperatly worked fine.
The only differences seems to be the point in time when aarch64_init_debug_access() is called. This patch aligns the behaviour.

Change-Id: I2296c65e48414a7d9846f12a395e5eca315b49ca
Signed-off-by: Dennis Ostermann <dennis.ostermann@renesas.com>
Reviewed-on: http://openocd.zylin.com/4607
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-07-20 15:14:46 +01:00
Marc Schink
9f93cca427 target/armv7m_trace: Use prefix for enums
Change-Id: I3f199e6053146a1094d96b98ea174b41bb021599
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3905
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-07-19 10:49:24 +01:00
Marc Schink
55abb63752 target/armv7m_trace: Fix typo in enum
Change-Id: I6364ee5011ef2d55c59674e3b97504a285de0cb2
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3904
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-07-19 10:48:58 +01:00
Marc Schink
abc270c883 target: Fix segfault for 'mem2array'
Call 'mem2array' without arguments to reproduce the segmentation
fault.

Change-Id: I02bf46cc8bd317abbb721a8c75d7cbfac99eb34e
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4534
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
2018-07-18 21:27:12 +01:00
James Jacobsson
d293583e03 nrf5: Add HWID 0x139 (52832 rev E0)
Change-Id: I71b7471ccfcb8fcc6de30da57ce4165c7fb1f73f
Signed-off-by: James Jacobsson <slowcoder@gmail.com>
Reviewed-on: http://openocd.zylin.com/4604
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-07-18 21:11:12 +01:00
Liviu Ionescu
6fa18a455f Avoid null target->semihosting references.
The new common semihosting code introduced a bug,
in certain conditions target->semihosting was
used without semihosting being initialised.

The solution was to explicitly test for
target->semihosting before dereferencing it.

Change-Id: I4c83e596140c68fe4ab32e586e51f7e981a40798
Signed-off-by: Liviu Ionescu <ilg@livius.net>
Reviewed-on: http://openocd.zylin.com/4603
Tested-by: jenkins
Reviewed-by: Jonathan Larmour <jifl@eCosCentric.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-07-18 21:10:53 +01:00
Marc Schink
e270127288 flash/nor/stm32lx: Add revision 'V' for STM32L1xx Cat.3 devices
Change-Id: Ic92b0fb5b738af3bec79ae335876aa9e26f5f4cd
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4600
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2018-07-18 21:10:33 +01:00
Erwin Oegema
c4c14d614b flash/nor/at91sam4: fix sam4sa16c flash banks and its gpnvms count
There was already a github fork that had this fixed, but as we try
to use the latest, non-modified version of all software we use,
I would like to have this fix in the next releases of OpenOCD so
that if people uses $packagemanager, they will not have issues flashing
the last part of the flash of sam4sa16c chips.

Additionally, I've added some more logging related to the flash
bank that was used, and the chip ID that was detected.

Change-Id: I7ea5970105906e4560b727e46222ae9a91e41559
Signed-off-by: Erwin Oegema <blablaechthema@hotmail.com>
Reviewed-on: http://openocd.zylin.com/4599
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2018-07-18 21:10:07 +01:00
Edward Fewell
3e84da55a6 flash/nor: add support for TI MSP432 devices
Added msp432 flash driver to support the TI MSP432P4x and
MSP432E4x microcontrollers. Implemented the flash algo
helper as used in the TI debug and flash tools. This
implemention supports the MSP432E4, Falcon, and Falcon 2M
variants. The flash driver automatically detects the
connected variant and configures itself appropriately.
Added command to mass erase device for consistency with
TI tools and added command to unlock the protected BSL
region.

Tested using MSP432E401Y, MSP432P401R, and MSP432P4111
LaunchPads.
Tested with embedded XDS110 debug probe in CMSIS-DAP
mode and with external SEGGER J-Link probe.

Removed ti_msp432p4xx.cfg file made obsolete by this
patch.
Change-Id: I3b29d39ccc492524ef2c4a1733f7f9942c2684c0
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/4153
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-07-18 21:09:23 +01:00
Karl Palsson
b24301a01a drivers: cmsis-dap: Print version info when available
No need to wait until after connecting, might help diagnose part information by
printing earlier.

Change-Id: I51eb0d584be306baa811fbeb1ad6a604773e602c
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-on: http://openocd.zylin.com/3404
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-07-18 21:08:20 +01:00
Karl Palsson
5aceec2412 drivers: cmsis-dap: pull up common connect code
Just a minor deduplication

Change-Id: Idd256883e5f6d4bd4dcc18462dd5468991f507b3
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-on: http://openocd.zylin.com/3403
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-07-18 21:07:43 +01:00
Dominik Peklo
3a5b2b66db flash/nor/tcl: Distinguish between sectors and blocks in status messages
Use the right word in flash protect command status messages based on
whether the target bank defines num_prot_blocks. Minor message style
tidy-up.

Change-Id: I5f40fb5627422536ce737f242fbf80feafe7a1fc
Signed-off-by: Dominik Peklo <dom.peklo@gmail.com>
Reviewed-on: http://openocd.zylin.com/4573
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Christopher Head <chead@zaber.com>
2018-07-18 21:07:15 +01:00
Hellosun Wu
e36c2f2da4 nds32: Avoid detected JTAG clock
AICE2 doesn't support scan for the maximum clock frequency of
JTAG chain. It will cause USB command timeout.

Change-Id: I41d1e3be387b6ed5a4dd0be663385a5f053fbcf9
Signed-off-by: Hellosun Wu <wujiheng.tw@gmail.com>
Reviewed-on: http://openocd.zylin.com/4292
Tested-by: jenkins
Reviewed-by: Hsiangkai Wang <hsiangkai@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-07-18 21:06:51 +01:00
Christopher Hoover
84b571f667 Adds SAMD11D14AU flash support.
Corrects names of SAMD11D14AM and SAMD11D14ASS per datasheet.

Change-Id: I8beb15d5376966a4f8d7de76bfb2cbda2db440dc
Signed-off-by: Christopher Hoover <ch@murgatroid.com>
Reviewed-on: http://openocd.zylin.com/4597
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-07-18 21:06:20 +01:00
Peter Lawrence
336477c2b8 tcl/board: add SAMD11 Xplained Pro evaluation board
Change-Id: Id996c4de6dc9f25f71424017bf07689fea7bd3af
Signed-off-by: Peter Lawrence <majbthrd@gmail.com>
Reviewed-on: http://openocd.zylin.com/4507
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-07-18 21:05:55 +01:00
Karl Palsson
dda7258c63 target: atmel samd10 xplained mini
cortex m0+ on a tiny board, with an mEDBG (CMSIS-DAP) debug interface.

Change-Id: Iaedfab578b4eb4aa2d923bd80f220f59b34e6ef9
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-on: http://openocd.zylin.com/3402
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-07-18 21:05:40 +01:00
Tomas Vanek
493d2f5a34 psoc5lp: fix erase check, add free_driver_priv
psoc5lp_erase_check() was not properly adapted to the new
armv7m_blank_check_memory() in the hot fix 53376dbbed
This change fixes handling of num_sectors in dependecy of ecc_enabled.
Also add comments how ecc_enabled influences num_sectors.

Add pointer to default_flash_free_driver_priv() to all psoc5lp flash
drivers to keep valgrind happy.

Change-Id: Ie1806538becd364fe0efb7a414f0fe6a84b2055b
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4569
Tested-by: jenkins
2018-07-18 21:04:52 +01:00
Christopher Head
98a07154bc target/stm32f7x: Clear stuck HSE clock with CSS
Change-Id: Ica0025ea465910dd664ab546b66f4f25b271f1f5
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4570
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2018-07-14 16:18:48 +01:00
Cody Schafer
4a9a07b1c5 target/image: make i/j unsigned to avoid ubsan runtime error
src/target/image.c:1055:15: runtime error: left shift of 128 by 24 places cannot be represented in type 'int'

Change-Id: I322fd391cf3f242beffc8a274824763c8c5e69a4
Signed-off-by: Cody Schafer <openocd@codyps.com>
Reviewed-on: http://openocd.zylin.com/4584
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Christopher Head <chead@zaber.com>
2018-07-13 17:15:57 +01:00
Antonio Borneo
73de828988 gdb_server: set current_target from connection's one
In a multi-target environment we are supposed to have a single
gdb server for each target (or for each group of targets within
a SMP node).
By default, the gdb attached to a server sends its command to
the target (or to the SMP node targets) linked to that server.

This is working fine for the normal gdb commands, but it is
broken for the native OpenOCD commands executed through gdb
"monitor" command. In the latter case, gdb "monitor" commands
will be executed on the current target of OpenOCD configuration
script (that is either the last target created or the target
specified in a "targets" command).

Fixed in gdb_new_connection() by replacing the current target
in the connection's copy of command context.

Change-Id: If7c8f2dce4a3138f0907d3000dd0b15e670cfa80
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4586
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Christopher Head <chead@zaber.com>
2018-07-13 17:15:35 +01:00
Antonio Borneo
421e75722d gdb_server: only trigger once the event gdb-detach at gdb quit
When GDB quits (e.g. with "quit" command) we first execute
gdb_detach() to reply "OK" then, at GDB disconnect (either TCP
or pipe connection type), we execute gdb_connection_closed().
In case GDB is killed or it crashes, OpenOCD only executes the
latter when detects the disconnection.
Both gdb_detach() and gdb_connection_closed() trigger the event
TARGET_EVENT_GDB_DETACH thus getting it triggered twice on clean
GDB quit.

Do not trigger the event TARGET_EVENT_GDB_DETACH in gdb_detach()
and let only gdb_connection_closed() to handle it.

Change-Id: Iacf035c855b8b3e2239c1c0e259c279688b418ee
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4585
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-07-13 17:15:13 +01:00
Andreas Färber
ce28a0c8c8 tcl: board: Add NXP Freedom FRDM-LS1012A config
An update for the K20 CMSIS-DAP firmware can be found here:
https://community.nxp.com/thread/387080?commentID=840141#comment-840141

Change-Id: I149d7f8610aa56daf1aeb95f14ee1bf88f7cb647
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/4595
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-07-13 09:19:19 +01:00
Andreas Färber
e7a4aa3534 tcl: target: Add NXP LS1012A config
As seen on the FRDM-LS1012A board.

Change-Id: Ifc9074b3f7535167b9ded5f544501ec2879f5db7
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/4594
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-07-13 09:19:15 +01:00
Andreas Färber
b82ee0799f target: armv8: Avoid semihosting segfault on halt
Avoid a NULL pointer dereference when halting an aarch64 core.

Change-Id: I333d40475ab26e2f0dca5c27302a5fa4d817a12f
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/4593
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-07-13 09:19:09 +01:00
Omair Javaid
0aa8e8cfc3 GDB fileIO stdout support
This patch fixes gdb fileio support to allow gdb console to be used as stdout.

Now we can do something like
gdb <inferior file>

(gdb) tar ext :3333
(gdb) load
(gdb) monitor arm semihosting enable
(gdb) monitor arm semihosting_fileio enable
(gdb) continue

Here: Output from inferior using puts, printf etc will be routed to gdb console.

Change-Id: I9cb0dddda1de58038c84f5b035c38229828cd744
Signed-off-by: Omair Javaid <omair.javaid@linaro.org>
Reviewed-on: http://openocd.zylin.com/4538
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-07-13 09:18:21 +01:00
Omair Javaid
a7da117ad6 Add ARM v8 AArch64 semihosting support
This patch implements semihosting support for AArch64. This picks
code from previously submitted AArch64 semihosting support patch
and rebases on top of reworked semihosting code. Tested in AArch64
mode on a Lemaker Hikey Board with NewLib and GDB.

Change-Id: I228a38f1de24f79e49ba99d8514d822a28c2950b
Signed-off-by: Omair Javaid <omair.javaid@linaro.org>
Reviewed-on: http://openocd.zylin.com/4537
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-07-13 09:18:14 +01:00
Antonio Borneo
d04254196e target: fix 'bp' command help message
"asid" and "length" are separate arguments of the command.
Put space between them.

Change-Id: I36cfc1e3a01caafef4fc3b26972a0cc192b0b963
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4511
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-07-09 20:12:48 +01:00
Christopher Head
4999c9d980 flash/nor/stm32h7: Fix incorrect comment
The name of the bit according to the reference manual is inconsistency
error, not increment error.

Change-Id: Ie3b73c0312db586e35519e03fd1a5cb225673d97
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4521
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-07-03 07:48:40 +01:00
Christopher Head
f9d7554ee4 flash/nor/stm32: Eliminate working area leak
On a specific early-return path, an allocated working area was not
freed. Free it.

Change-Id: I7c8fe51ff475f191624086996be1c77251780b77
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4520
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-07-03 07:48:04 +01:00
Christopher Head
47d0930410 flash/nor/stm32: Report errors in wait_status_busy
Flash operation errors that occur during algorithm programming are
reported via the algorithm return value. However, Flash operation
errors that occur during non-algorithm work (erasing, programming
without a work area, programming the last non-multiple-of-32-bytes on
an H7, etc.) generally end with a call to stm32x_wait_status_busy,
which reads the status register and clears the error flags but fails
to actually report that something went wrong should an error flag
(other than WRPERR) be set. Return an error status from
stm32x_wait_status_busy in those cases. Correct a log message
accordingly.

Change-Id: I09369ea5f924fe58833aec1f45e52320ab4aaf43
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4519
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-07-03 07:47:14 +01:00
Antonio Borneo
541dcc2487 target/cortex_m: return error if breakpoint address is out of range
If the "Flash Patch and Breakpoint" unit is rev.1 then it can only
accept breakpoint addresses below 0x1FFFFFFF.
Detailed info in "ARM v7-M Architecture Reference Manual", DDI0403E
at chapter "C1.11 Flash Patch and Breakpoint unit".

Print a message and return error if the address of hardware
breakpoint cannot be handled by the breakpoint unit.

Change-Id: I95c92b1f058f0dfc568bf03015f99e439b27c59b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4535
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Christopher Head <chead@zaber.com>
2018-07-03 07:28:02 +01:00
Antonio Borneo
91c125a906 jtag/drivers/cmsis-dap: fix connect in cmsis_dap_swd_switch_seq()
The proc cmsis_dap_swd_switch_seq() is part of the SWD API for
this interface driver. It is valid only when the interface is
used in SWD mode.
In this proc there is the need to call, in sequence, first
cmsis_dap_cmd_DAP_Disconnect() then cmsis_dap_cmd_DAP_Connect().
The latter call requires the connection mode as parameter, that
inside cmsis_dap_swd_switch_seq() can only be CONNECT_SWD.

The current implementation is not correct and in some cases can
pass mode CONNECT_JTAG. Moreover, JTAG is optional in CMSIS-DAP
and passing mode CONNECT_JTAG triggers an error with SWD-only
interfaces.

Use mode CONNECT_SWD in SWD specific cmsis_dap_swd_switch_seq().

Change-Id: Ib455bf5b69cb2a2d146a6c8875387b00c27a5690
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4571
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-07-03 07:27:14 +01:00
Marek Vasut
8b8b66559d tcl/board: Factor out common R-Car Gen2 code
Factor out the code shared by all R-Car Gen2 boards into a single
file to get rid of the duplication.

Change-Id: I70b302c2e71f4e6fdccb2817dd65a5493bb393d8
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/4533
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-06-25 10:06:39 +01:00
Marek Vasut
c49ea5dab2 tcl/board: Add Renesas R-Car R8A7794 E2 Silk board
Add configuration for the Renesas R-Car R8A7794 E2
based Silk evaluation board.

Change-Id: I504b5630b1a2791ed6967c6c2af8851ceef9723f
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
---
NOTE: This requires SW7[1] in position 1 (default is 0)
Reviewed-on: http://openocd.zylin.com/4532
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-06-25 09:27:13 +01:00
Marek Vasut
27adc41292 tcl/board: Add Renesas R-Car R8A7791 M2W Porter board
Add configuration for the Renesas R-Car R8A7791 M2W
based Porter evaluation board.

Change-Id: Iaadb18f29748f890ebb68519ea9ddbd18e7649af
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/4498
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-06-25 09:27:10 +01:00
Marek Vasut
c886433332 tcl/board: Add Renesas R-Car R8A7790 H2 Stout board
Add configuration for the Renesas R-Car R8A7790 H2
based Stout ADAS board.

Change-Id: Ib880b5d2e1fab5c8c0bc0dbcedcdce8055463fe2
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/4497
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-06-25 09:27:05 +01:00
Marek Vasut
21f52f6480 tcl/target: Add Renesas R-Car R8A7794 E2 target
Add configuration for the Renesas R-Car R8A7794 E2 target.
This is an SoC with two Cortex A7 ARMv7a cores, both A7
cores are supported.

Change-Id: Ic1c81840e3bfcef8ee1de5acedffae5c83612a5e
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/4531
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-06-25 09:26:59 +01:00
Antonio Borneo
1dc466f515 target/arm_adi_v5: keep CSW and TAR cache updated
The call to dap_queue_ap_write() can fail and the value in CSW and
TAR becomes unknown.

Invalidate the OpenOCD cache if dap_queue_ap_write() fails.

Change-Id: Id6ec370b4c5ad07e454464780c1a1c8ae34ac870
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4564
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-06-22 09:24:59 +01:00
Antonio Borneo
0057c71ab6 target/arm_adi_v5: sync CSW and TAR cache on apreg write
When using apreg to change AP registers CSW or TAR we get internal
cached value not valid anymore.

Reuse the setup functions for CSW and TAR to write them.
Invalidate the cached value before the call to force the write, thus
keeping original apreg behaviour.

Change-Id: Ib14fafd5e584345de94f2e983de55406c588ac1c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4565
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-06-22 09:24:37 +01:00
Liviu Ionescu
4301ad83db mips_m4k.c: Fix build with --disable-target64
Replace PRIx64 with TARGET_PRIxADDR to avoid build problems
when --disable-target64 is used during configure.

Change-Id: I054a27a491e86c42c9386a0488194320b808ba96
Signed-off-by: Liviu Ionescu <ilg@livius.net>
Reviewed-on: http://openocd.zylin.com/4566
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Tim Newsome <tim@sifive.com>
2018-06-22 09:24:17 +01:00
James Marshall
a0356398e5 target/arm: Add PLD command to ARM disassembler.
Updates the ARM disassembler to handle PLD (PreLoad Data) commands.
Previously handled by printing a TODO message. There are three forms of
the command: literal, register, and immediate. Simply decode based off
of the A1 encoding for the instructions in the ARM ARM. Also fixes mask
to handle PLDW commands.

Change-Id: I63bf97f16af254e838462c7cfac80f6c4681c556
Signed-off-by: James Marshall <jcmarsh@gwmail.gwu.edu>
Reviewed-on: http://openocd.zylin.com/4348
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2018-06-22 07:42:27 +01:00
Antonio Borneo
548bcee30d flash/nor/psoc5lp: fix compile issue on GCC 8.1.0
Issue already identified by Alex https://sourceforge.net/u/alexbour/
in ticket #191 https://sourceforge.net/p/openocd/tickets/191/

	src/flash/nor/psoc5lp.c:237:2: error: ‘strncpy’ output
	truncated before terminating nul copying 2 bytes from a
	string of the same length [-Werror=stringop-truncation]

Fix it by assigning the value to the array elements.

Change-Id: I22468e5700efa64ea48ae8cdec930c48b4a7d8fb
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4563
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-06-15 20:11:36 +01:00
Tomas Vanek
20d18d415d tcl/target/stm32f7x: configure faster system clock in reset-init
STM32F7xx devices need faster clock for flash programming
over JTAG transport. Using reset default 16 MHz clock
resulted in lot of DAP WAITs and substantial decrease
of flashing performance.

Adapted to the restructured dap support
(see 2231da8ec4).

Change-Id: Ida6915331dd924c9c0d08822fd94c04ad408cdc5
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4464
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
2018-06-15 20:07:33 +01:00
Tomas Vanek
62b088df4e src/flash/tms470: remove testing of sectors[].is_erased state
The erase check routine checked sectors only if is_erased != 1

Check sector unconditionally.

While on it fix clang static analyzer warnings.

Change-Id: I9988615fd8530c55a9b0c54b1900f89b550345e9
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4401
Tested-by: jenkins
2018-06-15 20:07:22 +01:00
Tomas Vanek
f05bcdebbb flash/nor/nrf5: remove is_erased setting and autoerase before write
Cached flash erase state in sectors[].is_erased is not reliable as running
target can change the flash.

Autoerase was issued before flash write on condition is_erased != 1
Remove autoerase completely as it is a quite non-standard feature.

Change-Id: I19bef459e6afdc4c5fcaa2ccd194cf05be8a42b6
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4400
Tested-by: jenkins
2018-06-15 20:07:09 +01:00
Edward Fewell
7b03129916 flash/nor: Add support for TI CC26xx/CC13xx flash
Added cc26xx flash driver to support the TI CC26xx and CC13xx
microcontrollers. Driver is capable of determining which MCU
is connected and configures itself accordingly. Added config
files for four specific variants: CC26x0, CC13x0, CC26x2, and
CC13x2.

Note that the flash loader code is based on the sources used
to support flash in Code Composer Studio and Uniflash from TI.

Removed cc26xx.cfg file made obsolete by this patch.

Change-Id: Ie2b0f74f8af7517a9184704b839677d1c9787862
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/4358
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Fredrik Hederstierna <fredrik@hederstierna.com>
2018-06-15 20:06:25 +01:00
Andreas Färber
06123153f3 psoc5lp: Add NV Latch flash driver
Erasing is not supported by the hardware, it can be written directly.

Tested on CY8CKIT-059, except modifying-write.

Change-Id: I6e920ed930dcd5c7f0b10c5b1b4791a828d9080a
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3434
Tested-by: jenkins
2018-06-06 18:12:21 +01:00
Tomas Vanek
53376dbbed flash/nor/psoc5lp: fix bad commit 2d5f2ede55
Change #3432 was merged into git master without adapting it
to #4297 "prepare infrastructure for multi-block blank check".
This is a fast fix of PSoC5LP specific blank check.
Not tested on real PSoC5LP device.

Change-Id: I7dc13ee7bd1f07b2bfe5a93a5030c0c482d30f00
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4557
Tested-by: jenkins
2018-06-06 17:42:24 +01:00
Edward Fewell
fb287ec5f5 drivers: xds110: Remove unnecessary and deprecated libusb function.
libusb-1.0.22 has deprecated the libusb_set_debug function. This
function was present in the XDS110 driver as an artifact left over
from early debugging. It isn't required because logging is disabled
by default. Removing it to simplify the code and no longer need to
have libusb version specific #if's in the code.

Change-Id: I9c3f16c039da3f3fad9c4a1169978b0d85a1b45c
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/4553
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2018-06-06 15:50:39 +01:00
Andreas Färber
f1427cca3c psoc5lp: Add EEPROM flash driver
Tested on CY8CKIT-059.

Change-Id: Ib02262e8eebf0df3d29492b8a7daa65b262da580
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3433
Tested-by: jenkins
2018-06-06 15:49:14 +01:00
Andreas Färber
2d5f2ede55 flash/nor: Add PSoC 5LP flash driver
Always probe for ECC mode and display ECC sectors if disabled.
Non-ECC write is implemented as zeroing the ECC/config bytes.
Erasing ECC sectors is ignored, erase-checking takes them into account.

Tested with CY8CKIT-059 (CY8C5888), except ECC mode.

Change-Id: If63b9ffca7ad8de038be3c086c49712b629ec554
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Forest Crossman <cyrozap@gmail.com>
Reviewed-on: http://openocd.zylin.com/3432
Tested-by: jenkins
2018-06-06 15:48:33 +01:00
Edward Fewell
d02de3a8a9 flash/nor: Add support for TI CC3220SF internal flash
Added cc3220sf flash driver to support the TI CC3220SF
microcontrollers. Implemented flash driver to support the
internal flash of the CC3220SF. The implementation does not
support the serial flash of the CC32xx family that requires
connection over UART, and not via JTAG/SWD debug. Added config
files for both CC32xx devices (no flash) and CC3220SF (with
flash).

Updated to implement comments from code review.
Additional updates to handle remaining comments from review.
Additional updates per review.

Added code to only request aligned writes and full 32-bit
words down to flash helper algorithm. Updated for recent
changes in OpenOCD flash code.

Removed cc32xx.cfg file made obsolete by this patch.
Change-Id: I58fc1478d07238d39c7ef02339f1097a91668c47
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/4319
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-06-06 15:38:25 +01:00
Omair Javaid
a077715b71 Fix Semihosting FileIO for targets using vcont packet
This patch fixes a bug where target fails to resume after completing GDB FileIO.
We need to update target last run control information to decide resumption. This
was not being done for vcont packets.

Change-Id: I44bea31720f8b877dba97d77a202303d546ea5bd
Signed-off-by: Omair Javaid <omair.javaid@linaro.org>
Reviewed-on: http://openocd.zylin.com/4539
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-06-06 15:23:04 +01:00
Liviu Ionescu
7028f53877 target/target.c: free semihosting member
When destroying the target, if the semihosting
pointer is set, free it.

Change-Id: I07d34918bb3fddab1eee11219dd66f4842708ec1
Signed-off-by: Liviu Ionescu <ilg@livius.net>
Reviewed-on: http://openocd.zylin.com/4552
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-06-06 15:22:51 +01:00
Khem Raj
ebf2d73340 Fix libusb-1.0.22 deprecated libusb_set_debug with libusb_set_option
libusb_set_debug is deprecated in libusb >= 1.0.22 therefore replace
with equivalent libusb_set_option()  API

Change-Id: Ic0287a1bc0ccc90afe8e4c688085f0b25a7fb004
Signed-off-by: Khem Raj <raj.khem@gmail.com>
Reviewed-on: http://openocd.zylin.com/4540
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-06-05 12:36:53 +01:00
Christopher Head
95a0024ef2 target/cortex_m: constify some variables
Change-Id: I1f3fddd89597333fc1bb9535c0cd76ca3e008324
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4503
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-06-05 11:30:19 +01:00
Bohdan Tymkiv
69b0021846 flash/nor/virtual: copy missing fields from master flash_bank structure
Change-Id: I4ac71ad4b46ed613192310d85eb385b727649a11
Signed-off-by: Bohdan Tymkiv <bhdt@cypress.com>
Reviewed-on: http://openocd.zylin.com/4505
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2018-06-05 11:29:57 +01:00
Bohdan Tymkiv
456f982868 flash/nor/core: fix double-free crash with 'virtual' flash banks
flash_bank structure of 'virtual' flash driver is a full copy of
the master flash_bank structure including bank->sectors and
bank->prot_blocks pointers. These pointers point to memory
locations allocated by the master driver and thus master driver
is responsible for deallocating them.
Do not free bank->sectors and bank->prot_blocks of 'virtual'
driver since they were already released by master flash driver.

Change-Id: I01f373d4adb3fc79e2724964926b9276442c5c52
Signed-off-by: Bohdan Tymkiv <bhdt@cypress.com>
Reviewed-on: http://openocd.zylin.com/4504
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-06-05 11:29:33 +01:00
Antonio Borneo
5952f5e50a breakpoints: simplify the test to find a breakpoint
The test is overly complicated and unreadable.
Simplify it while keeping the exact same behaviour.

Change-Id: I6b22291ca454e1eddeeab4024d3983dc4c603d3a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4512
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-06-04 09:17:14 +01:00
Antonio Borneo
74831e74c8 target: fix syntax in help message
The name of the command is already printed before the string
in ->usage, thus it appears twice.
E.g.
	> help examine
	  stm32f4x.cpu arp_examine arp_examine ['allow-defer']
	        used internally for reset processing
	  stm32f4x.cpu examine_deferred examine_deferred
	        used internally for reset processing
	  stm32f4x.cpu was_examined was_examined
	        used internally for reset processing

Remove the command name from the string in ->usage.

Change-Id: If3b1368ffff8a94eb629ae3679e2e5f2f11ae92e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4536
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-06-04 09:17:03 +01:00
Kamal Dasu
cad39b7390 target: aarch64: Adding mcr, mrc 32-bit coprocesor read/write support
Adding mrc and mcr support for 32-bit boot mode on aarch64 target.

Change-Id: I3879908253ccdf79509dcad752871f422526ec64
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Reviewed-on: http://openocd.zylin.com/4483
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-06-04 09:16:47 +01:00
Liviu Ionescu
2517bae6c1 Rework/update ARM semihosting
In 2016, ARM released the second edition of the semihosting specs
("Semihosting for AArch32 and AArch64"), adding support for 64-bits.

To ease the reuse of the semihosting logic for other platforms
(like RISC-V), the semihosting code was isolated from the ARM
target and updated to the latest specs.

The new code is already in use since January (in GNU MCU Eclipse
OpenOCD) and no problems were reported, neither for ARM nor for
RISC-V targets, after more than 7K downloads.

The 2 new files were formatted with uncrustify.

Change-Id: Ie84dbd86a547323bb8a5d24eab68fc7dad013d96
Signed-off-by: Liviu Ionescu <ilg@livius.net>
Reviewed-on: http://openocd.zylin.com/4518
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-06-04 09:16:08 +01:00
Paul Fertser
cdf1e826eb jtag: drivers: sysfsgpio: lift upper gpio number limit
Recent Linux maps GPIOs from 1023 downwards so do not limit the number
to 1000.

This should fix #183.

Change-Id: I6d4f493b670be9ed9b82759f0fb686a9faddbbf5
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4502
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-05-31 13:25:30 +01:00
Edward Fewell
2ba27e2f3e jtag/drivers: Add support for TI XDS110 debug probe
Add support for the XDS110 debug probe using the APIs in the
probe's firmware. Includes support for older versions of the
firmware (with reduced performance) and support for a newer
version that includes OpenOCD specific APIs. Tested on various
TI LauchPads including MSP432P4, MSP432E4, CC2650, CC2652, and
CC3220SF.

Updated to add better support for swd switch. Removed issues found with
clang static analysis.

Updated to add rules entry for the XDS110 probe and Tiva DFU mode (which
affects both XDS110 and ICDI probes).

Change-Id: Ib274143111a68e67e80003797c6a68e3e80976b2
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/4322
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-05-31 13:25:16 +01:00
Paul Fertser
b50fa9a19d Fix warnings exposed by GCC8
gcc (GCC) 8.1.0 generates new warnings and thus fails the build.

The ARM disassembler warnings actually exposed a bug in SMALW, SMULW and
SMUL instructions decoding.

Reported by Eimers on IRC.

Change-Id: I200c70f75a9e07a1f13a592addc1c5fb37714440
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4526
Tested-by: jenkins
Reviewed-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-05-30 09:36:46 +01:00
Marc Schink
dae1ec1278 configure.ac: Fix required libjaylink version
Change-Id: I9ede86eeef8991db52ffa188ff293c14bd50a1f4
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4450
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-05-19 19:17:59 +01:00
Antonio Borneo
f0767a316a doc: fix several typos within manual documents
Mostly trivial fixes spotted by spell checker

Change-Id: I3af693faf5506c866e2abe253a0e37aea3c4d284
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4510
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-05-09 11:43:23 +01:00
Philipp Tomsich
7b94ae9e52 arm_dpm: flush both scratch registers (R0 and R1)
Neither the initial loop to clear dirty registers (which visits all
registers starting at R2 and counting upwards) nor the final explicit
flushes ensure a write-back in arm_dpm_write_dirty_registers.

This change makes sure that both our scratch registers (i.e. R0 and
R1) are written back to the target.

Change-Id: If65be4f371cd40af9a0cfa97f3730b070b92e981
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-on: http://openocd.zylin.com/4506
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-04-27 20:00:51 +01:00
Antonio Borneo
aba11ae6e2 doc: fix several typos in openocd.texi
Mostly trivial fixes spotted by spell checker
One fix s/are/is/
No changes in the content of the document

Change-Id: Ic2d8696860c540e901e8c5190f8f1e7dce80545f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4402
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-04-26 06:43:18 +01:00
Faisal Shah
087a162e3c ChibiOS thread states: Update thread state to label mapping
Fixed style issue.
Removed #define with list of strings, and just put the
strings in the array initialization directly.
Removed empty space at the start of line.

Change-Id: I76580be203d7d69b8c5b5440f820156543e0d5cc
Signed-off-by: Faisal Shah <faisal.shah@gmail.com>
Reviewed-on: http://openocd.zylin.com/4488
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-04-23 20:46:52 +01:00
Bohdan Tymkiv
4440bf1fcd psoc6: Run flash algorithm asynchronously to improve performance
Existing psoc6 driver starts flash algorithm for each Flash row. This is
suboptimal from performance point of view, starting/stopping flash
algorithm for each row adds significant overhead. This change starts
flash algorithm and leaves it running asynchronously while driver
performs flash operations.

Performance gain is 170...250% depending on probe:

flash write_image img_256k.bin    | w/o this change | with this change |
----------------------------------|-----------------|------------------|
KitProg2/CMSIS-DAP, SWD @ 1 MHz   |     4 KiB/s     |     10 KiB/s     |
J-Link Ultra, SWD @ 1 MHz         |    17 KiB/s     |     31 KiB/s     |
J-Link Ultra, SWD @ 4 MHz         |    33 KiB/s     |     57 KiB/s     |

Change-Id: I5bd582584b35af67600c4d197829eb7aeeec7e3f
Signed-off-by: Bohdan Tymkiv <bhdt@cypress.com>
Reviewed-on: http://openocd.zylin.com/4472
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-04-23 20:42:06 +01:00
Tomas Vanek
b941e2e727 flash/nor, contrib/loaders: add stm32 loaders Makefile and generated .inc
Flash loaders refactored to the new style - use generated .inc
instead of hexadecimal machine code in the flash driver source.

Change-Id: If65a2099589e210f9450819b467d67819fd841fc
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4439
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-04-23 20:41:50 +01:00
Matthias Welwarsky
2eadf1e847 board: add configuration for stm32f103c8 "Blue Pill"
The "Blue Pill" is a popular development board with an STM32F103C8
micro controller. According to sources, it has a 128kB Flash on board
even though the option bytes only report 64kB. This patch therefore also
modifies target/stm32f1x.cfg to take an optional FLASH_SIZE variable into
account which the board file sets to 0x20000.

Change-Id: I8a78ccd2b5faf637c539ee3cf8136789ee15c95d
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4495
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-04-23 08:55:11 +01:00
Marek Vasut
3737dd69e7 tcl/target: Add Renesas R-Car R8A7790 H2 target
Add configuration for the Renesas R-Car R8A7790 H2 target.
This is an SoC with four Cortex A15 and four Cortex A7
ARMv7a cores, only the four A15 cores are supported.

Change-Id: I6099b257cc0f04e6858ed5f5f8c8d8ad82ef7650
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/4490
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-04-18 13:38:35 +01:00
Antonio Borneo
3a28c8c4ba jtag: adapter: fix indentation in handle_interface_command
Minor fix, no code change, just align it to the block it belongs to.

Change-Id: I4c3b0d0bd00a55d5109d3723e5c4bfb2fc72e366
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4492
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-04-17 08:29:49 +01:00
Matthias Welwarsky
2b47ded8de target: add Cortex-M4 target to VF6xx target
The Vybrid VF6xx SoCs contain an additional Cortex-M4
core connected to AP number 3 of the main DAP.

Change-Id: I59c020fdfc53e909b1f0dac1a8627a62cdaa74f2
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3640
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-04-12 20:49:48 +01:00
Tomas Vanek
81d0b769a6 target/cortex_m: allow setting the type of a breakpoint
Cortex-M target used 'auto_bp_type' mode. The requested type
of breakpoint was ignored and hard (FPB) breakpoints were set in
'code memory area' 0x00000000-0x1fffffff, soft breakpoints were set above
0x20000000.

The code memory area of Cortex-M does not mean the memory is flash and
vice versa. External flash (parallel or QSPI) is usually mapped above
code memory area. Cortex-M7 ITCM RAM is mapped at 0. Kinetis
has a RAM block under 0x20000000 boundary.

Remove 'auto_bp_type' mode, set breakpoints to requested type.

Change 'cortex_m maskisr auto' handling to use a hard temporary
breakpoint everywhere: it can also workaround not working soft breakpoints
on Cortex-M7 with ICache enabled.

Change-Id: I7a9f9464c5e10bfd7f17cba1037ed07a064fa2e8
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4429
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-04-12 20:49:18 +01:00
Matthias Welwarsky
09076d10dd armv8: valgrind memleak fixes
Various fixes for memory leaks, adds a target cleanup for aarch64
and ARM CTI objects.

Change-Id: I2267f0894df655fdf73d70c11ed03df0b8f8d07d
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4478
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-04-10 09:13:02 +01:00
Matthias Welwarsky
c0f81fbee7 target: add configuration for NXP MC-IMX8M-EVK
includes target configuration for i.MX8M SoC family,
board file needs to set up CHIPNAME and CHIPCORES
to match the actual hardware configuration

Change-Id: Ieb6d89cab2477a58f85d0ef9cd242710950191c0
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4434
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-04-10 09:12:35 +01:00
Matthias Welwarsky
5c035e322f tcl/board: add board configuration for NXP IMX7SABRE
configuration also contains a reset-init procedure that disables the
watchdog and initilizes the boards DDR memory so that you can upload
baremetal (e.g. boot loader) code into DDR and start it from there.

Change-Id: I4d2311b3708a5fcb5174a3447f34ae3904de7243
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4227
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-04-10 09:12:22 +01:00
Tomas Vanek
a9fb0d07f0 flash/nor/at91sam: implement flash bank deallocation for SAM series
Microchip (former Atmel) SAM drivers allocate a struct per chip.

at91sam3, at91sam34:
Deallocate all chip structs from the list at once, on the first bank
deallocation.

at91samd and at91sam4l drivers do not handle more than one bank.
Convert them to simple driver_priv allocation and use
default_flash_free_driver_priv().

Change-Id: I49d7200f38a4568c7e12f306c27d1b1b72646736
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4416
Tested-by: jenkins
2018-04-10 06:19:01 +01:00
Tomas Vanek
66d924f787 flash/nor/kinetis: implement flash bank deallocation
Change-Id: I8ef80eae646d3b3eb7f6dd42067f8516adc5abef
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4415
Tested-by: jenkins
2018-04-10 06:18:35 +01:00
Tomas Vanek
c8c20b7c0b flash/nor: handle flash write alignment/padding in the infrastructure
Most of flash drivers have to ensure proper flash write block alignment
and padding. As there was no support for it in the flash infrastructure,
each driver does it its own way. Sometimes this part of code is not properly
tested and contains bugs.

flash_write(_unlock) joins all image sections targeted to one flash bank
using padded areas as a glue. This solves alignment problems on section
boundaries but imposes other problems.

Introduce new flash bank parameters write_start_alignment,
write_end_alignment and minimal_write_gap.
New flash drivers can just properly set these values instead of handling
alignment by its own.

Adapt infrastructure (namely flash_write_unlock(), handle_flash_fill_command()
and handle_flash_write_bank_command()) to prepare write data padded
to an alignment required by the flash bank.

Rework flash_write_unlock() to discontinue write block when the gap
between sections is bigger than minimum specified in minimal_write_gap.
minimal_write_gap is set to one sector by default.

Change-Id: I4368dd402dfaf51c193bcbf1332cffff092b239b
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4399
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
2018-04-10 06:17:52 +01:00
Tomas Vanek
a867e36f78 target armv7m: multi-block erase check
Tested on PSoC6 (Cortex-M0+ core), onboard KitProg2 in CMSIS-DAP mode,
adapter_khz=1000.
Plain read:
	flash read_bank 0 /dev/null
takes 48 seconds.

erase_check without this change:
	flash erase_check 0
takes horrible 149 seconds!!

And the same command with the change applied takes 1.8 seconds.
Quite a difference.

Remove the erase-value=0 version of algorithm as the new one can check
for any value.

If the target is an insane slow clocked CPU (under 1MHz) algo
timeouts. Blocks checked so far are returned and the next call
uses increased timeout.

Change-Id: Ic0899011256d2114112e67c0b51fab4f6230d9cd
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4298
Tested-by: jenkins
Reviewed-by: Jonas Norling <jonas.norling@cyanconnode.com>
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
2018-04-10 06:17:00 +01:00
Tomas Vanek
eb8912ec38 target, flash: prepare infrastructure for multi-block blank check
'flash erase_check' command runs a check algorithm on a target
if possible. The algorithm is run repeatedly for each flash sector.
Unfortunately every start and stop of the algorithm impose not negligible
overhead.
In practice it means checking is faster than plain read only for
sectors of size approx 4 kByte or bigger. And checking sectors
as short as 512 bytes runs approx 4 times slower than plain read.

The patch changes API call target_blank_check_memory() and related
to take an array of sectors (or arbitrary memory blocks).

Changes in target-specific checking routines are kept minimal.
They use only the first block from the array and process it by
the unchanged algorithm.

default_flash_blank_check() routine repeats target_blank_check_memory()
until all blocks are checked, so it works with both multi-block
and single-block based checkers.

Change-Id: I0e6c60f2d71364c9c07c09416b04de9268807f5e
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4297
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
2018-04-10 06:16:40 +01:00
Niklas Söderlund
f00d9bb1d7 tcl/target: Add Renesas R-Car R8A7791 M2W target
Add configuration for the Renesas R-Car R8A7791 M2W target.
This is an SoC with two Cortex A15 ARMv7a cores, both cores
are supported.

This patch is based on initial submission by Adam Bass and
improvements by Niklas Söderlund.

Change-Id: I297da62b9ce71ad222a401d98e6bcb8502427673
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Adam Bass <adam.bass@renesas.com>
Cc: Niklas Söderlund <niklas.soderlund@ragnatech.se>
Reviewed-on: http://openocd.zylin.com/4485
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-04-09 20:18:29 +01:00
Paul Fertser
6e356cbfe2 HACKING: document practices to improve code quality
Change-Id: I58a7d978b7d5bca3037c4535f06746b9f4411950
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4343
Tested-by: jenkins
2018-04-09 09:05:58 +01:00
Paul Fertser
70b15f989f configure: disable all drivers when zy1000 is enabled
This also fixes the transport_is_hla FIXME.

Change-Id: I33960f373f11e3e203f9aed9c6d02bf7ca48ac97
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4473
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-04-09 09:04:46 +01:00
Tomas Vanek
dbd7e80eb4 gdb_server: gdb_memory_map() rework
Use sector sizes instead of bank size.

Detect a gap between sectors and emit xml blocks accordingly.

Detect sector overflow over the bank size.

Change-Id: If0e0e44b0c3b93067b4d717c9c7b07c08582e57b
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4436
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-04-07 20:34:28 +01:00
Armin van der Togt
4f2c3e6c4f rtos: Fix XPSR_OFFSET for cortex_m4f stacking
Structures rtos_standard_Cortex_M4F_stacking and 
rtos_standard_Cortex_M4F_FPU_stacking in rtos_standard_stackings.c 
where using rtos_standard_Cortex_M3_stack_align for the stack-align 
function. This function calls rtos_Cortex_M_stack_align with 
XPSR_OFFSET = 0x3c. This offset is correct for cortex-M3 but not for 
cortex-M4F and cortex-M4F with fpu. This patch adds stack_align 
functions for M4F an M4F_FPU

Change-Id: If6a90b1898fccbb85619a10f3aef5277dd88ce47
Signed-off-by: Armin van der Togt <armin@otheruse.nl>
Reviewed-on: http://openocd.zylin.com/4037
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-04-07 20:33:39 +01:00
Matthias Welwarsky
db456e209f target: free target SMP list on shutdown
On SMP targets, the "target smp" command creates a list of targets
that belong to the SMP cluster. Free this list when a target gets
destroyed on shutdown. For simplicity, the complete list is free'd as
soon as the first target of the SMP cluster is destroyed instead of
individually removing targets from the list.

Change-Id: Ie217ae1efb2e819c288ff3b1155aeaf0a19b06be
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4481
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-04-07 20:33:01 +01:00
Tomas Vanek
414213a5ea target/arm_adi_v5: extend apcsw command to accept arbitrary bits
apcsw command was limited to SPROT bit only.

Now user can manipulate any bit except size and addrinc fields.
Can be used e.g. to set bus signal 'cacheable' on Cortex-M7

Change-Id: Ia1c22b208e46d1653136f6faa5a7aaab036de7aa
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4431
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-04-07 20:31:37 +01:00
Tim Newsome
2e2bb14b27 Add gdb_report_register_access_error command
With this option enabled (it's disabled by default) errors accessing
registers are returned to gdb. Otherwise they are ignored and success is
reported to gdb. (This is the current behavior.)

We want this for RISC-V, but there's still some cleanup that needs to be
done before that can be upstreamed.

Signed-off-by: Tim Newsome <tim@sifive.com>
Change-Id: I7e56109ea52d18b780c14a07fb35f9e6e8979da4
Reviewed-on: http://openocd.zylin.com/4452
Reviewed-by: Steven Stallion <sstallion@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Tested-by: jenkins
2018-04-07 20:31:14 +01:00
Matthias Welwarsky
0dba1815e6 arm_adi_v5: Add ability to ignore the CSYSPWRUPACK bit
The CTRL/STAT register in the ARM DAP DP has a debug power up
ack bit and a system power up ack bit. Some devices do not set
the system power up ack bit until sometime later. To avoid having
the initial target examination fail due to this or to have a
sticky bit error report claim power failure due to this a user
can now specify that this bit should be ignored.

Change-Id: I2451234bbe904984e29562ef6f616cc6d6f60732
Signed-off-by: Eric Katzfey <eric.katzfey@mentalbee.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3710
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-04-07 20:30:12 +01:00
Stefan Arnold
be87994d60 flash/nor/at91samd: Add "nvmuserrow" command.
Add option "nvmuserrow" to "at91samd" for changing and reading the register at 0x804000 which represents various fuses.

Change-Id: I6382cc4ac15e6b9681e2f30b0ae60397a6289c3b
Signed-off-by: Stefan Arnold <sarnold@sh-sw.de>
Reviewed-on: http://openocd.zylin.com/4260
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-04-06 10:37:31 +01:00
Tomas Vanek
b08900badc nrf51: Add HWID 0x008F again
HWID originally added in commit 7829f31a6d
was accidentally omited during refactoring in commit
52885d2b53

While on it move old ingeneering sample of 51822 to block of 51822 rev 1

Change-Id: Ie9f15563792a27a72e71df6edbcc6b04490370ed
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4437
Tested-by: jenkins
2018-04-04 21:27:33 +01:00
Tomas Vanek
7829bb701f drivers/kitprog: workaround KitProg firmware bug of missing ZLP
KitProg firmware does not send a zero length packet at the end of the bulk-in
transmission of a length divisible by a bulk packet size. This is inconsistent
with the USB specification and results in jtag_libusb_bulk_read()
waits forever when a transmission of specific size is received.

Limit bulk read size to expected number of bytes for problematic tranfer sizes.
Use 1 second timeout as the last resort.

Change-Id: Ice80306424afd76e9fbc6851911ffd5109c84501
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4426
Tested-by: jenkins
Reviewed-by: Bohdan Tymkiv <bhdt@cypress.com>
2018-04-04 21:26:59 +01:00
Cody P Schafer
a28dea0fe4 target/cortex_m: avoid dwt comparator overflow
Avoid ever overflowing the DWT_COMPARATOR array by allocating space for
16 comparators (the field is masked by 0xf).

On a stm32f767zi chip (on a nucleo-767zi board) I've been seeing crashes
with address sanitizer enabled due to its (apparent) 10 present
comparators. This appears to be due to
https://sourceforge.net/p/openocd/tickets/178/.

In non-address sanitizer builds, this would likely cause some random
memory to be written to in some cases. (see above bug for observations).

Change-Id: I2b7d599eb326236dbc93f74b350c442c9a502c4b
Signed-off-by: Cody P Schafer <openocd@codyps.com>
Reviewed-on: http://openocd.zylin.com/4458
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-04-04 21:24:53 +01:00
Michele Sardo
6e6f90d1af Fix for warnings detected by clang static analyzer
Fix for potential memory leakage and for unused/unreported return error code

Change-Id: Ifb2c95b60637c3a241ad4bf41d1a328c92ccea4b
Signed-off-by: Michele Sardo <msmttchr@gmail.com>
Reviewed-on: http://openocd.zylin.com/4476
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-04-04 21:23:57 +01:00
Tomas Vanek
7690a74b09 flash/nor: implement flash bank deallocation in drivers with simple alloc
All drivers which simply allocate one driver_priv memory block
per each bank now use default_flash_free_driver_priv()

Change-Id: I425bf4213c3632f02dbe11ab819c31eda9b2db62
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4417
Tested-by: jenkins
Reviewed-by: Liviu Dudau <liviu@dudau.co.uk>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-04-04 20:14:18 +01:00
Robert Jordens
3d3b45af46 xilinx-dna.cfg: generic tools for reading Xilinx Device DNA
Most Xilinx FPGA devices contain an embedded, unique device identifier.
The identifier is nonvolatile, permanently programmed into the FPGA, and is
unchangeable providing a great serial / tracking number.

This commit adds generic support for reading the Xilinx Spartan 6 and 7
Series (Kintex, Artix, Ultrascale) Device DNA. The code is similar to
the function in fpga/xilinx-xc6s.cfg for Spartan 6 but the register
addresses are different and the logic has been simplified.

The code was not placed in xilinx-xc7.cfg. The approach of defining taps
in the same file as library code to use them is fundamentally broken on
boards that have more than one FPGA or other chips. This commit (like
the addition of support for Xilinx XADC) starts to remedy that by
splitting library code from board-specific fixed definitions.

The support code is sourced in the Kasli and KC705 board support files
as it was tested on these boards.

Change-Id: Iba559c7c1b7e93e1270535fd9e6650007f3794da
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/4396
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-30 16:22:42 +01:00
Robert Jordens
27473588a4 tcl/fpga/xilinx-xadc.cfg: add support for XADC
The 7 Series FPGAs contain an on-chip 12 bit ADC that can probe die
temperature, internal power supply rail voltages as well as external
voltages. The XADC is available both from fabric as well as through the
JTAG TAP.

This code implements access throught the JTAG TAP.

https://www.xilinx.com/support/documentation/user_guides/ug480_7Series_XADC.pdf

Change-Id: I6cef4d0244add71749fa28b58a736302151cc4dd
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/4395
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-30 12:53:50 +01:00
Tomas Vanek
6eba3777fc jtag/core, target: unregister JTAG events
Also call adapter_exit() before command_exit() as the latter releases
Jim interpreter so JTAG events should be released before.

Fixes memory leak reported by valgrind

Change-Id: I493f3fcba34ea2b4234148e79a4e329c866e0f05
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4474
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-30 10:15:23 +01:00
Tomas Vanek
37deb37593 target: fix display halt message logic
If a target is run from gdb and then stopped from OpenOCD telnet interface,
halt does not show message with status and PC registers.

While on it rename 'display' to 'verbose_halt_msg' and use bool type
instead of int.

Change-Id: Ibe6589015b302e0be97258b06938c297745436a5
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4475
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-30 10:14:56 +01:00
Tomas Vanek
f035b0851b flash/nor: implement flash bank deallocation on OpenOCD exit
Change-Id: I8fcf09b2a85b3b68743f5fd68a31edea933b9b17
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4414
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-30 10:13:09 +01:00
Robert Jordens
38607b2e56 tcl/board: add support for Kasli
Kasli is an open hardware FPGA board. It is part of the Sinara family of
devices designed to control quantum physics experiments (see Sayma_AMC
for other boards already suppported by openocd).

Kasli was developed as part of the opticlock project. It features a
Xilinx Artix 7 100T FPGA, DDR3 RAM, a clock reconstruction and
distribution network, four 6 Gb/s transceiver links (three SFP and
one SATA) as well as interfaces to up to 12 Eurocard Extension Modules
(EEMs).

https://github.com/m-labs/sinara/wiki/Kasli
http://www.opticlock.de/en/

Change-Id: I88b5e9f16b79e1e731056c45da6b5e1448d2c0e7
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/4341
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-30 10:08:21 +01:00
Robert Jordens
33f70625d7 sayma_amc: add Sayma AMC board definition
Change-Id: I4a3dc5fe2d81b6906099af8cc1a360b3cf4a6b80
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/4237
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-30 10:08:10 +01:00
Robert Jordens
ca3228dda6 kcu105: add support for Xilinx KCU105
* Development board with Kintex Ultrascale XCKU040
* Dual SPI 256 MBit flash, supported through xilinx_bscan_spi

Change-Id: I478ec7481beedd270bfba8af56a93301b0ee3028
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/4189
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-30 10:07:58 +01:00
Robert Jordens
7944ebb694 xilinx-xcu: add Xilinx Ultrascale tap data
The Ultrascale series is a bit more complicated to handle since with the
stacked and interconnected dies the IR gets longer. This adds support
for all currently known chips from the Ultrascale family.

Change-Id: Ibac325dd6fadc76f73cc682b1c62c1a5f39f0786
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/4188
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-30 10:07:49 +01:00
Matthias Welwarsky
2231da8ec4 target: restructure dap support
- add 'dap create' command to create dap instances
- move all dap subcmmand into the dap instance commands
- keep 'dap info' for convenience
- change all armv7 and armv8 targets to take a dap
  instance instead of a jtag chain position
- restructure tap/dap/target relations, jtag tap no
  longer references the dap, daps are now independently
  created and initialized.
- clean up swd connect
- re-initialize DAP also on JTAG errors (e.g. after reset,
  power cycle)
- update documentation
- update target files

Change-Id: I322cf3969b5407c25d1d3962f9d9b9bc1df067d9
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4468
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-30 09:58:21 +01:00
Matthias Welwarsky
7274090456 tcl/board: add configuration for the avnet ultrazed-eg starter kit
also contains target configuration for the Xilinx UltraScale+
platform

Change-Id: I6300cbc85c1ed71df71d8aaca59500bbf18f0093
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4467
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-30 09:48:35 +01:00
Matthias Welwarsky
f444c57bf2 arm_cti: add cti command group
Extend the CTI abstraction to be accessible from TCL and
change the 'target' command to accept a cti 'object' instead of a
base address. This also allows accessing CTI instances that are not
related to a configured target.

Change-Id: Iac9ed0edca6f1be00fe93783a35c26077f6bc80a
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4031
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-30 09:48:03 +01:00
Matthias Welwarsky
1756f393e4 aarch64: add cpsr bitfields to target description
provide meta information for the cpsr so gdb can display the status
flags and not only a hexadecimal number

Change-Id: I9d3fb29153780adbea389d7e4175d5e19bddc256
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4460
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-27 09:15:43 +01:00
Matthias Welwarsky
0808c6e8a3 tdesc: bitfields may carry a type
a bitfield may carry a type (bool or int), add support for that.

Change-Id: Ic831a9b8eac8579e8fdd7d0f01b7f1c9259e6739
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4459
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-27 09:15:27 +01:00
Tomas Vanek
78a44055c5 transport: add transport_is_hla()
and move declaration of all transport_is_xxx() functions to transport.h

Change-Id: Ib229115b5017507b49655bc43b517ab6fb32f7a6
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4469
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-20 11:48:44 +00:00
Paul Fertser
828ee07657 server: bind to IPv4 localhost by default
Since OpenOCD basically allows to perform arbitrary actions on behalf of
the running user, it makes sense to restrict the exposure by default.

If you need network connectivity and your environment is safe enough,
use "bindto 0.0.0.0" to switch to the old behaviour.

Change-Id: I4a4044b90d0ecb30118cea96fc92a7bcff0924e0
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4331
Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2018-03-18 12:59:43 +00:00
Matthias Welwarsky
ffd6b78a2c aarch64: fix debug entry from EL0
If we enter debug state from EL0, some registers are not accessible.
Temporarily move to EL1H and back to gain access. Also, fix
armv8_dpm_modeswitch() to not immediately restore the previous state
on elevating the privilege level.

Change-Id: Ic2a92109230ff4eb6834c00ef544397a5b7ad56a
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4461
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-16 08:58:06 +00:00
Matthias Welwarsky
935f0c5cc2 gdb_server: fake step if thread is not current rtos thread
gdb assumes that a rtos can make any thread active at will in response
to a 'Hg' packet. It further assumes that it needs to step-over after
setting a breakpoint on frame #0 of any non-current thread. Both
assumptions are not valid for an actual rtos. We fake the step-over to
not trigger an internal error in gdb. See
https://sourceware.org/bugzilla/show_bug.cgi?id=22925 for details.

Change-Id: Ida60cd134033c1d58ada77b87fe664a58f61e2c0
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4448
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-16 08:57:20 +00:00
Matthias Welwarsky
cbf7889873 gdb_server: fix ignored interrupt request from gdb during stepping
Normally, when a ctrl-c is received from gdb, a SIGINT is reported back
unconditionally to tell gdb that the target has stopped in response.
However when a rtos support was configured, the rtos awareness overwrote
the signal with an actual thread state, which gdb then ignored and got
stuck without the user able to interrupt.

Change-Id: I40fd62333e020a8c4d9df0079270e84df9c77f88
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4445
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-16 08:56:38 +00:00
Tomas Vanek
a4cdce0129 gdb_server: prevent false positive valgrind report
Change-Id: Ia59fdf8a23043889840122859b0c5bdb5f757703
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4420
Tested-by: jenkins
2018-03-15 17:10:33 +00:00
Tomas Vanek
ff23980434 drivers/ftdi: free allocated memory
Also uses calloc() for mpsse_ctx->write_buffer to prevent a false
positive valgrind report
"Syscall param ioctl(USBDEVFS_SUBMITURB).buffer points to uninitialised bytes(s)"

Change-Id: I91963371d15c21ea0fee4c40c1da86174db44520
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4418
Tested-by: jenkins
2018-03-15 17:10:16 +00:00
Tomas Vanek
71f5f6eb14 src/jtag/hla: free allocated memory in hl_interface_quit()
Change-Id: If6ead00e47021c88e4c106b4aeaf038db87ff50b
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4413
Tested-by: jenkins
2018-03-15 17:09:56 +00:00
Tomas Vanek
7ad11de2fa target/target: free what leaked in target_destroy()
Free event_action, fileio_info and working area.

Change-Id: Iac81230423e92304b8e2c971d0ec71a96b693fc4
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4412
Tested-by: jenkins
2018-03-15 17:09:30 +00:00
Tomas Vanek
63d7688245 jtag/core: free all taps and daps in adapter_quit()
Change-Id: I74496f6ddfb0a72b2933e8d682a73a694b8d107b
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4411
Tested-by: jenkins
2018-03-15 17:09:09 +00:00
Tomas Vanek
33a3355304 server: free strduped port numbers
Although the leak is negligible, the clean heap on exit will ease
valgrind testing.

Change-Id: I3a7a9c8e8dc7557aa51d0b9caa244537e5e7007d
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4410
Tested-by: jenkins
2018-03-15 17:08:53 +00:00
Tomas Vanek
ae5b30ae96 openocd.c: call server_quit() for cmd line with -c shutdown
If OpenOCD command line contains -c shutdown, server_quit() is not called.
Though if -c init is also on command line, gdb_server is already initialized.

Call server_quit() on both successful and failure exit from command line.

Change-Id: I6df41c5df045b61d84a5515d1abaa5dc96bc30ac
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4409
Tested-by: jenkins
2018-03-15 17:08:34 +00:00
Tomas Vanek
a0b76360b8 tcl/target: warn if a Kinetis MCU is connected to a high level adapter
Make sure the user is aware he can lock the device though unlock is not
possible without access to MDM-AP.

Change-Id: I92676530e95d19489c6739748a99c2895849f90f
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4403
Tested-by: jenkins
2018-03-15 17:07:56 +00:00
Paul Fertser
437925c141 doc: fix xref texinfo warning
Change-Id: Iff1ba5836e3a4f352903c3a5ae73c7d992306d42
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4466
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2018-03-15 13:40:53 +00:00
Tomas Vanek
6f700d2b1c doc: make gdb-attach description understandable
Change-Id: I31babf4e3bbe7c94f26818d938699562a4a26d48
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4465
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-03-13 10:55:35 +00:00
Matej Kogovsek
ffb93ef371 jtag: drivers: add support for FT232R sync bitbang JTAG interfaces
Change-Id: Ib88a9e270f5c2a50902a137bcc97fdefd5aad1c6
Signed-off-by: Matej Kogovsek <matej@hamradio.si>
Reviewed-on: http://openocd.zylin.com/4215
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-03-13 08:47:46 +00:00
Paul Fertser
6e76e56e2e target: hla: check return value of hl_dcc_read
This should fix "Assigned value is garbage or undefined" warning
reported by clang:
http://build.openocd.org/job/openocd-clang/doclinks/1/report-391318.html

Change-Id: Ib9488fadca871814328501e415f88822291e0c96
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4332
Tested-by: jenkins
2018-03-13 08:42:17 +00:00
Paul Fertser
a957a1c843 target: arm: disassembler: fix Thumb2 BLX decoding address
Since BLX in Thumb2 always switches mode to ARM, the PC needs to be
4-bytes aligned.

Change-Id: I4f4c194fe21093cecfd9872e1d30588f4adc7257
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4382
Reviewed-by: Philipp Guehring <pg@futureware.at>
Tested-by: jenkins
Reviewed-by: Paul Sokolovsky <pfalcon@users.sourceforge.net>
2018-03-13 08:41:54 +00:00
Paul Fertser
7ac798016f tcl: interface: usb blaster I: specify driver explicitly
When a user asks for blaster I, he or she should either get it, or get
an error, not blaster II driver.

Change-Id: Ibc7683676ce42773e2b14ea5ccb3d119d1e6acea
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4381
Tested-by: jenkins
2018-03-13 08:41:43 +00:00
Paul Fertser
8b192df59a svf: improve robustness when processing invalid SVF files
Uninitialized argument value warnings reported by clang static
analizer.

Change-Id: I30af4900f517ffc0a7282689b58c7a224cdc080a
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4356
Tested-by: jenkins
2018-03-13 08:41:21 +00:00
Paul Fertser
3a32902987 HACKING: clarify linking identities procedure
Change-Id: I89e93002181926eec5fc5a339765b773559a8ff1
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4354
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-03-13 08:41:01 +00:00
Paul Fertser
b8c7232b66 jtag: drivers: buspirate: fix abuse of "char" type
Change occurrences of char to uint8_t where appropriate as a binary
protocol is used to talk to this adapter.

This fixes a build issue with modern clang.

Change-Id: I21cc82c8cad148bd0977533c12c74a9d6ba2faff
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4462
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-12 18:59:32 +00:00
Mateusz Manowiecki
6a4f5a4a67 Add SWD protocol support to buspirate (2nd try)
This is a second try for this patch. I removed the queues from the
previous version. I made it compatible with SRST reset and added
support for those features that could be supported in raw binary
mode.

Change-Id: I96fc06abbea9873e98b414f34afd9043fd9c2a41
Signed-off-by: Mateusz Manowiecki <segmentation@fault.pl>
Reviewed-on: http://openocd.zylin.com/3960
Tested-by: jenkins
Reviewed-by: Eric Work <work.eric@gmail.com>
Reviewed-by: Thomas Jarosch <thomas.jarosch@intra2net.com>
Reviewed-by: Jacob Alexander <haata@kiibohd.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-03-12 14:14:36 +00:00
Hellosun Wu
69325f6970 nds32: Add jtag scan_chain command
Create new command to refresh idcode list during runtime
and update Tap idcode.

Change-Id: Ie889a39a6f57cea207b2b9c9e42c51c97cfe4d8e
Signed-off-by: Hellosun Wu <wujiheng.tw@gmail.com>
Reviewed-on: http://openocd.zylin.com/4133
Tested-by: jenkins
Reviewed-by: Hsiangkai Wang <hsiangkai@gmail.com>
Reviewed-by: penny chen <penny6610231@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-03-12 14:12:59 +00:00
Tomas Vanek
396ea7c8dd doc: update openocd.texi after change of gdb-attach default value
While on it
- change some occurrences of gdb to GDB if it refers GDB software
  (as oposed to a gdb command)
- add some xrefs
- give more meaningful example of target event definition
- remove obsoleted example of GDB hook-step

Change-Id: Ia2e26021d57f675acfa1de704f6c3e81c22bb8bf
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4444
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-12 14:12:21 +00:00
Cody P Schafer
d4ef54c609 helper/types: cast to uint32_t,uint16_t to avoid UB by shifting int too far
Without this, we have some types promoted to `int` when they need to be
`unsigned int`.

Here's some ubsan output hitting this:

Unfortunately, what happens is that things get promoted to `int`, but
need to be `unsigned int`. Here's the ubsan output:

src/helper/types.h:126:65: runtime error: left shift of 255 by 24 places cannot be represented in type 'int'
    #0 0x55978a612060 in le_to_h_u32 src/helper/types.h:126
    #1 0x55978a61ff9e in stlink_usb_read_reg src/jtag/drivers/stlink_usb.c:1539
    #2 0x55978a8cfd45 in adapter_load_core_reg_u32 src/target/hla_target.c:67
    #3 0x55978a9f48e3 in armv7m_read_core_reg src/target/armv7m.c:236
    #4 0x55978a8d24fc in adapter_load_context src/target/hla_target.c:372
    #5 0x55978a8d261b in adapter_debug_entry src/target/hla_target.c:396
    #6 0x55978a8d3123 in adapter_poll src/target/hla_target.c:457
    #7 0x55978a528357 in target_poll src/target/target.c:535
    #8 0x55978a539fd4 in target_wait_state src/target/target.c:2914
    #9 0x55978a556e20 in jim_target_wait_state src/target/target.c:5256
    #10 0x55978a5cca62 in command_unknown src/helper/command.c:1030
    #11 0x55978aaed894 in JimInvokeCommand /home/cody/d/openocd-code/jimtcl/jim.c:10364

Change-Id: I24f6abfd26b6980100657397d69c84f2b80a005a
Signed-off-by: Cody P Schafer <openocd@codyps.com>
Reviewed-on: http://openocd.zylin.com/4455
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
2018-03-12 14:12:07 +00:00
Paul Fertser
6c6b42664a jtag: hla: tcl: fix inconsistent expected_id handling
Copy from 20fcd0729e.
Should fix
http://build.openocd.org/job/openocd-clang/doclinks/1/report-1e9b08.html

Change-Id: I1a83387b4d745134acc38eeba08aa869d9895573
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4333
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-03-12 14:10:18 +00:00
Matthias Welwarsky
bfc5c764df armv7a: cache ttbcr and ttb0/1 on debug state entry
Instead of re-reading ttbcr and ttb0/1 whenever a virt2phys translation
is done, cache the values once when entering debug state. Use the cached
values in armv7a_mmu_translate_va().

Change-Id: I1bc5349ad2f19b2dd75bdd48468a2c1f1e028699
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3112
Tested-by: jenkins
2018-03-11 12:08:39 +00:00
Omair Javaid
f18ca510b3 Support for Arm VFP v3 registers read/write
This patch adds support in openOCD to read/write Arm vector/floating 
point registers. This is compatible with Arm vfp v3 target xml in GDB. 
Please refer to binutils-gdb/gdb/features/arm/arm-vfpv3.xml

Change-Id: Id4dd1bddef51c558f1a86300c1a876d159463f18
Signed-off-by: Omair Javaid <omair.javaid@linaro.org>
Reviewed-on: http://openocd.zylin.com/4421
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Tested-by: jenkins
2018-03-10 14:25:10 +00:00
Omair Javaid
2830008be0 Support for AArch32 SIMD/Floating-point registers
This patch adds support for read/write of SIMD and floating-point register in AArch32 mode.
This patch is tested using Raspberry Pi3 halted in AArch32 mode with FP/SIMD enabled.
Software need to make sure floating-point and SIMD unit is enabled.

Change-Id: I2b3b8af02257c6420e5a70c6f4c91f839c1f5ee5
Signed-off-by: Omair Javaid <omair.javaid@linaro.org>
Reviewed-on: http://openocd.zylin.com/4446
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-10 13:24:13 +00:00
Omair Javaid
a48264414e Support AArch64 SIMD/FP registers read/write
This patch adds support in openOCD to read/write AArch64 SIMD/FP registers.
This patch depends on a previous patch which adds support to generation 
of target xml by openOCD with nested architecture defined types. AArch64 
SIMD/FP registers assumes various types and to support all types we 
implement them as architecture defined type aarch64v which in turn 
consists of various architecture defined types. This is compatible with 
AArch64-FPU target xml in GDB. Please refer to 
binutils-gdb/gdb/features/aarch64-fpu.xml

Change-Id: I7ffb0c21b3c2e08f13720b765408b30aab2a9808
Signed-off-by: Omair Javaid <omair.javaid@linaro.org>
Reviewed-on: http://openocd.zylin.com/4373
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-10 13:23:48 +00:00
Omair Javaid
b4a01f8cdc Allow generation of nested target defined types in gdb target xml
This patch adds support to generate multiple nested architecture defined
data types in gdb target xml generated by openOCD. Architecture defined 
structs, unions, vectors nested in one or more architecture defined 
types can be generated now.

Example:

  <vector id="v2d" type="ieee_double" count="2"/>
  <vector id="v2u" type="uint64" count="2"/>
  <vector id="v2i" type="int64" count="2"/>

  <union id="vnd">
    <field name="f" type="v2d"/>
    <field name="u" type="v2u"/>
    <field name="s" type="v2i"/>
  </union>

Change-Id: I0f3c5c6daf3d22cde7e4b7b4165d2e97e25872f7
Signed-off-by: Omair Javaid <omair.javaid@linaro.org>
Reviewed-on: http://openocd.zylin.com/4372
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-10 13:23:25 +00:00
Evan Hunter
db268a3115 Cortex-R : Remove commands which are not relevant to Cortex-R
Change-Id: I8dec85150386c149ffdb7bf4e7e533f16bb63b84
Signed-off-by: Evan Hunter <ehunter@broadcom.com>
Reviewed-on: http://openocd.zylin.com/2877
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-09 08:17:48 +00:00
Tomas Vanek
35da3e1d94 helper/configuration: free script_search_dirs and config_file_names
Although the leak is negligible, the clean heap on exit will ease
valgrind testing.

Change-Id: If43f02fe594c30ceb1bea3259ea3e098d4b2d239
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4408
Tested-by: jenkins
Reviewed-by: Marc Schink <openocd-dev@marcschink.de>
2018-03-07 23:47:31 +00:00
Marc Schink
6c0590cb4d helper/command.h: Add missing #include for target_addr_t
Change-Id: Ic406257c0da6e1889d4434cc98cf59c2b97aa30c
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4052
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-03-07 23:45:40 +00:00
Marc Schink
a4df0e02b2 server/server.h: Add missing #include
Change-Id: I9d0615f9218470d190223f7f6b5b406e5c7f2b11
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4051
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-03-07 23:45:15 +00:00
Marc Schink
7417feab29 helper/types.h: Add missing #includes
Change-Id: I02ae0fb9527c4b87308da9c2cab66c80d84579eb
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4050
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-03-07 23:45:01 +00:00
Marc Schink
83f313542f helper/command.h: Add missing #includes
Change-Id: I84650a51cdb015f5e8ae933a3288f6e87f9fb80b
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4049
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-03-07 23:44:44 +00:00
Marc Schink
703ce2e941 helper/replacements.h: Add missing #include
Change-Id: Ic6c47f7fbc999d00ef3211c1fa44867e3aabc321
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4057
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-03-07 23:43:58 +00:00
Marc Schink
c1c450e0f7 server/server: Remove all connections on shutdown
This patch fixes a memory leak in the internal server. Steps for
reproduction:

 * valgrind --leak-check=full --show-reachable=yes ./build/src/openocd
 * Establish more than one connection to OpenOCD (e.g. telnet)
 * Shutdown OpenOCD
 * Check for memory leaks in add_connection()

Change-Id: I0ae6fcf2918fd9bdec350446d3e26742d08ff698
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4053
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-03-07 23:42:49 +00:00
Robert Jordens
fd6986168a pipistrello: decrease jtag speed to 10 MHz
30 MHz is not working reliably here

Change-Id: I38f5f8c7153fc64e313ee911b1629fb5f1114c39
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/4242
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-03-07 23:42:01 +00:00
Luca Dariz
06e13d6ff5 Fix ChibiOS FPU detection.
This is needed for Cortex-M7 devices, which have newer FPU.
This issue caused the registry integrity check to fail if FPU was enabled.
Currently the code must use FPUv4_SP anyway, since other configurations are not
supported by ChibiOS.

Change-Id: Ie8a2cb8282ccff6c2a3eb0ffeaddaf149d55d685
Signed-off-by: Luca Dariz <luca.dariz@gmail.com>
Reviewed-on: http://openocd.zylin.com/4398
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-03-07 23:41:30 +00:00
Michele Sardo
cb2f21bf36 Added support for STMicroelectronics BlueNRG-1 and BlueNRG-2 SoC
Added configuration files and flash loaders.

Change-Id: I768eb3626f4e0eadb206bef90a867cc146fe8c75
Signed-off-by: Michele Sardo <msmttchr@gmail.com>
Reviewed-on: http://openocd.zylin.com/4226
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-03-07 23:40:55 +00:00
Tomas Vanek
8f1f912a7d flash/nor/psoc4: fix protection on devices with 256k flash
Protection read and setting of the second flash macro did not work.
Tested on CY8CKIT-046

Change-Id: I67789399ad1e89bbfc23a95547ecca7753130701
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4425
Tested-by: jenkins
2018-03-03 09:41:52 +00:00
Tomas Vanek
6668628431 flash/nor/psoc4: fix warnings
Reported by Clang static analyzer.

Change-Id: I1118f303f468b6a78ec6cba692762aee565bdf9e
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4407
Tested-by: jenkins
2018-03-03 09:41:38 +00:00
Tomas Vanek
a088e39423 flash/nor/core: fix warning in flash_iterate_address_range_inner
Refactor the code to improve readability.

Reported by Clang static analyzer.

Change-Id: I671447050e93c6f067917c4456b36ac11abb4663
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4355
Tested-by: jenkins
2018-03-03 09:41:25 +00:00
Tomas Vanek
e8b2e62d45 flash/nor/psoc4: adjust flash size limited by wounding
All credit goes to Dmitry Grinberg
http://dmitry.gr/index.php?r=05.Projects&proj=24.%20PSoC4%20confidential

Change-Id: Iae8fd6f11a7f62e8ffe970473688f6fac5a0a261
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4324
Tested-by: jenkins
2018-03-03 09:40:34 +00:00
Tomas Vanek
bb9d9c6026 target: use correct target in target-prefixed commands and event handlers
This change contains an alternative to Matthias Welwarsky's #4130
(target-prefixed commands) and to #4293 (event handlers).

get_current_target() must retrieve the target associated to the current
command. If no target associated, the current target of the command
context is used as a fallback.

Many Tcl event handlers work with the current target as if it were
the target issuing the event.

current_target in command_context is a number and has to be converted
to a pointer in every get_current_target() call.

The solution:
- Replace current_target in command_context by a target pointer
- Add another target pointer current_target_override
- get_current_target() returns current_target_override if set, otherwise
	current_target
- Save, set and restore current_target_override to the current prefix
	in run_command()
- Save, set and restore current_target_override to the event invoking
	target in target_handle_event()

While on it use calloc when allocating a new command_context.

Change-Id: I9a82102e94dcac063743834a1d28da861b2e74ea
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Suggested-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4295
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-03 08:40:09 +00:00
Matthias Welwarsky
eaeb4191e5 rtos: fix rtos no-auto configuration
A previous fix avoiding multiple calls to the
rtos_create function had a side effect if rtos
support was configured explicitly. It affected
all rtos' that rely on symbol resolution from
gdb.

Change-Id: Id7f17c6ec5ce2450322d2748a4b2369aaa524a7b
Fixes: 3aa8bd2d17
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4438
Tested-by: jenkins
Reviewed-by: Richard Braun <rbraun@sceen.net>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-03 08:29:32 +00:00
Tomas Vanek
bae76053dc gdb_server: run control fixes for vCont
this patch contains several changes to run control and state
handling together with gdb:
- graceful handling of target/gdb desync on resume, step and halt
- a default gdb-attach event executing the "halt" command, to meet gdb
  expectation of target state when it attaches
- call target_poll() after Ctrl-C command from gdb
- call target_poll() after resume and step through a vCont packet
- fix log message forwarding on vCont stepping, also move an aarch64
  log message from INFO to DEBUG level to prevent messing up the gdb
  console during source-line stepping
- fix oversight in vCont support that messes up breakpoint handling
  during stepping

Change-Id: Ic79db7c2b798a35283ff752e9b12475486a1f31a
Fixes: d301d8b42f
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4432
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-02-27 11:19:10 +00:00
Christopher Head
1a3cbbf3a5 Fix incorrect comment
target_start_algorithm does not download the algorithm. It only starts
it. It expects someone else to have already written the algorithm code
into the proper location before calling it.

Change-Id: I5e04406eed0ebb1c23e550dbf8d9f1204c432603
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4435
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-02-27 06:03:30 +00:00
Girts Folkmanis
e84592d17d Expand target_run_flash_async_algorithm() doc comment.
Change-Id: I5d1e8401cbcf0e116a233a2839a06d2c9dbc85ce
Signed-off-by: Girts Folkmanis <opensource@girts.me>
Reviewed-on: http://openocd.zylin.com/4127
Tested-by: jenkins
Reviewed-by: Christopher Head <headch@gmail.com>
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-02-24 18:01:26 +00:00
Jonas Norling
30f334e3ae efm32: Add JTAG definitions to EFM32 target file
This makes it possible to program newer EFM32 and EFR32 chips with
JTAG, as opposed to SWD.

Change-Id: Ia3e8c1bbc66fc1f33e8cf2087ccf0d1b4dfd74e1
Signed-off-by: Jonas Norling <jonas.norling@cyanconnode.com>
Reviewed-on: http://openocd.zylin.com/4262
Tested-by: jenkins
Reviewed-by: Fredrik Hederstierna <fredrik@hederstierna.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-02-24 17:57:13 +00:00
Ake Rehnman
9d7db2dc86 stm8: fix compilation warning
Change-Id: Iedad040384316356442ec87769855fa2960893c5
Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com>
Reviewed-on: http://openocd.zylin.com/4377
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2018-02-24 17:49:33 +00:00
Tomas Vanek
cb75947a09 flash/nor/core: fix Segmentation fault during flash write of bad formed img
flash_write_unlock() sorts sections by base address but does not check
if they overlap. In case of overlapped sections an item of padding[]
array can get negative and padding loop writes out of allocated buffer.

How to replicate: cat two copies of an ihex file to one file and try
to flash it.

Check for overlapped sections and abort write in such case.

Change-Id: I43eee7dc290a8d18faa59567b2118b88ad4bedca
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4397
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
2018-02-22 20:53:41 +00:00
Peter Mamonov
efe6991e80 target: fix target.working_area type
Change-Id: I15cfbe6984656fb0b48d2af5a7e1afa10d47b6ab
Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
Reviewed-on: http://openocd.zylin.com/3977
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-02-21 13:23:36 +00:00
Matthias Welwarsky
6168a80694 gdb_server: update rtos threads on new connection
make sure the RTOS thread database is updated early on a new
gdb connection.

Change-Id: I4da9ef30f8634263d697116cefc47976cd1970ad
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4000
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Tested-by: jenkins
2018-02-21 13:22:08 +00:00
Matthias Welwarsky
3aa8bd2d17 rtos: run rtos create hook only once on autodetect
Whenever a "qSymbol" from gdb is received, the rtos "create"
function was called. Make sure this happens only once and only
if rtos autodetection is used.

Change-Id: Ie5f8632cfce2d64a38dbdb63468302c4e8a784f4
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3998
Tested-by: jenkins
Reviewed-by: Sergey A. Borshch <sb-sf@users.sourceforge.net>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-02-21 12:13:57 +00:00
Matthias Welwarsky
293fb9b25f rtos: facilitate RTOS SMP handling
The RTOS handlers present OS threads to gdb but the openocd
target layer only knows about CPU cores (hardware threads).
This patch allows closing this gap inside the RTOS handler.

The default implementation just returns the current core, but
a RTOS handler can provide its own function that associates a
an OS thread with a core.

Change-Id: I12cafe50b38a38b28057bc5d3a708aa20bf60515
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3997
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Tested-by: jenkins
2018-02-21 12:10:02 +00:00
Matthias Welwarsky
d301d8b42f gdb_server: add support for vCont
Make gdb use target support for single-stepping if available.

Change-Id: Ie72345a1e749aefba7cd175ccbf5cf51d4f1a632
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3833
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-02-21 11:51:16 +00:00
Matthias Welwarsky
b551c62a7f cortex_a: fix handling of Thumb-2 32bit breakpoints
When debugging Thumb-2 code, Gdb will at times send a
breakpoint packet 'Z0,<addr>,3', the number 3 denoting that
the instruction to break on is 32 bits long. Handle this by
replacing it with two consecutive 16bit Thumb BKPTs and make
sure to save and restore the full, original 32bit
instruction.

Note that this fix is only applicable if you debug a bare-metal program
(like the linux kernel) with the 'wrong' gdb, e.g. use an 
"arm-linux" gdb instead of an "arm-eabi" gdb. But since most people
may not know about the subtle differences between gdb configurations
regarding thumb2 breakpoints it's still valid.

Change-Id: Ib93025faf35b11f0dba747a8c1fc36fd09a4c0f8
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4241
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Tested-by: jenkins
2018-02-21 08:20:28 +00:00
Matthias Welwarsky
dd60dd84f2 icepick-d: extend access to core control register
The ICEPick-D jtag router has core control registers
that provide the same (or similar) functionality as 
the tap control register, for individual cores 
accessible through the same tap (e.g. through a DAP). 

Core control registers are located at address "0x60 + 
core-id" of the ROUTER address space (IR=ROUTER).

It is sometimes helpful or even necessary to modify the
core control register. This patch renames the
"icepick_d_coreid" function to the more appropriate
"icepick_d_core_control" and adds a "value" argument
that allows writing of arbitrary value. 
"icepick_d_tapenable" is extended by an optional value
argument so that core control can be written as the tap
is enabled.



Change-Id: I0e7f91b596cb5075364c6c233348508f58e0a901
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4141
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-02-21 08:19:45 +00:00
Oleksij Rempel
e195b0bc81 armv7a: forward error value in armv7a_cache_auto_flush_all_data
if armv7a_l1_d_cache_clean_inval_all will fail, error value is never
forwarded. So make sure we do it from now.

Change-Id: I02acfaa938ec09f58df77191d13d8f4bb3308720
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/4384
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-02-21 08:19:19 +00:00
Jonas Norling
6d390e1b2a efm32: Refactor EFM32 chip family data, add more chips
Add support for more EFM32/EFR32 Series 1 families. The family IDs
come from the DEVICE_FAMILY list in the EFM32GG11 reference manual,
which is the most up to date source I could find. Register locations
have been checked against SiLab's header files.

No datasheets or headers were available for EFR32MG2, EFR32xG14 and
EFM32TG11B, so they are just assumed to follow the pattern. EFM32GG11B
has the MSC registers on a different address compared to other chips.

This commit attempts not to change current behavior when detecting
chips. One detail that has changed is that PAGE_SIZE is read before
applying the workaround for old Giant and Leopard Gecko revisions, but
this is believed to be OK because the register exists but just has an
invalid value in it.

The manuals disagree on which of 120 and 121 is WG, so this commit
leaves it as is.

Change-Id: Ia152b0b9e323defc5158cb02d9a6b04a27008f2a
Signed-off-by: Jonas Norling <jonas.norling@cyanconnode.com>
Reviewed-on: http://openocd.zylin.com/4263
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Fredrik Hederstierna <fredrik@hederstierna.com>
2018-02-14 08:27:57 +00:00
Bohdan Tymkiv
e9f54db003 Add support for Cypress PSoC6 family of devices
* Tested on CY8CKIT-001 kit with PSoC6 daughter board.
* Tested with several J-Link adapters (Ultra+, Basic)

Change-Id: I0a818c231e5f0b270c7774037b38d23221d59417
Signed-off-by: Bohdan Tymkiv <bhdt@cypress.com>
Reviewed-on: http://openocd.zylin.com/4233
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-02-14 08:27:30 +00:00
Andreas Bolsch
445dc23eb5 Handle improperly build image files gracefully
Images build improperly (by simply concatenating separate images) were accepted,
but anything after the first end-of-file record *silently* ignored. Now emit warning
for intel and motorola images upon non-whitespace after first end-of-file record but
continue reading anyway.
ST ships some images broken that way in their CubeMX packages ...

Change-Id: I0c5d08fa90070fed11fb805c5f0dc39817048176
Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-on: http://openocd.zylin.com/4281
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-02-14 08:27:01 +00:00
Tomas Vanek
38030e0115 psoc4: update for 4x00BLE, L, M, S and PRoC BLE devices
Flash ROM API command PSOC4_CMD_SET_IMO48 is now optional on new devices.
Also code tidy up:
- improved system ROM call error detection
- probe does not require the target to be halted
- default_padded_value and erased_value set to 0
- fixed endianess problem in flash write and protection setting
- removed fancy chip detection table as it would be updated too often
- psoc4 flash_autoerase is now on by default to ease programming

psoc4.cfg distinguishes chip family and uses either proprietary acquire
function of a KitProg adapter or TEST_MODE workaround to "reset halt"

Change-Id: I2c75ec46ed0a95e09274fad70b62d6eed7b9ecdf
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3807
Tested-by: jenkins
Reviewed-by: David Girault <david.f.girault@gmail.com>
2018-02-14 08:26:40 +00:00
Tomas Vanek
5830bf09a7 flash/nor/at91samd: add SAM R30 family
Microchip SAM R30 consist of a MCU SAM L21 and a radio.
Similarly SAM R21 = SAM D21 + radio. Therefore SAM R devices
was incorporated into SAM D21 and L21 device groups.

Change-Id: I3448d784cae888070b57c2f504583760ddffc97f
Suggested-by: Martin Deicke <martin.deicke@an-solutions.de>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4282
Tested-by: jenkins
2018-02-14 08:26:14 +00:00
Matthias Welwarsky
78a4b6607e cortex_a: faster debug init
Don't use atomic dap operations when not necessary

Change-Id: Idc6dcd2bda95f7994852df4ae2a588976f4c9010
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4142
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-02-07 18:10:52 +00:00
Tomas Vanek
0056037d68 flash/nor/kinetis_ke: fix warning retval set but not used
I see no reason for not returning error from target_run_algorithm()
to higher level.

Reported by Clang static analyzer.

Change-Id: Iaaa8b66e487ecae88c0cf4ae2addba63341c032c
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4391
Tested-by: jenkins
Reviewed-by: Ivan Meleca <ivan@artekit.eu>
2018-02-04 21:44:27 +00:00
Paul Fertser
f2b228f5d1 jtag: drivers: stlink: ignore write verify error
This looks like some inappropriate stlink (mis-)feature and it messes
operations for writing to certain memory-mapped registers.

Discussed at https://forum.sparkfun.com/viewtopic.php?f=18&t=44949 .
Also known to be problematic for working with Kinetis parts.

Reported by robertfoss_ on IRC.

Change-Id: I8633aed13346c596000ba6c377758e1bb96db73f
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4368
Tested-by: jenkins
Reviewed-by: Robert Foss <robert.foss@memcpy.io>
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2018-02-03 15:33:56 +00:00
Tomas Vanek
c2b2a7a3b8 Kinetis_ke: add KEAx family to texi and cfg comment
Change-Id: Id8f676b027f57fc540473c1a3a01bdd2ec49a200
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4232
Tested-by: jenkins
Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se>
2018-02-01 19:38:49 +00:00
Paul Fertser
5a98ff786e tcl: interface: harmonise RPi configs
Make all configs specify same JTAG and SWD GPIO numbers.

Change-Id: I65b09c1671c97f253f0aab88e511de7409d91e0a
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3932
Tested-by: jenkins
2018-01-30 07:39:24 +00:00
Paul Fertser
3c9bd7c6f3 flash: nor: jtagspi: fix jtagspi_read_status() warning
Clang static analyzer says that in certain cases "Assigned value is
garbage or undefined" there.

Change-Id: Ib35a4cf7a553ba9461270a0dc4c4b9b205091e73
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4338
Tested-by: jenkins
2018-01-30 07:36:51 +00:00
Paul Fertser
ab597027ea doxygen: fix issues with recent Doxygen versions
This fixes parsing of several documentation files which do not have
dot in the filename.

style.txt change fixes doxygen warnings and ensures proper display of
comment begin/end instructions in HTML.

Tested with Doxygen 1.8.13.

Change-Id: I9fd9ac3b51b47076b8fdbd3e93b90c3eba9b9631
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4342
Tested-by: jenkins
2018-01-30 07:35:50 +00:00
Paul Fertser
fa86553e76 x86_32_common: fix some warnings
Mostly "Dead assignment" reported by Clang static analyzer.

Change-Id: Ibf81d2ba2462570ee3a40e57a60c55a1d1fa0c00
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4351
Tested-by: jenkins
2018-01-30 07:34:32 +00:00
Tomas Vanek
dd890d4cad arm_adi_v5: fix return value of mem_ap_read/write for size 0
Unhandled marginal case produced a warning in Clang static analyzer.

Change-Id: I3e2fc4182fa4f863acfb972b1e7a512fce5bf33a
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Suggested-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/4357
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-01-29 14:47:40 +00:00
Matthias Welwarsky
1ac0f5d493 aarch64: clean up scan-build errors
scan-build reported a couple of problems with code in aarch64.c,
this patch cleans them up. No functional changes.

Change-Id: Ie210237ddc840a8bbcd535f86a3a5faf473132f2
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4346
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-29 08:24:17 +00:00
Paul Fertser
e60573c528 jtag: drivers: usb_blaster: clarify lowlevel driver selection code
This patch should make the code logic more transparent and user
notifications more useful.

It also fixes a warning "array subscript is below array bounds" that
leads to FTBFS on Raspbian GNU/Linux 8 (jessie).

Change-Id: I626b6a5bc013dfee7d36cf196f0abab981d30675
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3931
Tested-by: jenkins
2018-01-27 17:16:02 +00:00
Daniel Kucera
a0c4c9e717 nor/nrf5: added nrf51822 QFAAH2
Change-Id: I59725e098371c63ec3e6aa1d91bfed36b824a182
Signed-off-by: Daniel Kucera <daniel.kucera@gmail.com>
Reviewed-on: http://openocd.zylin.com/4334
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-01-26 22:38:27 +00:00
Matthias Welwarsky
a640f139ba aarch64: implement mmu on/off for aarch32
add decoding of aarch32 core modes (register layout is compatible)

Change-Id: I34c3146a7b1f836d3006be2b76b036da055b3d3e
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4374
Tested-by: jenkins
Reviewed-by: Forest Crossman <cyrozap@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-01-26 10:53:09 +00:00
Tim Newsome
64f1f7b1c1 Add read buffer to bitbang, improving performance.
Previously for every bit scanned OpenOCD would write the bit, wait for
that bit to be scanned, and then read the result. This involves at least
2 context switches. Most of the time the next bit scanned does not
depend on the last bit we read, so with a buffer we now write a bunch of
bits to be scanned all at once, and then we wait for them all to be
scanned and have a result.

This reduces the time for one testcase where OpenOCD connects to a
simulator from 12.30s to 5.35s!

Running all our tests went from 13m13s to 3m55s.

Change-Id: Ie9fcea043ac1d7877a521125334ed47d4b3e1615
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4312
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2018-01-25 16:44:06 +00:00
Christopher Head
2428722a23 Use timeval helpers
Some of these changes actually fix broken comparisons which could
occasionally fail. Others just clean up the code and make it more clear.

Change-Id: I6c398bdc45fa0d2716f48a74822457d1351f81a5
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4380
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-01-25 16:43:49 +00:00
Christopher Head
e0fc7a54f2 Add timeval_compare helper function
Change-Id: Id75727a150912ff778a4fa32ad56467da33a6324
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4379
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-01-25 16:43:45 +00:00
Paul Fertser
e22c6484ea tcl: target: klx: use 1KiB for working area
Some parts have only that much. Reported by robertfoos_ on IRC.

Change-Id: I684fdccfa62cf726466ddc467543a990fd88c4dc
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4369
Reviewed-by: Robert Foss <robert.foss@memcpy.io>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-01-25 16:41:32 +00:00
Tomas Vanek
b7be0a873c flash Kinetis: add K27 and K28 devices
Tested on FRDM-K28F. Thanks to Thomas Varghese for donating the kit.

Change-Id: Idcdd8bcf992acebd19e5335f7f833356500c45dd
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4255
Tested-by: jenkins
Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2018-01-25 16:40:58 +00:00
Tomas Vanek
e3f3b77729 flash Kinetis: make FCF protection more user friendly
The Flash Configuration Field on Kinetis devices requires protection
because it is located in program flash space (at 0x400) and writing
an improper data to it may permanently lock the device. Even an erased
flash sector containing FCF engages security lock (not permanent one)
on the next reset or power cycle.

'kinetis fcf_source protection' mode was introduced in the change #3562.
Flash driver in this mode sets FCF immediately after sector erase to
prevent unintentional security lock. To do so the driver needs to know
FCF values before flash image data is actually processed. Flash
protection bits are available in bank structure, FOPT can be set by
'kinetis fopt' command and securing device by FSEC is not supported.

Nevertheless an inexperienced user flashed the device using an image
with FCF values different from those set in OpenOCD config and
concluded programming did not work as some verify errors showed.

This change tries to write maximum possible from image data
retaining FCF protection.

Check FCF in programmed data and report if some field differs from
values set by OpenOCD flash block protection and 'kinetis fopt' command.
Warn user about verify errors caused by FCF protection.

On devices with ECC flash (K26, K66 and KV5x) it is impossible to change
already programmed FCF - it would result in an ECC error. As FCF was
written just after erase in 'kinetis fcf_source protection' mode
the warning issued during flash write is the only possible action.

On non-ECC flash devices use cumulative flash programming to
set FCF values requested in programmed image data.
Use FSEC from programmed data only if it does not request a secure
mode. Device can be secured only in 'kinetis fcf_source write' mode.
Use FOPT from programmed data if its value was not configured
in OpenOCD config by 'kinetis fopt' command.

Change-Id: If65fbbd7700069f57e4ae32234dce371bff93674
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4228
Tested-by: jenkins
Reviewed-by: Robert Foss <robert.foss@memcpy.io>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-25 16:40:31 +00:00
Paul Fertser
e3a5f1613b flash: nor: stm32l4x: fix warning in probe
Reading options word can fail, so this needs to be handled.

Reported by Clang static analyzer.

Change-Id: I9754cab9c4446fa2b20d4b44b0e20724d1bc1beb
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4352
Tested-by: jenkins
Reviewed-by: Tim "mithro" Ansell <mithro@mithis.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-01-25 07:22:57 +00:00
Paul Fertser
f02327d859 server: add safeguards against printing bogus port number
Clang static checker emits "Assigned value is garbage or undefined"
warning there as it can't prove that when the socket descriptor is
AF_INET/SOCK_STREAM and getsockname doesn't return an error, sin_port
is guaranteed to be filled in.

Pacify it by obvious means.

Change-Id: I43b5e5ceb41c07d523a81b34a25490c4c5f49a70
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4350
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-01-25 07:22:16 +00:00
Tomas Vanek
ff623b83fc target, arm_adi_v5: catch two allocation errors
Command
	mdw 0 0x40000000
triggers Segmentation fault on an arm.
Size parameter is a nonsence that may happen e.g. if you
mistype mdw instead of mww.

Add checking for calloc() NULL return in mdb/h/w.

Use calloc() instead of malloc() as multiplication
count * sizeof(uint32_t) overflows for size >= 0x40000000.

Change-Id: I968c944d863d1173ef932a7077d526fccb9381ae
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4349
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-01-25 07:20:48 +00:00
Marc Schink
edb6796286 Fix Jim interpreter memory leak
Change-Id: I71d7d97e7dc315c42fc43b65cb5fcecd7bdfb581
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/2959
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-01-17 07:52:35 +00:00
Oleksij Rempel
2bd78e1239 target: add initial imx7.cfg
Change-Id: I899a215049ff0bc8840463c71018867ef71b5b90
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/4190
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Tested-by: jenkins
2018-01-16 09:15:36 +00:00
Matthias Welwarsky
685cdf86ea aarch64: speed up first examination
Don't use atomic dap operations when not necessary. Also remove
loop trying to set core power request, didn't find a platform
where it actually worked and it's slowing examination down.

Change-Id: I44e5c2f289f951b8f4579f08a841172404a52053
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4143
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-01-16 09:06:02 +00:00
Matthias Welwarsky
1482c26a4e aarch64: simplify mode and state handling
Aarch32 and Aarch64 modes don't conflict in CPSR, no need to deconflict
ARMv7-M profile modes either.


Change-Id: I4c437dfa657f9e8a1da3687bc9f21435384b7881
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4144
Tested-by: jenkins
Reviewed-by: Yao Qi <qiyaoltc@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-01-16 09:05:49 +00:00
Matthias Welwarsky
b3d29cb544 aarch64: add 'maskisr' command
Allow to configure ISR masking during single-step and add
handling for stepping over WFI with ISR masked.

Change-Id: I7918be7bcda6a1d9badac44fc36c59b52f662fef
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4023
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-01-16 09:05:41 +00:00
Jiri Kastner
f7836bbc75 arm_adi_v5: added some partnumbers found in tegra 186 and tegra 210
Change-Id: Icd4137f3e266364d9728672bd2359fbd9a6c8ce9
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Signed-off-by: Forest Crossman <cyrozap@gmail.com>
Reviewed-on: http://openocd.zylin.com/4160
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-01-14 13:31:50 +00:00
Robert Jordens
867bdb2e92 jtagspi: new protocol that includes transfer length
This commit contains a rewrite of the jtagspi protocol and covers both
changes in the jtagspi.c openocd driver and the bscan_spi
(xilinx_bscan_spi) proxy bitstreams. The changes are as follows:

1. Always perform IR scan to ensure proper clearing of BYPASSed DRs.
2. Insert alignment cycles for all BYPASSed TAPs:

  The previous logic was erroneous. The delay in clock cyles from a bit
  written to the jtag interface to a bit read by the jtag interface is:

  * The number of BYPASSed TAPs before this (jtagspi) tap
  * The length of the jtagspi data register (1)
  * The number of BYPASSed TAPs before this one.

  I.e. it is just the number of enabled TAPs. This also gets rid of the
  configuration parameter DR_LENGTH.

3. Use marker bit to start spi transfer

  If there are TAPs ahead of this one on the JTAG chain, and we are in
  DR-SHIFT, there will be old bits toggled through first before the first
  valid bit destined for the flash.
  This delays the begin of the JTAGSPI transaction until the first high bit.

4. New jtagspi protocol

  A JTAGSPI transfer now consists of:

  * an arbitrary number of 0 bits (from BYPASS registers in front of the
    JTAG2SPI DR)
  * a marker bit (1) indicating the start of the JTAG2SPI transaction
  * 32 bits (big endian) describing the length of the SPI transaction
  * a number of SPI clock cycles (corresponding to 3.) with CS_N asserted
  * an arbitrary number of cycles (to shift MISO/TDO data through
    subsequent BYPASS registers)

5. xilinx_bscan_spi: clean up, add ultrascale

This is tested on the following configurations:

* KC705: XC7K325T
* Sayma AMC: XCKU040
* Sayma AMC + RTM): XCKU040 + XC7A15T, a board with integrated FTDI JTAG
  adapter, SCANSTA JTAG router, a Xilinx Ultrascale XCKU040 and a Xilinx
  Artix 7 15T. https://github.com/m-labs/sinara/wiki/Sayma
* Custom board with Lattice FPGA + XC7A35T
* CUstom board with 3x XCKU115-2FLVA1517E

Change-Id: I7361e9fb284ebb916302941735eebef3612aa103
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/4236
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-13 19:36:42 +00:00
Marc Schink
22ad1c0f60 server/telnet: Use proper data types
Change-Id: Ie7588e311fa5155d5ee73148dee3d0d931bfc7f5
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3413
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-13 15:33:52 +00:00
Patrick Stewart
1003bc7be7 ftdi swd: disable SWD output pin during input
* Disables the data output pin while SWD is reading, so that a simple FTDI
   SWD interface can be made by connecting TCK to SWD_CLK and TDI+TDO directly
   to SWDIO. Enabled by setting SWDIO_OE to 0.

Change-Id: I7d3b71cf3f4eea163cb320aff69ed95d219190bd
Signed-off-by: Patrick Stewart <patstew@gmail.com>
Signed-off-by: Roger Lendenmann <roger.lendenmann@intel.com>
Reviewed-on: http://openocd.zylin.com/2274
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2018-01-13 11:37:13 +00:00
Paul Fertser
ab25205bbf checkpatch: fix more "unescaped left brace" warnings
Unescaped left brace in string literals is deprecated since perl
v5.21.1.

Not a Perl programmer here so please review!

Change-Id: I724d8fa616d603e032e07afb9b8933e0ec95045b
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3801
Tested-by: jenkins
2018-01-13 09:56:05 +00:00
Tim Newsome
2f6f607507 Accept 64-bit addresses in CRC requests.
Change-Id: I6a3e97ae8ffb4dc2ca1197a8102cb9ba34de0a1e
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4317
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2018-01-13 09:52:13 +00:00
Tim Newsome
79cbeafe9f Support listening on port 0.
When listening on port 0, the system will assign a random open port. We
use this to run multiple OpenOCD instances against multiple simulators
as part of regression testing. This mechanism means the various test
instances don't have to coordinate to ensure they don't reuse any ports.

The required changes are minimal:
1. Don't increment the port number when it's 0.
2. Print out which port was assigned by the system.

Change-Id: I404c801fc405e9d8eb8420562c02e78d4db6242f
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4316
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2018-01-13 09:51:42 +00:00
Jiri Kastner
e9493cc20a ejtag: added missing instructions.
added missing instructions from latest available ejtag specification
(MD00047 v6.1 at time of writting) for trace control, fast data channel
and pcsample.

Change-Id: I30293951611265ffc2bd896f9d3ca6b310e5cac6
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-on: http://openocd.zylin.com/3950
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-13 09:46:00 +00:00
Marc Schink
e0010c3e6f server/telnet: Handle Ctrl+A and Ctrl+E
Handle the Ctrl+A and Ctrl+E shortcuts which move the cursor to the
beginning and end of the command line, respectively.

Change-Id: I89fa5fd3c5edeb08a3f9320fda766f72ce9d7f64
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3415
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-13 09:41:26 +00:00
Karl Palsson
9cd74c113c profiling: write "correct" sample rate to gmon output
This duration vs sample count is _significantly_ closer to the truth
than simply declaring the value to be 100Hz.

Change-Id: Ie8d8bdf1959e1aa7cead0631cd2c86afe77d1efc
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-on: http://openocd.zylin.com/4221
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-13 09:32:43 +00:00
Karl Palsson
4e0371bf71 hla_target: allow non-intrusive profiling on cortex-m
Leverages the existing work that added profiling via DWT_PCSR.

hla_target doesn't have direct access to the mem_ap for doing a bulk
repeated read, but simply reading the DWT_PCSR register repeatedly is
still ~2 order of magnitude faster than halt/resume.

Change-Id: Ibe451aa95143694398370fdad6939cfb6191d56f
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-on: http://openocd.zylin.com/4220
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-13 09:31:36 +00:00
Simon Schubert
64b0d5aac0 cortex_m: add profiling function
Use DWT_PCSR if present (reads nonzero); otherwise do halt-and-sample pc.

Signed-off-by: Simon Schubert <2@0x2c.org>
Change-Id: Id2dc4665e5008cc497a2e6e6493522d038d5af42
Reviewed-on: http://openocd.zylin.com/4211
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-13 09:29:59 +00:00
Felipe Balbi
2b44b52478 target: lakemon: implement assert_reset and deassert_reset
We're using an I/O port reset by default. The only board currently
supported (Galileo) doesn't have SRST routed on the JTAG connector.

When using 'reset halt', we must rely on Reset Break because our
adapters don't have support for PREQ#/PRDY# signals.

Tested with Intel Galileo GEN2.

Change-Id: Ia406e31c156f8001717d5b6a08bd03f71de790d3
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Reviewed-on: http://openocd.zylin.com/4016
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-13 09:25:34 +00:00
Felipe Balbi
3accbec901 target: quark_x10xx: miscellaneous cleanups
Just some misc cleanups without any functional changes. It's just
easier to read.

Change-Id: I66bee31f297bcbdb8cc4446b774d7714fbaa7c83
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Reviewed-on: http://openocd.zylin.com/4015
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-13 09:25:12 +00:00
Felipe Balbi
ffa6b189a0 target: type: fix indentation
No functional changes, cleanup only

Change-Id: I53c422be16d0a4ff157745d31362f6483093e5eb
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Reviewed-on: http://openocd.zylin.com/4014
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-13 09:25:00 +00:00
Felipe Balbi
1ea313e333 target: lakemon: probemode entry isn't instantaneous
When testing with Intel Galileo GEN2 I have noticed a few iterations
where probemode entry took a little longer. At most I had to read
tapstatus twice. This patch uses a loop of up to 100 iterations to
wait for tapstatus to update with PM entry results.

Change-Id: I1c87d7dde715255b3fd2460d299b9493218533fc
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Reviewed-on: http://openocd.zylin.com/4013
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-13 09:24:50 +00:00
Felipe Balbi
ea80232c5e target: quark_x10xx: adding missing 'static' keyword
These symbols are only used within this C source file. They don't need
to be exposed to the outside.

Change-Id: Idb04550ecca7f12c3fdc8c6447eeeb871961add3
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Reviewed-on: http://openocd.zylin.com/4012
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-13 09:24:27 +00:00
Robert Jordens
43cf6f9b62 digilent_jtag_smt2_nc: add support
The Digilent SMT2 NC is nominally the connector-less version of the
SMT2. But neither the SMT2 configuration nor the HS3 configuration work
for on the Xilinx KCU105 board where the SMT2 NC is used.

Change-Id: Ieb27cbc6d8b0f9c64ef778e4e0c839acc85ec0ef
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/4187
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-13 09:17:29 +00:00
barthess
dc28a6e593 XCF (Xilinx platfrom flash) support.
Change-Id: I4ee6db5f0abdb9fd279cc0edd13f71952a9d295d
Signed-off-by: Uladzimir Pylinski <barthess@yandex.ru>
Reviewed-on: http://openocd.zylin.com/3914
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-13 09:13:14 +00:00
Paul Fertser
99b03d3bfb doc: add SVF optional arguments descriptions
Change-Id: I1a3e5b04b6bc4821c4d11c8fcb33b426d6d41bfb
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4314
Tested-by: jenkins
Reviewed-by: Jim Norris <u17263@att.net>
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
2018-01-13 08:45:35 +00:00
Paul Fertser
12a838c6d4 server: gdb: always print target information in multi-target setups
When multiple targets are declared, it's not always obvious which
target the connection was made for, this can lead to very confusing
errors.

Reported by zjason on IRC.

Change-Id: I52906320394e89cb6cfe82054a3f94b27c999689
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4135
Tested-by: jenkins
2018-01-13 08:44:57 +00:00
Paul Fertser
b95e0c13aa flash/startup: make program accept filenames with spaces and other characters
This should allow to process any path names excluding those that have
curly braces.

Change-Id: I87bf9ddede11e2b28d5826878eb1338143f73c03
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4083
Tested-by: jenkins
2018-01-13 08:43:26 +00:00
Paul Fertser
3cb7fd4a60 tools: release.sh: produce only SHA256 hashes
Both MD5 and SHA-1 shouldn't be relied upon since long.

Change-Id: I0dea92fbf0f68b900c0d3a314fb3956d08ba0d48
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3949
Tested-by: jenkins
2018-01-13 08:41:23 +00:00
Paul Fertser
85ac081c22 jtag: drivers: sysfsgpio, bcm2835gpio: remove requirement to have trst or srst
This doesn't seem to make any sense.

Change-Id: I272de0ea3c0e86cc9a798cbd864050aaa597c3f0
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3933
Tested-by: jenkins
2018-01-13 08:40:44 +00:00
Paul Fertser
fe577e0b63 target: arm: disassembler: decode v6T2 ARM MOV{W,T} instructions
Change-Id: I32cf2669b1b22d4142f30674cf918e36561a885e
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3899
Tested-by: jenkins
2018-01-13 08:36:37 +00:00
Paul Fertser
2420aa00a4 target: arm: disassembler: decode v6T2 ARM ISB instruction
Change-Id: Iaaa54aee6a74f0b250b83c53e7a3fb7c17718920
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3895
Tested-by: jenkins
2018-01-13 08:36:29 +00:00
Paul Fertser
c26bbf7a1b target: arm: disassembler: decode v6T2 ARM DSB instruction
Change-Id: Id91b1a87d34982c72f2a8ab46564c961d1fef9dc
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3894
Tested-by: jenkins
2018-01-13 08:36:17 +00:00
Paul Fertser
de974eaed3 target: arm: disassembler: add v5T Thumb BLX decoding
Reported by thesourcerer on IRC.

Change-Id: I36d4d95de176a19fdd0bf80d8b419be6ca637e98
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3893
Tested-by: jenkins
2018-01-13 08:36:03 +00:00
Paul Fertser
c652f44ca3 flash: startup.tcl: do not disable polling when not exiting
Change-Id: I31b8a8b4519d65d6587207a71eb08dcee8ddd6fd
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4243
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2018-01-13 08:17:21 +00:00
Aleksey Shargalin
b34e013965 remote_bitbang_sysfsgpio: fix reset handling
When both SRST and TRST asserted, 'u' is sent to remote bitbang.
Fix for correct handling of such a case

Change-Id: I2a93ff71f5bbae658e6c0c3649a9fbcca2c5a14b
Signed-off-by: Aleksey Shargalin <myokaski@gmail.com>
Reviewed-on: http://openocd.zylin.com/4283
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-01-13 06:35:55 +00:00
Pushpal Sidhu
133e01d2af board: consolidate st_nucleo_l4 boards
We can now use the generic stlink.cfg which allows for both ST-LINK/V2
and V2-1 debuggers.

Change-Id: I229c6fe5f6a6a4f2d3c787a49939846f102f9e24
Signed-off-by: Pushpal Sidhu <psidhu.devel@gmail.com>
Reviewed-on: http://openocd.zylin.com/4313
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-01-13 06:27:11 +00:00
Ake Rehnman
cf2b9cbf5c Added config files for stm8l152 stm8s003 and stm8s105
Change-Id: I26cc401aafac01e5aed8eac605488da5221ffdc2
Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com>
Reviewed-on: http://openocd.zylin.com/4268
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-12 20:22:46 +00:00
Ake Rehnman
a6dea119a3 stlink_usb: Changes to make connect_under_reset work
Leaving mode before closing added
Resolved a collision with JTAG API v1 error/status
checking overwriting SWIM status bytes

Change-Id: I35444ec0e6caace3e072c60085059602f4cdf0a4
Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com>
Reviewed-on: http://openocd.zylin.com/4265
Tested-by: jenkins
Reviewed-by: Philipp Klaus Krause
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-01-12 20:19:42 +00:00
Ake Rehnman
3de6b5f6e5 jtag/drivers/stlink_usb : implemented and repaired SWIM support
Fixed a bug in stlink_usb_read_mem/write_mem preventing large data transfers

The SWIM support in stlink_usb was basically non existent so I have
implemented the missing parts. The bCBWCBLength and dCBWDataTransferLength
for STLINK-V1 protocol was not correct so that was fixed. The reason for
adding SWIM support is to add STM8 support for OpenOCD.

I have tested the driver on:
STM8 discovery board with the built-in STLINK-V1
STM8 discovery board with STLINK-V2 dongle
STM32 vldiscovery board with the built-in STLINK-V1
STM32F1xxx processor with STLINK-V2 dongle

Change-Id: I4aa80a92fb0226174356adaf2f8ff949920a621f
Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com>
Reviewed-on: http://openocd.zylin.com/3952
Tested-by: jenkins
Reviewed-by: Philipp Klaus Krause
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-01-12 20:17:55 +00:00
Tomas Vanek
779e95cc32 arm_adi_v5: fix regression from 4553abf906
Functions mem_ap_read() and mem_ap_write() incremented address even
if addrinc=false. I overlooked this fact and moved mem_ap_setup_tar()
set wrong addresses in no-incr mode.

Fixed by preventing address increment in no-incr mode.

Change-Id: I512e12a6a64e30cf6bc5bf77e3d57d35cc33e058
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Suggested-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/4326
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2018-01-11 08:28:29 +00:00
Forest Crossman
6f5e9941df jtag/drivers/kitprog: Enable LOG_DEBUG_IO
Change-Id: Ic01b0acf01e18bcb2bf98c101c7b5888cdc10186
Signed-off-by: Forest Crossman <cyrozap@gmail.com>
Reviewed-on: http://openocd.zylin.com/4323
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-01-09 16:22:30 +00:00
Matthias Welwarsky
3cba4bd4cb aarch64: fix crash on single-stepping
Make sure to skip un-examined targets (e.g. targets with deferred
examination) on single-stepping

fixes bug #158

Change-Id: Ib40c6fee03079fd078bd52a84615e6f8a081d128
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4184
Tested-by: jenkins
Reviewed-by: Yao Qi <qiyaoltc@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-09 09:37:14 +00:00
Tomas Vanek
81a33244df arm_adi_v5: reduce some CSW writes
MEM-AP access through banked data registers MEM_AP_REG_BD0..3
does not increment TAR regardless of the current autoincrement mode.
mem_ap_read_u32() and mem_ap_write_u32() can keep the current
autoincrement mode instead of switching autoincrement off.

Change-Id: Ib7ec688d3e04f1da678363cd2819ce90e8910e58
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4163
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2018-01-05 10:06:39 +00:00
Tomas Vanek
4553abf906 arm_adi_v5: fix wrong addressing after change of CSW_ADDRINC
Problem: If the same memory location is accessed alternatively
by MEM-AP banked data registers without autoincrement and by standard
autoincremented read/write, TAR register is not updated correctly.

How to replicate: On a Cortex-M issue
    mdw 0xe000edf0
multiple times. When poll is on (poll reads the same memory location)
only the first read is correct.
0xe000edf0: 01000000
0xe000edf0: 00000000
0xe000edf0: 20002640
0xe000edf0: 01000000
0xe000edf0: 00000000
0xe000edf0: 00000000

No problems with poll off.
0xe000edf0: 01000000
0xe000edf0: 01000000
0xe000edf0: 01000000

mem_ap_setup_tar() writes to MEM_AP_REG_TAR if requested TAR value
changed or CSW_ADDRINC_... is currently active.
However if an autoincremented access has been issued and autoinc
switched off in CSW afterwards, TAR does not get updated.

The change introduces mem_ap_update_tar_cache() which is called
after queuing of any access to MEM_AP_REG_DRW. It simulates
TAR increment to keep tar_value in sync with MEM_AP.
Crossing tar autoincrement block boundary invalidates cached value.

mem_ap_write() and mem_ap_read() do not check tar autoincrement
block boundary, mem_ap_setup_tar() is called before each transfer instead.

dap_invalidate_cache() is introduced to ensure invalidation
of all cached values during dap_dp_init() and swd_connect()

Change-Id: I815c2283d2989cffd6ea9a4100ce2f29dc3fb7b4
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4162
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2018-01-05 10:06:30 +00:00
Bas Vermeulen
ada631cc5f target aarch64: rework memory read/write to use 8/16/32 bit operations
The existing code only used Memory Access mode to read memory,
which uses 32 bit operations only.
Rework the code to check the alignment/size of the read/write operation,
and use the Memory Access mode to read aligned 32 bit memory.
When using unaligned access, or 8 or 16 bit reads, use LDR{BHW} and STR{BHW}
instead.

The exception handling is still the same as it was before (meaning it breaks
when things go wrong), but I can now read an 8 bit register correctly.

Change-Id: I739a5ee825c0226ed4a89c32895cc2a047b8dc15
Signed-off-by: Bas Vermeulen <bas@daedalean.ai>
Reviewed-on: http://openocd.zylin.com/4301
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-04 09:09:46 +00:00
Tomas Vanek
bb976e3c38 jtag/drivers/cmsis-dap: fix connect under reset
Commit ef02b69b14 included
a call to cmsis_dap_cmd_DAP_Connect() before calling
cmsis_dap_cmd_DAP_SWJ_Sequence(). According to comment
it is necessary for at least Keil ULINK-ME.

Commit 72c3464be4 added
a cmsis_dap_cmd_DAP_Disconnect() before connect call to pair
connection/disconnection. It solves some problems on Atmel EDBG.

Unfortunately calling either of cmsis_dap_cmd_DAP_Connect()
or cmsis_dap_cmd_DAP_Disconnect() deasserts reset signal.
So these workarounds break ability to connect under reset.

Use cmsis_dap_cmd_DAP_Disconnect() and cmsis_dap_cmd_DAP_Connect()
pair only if both SRST and TRST are deasserted.

Change-Id: I0914dae0a1360b8c7fe48231ff3867caedfb2dbe
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reported-by: Leonardo Sabino dos Santos <leonardo.sabino@gmail.com>
Reviewed-on: http://openocd.zylin.com/4100
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-03 10:56:32 +00:00
Jiri Kastner
1c2e3d41de config for ESPRESSObin from Globalscale Tech. Inc.
Change-Id: I77f536a9d2e901ebcef0a7dd0f205e5332b1d382
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-on: http://openocd.zylin.com/4303
Tested-by: jenkins
Reviewed-by: Forest Crossman <cyrozap@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-12-20 19:47:11 +00:00
Jiri Kastner
84d68579eb configs for Marvell Armada 3700
Change-Id: I367f39c9bc9e58380d6d5b500d5368d5173d96bd
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Signed-off-by: Forest Crossman <cyrozap@gmail.com>
Reviewed-on: http://openocd.zylin.com/4302
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-12-20 19:46:20 +00:00
Tomas Vanek
19f8f58c0d target: remove unused event definitions
Events reset-halt-pre, reset-halt-post, reset-wait-pre and
reset-wait-post are not used anywhere.

Change-Id: I9a0f94875b102d9b08f6c2fd9d73a9f05f8e8e79
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4285
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-12-12 21:18:10 +00:00
Tomas Vanek
3f6ab8e6a6 flash/nor/stm32f2x: fix erase on STM32F413/423
Theese devices do not have a gap in sector numbering.
The driver translates sectors numbers 12 13... to 16 17... as used on dual
bank flash devices. Therefore erase of sector 12 and above fails with error
	'stm32x device protected'
on F413/423.

Drop sector number translation for devices without has_large_mem flag.

Change-Id: I65531c0dfe02e2fd0f3d68f0615e0926e9901391
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4299
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-12-12 21:16:24 +00:00
Tomas Vanek
90a6245eec flash/nor/stm32f2x: fix protection block size for F767 in dual bank mode
A protection block comprises two adjacent sectors in dual bank mode.
As there are 64 and 128kB sectors joined in blocks 2 and 8, block size
should be computed as a sum of sector sizes.

Change-Id: Ie915df8cf7ca232c4565d7e0c514c8933e71fdfe
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4271
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-12-12 21:16:21 +00:00
Spencer Oliver
0422763489 doc: improve stm32 flash driver documentation
also remove legacy footnote as it adds no value.

Change-Id: I3892acf244bd8fba6f844a5d82a66004e193a395
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/4309
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
2017-12-12 21:15:09 +00:00
Paul Fertser
31c58c139d jtag: drivers: stlink: handle all versions with single config
Extend HLA interface to allow multiple VID/PID pairs and use it to
autodetect the connected stlink version.

Change-Id: I35cd895b2260e23cf0e8fcb1fc11a78c2b99c69b
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3961
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-12-12 21:13:55 +00:00
elmot
eb26a884e0 config: stm32l01x and stm32l02x chips support
New low-end chips have only 2k of RAM, workarea size adjusted

Change-Id: Ibfccd73fef9e6dabffc87d901736c5626ce411fe
Signed-off-by: Ilia Motornyi <elijah.mot@gmail.com>
Reviewed-on: http://openocd.zylin.com/4308
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-12-08 14:59:22 +00:00
Spencer Oliver
9021210428 docs: add missing stm32 flash driver documentation
Change-Id: I433780646e6fdfd0c2527b4a68025946ccb79d8b
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/4307
Tested-by: jenkins
Reviewed-by: <alexandre.torgue@st.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2017-12-07 11:14:10 +00:00
Ake Rehnman
020cb12077 stm8 : new target
New STM8 target based mostly on mips4k. Target communication
through STLINK/SWIM. No flash driver yet but it is still possible
to program flash through load_image command. The usual target debug
methods are implemented.

Change-Id: I7216f231d3ac7c70cae20f1cd8463c2ed864a329
Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com>
Reviewed-on: http://openocd.zylin.com/3953
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-12-07 07:53:13 +00:00
Alexandre Torgue
6090a5b158 Add STM32H7 config files
Add 2 target files:
-stm32h7x.cfg
-stm32h7x_dual_bank.cfg

Add 2 config files for:
-STM32H743zi-nucleo bord
-STM32H743i and STM32H753i eval boards.

Change-Id: I2aae2c5acff4f3ff8e1bf232fda5a11a87f71703
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Reviewed-on: http://openocd.zylin.com/4182
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2017-12-06 21:29:41 +00:00
Alexandre Torgue
6a66cccbad flash: Add new stm32h7x driver support
Add basic support for:
     -STM32H7x (Embedded flash 2M)

Erase and write tested on stm32h743.

Change-Id: Ie8d8786227cdeee39fcf5663167a053ad8dcef4c
Signed-off-by: Rémi Prud'homme <remi.prudhomme@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Reviewed-on: http://openocd.zylin.com/4181
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2017-12-06 21:29:10 +00:00
Bas Vermeulen
06aebfacda Only call cmsis_dap_cmd_DAP_SWD_Configure when swd_mode is enabled
The CMSIS-DAP used by NXP's LS1012ARDB board only supports JTAG,
and not SWD. Calling cmsis_dap_cmd_DAP_SWD_Configure returns with an
error (and doesn't actually do anything in the debugger).

Wrap the call to cmsis_dap_cmd_DAP_SWD_Configure in a check for
swd_mode, to make sure initialisation doesn't fail needlessly.

Change-Id: Id7e568cb6e36886bd7c5b3699d198a77a51c28c9
Signed-off-by: Bas Vermeulen <bas@daedalean.ai>
Reviewed-on: http://openocd.zylin.com/4294
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2017-12-06 21:07:10 +00:00
Robert Jordens
5d6bf8704c spi: add n25q256 flash
* 256 MBit SPI flash
* https://www.micron.com/~/media/documents/products/data-sheet/nor-flash/serial-nor/mt25q/die-rev-a/mt25q_qljs_l_256_aba_0.pdf spells out the entire zoo of IDs
* used e.g. on Xilinx KCU105

Change-Id: I18b19292b4869627adb9071266271962fec68fb4
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/4186
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2017-12-06 21:06:00 +00:00
Marc Schink
5679dc657c server/gdb: Use 'bool' instead of 'int' for boolean values
Change-Id: I71c2f2553a29e9ef167ff3313cc06c7b31c64190
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4278
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-12-06 21:01:39 +00:00
Marc Schink
8bb7021ca8 server/gdb: Use get_target_from_connection()
Change-Id: I2c66bf6da734a3b71e358553943e9fc3c6578c39
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4277
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-12-06 21:01:33 +00:00
Marc Schink
2fcbe3b8f7 target: Constify parameter of is_armv7m()
Change-Id: Ieea1b0dec88818e9e8d5c8c5d54aa8959556d77b
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4275
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-12-06 21:01:19 +00:00
Marc Schink
dba9293a89 rtos: Use 'bool' as return type for detect_rtos()
Change-Id: I91ad0431d44ed94f48d20c4690f8642d66f52a9b
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4274
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-12-06 21:01:12 +00:00
Jonas Norling
7e64451097 adi_v5_swd: Add error message when SWD fails to connect
Error message instead of failing silently.

Change-Id: Ie54a5bf68459d3c0e96cc38080ffad8de0a4b5ce
Signed-off-by: Jonas Norling <jonas.norling@cyanconnode.com>
Reviewed-on: http://openocd.zylin.com/4269
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-12-06 20:55:14 +00:00
Jonas Norling
41092636d1 ftdi: Enable SWDIO output before sending data on it
The SWDIO buffer has to be enabled, by setting SWDIO_OE, for data on
SWDIO to reach the target. Explicitly do this before sending the
switch sequences for JTAG-to-SWD, etc.

This makes the code insensitive to the state of SWDIO_OE specified in
ftdi_layout_init. It used to work only on adapters with a non-inverted
SWDIO_OE inited to 1, or inverted SWDIO_OE inited to 0.

Change-Id: I4b9e520ac1c7ce2a437251a05fc036bc68de718e
Signed-off-by: Jonas Norling <jonas.norling@cyanconnode.com>
Reviewed-on: http://openocd.zylin.com/4270
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-10-27 11:48:36 +01:00
Jonathan McDowell
c0881ba2d5 tcl/interface/ftdi/openrd: Fix FTDI channel + device description
Similar to the Sheevaplug fix inf95f8b70fbd0f7e9c91a2d9006b1abb2dd07ebf2
the OpenRD device has its JTAG interface on the first channel of the
ft2232, which is 0 for the new driver but was 1 for the old one. Correct
the config file appropriately. Also the device description was missing
the trailing " B" and thus not picking up the device correctly. Finally
add an adapter_khz setting in the OpenRD board configuration file - set
to 2MHz to match the Sheeva variant.

Confirmed as working thanks to Phil Hands providing me access to his
hardware to test on.

See also Debian Bug#793214; https://bugs.debian.org/793214

Change-Id: Ifacf53124eaa330bbbdf36dfa79e3256bf2a5201
Signed-off-by: Jonathan McDowell <noodles@earth.li>
Reviewed-on: http://openocd.zylin.com/4254
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-27 11:48:05 +01:00
Christopher Head
bca67d107f Cortex-M: Delete an unnecessary local variable
The dhcsr_save variable was used to save the value of
cortex_m->dcb_dhcsr so it could be restored later. However, all writes
in between the save and the restore use mem_ap_write_atomic_u32, not
cortex_m_write_debug_halt_mask, which means cortex_m->dcb_dhcsr isn’t
changed anyway. Delete the unnecessary local.

Change-Id: I064a3134e21398e1ecfc9f1fa7efd7b020b52341
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4240
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-10-27 11:47:22 +01:00
Christopher Head
02df0abb54 Cortex-M: fix stale DHCSR cache values
In cortex_m_assert_reset, in two locations, DHCSR is written directly
using mem_ap_write_u32. This means that the cached version,
target_to_cm(target)->dcb_dhcsr, is not updated when these writes are
performed, so subsequent writes to DHCSR that use
cortex_m_write_debug_halt_mask will change those bits back to their old
values which, unless modified in that particular invocation, come from
the cache. This causes an actual, observable bug on an STM32F7 in which
running “reset run” immediately after “program” can in some cases result
in execution proceeding with C_MASKINTS set (it is cleared on line 1021
but is then set immediately afterward in cortex_m_clear_halt), causing
failure of the application. Replace these mem_ap_write_u32 calls with
cortex_m_write_debug_halt_mask calls to do the same jobs.

Change-Id: Id35ca7f6057c2df2ba9cd67c53a73b50816d0b71
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4239
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-10-27 11:47:16 +01:00
Freddie Chopin
079d78f7de Fix GCC7 warnings about string truncation
GCC7 with -Wall warns about possible string truncation with
snprint()-type functions with "directive output may be truncated writing
1 byte into a region of size between 0 and 9
[-Werror=format-truncation=]" + "note: ‘snprintf’ output between 5 and
14 bytes into a destination of size 12" (or similar). Fix this by
increasing sizes of buffers.

See https://gcc.gnu.org/gcc-7/changes.html

Change-Id: Ib848f2a56dd658783534158947ae1be7c0e99d45
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/4175
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
2017-10-23 10:54:24 +01:00
Freddie Chopin
9364b0dba4 Fix GCC7 warnings about switch-case fallthroughs
GCC7 with -Wextra warns about switch-case blocks which fallthrough with
"this statement may fall through [-Werror=implicit-fallthrough=]". This
can be fixed by adding "special" comments: "/* fallthrough */".

See https://gcc.gnu.org/gcc-7/changes.html

Change-Id: Iba0be791dbdd86984489b2d9a0592bb59828da1e
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/4174
Tested-by: jenkins
2017-10-23 10:54:16 +01:00
Andreas Fritiofson
ef49b34b2a arm: semihosting: set command line arguments
Add "arm semihosting_cmdline [argv0 argv1 ...]" for setting the
command line arguments for the debuggee.

[andreas.fritiofson@gmail.com]: Dynamic allocation, empty default

Change-Id: I831ddd161d602f251940e29608a154e9590fdee1
Signed-off-by: Christian Groessler <chris@groessler.org>
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3106
Tested-by: jenkins
2017-10-22 23:06:09 +01:00
Tim Newsome
1662508911 Differentiate "target not halted" messages.
Change-Id: I8728fa007289d7af5c6791142e76eb5777c83ca4
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4244
Tested-by: jenkins
Reviewed-by: Liviu Ionescu <ilg@livius.net>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-10-18 08:38:18 +01:00
Tim Newsome
1356be121e Document struct reg fields.
Change-Id: I286316079e2e4d4f09427a4ffbecadb48c5dc9d9
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4250
Tested-by: jenkins
Reviewed-by: Liviu Ionescu <ilg@livius.net>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-10-18 08:35:42 +01:00
Peter Griffin
0e02fe40c6 tcl: add hi3798 target and Tocoding Poplar board config
This config covers the 4x Cortex A53 CPUs. A custom connector
is required from J14 to standard ARM JTAG on v1 boards. However
v2 hardware should have a standard FTSH-105-01-L-DV connector.

Pinmuxing code to enable JTAG pins is included in l-loader-poplar
repository, so board is flashed with open source code, JTAG
is available at very early boot. Alternatively the following
pokes can be issued from U-Boot to enable JTAG (e.g. to debug
hisilicon SDK).

mw 0xf8a210ec 0x130;
mw 0xf8a210f0 0x130;
mw 0xf8a210f4 0x130;
mw 0xf8a210f8 0x130;
mw 0xf8a210fc 0x130;
mw 0xf8a21100 0x130;

Change-Id: I2b83dfcb3dc5461c1620f94dd99aa7b31fdda59b
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-on: http://openocd.zylin.com/4161
Tested-by: jenkins
Reviewed-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-10-16 14:10:52 +01:00
Slowcoder
2168c475ff nrf5: Add nRF52832-QFAA support
Change-Id: Ica9e34e873cac182662b1e32a9b3164dbc0c935f
Signed-off-by: Slowcoder <slowcoder@gmail.com>
Reviewed-on: http://openocd.zylin.com/4210
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03 11:28:20 +01:00
Slowcoder
d43308af75 nrf51: Rename to nrf5
Renaming of all nrf51 NOR flash code to nrf5, as to prepare the
code for being able to flash nrf51 and nrf52 chips.

The nrf51 command is retained for backwards compatability.

"nRF5" is also the name Nordic Semiconductor uses to describe
both the nrf51 and nrf52 chips.

Change-Id: I5f4e3f1ec780184b28ad44f735a746e68908c502
Signed-off-by: Slowcoder <slowcoder@gmail.com>
Reviewed-on: http://openocd.zylin.com/4209
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03 11:28:13 +01:00
Slowcoder
52885d2b53 nrf51: Refactor device-list
This cleans up the list of supported nrf51 chips considerably.

Change-Id: Ic74685657bb72a8703c0a49df4c48c54604ec2a7
Signed-off-by: Slowcoder <slowcoder@gmail.com>
Reviewed-on: http://openocd.zylin.com/4208
Tested-by: jenkins
Reviewed-by: Fredrik Hederstierna <fredrik@hederstierna.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03 11:28:03 +01:00
Uwe Bonnes
9bbe299b35 stm32lx.c: Read IDcode at appropriate address.
Trying to read the L0 idcode at the L1 idcode address 0xE0042000 often
resulted in an uncatched error. Reading at the right L0 address 0x40015800
afterwards results in reading 0. So access to the device is denied..

Change-Id: I6de92cf99a5d5d46c72f9ba055613cbc5753a951
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/3883
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03 11:25:27 +01:00
Oleksij Rempel
5384d2c209 target: atheros_ar9344: add simple uart0 test
in some cases we need something to test if uart is actually
properly connected.

Change-Id: I5a16b053164b34bb30ae8370753be12887a85c51
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/4194
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03 11:24:46 +01:00
Oleksij Rempel
ffa745b835 board: add TP-Link WDR4300 config
tested on TP-Link WDR4300 v1.7

Change-Id: If2b456afac835ab3a3987d434d20824c7ba75b93
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/4192
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03 11:24:39 +01:00
Oleksij Rempel
e548d17f62 target: add atheros_ar9344.cfg
Change-Id: I005b4c78ccb0fec8d38a25430cb49c580dcd8df5
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/4191
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03 11:24:15 +01:00
Oleksij Rempel
f441f58ad6 board: tp-link_tl-mr3020: add ath79 support
Finally we can use this driver by default!

Change-Id: I09d215d1bd1dc16873a7379637e6869af65ad8f1
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/4193
Tested-by: jenkins
Reviewed-by: Dmytro <dioptimizer@hotmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03 11:24:10 +01:00
Robert Foss
f712098323 server: Add port number to socket bind error
Make this error message more useful by providing the port number
that we tried to bind to.

Change-Id: Ieb18adf0725a6ae99c77ebfaadc49d64ed407bbe
Signed-off-by: Robert Foss <robert.foss@collabora.com>
Reviewed-on: http://openocd.zylin.com/4157
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03 11:23:15 +01:00
Diego Herranz
5a6f0495db tcl/interface/ftdi: improve minimodule config
- Tested on a real FT2232H MiniModule, so warning removed.
- Every pin initially set to high impedance except TCK, TDI,
  TDO and TMS: Safest values given it's an evaluation board
  and the rest of pins might be connected to something else.
- Reset is now initially de-asserted (it was asserted
  which is not recommended).
- nRST pin choice is arbitrary so comment added (wondering
  if it should be an "echo").
- "-oe" option added to NRST signal so it can be set as
  high impedance (tri-stated).

Change-Id: I967ab0c7bbccf72dbf6d6d78b3180b74e016e0d6
Signed-off-by: Diego Herranz <diegoherranz@diegoherranz.com>
Reviewed-on: http://openocd.zylin.com/4185
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03 11:22:56 +01:00
Andrea Merello
10a3b24daf flash: efm32: add support for EFR-familty (e.g. bluegecko)
This patch adds support for Blue Gecko and Mighty Gecko chips from
Silabs.

They have different EFM32_MSC_REGBASE and LOCK register offset.

Based on the original patch from Andreas Kemnade.

Change-Id: I166c14960ced7c880b68083badd1b31372fefabe
Cc: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Andrea Merello <andrea.merello@gmail.com>
Reviewed-on: http://openocd.zylin.com/4034
Reviewed-by: Jonas Norling <jonas.norling@cyanconnode.com>
Tested-by: jenkins
Reviewed-by: Fredrik Hederstierna <fredrik@hederstierna.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: chrysn <chrysn@fsfe.org>
2017-10-03 11:22:18 +01:00
Jonathan McDowell
f95f8b70fb tcl/interface/ftdi/sheevaplug: Fix FTDI channel configuration
The migration from the old ft2232 driver to the new generic ftdi driver
ended up breaking support for the SheevaPlug device. The old driver
defaulted to channel 1, but numbered the channels 1 to 4. The new driver
starts at 0. The SheevaPlug JTAG is on interface A (interface B is the
serial console), so it should be using channel 0. Fix this. Confirmed
as working; serial console remains available and a new u-boot image can
be transferred across using the JTAG link.

See also Debian Bug#837989; https://bugs.debian.org/837989

Change-Id: I4ac2bfeb0d1e7e99d70fa47dc55f186e6af2c542
Signed-off-by: Jonathan McDowell <noodles@earth.li>
Reviewed-on: http://openocd.zylin.com/4206
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins
2017-10-03 11:20:18 +01:00
Fabio Utzig
e8b6aaa8e5 Add missing break
Change-Id: Ie1de679fe6ab5ace05fc3e156c71f34b296b3d3b
Signed-off-by: Fabio Utzig <utzig@apache.org>
Reviewed-on: http://openocd.zylin.com/4200
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Esben Haabendal <esbenhaabendal@gmail.com>
2017-10-03 11:19:58 +01:00
Marc Schink
5fd8eaadf9 stm32f2x: Fix left shift of negative value
Use unsigned constant for left shift operation in order to avoid the
following error with GCC >= 6.0:

../src/flash/nor/stm32f2x.c: In function ‘stm32x_handle_unlock_command’:
../src/flash/nor/stm32f2x.c:1324:67: error: left shift of negative value [-Werror=shift-negative-value]
   stm32x_info->option_bytes.optcr2_pcrop = OPTCR2_PCROP_RDP | (~1 << bank->num_sectors);

Change-Id: I0ac082bd0dbb8dc2f61ffff8fdf486ab7962d2e0
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4207
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Anton Fosselius <anton.fosselius@gmail.com>
Reviewed-by: Esben Haabendal <esbenhaabendal@gmail.com>
2017-10-03 11:19:45 +01:00
Tim Newsome
18a94a1a8a Fix typo in comment.
Change-Id: I6567f85f399315e1dac98881765dfaa6eab5facb
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4238
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03 11:19:26 +01:00
Marc Schink
b0dcff5e34 jlink: Disable TCP/IP discovery
If no serial number is specified, disable TCP/IP device discovery to
ensure that a user does not unintentionally operate on a remote device.

Change-Id: I6a7e913b8b679fae003825468cd86d2014849b29
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4214
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03 11:19:10 +01:00
Marc Schink
98e63cdc86 jlink: Disable automatic device selection
If multiple devices are attached, do not automatically use the first
device found. Otherwise, a user may unintentionally operate on the
wrong device.

Change-Id: I08c4110b82e911e9e3e744d41830ffc6c56c44bf
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4213
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03 11:18:52 +01:00
Marc Schink
f981730fe7 jlink: Use error description in log messages
Use a human-readable error description rather than just the error name
in log messages.

Change-Id: Iab4ff7a7e4d9993983a07eab9f462820d4ee8190
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4212
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03 11:18:46 +01:00
Marc Schink
7d8d2654e6 jlink: Make libusb optional
libusb is now optional for libjaylink because support for TCP/IP
devices is always available.

Change-Id: I03f2566f8e1703276671ac0f353f72394d21f2f0
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4204
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03 11:18:40 +01:00
Marc Schink
ba24c1fc05 jlink: Make use of debug level for I/O messages
Change-Id: Iba08c119a80041f9c1b4c9bd7e83bb4f9bbb7199
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4203
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03 11:18:32 +01:00
Marc Schink
4dc09d98d0 libjaylink: Update to latest Git version
Update to latest Git version and bump required libjaylink package
version to 0.2.0.

This version introduces support for devices with TCP/IP interface (e.g.
SEGGER Flasher ARM) and an additional debug level for I/O messages.

Change-Id: I030236aa704a91d1bb1843dd30010865947747e0
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4202
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03 11:18:26 +01:00
Marc Schink
1ab0303dbc helper/options: Add missing #include for MinGW and MSYS2
Change-Id: I3bb295f52706b641661241e3e047306811ca915e
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4201
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03 11:18:20 +01:00
Paul Fertser
83772f32ad configure: bring back all default JimTcl extensions
This partially reverts commit 56d163ce79.

That change certainly caused more pain than gain.

Change-Id: Ifb126abd1e6b89d29db8bf6a7b8af5dfc815c163
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4159
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03 11:17:24 +01:00
Karl Palsson
bf5258d876 telnet_server: increase buffer sizes to allow longer commands.
A common use case seen in the wild is echoing a string of commands to an
existing openocd instance via netcat.  The sequence of ; separated
commands can easily run over the line limit of only 256 chars.

Increasing this dramatically reduces surprises, at the expense of a tiny
amount of extra ram usage.

Change-Id: I2389d99d316a96b5fa03f0894b43c412308e12c4
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-on: http://openocd.zylin.com/4132
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03 11:16:48 +01:00
Karl Palsson
e78b33e3ca telnet_server: drop unused options
They're never used, so just drop them.

Change-Id: Ie137deed3e7258f9d6af7e0cb508e73df0f53ee0
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-on: http://openocd.zylin.com/4131
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03 11:16:36 +01:00
Andreas Bolsch
7719e9618e Support for STM32F722, F723, F413 and F423
IDs for STM32F722, F723, F413 and F423 added, handling of PCROP
for F722/723 and additional nWPRT bits for F413/423 implemented.
The additional protection bit positions for F413/423 conflict
with other options bits for the F7xx variants, additionally the
last two sectors share a common bit.

Protection for F413 and F767/777 now use protection blocks
rather sectors for dealing with protections bits.

Checking for halted state in 'lock' and 'unlock' removed: When
PCROP is activated in F723, halted state is not detected properly,
but lock/unlock sequence is required to disable PCROP.

Tested with STM32F723E-Disco, STM32F413ZH-Nucleo.

Change-Id: Ie6ddab47a9ae8461087d369b4f289b7f9d1e031c
Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-on: http://openocd.zylin.com/4045
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-08-10 09:35:47 +01:00
Andreas Fritiofson
3ee81fd787 log: Add a new debug level (4) for verbose I/O debug
Change ftdi SWD driver and CMSIS-DAP to use it instead of LOG_DEBUG().

Change-Id: I17ba3de2086c7159209db61fba3faf067dfc5023
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3805
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-08-10 09:29:06 +01:00
Karl Palsson
04b23ef502 stm32l1: Devid 0x429 only has 8bit flash size register
A footnote in RM0038r14.

Change-Id: Ic31894d846fbbe917a7290b2b7ff8fb582bb65da
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-on: http://openocd.zylin.com/4198
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-08-10 09:20:39 +01:00
Tomas Vanek
02bc718d1a flash Kinetis: fix probe for FlexNVM partitioned as EEPROM backup
If a MCU has FlexNVM partitioned as EEPROM backup only
(no data flash), kinetis_probe_chip() detects zero fcfg2_maxaddr1
and adjusts flash banks count to 1, what is obviously wrong.

The change limits the test to devices without FlexNVM.

Computation of program flash/FlexNVM blocks is now more robust.

Missing case 0x07 is added to switch (fcfg1_depart)

Change-Id: I0bd6030a0fe1ab62aeb0223bbdf2aee1505bf6a0
Reported-by: simon.haines@scalardata.com
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4180
Tested-by: jenkins
Reviewed-by: Simon Haines <simon.haines@scalardata.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-07-24 13:11:06 +01:00
Tomas Vanek
dbd0d90af9 flash Kinetis: fix devices with smallest program flash (8 and 16 kB)
Change-Id: I2692b9877a7f877104528f279a69e8cc1cfbcdbf
Reported-by: David Miller Lowe <milhead@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4173
Tested-by: jenkins
Reviewed-by: Miller Lowe <miller.lowe@trailtech.net>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-07-24 13:09:37 +01:00
Andreas Fritiofson
29cfe9c5ee mips32: inline functions in headers must be static
Change-Id: If1d0fc6766cadc2db33408ae5c0968de6b7a1b94
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/4178
Tested-by: jenkins
Reviewed-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-by: Stian Skjelstad <stian@nixia.no>
2017-07-07 09:54:35 +01:00
Steven Stallion
0e4fbfba03 rtos: better sanity checking for uCOS-III
This patch improves the OSRunning check. If the rtos_running check
fails, update_threads will return an error rather than attempt to update
the thread list using bad values.

Change-Id: I8614c325504d3a9ab19aebb6862b1fe445a0c8e7
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/4166
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-06-30 21:23:47 +01:00
Steven Stallion
e6fe4dddb9 rtos: style corrections for uCOS-III
This patch corrects a number of style infractions in RTOS support for
uC/OS-III. These were missed during initial review last year prior to
the 0.10.0 release.

Change-Id: Ia2139f6ca381d4087fd8ee989f7a03ac474d7440
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/4120
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-06-30 21:23:15 +01:00
Moritz Fischer
6767c1c1a3 zynq_7000: Add expected id for Zynq 7z100 devices
As found on the NI Project Sulfur SDR board.

Change-Id: I47bdd38ae85cf45cedad8797ea03bf3105153320
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Reviewed-on: http://openocd.zylin.com/4176
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-06-30 21:21:27 +01:00
Richard Watts
b3cf9a665c flash/nor/efm32: Support EZR32HG devices.
Recognise the family number for Silicon Labs EZR32HG devices and
select the correct flash page size.

Change-Id: I876e930f3a9f679557fa0d0acac33e9bbfb28c46
Signed-off-by: Richard Watts <rrw@kynesim.co.uk>
Reviewed-on: http://openocd.zylin.com/3934
Tested-by: jenkins
Reviewed-by: Fredrik Hederstierna <fredrik@hederstierna.com>
Reviewed-by: Jonas Norling <jonas.norling@cyanconnode.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-06-30 10:57:20 +01:00
Andreas Fritiofson
868a100143 target: Fix snprintf format string and argument mismatch in md output
Commit 47b8cf842 changed the fixed type of the value argument to snprint
but didn't change the format string to match for sizes != 64 bit.

Change-Id: I908b06f49ab69d04224282949190a0de883048e0
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/4167
Tested-by: jenkins
Reviewed-by: Stian Skjelstad <stian@nixia.no>
Reviewed-by: Philipp Guehring <pg@futureware.at>
2017-06-30 10:06:32 +01:00
Marc Schink
1725abc3c0 flash/nor/tcl: Make read_bank parameters optional
Make 'offset' and 'length' parameters optional, if both are omitted
simply read the whole flash bank.

Additionally, check if the 'offset' and 'length' arguments are out of
bounds of the flash bank.

Change-Id: Ib9c1b0538a2c78ebcf702e2da11468dff407f8ff
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3862
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-06-17 12:45:56 +01:00
Marc Schink
7112e5f57a flash/nor/tcl: Respect flash bank boundary in write_bank
Respect the flash bank boundary and write only to the remaining part of
the bank even if the file content is larger.

Change-Id: I8f4c1b161c103a77bdb30c6bf052293b5ed48c41
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3861
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-06-17 12:45:11 +01:00
Marc Schink
bdc71c5252 flash/nor/tcl: Make write_bank parameter optional
Make the 'offset' parameter optional, if omitted simply start at the
beginning of the flash bank.

Additionally, check if the argument is out of bounds of the flash bank.

Change-Id: I8e9632b539ad9e83211e1ac6a06da4c8109cbc60
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3860
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-06-17 12:44:25 +01:00
Marc Schink
2de82d39a2 flash/nor/tcl: Respect flash bank boundary in verify_bank
Respect the flash bank boundary and compare only the remaining content
of the bank even if the file content is larger.

Change-Id: I4d75979c7893fdd4d18372fa6b0321a0486b4fa9
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3859
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-06-17 12:43:29 +01:00
Joakim Nohlgård
2c8602ed9f flash Kinetis: Add support for newer KW series
Add support for flashing newer members of the NXP Kinetis KW family

Supported devices:
 - KW20Z
 - KW30Z
 - KW40Z
 - KW21Z
 - KW31Z
 - KW41Z

The earlier KW2xD and KW01Z devices are already supported by the code
for the older K-series.

Verified working on the FRDM-KW41Z development board.
Tested flashing both via GDB `load` and directly via OpenOCD flash
write commands.

Change-Id: I73eae477127a8b54a33005b3b526b5439450a808
Signed-off-by: Joakim Nohlgård <joakim.nohlgard@eistec.se>
Reviewed-on: http://openocd.zylin.com/4104
Tested-by: jenkins
Reviewed-by: Johann Fischer <johann_fischer@posteo.de>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-06-17 12:02:31 +01:00
Tomas Vanek
8dcb91fb83 flash Kinetis: add KL28 device
This device differs a lot from others in KL series.

Unfortunately the System Integration Module, where device
identification resides, moved to a new address so probe now have
to try both addresses of SIM_SDID.

Introduce a new bank creation option: -sim-base to ensure error free probe.

WDOG32 is slightly different from KE1x and on different address.
System Mode Controler changed layout to word aligned.

Change-Id: I2c9dca0c4ad4228fcc941d6078d15f5e394833ff
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4059
Tested-by: jenkins
Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-06-17 12:02:07 +01:00
Tomas Vanek
5a2608bbbc flash Kinetis: handle all types of watchdog, disable in reset-init
Active watchdog forces reset during armv7m_checksum_memory()
in verify_image command if run just after reset init.

COP watchdog in KL series and WDOG32 in KE1 series
have longer timeout however they need to be disabled too.

The change extends 'kinetis disable_wdog' command to optionally
probe the chip and use appropriate algorithm to disable watchdog.

Setting of cache type is also split from flash_support flags.

Tcl command 'kinetis disable_wdog' is called in reset-init event.

Change-Id: I3191e230f38b679ed74f2a97fe323ef8fb3fe22e
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3901
Tested-by: jenkins
Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-06-17 12:01:55 +01:00
Tomas Vanek
c4d4c32a50 flash Kinetis: implement automatic bank creation based on device probe
Kinetis flash driver services huge number of MCU types. They have
one, two or four flash banks with option of FlexNVM. It would
require ~36 config files just for Kx series, more for KLx, KVx and KE1x.

The change implements alternative approach:
- configuration file creates just one pflash bank (common for all devices)
- when a device is probed, additional pflash or flexnvm banks are created
based on flash layout of the connected MCU
- created banks have names with optional numbering e.g. kx.pflash0 kx.pflash1
kx.flexnvm0 kx.flexnvm1
- the first bank gets renamed if numbering is used

Automatic bank creation is enabled by tcl command 'kinetis create_banks'.

Used solution has a drawback: other banks than pflash0 are not accessible
until pflash0 is probed. Fortunately gdb attach and standard programming
accesses banks in right sequence.

Change-Id: I5b9037cbefdb8a4176b7715fbcc3af4da4c1ab60
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3925
Tested-by: jenkins
Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-06-17 12:01:45 +01:00
Tomas Vanek
1fdc62ef65 flash Kinetis: split kinetis_chip from kinetis_flash_bank
Kinetis flash driver probed and decoded chip repeatedly for each flash
bank. Bank ordering used global bank number so multi-target
configuration was broken.

The change introduces kinetis_probe_chip() which reads SIM SDID
and SIM FCFG registers, decodes Kinetis series and family
and fills struct kinetis_chip. This probe runs once for all banks.

struct kinetis_chip contains pointers to all flash banks embeded
in the MCU. It simplifies iteration over all or specific MCU banks.

kinetis_probe_chip() generates MCU name and some informational messages
are improved.

Change-Id: I990db5c63ba490667eec0e5459086d83936662fb
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3924
Tested-by: jenkins
Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-06-17 12:01:24 +01:00
Tomas Vanek
16f364a591 flash Kinetis: add KV5x family
Real time control MCU has a Cortex-M7 and numerous changes in flash layout.
Introduced a new ID of MDM-AP.

While on it a LOG_DEBUG format error fixed.

Change-Id: I1018660ce0c3dd63ac5e2563408fabff3c3daef7
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3900
Tested-by: jenkins
Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-06-17 12:01:04 +01:00
Tomas Vanek
97d296637e flash Kinetis: add KL8x family, fix erase check
Secure devices KL81Z7 and KL82Z7 have no SERIESID field in ID register
so they have to be decoded in Kx branch (not KLx).

The flash controller in KL8x and also in K8x devices does not implement
FTFx_CMD_BLOCKSTAT command. Fix kinetis_blank_check() to work properly
using FTFx_CMD_SECTSTAT command only.
Introduce a new flag FS_NO_CMD_BLOCKSTAT to avoid use of FTFx_CMD_BLOCKSTAT
on these devices.

Change-Id: I3ff58718480acd8cce69f618f71667b6b1d9c4f3
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3898
Tested-by: jenkins
Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-06-17 12:00:53 +01:00
Tomas Vanek
fffe8e6725 tcl/target: make sure kex.cfg is not used for Kinetis KE1x families
Config file renamed to ke0x.cfg and a notice added to texi.

While on ke0x.cfg CPUTAPID setting fixed: device has SWD port only, no JTAG.

Removed per device configs as they set CHIPNAME and nothing more.
Let's use reasonably universal chip name 'ke' set in family config.

Change-Id: I313db87a59f25f968eb3c27df155780b67becee8
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3897
Tested-by: jenkins
Reviewed-by: Ivan Meleca <ivan@artekit.eu>
Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-06-17 12:00:01 +01:00
Tomas Vanek
a0a504569b flash Kinetis: add KE1xZ and KE1xF families
The new Kinetis KE1x families use FTFE flash controller unlike KE0x.
Also SDID coding corresponds to new K, KL and KV families.
That's why KE1x is handled by kinetis driver instead of kinetis_ke

Change-Id: Ibb73e28e41dfbb086e761e1f006b089825dab854
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3896
Tested-by: jenkins
Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-06-17 11:59:36 +01:00
Tomas Vanek
278f63174d flash/nor: at91samd modified to use real erase sector size
Before this change SAMD driver defined "sector" equal to a flash
protection block. Oversize sectors (16kB for the biggest flash size)
made problems for flashing firmware split to two or more parts.

Removed superfluous test of sector protection before erase.

Change-Id: I8e6a6bda6ccd91eda2df67ec48270c69faa1bdd1
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3546
Tested-by: jenkins
Reviewed-by: Stian Skjelstad <stian@nixia.no>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-06-17 11:58:26 +01:00
Tomas Vanek
24c302752e flash/nor/at91sam4: remove FWS=6, rename at91samg to atsamg
FWS=6 workaround removed, as this appears to be a copy-paste error
from the SAM3X family. Originally addressed in http://openocd.zylin.com/3837
but not all occurences were removed.

Atmel changed chip naming and removed 91 prefix for atsamg, samd...

Change-Id: Ia2b43da82b2ff9b1c85fdb456a0a198ab095243d
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3926
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-06-17 11:56:54 +01:00
Paul Fertser
1025be363e flash: nor: ath79: fix build failure due to recent MIPS changes
Change-Id: I7139b0658f048afea2d16216c93e8946356a630d
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4151
Tested-by: jenkins
Reviewed-by: Salvador Arroyo <sarroyofdez@yahoo.es>
2017-06-02 20:20:26 +01:00
Tobias Diedrich
6b9d19d367 flash: Add support for Atheros (ath79) SPI interface
Supported SoCs: AR71xx, AR724x, AR91xx, AR93xx, QCA9558

Extended and revised version of my original patch submitted by Dmytro
here: http://openocd.zylin.com/#/c/3390

This driver is using pure SPI mode, so the flash base address is not
used except some flash commands (e.g. "flash program") need it to
distinguish the banks.

Example config with all 3 chip selects:
flash bank flash0 ath79 0 0 0 0 $_TARGETNAME cs0
flash bank flash1 ath79 0x10000000 0 0 0 $_TARGETNAME cs1
flash bank flash2 ath79 0x20000000 0 0 0 $_TARGETNAME cs2

Example usage:
> flash probe flash0
Found flash device 'win w25q128fv' (ID 0x001840ef)
flash 'ath79' found at 0x00000000
> flash probe flash1
No SPI flash found
> flash probe flash2
No SPI flash found
> flash banks
> flash read_bank flash0 /tmp/test.bin 0x00000000 0x1000
reading 4096 bytes from flash @0x00000000
wrote 4096 bytes to file /tmp/test.bin from flash bank 0 at offset
0x00000000 in 28.688066s (0.139 KiB/s)

Change-Id: I5feb697722c07e83a9c1b361a9db7b06bc699aa8
Signed-off-by: Tobias Diedrich <ranma+openocd@tdiedrich.de>
Reviewed-on: http://openocd.zylin.com/3612
Tested-by: jenkins
Reviewed-by: Dmytro <dioptimizer@hotmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-05-31 08:18:29 +01:00
Grzegorz Kostka
83c67b7ac7 imx_gpio: add mmap based jtag interface for IMX processors
For some targets (like nrf51) sysfs driver is too slow. This
patch implements memory maped driver for IMX processors.
Mostly based on bcm2835gpio. Tested on imx6ul CPU. However, it should
work on any NXP IMX CPU.

Change-Id: Idace4c98181c6e9c64dd158bfa52631204b5c4a7
Signed-off-by: Grzegorz Kostka <kostka.grzegorz@gmail.com>
Reviewed-on: http://openocd.zylin.com/4106
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-05-31 08:16:17 +01:00
Forest Crossman
f6449a7cba jtag/drivers: Add Cypress KitProg driver
This patch adds a driver for the SWD-only Cypress KitProg
programmer/debugger.

Change-Id: I3a9a8011a762781d560ebb305597e782a4f9a8e5
Signed-off-by: Forest Crossman <cyrozap@gmail.com>
Reviewed-on: http://openocd.zylin.com/3221
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-05-12 10:08:43 +01:00
Moritz Fischer
16655c1dd5 tcl/cpld: add config file for Altera 5M570Z CPLD (MAXV family)
Change-Id: I229c746be27b7c4fa01f48a6ed54ab2679b50ab1
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Reviewed-on: http://openocd.zylin.com/4109
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-05-09 21:41:46 +01:00
Juha Niskanen
753cf12700 stm32l4: support flashing L45x/46x devices
Also fixes incorrect comment about MSI range.

Change-Id: If1339a00e50db44195dfcd5c767ba3f5d9035451
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
Reviewed-on: http://openocd.zylin.com/4122
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 18:07:41 +01:00
Salvador Arroyo
f22b89d9fb mips32, use scan32 function for reading impcode/idcode.
There is no need to implement scan code in functions
mips_ejtag_get_idcode/impcode(), use mips_ejtag_drscan_32().
Impcode/idcode saved in ejtag.info.
Reorder the code in the callers of this functions.

Change-Id: Ia829c783a0b24c6a65cade736113fa6f67b0a170
Signed-off-by: Salvador Arroyo <salvador@telecable.es>
Reviewed-on: http://openocd.zylin.com/4003
Tested-by: jenkins
Reviewed-by: Peter Mamonov <pmamonov@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 18:05:58 +01:00
Salvador Arroyo
b702b16dc2 mips32: add micromips breakpoints support
Breakpoint setting based on length (kind) only.
Added 16bit aligned 32bit software breakpoints
support and same filtering before setting
breakpoint.
Set the required isa bit in hardware breakpoints.
Drop the isa bit in software breakpoints.

Change-Id: I7020f27be16015194b76f385d9b8e5af496d0dfc
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4124
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 18:05:26 +01:00
Salvador Arroyo
4831ce4433 mips32: add micromips isa handling
Read and save configuration registers, up to 4.
Config3 holds the micromips implementation info.
Added isa implementation info to mips32_common.
Added isa filter to avoid common mistakes, but only
if one isa mode is implemented.
When resuming the isa requested is set if more than
one isa mode is implemented.

Change-Id: I1d6526c5525bffac8d75e031b842b2edc6310e28
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4123
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 18:04:56 +01:00
Salvador Arroyo
f5151b6d46 mips32, convert miniprograms with code definition
Needed to run in micromips mode. Seems that if an isa
is supported in debug mode it also supported in kernel
mode. The contrary is not true.

Change-Id: I1feb8e2c376f4db97089f05c20bc0cd177208fb3
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4033
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 18:03:58 +01:00
Salvador Arroyo
2279c23cde mips32, add support for micromips in debug mode
Micromips is 16bit oriented, branch and jumps are
16 bit based. The upper half 16bits of a 32bit instruction
with the major opcode, must go first in the instruction
stream, hence the SWAP16 macro and swap16 array function,
needed if the code is written as 32 bit word in little endian
cores. Endianess info added to ejtag_iinfo. Pointer to
ejtag_info and isa field added to pracc context.
MIPS32 code are renamed to MIPS32_ISA_...
To select the isa, the new code has an additional isa parameter
(1 for micromips, 0 for mips32).
In JR instruction the isa bit must be set to execute
micromips code.
The suffix u is added to the OP codes to avoid signed/unsigned
comparison errors and to make sure the right shift is
performed logically.
The isa in debug mode is updated in the poll function.
Code for miniprograms, in kernel mode, need to be converted.
CFI code only for mips32.

Change-Id: I79a8b637d49b0e2d92b6dd5eb5aa8aa0520bf938
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4032
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 18:03:28 +01:00
Salvador Arroyo
6012a87d44 mips32, add microMips instruction subset
Only reencoded MIPS32 instructions. Added some instructions
for crc code. Micromips isa in debug mode is only needed for
pic32mm cores. Pic32mz seems that only works with MIPS32
isa when in debug mode.

Change-Id: I07059e153a7000ea9204f20b6b37edf6a7623455
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4022
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 18:00:46 +01:00
Salvador Arroyo
e320588117 mips32, add option to avoid check in last instruction
This option is needed, for example, when exiting
debug mode in bmips targets. The last instruction
is a NOP, not a DERET. When working in async mode
this check is not done, mips32_pracc_queue_exec() pass
the parameter to mips32_pracc_exec() and never use it.

Change-Id: I4c7ed4feb1588b62e2645b955b501b6671113b36
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4021
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 18:00:09 +01:00
Salvador Arroyo
1392c27cf9 mips32, add realloc code
If max_code is reached realloc memory. If fails to realloc
the error is propagated and every call to pracc_add() returns
immediately. The exec function logs the error.

Change-Id: Idd4ed9d9b8b19b7d6842d0bc5ebb05f943726705
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4020
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 17:59:15 +01:00
Salvador Arroyo
c8b31aaa15 mips32, change in pracc_list for dynamic allocation
pracc_list points to an array with code in the lower half
and addr in the upper half. Change it to a struct with
an instruction field and an address field.
Requiered to make reallocation easier.
As a side effect the code is less quirky.

Change-Id: Ibf904a33a2f35a7f69284d2a2114f4b4ae79219f
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4019
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 17:57:30 +01:00
Matthias Welwarsky
3414daed26 Fix compile failure on MacOSX
MacOSX tool chain defines __unused in "sys/cdefs.h", causing a collision.
Remove the local define to avoid polluting the compilers internal 
symbol namespace.

Change-Id: I16370c4518e6aeec482dd689e7db80628f846ee3
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4118
Reviewed-by: Steven Stallion <sstallion@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2017-05-02 16:43:20 +01:00
Salvador Arroyo
cb317eabf2 mips32, write handler code in a more compact way
Less code and probably cleaner.
Don't check if it is ever ERROR_OK.

Change-Id: I1045b58fd4542ec24430332f49679364ae97b1dc
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4018
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25 17:03:20 +01:00
Salvador Arroyo
bff6205bab mips32, implement assembler li instruction
Implement it as a function, the code was already in. Added optimize
option.

Change-Id: Ib9ad3f00d6c4f0b91c4e4960a50ec8d102f4e333
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4017
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25 17:02:14 +01:00
Salvador Arroyo
9bdc3bf0a8 mips32, in wait_for_pracc_rw() use ejtag_info->pa_ctrl
Makes code shorter
In fasdata transfer fuction declare variables locally.
Avoid cast.

Change-Id: I0367b66339560fc20521a0598488e7ff9076808e
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4011
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25 17:00:52 +01:00
Salvador Arroyo
5fdcbbdb25 mips32, mips32_pracc_finish() queued only
In most of the cases there is no need to request execution,
the check for a new pracc access already does it.
Requesting execution if not needed makes execution slower and
code larger due the additional checks.
Reduce code in fasdata transfer function.
Call for execution when exiting debug.

Change-Id: I3b45f6d1f62da5fad3e3db84f82a9299b16e1bd9
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4010
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25 16:59:44 +01:00
Salvador Arroyo
09ebc1afad mips32, drop unnecessary code in mips32_pracc.c
Struct mips32_pracc_context no more in use.
In current code cp0 reg/sel do not requires special handling.
In sync mode ctx.store_count not used, drop check.
In fasdata transfer function use mips32_pracc_read_ctrl_addr()
to reduce code.

Change-Id: Ibd4cfa5a44ebc106ed0db042f4e54a2e0b3d43cb
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4007
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25 16:58:47 +01:00
Salvador Arroyo
7ccd53bdde mips32, homogenize code in the scan functions
Change-Id: I32fed3332857737048dd12da94fcaba140acb726
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4006
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25 16:58:00 +01:00
Marc Schink
3421b89c98 server/telnet: Remove exit() call
Change-Id: I8ce99d7d62dfe3cad63cf6bc68f2faf2234e395c
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3224
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25 16:56:49 +01:00
Marc Schink
b43b95e460 server/server: Remove all exit() calls
With this patch OpenOCD shuts down properly when errors occur in the
server instead of just calling exit().

Change-Id: I2ae1a6153dafc88667951cab9152941cb487be85
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3223
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2017-04-25 16:56:35 +01:00
Juha Niskanen
99db18a995 stm32l4: support flashing L496 devices
Change-Id: I3effc5b675c853433170391c5eaf46edc067b6e7
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
Reviewed-on: http://openocd.zylin.com/4108
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25 07:55:43 +01:00
Salvador Arroyo
d81fc78d9b mips32, add generic scan 32 function
Will be used later, allow queuing all needed scans in a pracc
access. This makes faster execution with ftdi based adapters
working in sync with pracc.
Added now because the overall code is shorter.

Change-Id: Ib32b89307b75785f88870db8d7c9255dc5bbd426
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4005
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 23:07:29 +01:00
Salvador Arroyo
832f5974f2 mips32, pic32 use uint8_t in 8 bit scan function
Makes code shorter.

Change-Id: I6cc01adffbea063ccb071ddf3a3e3d81727b29ce
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4004
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 23:06:54 +01:00
Marc Schink
3fe9929511 tcl/board: Add STMicroelectronics STM32F7 Nucleo config
Tested with STM32F746ZG Nucleo development board.

Change-Id: Ia97b774b996a3be03e8e84342b93659c3632c18f
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3516
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 22:46:38 +01:00
Karl Palsson
68e204f1e9 udev: Add rules for Ambiq Micro EVK's.
Udev rules for Ambiq Micro ftdi based EVK's.
Two new vid:pid's: 2AEC:6010, and 2AEC:6011.

Udev rule for multi-target Debug board 2AEC:1106

Change-Id: Id7430d0c70647752375230f4024be9f7a2ba95ce
Signed-off-by: Rick Foos <rfoos@solengtech.com>
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-on: http://openocd.zylin.com/3980
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 22:43:14 +01:00
Byron Kubert
e683ff2ac7 Added 512K flashing support for em3587
The Silicon Labs EM3587 and EM3588 may have 512K of flash.
This fix allows for 512K to be specifiied on the command line
when flashing a device.

Change-Id: I18cc4bd0d14e1f2069066734a7396bcccf3de941
Signed-off-by: Byron Kubert <byronk@google.com>
Reviewed-on: http://openocd.zylin.com/3795
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 22:32:24 +01:00
Hellosun Wu
8f3d16f4ae libusb: Add transfer type filter to get correct ep
The need for this due to AICE having 3 interfaces
(EP1 IN-Interrupt, EP2 OUT-Bulk, EP6 IN-Bulk).
Without it, the function will choose first two endpoint as
read_ep/write_ep. This filter will check transfer types
when get endpoint-id. Without this patch, AICE will not
get correct endpoint.

Change-Id: I4da93c7de41cd19e5095b4bfb42078b21f40b678
Signed-off-by: Hellosun Wu <wujiheng.tw@gmail.com>
Reviewed-on: http://openocd.zylin.com/3218
Tested-by: jenkins
Reviewed-by: Hsiangkai Wang <hsiangkai@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 22:31:41 +01:00
Marc Schink
45f0e6d062 flash/nor/tcl: Make verify_bank parameter optional
Make the 'offset' parameter optional, if omitted simply start at the
beginning of the flash bank.

Additionally, check if the argument is out of bounds of the flash bank.

Change-Id: Id1959eee5c395666c35f26342c3c50134dd564e5
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3858
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-04-24 22:15:14 +01:00
Marc Schink
790a7b2a8d flash/nor/tcl: Fix some format specifiers
Change-Id: I2255aede9713cb7ef538d7433dd900d8da7a51ad
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3857
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 22:10:19 +01:00
Jan Čapek
b375052c58 tcl STM32L0xx - add support for dual banked targets and for Nucleo-64 STM32L073
- stm32l0_dual_bank.cfg - implement dual bank configuration

- st_nucleo_l073rz.cfg - implement new board script

Change-Id: Ie8063e5bec45069a63d414d81b2068fe3cc7e4d7
Signed-off-by: Jan Čapek <jan.capek@braiins.cz>
Reviewed-on: http://openocd.zylin.com/3957
Reviewed-by: Cezary Gapiński <cezary.gapinski@gmail.com>
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Tested-by: jenkins
Reviewed-by: Aurelio Lucchesi <me@0rel.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 21:57:57 +01:00
CezaryGapinski
e916bcda64 stm32lx: fix dual-bank configuration for Cat.5 and Cat.6 devices
Default values for .first_bank_size_kb and .has_dual_banks fields
described in stm32lx_parts[] do not fully describe
the real device memory layouts.

Basing on:
STM32L0x1 RM0377
STM32L0x2 RM0376
STM32L0x3 RM0367
STM32Lxxxx RM0038

correct values for memory layouts were selected:
id = 0x447 STM32L0xx (Cat.5) <- dual bank flash
for size 192 or 128 KBytes, single bank for 64 KBytes
id = 0x436 STM32L1xx (Cat.4 / Cat.3 - Medium + /
High Density) <- only one size of the bank,
default values are correct
id = 0x437 STM32L1xx (Cat.5 / Cat.6) <- always dual bank,
but size of the bank can be different

For that reason .part_info field in struct stm32lx_flash_bank
is a dynamic field with fields copied from stm32lx_parts[]
and overwriten to correct values
for specific chips and memory sizes.

Change-Id: If638cb0a9916097bfd4eda77d64feaf1ef2d2147
Signed-off-by: Cezary Gapiński <cezary.gapinski@gmail.com>
Reviewed-on: http://openocd.zylin.com/4074
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-04-24 21:56:53 +01:00
Armin van der Togt
ca9dcc86d7 Fix flash writing on stm32l0
Fix "couldn't use loader, falling back to page memory writes" error on
stm32l0 which was caused by the use of cortex-m3 instructions in the
flash loader code. The loader is rewritten using cortex-m0 compatible
instructions

Signed-off-by: Armin van der Togt <armin@otheruse.nl>
Change-Id: If23027b8e09f74e45129e1f8452a04bb994c424e
Reviewed-on: http://openocd.zylin.com/4036
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 07:03:59 +01:00
Tomas Vanek
2e0e6c5634 flash/nor/at91samd: fix chip erase of a secured device
'at91samd chip-erase' command did not work on secured device.

Fix it changing address of DSU.CTRL register
(see Atmel SAM D21 datasheet, 13.9. Intellectual Property Protection).

While on it check error return of DSU.CTRL write.

Change-Id: I83155a634a5458cdc0cc16c99c0e155eb1d8b3d6
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reported-by: Thomas Irmen <tirmen@gmx.net>
Reviewed-on: http://openocd.zylin.com/4043
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 06:31:37 +01:00
Tomas Vanek
44ad4fdcb0 jtag/drivers cmsis-dap: do not limit speed so strictly
Adapter clock frequency is set by 32-bit number and most adapters
limit the highest speed safely. There is no reason to impose strict
limit of 5000 kHz if some adapters can do more.

While on it give informative error message in case of zero adapter_khz.

Change-Id: I45c9804678e24496ea769ea9ca6036701b04dde9
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3945
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 06:28:28 +01:00
Jerome Lambourg
73a9464960 Add support for the ATMEL SAM G55 Xplained Pro board and CPU.
Change-Id: Iffe59dcf9f2cb1f5949c37d11fe0d2141a47f8da
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3922
Tested-by: jenkins
Reviewed-by: Leo Zhang <liang.zhang@microchip.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 06:25:13 +01:00
Girts
8addd9503e help/log.c: better error handling for "log_output"
* Close previous log file if one was opened before.
* Return error if opening file fails.

Change-Id: I103025cd86bcac785fe39e13bc7d5f79d78e38e7
Signed-off-by: Girts Folkmanis <opensource@girts.me>
Reviewed-on: http://openocd.zylin.com/3878
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-23 22:38:42 +01:00
Girts
b90d58db07 helper/options.c: fail if unexpected cmdline arguments are present
Previously openocd would silently ignore any incorrect arguments.

Change-Id: Ibb40b57b8a9e07d191215486f3b3c4920a9963c7
Signed-off-by: Girts Folkmanis <opensource@girts.me>
Reviewed-on: http://openocd.zylin.com/3879
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-04-23 21:38:41 +01:00
Girts
f63af76466 help/options.c: add error handling for -d arg
Fail if we fail to set debug level. Also, clarify in usage string that
-d<n> doesn't accept spaces.

Change-Id: I9ea9945dc068e3e7cfd18b16ffa2a29366d6e4d1
Signed-off-by: Girts Folkmanis <opensource@girts.me>
Reviewed-on: http://openocd.zylin.com/3880
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-04-23 21:37:59 +01:00
Matthias Welwarsky
1894292032 board: introduce base config for TI BeagleBone family boards
This patch adds the file ti_beaglebone-base.cfg as the common base
configuration for all TI BeagleBone derived boards. It also modifies
ti_beaglebone.cfg to source the base board and only add the on-board
JTAG adapter. Lastly, it adds a file ti_beaglebone_black.cfg with
a suitable configuraton for the BeagleBone "Black" variant.

Change-Id: I40cacb8abed7bdb308929713891f7b5e5b685c95
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3099
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-23 21:34:34 +01:00
Damyan Mitev
7829f31a6d nrf51: Add new HWID 0x008F
Add new entry in nrf51_known_devices_table for nRF51822 chip found on
chinese Core51822 dev board. The chp has markings N51822 / QFAAH1 / 1630FW
Nordic Semiconductor nRF51 Series Compatibility matrix confirms that this chip
has 256K Flash and 16K RAM.

Change-Id: I571d15913c6f6e02a6f09c883d7dfc5a66b57c28
Signed-off-by: Damyan Mitev <damyan_mitev@mail.bg>
Reviewed-on: http://openocd.zylin.com/4091
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-23 21:33:05 +01:00
Chengyu Zheng
6e8217784b tools/scripts/checkpatch.pl: fix unescaped brace
Change-Id: If1d0fbe95223351ea098504cf24f076784b26a9c
Signed-off-by: Chengyu Zheng <chengyu.zheng@polimi.it>
Reviewed-on: http://openocd.zylin.com/4102
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-23 21:25:02 +01:00
Matthias Bock
d7d7d8bd40 added interface config file for In-Circuit's ICprog OpenOCD JTAG adapter
Change-Id: I9f9758d3a30bbcca9f750f604e011e5cc25809c5
Signed-off-by: Matthias Bock <mail@matthiasbock.net>
Reviewed-on: http://openocd.zylin.com/4107
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-04-23 21:20:17 +01:00
Tomas Vanek
34eb2933d4 jtag/drivers cmsis-dap: fix speed setting on Atmel EDBG
Without the change Atmel EDBG uses default clock freq about 168 kHz
instead adapter_khz configured before interface init.
Changing adapter speed after init works as expected.

Testing shows the EDBG firmware resets speed to default during DAP_SWJ_Sequence.
Tested with fw versions 03.1F.01AE and 02.09.0169

This change repeats the DAP_SWJ_Clock command after sending a SWJ sequence.

Change-Id: Ic70457c5df635f47cad5e70b0dc83a083ea1b3a3
Reported-by: Ladislav Laska <laska@kam.mff.cuni.cz>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3944
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-23 21:11:09 +01:00
Joakim Nohlgård
668347e824 flash Kinetis: reduce a flash write message severity to info
There is nothing the user can do if their device does not support sector
programming, there is no reason to have this message at warning level.

Change-Id: Ic9b7386e59b64fece7fbfdc543bdfeeed3eae73d
Signed-off-by: Joakim Nohlgård <joakim.nohlgard@eistec.se>
Reviewed-on: http://openocd.zylin.com/4105
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2017-04-23 20:49:22 +01:00
Marc Schink
518fcd3883 target: Fix memory leak
Change-Id: Ib23dfd653d8edacb890a46179e9d437c027d58e8
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4048
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Chengyu Zheng <chengyu.zheng@polimi.it>
Reviewed-by: Andreas Färber <afaerber@suse.de>
2017-04-23 20:48:45 +01:00
Austin Morton
568e84236b stlink: increase trace buffer size to maximum allowed on st-link v2 firmware
Increasing the trace buffer size on the st-link itself gives openocd a greater
chance of avoiding trace data overflowing within the st-link between polls
when there is a large amount of data being sent over the trace port

The st-link appears to split the given buffer size in half
while one half is awaiting transfer over USB, the other half is being
filled by DMA transfer.  If you do not poll frequently enough, the DMA
transfer will overflow back to the start of its current buffer, resulting in
corrupted output

Buffer size of 4096 bytes is the maximum allowed by the st-link v2

Change-Id: I169189b021c34f8d18de1601d78b8c5890367d68
Signed-off-by: Austin Morton <austinpmorton@gmail.com>
Reviewed-on: http://openocd.zylin.com/4085
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-23 20:46:32 +01:00
Matthias Welwarsky
f605a23bc4 aarch64: add some documentation
document aarch64 specific commands and common ARMv7 and v8 DAP commands

Change-Id: Icbb76209735ec734f2e67f82bfc7270edb40ad0b
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4008
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-04-02 16:13:40 +01:00
Matthias Welwarsky
332d66c75a aarch64: clear CTI halt event early at debug entry
The halt event was left pending in the CTI, better to clear it immediately
after debug entry.

Change-Id: I6002f862681baf98769e3c73332a7f7f0ef938c1
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4030
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-04-02 16:08:18 +01:00
Andreas Fritiofson
2804480b09 nrf51: Remove pointer cast
Int may not be 32 bit long.

Change-Id: I420f7efeb484eb35c1d7c20e1575b0b31ed8c9ff
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3930
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-03-29 10:07:41 +01:00
Girts Folkmanis
6b2acc0243 arm_dpm: fix dpm setup
When ARM64 support was being merged, a comparison ended up being 
inverted. This causes NULL pointer access when target attempts to
use core cache.

Change-Id: Ic8873ddd13dbdd8100856a71b4717f44cd336e23
Signed-off-by: Girts Folkmanis <opensource@girts.me>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4042
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-03-06 09:58:43 +00:00
Matthias Welwarsky
77189db856 tcl: add Hi6220 target and LeMaker HiKey board config
configuration covers all 8 Cortex-A53 cores and auxiliary Cortex-M3
used for power management.

Change-Id: I5509f275aa669abe285f9152935ecdcbcd0c402e
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4009
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-02-24 09:54:46 +00:00
Matthias Welwarsky
9981093ce0 armv8_dpm: fix exception handling
after handling of an exception in debug state, immediately
restore the original core state.

Change-Id: Ie53b63c9f19815f717f4df4390fbc13f0a204cc2
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3996
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-02-24 09:50:14 +00:00
Matthias Welwarsky
b73628141a armv8_dpm: retrieve only necessary registers on halt
to speed up debugging, don't load the complete register context
on a halt event, load only those registers that might be
clobbered during debugging.

Change-Id: I0b58e97aad6f28aefce4a52e870af61e1ef1a44f
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3995
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-02-24 09:36:06 +00:00
Matthias Welwarsky
2861ed533b armv8: spelling and formatting updates
small changes to correct code formatting and spelling of some
log messages.

Change-Id: I645e675f8f9f4731b0271ddc55f64e8cf56ec1db
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3994
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-02-24 09:35:41 +00:00
Matthias Welwarsky
bf1efe05bb aarch64: run control rework
This patch contains a major overhaul of the target run control,
mainly for the sake of satisfying gdbs ideas of how a target
should respond to various control requests for the debugger.

The changes allow gdb a slightly better control on how cores
are stepped: a core can be single-stepped while 
other cores remain halted or continue normal execution 
until the single-stepped core halts again.

Also, on any halting event (user command or breakpoint) the
system is brought into a stable state with all cores halted
before the halt is signaled to the debugger.

This patch also transitions the target code to make use of the
new CTI abstraction instead of accessing CTI registers directly.

Change-Id: I8ddc9abb119e04580d671b57ee12240c3f5070a0
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3993
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-02-24 09:31:52 +00:00
Matthias Welwarsky
e513fe949b aarch64: clean up struct aarch64_common
remove some rarely or completely unused components.

Change-Id: Id285bb7075901016297fa173a874db7f11a840d7
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3992
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-02-24 09:30:43 +00:00
Matthias Welwarsky
257c434d3f aarch64: clean up target specific commands
- rename "cortex_a" command group to "aarch64"
- remove default blank check, checksum and algorithm hooks
  since they're not going to work in aarch64 mode anyway.



Change-Id: Ieb0046786ed9425baf6774c68f42a8285cc2aefd
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3991
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-02-24 09:27:52 +00:00
Matthias Welwarsky
d6535e0ce5 aarch64: reset fixes
Make sure all core register caches are invalidated on reset
assert, make sure to re-init debug registers on deassert.

Change-Id: I82350d04cc3eaae5e35245d13d6c1fb0a8d59807
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3990
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-02-24 09:17:22 +00:00
Matthias Welwarsky
6fb9f2e3ee armv8: factor out generic bit set/clr for debug registers
introduce armv8_set_dbgreg_bits() function to make register 
bit-field modifications easier to read.


Change-Id: I6b06f66262587fd301d848c9e0645e8327653de7
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3989
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-02-24 09:15:18 +00:00
Matthias Welwarsky
095ff3d210 armv8: load aarch32 register through aarch64 equivalent
The aarch32 register cache is only a separate view of the aarch64
registers. Load aarch32 registers through their aarch64 equivalents.

Change-Id: I3e932dfb782f03d73d30d942b24db340a5749e47
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3988
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-02-24 09:14:59 +00:00
Matthias Welwarsky
8b923532c1 aarch64: remove bogus address check before memory access
Mmu faults can not be prevented on aarch64, they need to be taken and
handled accordingly. Remove the remaining stub code.

Change-Id: I6241efa594fe6b963624f9628cdf1c8e46588223
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3987
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-02-24 09:14:32 +00:00
Matthias Welwarsky
9527d1e595 target: generic ARM CTI function wrapper
Not specific to ARMv8, the Cross Trigger Interface
deserves an independent access wrapper.

Change-Id: I84f8faad15ed3515e0fff7f6cc5d1109ef91a869
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3986
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-02-24 09:13:52 +00:00
Matthias Welwarsky
7ed0b6333d aarch64: optimize core state detection
Replace loop by right-shift.
Inspired by patch from Alamy Liu

Change-Id: I1285f4f54c0695a93fa42e9863ed8ffa4de00f70
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3985
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-02-24 09:13:10 +00:00
Matthias Welwarsky
fa8700cdd5 aarch64: reduce debug output to improve legibility
Suppress some very verbose LOG_DEBUG's that are not really useful
any more.

Change-Id: I67f10ba9510a9e34a027f378f4b62b8901ddc8a4
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3984
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-02-24 09:12:53 +00:00
Matthias Welwarsky
06ba5492df aarch64: remove mrs/msr functions from struct arm
No longer needed, no users.

Change-Id: I0cc82a0ef11e1b72101fa9145f014e5d5d76df0e
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3983
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-02-24 09:12:37 +00:00
Matthias Welwarsky
f988f59604 aarch64: refactor SCTLR manipulation
Reduce SLOCs in SCTLR retrieval and modification functions and make them
less complex.

Change-Id: Ida1a99c223743247f171b52eef80dc9886802101
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3982
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-02-24 09:12:23 +00:00
Matthias Welwarsky
5d00fd9d1d aarch64: fix software breakpoints when in aarch32 state
Use the correct opcode for Aarch32 state, both for the breakpoint
instruction itself and the cache handling functions.

Change-Id: I975fa67b1e577b54f5c672a01d516419c6a614b2
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3981
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-02-24 09:11:52 +00:00
Marc Schink
7c85165bc1 aarch64: Fix #include guards
Change-Id: I9445b04a210dcde5f8a7cf1560ef23eb53149178
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3975
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-02-15 12:48:18 +00:00
Karl Palsson
091c378728 flash/nor: avrf: support atmega128rfa1
Tested with a Dresden Elektronik deRFmega128 module.

Change-Id: I91da3b11b60e78755360b08453ed368d6d396651
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-on: http://openocd.zylin.com/2790
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-02-13 17:42:36 +00:00
Matthias Welwarsky
7c2dc138b3 aarch64: don't try resuming if target is not halted
At framework level, the resume hook is not protected. Make sure to
not attempt a resume if the target is not halted.

Change-Id: I4dd1975a95d6c513bd4f4e999e496bc11182a97a
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:18:35 +01:00
Matthias Welwarsky
beece50670 aarch64: don't segfault on reset when target is not examined
Basically port a fix that was already done for the cortex_a target.

Change-Id: I4cf4519159bda03ed611bc0b2e340a5dad2d85fe
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:18:35 +01:00
Matthias Welwarsky
9d2e8aabb8 aarch64: use cached value of dscr register where needed
Instead of supplying a local, preinitialized "dscr" variable, use the
cached value from arm_dpm, which is kept up-to-date anyway.

Change-Id: I06d548d4dc6db68b9d984c83ed026fa9069d7875
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:18:35 +01:00
Matthias Welwarsky
9166320663 aarch64: remove arm command chain from aarch64 target commands
arm commands are mostly unusable anyway, remove them. to be replaced
by aarch64 specific commands later

Change-Id: Ie994771bc0e86cff1c26f68f1f51ce8ec352a509
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:18:35 +01:00
Matthias Welwarsky
8f59ee3871 aarch64: remove "mrs <Xt>, currentel" opcode
"currentel" special register is not accessible in debug state.

Change-Id: I9022b01b423cd9ae8227ed018d6166078ba44832
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:18:35 +01:00
Matthias Welwarsky
2407721e14 aarch64: remove unused struct components
remove unused register index array from armv8_mode_data[]

Change-Id: I686c20eeb3da413f5e9ef6058e31ce939741afb4
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:18:35 +01:00
Matthias Welwarsky
7d537dc8e9 aarch64: improve debug output
Make debug and error messages more informative, fix spelling and
formatting errors

Change-Id: I7245f42c5153bcc95676270814d30e91c113aaed
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:18:35 +01:00
Matthias Welwarsky
822ebda674 aarch64: enlarge value buffer of arm_reg to store 64 bit
struct arm_reg::value[] must be 8 byte to hold a 64bit register value.

Change-Id: If253e90731d0ee855eafd9d7b63b91f84630cc7c
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:18:35 +01:00
Matthias Welwarsky
f7dbcc3fab aarch64: consolidate sticky error handling
Move clearing of DSCR "Sticky Error" condition to the
exception handling function. Clear once on entering debug state.

Change-Id: Iec1d09d6f2d9cdd7e92953da5ea19f3e399ca12c
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:18:35 +01:00
Matthias Welwarsky
9f4b5b509f aarch64: discard async aborts on entering debug state
recommended for Corte-A8 cores, not sure if necessary
for ARMv8 based cores as well.

Change-Id: Ibcb36170c5fac6a6b132de17f734c70a56919f9b
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:18:35 +01:00
Matthias Welwarsky
0a53bae0ea aarch64: cleanup context restore
Remove register cache invalidation and target state changes that are
handled appropriately in other functions.

Change-Id: Ic903f41ddc267f4b8765ea022bd4d6da1017e21f
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:18:35 +01:00
Matthias Welwarsky
ccb1199d49 aarch64: enable aarch32 debugging with arm gdb
When a PE is in Aarch32 state and gdb asks for a target description,
provide a register view compatible with the "org.gnu.gdb.arm.core"
feature. Only current-mode registers are exported, banked registers are
not visible.

Change-Id: I99a85d94831cf597fe8cff6a0a1818ce0a33613b
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:18:35 +01:00
Matthias Welwarsky
ba82230856 aarch64: allow reading TTBR register when halted in EL0
There's no access to TTBR in EL0. Circumvent by moving the PE to EL1
before reading, and switch back to original mode afterwards.

Change-Id: I22891b958d3d7e6fad1cb27183c192d975d63d89
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:18:35 +01:00
Matthias Welwarsky
05bf20d05a aarch64: make sure to enable HDE for all SMP PEs to be halted
When halting a group of PEs through CTI, HDE must be set in EDSCR for
all of them.

Change-Id: Iaa4bc0b0fe31e46a463c709d8274023225affd85
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:18:35 +01:00
Matthias Welwarsky
c30f8d6a07 aarch64: handle exceptions taken in debug state
When an armv8-a PE causes an exception while halted, e.g. by performing
a prohibited memory or register access, its state is affected in the
same way as if it was running. That means, a number of registers is
overwritten (notably DLR and DSPSR, but also others) and also
potentially the exception level and therefore also the PE state can
change. This state must be restored before resuming normal operation.

This is done by marking the relevant cached registers "dirty" so that
they are written back before resume.

Change-Id: I9b6967a62d7cb23a477a9f7839f8d2b7087eed09
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:18:35 +01:00
Matthias Welwarsky
62c2eb4b28 aarch64: cache identification for aarch32 state
Use proper T32 opcodes for cache identification when the PE is in
Aarch32 state

Change-Id: I9cd9169409889273a3fd61167f388e68d8dde86d
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:18:34 +01:00
Matthias Welwarsky
946958cb72 aarch64: fix mode switching
DCPS only allows to enter higher ELs, for lower ELs you need to
use DRPS. Also, of course the encoding differs between A64 and T32.
Both DCPS and DRPS also clobber DLR and DSPSR, which then need to be
restored on resume.

Change-Id: Ifa3dcfa94212702e57170bd59fd0bb25495fb6fd
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:18:34 +01:00
Matthias Welwarsky
79c4c22e15 aarch64: register access rewrite
All register access is now performed through common read/write
functions, which delegate the actual register access to the
armv8_common object. armv8_common contains function pointers
to direct read and write requests to the respective low-level
functions for each PE state.

The respective read/write functions are selected on debug state
entry.

At the same time, T32 opcodes are now formatted for ITR in
dpmv8_exec_opcode() and the T32_FMTITR macro is removed from global
visibility.

Change-Id: I9eaef017c7cc9e0c531e693c534901bfdbdb842c
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:18:34 +01:00
Matthias Welwarsky
2539a32308 aarch64: simplify armv8_read_ttbcr
Read registers based on current EL instead of PE mode.

Change-Id: I05d3219ac1bf8585e9f4f024a7e8599fea0913b6
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:18:34 +01:00
Matthias Welwarsky
a76e88daa6 aarch64: allow reading system control register when halted in EL0
There's no access to system control register in EL0. Circumvent by
moving the PE to EL1 before reading, and switch back to original mode
afterwards.

Change-Id: I309f4eea5597ffc88fc892e9bbb826982e8a44ec
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:18:34 +01:00
Matthias Welwarsky
675b0170f2 aarch64: simplify armv8_set_cpsr()
Translate from cpsr value to "enum arm_mode" by shifting up 4 bits and
filling the lowest nibble with 0xF.

Change-Id: Ic32186104b0c29578c4f6f99e04840ab88a0017b
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:18:34 +01:00
Matthias Welwarsky
2b56f4f656 aarch64: provide virt2phys command
Use AT commands to translate virtual to physical addresses based on
current MMU configuration.

Change-Id: I1bbd7d674c435541b617b17022fa9f7f0f01bdab
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:18:34 +01:00
Matthias Welwarsky
fc3ce94bba aarch64: slightly simplify breakpoint set function
Set HDE bit through helper function instead of manual mem_ap access.

Change-Id: I68c157870f3f3c47a875d425ade6e975d8075424
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:18:34 +01:00
Matthias Welwarsky
40ce7374d3 aarch64: remove bogus os_border calculation
The artificial "os_border" doesn't exist in aarch64 state and is wrong
for aarch32 state as well. Remove it.

Change-Id: I7c673a1404b03aa78dbd505e115fa3a93f7ca05f
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:18:34 +01:00
Matthias Welwarsky
b69750fd0d aarch64: armv8 cache functions update
Update cache identification to match functionality present in
armv7a_cache.c

Change-Id: I2dc4bee80f5a22b8728334d40331c183d1406f27
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:18:34 +01:00
Matthias Welwarsky
ef263a45a2 aarch64: refactor armv8 dpm
Move all DPM related functions from aarch64.c to armv8_dpm.c.

Change-Id: I43404ff5db414ae898787a523d3219e5bee44889
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:18:34 +01:00
Matthias Welwarsky
a9931e6a3c aarch64: add basic Aarch32 support
Add database for common, equivalent opcodes for Aarch32 and
Aarch64 execution states

Revisit all functions that access Aarch64 specific registers
or use Aarch64 opcodes and rewrite them to act depending on
current state of the core.

Add core register access functions for Aarch32 state

Add function to determine the core execution state without
reading DSPSR.

Change-Id: I345e9f6d682fb4ba454e4b1d16bb5e1b27570691
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:04:16 +01:00
Matthias Welwarsky
6b392dea66 aarch64: update smp halt and resume to better facilitate CTI
Set up CTI so that halt and resume requests get routed to all PEs in the
SMP group.

Change-Id: Ie92cfd3fe54632e5fdc049a6bf5b24b99451a8c9
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:39 +01:00
Matthias Welwarsky
c6ed75fb0e aarch64: add cache handling when setting/deleting soft breakpoints
Flush D-Cache before, flush D-Cache and invalidate I-Cache after
modifying the breakpoint location.

Change-Id: Id2e2f4f2545c062de7e27275f66857357496d4ae
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:39 +01:00
Matthias Welwarsky
e17d1d4dc8 aarch64: add cache handling functions
For now only D-Cache flush (Clean&Invalidate) and I-Cache
invalidate are implemented. That's enough for software breakpoints.

Change-Id: I8e96d645a230b51e3490403f4564e59ba6a76cf3
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:39 +01:00
Matthias Welwarsky
b430d0a152 aarch64: disable interrupts when stepping [WIP]
On live hardware, interrupts will happen while the core is
held for stepping. The next step will most of the time execute an
interrupt service instead of the next line of code, which is not
what you expect. Disable interrupts through DSCR before resuming
for a step, and re-enable them again after the step happened.

This should be made configurable, like on cortex_a target.

Change-Id: I94d8ffb58cf7579dedb66bc756b7eb6828b6e8e4
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:39 +01:00
Matthias Welwarsky
4246fac240 aarch64: use correct instruction for software breakpoints
External debuggers need to use HLT, not BRK. HLT generates a halting
debug event while BRK generates a debug exception for self-hosted
debugging.

Change-Id: I24024b83668107f73a14cc75d951134917269e5c
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:39 +01:00
Matthias Welwarsky
df7069af55 aarch64: report the correct reason for halting after singlestep
Don't report breakpoint as debug reason when halt is due to a
single-step event.

Change-Id: Ie6c3ca1e5427c73eb726a038301b6a29a47d1217
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:39 +01:00
Matthias Welwarsky
11bc04e00c aarch64: fix register list
According to gdb documentation, a register "cpsr" is expected if
aarch64 features are announced. Also, the value buffer must be
capable of holding a 64bit value (8 byte, not 4)

Change-Id: I7aec4e84fa87eadb26797acd0d16c988b9852616
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:39 +01:00
Matthias Welwarsky
18ab54b82a aarch64: fix duplication of register cache
Change-Id: Ib4422e39171f19eea3f0b5a86f9dccdbb7044265
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:39 +01:00
Matthias Welwarsky
1826f0af1c aarch64: remove code for AHB-AP support
Reduce complexity of memory access functions, anyway there are no ARMv8
platforms that actually contain an AHB-AP at all. while at it, fix
virt-to-phys function signatures to expect target_addr_t.

Change-Id: I55a369686f42993988b6323e5a77f38de12530a9
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:39 +01:00
Matthias Welwarsky
9cc8cfe1b8 aarch64: fix stepping from address
The step command optionally carries a resume address. In this case,
stepping should start not at the current PC, but at the given address.

Change-Id: Id5792a3745f470cf29efa90c63d65f33d36f6b25
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:39 +01:00
Matthias Welwarsky
ae7f2094c9 aarch64: remove references to armv7-r
aarch64 target doesn't support the -r profile anyway.

Change-Id: Iaa470ed9f95ea495ab1bafdf401f55a1ebcefddf
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:39 +01:00
Matthias Welwarsky
56ab6ab159 aarch64: fix armv8_set_core_reg when destination is cpsr
When armv8_set_core_reg is used to set the value of
the CPSR, also update the internal architecture state.

Change-Id: I5f6a2be6fde8d91ec3352d8ba23c4aa90eb02977
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:39 +01:00
Matthias Welwarsky
4afa32ece1 aarch64: unify armv7-a and armv8 debug entry decoding
Make DSCR_RUN_MODE() usable for armv8 and arm7 debug

Change-Id: Ib3ba3000d5b6aa03e590f3ca4969e677474eb12c
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:39 +01:00
Matthias Welwarsky
e8602889f9 aarch64: use correct A64 instructions for cache handling
Replace A32 MCR with proper A64 MSR opcodes

Change-Id: I64a60b17a58a26b199d2d1b2d5d91098e0c8cbd0
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:39 +01:00
Matthias Welwarsky
6c096b2234 aarch64: fix first examination
properly decode debug capabilities, remove superfluous register
accesses.

Change-Id: I2cca699b515262dd2a508d7be97826eb17b9c607
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:39 +01:00
Matthias Welwarsky
b273ec93c6 aarch64: correct display for aarch64 state
Aarch64 state has different PSTATE and exception level model.
Correct the printout e.g. in poll command.

Change-Id: I1820fd1836c7076ae0aa405fa335fd1a14a2e5b3
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:39 +01:00
Matthias Welwarsky
f442a530fa aarch64: use symbolic constant for register count
Aarch64 has 34 registers, but use ARMV8_LAST_REG instead of
raw integer constant.

Change-Id: I86481899ade74f27fc90eff9f367d444c03e535e
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:39 +01:00
Matthias Welwarsky
03861123d7 aarch64: remove armv7-a virt-to-phys code
Page table layout in aarch64 is very different from armv7-a layout.
Remove the incorrect handling, to be replaced correct armv8 code in a
later patch

Change-Id: I64c728a72a24f9f4177726ccc07a02a8ca0d56ce
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:39 +01:00
Matthias Welwarsky
667c1d0d16 aarch64: clear breakpoint value register on removal
Not only null control but also value of the breakpoint when it is
removed.

Change-Id: Id99c7e3644729c64e563f1fa8b0577f350be6a98
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky
42574b3a10 aarch64: correct breakpoint register offset
armv8 breakpoint register spacing is 16, not 4 as in armv7-a

Change-Id: I0d49d06878a0c9dab35cde478064e5366f01a8e0
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky
4314624669 aarch64: fix cache identification
Use correct instructions to access CLIDR, CSSELR and CCSIDR.

Change-Id: I319b96c03a44fdb59fcb18a00f816f6af0261f0a
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky
7eb95b1d72 aarch64: fix reading of translation table registers
Correctly access and parse aarch64 ttbcr.

Change-Id: I1b1652791a6b5200f58033925286292d838e8410
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky
d8abda4bd8 aarch64: fix entry into debug state
- armv8 EDSCR has no ITR_EN bit, ITR is always enabled. Writes to this
  bit are ignored but we should not do them anyway
- use dpmv8 function to report the reason for debug entry
- WFAR is a 64bit register

Change-Id: I07b81ecf105ceb7c3ae2f764bb408eb973c1d1de
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky
391109505f aarch64: use symbolic opcodes instead of hex values
Use opcode definitions from armv8_opcodes.h where appropriate

Change-Id: Iead33fb8e62eb2dd2419ef8932f7d46c087f51a8
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky
044e4b8108 aarch64: fix accesses to SCTLR_ELn register
The system control register has several instances, depending on the
exception level. Make sure to access always access the correct one.

Change-Id: I9e867f4dbd9625762042f20ed905064ea4e3270f
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky
f28d5ee71f aarch64: fix error recovery in aarch64_dpm_prepare
Flush DTRRX with a dummy read if it's full, clear sticky errors
by writing CSE bit to EDRCR register.

Change-Id: Ia42ae9d3859ba6cbe892d48584e21acdd4e25c84
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky
21a5c40430 aarch64: formalize use of CTI in halt and resume
Use configured CTI base address instead of hardcoded value, if
available.
Use symbolic constants instead of raw hex offsets.
Trim halt and resume code to what is actually necessary.

Change-Id: I4997c2bcca7cebf5ad78859a6a12abe8639594ed
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky
4ba8388f26 aarch64: fix context and hybrid hardware breakpoints
Fix 64bit address setting
Fix register spacing (16 instead of 4)
Set HMC bit for all but linked context match breakpoints,
where the bit is ignored anyway

Change-Id: I48428f39154a6fe5fadc075ca918d1500a0bb241
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky
b085570de9 aarch64: deconflict debug register names
CPUDBG_ -> CPUV8_DBG_ for armv8 debug registers.

Change-Id: I3d24cc209309fa9bbeb5c3e6c88a572383c9360e
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky
53573f7860 aarch64: Implement MA mode for bulk memory reads and writes
- 64bit addresses are supported
- Aarch32 state is supported

Change-Id: I8c37fa166954d09195d08c6963b8017194e350f5
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky
db97bb4a9d aarch64: make DCC read/write functions operate on struct armv8_common
Change the signature of aarch64_(read|write)_dcc[_64] to take a
"struct armv8_common *" as the context to operate on. No functional
change.

Change-Id: Ie501113f65ea22aff2eee173ec717f6908a63494
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky
a3b9e12aec aarch64: introduce dpm extension for ARMv8
Add or move ARMv8 related dpm function to their own source module

Change-Id: Id93d50be0b8635bd40ddb2a74fe8746ff840d736
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky
df32af234c target: add -ctibase config option in addition to -dbgbase
Some vendors don't fully populate the ROM table, e.g. BCM2357 (used in
Raspberry Pi 3) doesn't list CTI, however it is mandatory for halting
an ARMv8 core and therefore it's always present (and required),
regardless of the ROM table listing it or not.

Change-Id: Ia18a4f1b5b931ccd19805b188ebf737c837c6b54
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky
f2a271e264 aarch64: fix reading of MPIDR
read MPIDR register through correct MSR instruction.

Change-Id: I7e2d00c2871191c4168b177a7a809443b0db4c82
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky
ced4108d26 aarch64: add symbolic definitions for armv8 opcodes
To replace hexadecimal constants with descriptive names and increase
flexibility.

Change-Id: I6f7b6f045866ed8b9360f54b640ecdb307eebc51
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:26 +01:00
David Ung
6b554b3b0e aarch64: Correct target state for hardware step
When using hardware step for doing stepping, the existing DSCR records
the event as external debug request.  This will generate a SIGINT event
to GDB and causes it to stop the stepping process.
For aarch64, read DESR to check if the event is a hardware step and set
state to DBG_REASON_SINGLESTEP.
With this patch, GDB can now do source level stepping.

Change-Id: I1d06f819578c74b3ac17376c67f882adddea1f52
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 13:59:15 +01:00
David Ung
a12c15e21f aarch64: Enable resuming with address
Enable resuming to an address.

Change-Id: I29c7d3b56f6cbf8b3cd02c93733fc96f45000af3
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 13:58:05 +01:00
pierre Kuo
13d13b2e2a aarch64: Add instruction stepping support using hardware step
Use AARCH64's hardware step event to do stepping.

Change-Id: I2d029ceeadd381913d0c3355c8787b11dacff7f7
Signed-off-by: pierre Kuo <vichy.kuo@gmail.com>
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 13:57:29 +01:00
David Ung
5ee67ce024 aarch64: Enable halting debug mode on breakpoint set
Ensure that we allow halting debug mode after setting breakpoint

Change-Id: I6f0d7a4a4775a93c133fb1ec31dfe3324d9f7395
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 13:56:39 +01:00
pierre Kuo
236c9966dd aarch64: Add hardware breakpoint support
Enable the use of hardware breakpoint on AARCH64.

Change-Id: I59caaa6d92ac60278af8938625b1790a1787372f
Signed-off-by: pierre Kuo <vichy.kuo@gmail.com>
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 13:55:55 +01:00
David Ung
d376f7f518 aarch64: Add ARMv8 AARCH64 support files
Add new AARCH64 target and ARMv8 support files.
This is an instantiation from the cortex_a files but modified to support
64bit ARMv8. Not all features are complete, notably breakpts and single
stepping are not yet implemented.
Currently it lets you halt of the processors, resume, dump cpu
registers,
read/write memory and getting a stack trace with gdb.

> halt
invalid mode value encountered 5
target state: halted
unrecognized psr mode: 0x5
target halted in ARM state due to debug-request, current mode:
UNRECOGNIZED
cpsr: 0x600001c5 pc: 0x00093528
MMU: disabled, D-Cache: disabled, I-Cache: disabled

> targets
    TargetName         Type       Endian TapName            State
--  ------------------ ---------- ------ ------------------ ------------
 0* cpu0               aarch64    little cpu.dap            halted

> reg
===== arm v8 registers
(0) r0 (/64): 0x00000000FFFFFFED (dirty)
(1) r1 (/64): 0x00000000F76E4000
(2) r2 (/64): 0x0000000000000000
(3) r3 (/64): 0x0000000000010000
(4) r4 (/64): 0xFFFFFFC06E2939E1
(5) r5 (/64): 0x0000000000000018
(6) r6 (/64): 0x003A699CFB3C8480
(7) r7 (/64): 0x0000000053555555
(8) r8 (/64): 0x00FFFFFFFFFFFFFF
(9) r9 (/64): 0x000000001FFEF992
(10) r10 (/64): 0x0000000000000001
(11) r11 (/64): 0x0000000000000000
(12) r12 (/64): 0x00000000000000F0
(13) r13 (/64): 0x00000000EFDFEAC8
(14) r14 (/64): 0x00000000F6DDA659
(15) r15 (/64): 0x0000000000000000
(16) r16 (/64): 0xFFFFFFC0000F9094
(17) r17 (/64): 0x0000000000000000
(18) r18 (/64): 0x0000000000000000
(19) r19 (/64): 0xFFFFFFC00087C000
(20) r20 (/64): 0x0000000000000002
(21) r21 (/64): 0xFFFFFFC000867C28
(22) r22 (/64): 0xFFFFFFC000916A52
(23) r23 (/64): 0xFFFFFFC00116D8B0
(24) r24 (/64): 0xFFFFFFC000774A0C
(25) r25 (/64): 0x000000008007B000
(26) r26 (/64): 0x000000008007D000
(27) r27 (/64): 0xFFFFFFC000080450
(28) r28 (/64): 0x0000004080000000
(29) r29 (/64): 0xFFFFFFC00087FF20
(30) r30 (/64): 0xFFFFFFC000085114
(31) sp (/64): 0xFFFFFFC00087FF20
(32) pc (/64): 0xFFFFFFC000093528
(33) xPSR (/64): 0x00000000600001C5

And from gdb

(gdb) bt
 #0  cpu_do_idle () at /mnt/host/source/src/third_party/kernel/3.14/arch/arm64/mm/proc.S:87
 #1  0xffffffc000085114 in arch_cpu_idle () at /mnt/host/source/src/third_party/kernel/3.14/arch/arm64/kernel/process.c:107
 #2  0x0000000000000000 in ?? ()

Change-Id: Iccb1d15c7d8ace7b9e811dac3c9757ced4d0f618
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 13:54:49 +01:00
David Ung
84a0bb4a3c arm_dpm: Add 64bit register handling.
Add various function to read/write ARMv8 registers.

Change-Id: I16f2829bdd0e87b050a51e414ff675d5c21bcbae
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 13:54:01 +01:00
David Ung
9cbfc9feb3 arm_dpm: Add new state ARM_STATE_AARCH64
Add new enum ARM_STATE_AARCH64 to the list of possible states.

Change-Id: I3cb2df70f8d5803a63d8374bf3eb75de988e24f8
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 13:52:52 +01:00
David Ung
ea45db5c8a server: Allow 64 address to be send over GBD server
Accept 64 bit addresses from GDB read memory packet.
Also allow breakpoint/stepping addresses to take 64bit values.

Change-Id: I9bf7b44affe24839cf30897c55ad17fdd29edf14
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 13:51:00 +01:00
Dongxue Zhang
47b8cf8420 target: Add 64-bit target address support
Define a target_addr_t type to support 32-bit and 64-bit addresses at
the same time. Also define matching TARGET_PRI*ADDR format macros as
well as a convenient TARGET_ADDR_FMT.

In targets that are 32-bit (avr32, nds32, arm7/9/11, fm4, xmc1000)
be least invasive by leaving the formatting unchanged apart from the
type;
for generic code adopt TARGET_ADDR_FMT as unified address format.

Don't silently change gdb formatting here, leave that to later.

Add COMMAND_PARSE_ADDRESS() macro to abstract the address type.
Implement it using its own parse_target_addr() function, in the hopes
of catching pointer type mismatches better.

Add '--disable-target64' configure option to revert to previous 32-bit
target address behavior.

Change-Id: I2e91d205862ceb14f94b3e72a7e99ee0373a85d5
Signed-off-by: Dongxue Zhang <elta.era@gmail.com>
Signed-off-by: David Ung <david.ung.42@gmail.com>
[AF: Default to enabling (Paul Fertser), rename macros, simplify]
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 13:50:17 +01:00
Paul Fertser
0ecee83266 Restore normal development cycle
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
2017-01-23 00:46:51 +03:00
1269 changed files with 130174 additions and 24063 deletions

103
.github/workflows/snapshot.yml vendored Normal file
View File

@@ -0,0 +1,103 @@
# SPDX-License-Identifier: GPL-2.0-or-later
# Copyright (C) 2020 by Tarek BOUCHKATI <tarek.bouchkati@gmail.com>
on: push
name: OpenOCD Snapshot
jobs:
package:
runs-on: [ubuntu-18.04]
env:
DL_DIR: ../downloads
BUILD_DIR: ../build
steps:
- name: Install needed packages
run: sudo apt-get install autotools-dev autoconf automake libtool pkg-config cmake texinfo texlive g++-mingw-w64-i686
- uses: actions/checkout@v1
- run: ./bootstrap
- name: Prepare libusb1
env:
LIBUSB1_VER: 1.0.23
run: |
mkdir -p $DL_DIR && cd $DL_DIR
wget "https://github.com/libusb/libusb/releases/download/v${LIBUSB1_VER}/libusb-${LIBUSB1_VER}.tar.bz2"
tar -xjf libusb-${LIBUSB1_VER}.tar.bz2
echo "LIBUSB1_SRC=$PWD/libusb-${LIBUSB1_VER}" >> $GITHUB_ENV
- name: Prepare hidapi
env:
HIDAPI_VER: 0.9.0
run: |
mkdir -p $DL_DIR && cd $DL_DIR
wget "https://github.com/libusb/hidapi/archive/hidapi-${HIDAPI_VER}.tar.gz"
tar -xzf hidapi-${HIDAPI_VER}.tar.gz
cd hidapi-hidapi-${HIDAPI_VER}
./bootstrap
echo "HIDAPI_SRC=$PWD" >> $GITHUB_ENV
- name: Prepare libftdi
env:
LIBFTDI_VER: 1.4
run: |
mkdir -p $DL_DIR && cd $DL_DIR
wget "http://www.intra2net.com/en/developer/libftdi/download/libftdi1-${LIBFTDI_VER}.tar.bz2"
tar -xjf libftdi1-${LIBFTDI_VER}.tar.bz2
echo "LIBFTDI_SRC=$PWD/libftdi1-${LIBFTDI_VER}" >> $GITHUB_ENV
- name: Prepare capstone
env:
CAPSTONE_VER: 4.0.2
run: |
mkdir -p $DL_DIR && cd $DL_DIR
CAPSTONE_NAME=${CAPSTONE_VER}
CAPSTONE_FOLDER=capstone-${CAPSTONE_VER}
wget "https://github.com/aquynh/capstone/archive/${CAPSTONE_VER}.tar.gz"
tar -xzf ${CAPSTONE_VER}.tar.gz
echo "CAPSTONE_SRC=$PWD/capstone-${CAPSTONE_VER}" >> $GITHUB_ENV
- name: Package OpenOCD for windows
env:
MAKE_JOBS: 2
HOST: i686-w64-mingw32
LIBUSB1_CONFIG: --enable-shared --enable-static
HIDAPI_CONFIG: --enable-shared --disable-static --disable-testgui
LIBFTDI_CONFIG: "-DCMAKE_TOOLCHAIN_FILE='${{ env.LIBFTDI_SRC }}/cmake/Toolchain-i686-w64-mingw32.cmake' -DBUILD_TESTS:BOOL=off -DFTDIPP:BOOL=off -DPYTHON_BINDINGS:BOOL=off -DEXAMPLES:BOOL=off -DDOCUMENTATION:BOOL=off -DFTDI_EEPROM:BOOL=off"
CAPSTONE_CONFIG: "CAPSTONE_BUILD_CORE_ONLY=yes CAPSTONE_STATIC=yes CAPSTONE_SHARED=no"
run: |
# set snapshot tag
OPENOCD_TAG="`git tag --points-at HEAD`"
[ -z $OPENOCD_TAG ] && OPENOCD_TAG="`git rev-parse --short HEAD`"
# set env and call cross-build.sh
export OPENOCD_TAG=$OPENOCD_TAG
export OPENOCD_SRC=$PWD
export OPENOCD_CONFIG=""
mkdir -p $BUILD_DIR && cd $BUILD_DIR
bash $OPENOCD_SRC/contrib/cross-build.sh $HOST
# add missing dlls
cd $HOST-root/usr
cp `$HOST-gcc --print-file-name=libwinpthread-1.dll` ./bin/
cp `$HOST-gcc --print-file-name=libgcc_s_sjlj-1.dll` ./bin/
# prepare the artifact
ARTIFACT="openocd-${OPENOCD_TAG}-${HOST}.tar.gz"
tar -czf $ARTIFACT *
echo "ARTIFACT_NAME=$ARTIFACT" >> $GITHUB_ENV
echo "ARTIFACT_PATH=$PWD/$ARTIFACT" >> $GITHUB_ENV
- name: Publish OpenOCD packaged for windows
uses: actions/upload-artifact@v1
with:
name: ${{ env.ARTIFACT_NAME }}
path: ${{ env.ARTIFACT_PATH }}
- name: Get the upload URL for a release
id: get_release
if: startsWith(github.ref, 'refs/tags/')
uses: bruceadams/get-release@v1.2.0
env:
GITHUB_TOKEN: ${{ github.token }}
- name: Release OpenOCD packaged for windows
if: startsWith(github.ref, 'refs/tags/')
uses: actions/upload-release-asset@v1
env:
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
with:
upload_url: ${{ steps.get_release.outputs.upload_url }}
asset_path: ${{ env.ARTIFACT_PATH }}
asset_name: ${{ env.ARTIFACT_NAME }}
asset_content_type: application/gzip

6
.gitmodules vendored
View File

@@ -1,9 +1,9 @@
[submodule "tools/git2cl"]
path = tools/git2cl
url = http://repo.or.cz/r/git2cl.git
url = https://repo.or.cz/git2cl.git
[submodule "jimtcl"]
path = jimtcl
url = http://repo.or.cz/r/jimtcl.git
url = https://github.com/msteveb/jimtcl.git
[submodule "src/jtag/drivers/libjaylink"]
path = src/jtag/drivers/libjaylink
url = http://repo.or.cz/r/libjaylink.git
url = https://repo.or.cz/libjaylink.git

91
.travis.yml Normal file
View File

@@ -0,0 +1,91 @@
# SPDX-License-Identifier: GPL-2.0+
# Copyright Marek Vasut <marex@denx.de>
# OpenOCD on Travis CI - https://travis-ci.org/
sudo: required
dist: bionic
arch:
- amd64
- arm64
- ppc64le
- s390x
addons:
apt:
sources:
- sourceline: 'ppa:ubuntu-toolchain-r/test'
- sourceline: 'deb https://apt.llvm.org/bionic/ llvm-toolchain-bionic-9 main'
key_url: 'https://apt.llvm.org/llvm-snapshot.gpg.key'
packages:
- libftdi-dev
- libhidapi-dev
- libjaylink-dev
env:
- CC=gcc-9
- CC=clang-9
language: c
git:
depth: 1
autocrlf: input
script:
- $mingw64 ${CC} --version
- $mingw64 env
- $mingw64 ./bootstrap
- $mingw64 ./configure
- $mingw64 make
before_install:
- |-
case $TRAVIS_OS_NAME in
linux)
sudo apt install ${CC} libusb-1.0-0-dev
;;
osx)
brew install libtool automake libusb libusb-compat hidapi libftdi
;;
windows)
[[ ! -f C:/tools/msys64/msys2_shell.cmd ]] && rm -rf C:/tools/msys64
choco uninstall -y mingw
choco upgrade --no-progress -y msys2
export msys2='cmd //C RefreshEnv.cmd '
export msys2+='& set MSYS=winsymlinks:nativestrict '
export msys2+='& C:\\tools\\msys64\\msys2_shell.cmd -defterm -no-start'
export mingw64="$msys2 -mingw64 -full-path -here -c \$\* --"
export msys2+=" -msys2 -c \$\* --"
$msys2 pacman --sync --noconfirm --needed mingw-w64-x86_64-toolchain autoconf autoconf-archive automake automake-wrapper binutils gcc gettext git libtool m4 make pkg-config tcl texinfo mingw-w64-x86_64-libusb mingw-w64-x86_64-libusb-compat-git mingw-w64-x86_64-libjaylink-git mingw-w64-x86_64-libftdi mingw-w64-x86_64-hidapi mingw-w64-x86_64-clang
## FIXME: Also build for i686?
## Install more MSYS2 packages from https://packages.msys2.org/base here
taskkill //IM gpg-agent.exe //F # https://travis-ci.community/t/4967
export PATH=/C/tools/msys64/mingw64/bin:$PATH
export MAKE=mingw32-make # so that Autotools can find it
;;
esac
before_cache:
- |-
case $TRAVIS_OS_NAME in
windows)
# https://unix.stackexchange.com/a/137322/107554
$msys2 pacman --sync --clean --noconfirm
;;
esac
cache:
directories:
- $HOME/AppData/Local/Temp/chocolatey
- /C/tools/msys64
matrix:
include:
- os: osx
env:
- CC=clang
- os: windows
env:
- CC=gcc

View File

@@ -216,7 +216,7 @@ OPTIMIZE_OUTPUT_VHDL = NO
# .inc files as Fortran files (default is PHP), and .f files as C (default is Fortran),
# use: inc=Fortran f=C
EXTENSION_MAPPING =
EXTENSION_MAPPING = no_extension=C
# If you use STL classes (i.e. std::string, std::vector, etc.) but do not want
# to include (a tag file for) the STL sources as input, then you should
@@ -600,7 +600,7 @@ RECURSIVE = YES
# excluded from the INPUT source files. This way you can easily exclude a
# subdirectory from a directory tree whose root is specified with the INPUT tag.
EXCLUDE =
EXCLUDE = @srcdir@/src/jtag/drivers/libjaylink
# The EXCLUDE_SYMLINKS tag can be used select whether or not files or
# directories that are symbolic links (a Unix filesystem feature) are excluded
@@ -1234,7 +1234,7 @@ SEARCH_INCLUDES = YES
# contain include files that are not input files but should be processed by
# the preprocessor.
INCLUDE_PATH =
INCLUDE_PATH = @builddir@/src
# You can use the INCLUDE_FILE_PATTERNS tag to specify one or more wildcard
# patterns (like *.h and *.hpp) to filter out the header-files in the

81
HACKING
View File

@@ -1,13 +1,20 @@
// This file is part of the Doxygen Developer Manual
/** @page patchguide Patch Guidelines
\attention If you're behind a corporate wall with http only access to the
world, you can still use these instructions!
\attention You can't send patches to the mailing list anymore at all. Nowadays
you are expected to send patches to the OpenOCD Gerrit GIT server for a
review.
\attention If you already have a Gerrit account and want to try a
different sign in method, please first sign in as usually, press your
name in the upper-right corner, go to @a Settings, select @a
Identities pane, press <em>Link Another Identity</em> button. In case
you already have duplicated accounts, ask administrators for manual
merging.
\attention If you're behind a corporate wall with http only access to the
world, you can still use these instructions!
@section gerrit Submitting patches to the OpenOCD Gerrit server
OpenOCD is to some extent a "self service" open source project, so to
@@ -22,12 +29,58 @@ The procedure to create a patch is essentially:
- correct the patch and re-send it according to review feedback
Your patch (or commit) should be a "good patch": focus it on a single
issue, and make it be easily reviewable. Don't make
issue, and make it easily reviewable. Don't make
it so large that it's hard to review; split large
patches into smaller ones. (That can also help
track down bugs later on.) All patches should
patches into smaller ones (this will also help
to track down bugs later). All patches should
be "clean", which includes preserving the existing
coding style and updating documentation as needed.
coding style and updating documentation as needed. When adding a new
command, the corresponding documentation should be added to
@c doc/openocd.texi in the same commit. OpenOCD runs on both Little
Endian and Big Endian hosts so the code can't count on specific byte
ordering (in other words, must be endian-clean).
There are several additional methods of improving the quality of your
patch:
- Runtime testing with Valgrind Memcheck
This helps to spot memory leaks, undefined behaviour due to
uninitialized data or wrong indexing, memory corruption, etc.
- Clang Static Analyzer
Using this tool uncovers many different kinds of bugs in C code,
with problematic execution paths fully explained. It is a part of
standard Clang installation.
To generate a report, run this in the OpenOCD source directory:
@code
mkdir build-scanbuild; cd build-scanbuild
scan-build ../configure
scan-build make CFLAGS="-std=gnu99 -I. -I../../jimtcl"
@endcode
- Runtime testing with sanitizers
Both GCC and LLVM/Clang include advanced instrumentation options to
detect undefined behaviour and many kinds of memory
errors. Available with @c -fsanitize=* command arguments.
Example usage:
@code
mkdir build-sanitizers; cd build-sanitizers
../configure CC=clang CFLAGS="-fno-omit-frame-pointer \
-fsanitize=address -fsanitize=undefined -ggdb3"
make
export ASAN_OPTIONS=detect_stack_use_after_return=1
src/openocd -s ../tcl -f /path/to/openocd.cfg
@endcode
Please consider performing these additional checks where appropriate
(especially Clang Static Analyzer for big portions of new code) and
mention the results (e.g. "Valgrind-clean, no new Clang analyzer
warnings") in the commit message.
Say in the commit message if it's a bugfix (describe the bug) or a new
feature. Don't expect patches to merge immediately
@@ -69,18 +122,22 @@ to instruct git locally how to send off the changes.
-# Add a new remote to git using Gerrit username:
@code
git remote add review ssh://USERNAME@openocd.zylin.com:29418/openocd.git
git config remote.review.push HEAD:refs/publish/master
git config remote.review.push HEAD:refs/for/master
@endcode
Or with http only:
@code
git remote add review http://USERNAME@openocd.zylin.com/p/openocd.git
git config remote.review.push HEAD:refs/publish/master
git config remote.review.push HEAD:refs/for/master
@endcode
The http password is configured from your gerrit settings - http://openocd.zylin.com/#/settings/http-password.
\note If you want to simplify http access you can also add your http password to the url as follows:
@code
git remote add review http://USERNAME:PASSWORD@openocd.zylin.com/p/openocd.git
@endcode
\note All contributions should be pushed to @c refs/for/master on the
Gerrit server, even if you plan to use several local branches for different
topics. It is possible because @c for/master is not a traditional Git
branch.
-# You will need to install this hook, we will look into a better solution:
@code
scp -p -P 29418 USERNAME@openocd.zylin.com:hooks/commit-msg .git/hooks/
@@ -91,7 +148,7 @@ wget http://openocd.zylin.com/tools/hooks/commit-msg
mv commit-msg .git/hooks
chmod +x .git/hooks/commit-msg
@endcode
\note A script exists to simplify the two items above. execute:
\note A script exists to simplify the two items above. Execute:
@code
tools/initial.sh <username>
@endcode
@@ -103,7 +160,7 @@ git config --global user.email "john@smith.org"
@endcode
-# Work on your patches. Split the work into
multiple small patches that can be reviewed and
applied seperately and safely to the OpenOCD
applied separately and safely to the OpenOCD
repository.
@code
while(!done) {
@@ -148,7 +205,7 @@ Further reading: http://www.coreboot.org/Git
The code review is intended to take as long as a week or two to allow
maintainers and contributors who work on OpenOCD only in their spare
time oportunity to perform a review and raise objections.
time opportunity to perform a review and raise objections.
With Gerrit much of the urgency of getting things committed has been
removed as the work in progress is safely stored in Gerrit and

View File

@@ -6,8 +6,7 @@ AUTOMAKE_OPTIONS = gnu 1.6
DISTCHECK_CONFIGURE_FLAGS = --disable-install-jim
# do not run Jim Tcl tests (esp. during distcheck)
check-recursive:
@true
check-recursive: SUBDIRS :=
nobase_dist_pkgdata_DATA = \
contrib/libdcc/dcc_stdio.c \
@@ -43,13 +42,14 @@ if INTERNAL_JIMTCL
AM_CPPFLAGS += -I$(top_srcdir)/jimtcl \
-I$(top_builddir)/jimtcl
endif
EXTRA_DIST_NEWS != ls $(srcdir)/NEWS-*
EXTRA_DIST += \
BUGS \
HACKING \
NEWTAPS \
README.Windows \
README.OSX \
$(wildcard $(srcdir)/NEWS*) \
README.macOS \
$(EXTRA_DIST_NEWS) \
Doxyfile.in \
tools/logger.pl \
tools/rlink_make_speed_table \

327
NEWS
View File

@@ -2,149 +2,232 @@ This file includes highlights of the changes made in the OpenOCD
source archive release.
JTAG Layer:
* New driver for J-Link adapters based on libjaylink
(including support for FPGA configuration, SWO and EMUCOM)
* FTDI improvements to work at 30MHz clock
* BCM2835 native driver SWD and Raspberry Pi2 support
* BCM2835 is set to 4ma drive, slow slew rate
* ixo-usb-jtag (emulation of an Altera Bus Blaster I on
Cypress FX2 IC) support
* JTAG pass-through mode for CMSIS-DAP (including support for
FPGA configuration)
* OpenJTAG support for Cypress CY7C65215
* connect_assert_srst support for SWD
* Xilinx Virtex-II Series7 bitstream loading support
* Use JEP106 data to decode IDs
* Deprecated "ft2232" driver removed (use "ftdi" instead)
* GPL-incompatible FTDI D2XX library support dropped (Presto,
OpenJTAG and USB-Blaster I are using libftdi only now)
* ZY1000 support dropped (unmaintained since long)
* oocd_trace support dropped
* add debug level 4 for verbose I/O debug
* bitbang, add read buffer to improve performance
* Cadence SystemVerilog Direct Programming Interface (DPI) adapter driver
* CMSIS-DAP v2 (USB bulk based) adapter driver
* Cypress KitProg adapter driver
* FTDI FT232R sync bitbang adapter driver
* Linux GPIOD bitbang adapter driver through libgpiod
* Mellanox rshim USB or PCIe adapter driver
* Nuvoton Nu-Link and Nu-Link2 adapter drivers
* NXP IMX GPIO mmap based adapter driver
* ST-Link consolidate all versions in single config
* ST-Link read properly old USB serial numbers
* STLink/V3 support (for ST devices only !)
* STM8 SWIM transport
* TI XDS110 adapter driver
* Xilinx XVC/PCIe adapter driver
Boundary Scan:
Target Layer:
* ARMv7-A, Cortex-M, Cortex-A/R important fixes and
improvements (allowing e.g. simultaneous debugging of A8 and
M3 cores, JTAG WAIT support etc.)
* ARM Cortex-A,R allow interrupt disable during single-step
(maskisr command)
* Semihosting support for ARMv7-A
* ARM Cortex-M7 support
* Intel Quark mcu D2000 support
* Freescale LS102x SAP support
* ThreadX RTOS support on ARM926E-JS
* Cortex-M RTOS stack alignment fixes
* FreeRTOS FPU support
* uC/OS-III RTOS support
* bridging semihosting to GDB's File-I/O support
* -defer-examine option added to target create command
* verify_image_checksum command added
* 64 bit address support
* ARCv2 target support
* ARM Cortex-A hypervisor mode support
* ARM Cortex-M fast PC sampling support for profiling
* ARM generic CTI support
* ARM generic mem-ap target support
* ARMv7-A MMU tools
* ARMv7m traces add TCP stream server
* ARMv8 AARCH64 target support and semihosting support
* ARMv8 AARCH64 disassembler support through capstone library
* ARMv8-M target support
* EnSilica eSi-RISC target support, including instruction tracing
eSi-Trace support
* MIPS64 target support
* Motorola SREC S6 record image file support
* RISC-V target support
* SEGGER Real Time Transfer (RTT) initial support (for single target,
Cortex-M only)
* ST STM8 target support
* Various MIPS32 target improvements
Flash Layer:
* Atmel SAM4S, SAM4N, SAM4C support
* Atmel SAMV, SAMS, SAME (Cortex-M7) support
* Atmel AT91SAMD handle reset run/halt in DSU, other fixes
* Atmel AT91SAML21, SAML22, SAMC20/SAMC21, SAMD09 support
* ST STM32F4x support
* ST STM32F74x/76x/77x, STM32L4 support
* ST STM32L0 categories 1, 2 and 5 support
* Kinetis K02, K21, K22, K24, K26, K63, K64, K66 support
* Kinetis KE, KVx, K8x families support
* Kinetis FlexNVM handling
* Kinetis flash protection, security, mass_erase improvements
* Infineon XMC4xxx family support
* Infineon XMC1000 flash driver
* Energy Micro EFM32 Happy Gecko support
* Energy Micro EFM32 debug interface lock support
* Analog Devices ADuCM360 support
* Unified Nuvoton NuMicro flash driver
* NIIET K1921VK01T (Cortex-M4) support
* Nordic Semiconductor nRF51 improvements
* Spansion FM4 flash (including MB9BFx64/x65, S6E2DH) driver
* Ambiq Micro Apollo flash driver
* PIC32MX new device IDs, 17x/27x flash support
* read_bank() and verify_bank() NOR flash internal API to
allow reading (and verifying) non-memory-mapped devices
* JTAGSPI driver to access SPI NOR flashes via a trivial
FPGA proxy
* Milandr read/verify for Info memory support
* Atheros (ath79) SPI interface support
* Atmel atmega128rfa1 support
* Atmel SAM D21, D51, DA1, E51, E53, E54, G55, R30 support
* Atmel SAMC2?N* support
* Cypress PSoC5LP, PSoC6 support
* EnSilica eSi-RISC support
* Foshan Synwit Tech SWM050 support
* Maxim Integrated MAX32XXX support
* Nordic Semiconductor nRF51822, nRF52810, nRF52832 support
* NXP Kinetis K27, K28, KE1x, KEAx, KL28, KL8x, KV5x, KWx support
* Renesas RPC HF support
* SH QSPI support
* SiFive Freedom E support
* Silicon Labs EFR-family, EZR32HG support
* ST BlueNRG support
* ST STM32 QUAD/OCTO-SPI interface support for Flash, FRAM and EEPROM
* ST STM32F72x, STM32F4x3, STM32H7xx support
* ST STM32G0xx, STM32G4xx, STM32L4x, STM32WB, STM32WL support
* ST STM32L5x support (non secure mode)
* TI CC13xx, CC26xx, CC32xx support
* TI MSP432 support
* Winner Micro w600 support
* Xilinx XCF platform support
* Various discrete SPI NOR flashes support
* CFI 16-bit flash reversed endianness support
Board, Target, and Interface Configuration Scripts:
* Digilent JTAG-HS2, JTAG-HS3 interfaces configs
* FTDI UM232H module as JTAG interface config
* 100ask's OpenJTAG interface config
* MBFTDI interface config
* XDS100v3 interface config
* Freescale Vybrid VF6xx target config
* EmCraft VF6 SOM and baseboard configs
* Freescale SabreSD board config
* Freescale VF65GS10 tower board config
* Pipistrello Xilinx Spartan6 LX45 FPGA board config
* miniSpartan6+ board config
* Xilinx Kintex7 Development board config
* Parallella-I board config
* Digilent Atlys and Analog Discovery board configs
* Numato Opsis board config
* Xilinx Spartan 6 FPGA "Device DNA" reading support
* Altera 10M50 FPGA (MAX10 family) target config
* Altera EPM240 CPLD (MAXII family) target config
* Marsohod2, Marsohod3 FPGA, Marsohod CPLD boards configs
* Novena's integrated FPGA board config
* XMOS XS1-XAU8A-10's ARM core config
* XMOS xCORE-XA Core Module board config
* Exynos5250 target config
* Arndale board config
* FM4 MB9BFxxx family configs
* Spansion SK-FM4-U120-9B560 board config
* Diolan LPC4357-DB1 board config
* ST STM32F469 discovery board config
* ST STM32F7-DISCO, STM327[4|5]6G-EVAL boards configs
* ST STM32L4 discovery, NUCLEO L476RG, STM32F429I-DISC1 boards
configs
* Atheros AR2313, AR2315 targets config
* Netgear WP102 board config
* La Fonera FON2200 board config
* Linksys WAG200G board config
* LPC-Link2 board config
* NXP LPC4370 target config
* Atmel SAMV, SAMS, SAME target configs
* Atmel SAM E70 Xplained, SAM V71 Xplained Ultra boards
configs
* Nordic nRF52 target config
* Nordic nRF51-DK, nRF52-DK boards configs
* Infineon XMC4700 Relax Kit, XMC4800 Relax EtherCAT Kit,
XMC4300 Relax EtherCAT Kit boards configs
* Renesas S7G2 target config
* Renesas DK-S7G2 board config
* Altera EP3C10 FPGA (Cyclone III family) target config
* TI MSP432P4xx target config
* Cypress PSoC 5LP target config
* Analog Devices ADSP-SC58x target config (Cortex-A5 core only)
* 8devices LIMA board config
* Achilles Instant-Development Kit Arria 10 board config
* Amazon Kindle 2 and DX board config
* Analog Devices ADSP-SC58x, ADSP-SC584-EZBRD board config
* Andes Technology ADP-XC7KFF676 board config
* Andes Technology Corvette-F1 board config
* ARM Musca A board config
* Arty Spartan 7 FPGA board config
* Atmel SAMD10 Xplained mini board config
* Atmel SAMD11 Xplained Pro board config
* Atmel SAM G55 Xplained Pro board config
* AVNET UltraZED EG StarterKit board config
* Blue Pill STM32F103C8 board config
* DP Busblaster v4.1a board config
* DPTechnics DPT-Board-v1 board config
* Emcraft imx8 SOM BSB board config
* Globalscale ESPRESSObin board config
* Kasli board config
* Kintex Ultrascale XCKU040 board config
* Knovative KC-100 board config
* LeMaker HiKey board config
* Microchip (Atmel) SAME54 Xplained Pro board config
* Microchip (Atmel) SAML11 Xplained Pro board config
* Nordic module NRF52 board config
* Numato Lab Mimas A7 board config
* NXP Freedom FRDM-LS1012A board config
* NXP IMX7SABRE board config
* NXP IMX8MP-EVK board config
* NXP MC-IMX8M-EVK board config
* QuickLogic QuickFeather board config
* Renesas R-Car E2, H2, M2 board config
* Renesas R-Car Salvator-X(S) board config
* Renesas RZ/A1H GR-Peach board config
* Rigado BMD-300 board config
* Sayma AMC board config
* Sifive e31arty, e51arty, hifive1 board config
* ST B-L475E-IOT01A board config
* ST BlueNRG idb007v1, idb008v1, idb011v1 board config
* ST STM32F412g discovery board config
* ST STM32F413h discovery board config
* ST STM32F469i discovery board config
* ST STM32F7 Nucleo board config
* ST STM32F723e discovery board config
* ST STM32F746g discovery board config
* ST STM32F769i discovery board config
* ST STM32H735g discovery board config
* ST STM32H743zi Nucleo board config
* ST STM32H745i discovery board config
* ST STM32H747i discovery board config
* ST STM32H750b discovery board config
* ST STM32H7b3i discovery board config
* ST STM32H7x_dual_qspi board config
* ST STM32H7x3i Eval boards config
* ST STM32L073 Nucleo board config
* ST STM32L476g discovery board config
* ST STM32L496g discovery board config
* ST STM32L4p5g discovery board config
* ST STM32L4r9i discovery board config
* ST STM32L5 Nucleo board config
* ST STM32MP15x DK2 board config
* ST STM32WB Nucleo board config
* ST STM8L152R8 Nucleo board config
* Synopsys DesignWare ARC EM board config
* Synopsys DesignWare ARC HSDK board config
* TI BeagleBone family boards config
* TI CC13xx, CC26xx, CC32xx LaunchPad board config
* TI MSP432 LaunchPad board config
* Tocoding Poplar board config
* TP-Link WDR4300 board config
* Allwinner V3s target config
* Andes Technology NDS V5 target config
* Atmel atmega128rfa1 target config
* ARM corelink SSE-200 target config
* Atheros_ar9344 target config
* Cypress PSoC5LP, PSoC6 target config
* EnSilica eSi-RISC target config
* Foshan Synwit Tech SWM050 target config
* GigaDevice GD32VF103 target config
* Hisilicon Hi3798 target config
* Hisilicon Hi6220 target config
* Infineon TLE987x target config
* Marvell Armada 3700 target config
* Maxim Integrated MAX32XXX target config
* Mellanox BlueField target config
* Microchip (Atmel) SAME5x, SAML1x target config
* NXP IMX6SX, IMX6UL, IMX7, IMX7ULP, IMX8 target config
* NXP Kinetis KE1xZ, KE1xF target config
* NXP LPC84x, LPC8Nxx, LS1012A, NHS31xx target config
* Qualcomm QCA4531 target config
* QuickLogic EOS S3 target config
* Renesas R-Car E2, H2, M2 target config
* Renesas R-Car Gen3 target config
* Renesas RZ/A1H target config
* Rockchip RK3308 target config
* ST BlueNRG target config
* ST STM32G0, STM32G4, STM32H7, STM32L0, STM32L5 target config
* ST STM32MP15x target config
* ST STM32WBx, STM32WLEx target config
* ST STM8L152, S003, S103, S105 target config
* Synopsys DesignWare ARC EM target config
* Synopsys DesignWare ARC HS Development Kit SoC target config
* TI CC13xx, CC26xx, CC32xx target config
* TI TNETC4401 target config
* Xilinx UltraScale+ target config
* Altera 5M570Z (MAXV family) CPLD config
* Xilinx Ultrascale, XCF CPLD config
* Intel (Altera) Arria10 FPGA config
* Cadence SystemVerilog Direct Programming Interface (DPI) interface config
* Cypress KitProg interface config
* Digilent SMT2 NC interface config
* DLN-2 example of Linux GPIOD interface config
* FTDI C232HM interface config
* HIE JTAG Debugger interface config
* In-Circuit's ICprog interface config
* isodebug isolated JTAG/SWD+UART interface config
* Mellanox rshim USB or PCIe interface config
* Nuvoton Nu-Link interface config
* NXP IMX GPIO mmap based interface config
* Steppenprobe open hardware interface config
* TI XDS110 interface config
Server Layer:
* tcl_trace command for async target trace output via Tcl RPC
* 64 bit address support
* default bind to IPv4 localhost
* gdb: allow multiple connections
* gdb: architecture element support
* gdb: vCont, vRun support
* telnet: handle Ctrl+A, Ctrl+E and Ctrl+K
RTOS:
* Chromium-EC rtos support
* hwthread pseudo rtos support
* NuttX rtos support
* RIOT rtos support
Documentation:
* Improve STM32 flash driver
* Various typo fix and improvements
Build and Release:
* Various fixes thanks to http://coccinellery.org/
* libftdi is now autodetected with pkgconfig
* Releases should now support reproducible builds
* Conversion to non-recursive make, requires automake >= 1.14
* Udev rules modified to add uaccess tag and moved to
60-openocd.rules
* Support searching for scripts relative to the openocd binary
for all major architectures
* Add libutil to support jimtcl version 0.80
* Clang warning fixes
* GitHub workflow for Win32 snapshot binaries
* Handle Tcl return values consistently
* Mitigation for CVE-2018-5704: Prevent some forms of Cross
Protocol Scripting attacks
* Support for libftdi 1.5
* Travis-CI basic support
* Update libjaylink to version 0.2.0
* Update jimtcl to version 0.79
* Use external (optional) library capstone for ARM and AARCH64 disassembly
This release also contains a number of other important functional and
cosmetic bugfixes. For more details about what has changed since the
last release, see the git repository history:
http://sourceforge.net/p/openocd/code/ci/v0.10.0/log/?path=
http://sourceforge.net/p/openocd/code/ci/v0.11.0-rc2/log/?path=
For older NEWS, see the NEWS files associated with each release

155
NEWS-0.10.0 Normal file
View File

@@ -0,0 +1,155 @@
This file includes highlights of the changes made in the OpenOCD
source archive release.
JTAG Layer:
* New driver for J-Link adapters based on libjaylink
(including support for FPGA configuration, SWO and EMUCOM)
* FTDI improvements to work at 30MHz clock
* BCM2835 native driver SWD and Raspberry Pi2 support
* BCM2835 is set to 4ma drive, slow slew rate
* ixo-usb-jtag (emulation of an Altera Bus Blaster I on
Cypress FX2 IC) support
* JTAG pass-through mode for CMSIS-DAP (including support for
FPGA configuration)
* OpenJTAG support for Cypress CY7C65215
* connect_assert_srst support for SWD
* Xilinx Virtex-II Series7 bitstream loading support
* Use JEP106 data to decode IDs
* Deprecated "ft2232" driver removed (use "ftdi" instead)
* GPL-incompatible FTDI D2XX library support dropped (Presto,
OpenJTAG and USB-Blaster I are using libftdi only now)
* ZY1000 support dropped (unmaintained since long)
* oocd_trace support dropped
Boundary Scan:
Target Layer:
* ARMv7-A, Cortex-M, Cortex-A/R important fixes and
improvements (allowing e.g. simultaneous debugging of A8 and
M3 cores, JTAG WAIT support etc.)
* ARM Cortex-A,R allow interrupt disable during single-step
(maskisr command)
* Semihosting support for ARMv7-A
* ARM Cortex-M7 support
* Intel Quark mcu D2000 support
* Freescale LS102x SAP support
* ThreadX RTOS support on ARM926E-JS
* Cortex-M RTOS stack alignment fixes
* FreeRTOS FPU support
* uC/OS-III RTOS support
* bridging semihosting to GDB's File-I/O support
* -defer-examine option added to target create command
* verify_image_checksum command added
Flash Layer:
* Atmel SAM4S, SAM4N, SAM4C support
* Atmel SAMV, SAMS, SAME (Cortex-M7) support
* Atmel AT91SAMD handle reset run/halt in DSU, other fixes
* Atmel AT91SAML21, SAML22, SAMC20/SAMC21, SAMD09 support
* ST STM32F4x support
* ST STM32F74x/76x/77x, STM32L4 support
* ST STM32L0 categories 1, 2 and 5 support
* Kinetis K02, K21, K22, K24, K26, K63, K64, K66 support
* Kinetis KE, KVx, K8x families support
* Kinetis FlexNVM handling
* Kinetis flash protection, security, mass_erase improvements
* Infineon XMC4xxx family support
* Infineon XMC1000 flash driver
* Energy Micro EFM32 Happy Gecko support
* Energy Micro EFM32 debug interface lock support
* Analog Devices ADuCM360 support
* Unified Nuvoton NuMicro flash driver
* NIIET K1921VK01T (Cortex-M4) support
* Nordic Semiconductor nRF51 improvements
* Spansion FM4 flash (including MB9BFx64/x65, S6E2DH) driver
* Ambiq Micro Apollo flash driver
* PIC32MX new device IDs, 17x/27x flash support
* read_bank() and verify_bank() NOR flash internal API to
allow reading (and verifying) non-memory-mapped devices
* JTAGSPI driver to access SPI NOR flashes via a trivial
FPGA proxy
* Milandr read/verify for Info memory support
* Various discrete SPI NOR flashes support
* CFI 16-bit flash reversed endianness support
Board, Target, and Interface Configuration Scripts:
* Digilent JTAG-HS2, JTAG-HS3 interfaces configs
* FTDI UM232H module as JTAG interface config
* 100ask's OpenJTAG interface config
* MBFTDI interface config
* XDS100v3 interface config
* Freescale Vybrid VF6xx target config
* EmCraft VF6 SOM and baseboard configs
* Freescale SabreSD board config
* Freescale VF65GS10 tower board config
* Pipistrello Xilinx Spartan6 LX45 FPGA board config
* miniSpartan6+ board config
* Xilinx Kintex7 Development board config
* Parallella-I board config
* Digilent Atlys and Analog Discovery board configs
* Numato Opsis board config
* Xilinx Spartan 6 FPGA "Device DNA" reading support
* Altera 10M50 FPGA (MAX10 family) target config
* Altera EPM240 CPLD (MAXII family) target config
* Marsohod2, Marsohod3 FPGA, Marsohod CPLD boards configs
* Novena's integrated FPGA board config
* XMOS XS1-XAU8A-10's ARM core config
* XMOS xCORE-XA Core Module board config
* Exynos5250 target config
* Arndale board config
* FM4 MB9BFxxx family configs
* Spansion SK-FM4-U120-9B560 board config
* Diolan LPC4357-DB1 board config
* ST STM32F469 discovery board config
* ST STM32F7-DISCO, STM327[4|5]6G-EVAL boards configs
* ST STM32L4 discovery, NUCLEO L476RG, STM32F429I-DISC1 boards
configs
* Atheros AR2313, AR2315 targets config
* Netgear WP102 board config
* La Fonera FON2200 board config
* Linksys WAG200G board config
* LPC-Link2 board config
* NXP LPC4370 target config
* Atmel SAMV, SAMS, SAME target configs
* Atmel SAM E70 Xplained, SAM V71 Xplained Ultra boards
configs
* Nordic nRF52 target config
* Nordic nRF51-DK, nRF52-DK boards configs
* Infineon XMC4700 Relax Kit, XMC4800 Relax EtherCAT Kit,
XMC4300 Relax EtherCAT Kit boards configs
* Renesas S7G2 target config
* Renesas DK-S7G2 board config
* Altera EP3C10 FPGA (Cyclone III family) target config
* TI MSP432P4xx target config
* Cypress PSoC 5LP target config
* Analog Devices ADSP-SC58x target config (Cortex-A5 core only)
Server Layer:
* tcl_trace command for async target trace output via Tcl RPC
Documentation:
Build and Release:
* Various fixes thanks to http://coccinellery.org/
* libftdi is now autodetected with pkgconfig
* Releases should now support reproducible builds
* Conversion to non-recursive make, requires automake >= 1.14
* Udev rules modified to add uaccess tag and moved to
60-openocd.rules
* Support searching for scripts relative to the openocd binary
for all major architectures
This release also contains a number of other important functional and
cosmetic bugfixes. For more details about what has changed since the
last release, see the git repository history:
http://sourceforge.net/p/openocd/code/ci/v0.10.0/log/?path=
For older NEWS, see the NEWS files associated with each release
(i.e. NEWS-<version>).
For more information about contributing test reports, bug fixes, or new
features and device support, please read the new Developer Manual (or
the BUGS and PATCHES.txt files in the source archive).

View File

@@ -71,4 +71,3 @@ For older NEWS, see the NEWS files associated with each release
For more information about contributing test reports, bug fixes, or new
features and device support, please read the new Developer Manual (or
the BUGS and PATCHES.txt files in the source archive).

57
README
View File

@@ -42,7 +42,7 @@ e.g.:
openocd -f interface/ftdi/jtagkey2.cfg -c "transport select jtag" \
-f target/ti_calypso.cfg
openocd -f interface/stlink-v2-1.cfg -c "transport select hla_swd" \
openocd -f interface/stlink.cfg -c "transport select hla_swd" \
-f target/stm32l0.cfg
After OpenOCD startup, connect GDB with
@@ -101,33 +101,40 @@ Supported hardware
JTAG adapters
-------------
AICE, ARM-JTAG-EW, ARM-USB-OCD, ARM-USB-TINY, AT91RM9200, axm0432,
BCM2835, Bus Blaster, Buspirate, Chameleon, CMSIS-DAP, Cortino, DENX,
Digilent JTAG-SMT2, DLC 5, DLP-USB1232H, embedded projects, eStick,
FlashLINK, FlossJTAG, Flyswatter, Flyswatter2, Gateworks, Hoegl, ICDI,
ICEBear, J-Link, JTAG VPI, JTAGkey, JTAGkey2, JTAG-lock-pick, KT-Link,
Lisa/L, LPC1768-Stick, MiniModule, NGX, NXHX, OOCDLink, Opendous,
OpenJTAG, Openmoko, OpenRD, OSBDM, Presto, Redbee, RLink, SheevaPlug
devkit, Stellaris evkits, ST-LINK (SWO tracing supported),
STM32-PerformanceStick, STR9-comStick, sysfsgpio, TUMPA, Turtelizer,
ULINK, USB-A9260, USB-Blaster, USB-JTAG, USBprog, VPACLink, VSLLink,
Wiggler, XDS100v2, Xverve.
AICE, ARM-JTAG-EW, ARM-USB-OCD, ARM-USB-TINY, AT91RM9200, axm0432, BCM2835,
Bus Blaster, Buspirate, Cadence DPI, Chameleon, CMSIS-DAP, Cortino,
Cypress KitProg, DENX, Digilent JTAG-SMT2, DLC 5, DLP-USB1232H,
embedded projects, eStick, FlashLINK, FlossJTAG, Flyswatter, Flyswatter2,
FTDI FT232R, Gateworks, Hoegl, ICDI, ICEBear, J-Link, JTAG VPI, JTAGkey,
JTAGkey2, JTAG-lock-pick, KT-Link, Linux GPIOD, Lisa/L, LPC1768-Stick,
Mellanox rshim, MiniModule, NGX, Nuvoton Nu-Link, Nu-Link2, NXHX, NXP IMX GPIO,
OOCDLink, Opendous, OpenJTAG, Openmoko, OpenRD, OSBDM, Presto, Redbee,
Remote Bitbang, RLink, SheevaPlug devkit, Stellaris evkits,
ST-LINK (SWO tracing supported), STM32-PerformanceStick, STR9-comStick,
sysfsgpio, TI XDS110, TUMPA, Turtelizer, ULINK, USB-A9260, USB-Blaster,
USB-JTAG, USBprog, VPACLink, VSLLink, Wiggler, XDS100v2, Xilinx XVC/PCIe,
Xverve.
Debug targets
-------------
ARM11, ARM7, ARM9, AVR32, Cortex-A, Cortex-R, Cortex-M, LS102x-SAP,
Feroceon/Dragonite, DSP563xx, DSP5680xx, FA526, MIPS EJTAG, NDS32,
XScale, Intel Quark.
ARM: AArch64, ARM11, ARM7, ARM9, Cortex-A/R (v7-A/R), Cortex-M (ARMv{6/7/8}-M),
FA526, Feroceon/Dragonite, XScale.
ARCv2, AVR32, DSP563xx, DSP5680xx, EnSilica eSi-RISC, EJTAG (MIPS32, MIPS64),
Intel Quark, LS102x-SAP, NDS32, RISC-V, ST STM8.
Flash drivers
-------------
ADUC702x, AT91SAM, AVR, CFI, DSP5680xx, EFM32, EM357, FM3, FM4, Kinetis,
LPC8xx/LPC1xxx/LPC2xxx/LPC541xx, LPC2900, LPCSPIFI, Marvell QSPI,
Milandr, NIIET, NuMicro, PIC32mx, PSoC4, SiM3x, Stellaris, STM32, STMSMI,
STR7x, STR9x, nRF51; NAND controllers of AT91SAM9, LPC3180, LPC32xx,
i.MX31, MXC, NUC910, Orion/Kirkwood, S3C24xx, S3C6400, XMC1xxx, XMC4xxx.
ADUC702x, AT91SAM, AT91SAM9 (NAND), ATH79, ATmega128RFA1, Atmel SAM, AVR, CFI,
DSP5680xx, EFM32, EM357, eSi-RISC, eSi-TSMC, EZR32HG, FM3, FM4, Freedom E SPI,
i.MX31, Kinetis, LPC8xx/LPC1xxx/LPC2xxx/LPC541xx, LPC2900, LPC3180, LPC32xx,
LPCSPIFI, Marvell QSPI, MAX32, Milandr, MXC, NIIET, nRF51, nRF52 , NuMicro,
NUC910, Orion/Kirkwood, PIC32mx, PSoC4/5LP/6, Renesas RPC HF and SH QSPI,
S3C24xx, S3C6400, SiM3x, SiFive Freedom E, Stellaris, ST BlueNRG, STM32,
STM32 QUAD/OCTO-SPI for Flash/FRAM/EEPROM, STMSMI, STR7x, STR9x, SWM050,
TI CC13xx, TI CC26xx, TI CC32xx, TI MSP432, Winner Micro w600, Xilinx XCF,
XMC1xxx, XMC4xxx.
==================
@@ -215,7 +222,7 @@ Additionally, for building from git:
- autoconf >= 2.64
- automake >= 1.14
- texinfo
- texinfo >= 5.0
USB-based adapters depend on libusb-1.0 and some older drivers require
libusb-0.1 or libusb-compat-0.1. A compatible implementation, such as
@@ -276,18 +283,22 @@ e.g. for cross-building for Windows 32-bit with MinGW on Debian:
To make pkg-config work nicely for cross-compiling, you might need an
additional wrapper script as described at
http://www.flameeyes.eu/autotools-mythbuster/pkgconfig/cross-compiling.html
https://autotools.io/pkgconfig/cross-compiling.html
This is needed to tell pkg-config where to look for the target
libraries that OpenOCD depends on. Alternatively, you can specify
*_CFLAGS and *_LIBS environment variables directly, see "./configure
--help" for the details.
For a more or less complete script that does all this for you, see
contrib/cross-build.sh
Parallel Port Dongles
---------------------
If you want to access the parallel port using the PPDEV interface you
have to specify both --enable-parport AND --enable-parport-ppdev, since the
have to specify both --enable-parport AND --enable-parport-ppdev, since
the later option is an option to the parport driver.
The same is true for the --enable-parport-giveio option, you have to

View File

@@ -1,10 +1,10 @@
Building OpenOCD for OSX
------------------------
Building OpenOCD for macOS
--------------------------
There are a few prerequisites you will need first:
- Xcode 5 (install from the AppStore)
- Command Line Tools (install from Xcode 5 -> Preferences -> Downloads)
- Xcode (install from the AppStore)
- Command Line Tools (install from Xcode -> Preferences -> Downloads)
- Gentoo Prefix (http://www.gentoo.org/proj/en/gentoo-alt/prefix/bootstrap.xml)
or
- Homebrew (http://mxcl.github.io/homebrew/)
@@ -12,6 +12,11 @@ There are a few prerequisites you will need first:
- MacPorts (http://www.macports.org/install.php)
If you're building manually you need Texinfo version 5.0 or later. The
simplest way to get it is to use Homebrew (brew install texinfo) and
then ``export PATH=/usr/local/opt/texinfo/bin:$PATH``.
With Gentoo Prefix you can build the release version or the latest
devel version (-9999) the usual way described in the Gentoo
documentation. Alternatively, install the prerequisites and build

38
TODO
View File

@@ -37,11 +37,33 @@ This section provides possible things to improve with OpenOCD's TCL support.
- See src/jtag/core.c and src/jtag/tcl.c for an example.
- allow some of these TCL command modules to be dynamically loadable?
@section thelistjtag JTAG
@section thelistadapter Adapter
This section list issues that need to be resolved in the JTAG layer.
This section list issues that need to be resolved in the Adapter layer.
@subsection thelistjtagcore JTAG Core
@subsection thelistadapterrework Code restructuring
This section lists pending reworks to complete the restructure from the
old JTAG centric implementation to a generic Adapter layer.
This restructuring is very invasive and will prevent the merge of several
changes pending in gerrit.
- rename folder src/jtag/ to src/adapter/
- rename var "jtag" to "adapter" in src/jtag/core.c
- split content of src/adapter/ in the different protocols jtag.[ch],
swd.[ch], ...
- wrap the calls to adapter->transport_ops->api() with transport_api()
and reduce the visibility of global var "adapter"
- complete the migration of JTAG-only drivers to adapter->reset()
- try to remove JTAG_SLEEP also from JTAG mode?
- tap_set_state(TAP_RESET) is already done in src/jtag/core.c. No need
to replicate it in the drivers, apart in case the driver sets TRST
independently
- add .hla_ops to "adapter"
- HLA is a API level (.hla_ops). Transport should simply be {jtag,swd},
not {hla_jtag,hla_swd}.
@subsection thelistadapterjtagcore JTAG Core
The following tasks have been suggested for cleaning up the JTAG layer:
@@ -63,9 +85,9 @@ The following tasks have been suggested for adding new core JTAG support:
- (ab)use bit-banging JTAG interfaces to emulate SPI/UART
- allow SPI to program flash, MCUs, etc.
@subsection thelistjtaginterfaces JTAG Interfaces
@subsection thelistadapterinterfaces Interface drivers
There are some known bugs to fix in JTAG adapter drivers:
There are some known bugs to fix in Interface drivers:
- For JTAG_STATEMOVE to TAP_RESET, all drivers must ignore the current
recorded state. The tap_get_state() call won't necessarily return
@@ -107,10 +129,6 @@ of a minidriver is required to capture all the jtag_add_xxx()
fn's at a high enough level and repackage these cmd's as
TCP/IP packets handled by the server.
@section thelistswd Serial Wire Debug
- implement Serial Wire Debug interface
@section thelistbs Boundary Scan Support
- add STAPL support?
@@ -365,7 +383,6 @@ to complete:
- committing to git
- Review Users' Guide for documentation errors or omissions
- "capture" and "ocd_find" commands
- "ocd_" prefix on various stuff
- Update Developer's Manual (doxygen output)
- Add documentation describing the architecture of each module
- Provide more Technical Primers to bootstrap contributor knowledge
@@ -374,4 +391,3 @@ to complete:
/** @file
This file contains the @ref thelist page.
*/

View File

@@ -24,11 +24,12 @@ fi
# bootstrap the autotools
(
set -x
aclocal
aclocal --warnings=all
# Apparently, not all versions of libtoolize support option --warnings=all .
${libtoolize} --automake --copy
autoconf
autoheader
automake --gnu --add-missing --copy
autoconf --warnings=all
autoheader --warnings=all
automake --warnings=all --gnu --add-missing --copy
)
if [ -n "$SKIP_SUBMODULE" ]; then

View File

@@ -1,7 +1,8 @@
AC_PREREQ(2.64)
AC_INIT([openocd], [0.10.0],
AC_INIT([openocd], [0.11.0-rc2],
[OpenOCD Mailing List <openocd-devel@lists.sourceforge.net>])
AC_CONFIG_SRCDIR([src/openocd.c])
AC_CONFIG_AUX_DIR([.])
m4_include([config_subdir.m4])dnl
@@ -22,9 +23,10 @@ AH_BOTTOM([
#include <helper/replacements.h>
])
AC_LANG_C
AC_LANG([C])
AC_PROG_CC
AC_PROG_CC_C99
# autoconf 2.70 obsoletes AC_PROG_CC_C99 and includes it in AC_PROG_CC
m4_version_prereq([2.70],[],[AC_PROG_CC_C99])
AM_PROG_CC_C_O
AC_PROG_RANLIB
PKG_PROG_PKG_CONFIG([0.23])
@@ -34,7 +36,7 @@ m4_defun([_LT_AC_LANG_CXX_CONFIG], [:])
m4_defun([_LT_AC_LANG_F77_CONFIG], [:])
m4_defun([_LT_AC_LANG_GCJ_CONFIG], [:])
AC_DISABLE_SHARED
AC_PROG_LIBTOOL
LT_INIT
AC_SUBST([LIBTOOL_DEPS])
dnl configure checks required for Jim files (these are obsolete w/ C99)
@@ -43,6 +45,7 @@ AC_TYPE_LONG_LONG_INT
AC_SEARCH_LIBS([ioperm], [ioperm])
AC_SEARCH_LIBS([dlopen], [dl])
AC_SEARCH_LIBS([openpty], [util])
AC_CHECK_HEADERS([sys/socket.h])
AC_CHECK_HEADERS([elf.h])
@@ -78,7 +81,6 @@ AC_CHECK_HEADERS([arpa/inet.h ifaddrs.h netinet/in.h netinet/tcp.h net/if.h], []
AC_HEADER_ASSERT
AC_HEADER_STDBOOL
AC_HEADER_TIME
AC_C_BIGENDIAN
@@ -110,14 +112,15 @@ m4_define([ADAPTER_OPT], [m4_translit(ADAPTER_ARG($1), [_], [-])])
m4_define([USB1_ADAPTERS],
[[[ftdi], [MPSSE mode of FTDI based devices], [FTDI]],
[[stlink], [ST-Link JTAG Programmer], [HLADAPTER_STLINK]],
[[stlink], [ST-Link Programmer], [HLADAPTER_STLINK]],
[[ti_icdi], [TI ICDI JTAG Programmer], [HLADAPTER_ICDI]],
[[ulink], [Keil ULINK JTAG Programmer], [ULINK]],
[[usb_blaster_2], [Altera USB-Blaster II Compatible], [USB_BLASTER_2]],
[[vsllink], [Versaloon-Link JTAG Programmer], [VSLLINK]]])
m4_define([USB_ADAPTERS],
[[[osbdm], [OSBDM (JTAG only) Programmer], [OSBDM]],
[[ft232r], [Bitbang mode of FT232R based devices], [FT232R]],
[[vsllink], [Versaloon-Link JTAG Programmer], [VSLLINK]],
[[xds110], [TI XDS110 Debug Probe], [XDS110]],
[[cmsis_dap_v2], [CMSIS-DAP v2 Compliant Debugger], [CMSIS_DAP_USB]],
[[osbdm], [OSBDM (JTAG only) Programmer], [OSBDM]],
[[opendous], [eStick/opendous JTAG Programmer], [OPENDOUS]],
[[aice], [Andes JTAG Programmer], [AICE]]])
@@ -127,16 +130,30 @@ m4_define([USB0_ADAPTERS],
[[armjtagew], [Olimex ARM-JTAG-EW Programmer], [ARMJTAGEW]]])
m4_define([HIDAPI_ADAPTERS],
[[[cmsis_dap], [CMSIS-DAP Compliant Debugger], [CMSIS_DAP]]])
[[[cmsis_dap], [CMSIS-DAP Compliant Debugger], [CMSIS_DAP_HID]],
[[nulink], [Nu-Link Programmer], [HLADAPTER_NULINK]]])
m4_define([HIDAPI_USB1_ADAPTERS],
[[[kitprog], [Cypress KitProg Programmer], [KITPROG]]])
m4_define([LIBFTDI_ADAPTERS],
[[[usb_blaster], [Altera USB-Blaster Compatible], [USB_BLASTER]],
[[presto], [ASIX Presto Adapter], [PRESTO]],
[[openjtag], [OpenJTAG Adapter], [OPENJTAG]]])
[[presto], [ASIX Presto Adapter], [PRESTO]]])
m4_define([LIBFTDI_USB1_ADAPTERS],
[[[openjtag], [OpenJTAG Adapter], [OPENJTAG]]])
m4_define([LIBGPIOD_ADAPTERS],
[[[linuxgpiod], [Linux GPIO bitbang through libgpiod], [LINUXGPIOD]]])
m4_define([LIBJAYLINK_ADAPTERS],
[[[jlink], [SEGGER J-Link Programmer], [JLINK]]])
m4_define([PCIE_ADAPTERS],
[[[xlnx_pcie_xvc], [Xilinx XVC/PCIe], [XLNX_PCIE_XVC]]])
m4_define([OPTIONAL_LIBRARIES],
[[[capstone], [Use Capstone disassembly framework], []]])
AC_ARG_ENABLE([doxygen-html],
AS_HELP_STRING([--disable-doxygen-html],
@@ -167,7 +184,6 @@ AC_ARG_ENABLE([werror],
[gcc_werror=$enableval], [gcc_werror=$gcc_warnings])
# set default verbose options, overridden by following options
debug_jtag_io=no
debug_usb_io=no
debug_usb_comms=no
@@ -175,16 +191,10 @@ AC_ARG_ENABLE([verbose],
AS_HELP_STRING([--enable-verbose],
[Enable verbose JTAG I/O messages (for debugging).]),
[
debug_jtag_io=$enableval
debug_usb_io=$enableval
debug_usb_comms=$enableval
], [])
AC_ARG_ENABLE([verbose_jtag_io],
AS_HELP_STRING([--enable-verbose-jtag-io],
[Enable verbose JTAG I/O messages (for debugging).]),
[debug_jtag_io=$enableval], [])
AC_ARG_ENABLE([verbose_usb_io],
AS_HELP_STRING([--enable-verbose-usb-io],
[Enable verbose USB I/O messages (for debugging)]),
@@ -195,12 +205,6 @@ AC_ARG_ENABLE([verbose_usb_comms],
[Enable verbose USB communication messages (for debugging)]),
[debug_usb_comms=$enableval], [])
AC_MSG_CHECKING([whether to enable verbose JTAG I/O messages]);
AC_MSG_RESULT([$debug_jtag_io])
AS_IF([test "x$debug_jtag_io" = "xyes"], [
AC_DEFINE([_DEBUG_JTAG_IO_],[1], [Print verbose JTAG I/O messages])
])
AC_MSG_CHECKING([whether to enable verbose USB I/O messages]);
AC_MSG_RESULT([$debug_usb_io])
AS_IF([test "x$debug_usb_io" = "xyes"], [
@@ -229,6 +233,10 @@ AC_ARG_ENABLE([dummy],
AS_HELP_STRING([--enable-dummy], [Enable building the dummy port driver]),
[build_dummy=$enableval], [build_dummy=no])
AC_ARG_ENABLE([rshim],
AS_HELP_STRING([--enable-rshim], [Enable building the rshim driver]),
[build_rshim=$enableval], [build_rshim=no])
m4_define([AC_ARG_ADAPTERS], [
m4_foreach([adapter], [$1],
[AC_ARG_ENABLE(ADAPTER_OPT([adapter]),
@@ -240,10 +248,12 @@ m4_define([AC_ARG_ADAPTERS], [
AC_ARG_ADAPTERS([
USB1_ADAPTERS,
USB_ADAPTERS,
USB0_ADAPTERS,
HIDAPI_ADAPTERS,
HIDAPI_USB1_ADAPTERS,
LIBFTDI_ADAPTERS,
LIBFTDI_USB1_ADAPTERS
LIBGPIOD_ADAPTERS,
LIBJAYLINK_ADAPTERS
],[auto])
@@ -265,6 +275,10 @@ AC_ARG_ENABLE([jtag_vpi],
AS_HELP_STRING([--enable-jtag_vpi], [Enable building support for JTAG VPI]),
[build_jtag_vpi=$enableval], [build_jtag_vpi=no])
AC_ARG_ENABLE([jtag_dpi],
AS_HELP_STRING([--enable-jtag_dpi], [Enable building support for JTAG DPI]),
[build_jtag_dpi=$enableval], [build_jtag_dpi=no])
AC_ARG_ENABLE([amtjtagaccel],
AS_HELP_STRING([--enable-amtjtagaccel], [Enable building the Amontec JTAG-Accelerator driver]),
[build_amtjtagaccel=$enableval], [build_amtjtagaccel=no])
@@ -281,6 +295,20 @@ AC_ARG_ENABLE([ioutil],
AS_HELP_STRING([--enable-ioutil], [Enable ioutil functions - useful for standalone OpenOCD implementations]),
[build_ioutil=$enableval], [build_ioutil=no])
AS_CASE(["${host_cpu}"],
[arm*|aarch64], [
AC_ARG_ENABLE([bcm2835gpio],
AS_HELP_STRING([--enable-bcm2835gpio], [Enable building support for bitbanging on BCM2835 (as found in Raspberry Pi)]),
[build_bcm2835gpio=$enableval], [build_bcm2835gpio=no])
AC_ARG_ENABLE([imx_gpio],
AS_HELP_STRING([--enable-imx_gpio], [Enable building support for bitbanging on NXP IMX processors]),
[build_imx_gpio=$enableval], [build_imx_gpio=no])
],
[
build_bcm2835gpio=no
build_imx_gpio=no
])
AS_CASE(["${host_cpu}"],
[arm*], [
AC_ARG_ENABLE([ep93xx],
@@ -290,15 +318,10 @@ AS_CASE(["${host_cpu}"],
AC_ARG_ENABLE([at91rm9200],
AS_HELP_STRING([--enable-at91rm9200], [Enable building support for AT91RM9200 based SBCs]),
[build_at91rm9200=$enableval], [build_at91rm9200=no])
AC_ARG_ENABLE([bcm2835gpio],
AS_HELP_STRING([--enable-bcm2835gpio], [Enable building support for bitbanging on BCM2835 (as found in Raspberry Pi)]),
[build_bcm2835gpio=$enableval], [build_bcm2835gpio=no])
],
[
build_ep93xx=no
build_at91rm9200=no
build_bcm2835gpio=no
])
AC_ARG_ENABLE([gw16012],
@@ -318,12 +341,31 @@ AC_ARG_ENABLE([sysfsgpio],
AS_HELP_STRING([--enable-sysfsgpio], [Enable building support for programming driven via sysfs gpios.]),
[build_sysfsgpio=$enableval], [build_sysfsgpio=no])
AC_ARG_ENABLE([xlnx_pcie_xvc],
AS_HELP_STRING([--enable-xlnx-pcie-xvc], [Enable building support for Xilinx XVC/PCIe.]),
[build_xlnx_pcie_xvc=$enableval], [build_xlnx_pcie_xvc=no])
AS_CASE([$host_os],
[linux*], [],
[
AS_IF([test "x$build_sysfsgpio" = "xyes"], [
AC_MSG_ERROR([sysfsgpio is only available on linux])
])
AS_IF([test "x$enable_linuxgpiod" = "xyes"], [
AC_MSG_ERROR([linuxgpiod is only available on linux])
])
AS_IF([test "x$build_xlnx_pcie_xvc" = "xyes"], [
AC_MSG_ERROR([xlnx_pcie_xvc is only available on linux])
])
AS_CASE([$host_os], [freebsd*], [],
[
AS_IF([test "x$build_rshim" = "xyes"], [
AC_MSG_ERROR([build_rshim is only available on linux or freebsd])
])
])
])
AC_ARG_ENABLE([minidriver_dummy],
@@ -468,6 +510,12 @@ AS_IF([test "x$build_parport" = "xyes"], [
AC_DEFINE([BUILD_PARPORT], [0], [0 if you don't want parport.])
])
AS_IF([test "x$build_rshim" = "xyes"], [
AC_DEFINE([BUILD_RSHIM], [1], [1 if you want to debug BlueField SoC via rshim.])
], [
AC_DEFINE([BUILD_RSHIM], [0], [0 if you don't want to debug BlueField SoC via rshim.])
])
AS_IF([test "x$build_dummy" = "xyes"], [
build_bitbang=yes
AC_DEFINE([BUILD_DUMMY], [1], [1 if you want dummy driver.])
@@ -508,6 +556,13 @@ AS_IF([test "x$build_bcm2835gpio" = "xyes"], [
AC_DEFINE([BUILD_BCM2835GPIO], [0], [0 if you don't want bcm2835gpio.])
])
AS_IF([test "x$build_imx_gpio" = "xyes"], [
build_bitbang=yes
AC_DEFINE([BUILD_IMX_GPIO], [1], [1 if you want imx_gpio.])
], [
AC_DEFINE([BUILD_IMX_GPIO], [0], [0 if you don't want imx_gpio.])
])
AS_IF([test "x$parport_use_ppdev" = "xyes"], [
AC_DEFINE([PARPORT_USE_PPDEV], [1], [1 if you want parport to use ppdev.])
], [
@@ -526,6 +581,13 @@ AS_IF([test "x$build_jtag_vpi" = "xyes"], [
AC_DEFINE([BUILD_JTAG_VPI], [0], [0 if you don't want JTAG VPI.])
])
AS_IF([test "x$build_jtag_dpi" = "xyes"], [
AC_DEFINE([BUILD_JTAG_DPI], [1], [1 if you want JTAG DPI.])
], [
AC_DEFINE([BUILD_JTAG_DPI], [0], [0 if you don't want JTAG DPI.])
])
AS_IF([test "x$build_amtjtagaccel" = "xyes"], [
AC_DEFINE([BUILD_AMTJTAGACCEL], [1], [1 if you want the Amontec JTAG-Accelerator driver.])
], [
@@ -552,7 +614,7 @@ AS_IF([test "x$build_buspirate" = "xyes"], [
AS_IF([test "x$use_internal_jimtcl" = "xyes"], [
AS_IF([test -f "$srcdir/jimtcl/configure.ac"], [
AX_CONFIG_SUBDIR_OPTION([jimtcl], [--disable-install-jim --with-ext="eventloop array clock regexp stdlib tclcompat" --without-ext="default"])
AX_CONFIG_SUBDIR_OPTION([jimtcl], [--disable-install-jim])
], [
AC_MSG_ERROR([jimtcl not found, run git submodule init and git submodule update.])
])
@@ -572,6 +634,13 @@ AS_IF([test "x$build_sysfsgpio" = "xyes"], [
AC_DEFINE([BUILD_SYSFSGPIO], [0], [0 if you don't want SysfsGPIO driver.])
])
AS_IF([test "x$build_xlnx_pcie_xvc" = "xyes"], [
build_xlnx_pcie_xvc=yes
AC_DEFINE([BUILD_XLNX_PCIE_XVC], [1], [1 if you want the Xilinx XVC/PCIe driver.])
], [
AC_DEFINE([BUILD_XLNX_PCIE_XVC], [0], [0 if you don't want Xilinx XVC/PCIe driver.])
])
PKG_CHECK_MODULES([LIBUSB1], [libusb-1.0], [
use_libusb1=yes
AC_DEFINE([HAVE_LIBUSB1], [1], [Define if you have libusb-1.x])
@@ -589,6 +658,26 @@ PKG_CHECK_MODULES([LIBUSB1], [libusb-1.0], [
PKG_CHECK_MODULES([LIBUSB0], [libusb], [use_libusb0=yes], [use_libusb0=no])
AC_ARG_WITH([capstone],
AS_HELP_STRING([--with-capstone], [Use Capstone disassembly library (default=auto)])
, [
enable_capstone=$withval
], [
enable_capstone=auto
])
AS_IF([test "x$enable_capstone" != xno], [
PKG_CHECK_MODULES([CAPSTONE], [capstone], [
AC_DEFINE([HAVE_CAPSTONE], [1], [1 if you have Capstone disassembly framework.])
], [
AC_DEFINE([HAVE_CAPSTONE], [0], [0 if you don't have Capstone disassembly framework.])
if test "x$enable_capstone" != xauto; then
AC_MSG_ERROR([--with-capstone was given, but test for Capstone failed])
fi
enable_capstone=no
])
])
for hidapi_lib in hidapi hidapi-hidraw hidapi-libusb; do
PKG_CHECK_MODULES([HIDAPI],[$hidapi_lib],[
use_hidapi=yes
@@ -598,15 +687,24 @@ for hidapi_lib in hidapi hidapi-hidraw hidapi-libusb; do
])
done
PKG_CHECK_MODULES([LIBFTDI], [libftdi1], [use_libftdi=yes], [
PKG_CHECK_MODULES([LIBFTDI], [libftdi1], [
use_libftdi=yes
PKG_CHECK_EXISTS([libftdi1 >= 1.5],
[AC_DEFINE([HAVE_LIBFTDI_TCIOFLUSH], [1], [Define if your libftdi has ftdi_tcioflush()])])
], [
PKG_CHECK_MODULES([LIBFTDI], [libftdi], [use_libftdi=yes], [use_libftdi=no])
])
PKG_CHECK_MODULES([LIBJAYLINK], [libjaylink >= 0.1],
PKG_CHECK_MODULES([LIBGPIOD], [libgpiod], [use_libgpiod=yes], [use_libgpiod=no])
PKG_CHECK_MODULES([LIBJAYLINK], [libjaylink >= 0.2],
[use_libjaylink=yes], [use_libjaylink=no])
m4_define([PROCESS_ADAPTERS], [
m4_foreach([adapter], [$1], [
AS_IF([test "x$build_zy1000" = "xyes"], [
ADAPTER_VAR([adapter])=no
])
AS_IF([test $2], [
AS_IF([test "x$ADAPTER_VAR([adapter])" != "xno"], [
AC_DEFINE([BUILD_]ADAPTER_SYM([adapter]), [1], [1 if you want the ]ADAPTER_DESC([adapter]).)
@@ -624,25 +722,28 @@ m4_define([PROCESS_ADAPTERS], [
])
PROCESS_ADAPTERS([USB1_ADAPTERS], ["x$use_libusb1" = "xyes"], [libusb-1.x])
PROCESS_ADAPTERS([USB_ADAPTERS], ["x$use_libusb1" = "xyes" -o "x$use_libusb0" = "xyes"], [libusb-1.x or libusb-0.1])
PROCESS_ADAPTERS([USB0_ADAPTERS], ["x$use_libusb0" = "xyes"], [libusb-0.1])
PROCESS_ADAPTERS([HIDAPI_ADAPTERS], ["x$use_hidapi" = "xyes"], [hidapi])
PROCESS_ADAPTERS([HIDAPI_USB1_ADAPTERS], ["x$use_hidapi" = "xyes" -a "x$use_libusb1" = "xyes"], [hidapi and libusb-1.x])
PROCESS_ADAPTERS([LIBFTDI_ADAPTERS], ["x$use_libftdi" = "xyes"], [libftdi])
PROCESS_ADAPTERS([LIBJAYLINK_ADAPTERS], ["x$use_libusb1" = "xyes" -a "x$use_internal_libjaylink" = "xyes" -o "x$use_libjaylink" = "xyes"], [libusb-1.x or libjaylink-0.1])
PROCESS_ADAPTERS([LIBFTDI_USB1_ADAPTERS], ["x$use_libftdi" = "xyes" -a "x$use_libusb1" = "xyes"], [libftdi and libusb-1.x])
PROCESS_ADAPTERS([LIBGPIOD_ADAPTERS], ["x$use_libgpiod" = "xyes"], [libgpiod])
PROCESS_ADAPTERS([LIBJAYLINK_ADAPTERS], ["x$use_internal_libjaylink" = "xyes" -o "x$use_libjaylink" = "xyes"], [libjaylink-0.2])
AS_IF([test "x$build_openjtag" = "xyes"], [
AS_IF([test "x$use_libusb1" != "xyes" -a "x$use_libusb0" != "xyes"], [
AC_MSG_ERROR([libusb-1.x or libusb-0.1 is required for the OpenJTAG Programmer])
build_openjtag=no
])
AS_IF([test "x$enable_linuxgpiod" != "xno"], [
build_bitbang=yes
])
AS_IF([test "x$enable_stlink" != "xno" -o "x$enable_ti_icdi" != "xno"], [
AS_IF([test "x$enable_stlink" != "xno" -o "x$enable_ti_icdi" != "xno" -o "x$enable_nulink" != "xno"], [
AC_DEFINE([BUILD_HLADAPTER], [1], [1 if you want the High Level JTAG driver.])
AM_CONDITIONAL([HLADAPTER], [true])
], [
AC_DEFINE([BUILD_HLADAPTER], [0], [0 if you want the High Level JTAG driver.])
AM_CONDITIONAL([HLADAPTER], [false])
])
AM_CONDITIONAL([HLADAPTER], [test "x$enable_stlink" != "xno" -o "x$enable_ti_icdi" != "xno"])
AM_CONDITIONAL([HLADAPTER_STLINK], [test "x$enable_stlink" != "xno"])
AM_CONDITIONAL([HLADAPTER_ICDI], [test "x$enable_ti_icdi" != "xno"])
AM_CONDITIONAL([HLADAPTER_NULINK], [test "x$enable_nulink" != "xno"])
AS_IF([test "x$enable_jlink" != "xno"], [
AS_IF([test "x$use_internal_libjaylink" = "xyes"], [
@@ -670,8 +771,10 @@ AM_CONDITIONAL([ZY1000_MASTER], [test "x$build_zy1000_master" = "xyes"])
AM_CONDITIONAL([IOUTIL], [test "x$build_ioutil" = "xyes"])
AM_CONDITIONAL([AT91RM9200], [test "x$build_at91rm9200" = "xyes"])
AM_CONDITIONAL([BCM2835GPIO], [test "x$build_bcm2835gpio" = "xyes"])
AM_CONDITIONAL([IMX_GPIO], [test "x$build_imx_gpio" = "xyes"])
AM_CONDITIONAL([BITBANG], [test "x$build_bitbang" = "xyes"])
AM_CONDITIONAL([JTAG_VPI], [test "x$build_jtag_vpi" = "xyes" -o "x$build_jtag_vpi" = "xyes"])
AM_CONDITIONAL([JTAG_DPI], [test "x$build_jtag_dpi" = "xyes" -o "x$build_jtag_dpi" = "xyes"])
AM_CONDITIONAL([USB_BLASTER_DRIVER], [test "x$enable_usb_blaster" != "xno" -o "x$enable_usb_blaster_2" != "xno"])
AM_CONDITIONAL([AMTJTAGACCEL], [test "x$build_amtjtagaccel" = "xyes"])
AM_CONDITIONAL([GW16012], [test "x$build_gw16012" = "xyes"])
@@ -679,6 +782,7 @@ AM_CONDITIONAL([OOCD_TRACE], [test "x$build_oocd_trace" = "xyes"])
AM_CONDITIONAL([REMOTE_BITBANG], [test "x$build_remote_bitbang" = "xyes"])
AM_CONDITIONAL([BUSPIRATE], [test "x$build_buspirate" = "xyes"])
AM_CONDITIONAL([SYSFSGPIO], [test "x$build_sysfsgpio" = "xyes"])
AM_CONDITIONAL([XLNX_PCIE_XVC], [test "x$build_xlnx_pcie_xvc" = "xyes"])
AM_CONDITIONAL([USE_LIBUSB0], [test "x$use_libusb0" = "xyes"])
AM_CONDITIONAL([USE_LIBUSB1], [test "x$use_libusb1" = "xyes"])
AM_CONDITIONAL([IS_CYGWIN], [test "x$is_cygwin" = "xyes"])
@@ -687,8 +791,11 @@ AM_CONDITIONAL([IS_WIN32], [test "x$is_win32" = "xyes"])
AM_CONDITIONAL([IS_DARWIN], [test "x$is_darwin" = "xyes"])
AM_CONDITIONAL([BITQ], [test "x$build_bitq" = "xyes"])
AM_CONDITIONAL([USE_LIBFTDI], [test "x$use_libftdi" = "xyes"])
AM_CONDITIONAL([USE_LIBGPIOD], [test "x$use_libgpiod" = "xyes"])
AM_CONDITIONAL([USE_HIDAPI], [test "x$use_hidapi" = "xyes"])
AM_CONDITIONAL([USE_LIBJAYLINK], [test "x$use_libjaylink" = "xyes"])
AM_CONDITIONAL([RSHIM], [test "x$build_rshim" = "xyes"])
AM_CONDITIONAL([HAVE_CAPSTONE], [test "x$enable_capstone" != "xno"])
AM_CONDITIONAL([MINIDRIVER], [test "x$build_minidriver" = "xyes"])
AM_CONDITIONAL([MINIDRIVER_DUMMY], [test "x$build_minidriver_dummy" = "xyes"])
@@ -736,12 +843,13 @@ AS_IF([test "x${gcc_wextra}" = "xyes"], [
GCC_WARNINGS="${GCC_WARNINGS} -Wbad-function-cast"
GCC_WARNINGS="${GCC_WARNINGS} -Wcast-align"
GCC_WARNINGS="${GCC_WARNINGS} -Wredundant-decls"
GCC_WARNINGS="${GCC_WARNINGS} -Wpointer-arith"
])
AS_IF([test "x${gcc_werror}" = "xyes"], [
GCC_WARNINGS="${GCC_WARNINGS} -Werror"
])
# overide default gcc cflags
# override default gcc cflags
AS_IF([test "x$gcc_warnings" = "xyes"], [
AC_SUBST([GCC_WARNINGS], [$GCC_WARNINGS])
])
@@ -755,8 +863,12 @@ echo
echo
echo OpenOCD configuration summary
echo --------------------------------------------------
m4_foreach([adapter], [USB1_ADAPTERS, USB_ADAPTERS, USB0_ADAPTERS,
HIDAPI_ADAPTERS, LIBFTDI_ADAPTERS, LIBJAYLINK_ADAPTERS],
m4_foreach([adapter], [USB1_ADAPTERS, USB0_ADAPTERS,
HIDAPI_ADAPTERS, HIDAPI_USB1_ADAPTERS, LIBFTDI_ADAPTERS,
LIBFTDI_USB1_ADAPTERS,
LIBGPIOD_ADAPTERS,
LIBJAYLINK_ADAPTERS, PCIE_ADAPTERS,
OPTIONAL_LIBRARIES],
[s=m4_format(["%-40s"], ADAPTER_DESC([adapter]))
AS_CASE([$ADAPTER_VAR([adapter])],
[auto], [

View File

@@ -1,6 +1,11 @@
# Copy this file to /etc/udev/rules.d/
# If rules fail to reload automatically, you can refresh udev rules
# with the command "udevadm control --reload"
ACTION!="add|change", GOTO="openocd_rules_end"
SUBSYSTEM=="gpio", MODE="0660", GROUP="plugdev", TAG+="uaccess"
SUBSYSTEM!="usb|tty|hidraw", GOTO="openocd_rules_end"
# Please keep this list sorted by VID:PID
@@ -50,17 +55,40 @@ ATTRS{idVendor}=="0403", ATTRS{idProduct}=="c141", MODE="660", GROUP="plugdev",
# Amontec JTAGkey and JTAGkey-tiny
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="cff8", MODE="660", GROUP="plugdev", TAG+="uaccess"
# Nuvoton NuLink
ATTRS{idVendor}=="0416", ATTRS{idProduct}=="511b", MODE="660", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="0416", ATTRS{idProduct}=="511c", MODE="660", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="0416", ATTRS{idProduct}=="511d", MODE="660", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="0416", ATTRS{idProduct}=="5200", MODE="660", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="0416", ATTRS{idProduct}=="5201", MODE="660", GROUP="plugdev", TAG+="uaccess"
# TI ICDI
ATTRS{idVendor}=="0451", ATTRS{idProduct}=="c32a", MODE="660", GROUP="plugdev", TAG+="uaccess"
# STLink v1
# STMicroelectronics ST-LINK V1
ATTRS{idVendor}=="0483", ATTRS{idProduct}=="3744", MODE="660", GROUP="plugdev", TAG+="uaccess"
# STLink v2
# STMicroelectronics ST-LINK/V2
ATTRS{idVendor}=="0483", ATTRS{idProduct}=="3748", MODE="660", GROUP="plugdev", TAG+="uaccess"
# STLink v2-1
# STMicroelectronics ST-LINK/V2.1
ATTRS{idVendor}=="0483", ATTRS{idProduct}=="374b", MODE="660", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="0483", ATTRS{idProduct}=="3752", MODE="660", GROUP="plugdev", TAG+="uaccess"
# STMicroelectronics STLINK-V3
ATTRS{idVendor}=="0483", ATTRS{idProduct}=="374d", MODE="660", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="0483", ATTRS{idProduct}=="374e", MODE="660", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="0483", ATTRS{idProduct}=="374f", MODE="660", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="0483", ATTRS{idProduct}=="3753", MODE="660", GROUP="plugdev", TAG+="uaccess"
# Cypress SuperSpeed Explorer Kit
ATTRS{idVendor}=="04b4", ATTRS{idProduct}=="0007", MODE="660", GROUP="plugdev", TAG+="uaccess"
# Cypress KitProg in KitProg mode
ATTRS{idVendor}=="04b4", ATTRS{idProduct}=="f139", MODE="660", GROUP="plugdev", TAG+="uaccess"
# Cypress KitProg in CMSIS-DAP mode
ATTRS{idVendor}=="04b4", ATTRS{idProduct}=="f138", MODE="660", GROUP="plugdev", TAG+="uaccess"
# Hilscher NXHX Boards
ATTRS{idVendor}=="0640", ATTRS{idProduct}=="0028", MODE="660", GROUP="plugdev", TAG+="uaccess"
@@ -94,6 +122,8 @@ ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1015", MODE="660", GROUP="plugdev",
ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1016", MODE="660", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1017", MODE="660", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1018", MODE="660", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1051", MODE="660", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1061", MODE="660", GROUP="plugdev", TAG+="uaccess"
# Raisonance RLink
ATTRS{idVendor}=="138e", ATTRS{idProduct}=="9000", MODE="660", GROUP="plugdev", TAG+="uaccess"
@@ -122,11 +152,25 @@ ATTRS{idVendor}=="1781", ATTRS{idProduct}=="0c63", MODE="660", GROUP="plugdev",
# TI/Luminary Stellaris In-Circuit Debug Interface (ICDI) Board
ATTRS{idVendor}=="1cbe", ATTRS{idProduct}=="00fd", MODE="660", GROUP="plugdev", TAG+="uaccess"
# TI XDS110 Debug Probe (Launchpads and Standalone)
ATTRS{idVendor}=="0451", ATTRS{idProduct}=="bef3", MODE="660", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="0451", ATTRS{idProduct}=="bef4", MODE="660", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="1cbe", ATTRS{idProduct}=="02a5", MODE="660", GROUP="plugdev", TAG+="uaccess"
# TI Tiva-based ICDI and XDS110 probes in DFU mode
ATTRS{idVendor}=="1cbe", ATTRS{idProduct}=="00ff", MODE="660", GROUP="plugdev", TAG+="uaccess"
# Ambiq Micro EVK and Debug boards.
ATTRS{idVendor}=="2aec", ATTRS{idProduct}=="6010", MODE="660", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="2aec", ATTRS{idProduct}=="6011", MODE="660", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="2aec", ATTRS{idProduct}=="1106", MODE="660", GROUP="plugdev", TAG+="uaccess"
# Marvell Sheevaplug
ATTRS{idVendor}=="9e88", ATTRS{idProduct}=="9e8f", MODE="660", GROUP="plugdev", TAG+="uaccess"
# Keil Software, Inc. ULink
ATTRS{idVendor}=="c251", ATTRS{idProduct}=="2710", MODE="660", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="c251", ATTRS{idProduct}=="2750", MODE="660", GROUP="plugdev", TAG+="uaccess"
# CMSIS-DAP compatible adapters
ATTRS{product}=="*CMSIS-DAP*", MODE="660", GROUP="plugdev", TAG+="uaccess"

View File

@@ -62,7 +62,7 @@ Clearly some of that data would be valuable for interactive debugging.
+In any case, OpenOCD is not currently GUI-oriented. Accordingly, we now
+expect any such graphics to come from postprocessing.
measurments for RTOS event timings should also be easy to collect.
measurements for RTOS event timings should also be easy to collect.
+Examples include context and message switch times, as well as times
for application interactions.
+

View File

@@ -14,9 +14,9 @@
# paths refer to the build file system.
#
# This script is probably more useful as a reference than as a complete build
# tool but for some configurations it may be usable as-is. It only cross-
# builds libusb-1.0 from source, but the script can be extended to build other
# prerequisities in a similar manner.
# tool but for some configurations it may be usable as-is. It only cross-builds
# libusb-1.0, hidapi, libftdi and capstone from source, but the script can be
# extended to build other prerequisites in a similar manner.
#
# Usage:
# export LIBUSB1_SRC=/path/to/libusb-1.0
@@ -36,17 +36,23 @@ WORK_DIR=$PWD
## Source code paths, customize as necessary
: ${OPENOCD_SRC:="`dirname "$0"`/.."}
: ${LIBUSB1_SRC:=/path/to/libusb}
: ${LIBUSB1_SRC:=/path/to/libusb1}
: ${HIDAPI_SRC:=/path/to/hidapi}
: ${LIBFTDI_SRC:=/path/to/libftdi}
: ${CAPSTONE_SRC:=/path/to/capstone}
OPENOCD_SRC=`readlink -m $OPENOCD_SRC`
LIBUSB1_SRC=`readlink -m $LIBUSB1_SRC`
HIDAPI_SRC=`readlink -m $HIDAPI_SRC`
LIBFTDI_SRC=`readlink -m $LIBFTDI_SRC`
CAPSTONE_SRC=`readlink -m $CAPSTONE_SRC`
HOST_TRIPLET=$1
BUILD_DIR=$WORK_DIR/$HOST_TRIPLET-build
LIBUSB1_BUILD_DIR=$BUILD_DIR/libusb1
HIDAPI_BUILD_DIR=$BUILD_DIR/hidapi
LIBFTDI_BUILD_DIR=$BUILD_DIR/libftdi
CAPSTONE_BUILD_DIR=$BUILD_DIR/capstone
OPENOCD_BUILD_DIR=$BUILD_DIR/openocd
## Root of host file tree
@@ -55,8 +61,12 @@ SYSROOT=$WORK_DIR/$HOST_TRIPLET-root
## Install location within host file tree
: ${PREFIX=/usr}
## Make parallel jobs
: ${MAKE_JOBS:=1}
## OpenOCD-only install dir for packaging
PACKAGE_DIR=$WORK_DIR/openocd_`git --git-dir=$OPENOCD_SRC/.git describe`_$HOST_TRIPLET
: ${OPENOCD_TAG:=`git --git-dir=$OPENOCD_SRC/.git describe --tags`}
PACKAGE_DIR=$WORK_DIR/openocd_${OPENOCD_TAG}_${HOST_TRIPLET}
#######
@@ -86,13 +96,15 @@ rm -rf $SYSROOT $BUILD_DIR
mkdir -p $SYSROOT
# libusb-1.0 build & install into sysroot
mkdir -p $LIBUSB1_BUILD_DIR
cd $LIBUSB1_BUILD_DIR
$LIBUSB1_SRC/configure --build=`$LIBUSB1_SRC/config.guess` --host=$HOST_TRIPLET \
--with-sysroot=$SYSROOT --prefix=$PREFIX \
$LIBUSB1_CONFIG
make
make install DESTDIR=$SYSROOT
if [ -d $LIBUSB1_SRC ] ; then
mkdir -p $LIBUSB1_BUILD_DIR
cd $LIBUSB1_BUILD_DIR
$LIBUSB1_SRC/configure --build=`$LIBUSB1_SRC/config.guess` --host=$HOST_TRIPLET \
--with-sysroot=$SYSROOT --prefix=$PREFIX \
$LIBUSB1_CONFIG
make -j $MAKE_JOBS
make install DESTDIR=$SYSROOT
fi
# hidapi build & install into sysroot
if [ -d $HIDAPI_SRC ] ; then
@@ -101,19 +113,55 @@ if [ -d $HIDAPI_SRC ] ; then
$HIDAPI_SRC/configure --build=`$HIDAPI_SRC/config.guess` --host=$HOST_TRIPLET \
--with-sysroot=$SYSROOT --prefix=$PREFIX \
$HIDAPI_CONFIG
make
make -j $MAKE_JOBS
make install DESTDIR=$SYSROOT
fi
# libftdi build & install into sysroot
if [ -d $LIBFTDI_SRC ] ; then
mkdir -p $LIBFTDI_BUILD_DIR
cd $LIBFTDI_BUILD_DIR
# libftdi requires libusb1 static libraries, granted by:
# export LIBUSB1_CONFIG="--enable-static ..."
cmake $LIBFTDI_CONFIG \
-DLIBUSB_INCLUDE_DIR=${SYSROOT}${PREFIX}/include/libusb-1.0 \
-DLIBUSB_LIBRARIES=${SYSROOT}${PREFIX}/lib/libusb-1.0.a \
-DCMAKE_INSTALL_PREFIX=${PREFIX} \
-DPKG_CONFIG_EXECUTABLE=`which pkg-config` \
$LIBFTDI_SRC
make install DESTDIR=$SYSROOT
fi
# capstone build & install into sysroot
if [ -d $CAPSTONE_SRC ] ; then
mkdir -p $CAPSTONE_BUILD_DIR
cd $CAPSTONE_BUILD_DIR
cp -r $CAPSTONE_SRC/* .
make install DESTDIR=$SYSROOT PREFIX=$PREFIX \
CROSS="${HOST_TRIPLET}-" \
$CAPSTONE_CONFIG
# fix the generated capstone.pc
CAPSTONE_PC_FILE=${SYSROOT}${PREFIX}/lib/pkgconfig/capstone.pc
sed -i '/^libdir=/d' $CAPSTONE_PC_FILE
sed -i '/^includedir=/d' $CAPSTONE_PC_FILE
sed -i '/^archive=/d' $CAPSTONE_PC_FILE
sed -i '1s;^;prefix=/usr \
exec_prefix=${prefix} \
libdir=${exec_prefix}/lib \
includedir=${prefix}/include\n\n;' $CAPSTONE_PC_FILE
fi
# OpenOCD build & install into sysroot
mkdir -p $OPENOCD_BUILD_DIR
cd $OPENOCD_BUILD_DIR
$OPENOCD_SRC/configure --build=`$OPENOCD_SRC/config.guess` --host=$HOST_TRIPLET \
--with-sysroot=$SYSROOT --prefix=$PREFIX \
$OPENOCD_CONFIG
make
make install DESTDIR=$SYSROOT
make -j $MAKE_JOBS
make install-strip DESTDIR=$SYSROOT
# Separate OpenOCD install w/o dependencies. OpenOCD will have to be linked
# statically or have dependencies packaged/installed separately.
make install DESTDIR=$PACKAGE_DIR
make install-strip DESTDIR=$PACKAGE_DIR

View File

@@ -325,7 +325,7 @@ static void show_timestamp(FILE *f, int c)
delayed = true;
break;
case 0xf:
label = ", packet and timetamp delayed";
label = ", packet and timestamp delayed";
delayed = true;
break;
}

View File

@@ -16,4 +16,3 @@ To see how many times the trace point was hit:
Spen
spen@spen-soft.co.uk

View File

@@ -17,9 +17,7 @@
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#include "dcc_stdio.h"

View File

@@ -15,9 +15,7 @@
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef DCC_STDIO_H

View File

@@ -15,9 +15,7 @@
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#include "dcc_stdio.h"

View File

@@ -1,6 +1,6 @@
.PHONY: arm clean-arm
all: arm
all: arm stm8
common_dirs = \
checksum \
@@ -12,6 +12,7 @@ ARM_CROSS_COMPILE ?= arm-none-eabi-
arm_dirs = \
flash/fm4 \
flash/kinetis_ke \
flash/max32xxx \
flash/xmc1xxx \
debug/xscale
@@ -32,3 +33,6 @@ clean: clean-arm
for d in $(common_dirs); do \
$(MAKE) -C $$d clean; \
done
stm8:
$(MAKE) -C erase_check stm8

View File

@@ -713,4 +713,3 @@ send_to_debugger:
receive_from_debugger:
m_receive_from_debugger r0
mov pc, lr

View File

@@ -6,7 +6,13 @@ ARM_OBJCOPY ?= $(ARM_CROSS_COMPILE)objcopy
ARM_AFLAGS = -EL
arm: armv4_5_erase_check.inc armv7m_erase_check.inc armv7m_0_erase_check.inc
STM8_CROSS_COMPILE ?= stm8-
STM8_AS ?= $(STM8_CROSS_COMPILE)as
STM8_OBJCOPY ?= $(STM8_CROSS_COMPILE)objcopy
STM8_AFLAGS =
arm: armv4_5_erase_check.inc armv7m_erase_check.inc
armv4_5_%.elf: armv4_5_%.s
$(ARM_AS) $(ARM_AFLAGS) $< -o $@
@@ -26,5 +32,16 @@ armv7m_%.bin: armv7m_%.elf
armv7m_%.inc: armv7m_%.bin
$(BIN2C) < $< > $@
stm8: stm8_erase_check.inc
stm8_%.elf: stm8_%.s
$(STM8_AS) $(STM8_AFLAGS) $< -o $@
stm8_%.bin: stm8_%.elf
$(STM8_OBJCOPY) -Obinary $< $@
stm8_%.inc: stm8_%.bin
$(BIN2C) < $< > $@
clean:
-rm -f *.elf *.bin *.inc

View File

@@ -1,2 +0,0 @@
/* Autogenerated with ../../../src/helper/bin2char.sh */
0x03,0x78,0x01,0x30,0x1a,0x43,0x01,0x39,0xfa,0xd1,0x00,0xbe,

View File

@@ -1,2 +1,4 @@
/* Autogenerated with ../../../src/helper/bin2char.sh */
0x03,0x78,0x01,0x30,0x1a,0x40,0x01,0x39,0xfa,0xd1,0x00,0xbe,
0x02,0x68,0x12,0x42,0x0d,0xd0,0x43,0x68,0x1c,0x68,0x04,0x33,0x8c,0x42,0x05,0xd1,
0x01,0x3a,0xf9,0xd1,0x01,0x24,0x04,0x60,0x08,0x30,0xf1,0xe7,0x00,0x24,0xfa,0xe7,
0x00,0x00,0x00,0xbe,

View File

@@ -20,9 +20,8 @@
/*
parameters:
r0 - address in
r1 - byte count
r2 - mask - result out
r0 - pointer to struct { uint32_t size_in_result_out, uint32_t addr }
r1 - value to check
*/
.text
@@ -33,13 +32,42 @@
.align 2
loop:
ldrb r3, [r0]
adds r0, #1
ands r2, r2, r3
subs r1, r1, #1
bne loop
end:
BLOCK_SIZE_RESULT = 0
BLOCK_ADDRESS = 4
SIZEOF_STRUCT_BLOCK = 8
start:
block_loop:
ldr r2, [r0, #BLOCK_SIZE_RESULT] /* get size */
tst r2, r2
beq done
ldr r3, [r0, #BLOCK_ADDRESS] /* get address */
word_loop:
ldr r4, [r3] /* read word */
adds r3, #4
cmp r4, r1
bne not_erased
subs r2, #1
bne word_loop
movs r4, #1 /* block is erased */
save_result:
str r4, [r0, #BLOCK_SIZE_RESULT]
adds r0, #SIZEOF_STRUCT_BLOCK
b block_loop
not_erased:
movs r4, #0
b save_result
/* Avoid padding at .text segment end. Otherwise exit point check fails. */
.skip ( . - start + 2) & 2, 0
done:
bkpt #0
.end

View File

@@ -0,0 +1,5 @@
/* Autogenerated with ../../../src/helper/bin2char.sh */
0x00,0x80,0x00,0x00,0x80,0x00,0x96,0xcf,0x00,0x22,0x1e,0x01,0x16,0x04,0xa6,0xff,
0x90,0x5d,0x26,0x04,0x0d,0x03,0x27,0x17,0x90,0x5d,0x26,0x02,0x0a,0x03,0x90,0x5a,
0x92,0xbc,0x00,0x00,0xa1,0xff,0x26,0x07,0x5c,0x26,0xe5,0x0c,0x00,0x20,0xe1,0x1f,
0x01,0x17,0x04,0x8b,

View File

@@ -0,0 +1,69 @@
/*
* Copyright (C) 2017 Ake Rehnman
* ake.rehnman(at)gmail.com
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
;;
;; erase check memory code
;;
.org 0x0
;; start address
start_addr: .byte 0x00
.word 0x8000
;; byte count
byte_cnt: .byte 0x00
.word 0x8000
;
; SP must point to start_addr on entry
; first relocate start_addr to the location
; we are running at
start:
ldw X,SP
ldw .cont+2,X
ldw X,(start_addr+1,SP) ;start addr
ldw Y,(byte_cnt+1,SP) ;count
ld A,#0xff
;
; if count == 0 return
.L1:
tnzw Y
jrne .decrcnt ;continue if low word != 0
tnz (byte_cnt,SP) ;high byte
jreq .exit ;goto exit
;
; decrement count (byte_cnt)
.decrcnt:
tnzw Y ;low word count
jrne .decr1
dec (byte_cnt,SP) ;high byte
.decr1:
decw Y; decr low word
;
; first check if [start_addr] is 0xff
.cont:
ldf A, [start_addr.e]
cp A,#0xff
jrne .exit ;exit if not 0xff
;
; increment start_addr (addr)
incw X
jrne .L1
inc (start_addr,SP) ;increment high byte
jra .L1
;
.exit:
ldw (start_addr+1,SP),X ;start addr
ldw (byte_cnt+1,SP),Y ;count
break

View File

@@ -57,4 +57,3 @@ done_write:
bkpt #0
.end

View File

@@ -129,4 +129,3 @@ SECTIONS
}
/*** EOF ***/

View File

@@ -46,7 +46,7 @@
ARM_MODE_SVC = 0x13 /* Supervisor Interrupts Mode */
ARM_MODE_ABORT = 0x17 /* Abort Processing memory Faults Mode */
ARM_MODE_UNDEF = 0x1B /* Undefined Instructions Mode */
ARM_MODE_SYS = 0x1F /* System Running in Priviledged Operating Mode */
ARM_MODE_SYS = 0x1F /* System Running in Privileged Operating Mode */
ARM_MODE_MASK = 0x1F
I_BIT = 0x80 /* disable IRQ when I bit is set */

View File

@@ -13,9 +13,7 @@
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#include "dcc.h"
@@ -41,7 +39,7 @@ int dcc_wr(uint32 data)
do {
asm volatile ("mrc p14, 0, %0, C0, C0" : "=r" (dcc_reg) :);
/* operation controled by master, cancel operation
/* operation controlled by master, cancel operation
upon reception of data for immediate response */
if (dcc_reg&1) return -1;
} while (dcc_reg&2);

View File

@@ -13,9 +13,7 @@
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef dccH
#define dccH

View File

@@ -13,9 +13,7 @@
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#include "platform.h"
@@ -103,5 +101,5 @@ int main (void)
}
}
return(0); /* we shall never get here, just to supress compiler warning */
return 0; /* we shall never get here, just to suppress compiler warning */
}

View File

@@ -127,4 +127,4 @@ clean:
#
#-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
# *** EOF ***
# *** EOF ***

View File

@@ -13,9 +13,7 @@
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OCL_H
#define OCL_H
@@ -23,7 +21,7 @@
/* command/response mask */
#define OCL_CMD_MASK 0xFFFF0000L
/* commads */
/* commands */
#define OCL_FLASH_BLOCK 0x0CFB0000L
#define OCL_ERASE_BLOCK 0x0CEB0000L
#define OCL_ERASE_ALL 0x0CEA0000L

View File

@@ -13,9 +13,7 @@
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef platformH
#define platformH

View File

@@ -13,9 +13,7 @@
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#include "samflash.h"

View File

@@ -13,9 +13,7 @@
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef samflashH
#define samflashH

View File

@@ -0,0 +1,27 @@
BIN2C = ../../../../src/helper/bin2char.sh
CROSS_COMPILE ?= arm-none-eabi-
CC=$(CROSS_COMPILE)gcc
OBJCOPY=$(CROSS_COMPILE)objcopy
OBJDUMP=$(CROSS_COMPILE)objdump
CFLAGS = -c -mthumb -mcpu=cortex-m0 -O3 -g
all: bluenrg-x_write.inc
.PHONY: clean
.INTERMEDIATE: bluenrg-x_write.o
%.o: %.c
$(CC) $(CFLAGS) -Wall -Wextra -Wa,-adhln=$*.lst $< -o $@
%.bin: %.o
$(OBJCOPY) -Obinary $< $@
%.inc: %.bin
$(BIN2C) < $< > $@
clean:
-rm -f *.o *.lst *.bin *.inc

View File

@@ -0,0 +1,113 @@
/* To be built with arm-none-eabi-gcc -c -mthumb -mcpu=cortex-m0 -O3 bluenrgx.c */
/* Then postprocess output of command "arm-none-eabi-objdump -d bluenrgx.o" to make a C array of bytes */
#include <stdint.h>
#include "../../../../src/flash/nor/bluenrg-x.h"
/* Status Values ----------------------------------------------------------*/
#define SUCCESS 0
#define ERR_UNALIGNED 1
#define ERR_INVALID_ADDRESS 2
#define ERR_INVALID_TYPE 3
#define ERR_WRITE_PROTECTED 4
#define ERR_WRITE_FAILED 5
#define ERR_ERASE_REQUIRED 6
#define ERR_VERIFY_FAILED 7
#define MFB_MASS_ERASE 0x01
#define MFB_PAGE_ERASE 0x02
#define DO_ERASE 0x0100
#define DO_VERIFY 0x0200
#define MFB_BOTTOM (0x10040000)
#define MFB_SIZE_B(regs_base) ((16 * (((*(volatile uint32_t *)(regs_base + FLASH_SIZE_REG)) + 1) >> 12)) * 1024)
#define MFB_SIZE_W (MFB_SIZE_B/4)
#define MFB_TOP (MFB_BOTTOM+MFB_SIZE_B-1)
#define MFB_PAGE_SIZE_B (2048)
#define MFB_PAGE_SIZE_W (MFB_PAGE_SIZE_B/4)
#define AREA_ERROR 0x01
#define AREA_MFB 0x04
typedef struct {
volatile uint8_t *wp;
uint8_t *rp;
} work_area_t;
/* Flash Commands --------------------------------------------------------*/
static inline __attribute__((always_inline)) uint32_t flashWrite(uint32_t address, uint8_t **data,
uint32_t writeLength, uint32_t flash_regs_base)
{
uint32_t index, flash_word[4];
uint8_t i;
*((volatile uint32_t *)(flash_regs_base + FLASH_REG_IRQMASK)) = 0;
for (index = 0; index < writeLength; index += (FLASH_WORD_LEN*4)) {
for (i = 0; i < 4; i++)
flash_word[i] = (*(uint32_t *) (*data + i*4));
/* Clear the IRQ flags */
*((volatile uint32_t *)(flash_regs_base + FLASH_REG_IRQRAW)) = 0x0000003F;
/* Load the flash address to write */
*((volatile uint32_t *)(flash_regs_base + FLASH_REG_ADDRESS)) = (uint16_t)((address + index - MFB_BOTTOM) >> 2);
/* Prepare and load the data to flash */
*((volatile uint32_t *)(flash_regs_base + FLASH_REG_DATA0)) = flash_word[0];
*((volatile uint32_t *)(flash_regs_base + FLASH_REG_DATA1)) = flash_word[1];
*((volatile uint32_t *)(flash_regs_base + FLASH_REG_DATA2)) = flash_word[2];
*((volatile uint32_t *)(flash_regs_base + FLASH_REG_DATA3)) = flash_word[3];
/* Flash write command */
*((volatile uint32_t *)(flash_regs_base + FLASH_REG_COMMAND)) = FLASH_CMD_BURSTWRITE;
/* Wait the end of the flash write command */
while ((*((volatile uint32_t *)(flash_regs_base + FLASH_REG_IRQRAW)) & FLASH_INT_CMDDONE) == 0)
;
*data += (FLASH_WORD_LEN * 4);
}
return SUCCESS;
}
__attribute__((naked)) __attribute__((noreturn)) void write(uint8_t *work_area_p,
uint8_t *fifo_end,
uint8_t *target_address,
uint32_t count,
uint32_t flash_regs_base)
{
uint32_t retval;
volatile work_area_t *work_area = (work_area_t *) work_area_p;
uint8_t *fifo_start = (uint8_t *) work_area->rp;
while (count) {
volatile int32_t fifo_linear_size;
/* Wait for some data in the FIFO */
while (work_area->rp == work_area->wp)
;
if (work_area->wp == 0) {
/* Aborted by other party */
break;
}
if (work_area->rp > work_area->wp) {
fifo_linear_size = fifo_end-work_area->rp;
} else {
fifo_linear_size = (work_area->wp - work_area->rp);
if (fifo_linear_size < 0)
fifo_linear_size = 0;
}
if (fifo_linear_size < 16) {
/* We should never get here */
continue;
}
retval = flashWrite((uint32_t) target_address, (uint8_t **) &work_area->rp, fifo_linear_size, flash_regs_base);
if (retval != SUCCESS) {
work_area->rp = (uint8_t *)retval;
break;
}
target_address += fifo_linear_size;
if (work_area->rp >= fifo_end)
work_area->rp = fifo_start;
count -= fifo_linear_size;
}
__asm("bkpt 0");
}

View File

@@ -0,0 +1,17 @@
/* Autogenerated with ../../../../src/helper/bin2char.sh */
0x05,0x93,0x43,0x68,0x14,0x9e,0x09,0x93,0x05,0x9b,0x05,0x00,0x07,0x91,0x06,0x92,
0x01,0x24,0xb1,0x46,0x00,0x2b,0x68,0xd0,0x6a,0x68,0x2b,0x68,0x9a,0x42,0xfb,0xd0,
0x2b,0x68,0x00,0x2b,0x61,0xd0,0x6a,0x68,0x2b,0x68,0x9a,0x42,0x5e,0xd9,0x6b,0x68,
0x07,0x9a,0xd3,0x1a,0x0f,0x2b,0xef,0xdd,0x4a,0x46,0x00,0x21,0x03,0x93,0xd1,0x60,
0x00,0x2b,0x42,0xd0,0x40,0x22,0x4a,0x44,0x90,0x46,0x44,0x22,0x4a,0x44,0x00,0x92,
0x48,0x22,0x4a,0x44,0x93,0x46,0x4c,0x22,0x27,0x4f,0x4a,0x44,0xbc,0x46,0x4e,0x46,
0x92,0x46,0x06,0x99,0x4b,0x46,0x61,0x44,0x08,0x00,0x00,0x99,0x18,0x36,0x6a,0x68,
0x08,0x95,0x8c,0x46,0x55,0x46,0xda,0x46,0xb3,0x46,0x10,0x33,0x04,0x92,0x11,0x68,
0x5e,0x46,0x00,0x91,0x51,0x68,0x97,0x68,0x01,0x91,0xd1,0x68,0x02,0x91,0x3f,0x21,
0x19,0x60,0x81,0x03,0x09,0x0c,0x31,0x60,0x46,0x46,0x00,0x99,0x31,0x60,0x66,0x46,
0x01,0x99,0x31,0x60,0x56,0x46,0x02,0x99,0x37,0x60,0x29,0x60,0xcc,0x26,0x49,0x46,
0x0e,0x60,0x19,0x68,0x0c,0x42,0xfc,0xd0,0x04,0x99,0x03,0x9e,0x10,0x32,0x10,0x30,
0x51,0x1a,0x8e,0x42,0xdb,0xd8,0x08,0x9d,0x6a,0x60,0x03,0x9a,0x06,0x9b,0x94,0x46,
0x63,0x44,0x06,0x93,0x07,0x9a,0x6b,0x68,0x9a,0x42,0x01,0xd8,0x09,0x9b,0x6b,0x60,
0x05,0x9b,0x03,0x9a,0x9b,0x1a,0x05,0x93,0x96,0xd1,0x00,0xbe,0x2b,0x68,0x6a,0x68,
0x9b,0x1a,0x9f,0xd5,0x90,0xe7,0xc0,0x46,0x00,0x00,0xfc,0xef,

View File

@@ -0,0 +1,83 @@
BIN2C = ../../../../src/helper/bin2char.sh
CROSS_COMPILE ?= arm-none-eabi-
GCC = $(CROSS_COMPILE)gcc
OBJCOPY = $(CROSS_COMPILE)objcopy
FLAGS = -mthumb -Os -ffunction-sections -fdata-sections -g -gdwarf-3
FLAGS += -gstrict-dwarf -Wall -fno-strict-aliasing --asm
CFLAGS = -c -I.
CC26X0_CFLAGS = -mcpu=cortex-m3 -DDEVICE_CC26X0
CC26X2_CFLAGS = -mcpu=cortex-m4 -DDEVICE_CC26X2
CC26X0_OBJS := \
cc26x0/flashloader.o \
cc26x0/main.o \
cc26x0/startup.o \
cc26x0/flash.o
CC26X2_OBJS := \
cc26x2/flashloader.o \
cc26x2/main.o \
cc26x2/startup.o \
cc26x2/flash.o
all: cc26x0_algo.inc cc26x2_algo.inc
cc26x0/%.o: %.c
@echo 'Building file: $<'
@echo 'Invoking: GNU Compiler'
$(GCC) $(FLAGS) $(CFLAGS) $(CC26X0_CFLAGS) -o"$@" "$(shell echo $<)"
@echo 'Finished building: $<'
@echo ' '
cc26x2/%.o: %.c
@echo 'Building file: $<'
@echo 'Invoking: GNU Compiler'
$(GCC) $(FLAGS) $(CFLAGS) $(CC26X2_CFLAGS) -o"$@" "$(shell echo $<)"
@echo 'Finished building: $<'
@echo ' '
cc26x0_algo.out: $(CC26X0_OBJS)
@echo 'Building target: $@'
@echo 'Invoking: GNU Linker'
$(GCC) $(FLAGS) -o$@ $(CC26X0_OBJS) -Wl,-T"cc26x0/cc26x0r2f.lds"
@echo 'Finished building target: $@'
@echo ' '
cc26x2_algo.out: $(CC26X2_OBJS)
@echo 'Building target: $@'
@echo 'Invoking: GNU Linker'
$(GCC) $(FLAGS) -o$@ $(CC26X2_OBJS) -Wl,-T"cc26x2/cc26x2r1f.lds"
@echo 'Finished building target: $@'
@echo ' '
%.bin: %.out
@echo 'Building target: $@'
@echo 'Invoking: GNU Objcopy Utility'
$(OBJCOPY) -Obinary $< $@
@echo 'Finished building target: $@'
@echo ' '
%.inc: %.bin
@echo 'Building target: $@'
@echo 'Invoking Bin2Char Script'
$(BIN2C) < $< > $@
rm $< $*.out
@echo 'Finished building target: $@'
@echo ' '
clean:
@echo 'Cleaning Targets and Build Artifacts'
rm -rf *.inc *.bin *.out *.map
rm -rf cc26x0/*.o cc26x0/*.d
rm -rf cc26x2/*.o cc26x2/*.d
@echo 'Finished clean'
@echo ' '
.PRECIOUS: %.bin
.PHONY: all clean

View File

@@ -0,0 +1,90 @@
/******************************************************************************
*
* Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
/* Entry Point */
ENTRY( entry )
/* System memory map */
MEMORY
{
/* Application is stored in and executes from SRAM */
PROGRAM (RWX) : ORIGIN = 0x20000000, LENGTH = 0x1BD8
BUFFERS (RWX) : ORIGIN = 0x20001BD8, LENGTH = 0x3028
}
/* Section allocation in memory */
SECTIONS
{
.text :
{
_text = .;
*(.entry*)
*(.text*)
_etext = .;
} > PROGRAM
.data :
{ _data = .;
*(.rodata*)
*(.data*)
_edata = .;
}
.bss :
{
__bss_start__ = .;
_bss = .;
*(.bss*)
*(COMMON)
_ebss = .;
__bss_end__ = .;
} > PROGRAM
.stack :
{
_stack = .;
*(.stack*)
_estack = .;
} > PROGRAM
.buffers :
{
_buffers = .;
*(.buffers.g_cfg)
*(.buffers.g_buf1)
*(.buffers.g_buf2)
*(.buffers*)
_ebuffers = .;
} > BUFFERS
}

File diff suppressed because it is too large Load Diff

View File

@@ -0,0 +1,90 @@
/******************************************************************************
*
* Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
/* Entry Point */
ENTRY( entry )
/* System memory map */
MEMORY
{
/* Application is stored in and executes from SRAM */
PROGRAM (RWX) : ORIGIN = 0x20000000, LENGTH = 0x1FD8
BUFFERS (RWX) : ORIGIN = 0x20001FD8, LENGTH = 0x6028
}
/* Section allocation in memory */
SECTIONS
{
.text :
{
_text = .;
*(.entry*)
*(.text*)
_etext = .;
} > PROGRAM
.data :
{ _data = .;
*(.rodata*)
*(.data*)
_edata = .;
}
.bss :
{
__bss_start__ = .;
_bss = .;
*(.bss*)
*(COMMON)
_ebss = .;
__bss_end__ = .;
} > PROGRAM
.stack :
{
_stack = .;
*(.stack*)
_estack = .;
} > PROGRAM
.buffers :
{
_buffers = .;
*(.buffers.g_cfg)
*(.buffers.g_buf1)
*(.buffers.g_buf2)
*(.buffers*)
_ebuffers = .;
} > BUFFERS
}

File diff suppressed because it is too large Load Diff

View File

@@ -0,0 +1,977 @@
/******************************************************************************
*
* Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include <stdint.h>
#include <stdbool.h>
#include "flash.h"
/******************************************************************************
*
* Defines for accesses to the security control in the customer configuration
* area in flash top sector.
*
******************************************************************************/
#define CCFG_OFFSET_SECURITY CCFG_O_BL_CONFIG
#define CCFG_SIZE_SECURITY 0x00000014
/******************************************************************************
*
* Default values for security control in customer configuration area in flash
* top sector.
*
******************************************************************************/
const uint8_t g_ccfg_default_sec[] = {
0xFF, 0xFF, 0xFF, 0xC5,
0xFF, 0xFF, 0xFF, 0xFF,
0xC5, 0xFF, 0xFF, 0xFF,
0xC5, 0xC5, 0xC5, 0xFF,
0xC5, 0xC5, 0xC5, 0xFF
};
typedef uint32_t (*flash_prg_pntr_t) (uint8_t *, uint32_t, uint32_t);
typedef uint32_t (*flash_sector_erase_pntr_t) (uint32_t);
/******************************************************************************
*
* Function prototypes for static functions
*
******************************************************************************/
static void issue_fsm_command(flash_state_command_t command);
static void enable_sectors_for_write(void);
static uint32_t scale_cycle_values(uint32_t specified_timing,
uint32_t scale_value);
static void set_write_mode(void);
static void trim_for_write(void);
static void set_read_mode(void);
/******************************************************************************
*
* Erase a flash sector
*
******************************************************************************/
uint32_t flash_sector_erase(uint32_t sector_address)
{
uint32_t error_return;
flash_sector_erase_pntr_t func_pntr;
/* Call ROM function */
func_pntr = (uint32_t (*)(uint32_t))(ROM_API_FLASH_TABLE[5]);
error_return = func_pntr(sector_address);
/* Enable standby because ROM function might have disabled it */
HWREGBITW(FLASH_BASE + FLASH_O_CFG, FLASH_CFG_DIS_STANDBY_BITN) = 0;
/* Return status of operation. */
return error_return;
}
/******************************************************************************
*
* Erase all unprotected sectors in the flash main bank
*
******************************************************************************/
uint32_t flash_bank_erase(bool force_precondition)
{
uint32_t error_return;
uint32_t sector_address;
uint32_t reg_val;
/* Enable all sectors for erase. */
enable_sectors_for_write();
/* Clear the Status register. */
issue_fsm_command(FAPI_CLEAR_STATUS);
/* Enable erase of all sectors and enable precondition if required. */
reg_val = HWREG(FLASH_BASE + FLASH_O_FSM_ST_MACHINE);
HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_ENABLE;
HWREG(FLASH_BASE + FLASH_O_FSM_SECTOR1) = 0x00000000;
HWREG(FLASH_BASE + FLASH_O_FSM_SECTOR2) = 0x00000000;
if (force_precondition)
HWREG(FLASH_BASE + FLASH_O_FSM_ST_MACHINE) |=
FLASH_FSM_ST_MACHINE_DO_PRECOND;
HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_DISABLE;
/* Issue the bank erase command to the FSM. */
issue_fsm_command(FAPI_ERASE_BANK);
/* Wait for erase to finish. */
while (flash_check_fsm_for_ready() == FAPI_STATUS_FSM_BUSY)
;
/* Update status. */
error_return = flash_check_fsm_for_error();
/* Disable sectors for erase. */
flash_disable_sectors_for_write();
/* Set configured precondition mode since it may have been forced on. */
if (!(reg_val & FLASH_FSM_ST_MACHINE_DO_PRECOND)) {
HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_ENABLE;
HWREG(FLASH_BASE + FLASH_O_FSM_ST_MACHINE) &=
~FLASH_FSM_ST_MACHINE_DO_PRECOND;
HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_DISABLE;
}
/* Program security data to default values in the customer configuration */
/* area within the flash top sector if erase was successful. */
if (error_return == FAPI_STATUS_SUCCESS) {
sector_address = FLASHMEM_BASE + flash_size_get() -
flash_sector_size_get();
error_return = flash_program((uint8_t *)g_ccfg_default_sec,
(sector_address + CCFG_OFFSET_SECURITY),
CCFG_SIZE_SECURITY);
}
/* Return status of operation. */
return error_return;
}
/******************************************************************************
*
* Programs unprotected main bank flash sectors
*
******************************************************************************/
uint32_t flash_program(uint8_t *data_buffer, uint32_t address, uint32_t count)
{
uint32_t error_return;
flash_prg_pntr_t func_pntr;
/* Call ROM function */
func_pntr = (uint32_t (*)(uint8_t *, uint32_t, uint32_t))
(ROM_API_FLASH_TABLE[6]);
error_return = func_pntr(data_buffer, address, count);
/* Enable standby because ROM function might have disabled it */
HWREGBITW(FLASH_BASE + FLASH_O_CFG, FLASH_CFG_DIS_STANDBY_BITN) = 0;
/* Return status of operation. */
return error_return;
}
/******************************************************************************
*
* Disables all sectors for erase and programming on the active bank
*
******************************************************************************/
void flash_disable_sectors_for_write(void)
{
/* Configure flash back to read mode */
set_read_mode();
/* Disable Level 1 Protection. */
HWREG(FLASH_BASE + FLASH_O_FBPROT) = FLASH_FBPROT_PROTL1DIS;
/* Disable all sectors for erase and programming. */
HWREG(FLASH_BASE + FLASH_O_FBSE) = 0x0000;
/* Enable Level 1 Protection. */
HWREG(FLASH_BASE + FLASH_O_FBPROT) = 0;
/* Protect sectors from sector erase. */
HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_ENABLE;
HWREG(FLASH_BASE + FLASH_O_FSM_SECTOR1) = 0xFFFFFFFF;
HWREG(FLASH_BASE + FLASH_O_FSM_SECTOR2) = 0xFFFFFFFF;
HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_DISABLE;
}
/******************************************************************************
*
* Issues a command to the Flash State Machine.
*
******************************************************************************/
static void issue_fsm_command(flash_state_command_t command)
{
/* Enable write to FSM register. */
HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_ENABLE;
/* Issue FSM command. */
HWREG(FLASH_BASE + FLASH_O_FSM_CMD) = command;
/* Start command execute. */
HWREG(FLASH_BASE + FLASH_O_FSM_EXECUTE) = FLASH_CMD_EXEC;
/* Disable write to FSM register. */
HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_DISABLE;
}
/******************************************************************************
*
* Enables all sectors for erase and programming on the active bank.
*
* This function disables the idle reading power reduction mode, selects the
* flash bank and enables all sectors for erase and programming on the active
* bank.
* Sectors may be protected from programming depending on the value of the
* FLASH_O_FSM_BSLPx registers.
* Sectors may be protected from erase depending on the value of the
* FLASH_O_FSM_BSLEx registers. Additional sector erase protection is set by
* the FLASH_O_FSM_SECTOR1 register.
*
******************************************************************************/
static void enable_sectors_for_write(void)
{
/* Trim flash module for program/erase operation. */
trim_for_write();
/* Configure flash to write mode */
set_write_mode();
/* Select flash bank. */
HWREG(FLASH_BASE + FLASH_O_FMAC) = 0x00;
/* Disable Level 1 Protection. */
HWREG(FLASH_BASE + FLASH_O_FBPROT) = FLASH_FBPROT_PROTL1DIS;
/* Enable all sectors for erase and programming. */
HWREG(FLASH_BASE + FLASH_O_FBSE) = 0xFFFF;
/* Enable Level 1 Protection */
HWREG(FLASH_BASE + FLASH_O_FBPROT) = 0;
}
/******************************************************************************
*
* Trims the Flash Bank and Flash Pump for program/erase functionality
*
* This trimming will make it possible to perform erase and program operations
* of the flash. Trim values are loaded from factory configuration area
* (referred to as FCGF1). The trimming done by this function is valid until
* reset of the flash module.
*
* Some registers shall be written with a value that is a number of FCLK
* cycles. The trim values controlling these registers have a value of
* number of half us. FCLK = SysClk / ((RWAIT+1) x 2).
*
******************************************************************************/
static void trim_for_write(void)
{
uint32_t value;
uint32_t temp_val;
uint32_t fclk_scale;
uint32_t rwait;
/* Return if flash is already trimmed for program/erase operations. */
if (HWREG(FLASH_BASE + FLASH_O_FWFLAG) & FW_WRT_TRIMMED)
return;
/* Configure the FSM registers */
/* Enable access to the FSM registers. */
HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_ENABLE;
/* Determine the scaling value to be used on timing related trim values. */
/* The value is based on the flash module clock frequency and RWAIT */
rwait = (HWREG(FLASH_BASE + FLASH_O_FRDCTL) &
FLASH_FRDCTL_RWAIT_M) >> FLASH_FRDCTL_RWAIT_S;
fclk_scale = (16 * FLASH_MODULE_CLK_FREQ) / (rwait + 1);
/* Configure Program pulse width bits 15:0. */
/* (FCFG1 offset 0x188 bits 15:0). */
value = (HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_PROG_EP) &
FCFG1_FLASH_PROG_EP_PROGRAM_PW_M) >>
FCFG1_FLASH_PROG_EP_PROGRAM_PW_S;
value = scale_cycle_values(value, fclk_scale);
HWREG(FLASH_BASE + FLASH_O_FSM_PRG_PW) =
(HWREG(FLASH_BASE + FLASH_O_FSM_PRG_PW) &
~FLASH_FSM_PRG_PW_PROG_PUL_WIDTH_M) |
((value << FLASH_FSM_PRG_PW_PROG_PUL_WIDTH_S) &
FLASH_FSM_PRG_PW_PROG_PUL_WIDTH_M);
/* Configure Erase pulse width bits 31:0. */
/* (FCFG1 offset 0x18C bits 31:0). */
value = (HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_ERA_PW) &
FCFG1_FLASH_ERA_PW_ERASE_PW_M) >>
FCFG1_FLASH_ERA_PW_ERASE_PW_S;
value = scale_cycle_values(value, fclk_scale);
HWREG(FLASH_BASE + FLASH_O_FSM_ERA_PW) =
(HWREG(FLASH_BASE + FLASH_O_FSM_ERA_PW) &
~FLASH_FSM_ERA_PW_FSM_ERA_PW_M) |
((value << FLASH_FSM_ERA_PW_FSM_ERA_PW_S) &
FLASH_FSM_ERA_PW_FSM_ERA_PW_M);
/* Configure no of flash clock cycles from EXECUTEZ going low to the the
verify data can be read in the program verify mode bits 7:0. */
/* (FCFG1 offset 0x174 bits 23:16). */
value = (HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_C_E_P_R) &
FCFG1_FLASH_C_E_P_R_PV_ACCESS_M) >>
FCFG1_FLASH_C_E_P_R_PV_ACCESS_S;
value = scale_cycle_values(value, fclk_scale);
HWREG(FLASH_BASE + FLASH_O_FSM_EX_VAL) =
(HWREG(FLASH_BASE + FLASH_O_FSM_EX_VAL) &
~FLASH_FSM_EX_VAL_EXE_VALD_M) |
((value << FLASH_FSM_EX_VAL_EXE_VALD_S) &
FLASH_FSM_EX_VAL_EXE_VALD_M);
/* Configure the number of flash clocks from the start of the Read mode at
the end of the operations until the FSM clears the BUSY bit in FMSTAT. */
/* (FCFG1 offset 0x178 bits 23:16). */
value = (HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_P_R_PV) &
FCFG1_FLASH_P_R_PV_RH_M) >>
FCFG1_FLASH_P_R_PV_RH_S;
HWREG(FLASH_BASE + FLASH_O_FSM_RD_H) =
(HWREG(FLASH_BASE + FLASH_O_FSM_RD_H) &
~FLASH_FSM_RD_H_RD_H_M) |
((value << FLASH_FSM_RD_H_RD_H_S) &
FLASH_FSM_RD_H_RD_H_M);
/* Configure Program hold time */
/* (FCFG1 offset 0x178 bits 31:24). */
value = (HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_P_R_PV) &
FCFG1_FLASH_P_R_PV_PH_M) >>
FCFG1_FLASH_P_R_PV_PH_S;
value = scale_cycle_values(value, fclk_scale);
HWREG(FLASH_BASE + FLASH_O_FSM_P_OH) =
(HWREG(FLASH_BASE + FLASH_O_FSM_P_OH) &
~FLASH_FSM_P_OH_PGM_OH_M) |
((value << FLASH_FSM_P_OH_PGM_OH_S) &
FLASH_FSM_P_OH_PGM_OH_M);
/* Configure Erase hold time */
/* (FCFG1 offset 0x17C bits 31:24). */
value = (HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_EH_SEQ) &
FCFG1_FLASH_EH_SEQ_EH_M) >>
FCFG1_FLASH_EH_SEQ_EH_S;
value = scale_cycle_values(value, fclk_scale);
HWREG(FLASH_BASE + FLASH_O_FSM_ERA_OH) =
(HWREG(FLASH_BASE + FLASH_O_FSM_ERA_OH) &
~FLASH_FSM_ERA_OH_ERA_OH_M) |
((value << FLASH_FSM_ERA_OH_ERA_OH_S) &
FLASH_FSM_ERA_OH_ERA_OH_M);
/* Configure Program verify row switch time */
/* (FCFG1 offset0x178 bits 15:8). */
value = (HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_P_R_PV) &
FCFG1_FLASH_P_R_PV_PVH_M) >>
FCFG1_FLASH_P_R_PV_PVH_S;
value = scale_cycle_values(value, fclk_scale);
HWREG(FLASH_BASE + FLASH_O_FSM_PE_VH) =
(HWREG(FLASH_BASE + FLASH_O_FSM_PE_VH) &
~FLASH_FSM_PE_VH_PGM_VH_M) |
((value << FLASH_FSM_PE_VH_PGM_VH_S) &
FLASH_FSM_PE_VH_PGM_VH_M);
/* Configure Program Operation Setup time */
/* (FCFG1 offset 0x170 bits 31:24). */
value = (HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_E_P) &
FCFG1_FLASH_E_P_PSU_M) >>
FCFG1_FLASH_E_P_PSU_S;
HWREG(FLASH_BASE + FLASH_O_FSM_PE_OSU) =
(HWREG(FLASH_BASE + FLASH_O_FSM_PE_OSU) &
~FLASH_FSM_PE_OSU_PGM_OSU_M) |
((value << FLASH_FSM_PE_OSU_PGM_OSU_S) &
FLASH_FSM_PE_OSU_PGM_OSU_M);
/* Configure Erase Operation Setup time */
/* (FCGF1 offset 0x170 bits 23:16). */
value = (HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_E_P) &
FCFG1_FLASH_E_P_ESU_M) >>
FCFG1_FLASH_E_P_ESU_S;
HWREG(FLASH_BASE + FLASH_O_FSM_PE_OSU) =
(HWREG(FLASH_BASE + FLASH_O_FSM_PE_OSU) &
~FLASH_FSM_PE_OSU_ERA_OSU_M) |
((value << FLASH_FSM_PE_OSU_ERA_OSU_S) &
FLASH_FSM_PE_OSU_ERA_OSU_M);
/* Confgure Program Verify Setup time */
/* (FCFG1 offset 0x170 bits 15:8). */
value = (HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_E_P) &
FCFG1_FLASH_E_P_PVSU_M) >>
FCFG1_FLASH_E_P_PVSU_S;
HWREG(FLASH_BASE + FLASH_O_FSM_PE_VSU) =
(HWREG(FLASH_BASE + FLASH_O_FSM_PE_VSU) &
~FLASH_FSM_PE_VSU_PGM_VSU_M) |
((value << FLASH_FSM_PE_VSU_PGM_VSU_S) &
FLASH_FSM_PE_VSU_PGM_VSU_M);
/* Configure Erase Verify Setup time */
/* (FCFG1 offset 0x170 bits 7:0). */
value = (HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_E_P) &
FCFG1_FLASH_E_P_EVSU_M) >>
FCFG1_FLASH_E_P_EVSU_S;
HWREG(FLASH_BASE + FLASH_O_FSM_PE_VSU) =
(HWREG(FLASH_BASE + FLASH_O_FSM_PE_VSU) &
~FLASH_FSM_PE_VSU_ERA_VSU_M) |
((value << FLASH_FSM_PE_VSU_ERA_VSU_S) &
FLASH_FSM_PE_VSU_ERA_VSU_M);
/* Configure Addr to EXECUTEZ low setup time */
/* (FCFG1 offset 0x174 bits 15:12). */
value = (HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_C_E_P_R) &
FCFG1_FLASH_C_E_P_R_A_EXEZ_SETUP_M) >>
FCFG1_FLASH_C_E_P_R_A_EXEZ_SETUP_S;
HWREG(FLASH_BASE + FLASH_O_FSM_CMP_VSU) =
(HWREG(FLASH_BASE + FLASH_O_FSM_CMP_VSU) &
~FLASH_FSM_CMP_VSU_ADD_EXZ_M) |
((value << FLASH_FSM_CMP_VSU_ADD_EXZ_S) &
FLASH_FSM_CMP_VSU_ADD_EXZ_M);
/* Configure Voltage Status Count */
/* (FCFG1 offset 0x17C bits 15:12). */
value = (HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_EH_SEQ) &
FCFG1_FLASH_EH_SEQ_VSTAT_M) >>
FCFG1_FLASH_EH_SEQ_VSTAT_S;
HWREG(FLASH_BASE + FLASH_O_FSM_VSTAT) =
(HWREG(FLASH_BASE + FLASH_O_FSM_VSTAT) &
~FLASH_FSM_VSTAT_VSTAT_CNT_M) |
((value << FLASH_FSM_VSTAT_VSTAT_CNT_S) &
FLASH_FSM_VSTAT_VSTAT_CNT_M);
/* Configure Repeat Verify action setup */
/* (FCFG1 offset 0x174 bits 31:24). */
value = (HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_C_E_P_R) &
FCFG1_FLASH_C_E_P_R_RVSU_M) >>
FCFG1_FLASH_C_E_P_R_RVSU_S;
HWREG(FLASH_BASE + FLASH_O_FSM_EX_VAL) =
(HWREG(FLASH_BASE + FLASH_O_FSM_EX_VAL) &
~FLASH_FSM_EX_VAL_REP_VSU_M) |
((value << FLASH_FSM_EX_VAL_REP_VSU_S) &
FLASH_FSM_EX_VAL_REP_VSU_M);
/* Configure Maximum Programming Pulses */
/* (FCFG1 offset 0x184 bits 15:0). */
value = (HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_PP) &
FCFG1_FLASH_PP_MAX_PP_M) >>
FCFG1_FLASH_PP_MAX_PP_S;
HWREG(FLASH_BASE + FLASH_O_FSM_PRG_PUL) =
(HWREG(FLASH_BASE + FLASH_O_FSM_PRG_PUL) &
~FLASH_FSM_PRG_PUL_MAX_PRG_PUL_M) |
((value << FLASH_FSM_PRG_PUL_MAX_PRG_PUL_S) &
FLASH_FSM_PRG_PUL_MAX_PRG_PUL_M);
/* Configure Beginning level for VHVCT used during erase modes */
/* (FCFG1 offset 0x180 bits 31:16). */
value = (HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_VHV_E) &
FCFG1_FLASH_VHV_E_VHV_E_START_M) >>
FCFG1_FLASH_VHV_E_VHV_E_START_S;
HWREG(FLASH_BASE + FLASH_O_FSM_PRG_PUL) =
(HWREG(FLASH_BASE + FLASH_O_FSM_PRG_PUL) &
~FLASH_FSM_PRG_PUL_BEG_EC_LEVEL_M) |
((value << FLASH_FSM_PRG_PUL_BEG_EC_LEVEL_S) &
FLASH_FSM_PRG_PUL_BEG_EC_LEVEL_M);
/* Configure Maximum EC Level */
/* (FCFG1 offset 0x2B0 bits 21:18). */
value = (HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_OTP_DATA3) &
FCFG1_FLASH_OTP_DATA3_MAX_EC_LEVEL_M) >>
FCFG1_FLASH_OTP_DATA3_MAX_EC_LEVEL_S;
HWREG(FLASH_BASE + FLASH_O_FSM_ERA_PUL) =
(HWREG(FLASH_BASE + FLASH_O_FSM_ERA_PUL) &
~FLASH_FSM_ERA_PUL_MAX_EC_LEVEL_M) |
((value << FLASH_FSM_ERA_PUL_MAX_EC_LEVEL_S) &
FLASH_FSM_ERA_PUL_MAX_EC_LEVEL_M);
/* Configure Maximum Erase Pulses */
/* (FCFG1 offset 0x188 bits 31:16). */
value = (HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_PROG_EP) &
FCFG1_FLASH_PROG_EP_MAX_EP_M) >>
FCFG1_FLASH_PROG_EP_MAX_EP_S;
HWREG(FLASH_BASE + FLASH_O_FSM_ERA_PUL) =
(HWREG(FLASH_BASE + FLASH_O_FSM_ERA_PUL) &
~FLASH_FSM_ERA_PUL_MAX_ERA_PUL_M) |
((value << FLASH_FSM_ERA_PUL_MAX_ERA_PUL_S) &
FLASH_FSM_ERA_PUL_MAX_ERA_PUL_M);
/* Configure the VHVCT Step Size. This is the number of erase pulses that
must be completed for each level before the FSM increments the
CUR_EC_LEVEL to the next higher level. Actual erase pulses per level
equals (EC_STEP_SIZE +1). The stepping is only needed for the VHVCT
voltage. */
/* (FCFG1 offset 0x2B0 bits 31:23). */
value = (HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_OTP_DATA3) &
FCFG1_FLASH_OTP_DATA3_EC_STEP_SIZE_M) >>
FCFG1_FLASH_OTP_DATA3_EC_STEP_SIZE_S;
HWREG(FLASH_BASE + FLASH_O_FSM_STEP_SIZE) =
(HWREG(FLASH_BASE + FLASH_O_FSM_STEP_SIZE) &
~FLASH_FSM_STEP_SIZE_EC_STEP_SIZE_M) |
((value << FLASH_FSM_STEP_SIZE_EC_STEP_SIZE_S) &
FLASH_FSM_STEP_SIZE_EC_STEP_SIZE_M);
/* Configure the hight of each EC step. This is the number of counts that
the CUR_EC_LEVEL will increment when going to a new level. Actual count
size equals (EC_STEP_HEIGHT + 1). The stepping applies only to the VHVCT
voltage.
The read trim value is decremented by 1 before written to the register
since actual counts equals (register value + 1). */
/* (FCFG1 offset 0x180 bits 15:0). */
value = (HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_VHV_E) &
FCFG1_FLASH_VHV_E_VHV_E_STEP_HIGHT_M) >>
FCFG1_FLASH_VHV_E_VHV_E_STEP_HIGHT_S;
HWREG(FLASH_BASE + FLASH_O_FSM_EC_STEP_HEIGHT) = ((value - 1) &
FLASH_FSM_EC_STEP_HEIGHT_EC_STEP_HEIGHT_M);
/* Configure Precondition used in erase operations */
/* (FCFG1 offset 0x2B0 bit 22). */
value = (HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_OTP_DATA3) &
FCFG1_FLASH_OTP_DATA3_DO_PRECOND_M) >>
FCFG1_FLASH_OTP_DATA3_DO_PRECOND_S;
HWREG(FLASH_BASE + FLASH_O_FSM_ST_MACHINE) =
(HWREG(FLASH_BASE + FLASH_O_FSM_ST_MACHINE) &
~FLASH_FSM_ST_MACHINE_DO_PRECOND_M) |
((value << FLASH_FSM_ST_MACHINE_DO_PRECOND_S) &
FLASH_FSM_ST_MACHINE_DO_PRECOND_M);
/* Enable the recommended Good Time function. */
HWREG(FLASH_BASE + FLASH_O_FSM_ST_MACHINE) |=
FLASH_FSM_ST_MACHINE_ONE_TIME_GOOD;
/* Disable write access to FSM registers. */
HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_DISABLE;
/* Configure the voltage registers */
/* Unlock voltage registers (0x2080 - 0x2098). */
HWREG(FLASH_BASE + FLASH_O_FLOCK) = 0xAAAA;
/* Configure voltage level for the specified pump voltage of high
voltage supply input during erase operation VHVCT_E and TRIM13_E */
/* (FCFG1 offset 0x190 bits[3:0] and bits[11:8]). */
temp_val = HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_VHV);
value = ((temp_val & FCFG1_FLASH_VHV_TRIM13_E_M)>>
FCFG1_FLASH_VHV_TRIM13_E_S) << FLASH_FVHVCT1_TRIM13_E_S;
value |= ((temp_val & FCFG1_FLASH_VHV_VHV_E_M)>>
FCFG1_FLASH_VHV_VHV_E_S) << FLASH_FVHVCT1_VHVCT_E_S;
HWREG(FLASH_BASE + FLASH_O_FVHVCT1) = (HWREG(FLASH_BASE + FLASH_O_FVHVCT1) &
~(FLASH_FVHVCT1_TRIM13_E_M | FLASH_FVHVCT1_VHVCT_E_M)) | value;
/* Configure voltage level for the specified pump voltage of high voltage
supply input during program verify operation VHVCT_PV and TRIM13_PV */
/* (OTP offset 0x194 bits[19:16] and bits[27:24]). */
temp_val = HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_VHV_PV);
value = ((temp_val & FCFG1_FLASH_VHV_PV_TRIM13_PV_M) >>
FCFG1_FLASH_VHV_PV_TRIM13_PV_S) << FLASH_FVHVCT1_TRIM13_PV_S;
value |= ((temp_val & FCFG1_FLASH_VHV_PV_VHV_PV_M) >>
FCFG1_FLASH_VHV_PV_VHV_PV_S) << FLASH_FVHVCT1_VHVCT_PV_S;
HWREG(FLASH_BASE + FLASH_O_FVHVCT1) = (HWREG(FLASH_BASE + FLASH_O_FVHVCT1) &
~(FLASH_FVHVCT1_TRIM13_PV_M | FLASH_FVHVCT1_VHVCT_PV_M)) | value;
/* Configure voltage level for the specified pump voltage of high voltage
supply input during program operation VHVCT_P and TRIM13_P */
/* (FCFG1 offset 0x190 bits[19:16] and bits[27:24]). */
temp_val = HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_VHV);
value = ((temp_val & FCFG1_FLASH_VHV_TRIM13_P_M) >>
FCFG1_FLASH_VHV_TRIM13_P_S) << FLASH_FVHVCT2_TRIM13_P_S;
value |= ((temp_val & FCFG1_FLASH_VHV_VHV_P_M) >>
FCFG1_FLASH_VHV_VHV_P_S) << FLASH_FVHVCT2_VHVCT_P_S;
HWREG(FLASH_BASE + FLASH_O_FVHVCT2) = (HWREG(FLASH_BASE + FLASH_O_FVHVCT2) &
~(FLASH_FVHVCT2_TRIM13_P_M | FLASH_FVHVCT2_VHVCT_P_M)) | value;
/* Configure voltage level for the specified pump voltage of wordline power
supply for read mode */
/* (FCFG1 offset 0x198 Bits 15:8). */
value = (HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_V) &
FCFG1_FLASH_V_V_READ_M) >> FCFG1_FLASH_V_V_READ_S;
HWREG(FLASH_BASE + FLASH_O_FVREADCT) =
(HWREG(FLASH_BASE + FLASH_O_FVREADCT) &
~FLASH_FVREADCT_VREADCT_M) |
((value << FLASH_FVREADCT_VREADCT_S) &
FLASH_FVREADCT_VREADCT_M);
/* Configure the voltage level for the VCG 2.5 CT pump voltage */
/* (FCFG1 offset 0x194 bits 15:8). */
value = (HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_VHV_PV) &
FCFG1_FLASH_VHV_PV_VCG2P5_M) >>
FCFG1_FLASH_VHV_PV_VCG2P5_S;
HWREG(FLASH_BASE + FLASH_O_FVNVCT) =
(HWREG(FLASH_BASE + FLASH_O_FVNVCT) &
~FLASH_FVNVCT_VCG2P5CT_M) |
((value << FLASH_FVNVCT_VCG2P5CT_S) &
FLASH_FVNVCT_VCG2P5CT_M);
/* Configure the voltage level for the specified pump voltage of high
current power input during program operation */
/* (FCFG1 offset 0x198 bits 31:24). */
value = (HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_V) &
FCFG1_FLASH_V_VSL_P_M) >>
FCFG1_FLASH_V_VSL_P_S;
HWREG(FLASH_BASE + FLASH_O_FVSLP) =
(HWREG(FLASH_BASE + FLASH_O_FVSLP) &
~FLASH_FVSLP_VSL_P_M) |
((value << FLASH_FVSLP_VSL_P_S) &
FLASH_FVSLP_VSL_P_M);
/* Configure the voltage level for the specified pump voltage of wordline
power supply during programming operations */
/* (OTP offset 0x198 bits 23:16). */
value = (HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_V) &
FCFG1_FLASH_V_VWL_P_M) >>
FCFG1_FLASH_V_VWL_P_S;
HWREG(FLASH_BASE + FLASH_O_FVWLCT) =
(HWREG(FLASH_BASE + FLASH_O_FVWLCT) &
~FLASH_FVWLCT_VWLCT_P_M) |
((value << FLASH_FVWLCT_VWLCT_P_S) &
FLASH_FVWLCT_VWLCT_P_M);
/* Configure the pump's TRIM_1P7 port pins. */
/* (FCFG1 offset 0x2B0 bits 17:16). */
value = (HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_OTP_DATA3) &
FCFG1_FLASH_OTP_DATA3_TRIM_1P7_M) >>
FCFG1_FLASH_OTP_DATA3_TRIM_1P7_S;
HWREG(FLASH_BASE + FLASH_O_FSEQPMP) =
(HWREG(FLASH_BASE + FLASH_O_FSEQPMP) &
~FLASH_FSEQPMP_TRIM_1P7_M) |
((value << FLASH_FSEQPMP_TRIM_1P7_S) &
FLASH_FSEQPMP_TRIM_1P7_M);
/* Lock the voltage registers. */
HWREG(FLASH_BASE + FLASH_O_FLOCK) = 0x55AA;
/* Set trimmed flag. */
HWREG(FLASH_BASE + FLASH_O_FWLOCK) = 5;
HWREG(FLASH_BASE + FLASH_O_FWFLAG) |= FW_WRT_TRIMMED;
HWREG(FLASH_BASE + FLASH_O_FWLOCK) = 0;
}
/******************************************************************************
*
* Used to scale the TI OTP values based on the FClk scaling value.
*
******************************************************************************/
static uint32_t scale_cycle_values(uint32_t specified_timing,
uint32_t scale_value)
{
uint32_t scaled_value = (specified_timing * scale_value) >> 6;
return scaled_value;
}
/******************************************************************************
*
* Used to set flash in read mode.
*
* Flash is configured with values loaded from OTP dependent on the current
* regulator mode.
*
******************************************************************************/
static void set_read_mode(void)
{
uint32_t trim_value;
uint32_t value;
/* Configure the STANDBY_MODE_SEL, STANDBY_PW_SEL, DIS_STANDBY, DIS_IDLE,
VIN_AT_X and VIN_BY_PASS for read mode */
if (HWREG(AON_PMCTL_BASE + AON_PMCTL_O_PWRCTL) &
AON_PMCTL_PWRCTL_EXT_REG_MODE) {
/* Select trim values for external regulator mode:
Configure STANDBY_MODE_SEL (OTP offset 0x308 bit 7)
Configure STANDBY_PW_SEL (OTP offset 0x308 bit 6:5)
Must be done while the register bit field CONFIG.DIS_STANDBY = 1 */
HWREG(FLASH_BASE + FLASH_O_CFG) |= FLASH_CFG_DIS_STANDBY;
trim_value =
HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_OTP_DATA4);
value = ((trim_value &
FCFG1_FLASH_OTP_DATA4_STANDBY_MODE_SEL_EXT_RD_M) >>
FCFG1_FLASH_OTP_DATA4_STANDBY_MODE_SEL_EXT_RD_S) <<
FLASH_CFG_STANDBY_MODE_SEL_S;
value |= ((trim_value &
FCFG1_FLASH_OTP_DATA4_STANDBY_PW_SEL_EXT_RD_M) >>
FCFG1_FLASH_OTP_DATA4_STANDBY_PW_SEL_EXT_RD_S) <<
FLASH_CFG_STANDBY_PW_SEL_S;
/* Configure DIS_STANDBY (OTP offset 0x308 bit 4).
Configure DIS_IDLE (OTP offset 0x308 bit 3). */
value |= ((trim_value &
(FCFG1_FLASH_OTP_DATA4_DIS_STANDBY_EXT_RD_M |
FCFG1_FLASH_OTP_DATA4_DIS_IDLE_EXT_RD_M)) >>
FCFG1_FLASH_OTP_DATA4_DIS_IDLE_EXT_RD_S) <<
FLASH_CFG_DIS_IDLE_S;
HWREG(FLASH_BASE + FLASH_O_CFG) = (HWREG(FLASH_BASE + FLASH_O_CFG) &
~(FLASH_CFG_STANDBY_MODE_SEL_M | FLASH_CFG_STANDBY_PW_SEL_M |
FLASH_CFG_DIS_STANDBY_M | FLASH_CFG_DIS_IDLE_M)) | value;
/* Check if sample and hold functionality is disabled. */
if (HWREG(FLASH_BASE + FLASH_O_CFG) & FLASH_CFG_DIS_IDLE) {
/* Wait for disabled sample and hold functionality to be stable. */
while (!(HWREG(FLASH_BASE+FLASH_O_STAT) & FLASH_STAT_SAMHOLD_DIS))
;
}
/* Configure VIN_AT_X (OTP offset 0x308 bits 2:0) */
value = ((trim_value &
FCFG1_FLASH_OTP_DATA4_VIN_AT_X_EXT_RD_M) >>
FCFG1_FLASH_OTP_DATA4_VIN_AT_X_EXT_RD_S) <<
FLASH_FSEQPMP_VIN_AT_X_S;
/* Configure VIN_BY_PASS which is dependent on the VIN_AT_X value.
If VIN_AT_X = 7 then VIN_BY_PASS should be 0 otherwise
VIN_BY_PASS should be 1 */
if (((value & FLASH_FSEQPMP_VIN_AT_X_M) >>
FLASH_FSEQPMP_VIN_AT_X_S) != 0x7)
value |= FLASH_FSEQPMP_VIN_BY_PASS;
HWREG(FLASH_BASE + FLASH_O_FLOCK) = 0xAAAA;
HWREG(FLASH_BASE + FLASH_O_FSEQPMP) =
(HWREG(FLASH_BASE + FLASH_O_FSEQPMP) &
~(FLASH_FSEQPMP_VIN_BY_PASS_M |
FLASH_FSEQPMP_VIN_AT_X_M)) | value;
HWREG(FLASH_BASE + FLASH_O_FLOCK) = 0x55AA;
} else {
/* Select trim values for internal regulator mode:
Configure STANDBY_MODE_SEL (OTP offset 0x308 bit 15)
COnfigure STANDBY_PW_SEL (OTP offset 0x308 bit 14:13)
Must be done while the register bit field CONFIG.DIS_STANDBY = 1 */
HWREG(FLASH_BASE + FLASH_O_CFG) |= FLASH_CFG_DIS_STANDBY;
trim_value =
HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_OTP_DATA4);
value = ((trim_value &
FCFG1_FLASH_OTP_DATA4_STANDBY_MODE_SEL_INT_RD_M) >>
FCFG1_FLASH_OTP_DATA4_STANDBY_MODE_SEL_INT_RD_S) <<
FLASH_CFG_STANDBY_MODE_SEL_S;
value |= ((trim_value &
FCFG1_FLASH_OTP_DATA4_STANDBY_PW_SEL_INT_RD_M) >>
FCFG1_FLASH_OTP_DATA4_STANDBY_PW_SEL_INT_RD_S) <<
FLASH_CFG_STANDBY_PW_SEL_S;
/* Configure DIS_STANDBY (OTP offset 0x308 bit 12).
Configure DIS_IDLE (OTP offset 0x308 bit 11). */
value |= ((trim_value &
(FCFG1_FLASH_OTP_DATA4_DIS_STANDBY_INT_RD_M |
FCFG1_FLASH_OTP_DATA4_DIS_IDLE_INT_RD_M)) >>
FCFG1_FLASH_OTP_DATA4_DIS_IDLE_INT_RD_S) <<
FLASH_CFG_DIS_IDLE_S;
HWREG(FLASH_BASE + FLASH_O_CFG) = (HWREG(FLASH_BASE + FLASH_O_CFG) &
~(FLASH_CFG_STANDBY_MODE_SEL_M | FLASH_CFG_STANDBY_PW_SEL_M |
FLASH_CFG_DIS_STANDBY_M | FLASH_CFG_DIS_IDLE_M)) | value;
/* Check if sample and hold functionality is disabled. */
if (HWREG(FLASH_BASE + FLASH_O_CFG) & FLASH_CFG_DIS_IDLE) {
/* Wait for disabled sample and hold functionality to be stable. */
while (!(HWREG(FLASH_BASE + FLASH_O_STAT) & FLASH_STAT_SAMHOLD_DIS))
;
}
/* Configure VIN_AT_X (OTP offset 0x308 bits 10:8) */
value = (((trim_value &
FCFG1_FLASH_OTP_DATA4_VIN_AT_X_INT_RD_M) >>
FCFG1_FLASH_OTP_DATA4_VIN_AT_X_INT_RD_S) <<
FLASH_FSEQPMP_VIN_AT_X_S);
/* Configure VIN_BY_PASS which is dependent on the VIN_AT_X value.
If VIN_AT_X = 7 then VIN_BY_PASS should be 0 otherwise
VIN_BY_PASS should be 1 */
if (((value & FLASH_FSEQPMP_VIN_AT_X_M) >>
FLASH_FSEQPMP_VIN_AT_X_S) != 0x7)
value |= FLASH_FSEQPMP_VIN_BY_PASS;
HWREG(FLASH_BASE + FLASH_O_FLOCK) = 0xAAAA;
HWREG(FLASH_BASE + FLASH_O_FSEQPMP) =
(HWREG(FLASH_BASE + FLASH_O_FSEQPMP) &
~(FLASH_FSEQPMP_VIN_BY_PASS_M |
FLASH_FSEQPMP_VIN_AT_X_M)) | value;
HWREG(FLASH_BASE + FLASH_O_FLOCK) = 0x55AA;
}
}
/******************************************************************************
*
* Used to set flash in write mode.
*
* Flash is configured with values loaded from OTP dependent on the current
* regulator mode.
*
******************************************************************************/
static void set_write_mode(void)
{
uint32_t trim_value;
uint32_t value;
/* Configure the STANDBY_MODE_SEL, STANDBY_PW_SEL, DIS_STANDBY, DIS_IDLE,
VIN_AT_X and VIN_BY_PASS for program/erase mode */
if (HWREG(AON_PMCTL_BASE + AON_PMCTL_O_PWRCTL) &
AON_PMCTL_PWRCTL_EXT_REG_MODE) {
/* Select trim values for external regulator mode:
Configure STANDBY_MODE_SEL (OTP offset 0x308 bit 23)
Configure STANDBY_PW_SEL (OTP offset 0x308 bit 22:21)
Must be done while the register bit field CONFIG.DIS_STANDBY = 1 */
HWREG(FLASH_BASE + FLASH_O_CFG) |= FLASH_CFG_DIS_STANDBY;
trim_value =
HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_OTP_DATA4);
value = ((trim_value &
FCFG1_FLASH_OTP_DATA4_STANDBY_MODE_SEL_EXT_WRT_M) >>
FCFG1_FLASH_OTP_DATA4_STANDBY_MODE_SEL_EXT_WRT_S) <<
FLASH_CFG_STANDBY_MODE_SEL_S;
value |= ((trim_value &
FCFG1_FLASH_OTP_DATA4_STANDBY_PW_SEL_EXT_WRT_M) >>
FCFG1_FLASH_OTP_DATA4_STANDBY_PW_SEL_EXT_WRT_S) <<
FLASH_CFG_STANDBY_PW_SEL_S;
/* Configure DIS_STANDBY (OTP offset 0x308 bit 20).
Configure DIS_IDLE (OTP offset 0x308 bit 19). */
value |= ((trim_value &
(FCFG1_FLASH_OTP_DATA4_DIS_STANDBY_EXT_WRT_M |
FCFG1_FLASH_OTP_DATA4_DIS_IDLE_EXT_WRT_M)) >>
FCFG1_FLASH_OTP_DATA4_DIS_IDLE_EXT_WRT_S) <<
FLASH_CFG_DIS_IDLE_S;
HWREG(FLASH_BASE + FLASH_O_CFG) = (HWREG(FLASH_BASE + FLASH_O_CFG) &
~(FLASH_CFG_STANDBY_MODE_SEL_M | FLASH_CFG_STANDBY_PW_SEL_M |
FLASH_CFG_DIS_STANDBY_M | FLASH_CFG_DIS_IDLE_M)) | value;
/* Check if sample and hold functionality is disabled. */
if (HWREG(FLASH_BASE + FLASH_O_CFG) & FLASH_CFG_DIS_IDLE) {
/* Wait for disabled sample and hold functionality to be stable. */
while (!(HWREG(FLASH_BASE + FLASH_O_STAT) & FLASH_STAT_SAMHOLD_DIS))
;
}
/* Configure VIN_AT_X (OTP offset 0x308 bits 18:16) */
value = ((trim_value &
FCFG1_FLASH_OTP_DATA4_VIN_AT_X_EXT_WRT_M) >>
FCFG1_FLASH_OTP_DATA4_VIN_AT_X_EXT_WRT_S) <<
FLASH_FSEQPMP_VIN_AT_X_S;
/* Configure VIN_BY_PASS which is dependent on the VIN_AT_X value.
If VIN_AT_X = 7 then VIN_BY_PASS should be 0 otherwise
VIN_BY_PASS should be 1 */
if (((value & FLASH_FSEQPMP_VIN_AT_X_M) >>
FLASH_FSEQPMP_VIN_AT_X_S) != 0x7)
value |= FLASH_FSEQPMP_VIN_BY_PASS;
HWREG(FLASH_BASE + FLASH_O_FLOCK) = 0xAAAA;
HWREG(FLASH_BASE + FLASH_O_FSEQPMP) =
(HWREG(FLASH_BASE + FLASH_O_FSEQPMP) &
~(FLASH_FSEQPMP_VIN_BY_PASS_M |
FLASH_FSEQPMP_VIN_AT_X_M)) | value;
HWREG(FLASH_BASE + FLASH_O_FLOCK) = 0x55AA;
} else {
/* Select trim values for internal regulator mode:
Configure STANDBY_MODE_SEL (OTP offset 0x308 bit 31)
COnfigure STANDBY_PW_SEL (OTP offset 0x308 bit 30:29)
Must be done while the register bit field CONFIG.DIS_STANDBY = 1 */
HWREG(FLASH_BASE + FLASH_O_CFG) |= FLASH_CFG_DIS_STANDBY;
trim_value =
HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_OTP_DATA4);
value = ((trim_value &
FCFG1_FLASH_OTP_DATA4_STANDBY_MODE_SEL_INT_WRT_M) >>
FCFG1_FLASH_OTP_DATA4_STANDBY_MODE_SEL_INT_WRT_S) <<
FLASH_CFG_STANDBY_MODE_SEL_S;
value |= ((trim_value &
FCFG1_FLASH_OTP_DATA4_STANDBY_PW_SEL_INT_WRT_M) >>
FCFG1_FLASH_OTP_DATA4_STANDBY_PW_SEL_INT_WRT_S) <<
FLASH_CFG_STANDBY_PW_SEL_S;
/* Configure DIS_STANDBY (OTP offset 0x308 bit 28).
Configure DIS_IDLE (OTP offset 0x308 bit 27). */
value |= ((trim_value &
(FCFG1_FLASH_OTP_DATA4_DIS_STANDBY_INT_WRT_M |
FCFG1_FLASH_OTP_DATA4_DIS_IDLE_INT_WRT_M)) >>
FCFG1_FLASH_OTP_DATA4_DIS_IDLE_INT_WRT_S) <<
FLASH_CFG_DIS_IDLE_S;
HWREG(FLASH_BASE + FLASH_O_CFG) = (HWREG(FLASH_BASE + FLASH_O_CFG) &
~(FLASH_CFG_STANDBY_MODE_SEL_M | FLASH_CFG_STANDBY_PW_SEL_M |
FLASH_CFG_DIS_STANDBY_M | FLASH_CFG_DIS_IDLE_M)) | value;
/* Check if sample and hold functionality is disabled. */
if (HWREG(FLASH_BASE + FLASH_O_CFG) & FLASH_CFG_DIS_IDLE) {
/* Wait for disabled sample and hold functionality to be stable. */
while (!(HWREG(FLASH_BASE + FLASH_O_STAT) & FLASH_STAT_SAMHOLD_DIS))
;
}
/* Configure VIN_AT_X (OTP offset 0x308 bits 26:24) */
value = ((trim_value &
FCFG1_FLASH_OTP_DATA4_VIN_AT_X_INT_WRT_M) >>
FCFG1_FLASH_OTP_DATA4_VIN_AT_X_INT_WRT_S) <<
FLASH_FSEQPMP_VIN_AT_X_S;
/* Configure VIN_BY_PASS which is dependent on the VIN_AT_X value.
If VIN_AT_X = 7 then VIN_BY_PASS should be 0 otherwise
VIN_BY_PASS should be 1 */
if (((value & FLASH_FSEQPMP_VIN_AT_X_M) >>
FLASH_FSEQPMP_VIN_AT_X_S) != 0x7)
value |= FLASH_FSEQPMP_VIN_BY_PASS;
HWREG(FLASH_BASE + FLASH_O_FLOCK) = 0xAAAA;
HWREG(FLASH_BASE + FLASH_O_FSEQPMP) =
(HWREG(FLASH_BASE + FLASH_O_FSEQPMP) &
~(FLASH_FSEQPMP_VIN_BY_PASS_M |
FLASH_FSEQPMP_VIN_AT_X_M)) | value;
HWREG(FLASH_BASE + FLASH_O_FLOCK) = 0x55AA;
}
}

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/******************************************************************************
*
* Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#ifndef OPENOCD_LOADERS_FLASH_CC26XX_FLASH_H
#define OPENOCD_LOADERS_FLASH_CC26XX_FLASH_H
#ifdef __cplusplus
extern "C"
{
#endif
#include <stdint.h>
#include <stdbool.h>
#include "hw_regs.h"
/* Location of flash in memory map */
#define FLASHMEM_BASE 0
/* Defines to access flash API calls in ROM */
#define ROM_API_TABLE ((uint32_t *) 0x10000180)
#define ROM_VERSION (ROM_API_TABLE[0])
#define ROM_API_FLASH_TABLE ((uint32_t *) (ROM_API_TABLE[10]))
#if defined(DEVICE_CC26X2)
/* Agama (CC26x2) specific definitions */
#define FLASH_ERASE_SIZE 8192
/* Agama (and Agama 1M) has a maximum of 132 flash sectors (1056KB / 8KB) */
#define FLASH_MAX_SECTOR_COUNT 132
#define FLASH_SECTOR_BASE_M 0xFFFFE000
/* Bootloader Configuration */
#define CCFG_O_BL_CONFIG 0x00001FD8
#elif defined(DEVICE_CC26X0)
/* Chameleon (CC26x0) specific definitions */
#define FLASH_ERASE_SIZE 4096
/* Chameleon has a maximum of 32 flash sectors (128KB / 4KB) */
#define FLASH_MAX_SECTOR_COUNT 32
#define FLASH_SECTOR_BASE_M 0xFFFFF000
/* Bootloader Configuration */
#define CCFG_O_BL_CONFIG 0x00000FD8
#else
#error No DEVICE defined.
#endif
/******************************************************************************
*
* Values that can be returned from the API functions
*
******************************************************************************/
#define FAPI_STATUS_SUCCESS 0x00000000 /* Function completed successfully */
#define FAPI_STATUS_FSM_BUSY 0x00000001 /* FSM is Busy */
#define FAPI_STATUS_FSM_READY 0x00000002 /* FSM is Ready */
#define FAPI_STATUS_INCORRECT_DATABUFFER_LENGTH \
0x00000003 /* Incorrect parameter value */
#define FAPI_STATUS_FSM_ERROR 0x00000004 /* Operation failed */
/******************************************************************************
*
* Define used by the flash programming and erase functions
*
******************************************************************************/
#define ADDR_OFFSET (0x1F800000 - FLASHMEM_BASE)
/******************************************************************************
*
* Define used for access to factory configuration area.
*
******************************************************************************/
#define FCFG1_OFFSET 0x1000
/******************************************************************************
*
* Define for the clock frequency input to the flash module in number of MHz
*
******************************************************************************/
#define FLASH_MODULE_CLK_FREQ 48
/******************************************************************************
*
* Defined values for Flash State Machine commands
*
******************************************************************************/
typedef enum {
FAPI_PROGRAM_DATA = 0x0002, /* Program data. */
FAPI_ERASE_SECTOR = 0x0006, /* Erase sector. */
FAPI_ERASE_BANK = 0x0008, /* Erase bank. */
FAPI_VALIDATE_SECTOR = 0x000E, /* Validate sector. */
FAPI_CLEAR_STATUS = 0x0010, /* Clear status. */
FAPI_PROGRAM_RESUME = 0x0014, /* Program resume. */
FAPI_ERASE_RESUME = 0x0016, /* Erase resume. */
FAPI_CLEAR_MORE = 0x0018, /* Clear more. */
FAPI_PROGRAM_SECTOR = 0x0020, /* Program sector. */
FAPI_ERASE_OTP = 0x0030 /* Erase OTP. */
} flash_state_command_t;
/******************************************************************************
*
* Defines for values written to the FLASH_O_FSM_WR_ENA register
*
******************************************************************************/
#define FSM_REG_WRT_ENABLE 5
#define FSM_REG_WRT_DISABLE 2
/******************************************************************************
*
* Defines for the bank power mode field the FLASH_O_FBFALLBACK register
*
******************************************************************************/
#define FBFALLBACK_SLEEP 0
#define FBFALLBACK_DEEP_STDBY 1
#define FBFALLBACK_ACTIVE 3
/******************************************************************************
*
* Defines for the bank grace period and pump grace period
*
******************************************************************************/
#define FLASH_BAGP 0x14
#define FLASH_PAGP 0x14
/******************************************************************************
*
* Defines for the FW flag bits in the FLASH_O_FWFLAG register
*
******************************************************************************/
#define FW_WRT_TRIMMED 0x00000001
/******************************************************************************
*
* Defines used by the flash programming functions
*
******************************************************************************/
typedef volatile uint8_t fwp_write_byte;
#define FWPWRITE_BYTE_ADDRESS \
((fwp_write_byte *)((FLASH_BASE + FLASH_O_FWPWRITE0)))
/******************************************************************************
*
* Define for FSM command execution
*
******************************************************************************/
#define FLASH_CMD_EXEC 0x15
/******************************************************************************
*
* Get size of a flash sector in number of bytes.
*
* This function will return the size of a flash sector in number of bytes.
*
* Returns size of a flash sector in number of bytes.
*
******************************************************************************/
static inline uint32_t flash_sector_size_get(void)
{
uint32_t sector_size_in_kbyte;
sector_size_in_kbyte = (HWREG(FLASH_BASE + FLASH_O_FCFG_B0_SSIZE0) &
FLASH_FCFG_B0_SSIZE0_B0_SECT_SIZE_M) >>
FLASH_FCFG_B0_SSIZE0_B0_SECT_SIZE_S;
/* Return flash sector size in number of bytes. */
return sector_size_in_kbyte * 1024;
}
/******************************************************************************
*
* Get the size of the flash.
*
* This function returns the size of the flash main bank in number of bytes.
*
* Returns the flash size in number of bytes.
*
******************************************************************************/
static inline uint32_t flash_size_get(void)
{
uint32_t num_of_sectors;
/* Get number of flash sectors */
num_of_sectors = (HWREG(FLASH_BASE + FLASH_O_FLASH_SIZE) &
FLASH_FLASH_SIZE_SECTORS_M) >>
FLASH_FLASH_SIZE_SECTORS_S;
/* Return flash size in number of bytes */
return num_of_sectors * flash_sector_size_get();
}
/******************************************************************************
*
* Checks if the Flash state machine has detected an error.
*
* This function returns the status of the Flash State Machine indicating if
* an error is detected or not. Primary use is to check if an Erase or
* Program operation has failed.
*
* Please note that code can not execute in flash while any part of the flash
* is being programmed or erased. This function must be called from ROM or
* SRAM while any part of the flash is being programmed or erased.
*
* Returns status of Flash state machine:
* FAPI_STATUS_FSM_ERROR
* FAPI_STATUS_SUCCESS
*
******************************************************************************/
static inline uint32_t flash_check_fsm_for_error(void)
{
if (HWREG(FLASH_BASE + FLASH_O_FMSTAT) & FLASH_FMSTAT_CSTAT)
return FAPI_STATUS_FSM_ERROR;
else
return FAPI_STATUS_SUCCESS;
}
/******************************************************************************
*
* Checks if the Flash state machine is ready.
*
* This function returns the status of the Flash State Machine indicating if
* it is ready to accept a new command or not. Primary use is to check if an
* Erase or Program operation has finished.
*
* Please note that code can not execute in flash while any part of the flash
* is being programmed or erased. This function must be called from ROM or
* SRAM while any part of the flash is being programmed or erased.
*
* Returns readiness status of Flash state machine:
* FAPI_STATUS_FSM_READY
* FAPI_STATUS_FSM_BUSY
*
******************************************************************************/
static inline uint32_t flash_check_fsm_for_ready(void)
{
if (HWREG(FLASH_BASE + FLASH_O_STAT) & FLASH_STAT_BUSY)
return FAPI_STATUS_FSM_BUSY;
else
return FAPI_STATUS_FSM_READY;
}
/******************************************************************************
*
* Erase a flash sector.
*
* This function will erase the specified flash sector. The function will
* not return until the flash sector has been erased or an error condition
* occurred. If flash top sector is erased the function will program the
* device security data bytes with default values. The device security
* data located in the customer configuration area of the flash top sector,
* must have valid values at all times. These values affect the configuration
* of the device during boot.
*
* Please note that code can not execute in flash while any part of the flash
* is being programmed or erased. This function must only be executed from ROM
* or SRAM.
*
* sector_address is the starting address in flash of the sector to be
* erased.
*
* Returns the status of the sector erase:
* FAPI_STATUS_SUCCESS : Success.
* FAPI_STATUS_INCORRECT_DATABUFFER_LENGTH : Invalid argument.
* FAPI_STATUS_FSM_ERROR : Programming error was encountered.
*
******************************************************************************/
extern uint32_t flash_sector_erase(uint32_t sector_address);
/******************************************************************************
*
* Erase all unprotected sectors in the flash main bank.
*
* This function will erase all unprotected flash sectors. The function will
* not return until the flash sectors has been erased or an error condition
* occurred. Since the flash top sector is erased the function will program
* the device security data bytes with default values. The device security
* data located in the customer configuration area of the flash top sector,
* must have valid values at all times. These values affect the configuration
* of the device during boot. The execution time of the operation increases if
* erase precondition is forced. This will cause the flash module to first
* program all 1 bits in the bank to 0 before the actual erase is started.
*
* force_precondition controls if erase precondition should be forced.
*
* Returns the status of the sector erase:
* FAPI_STATUS_SUCCESS : Success
* FAPI_STATUS_FSM_ERROR : Erase error was encountered.
*
******************************************************************************/
extern uint32_t flash_bank_erase(bool force_precondition);
/******************************************************************************
*
* Programs unprotected main bank flash sectors.
*
* This function will program a sequence of bytes into the on-chip flash.
* Programming each location consists of the result of an AND operation
* of the new data and the existing data; in other words bits that contain
* 1 can remain 1 or be changed to 0, but bits that are 0 cannot be changed
* to 1. Therefore, a byte can be programmed multiple times as long as these
* rules are followed; if a program operation attempts to change a 0 bit to
* a 1 bit, that bit will not have its value changed.
*
* This function will not return until the data has been programmed or an
* programming error has occurred.
*
* Please note that code can not execute in flash while any part of the flash
* is being programmed or erased. This function must only be executed from ROM
* or SRAM.
*
* The data_buffer pointer cannot point to flash.
*
* data_buffer is a pointer to the data to be programmed.
* address is the starting address in flash to be programmed.
* count is the number of bytes to be programmed.
*
* Returns status of the flash programming:
* FAPI_STATUS_SUCCESS : Success.
* FAPI_STATUS_INCORRECT_DATABUFFER_LENGTH : Too many bytes were requested.
* FAPI_STATUS_FSM_ERROR : Programming error was encountered.
*
******************************************************************************/
extern uint32_t flash_program(uint8_t *data_buffer, uint32_t address,
uint32_t count);
/******************************************************************************
*
* Disables all sectors for erase and programming on the active bank.
*
* This function disables all sectors for erase and programming on the active
* bank and enables the Idle Reading Power reduction mode if no low power
* mode is configured. Furthermore, an additional level of protection from
* erase is enabled.
*
* Please note that code can not execute in flash while any part of the flash
* is being programmed or erased.
*
******************************************************************************/
extern void flash_disable_sectors_for_write(void);
#ifdef __cplusplus
}
#endif
#endif /* #ifndef OPENOCD_LOADERS_FLASH_CC26XX_FLASH_H */

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/******************************************************************************
*
* Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include <stdint.h>
#include <stdbool.h>
#include "flashloader.h"
#include "flash.h"
/* Array holding erased state of the flash sectors. */
static bool g_is_erased[FLASH_MAX_SECTOR_COUNT];
extern uint8_t g_retain_buf[];
uint32_t flashloader_init(struct flash_params *params, uint8_t *buf1,
uint8_t *buf2)
{
/* Initialize params buffers */
memset((void *)params, 0, 2 * sizeof(struct flash_params));
params[0].buf_addr = (uint32_t)buf1;
params[1].buf_addr = (uint32_t)buf2;
/* Mark all sectors at "not erased" */
memset(g_is_erased, false, sizeof(g_is_erased));
return STATUS_OK;
}
uint32_t flashloader_erase_and_program(uint8_t *src, uint32_t address,
uint32_t byte_count)
{
if (byte_count > BUFFER_LEN)
return STATUS_FAILED_INVALID_ARGUMENTS;
/* Erase affected sectors */
uint32_t status = flashloader_erase_sectors(address, byte_count);
if (status != STATUS_OK)
return status;
/* Program data */
status = flashloader_program(src, address, byte_count);
return status;
}
uint32_t flashloader_program_with_retain(uint8_t *src, uint32_t address,
uint32_t byte_count)
{
#if (BUFFER_LEN > FLASH_ERASE_SIZE)
#error Buffer size cannot be larger than the flash sector size!
#endif
uint32_t first_sector_idx;
uint32_t last_sector_idx;
uint32_t status = STATUS_OK;
uint32_t i;
first_sector_idx = flashloader_address_to_sector(address);
last_sector_idx = flashloader_address_to_sector(address + byte_count - 1);
/* Mark all sectors as "not erased" before starting */
memset(g_is_erased, false, sizeof(g_is_erased));
uint32_t sec_offset = address % FLASH_ERASE_SIZE;
uint32_t curr_count;
uint32_t src_offset = 0;
for (i = first_sector_idx; i <= last_sector_idx; i++) {
/* Chop off at sector boundary if data goes into the next sector. */
curr_count = byte_count;
if ((address + byte_count) > ((i+1) * FLASH_ERASE_SIZE))
curr_count -= (address + byte_count) % FLASH_ERASE_SIZE;
/* Copy flash sector to retain buffer */
memcpy(g_retain_buf, (void *)(i * FLASH_ERASE_SIZE), FLASH_ERASE_SIZE);
/* Copy data buffer to retain buffer */
memcpy(&g_retain_buf[sec_offset], &src[src_offset], curr_count);
/* Erase and program from retain buffer */
status = flashloader_erase_and_program(g_retain_buf,
(i * FLASH_ERASE_SIZE), FLASH_ERASE_SIZE);
if (status != STATUS_OK)
return status;
address += curr_count;
sec_offset = address % FLASH_ERASE_SIZE;
byte_count -= curr_count;
src_offset += curr_count;
}
return status;
}
uint32_t flashloader_erase_all(void)
{
if (flash_bank_erase(true) != FAPI_STATUS_SUCCESS)
return STATUS_FAILED_ERASE_ALL;
memset(g_is_erased, true, sizeof(g_is_erased));
return STATUS_OK;
}
uint32_t flashloader_erase_sectors(uint32_t address, uint32_t byte_count)
{
uint32_t first_sector_idx;
uint32_t last_sector_idx;
uint32_t status;
uint32_t idx;
/* Floor address to the start of the sector and convert to sector number */
first_sector_idx = flashloader_address_to_sector(address);
last_sector_idx = flashloader_address_to_sector(address + byte_count - 1);
/* Erase given sector(s) */
for (idx = first_sector_idx; idx <= last_sector_idx; idx++) {
/* Only erase sectors that haven't already been erased */
if (g_is_erased[idx] == false) {
status = flash_sector_erase(idx * FLASH_ERASE_SIZE);
if (status != FAPI_STATUS_SUCCESS) {
status = (STATUS_FAILED_SECTOR_ERASE |
((idx << STATUS_EXT_INFO_S) & STATUS_EXT_INFO_M) |
((status << STATUS_ROM_CODE_S) & STATUS_ROM_CODE_M));
return status;
}
g_is_erased[idx] = true;
}
}
return STATUS_OK;
}
uint32_t flashloader_program(uint8_t *src, uint32_t address,
uint32_t byte_count)
{
uint32_t status = flash_program(src, address, byte_count);
if (status != FAPI_STATUS_SUCCESS) {
status = (STATUS_FAILED_PROGRAM |
((status << STATUS_ROM_CODE_S) & STATUS_ROM_CODE_M));
}
return STATUS_OK;
}

View File

@@ -0,0 +1,187 @@
/******************************************************************************
*
* Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#ifndef OPENOCD_LOADERS_FLASH_CC26XX_FLASHLOADER_H
#define OPENOCD_LOADERS_FLASH_CC26XX_FLASHLOADER_H
#include <stdint.h>
#include <stdbool.h>
#include <string.h>
#include "flash.h"
/* Number of elements in an array */
#define NELEMS(a) (sizeof(a) / sizeof(a[0]))
struct __attribute__((__packed__)) flash_params {
uint32_t dest; /* Destination address in flash */
uint32_t len; /* Number of bytes */
uint32_t cmd; /* Command */
uint32_t full; /* Handshake signal. Is buffer ready? */
uint32_t buf_addr; /* Address of data buffer. */
};
typedef enum {
CMD_NO_ACTION = 0, /* No action, default value */
CMD_ERASE_ALL = 1, /* Erase all unprotected sectors */
CMD_PROGRAM = 2, /* Program data */
CMD_ERASE_AND_PROGRAM = 3, /* Erase and program data */
CMD_ERASE_AND_PROGRAM_WITH_RETAIN = 4, /* Erase and program, but retain */
/* sector data outside given range */
CMD_ERASE_SECTORS = 5 /* Erase unprotected sectors */
} flash_commands_t;
typedef enum {
BUFFER_EMPTY = 0x0, /* No data in buffer, flags last task complete */
BUFFER_FULL = 0xFFFFFFFF /* Buffer has data, flags next task to start */
} flash_handshake_t;
#define STATUS_FLASHLOADER_STATUS_M 0x0000FFFF
#define STATUS_FLASHLOADER_STATUS_S 0
#define STATUS_ROM_CODE_M 0x00FF0000
#define STATUS_ROM_CODE_S 16
#define STATUS_EXT_INFO_M 0xFF000000
#define STATUS_EXT_INFO_S 24
typedef enum {
STATUS_OK = 0,
STATUS_FAILED_ERASE_ALL = 0x101,
STATUS_FAILED_SECTOR_ERASE = 0x102,
STATUS_FAILED_PROGRAM = 0x103,
STATUS_FAILED_INVALID_ARGUMENTS = 0x104,
STATUS_FAILED_UNKNOWN_COMMAND = 0x105,
} flash_status_t;
/* The buffer size used by the flashloader. The size of 1 flash sector. */
#define BUFFER_LEN FLASH_ERASE_SIZE
/*
* This function initializes the flashloader. The application must
* allocate memory for the two data buffers and the flash_params structures.
*
* params Pointer an flash_params array with 2 elements.
* buf1 Pointer to data buffer 1
* buf2 Pointer to data buffer 2
*
* Returns STATUS_OK
*
*/
extern uint32_t flashloader_init(struct flash_params *params, uint8_t *buf1,
uint8_t *buf2);
/*
* Erase and program the necessary sectors. Data outside the given
* range will be deleted.
*
* src Pointer to buffer containing the data.
* address Start address in device flash
* byte_count The number of bytes to program
*
* Returns STATUS_OK on success. For status on failure:
* See flashloader_program() and flashloader_erase_sectors().
*
*/
extern uint32_t flashloader_erase_and_program(uint8_t *src, uint32_t address,
uint32_t byte_count);
/*
* Erase and program the device sectors. Data outside the given
* data range will be kept unchanged.
*
* src Pointer to buffer containing the data.
* address Start address in device flash
* byte_count The number of bytes to program
*
* Returns STATUS_OK on success. For status on failure:
* See flashloader_program() and flashloader_erase_sectors().
*
*/
extern uint32_t flashloader_program_with_retain(uint8_t *src, uint32_t address,
uint32_t byte_count);
/*
* Erases all flash sectors (that are not write-protected).
*
* Returns STATUS_OK on success.
*
*/
extern uint32_t flashloader_erase_all(void);
/*
* Erases the flash sectors affected by the given range.
*
* This function only erases sectors that are not already erased.
*
* start_addr The first address in the range.
* byte_count The number of bytes in the range.
*
* Returns STATUS_OK on success. Returns a combined status on failure:
* [31:24] The sector that failed.
* [23:16] ROM function status code. 0 means success.
* [16: 0] STATUS_FAILED_SECTOR_ERASE
*
*/
extern uint32_t flashloader_erase_sectors(uint32_t start_addr,
uint32_t byte_count);
/*
* Program the given range.
*
* This function does not erase anything, it assumes the sectors are ready to
* be programmed.
*
* src Pointer to buffer containing the data.
* address Start address in device flash
* byte_count The number of bytes to program
*
* Returns STATUS_OK on success. Returns a combined status value on failure:
* [31:16] ROM function status code. 0 means success.
* [15:0 ] STATUS_FAILED_PROGRAM
*
*/
extern uint32_t flashloader_program(uint8_t *src, uint32_t address,
uint32_t byte_count);
/*
* Convert the input address into a sector number.
*
* address The address.
*
* Returns the flash sector which the address resides in. The first sector
* is sector 0.
*
*/
static inline uint32_t flashloader_address_to_sector(uint32_t address)
{ return (address / FLASH_ERASE_SIZE); };
#endif /* #ifndef OPENOCD_LOADERS_FLASH_CC26XX_FLASHLOADER_H */

File diff suppressed because it is too large Load Diff

View File

@@ -0,0 +1,179 @@
/******************************************************************************
*
* Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include <stdint.h>
#include <stdbool.h>
#include "flashloader.h"
/* Data buffers used by host to communicate with flashloader */
/* Flashloader parameter structure. */
__attribute__ ((section(".buffers.g_cfg")))
volatile struct flash_params g_cfg[2];
/* Data buffer 1. */
__attribute__ ((section(".buffers.g_buf1")))
uint8_t g_buf1[BUFFER_LEN];
/* Data buffer 2. */
__attribute__ ((section(".buffers.g_buf2")))
uint8_t g_buf2[BUFFER_LEN];
/* Buffer used for program with retain feature */
__attribute__ ((section(".buffers.g_retain_buf")))
uint8_t g_retain_buf[BUFFER_LEN];
uint32_t g_curr_buf; /* Current buffer used. */
uint32_t g_vims_ctl; /* Saved flash cache state. */
/******************************************************************************
*
* This function stores the current VIMS configuration before
* - disabling VIMS flash cache
* - flushing the flash line buffers.
*
* Note Not using driverlib calls because it requires using "NO_ROM" define in
* order to work for both Cha. R1 and R2 using the same code. Manually
* doing the steps to minimize code footprint.
*
******************************************************************************/
static void disable_flash_cache()
{
/* 1. Make sure VIMS is not currently changing mode (VIMS:STAT register) */
while ((HWREG(0x40034000) & 0x00000008) == 0x8)
;
/* Save current VIMS:CTL state */
g_vims_ctl = HWREG(0x40034004);
/* 2. Set VIMS mode to OFF and disable flash line buffers */
uint32_t new_vims_ctl = g_vims_ctl | 0x33;
HWREG(0x40034004) = new_vims_ctl;
/* 3. Wait for VIMS to have changed mode (VIMS:STAT register) */
while ((HWREG(0x40034000) & 0x00000008) == 0x8)
;
}
/******************************************************************************
*
* This function restores the VIMS configuration saved off by
* disable_flash_cache().
*
* Note Not using driverlib calls because it requires using "NO_ROM" define in
* order to work for both Cha. R1 and R2 using the same code. Manually
* doing the steps to minimize code footprint.
*
******************************************************************************/
static void restore_cache_state()
{
HWREG(0x40034004) = g_vims_ctl;
/* Wait for VIMS to have changed mode (VIMS:STAT register) */
while ((HWREG(0x40034000) & 0x00000008) == 0x8)
;
}
/******************************************************************************
*
* CC13xx/CC26xx flashloader main function.
*
******************************************************************************/
int main(void)
{
flashloader_init((struct flash_params *)g_cfg, g_buf1, g_buf2);
g_curr_buf = 0; /* start with the first buffer */
uint32_t status;
while (1) {
/* Wait for host to signal buffer is ready */
while (g_cfg[g_curr_buf].full == BUFFER_EMPTY)
;
disable_flash_cache();
/* Perform requested task */
switch (g_cfg[g_curr_buf].cmd) {
case CMD_ERASE_ALL:
status = flashloader_erase_all();
break;
case CMD_PROGRAM:
status =
flashloader_program(
(uint8_t *)g_cfg[g_curr_buf].buf_addr,
g_cfg[g_curr_buf].dest, g_cfg[g_curr_buf].len);
break;
case CMD_ERASE_AND_PROGRAM:
status =
flashloader_erase_and_program(
(uint8_t *)g_cfg[g_curr_buf].buf_addr,
g_cfg[g_curr_buf].dest, g_cfg[g_curr_buf].len);
break;
case CMD_ERASE_AND_PROGRAM_WITH_RETAIN:
status =
flashloader_program_with_retain(
(uint8_t *)g_cfg[g_curr_buf].buf_addr,
g_cfg[g_curr_buf].dest, g_cfg[g_curr_buf].len);
break;
case CMD_ERASE_SECTORS:
status =
flashloader_erase_sectors(g_cfg[g_curr_buf].dest,
g_cfg[g_curr_buf].len);
break;
default:
status = STATUS_FAILED_UNKNOWN_COMMAND;
break;
}
restore_cache_state();
/* Enter infinite loop on error condition */
if (status != STATUS_OK) {
g_cfg[g_curr_buf].full = status;
while (1)
;
}
/* Mark current task complete, and begin looking at next buffer */
g_cfg[g_curr_buf].full = BUFFER_EMPTY;
g_curr_buf ^= 1;
}
}
void _exit(int status)
{
/* Enter infinite loop on hitting an exit condition */
(void)status; /* Unused parameter */
while (1)
;
}

View File

@@ -0,0 +1,97 @@
/******************************************************************************
*
* Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include <stdint.h>
/******************************************************************************
*
* The entry point for the application startup code.
*
******************************************************************************/
extern int main(void);
/******************************************************************************
*
* Reserve space for the system stack.
*
******************************************************************************/
__attribute__ ((section(".stack")))
static uint32_t stack[100];
const uint32_t stack_pntr = (uint32_t)stack + sizeof(stack);
/******************************************************************************
*
* The following are constructs created by the linker indicating where
* the "bss" and "ebss" segments reside in memory.
*
******************************************************************************/
extern uint32_t _bss;
extern uint32_t _ebss;
/******************************************************************************
*
* This is the entry point that handles setting the stack within the allowed
* workspace, initializing the .bss segment, and then jumping to main.
*
******************************************************************************/
__attribute__ ((section(".entry")))
void entry(void)
{
/* Workaround for ITT instructions. */
__asm(" NOP");
__asm(" NOP");
__asm(" NOP");
__asm(" NOP");
/* Initialize stack pointer */
__asm(" ldr sp, =stack_pntr");
/* Zero fill the bss segment. */
__asm(" ldr r0, =_bss\n"
" ldr r1, =_ebss\n"
" mov r2, #0\n"
" .thumb_func\n"
" zero_loop:\n"
" cmp r0, r1\n"
" it lt\n"
" strlt r2, [r0], #4\n"
" blt zero_loop");
/* Call the application's entry point. */
main();
/* If we ever return, enter an infinite loop */
while (1)
;
}

View File

@@ -0,0 +1,19 @@
BIN2C = ../../../../src/helper/bin2char.sh
CROSS_COMPILE ?= arm-none-eabi-
AS = $(CROSS_COMPILE)as
OBJCOPY = $(CROSS_COMPILE)objcopy
all: cc3220sf.inc
%.elf: %.s
$(AS) $< -o $@
%.bin: %.elf
$(OBJCOPY) -Obinary $< $@
%.inc: %.bin
$(BIN2C) < $< > $@
clean:
-rm -f *.elf *.bin *.inc

View File

@@ -0,0 +1,10 @@
/* Autogenerated with ../../../../src/helper/bin2char.sh */
0xdf,0xf8,0x7c,0xa0,0xdf,0xf8,0x7c,0xb0,0xdf,0xf8,0x7c,0xc0,0x01,0xf0,0x7f,0x03,
0x00,0x2b,0x1e,0xd1,0x4f,0xf0,0x00,0x04,0xcc,0xf8,0x00,0x10,0x03,0x68,0xcb,0xf8,
0x00,0x30,0x0b,0xf1,0x04,0x0b,0x00,0xf1,0x04,0x00,0xa2,0xf1,0x01,0x02,0x04,0xf1,
0x01,0x04,0x01,0xf1,0x04,0x01,0x00,0x2a,0x01,0xd0,0x20,0x2c,0xee,0xd1,0xcc,0xf8,
0x20,0xa0,0xdc,0xf8,0x20,0x30,0x13,0xf0,0x01,0x0f,0xfa,0xd1,0x00,0x2a,0xd7,0xd1,
0x13,0xe0,0xcc,0xf8,0x00,0x10,0x03,0x68,0xcc,0xf8,0x04,0x30,0xcc,0xf8,0x08,0xa0,
0xdc,0xf8,0x08,0x30,0x13,0xf0,0x01,0x0f,0xfa,0xd1,0xa2,0xf1,0x01,0x02,0x00,0xf1,
0x04,0x00,0x01,0xf1,0x04,0x01,0x00,0x2a,0xc2,0xd1,0x00,0xbe,0x01,0xbe,0xfc,0xe7,
0x01,0x00,0x42,0xa4,0x00,0xd1,0x0f,0x40,0x00,0xd0,0x0f,0x40,

View File

@@ -0,0 +1,93 @@
/***************************************************************************
* Copyright (C) 2017 by Texas Instruments, Inc. *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/* Params:
* r0 = buffer start address (in)
* r1 = flash destination address (in)
* r2 = number of words to write (in/out)
*/
.text
.cpu cortex-m4
.code 16
.thumb
.syntax unified
.align 2
/* r3 = scratchpad
* r4 = buffer word counter
* r10 = flash programming key
* r11 = base FWB address
* r12 = base flash regs address
*/
start:
ldr r10, =0xa4420001 /* flash programming key */
ldr r11, =0x400fd100 /* base of FWB */
ldr r12, =0x400fd000 /* base of flash regs */
and r3, r1, #0x7f /* is the dest address 32 word aligned? */
cmp r3, #0
bne program_word /* if not aligned do one word at a time */
/* program using the write buffers */
program_buffer:
mov r4, #0 /* start the buffer word counter at 0 */
str r1, [r12] /* store the dest addr in FMA */
fill_buffer:
ldr r3, [r0] /* get the word to write to FWB */
str r3, [r11] /* store the word in the FWB */
add r11, r11, #4 /* increment the FWB pointer */
add r0, r0, #4 /* increment the source pointer */
sub r2, r2, #1 /* decrement the total word counter */
add r4, r4, #1 /* increment the buffer word counter */
add r1, r1, #4 /* increment the dest pointer */
cmp r2, #0 /* is the total word counter now 0? */
beq buffer_ready /* go to end if total word counter is 0 */
cmp r4, #32 /* is the buffer word counter now 32? */
bne fill_buffer /* go to continue to fill buffer */
buffer_ready:
str r10, [r12, #0x20] /* store the key and write bit to FMC2 */
wait_buffer_done:
ldr r3, [r12, #0x20] /* read FMC2 */
tst r3, #1 /* see if the write bit is cleared */
bne wait_buffer_done /* go to read FMC2 if bit not cleared */
cmp r2, #0 /* is the total word counter now 0? */
bne start /* go if there is more to program */
b exit
/* program just one word */
program_word:
str r1, [r12] /* store the dest addr in FMA */
ldr r3, [r0] /* get the word to write to FMD */
str r3, [r12, #0x4] /* store the word in FMD */
str r10, [r12, #0x8] /* store the key and write bit to FMC */
wait_word_done:
ldr r3, [r12, #0x8] /* read FMC */
tst r3, #1 /* see if the write bit is cleared */
bne wait_word_done /* go to read FMC if bit not cleared */
sub r2, r2, #1 /* decrement the total word counter */
add r0, r0, #4 /* increment the source pointer */
add r1, r1, #4 /* increment the dest pointer */
cmp r2, #0 /* is the total word counter now 0 */
bne start /* go if there is more to program */
/* end */
exit:
bkpt #0
bkpt #1
b exit

View File

@@ -44,11 +44,7 @@
#define EFM32_MSC_ADDRB_OFFSET 0x010
#define EFM32_MSC_WDATA_OFFSET 0x018
#define EFM32_MSC_STATUS_OFFSET 0x01c
#define EFM32_MSC_LOCK_OFFSET 0x03c
/* unlock MSC */
ldr r6, =#0x1b71
str r6, [r0, #EFM32_MSC_LOCK_OFFSET]
/* set WREN to 1 */
movs r6, #1
str r6, [r0, #EFM32_MSC_WRITECTRL_OFFSET]

View File

@@ -0,0 +1,28 @@
BIN2C = ../../../../src/helper/bin2char.sh
CROSS_COMPILE ?= riscv64-unknown-elf-
CC=$(CROSS_COMPILE)gcc
OBJCOPY=$(CROSS_COMPILE)objcopy
OBJDUMP=$(CROSS_COMPILE)objdump
CFLAGS = -march=rv32i -mabi=ilp32 -x assembler-with-cpp -nostdlib -nostartfiles
all: fespi.inc
.PHONY: clean
%.elf: %.S
$(CC) $(CFLAGS) $< -o $@
%.lst: %.elf
$(OBJDUMP) -S $< > $@
%.bin: %.elf
$(OBJCOPY) -Obinary $< $@
%.inc: %.bin
$(BIN2C) < $< > $@
clean:
-rm -f *.elf *.lst *.bin *.inc

View File

@@ -0,0 +1,99 @@
#define SPIFLASH_READ_STATUS 0x05 // Read Status Register
#define SPIFLASH_BSY_BIT 0x00000001 // WIP Bit of SPI SR on SMI SR
// Register offsets
#define FESPI_REG_FMT 0x40
#define FESPI_REG_TXFIFO 0x48
#define FESPI_REG_RXFIFO 0x4c
#define FESPI_REG_IP 0x74
// Fields
#define FESPI_IP_TXWM 0x1
#define FESPI_FMT_DIR(x) (((x) & 0x1) << 3)
// To enter, jump to the start of command_table (ie. offset 0).
// a0 - FESPI base address
// a1 - start address of buffer
// The buffer contains a "program" in byte sequences. The first byte in a
// sequence determines the operation. Some operation will read more data from
// the program, while some will not. The operation byte is the offset into
// command_table, so eg. 4 means exit, 8 means transmit, and so on.
.global _start
_start:
command_table:
j main // 0
ebreak // 4
j tx // 8
j txwm_wait // 12
j write_reg // 16
j wip_wait // 20
j set_dir // 24
// Execute the program.
main:
lbu t0, 0(a1)
addi a1, a1, 1
la t1, command_table
add t0, t0, t1
jr t0
// Read 1 byte the contains the number of bytes to transmit. Then read those
// bytes from the program and transmit them one by one.
tx:
lbu t1, 0(a1) // read number of bytes to transmit
addi a1, a1, 1
1: lw t0, FESPI_REG_TXFIFO(a0) // wait for FIFO clear
bltz t0, 1b
lbu t0, 0(a1) // Load byte to write
sw t0, FESPI_REG_TXFIFO(a0)
addi a1, a1, 1
addi t1, t1, -1
bgtz t1, 1b
j main
// Wait until TXWM is set.
txwm_wait:
1: lw t0, FESPI_REG_IP(a0)
andi t0, t0, FESPI_IP_TXWM
beqz t0, 1b
j main
// Read 1 byte that contains the offset of the register to write, and 1 byte
// that contains the data to write.
write_reg:
lbu t0, 0(a1) // read register to write
add t0, t0, a0
lbu t1, 1(a1) // read value to write
addi a1, a1, 2
sw t1, 0(t0)
j main
wip_wait:
li a2, SPIFLASH_READ_STATUS
jal txrx_byte
// discard first result
1: li a2, 0
jal txrx_byte
andi t0, a2, SPIFLASH_BSY_BIT
bnez t0, 1b
j main
txrx_byte: // transmit the byte in a2, receive a bit into a2
lw t0, FESPI_REG_TXFIFO(a0) // wait for FIFO clear
bltz t0, txrx_byte
sw a2, FESPI_REG_TXFIFO(a0)
1: lw a2, FESPI_REG_RXFIFO(a0)
bltz a2, 1b
ret
set_dir:
lw t0, FESPI_REG_FMT(a0)
li t1, ~(FESPI_FMT_DIR(0xFFFFFFFF))
and t0, t0, t1
lbu t1, 0(a1) // read value to OR in
addi a1, a1, 1
or t0, t0, t1
sw t0, FESPI_REG_FMT(a0)
j main

View File

@@ -0,0 +1,15 @@
/* Autogenerated with ../../../../src/helper/bin2char.sh */
0x6f,0x00,0xc0,0x01,0x73,0x00,0x10,0x00,0x6f,0x00,0xc0,0x02,0x6f,0x00,0x00,0x05,
0x6f,0x00,0xc0,0x05,0x6f,0x00,0x00,0x07,0x6f,0x00,0x00,0x0a,0x83,0xc2,0x05,0x00,
0x93,0x85,0x15,0x00,0x17,0x03,0x00,0x00,0x13,0x03,0xc3,0xfd,0xb3,0x82,0x62,0x00,
0x67,0x80,0x02,0x00,0x03,0xc3,0x05,0x00,0x93,0x85,0x15,0x00,0x83,0x22,0x85,0x04,
0xe3,0xce,0x02,0xfe,0x83,0xc2,0x05,0x00,0x23,0x24,0x55,0x04,0x93,0x85,0x15,0x00,
0x13,0x03,0xf3,0xff,0xe3,0x44,0x60,0xfe,0x6f,0xf0,0x5f,0xfc,0x83,0x22,0x45,0x07,
0x93,0xf2,0x12,0x00,0xe3,0x8c,0x02,0xfe,0x6f,0xf0,0x5f,0xfb,0x83,0xc2,0x05,0x00,
0xb3,0x82,0xa2,0x00,0x03,0xc3,0x15,0x00,0x93,0x85,0x25,0x00,0x23,0xa0,0x62,0x00,
0x6f,0xf0,0xdf,0xf9,0x13,0x06,0x50,0x00,0xef,0x00,0x80,0x01,0x13,0x06,0x00,0x00,
0xef,0x00,0x00,0x01,0x93,0x72,0x16,0x00,0xe3,0x9a,0x02,0xfe,0x6f,0xf0,0x1f,0xf8,
0x83,0x22,0x85,0x04,0xe3,0xce,0x02,0xfe,0x23,0x24,0xc5,0x04,0x03,0x26,0xc5,0x04,
0xe3,0x4e,0x06,0xfe,0x67,0x80,0x00,0x00,0x83,0x22,0x05,0x04,0x13,0x03,0x70,0xff,
0xb3,0xf2,0x62,0x00,0x03,0xc3,0x05,0x00,0x93,0x85,0x15,0x00,0xb3,0xe2,0x62,0x00,
0x23,0x20,0x55,0x04,0x6f,0xf0,0x9f,0xf4,

View File

@@ -13,8 +13,11 @@
# GNU General Public License for more details.
#
from migen import *
from migen.build.generic_platform import *
import unittest
import migen as mg
import migen.build.generic_platform as mb
from migen.genlib import io
from migen.build import xilinx
@@ -25,59 +28,256 @@ behind FPGAs.
Bitstream binaries built with this script are available at:
https://github.com/jordens/bscan_spi_bitstreams
JTAG signalling is connected directly to SPI signalling. CS_N is
asserted when the JTAG IR contains the USER1 instruction and the state is
SHIFT-DR. Xilinx bscan cells sample TDO on falling TCK and forward it.
MISO requires sampling on rising CLK and leads to one cycle of latency.
A JTAG2SPI transfer consists of:
1. an arbitrary number of 0 bits (from BYPASS registers in front of the
JTAG2SPI DR)
2. a marker bit (1) indicating the start of the JTAG2SPI transaction
3. 32 bits (big endian) describing the length of the SPI transaction
4. a number of SPI clock cycles (corresponding to 3.) with CS_N asserted
5. an arbitrary number of cycles (to shift MISO/TDO data through subsequent
BYPASS registers)
Notes:
* The JTAG2SPI DR is 1 bit long (due to different sampling edges of
{MISO,MOSI}/{TDO,TDI}).
* MOSI is TDI with half a cycle delay.
* TDO is MISO with half a cycle delay.
* CAPTURE-DR needs to be performed before SHIFT-DR on the BYPASSed TAPs in
JTAG chain to clear the BYPASS registers to 0.
https://github.com/m-labs/migen
"""
class Spartan3(Module):
class JTAG2SPI(mg.Module):
def __init__(self, spi=None, bits=32):
self.jtag = mg.Record([
("sel", 1),
("shift", 1),
("capture", 1),
("tck", 1),
("tdi", 1),
("tdo", 1),
])
self.cs_n = mg.TSTriple()
self.clk = mg.TSTriple()
self.mosi = mg.TSTriple()
self.miso = mg.TSTriple()
# # #
self.cs_n.o.reset = mg.Constant(1)
self.mosi.o.reset_less = True
bits = mg.Signal(bits, reset_less=True)
head = mg.Signal(max=len(bits), reset=len(bits) - 1)
self.clock_domains.cd_sys = mg.ClockDomain()
self.submodules.fsm = mg.FSM("IDLE")
if spi is not None:
self.specials += [
self.cs_n.get_tristate(spi.cs_n),
self.mosi.get_tristate(spi.mosi),
self.miso.get_tristate(spi.miso),
]
if hasattr(spi, "clk"): # 7 Series drive it fixed
self.specials += self.clk.get_tristate(spi.clk)
# self.specials += io.DDROutput(1, 0, spi.clk, self.clk.o)
self.comb += [
self.cd_sys.rst.eq(self.jtag.sel & self.jtag.capture),
self.cd_sys.clk.eq(self.jtag.tck),
self.cs_n.oe.eq(self.jtag.sel),
self.clk.oe.eq(self.jtag.sel),
self.mosi.oe.eq(self.jtag.sel),
self.miso.oe.eq(0),
# Do not suppress CLK toggles outside CS_N asserted.
# Xilinx USRCCLK0 requires three dummy cycles to do anything
# https://www.xilinx.com/support/answers/52626.html
# This is fine since CS_N changes only on falling CLK.
self.clk.o.eq(~self.jtag.tck),
self.jtag.tdo.eq(self.miso.i),
]
# Latency calculation (in half cycles):
# 0 (falling TCK, rising CLK):
# JTAG adapter: set TDI
# 1 (rising TCK, falling CLK):
# JTAG2SPI: sample TDI -> set MOSI
# SPI: set MISO
# 2 (falling TCK, rising CLK):
# SPI: sample MOSI
# JTAG2SPI (BSCAN primitive): sample MISO -> set TDO
# 3 (rising TCK, falling CLK):
# JTAG adapter: sample TDO
self.fsm.act("IDLE",
mg.If(self.jtag.tdi & self.jtag.sel & self.jtag.shift,
mg.NextState("HEAD")
)
)
self.fsm.act("HEAD",
mg.If(head == 0,
mg.NextState("XFER")
)
)
self.fsm.act("XFER",
mg.If(bits == 0,
mg.NextState("IDLE")
),
)
self.sync += [
self.mosi.o.eq(self.jtag.tdi),
self.cs_n.o.eq(~self.fsm.ongoing("XFER")),
mg.If(self.fsm.ongoing("HEAD"),
bits.eq(mg.Cat(self.jtag.tdi, bits)),
head.eq(head - 1)
),
mg.If(self.fsm.ongoing("XFER"),
bits.eq(bits - 1)
)
]
class JTAG2SPITest(unittest.TestCase):
def setUp(self):
self.bits = 8
self.dut = JTAG2SPI(bits=self.bits)
def test_instantiate(self):
pass
def test_initial_conditions(self):
def check():
yield
self.assertEqual((yield self.dut.cs_n.oe), 0)
self.assertEqual((yield self.dut.mosi.oe), 0)
self.assertEqual((yield self.dut.miso.oe), 0)
self.assertEqual((yield self.dut.clk.oe), 0)
mg.run_simulation(self.dut, check())
def test_enable(self):
def check():
yield self.dut.jtag.sel.eq(1)
yield self.dut.jtag.shift.eq(1)
yield
self.assertEqual((yield self.dut.cs_n.oe), 1)
self.assertEqual((yield self.dut.mosi.oe), 1)
self.assertEqual((yield self.dut.miso.oe), 0)
self.assertEqual((yield self.dut.clk.oe), 1)
mg.run_simulation(self.dut, check())
def run_seq(self, tdi, tdo, spi=None):
yield self.dut.jtag.sel.eq(1)
yield
yield self.dut.jtag.shift.eq(1)
for di in tdi:
yield self.dut.jtag.tdi.eq(di)
yield
tdo.append((yield self.dut.jtag.tdo))
if spi is not None:
v = []
for k in "cs_n clk mosi miso".split():
t = getattr(self.dut, k)
v.append("{}>".format((yield t.o)) if (yield t.oe)
else "<{}".format((yield t.i)))
spi.append(" ".join(v))
yield self.dut.jtag.sel.eq(0)
yield
yield self.dut.jtag.shift.eq(0)
yield
def test_shift(self):
bits = 8
data = 0x81
tdi = [0, 0, 1] # dummy from BYPASS TAPs and marker
tdi += [((bits - 1) >> j) & 1 for j in range(self.bits - 1, -1, -1)]
tdi += [(data >> j) & 1 for j in range(bits)]
tdi += [0, 0, 0, 0] # dummy from BYPASS TAPs
tdo = []
spi = []
mg.run_simulation(self.dut, self.run_seq(tdi, tdo, spi))
# print(tdo)
for l in spi:
print(l)
class Spartan3(mg.Module):
macro = "BSCAN_SPARTAN3"
toolchain = "ise"
def __init__(self, platform):
platform.toolchain.bitgen_opt += " -g compress -g UnusedPin:Pullup"
self.clock_domains.cd_jtag = ClockDomain(reset_less=True)
spi = platform.request("spiflash")
shift = Signal()
tdo = Signal()
sel1 = Signal()
self.comb += [
self.cd_jtag.clk.eq(spi.clk),
spi.cs_n.eq(~shift | ~sel1),
self.submodules.j2s = j2s = JTAG2SPI(platform.request("spiflash"))
self.specials += [
mg.Instance(
self.macro,
o_SHIFT=j2s.jtag.shift, o_SEL1=j2s.jtag.sel,
o_CAPTURE=j2s.jtag.capture,
o_DRCK1=j2s.jtag.tck,
o_TDI=j2s.jtag.tdi, i_TDO1=j2s.jtag.tdo,
i_TDO2=0),
]
self.sync.jtag += tdo.eq(spi.miso)
self.specials += Instance(self.macro,
o_DRCK1=spi.clk, o_SHIFT=shift,
o_TDI=spi.mosi, i_TDO1=tdo, i_TDO2=0,
o_SEL1=sel1)
platform.add_period_constraint(j2s.jtag.tck, 6)
class Spartan3A(Spartan3):
macro = "BSCAN_SPARTAN3A"
class Spartan6(Module):
class Spartan6(mg.Module):
toolchain = "ise"
def __init__(self, platform):
platform.toolchain.bitgen_opt += " -g compress -g UnusedPin:Pullup"
self.clock_domains.cd_jtag = ClockDomain(reset_less=True)
spi = platform.request("spiflash")
shift = Signal()
tdo = Signal()
sel = Signal()
self.comb += self.cd_jtag.clk.eq(spi.clk), spi.cs_n.eq(~shift | ~sel)
self.sync.jtag += tdo.eq(spi.miso)
self.specials += Instance("BSCAN_SPARTAN6", p_JTAG_CHAIN=1,
o_TCK=spi.clk, o_SHIFT=shift, o_SEL=sel,
o_TDI=spi.mosi, i_TDO=tdo)
self.submodules.j2s = j2s = JTAG2SPI(platform.request("spiflash"))
# clk = mg.Signal()
self.specials += [
mg.Instance(
"BSCAN_SPARTAN6", p_JTAG_CHAIN=1,
o_SHIFT=j2s.jtag.shift, o_SEL=j2s.jtag.sel,
o_CAPTURE=j2s.jtag.capture,
o_DRCK=j2s.jtag.tck,
o_TDI=j2s.jtag.tdi, i_TDO=j2s.jtag.tdo),
# mg.Instance("BUFG", i_I=clk, o_O=j2s.jtag.tck)
]
platform.add_period_constraint(j2s.jtag.tck, 6)
class Series7(Module):
class Series7(mg.Module):
toolchain = "vivado"
def __init__(self, platform):
platform.toolchain.bitstream_commands.extend([
"set_property BITSTREAM.GENERAL.COMPRESS True [current_design]",
"set_property BITSTREAM.CONFIG.UNUSEDPIN Pullnone [current_design]"
])
self.submodules.j2s = j2s = JTAG2SPI(platform.request("spiflash"))
# clk = mg.Signal()
self.specials += [
mg.Instance(
"BSCANE2", p_JTAG_CHAIN=1,
o_SHIFT=j2s.jtag.shift, o_SEL=j2s.jtag.sel,
o_CAPTURE=j2s.jtag.capture,
o_DRCK=j2s.jtag.tck,
o_TDI=j2s.jtag.tdi, i_TDO=j2s.jtag.tdo),
mg.Instance(
"STARTUPE2", i_CLK=0, i_GSR=0, i_GTS=0,
i_KEYCLEARB=0, i_PACK=1,
i_USRCCLKO=j2s.clk.o, i_USRCCLKTS=~j2s.clk.oe,
i_USRDONEO=1, i_USRDONETS=1),
# mg.Instance("BUFG", i_I=clk, o_O=j2s.jtag.tck)
]
platform.add_period_constraint(j2s.jtag.tck, 6)
try:
self.comb += [
platform.request("user_sma_gpio_p").eq(j2s.cs_n.i),
platform.request("user_sma_gpio_n").eq(j2s.clk.o),
platform.request("user_sma_clock_p").eq(j2s.mosi.o),
platform.request("user_sma_clock_n").eq(j2s.miso.i),
]
except mb.ConstraintError:
pass
class Ultrascale(mg.Module):
toolchain = "vivado"
def __init__(self, platform):
@@ -85,20 +285,33 @@ class Series7(Module):
"set_property BITSTREAM.GENERAL.COMPRESS True [current_design]",
"set_property BITSTREAM.CONFIG.UNUSEDPIN Pullnone [current_design]",
])
self.clock_domains.cd_jtag = ClockDomain(reset_less=True)
spi = platform.request("spiflash")
clk = Signal()
shift = Signal()
tdo = Signal()
sel = Signal()
self.comb += self.cd_jtag.clk.eq(clk), spi.cs_n.eq(~shift | ~sel)
self.sync.jtag += tdo.eq(spi.miso)
self.specials += Instance("BSCANE2", p_JTAG_CHAIN=1,
o_SHIFT=shift, o_TCK=clk, o_SEL=sel,
o_TDI=spi.mosi, i_TDO=tdo)
self.specials += Instance("STARTUPE2", i_CLK=0, i_GSR=0, i_GTS=0,
i_KEYCLEARB=0, i_PACK=1, i_USRCCLKO=clk,
i_USRCCLKTS=0, i_USRDONEO=1, i_USRDONETS=1)
self.submodules.j2s0 = j2s0 = JTAG2SPI()
self.submodules.j2s1 = j2s1 = JTAG2SPI(platform.request("spiflash"))
di = mg.Signal(4)
self.comb += mg.Cat(j2s0.mosi.i, j2s0.miso.i).eq(di)
self.specials += [
mg.Instance("BSCANE2", p_JTAG_CHAIN=1,
o_SHIFT=j2s0.jtag.shift, o_SEL=j2s0.jtag.sel,
o_CAPTURE=j2s0.jtag.capture,
o_DRCK=j2s0.jtag.tck,
o_TDI=j2s0.jtag.tdi, i_TDO=j2s0.jtag.tdo),
mg.Instance("BSCANE2", p_JTAG_CHAIN=2,
o_SHIFT=j2s1.jtag.shift, o_SEL=j2s1.jtag.sel,
o_CAPTURE=j2s1.jtag.capture,
o_DRCK=j2s1.jtag.tck,
o_TDI=j2s1.jtag.tdi, i_TDO=j2s1.jtag.tdo),
mg.Instance("STARTUPE3", i_GSR=0, i_GTS=0,
i_KEYCLEARB=0, i_PACK=1,
i_USRDONEO=1, i_USRDONETS=1,
i_USRCCLKO=mg.Mux(j2s0.clk.oe, j2s0.clk.o, j2s1.clk.o),
i_USRCCLKTS=~(j2s0.clk.oe | j2s1.clk.oe),
i_FCSBO=j2s0.cs_n.o, i_FCSBTS=~j2s0.cs_n.oe,
o_DI=di,
i_DO=mg.Cat(j2s0.mosi.o, j2s0.miso.o, 0, 0),
i_DTS=mg.Cat(~j2s0.mosi.oe, ~j2s0.miso.oe, 1, 1))
]
platform.add_period_constraint(j2s0.jtag.tck, 6)
platform.add_period_constraint(j2s1.jtag.tck, 6)
class XilinxBscanSpi(xilinx.XilinxPlatform):
@@ -124,6 +337,7 @@ class XilinxBscanSpi(xilinx.XilinxPlatform):
("fbg484-1", 2): ["L16", None, "H18", "H19", "G18", "F19"],
("fbg676-1", 1): ["C23", None, "B24", "A25", "B22", "A22"],
("ffg901-1", 1): ["V26", None, "R30", "T30", "R28", "T28"],
("ffg900-1", 1): ["U19", None, "P24", "R25", "R20", "R21"],
("ffg1156-1", 1): ["V30", None, "AA33", "AA34", "Y33", "Y34"],
("ffg1157-1", 1): ["AL33", None, "AN33", "AN34", "AK34", "AL34"],
("ffg1158-1", 1): ["C24", None, "A23", "A24", "B26", "A26"],
@@ -132,6 +346,9 @@ class XilinxBscanSpi(xilinx.XilinxPlatform):
("flg1155-1", 1): ["AL28", None, "AE28", "AF28", "AJ29", "AJ30"],
("flg1932-1", 1): ["V32", None, "T33", "R33", "U31", "T31"],
("flg1926-1", 1): ["AK33", None, "AN34", "AN35", "AJ34", "AK34"],
("ffva1156-2-e", 1): ["G26", None, "M20", "L20", "R21", "R22"],
("ffva1156-2-e", "sayma"): ["K21", None, "M20", "L20", "R21", "R22"],
}
pinouts = {
@@ -181,6 +398,7 @@ class XilinxBscanSpi(xilinx.XilinxPlatform):
"xc7a75t": ("csg324-1", 1, "LVCMOS25", Series7),
"xc7k160t": ("fbg484-1", 2, "LVCMOS25", Series7),
"xc7k325t": ("fbg676-1", 1, "LVCMOS25", Series7),
"xc7k325t-debug": ("ffg900-1", 1, "LVCMOS25", Series7),
"xc7k355t": ("ffg901-1", 1, "LVCMOS25", Series7),
"xc7k410t": ("fbg676-1", 1, "LVCMOS25", Series7),
"xc7k420t": ("ffg1156-1", 1, "LVCMOS25", Series7),
@@ -197,35 +415,53 @@ class XilinxBscanSpi(xilinx.XilinxPlatform):
"xc7vx550t": ("ffg1158-1", 1, "LVCMOS18", Series7),
"xc7vx690t": ("ffg1157-1", 1, "LVCMOS18", Series7),
"xc7vx980t": ("ffg1926-1", 1, "LVCMOS18", Series7),
"xcku040": ("ffva1156-2-e", 1, "LVCMOS18", Ultrascale),
"xcku040-sayma": ("ffva1156-2-e", "sayma", "LVCMOS18", Ultrascale),
}
def __init__(self, device, pins, std, toolchain="ise"):
ios = [self.make_spi(0, pins, std, toolchain)]
if device == "xc7k325t-ffg900-1": # debug
ios += [
("user_sma_clock_p", 0, mb.Pins("L25"), mb.IOStandard("LVCMOS25")),
("user_sma_clock_n", 0, mb.Pins("K25"), mb.IOStandard("LVCMOS25")),
("user_sma_gpio_p", 0, mb.Pins("Y23"), mb.IOStandard("LVCMOS25")),
("user_sma_gpio_n", 0, mb.Pins("Y24"), mb.IOStandard("LVCMOS25")),
]
xilinx.XilinxPlatform.__init__(self, device, ios, toolchain=toolchain)
@staticmethod
def make_spi(i, pins, std, toolchain):
pu = "PULLUP" if toolchain == "ise" else "PULLUP TRUE"
pd = "PULLDOWN" if toolchain == "ise" else "PULLDOWN TRUE"
cs_n, clk, mosi, miso = pins[:4]
io = ["spiflash", 0,
Subsignal("cs_n", Pins(cs_n)),
Subsignal("mosi", Pins(mosi)),
Subsignal("miso", Pins(miso), Misc("PULLUP")),
IOStandard(std),
]
io = ["spiflash", i,
mb.Subsignal("cs_n", mb.Pins(cs_n), mb.Misc(pu)),
mb.Subsignal("mosi", mb.Pins(mosi), mb.Misc(pu)),
mb.Subsignal("miso", mb.Pins(miso), mb.Misc(pu)),
mb.IOStandard(std),
]
if clk:
io.append(Subsignal("clk", Pins(clk)))
io.append(mb.Subsignal("clk", mb.Pins(clk), mb.Misc(pd)))
for i, p in enumerate(pins[4:]):
io.append(Subsignal("pullup{}".format(i), Pins(p), Misc("PULLUP")))
xilinx.XilinxPlatform.__init__(self, device, [io], toolchain=toolchain)
io.append(mb.Subsignal("pullup{}".format(i), mb.Pins(p),
mb.Misc(pu)))
return io
@classmethod
def make(cls, device, errors=False):
pkg, id, std, Top = cls.pinouts[device]
def make(cls, target, errors=False):
pkg, id, std, Top = cls.pinouts[target]
pins = cls.packages[(pkg, id)]
device = target.split("-", 1)[0]
platform = cls("{}-{}".format(device, pkg), pins, std, Top.toolchain)
top = Top(platform)
name = "bscan_spi_{}".format(device)
dir = "build_{}".format(device)
name = "bscan_spi_{}".format(target)
try:
platform.build(top, build_name=name, build_dir=dir)
platform.build(top, build_name=name)
except Exception as e:
print(("ERROR: xilinx_bscan_spi build failed "
"for {}: {}").format(device, e))
"for {}: {}").format(target, e))
if errors:
raise

View File

@@ -0,0 +1,19 @@
BIN2C = ../../../../src/helper/bin2char.sh
CROSS_COMPILE ?= arm-none-eabi-
AS = $(CROSS_COMPILE)as
OBJCOPY = $(CROSS_COMPILE)objcopy
all: max32xxx.inc
%.elf: %.s
$(AS) $< -o $@
%.bin: %.elf
$(OBJCOPY) -Obinary $< $@
%.inc: %.bin
$(BIN2C) < $< > $@
clean:
-rm -f *.elf *.bin *.inc

View File

@@ -0,0 +1,6 @@
/* Autogenerated with ../../../../src/helper/bin2char.sh */
0xdf,0xf8,0x44,0x40,0xd0,0xf8,0x00,0x80,0xb8,0xf1,0x00,0x0f,0x1a,0xd0,0x47,0x68,
0x47,0x45,0xf7,0xd0,0x22,0x60,0x02,0xf1,0x04,0x02,0x57,0xf8,0x04,0x8b,0xc4,0xf8,
0x30,0x80,0xa5,0x68,0x45,0xf0,0x01,0x05,0xa5,0x60,0xd4,0xf8,0x08,0x80,0x18,0xf0,
0x01,0x0f,0xfa,0xd1,0x8f,0x42,0x28,0xbf,0x00,0xf1,0x08,0x07,0x47,0x60,0x01,0x3b,
0x03,0xb1,0xdf,0xe7,0x00,0xbe,0x00,0xbf,0x00,0x00,0x00,0x40,

View File

@@ -0,0 +1,70 @@
/***************************************************************************
* Copyright (C) 2016 by Maxim Integrated *
* Kevin Gillespie <kevin.gillespie@maximintegrated.com *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
.text
.syntax unified
.cpu cortex-m3
.thumb
.thumb_func
/*
* Params :
* r0 = workarea start
* r1 = workarea end
* r2 = target address
* r3 = count (32bit words)
* r4 = pFLASH_CTRL_BASE
*
* Clobbered:
* r5 = FLASHWRITECMD
* r7 - rp
* r8 - wp, tmp
*/
write:
wait_fifo:
ldr r8, [r0, #0] /* read wp */
cmp r8, #0 /* abort if wp == 0 */
beq exit
ldr r7, [r0, #4] /* read rp */
cmp r7, r8 /* wait until rp != wp */
beq wait_fifo
mainloop:
str r2, [r4, #0x00] /* FLSH_ADDR - write address */
add r2, r2, #4 /* increment target address */
ldr r8, [r7], #4
str r8, [r4, #0x30] /* FLSH_DATA0 - write data */
ldr r5, [r4, #0x08] /* FLSH_CN */
orr r5, r5, #1
str r5, [r4, #0x08] /* FLSH_CN - enable write */
busy:
ldr r8, [r4, #0x08] /* FLSH_CN */
tst r8, #1
bne busy
cmp r7, r1 /* wrap rp at end of buffer */
it cs
addcs r7, r0, #8 /* skip loader args */
str r7, [r0, #4] /* store rp */
subs r3, r3, #1 /* decrement word count */
cbz r3, exit /* loop if not done */
b wait_fifo
exit:
bkpt

View File

@@ -81,7 +81,7 @@ find_next_page_boundary:
/* If we have not reached the next page boundary after the target address, keep going */
bls find_next_page_boundary
write_enable:
/* Flush read/write fifo's */
/* Flush read/write fifos */
bl flush_fifo
/* Instruction byte 1 */
@@ -134,7 +134,7 @@ write_wait:
bl stop_tx /* Otherwise, end the command and keep going w/ the next page */
add r10, r4 /* Move up the end-of-page address by the page size*/
check_flash_busy: /* Wait for the flash to finish the previous page write */
/* Flush read/write fifo's */
/* Flush read/write fifos */
bl flush_fifo
/* Instruction byte 1 */
movs r8, #0x1

View File

@@ -0,0 +1,126 @@
/******************************************************************************
*
* Copyright (C) 2014-2018 Texas Instruments Incorporated - http://www.ti.com/
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#ifndef OPENOCD_LOADERS_FLASH_MSP432_MSP432E4_FLASHLIBIF_H
#define OPENOCD_LOADERS_FLASH_MSP432_MSP432E4_FLASHLIBIF_H
#include <stddef.h>
#include <stdint.h>
/* RAM loader */
static const uint32_t RAM_LOADER_START = 0x20000000u; /* Code space */
static const uint32_t RAM_LOADER_MAIN = 0x20000110u; /* Code space */
static const uint32_t RAM_LOADER_BUFFER1 = 0x20002000u; /* SBUS data space */
static const uint32_t RAM_LOADER_BUFFER2 = 0x20003000u; /* SBUS data space */
static const uint32_t RAM_LOADER_STACK = 0x20002000u; /* SBUS data space */
/* Address for flash function to be executed */
static const uint32_t FLASH_FUNCTION_ADDRESS = 0x20000150u;
enum flash_command {
FLASH_NO_COMMAND = 0,
FLASH_MASS_ERASE = 1,
FLASH_SECTOR_ERASE = 2,
FLASH_PROGRAM = 4,
FLASH_INIT = 8,
FLASH_EXIT = 16,
FLASH_CONTINUOUS_PROGRAM = 32
};
/* Address for algorithm program and flash buffer */
static const uint32_t DST_ADDRESS = 0x2000015Cu;
static const uint32_t SRC_LENGTH_ADDRESS = 0x20000160u;
static const uint32_t BUFFER1_STATUS_REGISTER = 0x20000164u;
static const uint32_t BUFFER2_STATUS_REGISTER = 0x20000168u;
static const uint32_t BUFFER_INACTIVE = 0x00000000u;
static const uint32_t BUFFER_ACTIVE = 0x00000001u;
static const uint32_t BUFFER_DATA_READY = 0x00000010u;
static const size_t SRC_LENGTH_MAX = 4096u;
/* Erase options */
static const uint32_t ERASE_PARAM_ADDRESS = 0x2000016Cu;
static const uint32_t ERASE_MAIN = 0x00000001u;
static const uint32_t ERASE_INFO = 0x00000002u;
/* Unlock BSL */
static const uint32_t UNLOCK_BSL_ADDRESS = 0x20000170u;
static const uint32_t LOCK_BSL_KEY = 0x00000000u;
static const uint32_t UNLOCK_BSL_KEY = 0x0000000Bu;
/* Address for return code */
static const uint32_t RETURN_CODE_ADDRESS = 0x20000154u;
/* Return codes */
static const uint32_t FLASH_BUSY = 0x00000001u;
static const uint32_t FLASH_SUCCESS = 0x00000ACEu;
static const uint32_t FLASH_ERROR = 0x0000DEADu;
static const uint32_t FLASH_TIMEOUT_ERROR = 0xDEAD0000u;
static const uint32_t FLASH_VERIFY_ERROR = 0xDEADDEADu;
static const uint32_t FLASH_WRONG_COMMAND = 0x00000BADu;
static const uint32_t FLASH_POWER_ERROR = 0x00DEAD00u;
/* Device ID address */
static const uint32_t DEVICE_ID_ADDRESS = 0x0020100Cu;
static const uint32_t PC_REGISTER = 15u;
static const uint32_t SP_REGISTER = 13u;
/* CS silicon and boot code revisions */
static const uint32_t SILICON_REV_ADDRESS = 0x00201010u;
static const uint32_t SILICON_REV_A = 0x00000041u;
static const uint32_t SILICON_REV_B = 0x00000042u;
static const uint32_t SILICON_REV_C = 0x00000043u;
static const uint32_t SILICON_REV_D = 0x00000044u;
static const uint32_t SILICON_REV_E = 0x00000045u;
static const uint32_t SILICON_REV_F = 0x00000046u;
static const uint32_t SILICON_REV_G = 0x00000047u;
static const uint32_t SILICON_REV_H = 0x00000048u;
static const uint32_t SILICON_REV_I = 0x00000049u;
static const uint32_t SILICON_REV_B_WRONG = 0x00004100u;
struct flash_interface {
volatile uint32_t FLASH_FUNCTION;
volatile uint32_t RETURN_CODE;
volatile uint32_t _RESERVED0;
volatile uint32_t DST_ADDRESS;
volatile uint32_t SRC_LENGTH;
volatile uint32_t BUFFER1_STATUS_REGISTER;
volatile uint32_t BUFFER2_STATUS_REGISTER;
volatile uint32_t ERASE_PARAM;
volatile uint32_t UNLOCK_BSL;
};
#define FLASH_LOADER_BASE ((uint32_t)0x20000150u)
#define FLASH_LOADER ((struct flash_interface *) FLASH_LOADER_BASE)
#endif /* OPENOCD_LOADERS_FLASH_MSP432_MSP432E4_FLASHLIBIF_H */

View File

@@ -0,0 +1,126 @@
/******************************************************************************
*
* Copyright (C) 2014-2018 Texas Instruments Incorporated - http://www.ti.com/
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#ifndef OPENOCD_LOADERS_FLASH_MSP432_MSP432P4_FLASHLIBIF_H
#define OPENOCD_LOADERS_FLASH_MSP432_MSP432P4_FLASHLIBIF_H
#include <stddef.h>
#include <stdint.h>
/* RAM loader */
static const uint32_t RAM_LOADER_START = 0x01000000u; /* Code space */
static const uint32_t RAM_LOADER_MAIN = 0x01000110u; /* Code space */
static const uint32_t RAM_LOADER_BUFFER1 = 0x20002000u; /* SBUS data space */
static const uint32_t RAM_LOADER_BUFFER2 = 0x20003000u; /* SBUS data space */
static const uint32_t RAM_LOADER_STACK = 0x20002000u; /* SBUS data space */
/* Address for flash function to be executed */
static const uint32_t FLASH_FUNCTION_ADDRESS = 0x20000150u;
enum flash_command {
FLASH_NO_COMMAND = 0,
FLASH_MASS_ERASE = 1,
FLASH_SECTOR_ERASE = 2,
FLASH_PROGRAM = 4,
FLASH_INIT = 8,
FLASH_EXIT = 16,
FLASH_CONTINUOUS_PROGRAM = 32
};
/* Address for algorithm program and flash buffer */
static const uint32_t DST_ADDRESS = 0x2000015Cu;
static const uint32_t SRC_LENGTH_ADDRESS = 0x20000160u;
static const uint32_t BUFFER1_STATUS_REGISTER = 0x20000164u;
static const uint32_t BUFFER2_STATUS_REGISTER = 0x20000168u;
static const uint32_t BUFFER_INACTIVE = 0x00000000u;
static const uint32_t BUFFER_ACTIVE = 0x00000001u;
static const uint32_t BUFFER_DATA_READY = 0x00000010u;
static const size_t SRC_LENGTH_MAX = 4096u;
/* erase options */
static const uint32_t ERASE_PARAM_ADDRESS = 0x2000016Cu;
static const uint32_t ERASE_MAIN = 0x00000001u;
static const uint32_t ERASE_INFO = 0x00000002u;
/* Unlock BSL */
static const uint32_t UNLOCK_BSL_ADDRESS = 0x20000170u;
static const uint32_t LOCK_BSL_KEY = 0x00000000u;
static const uint32_t UNLOCK_BSL_KEY = 0x0000000Bu;
/* Address for return code */
static const uint32_t RETURN_CODE_ADDRESS = 0x20000154u;
/* Return codes */
static const uint32_t FLASH_BUSY = 0x00000001u;
static const uint32_t FLASH_SUCCESS = 0x00000ACEu;
static const uint32_t FLASH_ERROR = 0x0000DEADu;
static const uint32_t FLASH_TIMEOUT_ERROR = 0xDEAD0000u;
static const uint32_t FLASH_VERIFY_ERROR = 0xDEADDEADu;
static const uint32_t FLASH_WRONG_COMMAND = 0x00000BADu;
static const uint32_t FLASH_POWER_ERROR = 0x00DEAD00u;
/* Device ID address */
static const uint32_t DEVICE_ID_ADDRESS = 0x0020100Cu;
static const uint32_t PC_REGISTER = 15u;
static const uint32_t SP_REGISTER = 13u;
/* CS silicon and boot code revisions */
static const uint32_t SILICON_REV_ADDRESS = 0x00201010u;
static const uint32_t SILICON_REV_A = 0x00000041u;
static const uint32_t SILICON_REV_B = 0x00000042u;
static const uint32_t SILICON_REV_C = 0x00000043u;
static const uint32_t SILICON_REV_D = 0x00000044u;
static const uint32_t SILICON_REV_E = 0x00000045u;
static const uint32_t SILICON_REV_F = 0x00000046u;
static const uint32_t SILICON_REV_G = 0x00000047u;
static const uint32_t SILICON_REV_H = 0x00000048u;
static const uint32_t SILICON_REV_I = 0x00000049u;
static const uint32_t SILICON_REV_B_WRONG = 0x00004100u;
struct flash_interface {
volatile uint32_t FLASH_FUNCTION;
volatile uint32_t RETURN_CODE;
volatile uint32_t _RESERVED0;
volatile uint32_t DST_ADDRESS;
volatile uint32_t SRC_LENGTH;
volatile uint32_t BUFFER1_STATUS_REGISTER;
volatile uint32_t BUFFER2_STATUS_REGISTER;
volatile uint32_t ERASE_PARAM;
volatile uint32_t UNLOCK_BSL;
};
#define FLASH_LOADER_BASE ((uint32_t)0x20000150u)
#define FLASH_LOADER ((struct flash_interface *) FLASH_LOADER_BASE)
#endif /* OPENOCD_LOADERS_FLASH_MSP432_MSP432P4_FLASHLIBIF_H */

View File

@@ -0,0 +1,99 @@
BIN2C = ../../../../src/helper/bin2char.sh
CROSS_COMPILE ?= arm-none-eabi-
GCC = $(CROSS_COMPILE)gcc
OBJCOPY = $(CROSS_COMPILE)objcopy
FLAGS = -mcpu=cortex-m4 -march=armv7e-m -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mthumb
CFLAGS = -c -DNO_MSP_CLASSIC_DEFINES -Dgcc -Wall -ffunction-sections
CFLAGS += -fdata-sections -std=c99 -O4
LDFLAGS = -lc -lnosys -Wl,--gc-sections
MSP432E4X_OBJS := \
msp432e4x/driverlib.o \
msp432e4x/main_msp432e4x.o \
msp432e4x/startup_msp432e4.o
MSP432P401X_OBJS := \
msp432p401x/driverlib.o \
msp432p401x/main_msp432p401x.o \
msp432p401x/startup_msp432p4.o
MSP432P411X_OBJS := \
msp432p411x/driverlib.o \
msp432p411x/main_msp432p411x.o \
msp432p411x/startup_msp432p4.o
all: msp432e4x_algo.inc msp432p401x_algo.inc msp432p411x_algo.inc
msp432e4x/%.o: %.c
@echo 'Building file: $<'
@echo 'Invoking: GNU Compiler'
$(GCC) -D__MSP432E4X__ $(FLAGS) $(CFLAGS) -o"$@" "$(shell echo $<)"
@echo 'Finished building: $<'
@echo ' '
msp432p401x/%.o: %.c
@echo 'Building file: $<'
@echo 'Invoking: GNU Compiler'
$(GCC) -D__MSP432P401X__ $(FLAGS) $(CFLAGS) -o"$@" "$(shell echo $<)"
@echo 'Finished building: $<'
@echo ' '
msp432p411x/%.o: %.c
@echo 'Building file: $<'
@echo 'Invoking: GNU Compiler'
$(GCC) -D__MSP432P411X__ $(FLAGS) $(CFLAGS) -o"$@" "$(shell echo $<)"
@echo 'Finished building: $<'
@echo ' '
msp432e4x_algo.out: $(MSP432E4X_OBJS)
@echo 'Building target: $@'
@echo 'Invoking: GNU Linker'
$(GCC) $(FLAGS) $(LDFLAGS) -o$@ $(MSP432E4X_OBJS) -Tmsp432e4x/msp432e4x.lds
@echo 'Finished building target: $@'
@echo ' '
msp432p401x_algo.out: $(MSP432P401X_OBJS)
@echo 'Building target: $@'
@echo 'Invoking: GNU Linker'
$(GCC) $(FLAGS) $(LDFLAGS) -o$@ $(MSP432P401X_OBJS) -Tmsp432p401x/msp432p401x.lds
@echo 'Finished building target: $@'
@echo ' '
msp432p411x_algo.out: $(MSP432P411X_OBJS)
@echo 'Building target: $@'
@echo 'Invoking: GNU Linker'
$(GCC) $(FLAGS) $(LDFLAGS) -o$@ $(MSP432P411X_OBJS) -Tmsp432p411x/msp432p411x.lds
@echo 'Finished building target: $@'
@echo ' '
%.bin: %.out
@echo 'Building target: $@'
@echo 'Invoking: GNU Objcopy Utility'
$(OBJCOPY) -Obinary $< $@
@echo 'Finished building target: $@'
@echo ' '
%.inc: %.bin
@echo 'Building target: $@'
@echo 'Invoking Bin2Char Script'
$(BIN2C) < $< > $@
rm $< $*.out
@echo 'Finished building target: $@'
@echo ' '
clean:
@echo 'Cleaning Targets and Build Artifacts'
rm -rf *.inc *.bin *.out *.map
rm -rf msp432e4x/*.o msp432e4x/*.d
rm -rf msp432p401x/*.o msp432p401x/*.d
rm -rf msp432p411x/*.o msp432p411x/*.d
@echo 'Finished clean'
@echo ' '
.PRECIOUS: %.bin
.PHONY: all clean

View File

@@ -0,0 +1,472 @@
/******************************************************************************
*
* Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include <stdint.h>
#include <stdbool.h>
#include "driverlib.h"
/*
* Wrapper function for the CPSID instruction.
* Returns the state of PRIMASK on entry.
*/
uint32_t __attribute__((naked)) cpu_cpsid(void)
{
uint32_t ret;
/* Read PRIMASK and disable interrupts. */
__asm(" mrs r0, PRIMASK\n"
" cpsid i\n"
" bx lr\n"
: "=r" (ret));
/*
* The return is handled in the inline assembly, but the compiler will
* still complain if there is not an explicit return here (despite the fact
* that this does not result in any code being produced because of the
* naked attribute).
*/
return ret;
}
/* Wrapper function for the CPUWFI instruction. */
void __attribute__((naked)) cpu_wfi(void)
{
/* Wait for the next interrupt. */
__asm(" wfi\n"
" bx lr\n");
}
/* Power Control Module APIs */
#if defined(PCM)
static bool __pcm_set_core_voltage_level_advanced(uint_fast8_t voltage_level,
uint32_t time_out, bool blocking)
{
uint8_t power_mode;
uint8_t current_voltage_level;
uint32_t reg_value;
bool bool_timeout;
/* Getting current power mode and level */
power_mode = pcm_get_power_mode();
current_voltage_level = pcm_get_core_voltage_level();
bool_timeout = time_out > 0 ? true : false;
/* If we are already at the power mode they requested, return */
if (current_voltage_level == voltage_level)
return true;
while (current_voltage_level != voltage_level) {
reg_value = PCM->CTL0;
switch (pcm_get_power_state()) {
case PCM_AM_LF_VCORE1:
case PCM_AM_DCDC_VCORE1:
case PCM_AM_LDO_VCORE0:
PCM->CTL0 = (PCM_KEY | (PCM_AM_LDO_VCORE1)
| (reg_value & ~(PCM_CTL0_KEY_MASK | PCM_CTL0_AMR_MASK)));
break;
case PCM_AM_LF_VCORE0:
case PCM_AM_DCDC_VCORE0:
case PCM_AM_LDO_VCORE1:
PCM->CTL0 = (PCM_KEY | (PCM_AM_LDO_VCORE0)
| (reg_value & ~(PCM_CTL0_KEY_MASK | PCM_CTL0_AMR_MASK)));
break;
default:
break;
}
if (blocking) {
while (BITBAND_PERI(PCM->CTL1, PCM_CTL1_PMR_BUSY_OFS)) {
if (bool_timeout && !(--time_out))
return false;
}
} else
return true;
current_voltage_level = pcm_get_core_voltage_level();
}
/* Changing the power mode if we are stuck in LDO mode */
if (power_mode != pcm_get_power_mode()) {
if (power_mode == PCM_DCDC_MODE)
return pcm_set_power_mode(PCM_DCDC_MODE);
else
return pcm_set_power_mode(PCM_LF_MODE);
}
return true;
}
bool pcm_set_core_voltage_level(uint_fast8_t voltage_level)
{
return __pcm_set_core_voltage_level_advanced(voltage_level, 0, true);
}
uint8_t pcm_get_power_mode(void)
{
uint8_t current_power_state;
current_power_state = pcm_get_power_state();
switch (current_power_state) {
case PCM_AM_LDO_VCORE0:
case PCM_AM_LDO_VCORE1:
case PCM_LPM0_LDO_VCORE0:
case PCM_LPM0_LDO_VCORE1:
default:
return PCM_LDO_MODE;
case PCM_AM_DCDC_VCORE0:
case PCM_AM_DCDC_VCORE1:
case PCM_LPM0_DCDC_VCORE0:
case PCM_LPM0_DCDC_VCORE1:
return PCM_DCDC_MODE;
case PCM_LPM0_LF_VCORE0:
case PCM_LPM0_LF_VCORE1:
case PCM_AM_LF_VCORE1:
case PCM_AM_LF_VCORE0:
return PCM_LF_MODE;
}
}
uint8_t pcm_get_core_voltage_level(void)
{
uint8_t current_power_state = pcm_get_power_state();
switch (current_power_state) {
case PCM_AM_LDO_VCORE0:
case PCM_AM_DCDC_VCORE0:
case PCM_AM_LF_VCORE0:
case PCM_LPM0_LDO_VCORE0:
case PCM_LPM0_DCDC_VCORE0:
case PCM_LPM0_LF_VCORE0:
default:
return PCM_VCORE0;
case PCM_AM_LDO_VCORE1:
case PCM_AM_DCDC_VCORE1:
case PCM_AM_LF_VCORE1:
case PCM_LPM0_LDO_VCORE1:
case PCM_LPM0_DCDC_VCORE1:
case PCM_LPM0_LF_VCORE1:
return PCM_VCORE1;
case PCM_LPM3:
return PCM_VCORELPM3;
}
}
static bool __pcm_set_power_mode_advanced(uint_fast8_t power_mode,
uint32_t time_out, bool blocking)
{
uint8_t current_power_mode;
uint8_t current_power_state;
uint32_t reg_value;
bool bool_timeout;
/* Getting Current Power Mode */
current_power_mode = pcm_get_power_mode();
/* If the power mode being set it the same as the current mode, return */
if (power_mode == current_power_mode)
return true;
current_power_state = pcm_get_power_state();
bool_timeout = time_out > 0 ? true : false;
/* Go through the while loop while we haven't achieved the power mode */
while (current_power_mode != power_mode) {
reg_value = PCM->CTL0;
switch (current_power_state) {
case PCM_AM_DCDC_VCORE0:
case PCM_AM_LF_VCORE0:
PCM->CTL0 = (PCM_KEY | PCM_AM_LDO_VCORE0
| (reg_value & ~(PCM_CTL0_KEY_MASK | PCM_CTL0_AMR_MASK)));
break;
case PCM_AM_LF_VCORE1:
case PCM_AM_DCDC_VCORE1:
PCM->CTL0 = (PCM_KEY | PCM_AM_LDO_VCORE1
| (reg_value & ~(PCM_CTL0_KEY_MASK | PCM_CTL0_AMR_MASK)));
break;
case PCM_AM_LDO_VCORE1: {
if (power_mode == PCM_DCDC_MODE) {
PCM->CTL0 = (PCM_KEY | PCM_AM_DCDC_VCORE1
| (reg_value & ~(PCM_CTL0_KEY_MASK
| PCM_CTL0_AMR_MASK)));
} else if (power_mode == PCM_LF_MODE) {
PCM->CTL0 = (PCM_KEY | PCM_AM_LF_VCORE1
| (reg_value & ~(PCM_CTL0_KEY_MASK
| PCM_CTL0_AMR_MASK)));
} else
return false;
break;
}
case PCM_AM_LDO_VCORE0: {
if (power_mode == PCM_DCDC_MODE) {
PCM->CTL0 = (PCM_KEY | PCM_AM_DCDC_VCORE0
| (reg_value & ~(PCM_CTL0_KEY_MASK
| PCM_CTL0_AMR_MASK)));
} else if (power_mode == PCM_LF_MODE) {
PCM->CTL0 = (PCM_KEY | PCM_AM_LF_VCORE0
| (reg_value & ~(PCM_CTL0_KEY_MASK
| PCM_CTL0_AMR_MASK)));
} else
return false;
break;
}
default:
break;
}
if (blocking) {
while (BITBAND_PERI(PCM->CTL1, PCM_CTL1_PMR_BUSY_OFS)) {
if (bool_timeout && !(--time_out))
return false;
}
} else
return true;
current_power_mode = pcm_get_power_mode();
current_power_state = pcm_get_power_state();
}
return true;
}
bool pcm_set_power_mode(uint_fast8_t power_mode)
{
return __pcm_set_power_mode_advanced(power_mode, 0, true);
}
static bool __pcm_set_power_state_advanced(uint_fast8_t power_state,
uint32_t timeout, bool blocking)
{
uint8_t current_power_state;
current_power_state = pcm_get_power_state();
if (current_power_state == power_state)
return true;
switch (power_state) {
case PCM_AM_LDO_VCORE0:
return __pcm_set_core_voltage_level_advanced(PCM_VCORE0, timeout,
blocking) && __pcm_set_power_mode_advanced(PCM_LDO_MODE,
timeout, blocking);
case PCM_AM_LDO_VCORE1:
return __pcm_set_core_voltage_level_advanced(PCM_VCORE1, timeout,
blocking) && __pcm_set_power_mode_advanced(PCM_LDO_MODE,
timeout, blocking);
case PCM_AM_DCDC_VCORE0:
return __pcm_set_core_voltage_level_advanced(PCM_VCORE0, timeout,
blocking) && __pcm_set_power_mode_advanced(PCM_DCDC_MODE,
timeout, blocking);
case PCM_AM_DCDC_VCORE1:
return __pcm_set_core_voltage_level_advanced(PCM_VCORE1, timeout,
blocking) && __pcm_set_power_mode_advanced(PCM_DCDC_MODE,
timeout, blocking);
case PCM_AM_LF_VCORE0:
return __pcm_set_core_voltage_level_advanced(PCM_VCORE0, timeout,
blocking) && __pcm_set_power_mode_advanced(PCM_LF_MODE,
timeout, blocking);
case PCM_AM_LF_VCORE1:
return __pcm_set_core_voltage_level_advanced(PCM_VCORE1, timeout,
blocking) && __pcm_set_power_mode_advanced(PCM_LF_MODE,
timeout, blocking);
case PCM_LPM0_LDO_VCORE0:
if (!__pcm_set_core_voltage_level_advanced(PCM_VCORE0, timeout,
blocking) || !__pcm_set_power_mode_advanced(PCM_LDO_MODE,
timeout, blocking))
break;
return pcm_goto_lpm0();
case PCM_LPM0_LDO_VCORE1:
if (!__pcm_set_core_voltage_level_advanced(PCM_VCORE1, timeout,
blocking) || !__pcm_set_power_mode_advanced(PCM_LDO_MODE,
timeout, blocking))
break;
return pcm_goto_lpm0();
case PCM_LPM0_DCDC_VCORE0:
if (!__pcm_set_core_voltage_level_advanced(PCM_VCORE0, timeout,
blocking) || !__pcm_set_power_mode_advanced(PCM_DCDC_MODE,
timeout, blocking))
break;
return pcm_goto_lpm0();
case PCM_LPM0_DCDC_VCORE1:
if (!__pcm_set_core_voltage_level_advanced(PCM_VCORE1, timeout,
blocking) || !__pcm_set_power_mode_advanced(PCM_DCDC_MODE,
timeout, blocking))
break;
return pcm_goto_lpm0();
case PCM_LPM0_LF_VCORE0:
if (!__pcm_set_core_voltage_level_advanced(PCM_VCORE0, timeout,
blocking) || !__pcm_set_power_mode_advanced(PCM_LF_MODE,
timeout, blocking))
break;
return pcm_goto_lpm0();
case PCM_LPM0_LF_VCORE1:
if (!__pcm_set_core_voltage_level_advanced(PCM_VCORE1, timeout,
blocking) || !__pcm_set_power_mode_advanced(PCM_LF_MODE,
timeout, blocking))
break;
return pcm_goto_lpm0();
case PCM_LPM3:
return pcm_goto_lpm3();
case PCM_LPM4:
return pcm_goto_lpm4();
case PCM_LPM45:
return pcm_shutdown_device(PCM_LPM45);
case PCM_LPM35_VCORE0:
return pcm_shutdown_device(PCM_LPM35_VCORE0);
default:
return false;
}
return false;
}
bool pcm_set_power_state(uint_fast8_t power_state)
{
return __pcm_set_power_state_advanced(power_state, 0, true);
}
bool pcm_shutdown_device(uint32_t shutdown_mode)
{
uint32_t shutdown_mode_bits = (shutdown_mode == PCM_LPM45) ?
PCM_CTL0_LPMR_12 : PCM_CTL0_LPMR_10;
/* If a power transition is occurring, return false */
if (BITBAND_PERI(PCM->CTL1, PCM_CTL1_PMR_BUSY_OFS))
return false;
/* Initiating the shutdown */
SCB->SCR |= SCB_SCR_SLEEPDEEP_MSK;
PCM->CTL0 = (PCM_KEY | shutdown_mode_bits
| (PCM->CTL0 & ~(PCM_CTL0_KEY_MASK | PCM_CTL0_LPMR_MASK)));
cpu_wfi();
return true;
}
bool pcm_goto_lpm4(void)
{
/* Disabling RTC_C and WDT_A */
wdt_a_hold_timer();
rtc_c_hold_clock();
/* LPM4 is just LPM3 with WDT_A/RTC_C disabled... */
return pcm_goto_lpm3();
}
bool pcm_goto_lpm0(void)
{
/* If we are in the middle of a state transition, return false */
if (BITBAND_PERI(PCM->CTL1, PCM_CTL1_PMR_BUSY_OFS))
return false;
SCB->SCR &= ~SCB_SCR_SLEEPDEEP_MSK;
cpu_wfi();
return true;
}
bool pcm_goto_lpm3(void)
{
uint_fast8_t current_power_state;
uint_fast8_t current_power_mode;
/* If we are in the middle of a state transition, return false */
if (BITBAND_PERI(PCM->CTL1, PCM_CTL1_PMR_BUSY_OFS))
return false;
/* If we are in the middle of a shutdown, return false */
if ((PCM->CTL0 & PCM_CTL0_LPMR_MASK) == PCM_CTL0_LPMR_10
|| (PCM->CTL0 & PCM_CTL0_LPMR_MASK) == PCM_CTL0_LPMR_12)
return false;
current_power_mode = pcm_get_power_mode();
current_power_state = pcm_get_power_state();
if (current_power_mode == PCM_DCDC_MODE)
pcm_set_power_mode(PCM_LDO_MODE);
/* Clearing the SDR */
PCM->CTL0 =
(PCM->CTL0 & ~(PCM_CTL0_KEY_MASK | PCM_CTL0_LPMR_MASK)) | PCM_KEY;
/* Setting the sleep deep bit */
SCB->SCR |= SCB_SCR_SLEEPDEEP_MSK;
cpu_wfi();
SCB->SCR &= ~SCB_SCR_SLEEPDEEP_MSK;
return pcm_set_power_state(current_power_state);
}
uint8_t pcm_get_power_state(void)
{
return (PCM->CTL0 & PCM_CTL0_CPM_MASK) >> PCM_CTL0_CPM_OFS;
}
#endif
/* Real Time Clock APIs */
#if defined(RTC_C)
void rtc_c_hold_clock(void)
{
RTC_C->CTL0 = (RTC_C->CTL0 & ~RTC_C_CTL0_KEY_MASK) | RTC_C_KEY;
BITBAND_PERI(RTC_C->CTL13, RTC_C_CTL13_HOLD_OFS) = 1;
BITBAND_PERI(RTC_C->CTL0, RTC_C_CTL0_KEY_OFS) = 0;
}
#endif
/* Watch Dog Timer APIs */
#if defined(WDT_A)
void wdt_a_hold_timer(void)
{
/* Set Hold bit */
uint8_t new_wdt_status = (WDT_A->CTL | WDT_A_CTL_HOLD);
WDT_A->CTL = WDT_A_CTL_PW + new_wdt_status;
}
#endif

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@@ -0,0 +1,384 @@
/******************************************************************************
*
* Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#ifndef OPENOCD_LOADERS_FLASH_MSP432_DRIVERLIB_H
#define OPENOCD_LOADERS_FLASH_MSP432_DRIVERLIB_H
#include <stdint.h>
#include <stdbool.h>
#ifdef __cplusplus
extern "C" {
#endif
#if defined(__MSP432E4X__)
#include "msp432e4x.h"
#elif defined(__MSP432P401X__)
#include "msp432p401x.h"
#elif defined(__MSP432P411X__)
#include "msp432p411x.h"
#else
#error "Failed to match a device specific include file"
#endif
/* Structure type to access the System Control Block (SCB). */
struct SCB_Type {
volatile uint32_t CPUID; /* CPUID Base Register */
volatile uint32_t ICSR; /* Interrupt Control and State Register */
volatile uint32_t VTOR; /* Vector Table Offset Register */
volatile uint32_t AIRCR; /* Application Interrupt and Reset Control */
volatile uint32_t SCR; /* System Control Register */
volatile uint32_t CCR; /* Configuration Control Register */
volatile uint8_t SHP[12U]; /* System Handlers Priority Registers */
volatile uint32_t SHCSR; /* System Handler Control and State */
volatile uint32_t CFSR; /* Configurable Fault Status Register */
volatile uint32_t HFSR; /* HardFault Status Register */
volatile uint32_t DFSR; /* Debug Fault Status Register */
volatile uint32_t MMFAR; /* MemManage Fault Address Register */
volatile uint32_t BFAR; /* BusFault Address Register */
volatile uint32_t AFSR; /* Auxiliary Fault Status Register */
volatile uint32_t PFR[2U]; /* Processor Feature Register */
volatile uint32_t DFR; /* Debug Feature Register */
volatile uint32_t ADR; /* Auxiliary Feature Register */
volatile uint32_t MMFR[4U]; /* Memory Model Feature Register */
volatile uint32_t ISAR[5U]; /* Instruction Set Attributes Register */
uint32_t RESERVED0[5U];
volatile uint32_t CPACR; /* Coprocessor Access Control Register */
};
/* SCB:SCR register bits */
#define SCB_SCR_SLEEPDEEP_POS 2U
#define SCB_SCR_SLEEPDEEP_MSK (1UL << SCB_SCR_SLEEPDEEP_POS)
/* Memory mapping of Core Hardware */
#define SCS_BASE (0xE000E000UL) /* System Control Space Base Address */
#define SCB_BASE (SCS_BASE + 0x0D00UL) /* System Control Block Base Address */
#define SCB ((struct SCB_Type *)SCB_BASE) /* SCB configuration struct */
/* Definitions of standard bits */
#define BIT0 (uint16_t)(0x0001)
#define BIT1 (uint16_t)(0x0002)
#define BIT2 (uint16_t)(0x0004)
#define BIT3 (uint16_t)(0x0008)
#define BIT4 (uint16_t)(0x0010)
#define BIT5 (uint16_t)(0x0020)
#define BIT6 (uint16_t)(0x0040)
#define BIT7 (uint16_t)(0x0080)
#define BIT8 (uint16_t)(0x0100)
#define BIT9 (uint16_t)(0x0200)
#define BITA (uint16_t)(0x0400)
#define BITB (uint16_t)(0x0800)
#define BITC (uint16_t)(0x1000)
#define BITD (uint16_t)(0x2000)
#define BITE (uint16_t)(0x4000)
#define BITF (uint16_t)(0x8000)
#define BIT(x) ((uint16_t)1 << (x))
/* CPU Module prototypes */
extern uint32_t cpu_cpsid(void);
extern void cpu_wfi(void);
/* Clock Signal Module constants */
#define CS_DCO_FREQUENCY_3 CS_CTL0_DCORSEL_1
#define CS_DCO_FREQUENCY_24 CS_CTL0_DCORSEL_4
/* Power Control Module constants */
#define PCM_KEY 0x695A0000
#define PCM_AM_LDO_VCORE0 0x00
#define PCM_AM_LDO_VCORE1 0x01
#define PCM_AM_DCDC_VCORE0 0x04
#define PCM_AM_DCDC_VCORE1 0x05
#define PCM_AM_LF_VCORE0 0x08
#define PCM_AM_LF_VCORE1 0x09
#define PCM_LPM0_LDO_VCORE0 0x10
#define PCM_LPM0_LDO_VCORE1 0x11
#define PCM_LPM0_DCDC_VCORE0 0x14
#define PCM_LPM0_DCDC_VCORE1 0x15
#define PCM_LPM0_LF_VCORE0 0x18
#define PCM_LPM0_LF_VCORE1 0x19
#define PCM_LPM3 0x20
#define PCM_LPM4 0x21
#define PCM_LPM35_VCORE0 0xC0
#define PCM_LPM45 0xA0
#define PCM_VCORE0 0x00
#define PCM_VCORE1 0x01
#define PCM_VCORELPM3 0x02
#define PCM_LDO_MODE 0x00
#define PCM_DCDC_MODE 0x01
#define PCM_LF_MODE 0x02
/* Power Control Module prototypes */
extern bool pcm_set_core_voltage_level(uint_fast8_t voltage_level);
extern uint8_t pcm_get_core_voltage_level(void);
extern bool pcm_set_power_mode(uint_fast8_t power_mode);
extern uint8_t pcm_get_power_mode(void);
extern bool pcm_set_power_state(uint_fast8_t power_state);
extern uint8_t pcm_get_power_state(void);
extern bool pcm_shutdown_device(uint32_t shutdown_mode);
extern bool pcm_goto_lpm0(void);
extern bool pcm_goto_lpm3(void);
extern bool pcm_goto_lpm4(void);
/* ROM API Function Pointers */
#define ROM_API_TABLE ((unsigned long *)0x02000800)
#define ROM_FLASH_CTL_TABLE ((unsigned long *)(ROM_API_TABLE[7]))
#define ROM_PCM_TABLE ((unsigned long *)(ROM_API_TABLE[13]))
#define ROM_WDT_TABLE ((unsigned long *)(ROM_API_TABLE[25]))
#define ROM_SYS_CTL_A_TABLE ((unsigned long *)(ROM_API_TABLE[26]))
#define ROM_FLASH_CTL_A_TABLE ((unsigned long *)(ROM_API_TABLE[27]))
#if defined(__MSP432P401X__)
#define ROM_FLASH_CTL_UNPROTECT_SECTOR \
((bool (*)(uint_fast8_t memory_space, \
uint32_t sector_mask))ROM_FLASH_CTL_TABLE[4])
#endif
#if defined(__MSP432P401X__)
#define ROM_FLASH_CTL_PROTECT_SECTOR \
((bool (*)(uint_fast8_t memory_space, \
uint32_t sector_mask))ROM_FLASH_CTL_TABLE[5])
#endif
#if defined(__MSP432P401X__)
#define ROM_FLASH_CTL_PERFORM_MASS_ERASE \
((bool (*)(void))ROM_FLASH_CTL_TABLE[8])
#endif
#if defined(__MSP432P401X__)
#define ROM_FLASH_CTL_ERASE_SECTOR \
((bool (*)(uint32_t addr))ROM_FLASH_CTL_TABLE[9])
#endif
#if defined(__MSP432P401X__)
#define ROM_FLASH_CTL_PROGRAM_MEMORY \
((bool (*)(void *src, void *dest, uint32_t length))ROM_FLASH_CTL_TABLE[10])
#endif
#if defined(__MSP432P401X__)
#define ROM_FLASH_CTL_SET_WAIT_STATE \
((void (*)(uint32_t bank, uint32_t wait_state))ROM_FLASH_CTL_TABLE[21])
#endif
#if defined(__MSP432P401X__)
#define ROM_FLASH_CTL_GET_WAIT_STATE \
((uint32_t (*)(uint32_t bank))ROM_FLASH_CTL_TABLE[22])
#endif
#if defined(__MSP432P401X__)
#define ROM_PCM_SET_CORE_VOLTAGE_LEVEL \
((bool (*)(uint_fast8_t voltage_level))ROM_PCM_TABLE[0])
#endif
#if defined(__MSP432P401X__)
#define ROM_PCM_GET_CORE_VOLTAGE_LEVEL \
((uint8_t (*)(void))ROM_PCM_TABLE[1])
#endif
#if defined(__MSP432P401X__)
#define ROM_PCM_SET_POWER_STATE \
((bool (*)(uint_fast8_t power_state))ROM_PCM_TABLE[6])
#endif
#if defined(__MSP432P401X__)
#define ROM_PCM_GET_POWER_STATE \
((uint8_t (*)(void))ROM_PCM_TABLE[8])
#endif
#if defined(__MSP432P401X__) || defined(__MSP432P411X__)
#define ROM_WDT_A_HOLD_TIMER \
((void (*)(void))ROM_WDT_TABLE[0])
#endif
#if defined(__MSP432P411X__)
#define ROM_SYS_CTL_A_GET_FLASH_SIZE \
((uint_least32_t (*)(void))ROM_SYS_CTL_A_TABLE[1])
#endif
#if defined(__MSP432P411X__)
#define ROM_SYS_CTL_A_GET_INFO_FLASH_SIZE \
((uint_least32_t (*)(void))ROM_SYS_CTL_A_TABLE[18])
#endif
#if defined(__MSP432P411X__)
#define ROM_FLASH_CTL_A_UNPROTECT_MEMORY \
((bool (*)(uint32_t start_addr, uint32_t end_addr))ROM_FLASH_CTL_A_TABLE[4])
#endif
#if defined(__MSP432P411X__)
#define ROM_FLASH_CTL_A_PROTECT_MEMORY \
((bool (*)(uint32_t start_addr, uint32_t end_addr))ROM_FLASH_CTL_A_TABLE[5])
#endif
#if defined(__MSP432P411X__)
#define ROM_FLASH_CTL_A_PERFORM_MASS_ERASE \
((bool (*)(void))ROM_FLASH_CTL_A_TABLE[8])
#endif
#if defined(__MSP432P411X__)
#define ROM_FLASH_CTL_A_ERASE_SECTOR \
((bool (*)(uint32_t addr))ROM_FLASH_CTL_A_TABLE[9])
#endif
#if defined(__MSP432P411X__)
#define ROM_FLASH_CTL_A_PROGRAM_MEMORY \
((bool (*)(void *src, void *dest, uint32_t length)) \
ROM_FLASH_CTL_A_TABLE[10])
#endif
#if defined(__MSP432P411X__)
#define ROM_FLASH_CTL_A_SET_WAIT_STATE \
((void (*)(uint32_t bank, uint32_t wait_state))ROM_FLASH_CTL_A_TABLE[21])
#endif
#if defined(__MSP432P411X__)
#define ROM_FLASH_CTL_A_GET_WAIT_STATE \
((uint32_t (*)(uint32_t bank))ROM_FLASH_CTL_A_TABLE[22])
#endif
/* Map API functions to ROM or locally built functions */
#ifdef ROM_FLASH_CTL_UNPROTECT_SECTOR
#define MAP_FLASH_CTL_UNPROTECT_SECTOR ROM_FLASH_CTL_UNPROTECT_SECTOR
#else
#define MAP_FLASH_CTL_UNPROTECT_SECTOR flash_ctl_unprotect_sector
#endif
#ifdef ROM_FLASH_CTL_PROTECT_SECTOR
#define MAP_FLASH_CTL_PROTECT_SECTOR ROM_FLASH_CTL_PROTECT_SECTOR
#else
#define MAP_FLASH_CTL_PROTECT_SECTOR flash_ctl_protect_sector
#endif
#ifdef ROM_FLASH_CTL_PERFORM_MASS_ERASE
#define MAP_FLASH_CTL_PERFORM_MASS_ERASE ROM_FLASH_CTL_PERFORM_MASS_ERASE
#else
#define MAP_FLASH_CTL_PERFORM_MASS_ERASE flash_ctl_perform_mass_erase
#endif
#ifdef ROM_FLASH_CTL_ERASE_SECTOR
#define MAP_FLASH_CTL_ERASE_SECTOR ROM_FLASH_CTL_ERASE_SECTOR
#else
#define MAP_FLASH_CTL_ERASE_SECTOR flash_ctl_erase_sector
#endif
#ifdef ROM_FLASH_CTL_PROGRAM_MEMORY
#define MAP_FLASH_CTL_PROGRAM_MEMORY ROM_FLASH_CTL_PROGRAM_MEMORY
#else
#define MAP_FLASH_CTL_PROGRAM_MEMORY flash_ctl_program_memory
#endif
#ifdef ROM_FLASH_CTL_SET_WAIT_STATE
#define MAP_FLASH_CTL_SET_WAIT_STATE ROM_FLASH_CTL_SET_WAIT_STATE
#else
#define MAP_FLASH_CTL_SET_WAIT_STATE flash_ctl_set_wait_state
#endif
#ifdef ROM_FLASH_CTL_GET_WAIT_STATE
#define MAP_FLASH_CTL_GET_WAIT_STATE ROM_FLASH_CTL_GET_WAIT_STATE
#else
#define MAP_FLASH_CTL_GET_WAIT_STATE flash_ctl_get_wait_state
#endif
#ifdef ROM_PCM_SET_CORE_VOLTAGE_LEVEL
#define MAP_PCM_SET_CORE_VOLTAGE_LEVEL ROM_PCM_SET_CORE_VOLTAGE_LEVEL
#else
#define MAP_PCM_SET_CORE_VOLTAGE_LEVEL pcm_set_core_voltage_level
#endif
#ifdef ROM_PCM_GET_CORE_VOLTAGE_LEVEL
#define MAP_PCM_GET_CORE_VOLTAGE_LEVEL ROM_PCM_GET_CORE_VOLTAGE_LEVEL
#else
#define MAP_PCM_GET_CORE_VOLTAGE_LEVEL pcm_get_core_voltage_level
#endif
#ifdef ROM_PCM_SET_POWER_STATE
#define MAP_PCM_SET_POWER_STATE ROM_PCM_SET_POWER_STATE
#else
#define MAP_PCM_SET_POWER_STATE pcm_set_power_state
#endif
#ifdef ROM_PCM_GET_POWER_STATE
#define MAP_PCM_GET_POWER_STATE ROM_PCM_GET_POWER_STATE
#else
#define MAP_PCM_GET_POWER_STATE pcm_get_power_state
#endif
#ifdef ROM_WDT_A_HOLD_TIMER
#define MAP_WDT_A_HOLD_TIMER ROM_WDT_A_HOLD_TIMER
#else
#define MAP_WDT_A_HOLD_TIMER wdt_a_hold_timer
#endif
#ifdef ROM_SYS_CTL_A_GET_FLASH_SIZE
#define MAP_SYS_CTL_A_GET_FLASH_SIZE ROM_SYS_CTL_A_GET_FLASH_SIZE
#else
#define MAP_SYS_CTL_A_GET_FLASH_SIZE sys_ctl_a_get_flash_size
#endif
#ifdef ROM_SYS_CTL_A_GET_INFO_FLASH_SIZE
#define MAP_SYS_CTL_A_GET_INFO_FLASH_SIZE ROM_SYS_CTL_A_GET_INFO_FLASH_SIZE
#else
#define MAP_SYS_CTL_A_GET_INFO_FLASH_SIZE sys_ctl_a_get_info_flash_size
#endif
#ifdef ROM_FLASH_CTL_A_UNPROTECT_MEMORY
#define MAP_FLASH_CTL_A_UNPROTECT_MEMORY ROM_FLASH_CTL_A_UNPROTECT_MEMORY
#else
#define MAP_FLASH_CTL_A_UNPROTECT_MEMORY flash_ctl_a_unprotect_memory
#endif
#ifdef ROM_FLASH_CTL_A_PROTECT_MEMORY
#define MAP_FLASH_CTL_A_PROTECT_MEMORY ROM_FLASH_CTL_A_PROTECT_MEMORY
#else
#define MAP_FLASH_CTL_A_PROTECT_MEMORY flash_ctl_a_protect_memory
#endif
#ifdef ROM_FLASH_CTL_A_PERFORM_MASS_ERASE
#define MAP_FLASH_CTL_A_PERFORM_MASS_ERASE ROM_FLASH_CTL_A_PERFORM_MASS_ERASE
#else
#define MAP_FLASH_CTL_A_PERFORM_MASS_ERASE flash_ctl_a_perform_mass_erase
#endif
#ifdef ROM_FLASH_CTL_A_ERASE_SECTOR
#define MAP_FLASH_CTL_A_ERASE_SECTOR ROM_FLASH_CTL_A_ERASE_SECTOR
#else
#define MAP_FLASH_CTL_A_ERASE_SECTOR flash_ctl_a_erase_sector
#endif
#ifdef ROM_FLASH_CTL_A_PROGRAM_MEMORY
#define MAP_FLASH_CTL_A_PROGRAM_MEMORY ROM_FLASH_CTL_A_PROGRAM_MEMORY
#else
#define MAP_FLASH_CTL_A_PROGRAM_MEMORY flash_ctl_a_program_memory
#endif
#ifdef ROM_FLASH_CTL_A_SET_WAIT_STATE
#define MAP_FLASH_CTL_A_SET_WAIT_STATE ROM_FLASH_CTL_A_SET_WAIT_STATE
#else
#define MAP_FLASH_CTL_A_SET_WAIT_STATE flash_ctl_a_set_wait_state
#endif
#ifdef ROM_FLASH_CTL_A_GET_WAIT_STATE
#define MAP_FLASH_CTL_A_GET_WAIT_STATE ROM_FLASH_CTL_A_GET_WAIT_STATE
#else
#define MAP_FLASH_CTL_A_GET_WAIT_STATE flash_ctl_a_get_wait_state
#endif
/* Real Time Clock Module prototypes */
extern void rtc_c_hold_clock(void);
/* Watchdog Timer Module prototypes */
extern void wdt_a_hold_timer(void);
#if defined(__MCU_HAS_FLCTL_A__)
#define FLASH_A_BANK0 0x00
#define FLASH_A_BANK1 0x01
#define __INFO_FLASH_A_TECH_START__ 0x00200000
#define __INFO_FLASH_A_TECH_MIDDLE__ 0x00204000
#endif
#if defined(__MCU_HAS_FLCTL__)
#define FLASH_BANK0 0x00
#define FLASH_BANK1 0x01
#define FLASH_MAIN_MEMORY_SPACE_BANK0 0x01
#define FLASH_MAIN_MEMORY_SPACE_BANK1 0x02
#define FLASH_INFO_MEMORY_SPACE_BANK0 0x03
#define FLASH_INFO_MEMORY_SPACE_BANK1 0x04
#define FLASH_SECTOR0 FLCTL_BANK0_MAIN_WEPROT_PROT0
#define FLASH_SECTOR1 FLCTL_BANK0_MAIN_WEPROT_PROT1
#endif
#ifdef __cplusplus
}
#endif
#endif /* OPENOCD_LOADERS_FLASH_MSP432_DRIVERLIB_H */

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/******************************************************************************
*
* Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include <stdint.h>
#include <stdbool.h>
#include "driverlib.h"
#include "MSP432E4_FlashLibIf.h"
/* Local prototypes */
void msp432_flash_init(void);
void msp432_flash_mass_erase(void);
void msp432_flash_sector_erase(void);
void msp432_flash_write(void);
void msp432_flash_continous_write(void);
void msp432_flash_exit(void);
int main(void)
{
/* Disable interrupts */
__asm(" cpsid i");
/* Halt watchdog */
SYSCTL->RCGCWD &= ~(SYSCTL_RCGCWD_R1 + SYSCTL_RCGCWD_R0);
while (1) {
switch (FLASH_LOADER->FLASH_FUNCTION) {
case FLASH_INIT:
FLASH_LOADER->RETURN_CODE = FLASH_BUSY;
msp432_flash_init();
FLASH_LOADER->FLASH_FUNCTION = 0;
break;
case FLASH_MASS_ERASE:
FLASH_LOADER->RETURN_CODE = FLASH_BUSY;
msp432_flash_mass_erase();
FLASH_LOADER->FLASH_FUNCTION = 0;
break;
case FLASH_SECTOR_ERASE:
FLASH_LOADER->RETURN_CODE = FLASH_BUSY;
msp432_flash_sector_erase();
FLASH_LOADER->FLASH_FUNCTION = 0;
break;
case FLASH_PROGRAM:
case FLASH_CONTINUOUS_PROGRAM:
FLASH_LOADER->RETURN_CODE = FLASH_BUSY;
msp432_flash_continous_write();
FLASH_LOADER->FLASH_FUNCTION = 0;
break;
case FLASH_EXIT:
FLASH_LOADER->RETURN_CODE = FLASH_BUSY;
msp432_flash_exit();
FLASH_LOADER->FLASH_FUNCTION = 0;
break;
case FLASH_NO_COMMAND:
break;
default:
FLASH_LOADER->RETURN_CODE = FLASH_WRONG_COMMAND;
break;
}
}
}
/* Initialize flash */
void msp432_flash_init(void)
{
SCB->VTOR = 0x20000000;
FLASH_LOADER->RETURN_CODE = FLASH_SUCCESS;
}
/* Erase entire flash */
void msp432_flash_mass_erase(void)
{
bool success = false;
/* Clear the flash access and error interrupts. */
FLASH_CTRL->FCMISC = (FLASH_FCMISC_AMISC | FLASH_FCMISC_VOLTMISC |
FLASH_FCMISC_ERMISC | FLASH_FCMISC_PMISC);
/* Trigger mass erase */
FLASH_CTRL->FMC = FLASH_FMC_WRKEY | FLASH_FMC_MERASE;
while (FLASH_CTRL->FMC & FLASH_FMC_MERASE)
;
/* Return an error if an access violation occurred. */
success = !(FLASH_CTRL->FCRIS & (FLASH_FCRIS_ARIS | FLASH_FCRIS_VOLTRIS |
FLASH_FCRIS_ERRIS));
if (!success)
FLASH_LOADER->RETURN_CODE = FLASH_VERIFY_ERROR;
else
FLASH_LOADER->RETURN_CODE = FLASH_SUCCESS;
}
/* Erase one flash sector */
void msp432_flash_sector_erase(void)
{
bool success = false;
/* Clear the flash access and error interrupts. */
FLASH_CTRL->FCMISC = (FLASH_FCMISC_AMISC | FLASH_FCMISC_VOLTMISC |
FLASH_FCMISC_ERMISC | FLASH_FCMISC_PMISC);
/* Set 16kB aligned flash page address to be erased (16kB block) */
FLASH_CTRL->FMA = FLASH_LOADER->DST_ADDRESS;
/* Trigger sector erase (erase flash page) */
FLASH_CTRL->FMC = FLASH_FMC_WRKEY | FLASH_FMC_ERASE;
while (FLASH_CTRL->FMC & FLASH_FMC_ERASE)
;
/* Return an error if an access violation occurred. */
success = !(FLASH_CTRL->FCRIS & (FLASH_FCRIS_ARIS | FLASH_FCRIS_VOLTRIS |
FLASH_FCRIS_ERRIS));
if (!success)
FLASH_LOADER->RETURN_CODE = FLASH_ERROR;
else
FLASH_LOADER->RETURN_CODE = FLASH_SUCCESS;
}
/* Write data to flash */
void msp432_flash_continous_write(void)
{
bool buffer1_in_use = false;
bool buffer2_in_use = false;
uint32_t *src_address = NULL;
bool success = true;
uint32_t i = 0;
uint32_t address = FLASH_LOADER->DST_ADDRESS;
uint32_t data_to_write = FLASH_LOADER->SRC_LENGTH;
int32_t write_package = 0;
/* Clear the flash access and error interrupts. */
FLASH_CTRL->FCMISC = (FLASH_FCMISC_AMISC | FLASH_FCMISC_VOLTMISC |
FLASH_FCMISC_INVDMISC | FLASH_FCMISC_PROGMISC | FLASH_FCMISC_PMISC);
do {
if (data_to_write > SRC_LENGTH_MAX) {
write_package = SRC_LENGTH_MAX;
data_to_write -= write_package;
} else {
write_package = data_to_write;
data_to_write -= write_package;
}
while (!(FLASH_LOADER->BUFFER1_STATUS_REGISTER & BUFFER_DATA_READY) &&
!(FLASH_LOADER->BUFFER2_STATUS_REGISTER & BUFFER_DATA_READY))
;
if (FLASH_LOADER->BUFFER1_STATUS_REGISTER & BUFFER_DATA_READY) {
FLASH_LOADER->BUFFER1_STATUS_REGISTER |= BUFFER_ACTIVE;
src_address = (uint32_t *) RAM_LOADER_BUFFER1;
buffer1_in_use = true;
} else if (FLASH_LOADER->BUFFER2_STATUS_REGISTER & BUFFER_DATA_READY) {
FLASH_LOADER->BUFFER2_STATUS_REGISTER |= BUFFER_ACTIVE;
src_address = (uint32_t *) RAM_LOADER_BUFFER2;
buffer2_in_use = true;
}
/*
* The flash hardware can only write complete words to flash. If
* an unaligned address is passed in, we must do a read-modify-write
* on a word with enough bytes to align the rest of the buffer. And
* if less than a whole word remains at the end, we must also do a
* read-modify-write on a final word to finish up.
*/
if (0 != (address & 0x3)) {
uint32_t head;
uint8_t *ui8head = (uint8_t *)&head;
uint8_t *buffer = (uint8_t *)src_address;
/* Get starting offset for data to write (will be 1 to 3) */
uint32_t head_offset = address & 0x03;
/* Get the aligned address to write this first word to */
uint32_t head_address = address & 0xfffffffc;
/* Retrieve what is already in flash at the head address */
head = *(uint32_t *)head_address;
/* Substitute in the new data to write */
while ((write_package > 0) && (head_offset < 4)) {
ui8head[head_offset] = *buffer;
head_offset++;
address++;
buffer++;
write_package--;
}
src_address = (uint32_t *)buffer;
FLASH_CTRL->FMD = head;
FLASH_CTRL->FMA = head_address;
FLASH_CTRL->FMC = FLASH_FMC_WRKEY | FLASH_FMC_WRITE;
/* Wait until the word has been programmed. */
while (FLASH_CTRL->FMC & FLASH_FMC_WRITE)
;
/* Return an error if an access violation occurred. */
success = !(FLASH_CTRL->FCRIS & (FLASH_FCRIS_ARIS |
FLASH_FCRIS_ERIS | FLASH_FCRIS_INVDRIS | FLASH_FCRIS_PROGRIS));
}
/* Program a word at a time until aligned on 32-word boundary */
while ((write_package >= 4) && ((address & 0x7f) != 0) && success) {
FLASH_CTRL->FMD = *src_address++;
FLASH_CTRL->FMA = address;
FLASH_CTRL->FMC = FLASH_FMC_WRKEY | FLASH_FMC_WRITE;
/* Wait until the word has been programmed. */
while (FLASH_CTRL->FMC & FLASH_FMC_WRITE)
;
/* Prepare for next word to write */
write_package -= 4;
address += 4;
/* Return an error if an access violation occurred. */
success = !(FLASH_CTRL->FCRIS & (FLASH_FCRIS_ARIS |
FLASH_FCRIS_ERIS | FLASH_FCRIS_INVDRIS | FLASH_FCRIS_PROGRIS));
}
/* Program data in 32-word blocks */
while ((write_package >= 32) && success) {
/* Loop over the words in this 32-word block. */
i = 0;
do {
FLASH_CTRL->FWBN[i] = *src_address++;
write_package -= 4;
i++;
} while ((write_package > 0) && (i < 32));
FLASH_CTRL->FMA = address;
FLASH_CTRL->FMC2 = FLASH_FMC_WRKEY | FLASH_FMC2_WRBUF;
/* Wait until the write buffer has been programmed. */
while (FLASH_CTRL->FMC2 & FLASH_FMC2_WRBUF)
;
/* Increment destination address by words written */
address += 128;
/* Return an error if an access violation occurred. */
success = !(FLASH_CTRL->FCRIS & (FLASH_FCRIS_ARIS |
FLASH_FCRIS_ERIS | FLASH_FCRIS_INVDRIS | FLASH_FCRIS_PROGRIS));
}
/* Program a word at a time on left over data */
while ((write_package >= 4) && success) {
FLASH_CTRL->FMD = *src_address++;
FLASH_CTRL->FMA = address;
FLASH_CTRL->FMC = FLASH_FMC_WRKEY | FLASH_FMC_WRITE;
/* Wait until the word has been programmed. */
while (FLASH_CTRL->FMC & FLASH_FMC_WRITE)
;
/* Prepare for next word to write */
write_package -= 4;
address += 4;
/* Return an error if an access violation occurred. */
success = !(FLASH_CTRL->FCRIS & (FLASH_FCRIS_ARIS |
FLASH_FCRIS_ERIS | FLASH_FCRIS_INVDRIS | FLASH_FCRIS_PROGRIS));
}
if ((write_package > 0) && success) {
uint32_t tail;
uint8_t *ui8tail = (uint8_t *)&tail;
uint8_t *buffer = (uint8_t *)src_address;
/* Set starting offset for data to write */
uint32_t tail_offset = 0;
/* Get the address to write this last word to */
uint32_t tail_address = address;
/* Retrieve what is already in flash at the tail address */
tail = *(uint32_t *)address;
/* Substitute in the new data to write */
while (write_package > 0) {
ui8tail[tail_offset] = *buffer;
tail_offset++;
address++;
buffer++;
write_package--;
}
FLASH_CTRL->FMD = tail;
FLASH_CTRL->FMA = tail_address;
FLASH_CTRL->FMC = FLASH_FMC_WRKEY | FLASH_FMC_WRITE;
/* Wait until the word has been programmed. */
while (FLASH_CTRL->FMC & FLASH_FMC_WRITE)
;
/* Return an error if an access violation occurred. */
success = !(FLASH_CTRL->FCRIS & (FLASH_FCRIS_ARIS |
FLASH_FCRIS_ERIS | FLASH_FCRIS_INVDRIS | FLASH_FCRIS_PROGRIS));
}
if (buffer1_in_use) {
FLASH_LOADER->BUFFER1_STATUS_REGISTER &=
~(BUFFER_ACTIVE | BUFFER_DATA_READY);
buffer1_in_use = false;
} else if (buffer2_in_use) {
FLASH_LOADER->BUFFER2_STATUS_REGISTER &=
~(BUFFER_ACTIVE | BUFFER_DATA_READY);
buffer2_in_use = false;
}
} while (success && data_to_write);
if (!success)
FLASH_LOADER->RETURN_CODE = FLASH_ERROR;
else
FLASH_LOADER->RETURN_CODE = FLASH_SUCCESS;
}
/* Exit flash programming */
void msp432_flash_exit(void)
{
SCB->VTOR = 0x00000000;
FLASH_LOADER->RETURN_CODE = FLASH_SUCCESS;
}

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/******************************************************************************
*
* Copyright (C) 2013-2018 Texas Instruments Incorporated - http://www.ti.com/
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include <stdint.h>
#include <stdbool.h>
#include "driverlib.h"
#include "MSP432P4_FlashLibIf.h"
/* Number of erase repeats until timeout */
#define FLASH_MAX_REPEATS 5
/* Local prototypes */
void msp432_flash_init(void);
void msp432_flash_mass_erase(void);
void msp432_flash_sector_erase(void);
void msp432_flash_write(void);
void msp432_flash_continous_write(void);
void msp432_flash_exit(void);
void unlock_flash_sectors(void);
void unlock_all_flash_sectors(void);
void lock_all_flash_sectors(void);
void __cs_set_dco_frequency_range(uint32_t dco_freq);
static bool program_device(void *src, void *dest, uint32_t length);
struct backup_params {
uint32_t BANK0_WAIT_RESTORE;
uint32_t BANK1_WAIT_RESTORE;
uint32_t CS_DC0_FREQ_RESTORE;
uint8_t VCORE_LEVEL_RESTORE;
uint8_t PCM_VCORE_LEVEL_RESTORE;
};
#define BACKUP_PARAMS ((struct backup_params *) 0x20000180)
/* Main with trampoline */
int main(void)
{
/* Halt watchdog */
MAP_WDT_A_HOLD_TIMER();
/* Disable interrupts */
cpu_cpsid();
while (1) {
switch (FLASH_LOADER->FLASH_FUNCTION) {
case FLASH_INIT:
FLASH_LOADER->RETURN_CODE = FLASH_BUSY;
msp432_flash_init();
FLASH_LOADER->FLASH_FUNCTION = 0;
break;
case FLASH_MASS_ERASE:
FLASH_LOADER->RETURN_CODE = FLASH_BUSY;
msp432_flash_mass_erase();
FLASH_LOADER->FLASH_FUNCTION = 0;
break;
case FLASH_SECTOR_ERASE:
FLASH_LOADER->RETURN_CODE = FLASH_BUSY;
msp432_flash_sector_erase();
FLASH_LOADER->FLASH_FUNCTION = 0;
break;
case FLASH_PROGRAM:
FLASH_LOADER->RETURN_CODE = FLASH_BUSY;
msp432_flash_write();
FLASH_LOADER->FLASH_FUNCTION = 0;
break;
case FLASH_CONTINUOUS_PROGRAM:
FLASH_LOADER->RETURN_CODE = FLASH_BUSY;
msp432_flash_continous_write();
FLASH_LOADER->FLASH_FUNCTION = 0;
break;
case FLASH_EXIT:
FLASH_LOADER->RETURN_CODE = FLASH_BUSY;
msp432_flash_exit();
FLASH_LOADER->FLASH_FUNCTION = 0;
break;
case FLASH_NO_COMMAND:
break;
default:
FLASH_LOADER->RETURN_CODE = FLASH_WRONG_COMMAND;
break;
}
}
}
/* Initialize flash */
void msp432_flash_init(void)
{
bool success = false;
/* Point to vector table in RAM */
SCB->VTOR = (uint32_t)0x01000000;
/* backup system parameters */
BACKUP_PARAMS->BANK0_WAIT_RESTORE =
MAP_FLASH_CTL_GET_WAIT_STATE(FLASH_BANK0);
BACKUP_PARAMS->BANK1_WAIT_RESTORE =
MAP_FLASH_CTL_GET_WAIT_STATE(FLASH_BANK1);
BACKUP_PARAMS->VCORE_LEVEL_RESTORE = MAP_PCM_GET_CORE_VOLTAGE_LEVEL();
BACKUP_PARAMS->PCM_VCORE_LEVEL_RESTORE = MAP_PCM_GET_POWER_STATE();
BACKUP_PARAMS->CS_DC0_FREQ_RESTORE = CS->CTL0 & CS_CTL0_DCORSEL_MASK;
/* set parameters for flashing */
success = MAP_PCM_SET_POWER_STATE(PCM_AM_LDO_VCORE0);
/* Set Flash wait states to 2 */
MAP_FLASH_CTL_SET_WAIT_STATE(FLASH_BANK0, 2);
MAP_FLASH_CTL_SET_WAIT_STATE(FLASH_BANK1, 2);
/* Set CPU speed to 24MHz */
__cs_set_dco_frequency_range(CS_DCO_FREQUENCY_24);
if (!success) {
/* Indicate failed power switch */
FLASH_LOADER->RETURN_CODE = FLASH_POWER_ERROR;
} else
FLASH_LOADER->RETURN_CODE = FLASH_SUCCESS;
}
/* Erase entire flash */
void msp432_flash_mass_erase(void)
{
bool success = false;
/* Allow flash writes */
unlock_flash_sectors();
/* Allow some mass erase repeats before timeout with error */
int erase_repeats = FLASH_MAX_REPEATS;
while (!success && (erase_repeats > 0)) {
/* Mass erase with post-verify */
success = MAP_FLASH_CTL_PERFORM_MASS_ERASE();
erase_repeats--;
}
if (erase_repeats == 0)
FLASH_LOADER->RETURN_CODE = FLASH_VERIFY_ERROR;
else
FLASH_LOADER->RETURN_CODE = FLASH_SUCCESS;
/* Block flash writes */
lock_all_flash_sectors();
}
/* Erase one flash sector */
void msp432_flash_sector_erase(void)
{
bool success = false;
/* Allow flash writes */
unlock_all_flash_sectors();
/* Allow some sector erase repeats before timeout with error */
int erase_repeats = FLASH_MAX_REPEATS;
while (!success && (erase_repeats > 0)) {
/* Sector erase with post-verify */
success = MAP_FLASH_CTL_ERASE_SECTOR(FLASH_LOADER->DST_ADDRESS);
erase_repeats--;
}
if (erase_repeats == 0)
FLASH_LOADER->RETURN_CODE = FLASH_ERROR;
else
FLASH_LOADER->RETURN_CODE = FLASH_SUCCESS;
/* Block flash writes */
lock_all_flash_sectors();
}
/* Write data to flash with the help of DriverLib */
void msp432_flash_write(void)
{
bool success = false;
/* Allow flash writes */
unlock_all_flash_sectors();
while (!(FLASH_LOADER->BUFFER1_STATUS_REGISTER & BUFFER_DATA_READY))
;
FLASH_LOADER->BUFFER1_STATUS_REGISTER |= BUFFER_ACTIVE;
/* Program memory */
success = program_device((uint32_t *)RAM_LOADER_BUFFER1,
(void *)FLASH_LOADER->DST_ADDRESS, FLASH_LOADER->SRC_LENGTH);
FLASH_LOADER->BUFFER1_STATUS_REGISTER &=
~(BUFFER_ACTIVE | BUFFER_DATA_READY);
/* Block flash writes */
lock_all_flash_sectors();
if (!success)
FLASH_LOADER->RETURN_CODE = FLASH_ERROR;
else
FLASH_LOADER->RETURN_CODE = FLASH_SUCCESS;
}
/* Write data to flash with the help of DriverLib with auto-increment */
void msp432_flash_continous_write(void)
{
bool buffer1_in_use = false;
bool buffer2_in_use = false;
uint32_t *src_address = NULL;
bool success = false;
uint32_t bytes_to_write = FLASH_LOADER->SRC_LENGTH;
uint32_t write_package = 0;
uint32_t start_addr = FLASH_LOADER->DST_ADDRESS;
while (bytes_to_write > 0) {
if (bytes_to_write > SRC_LENGTH_MAX) {
write_package = SRC_LENGTH_MAX;
bytes_to_write -= write_package;
} else {
write_package = bytes_to_write;
bytes_to_write -= write_package;
}
unlock_all_flash_sectors();
while (!(FLASH_LOADER->BUFFER1_STATUS_REGISTER & BUFFER_DATA_READY) &&
!(FLASH_LOADER->BUFFER2_STATUS_REGISTER & BUFFER_DATA_READY))
;
if (FLASH_LOADER->BUFFER1_STATUS_REGISTER & BUFFER_DATA_READY) {
FLASH_LOADER->BUFFER1_STATUS_REGISTER |= BUFFER_ACTIVE;
src_address = (uint32_t *)RAM_LOADER_BUFFER1;
buffer1_in_use = true;
} else if (FLASH_LOADER->BUFFER2_STATUS_REGISTER & BUFFER_DATA_READY) {
FLASH_LOADER->BUFFER2_STATUS_REGISTER |= BUFFER_ACTIVE;
src_address = (uint32_t *)RAM_LOADER_BUFFER2;
buffer2_in_use = true;
}
if (buffer1_in_use || buffer2_in_use) {
success = program_device(src_address,
(void *)start_addr, write_package);
if (buffer1_in_use)
P6->OUT &= ~BIT4; /* Program from B1 */
else if (buffer2_in_use)
P3->OUT &= ~BIT6; /* Program from B1 */
start_addr += write_package;
}
if (buffer1_in_use) {
FLASH_LOADER->BUFFER1_STATUS_REGISTER &=
~(BUFFER_ACTIVE | BUFFER_DATA_READY);
buffer1_in_use = false;
} else if (buffer2_in_use) {
FLASH_LOADER->BUFFER2_STATUS_REGISTER &=
~(BUFFER_ACTIVE | BUFFER_DATA_READY);
buffer2_in_use = false;
}
/* Block flash writes */
lock_all_flash_sectors();
if (!success) {
FLASH_LOADER->RETURN_CODE = FLASH_ERROR;
break;
}
}
if (success)
FLASH_LOADER->RETURN_CODE = FLASH_SUCCESS;
}
/* Unlock Main/Info Flash sectors */
void unlock_flash_sectors(void)
{
if (FLASH_LOADER->ERASE_PARAM & ERASE_MAIN) {
MAP_FLASH_CTL_UNPROTECT_SECTOR(FLASH_MAIN_MEMORY_SPACE_BANK0,
0xFFFFFFFF);
MAP_FLASH_CTL_UNPROTECT_SECTOR(FLASH_MAIN_MEMORY_SPACE_BANK1,
0xFFFFFFFF);
}
if (FLASH_LOADER->ERASE_PARAM & ERASE_INFO) {
MAP_FLASH_CTL_UNPROTECT_SECTOR(FLASH_INFO_MEMORY_SPACE_BANK0,
FLASH_SECTOR0 | FLASH_SECTOR1);
if (FLASH_LOADER->UNLOCK_BSL == UNLOCK_BSL_KEY)
MAP_FLASH_CTL_UNPROTECT_SECTOR(FLASH_INFO_MEMORY_SPACE_BANK1,
FLASH_SECTOR0 | FLASH_SECTOR1);
}
}
/* Unlock All Flash sectors */
void unlock_all_flash_sectors(void)
{
MAP_FLASH_CTL_UNPROTECT_SECTOR(FLASH_MAIN_MEMORY_SPACE_BANK0, 0xFFFFFFFF);
MAP_FLASH_CTL_UNPROTECT_SECTOR(FLASH_MAIN_MEMORY_SPACE_BANK1, 0xFFFFFFFF);
MAP_FLASH_CTL_UNPROTECT_SECTOR(FLASH_INFO_MEMORY_SPACE_BANK0,
FLASH_SECTOR0 | FLASH_SECTOR1);
if (FLASH_LOADER->UNLOCK_BSL == UNLOCK_BSL_KEY)
MAP_FLASH_CTL_UNPROTECT_SECTOR(FLASH_INFO_MEMORY_SPACE_BANK1,
FLASH_SECTOR0 | FLASH_SECTOR1);
}
/* Lock all Flash sectors */
void lock_all_flash_sectors(void)
{
MAP_FLASH_CTL_PROTECT_SECTOR(FLASH_MAIN_MEMORY_SPACE_BANK0, 0xFFFFFFFF);
MAP_FLASH_CTL_PROTECT_SECTOR(FLASH_MAIN_MEMORY_SPACE_BANK1, 0xFFFFFFFF);
MAP_FLASH_CTL_PROTECT_SECTOR(FLASH_INFO_MEMORY_SPACE_BANK0,
FLASH_SECTOR0 | FLASH_SECTOR1);
MAP_FLASH_CTL_PROTECT_SECTOR(FLASH_INFO_MEMORY_SPACE_BANK1,
FLASH_SECTOR0 | FLASH_SECTOR1);
}
/* Force DCO frequency range */
void __cs_set_dco_frequency_range(uint32_t dco_freq)
{
/* Unlocking the CS Module */
CS->KEY = CS_KEY_VAL;
/* Resetting Tuning Parameters and Setting the frequency */
CS->CTL0 = (CS->CTL0 & ~CS_CTL0_DCORSEL_MASK) | dco_freq;
/* Locking the CS Module */
CS->KEY = 0;
}
/* Exit flash programming */
void msp432_flash_exit(void)
{
bool success = false;
/* Restore modified registers, in reverse order */
__cs_set_dco_frequency_range(CS_DCO_FREQUENCY_3);
MAP_FLASH_CTL_SET_WAIT_STATE(FLASH_BANK0,
BACKUP_PARAMS->BANK0_WAIT_RESTORE);
MAP_FLASH_CTL_SET_WAIT_STATE(FLASH_BANK1,
BACKUP_PARAMS->BANK1_WAIT_RESTORE);
success = MAP_PCM_SET_POWER_STATE(BACKUP_PARAMS->PCM_VCORE_LEVEL_RESTORE);
success &= MAP_PCM_SET_CORE_VOLTAGE_LEVEL(
BACKUP_PARAMS->VCORE_LEVEL_RESTORE);
__cs_set_dco_frequency_range(BACKUP_PARAMS->CS_DC0_FREQ_RESTORE);
/* Point to vector table in Flash */
SCB->VTOR = (uint32_t)0x00000000;
if (!success)
FLASH_LOADER->RETURN_CODE = FLASH_ERROR;
else
FLASH_LOADER->RETURN_CODE = FLASH_SUCCESS;
}
static bool program_device(void *src, void *dest, uint32_t length)
{
return MAP_FLASH_CTL_PROGRAM_MEMORY(src, dest, length);
}

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@@ -0,0 +1,391 @@
/******************************************************************************
*
* Copyright (C) 2013-2018 Texas Instruments Incorporated - http://www.ti.com/
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include <stdint.h>
#include <stdbool.h>
#include "driverlib.h"
#include "MSP432P4_FlashLibIf.h"
/* Number of erase repeats until timeout */
#define FLASH_MAX_REPEATS 5
/* Local prototypes */
void msp432_flash_init(void);
void msp432_flash_mass_erase(void);
void msp432_flash_sector_erase(void);
void msp432_flash_write(void);
void msp432_flash_continous_write(void);
void msp432_flash_exit(void);
void unlock_flash_sectors(void);
void unlock_all_flash_sectors(void);
void lock_all_flash_sectors(void);
void __cs_set_dco_frequency_range(uint32_t dco_freq);
static bool program_device(void *src, void *dest, uint32_t length);
struct backup_params {
uint32_t BANK0_WAIT_RESTORE;
uint32_t BANK1_WAIT_RESTORE;
uint32_t CS_DC0_FREQ_RESTORE;
uint8_t VCORE_LEVEL_RESTORE;
uint8_t PCM_VCORE_LEVEL_RESTORE;
};
#define BACKUP_PARAMS ((struct backup_params *) 0x20000180)
#define INFO_FLASH_START __INFO_FLASH_A_TECH_START__
#define INFO_FLASH_MIDDLE __INFO_FLASH_A_TECH_MIDDLE__
#define BSL_FLASH_START BSL_API_TABLE_ADDR
/* Main with trampoline */
int main(void)
{
/* Halt watchdog */
MAP_WDT_A_HOLD_TIMER();
/* Disable interrupts */
cpu_cpsid();
while (1) {
switch (FLASH_LOADER->FLASH_FUNCTION) {
case FLASH_INIT:
FLASH_LOADER->RETURN_CODE = FLASH_BUSY;
msp432_flash_init();
FLASH_LOADER->FLASH_FUNCTION = 0;
break;
case FLASH_MASS_ERASE:
FLASH_LOADER->RETURN_CODE = FLASH_BUSY;
msp432_flash_mass_erase();
FLASH_LOADER->FLASH_FUNCTION = 0;
break;
case FLASH_SECTOR_ERASE:
FLASH_LOADER->RETURN_CODE = FLASH_BUSY;
msp432_flash_sector_erase();
FLASH_LOADER->FLASH_FUNCTION = 0;
break;
case FLASH_PROGRAM:
FLASH_LOADER->RETURN_CODE = FLASH_BUSY;
msp432_flash_write();
FLASH_LOADER->FLASH_FUNCTION = 0;
break;
case FLASH_CONTINUOUS_PROGRAM:
FLASH_LOADER->RETURN_CODE = FLASH_BUSY;
msp432_flash_continous_write();
FLASH_LOADER->FLASH_FUNCTION = 0;
break;
case FLASH_EXIT:
FLASH_LOADER->RETURN_CODE = FLASH_BUSY;
msp432_flash_exit();
FLASH_LOADER->FLASH_FUNCTION = 0;
break;
case FLASH_NO_COMMAND:
break;
default:
FLASH_LOADER->RETURN_CODE = FLASH_WRONG_COMMAND;
break;
}
}
}
/* Initialize flash */
void msp432_flash_init(void)
{
bool success = false;
/* Point to vector table in RAM */
SCB->VTOR = (uint32_t)0x01000000;
/* backup system parameters */
BACKUP_PARAMS->BANK0_WAIT_RESTORE =
MAP_FLASH_CTL_A_GET_WAIT_STATE(FLASH_A_BANK0);
BACKUP_PARAMS->BANK1_WAIT_RESTORE =
MAP_FLASH_CTL_A_GET_WAIT_STATE(FLASH_A_BANK1);
BACKUP_PARAMS->VCORE_LEVEL_RESTORE = MAP_PCM_GET_CORE_VOLTAGE_LEVEL();
BACKUP_PARAMS->PCM_VCORE_LEVEL_RESTORE = MAP_PCM_GET_POWER_STATE();
BACKUP_PARAMS->CS_DC0_FREQ_RESTORE = CS->CTL0 & CS_CTL0_DCORSEL_MASK;
/* set parameters for flashing */
success = MAP_PCM_SET_POWER_STATE(PCM_AM_LDO_VCORE0);
/* Set Flash wait states to 2 */
MAP_FLASH_CTL_A_SET_WAIT_STATE(FLASH_A_BANK0, 2);
MAP_FLASH_CTL_A_SET_WAIT_STATE(FLASH_A_BANK1, 2);
/* Set CPU speed to 24MHz */
__cs_set_dco_frequency_range(CS_DCO_FREQUENCY_24);
if (!success) {
/* Indicate failed power switch */
FLASH_LOADER->RETURN_CODE = FLASH_POWER_ERROR;
} else
FLASH_LOADER->RETURN_CODE = FLASH_SUCCESS;
}
/* Erase entire flash */
void msp432_flash_mass_erase(void)
{
bool success = false;
/* Allow flash writes */
unlock_flash_sectors();
/* Allow some mass erase repeats before timeout with error */
int erase_repeats = FLASH_MAX_REPEATS;
while (!success && (erase_repeats > 0)) {
/* Mass erase with post-verify */
success = ROM_FLASH_CTL_A_PERFORM_MASS_ERASE();
erase_repeats--;
}
if (erase_repeats == 0)
FLASH_LOADER->RETURN_CODE = FLASH_VERIFY_ERROR;
else
FLASH_LOADER->RETURN_CODE = FLASH_SUCCESS;
/* Block flash writes */
lock_all_flash_sectors();
}
/* Erase one flash sector */
void msp432_flash_sector_erase(void)
{
bool success = false;
/* Allow flash writes */
unlock_all_flash_sectors();
/* Allow some sector erase repeats before timeout with error */
int erase_repeats = FLASH_MAX_REPEATS;
while (!success && (erase_repeats > 0)) {
/* Sector erase with post-verify */
success = MAP_FLASH_CTL_A_ERASE_SECTOR(FLASH_LOADER->DST_ADDRESS);
erase_repeats--;
}
if (erase_repeats == 0)
FLASH_LOADER->RETURN_CODE = FLASH_ERROR;
else
FLASH_LOADER->RETURN_CODE = FLASH_SUCCESS;
/* Block flash writes */
lock_all_flash_sectors();
}
/* Write data to flash with the help of DriverLib */
void msp432_flash_write(void)
{
bool success = false;
/* Allow flash writes */
unlock_all_flash_sectors();
while (!(FLASH_LOADER->BUFFER1_STATUS_REGISTER & BUFFER_DATA_READY))
;
FLASH_LOADER->BUFFER1_STATUS_REGISTER |= BUFFER_ACTIVE;
/* Program memory */
success = program_device((uint32_t *)RAM_LOADER_BUFFER1,
(void *)FLASH_LOADER->DST_ADDRESS, FLASH_LOADER->SRC_LENGTH);
FLASH_LOADER->BUFFER1_STATUS_REGISTER &=
~(BUFFER_ACTIVE | BUFFER_DATA_READY);
/* Block flash writes */
lock_all_flash_sectors();
if (!success)
FLASH_LOADER->RETURN_CODE = FLASH_ERROR;
else
FLASH_LOADER->RETURN_CODE = FLASH_SUCCESS;
}
/* Write data to flash with the help of DriverLib with auto-increment */
void msp432_flash_continous_write(void)
{
bool buffer1_in_use = false;
bool buffer2_in_use = false;
uint32_t *src_address = NULL;
bool success = false;
uint32_t bytes_to_write = FLASH_LOADER->SRC_LENGTH;
uint32_t write_package = 0;
uint32_t start_addr = FLASH_LOADER->DST_ADDRESS;
while (bytes_to_write > 0) {
if (bytes_to_write > SRC_LENGTH_MAX) {
write_package = SRC_LENGTH_MAX;
bytes_to_write -= write_package;
} else {
write_package = bytes_to_write;
bytes_to_write -= write_package;
}
unlock_all_flash_sectors();
while (!(FLASH_LOADER->BUFFER1_STATUS_REGISTER & BUFFER_DATA_READY) &&
!(FLASH_LOADER->BUFFER2_STATUS_REGISTER & BUFFER_DATA_READY))
;
if (FLASH_LOADER->BUFFER1_STATUS_REGISTER & BUFFER_DATA_READY) {
FLASH_LOADER->BUFFER1_STATUS_REGISTER |= BUFFER_ACTIVE;
src_address = (uint32_t *) RAM_LOADER_BUFFER1;
buffer1_in_use = true;
} else if (FLASH_LOADER->BUFFER2_STATUS_REGISTER & BUFFER_DATA_READY) {
FLASH_LOADER->BUFFER2_STATUS_REGISTER |= BUFFER_ACTIVE;
src_address = (uint32_t *) RAM_LOADER_BUFFER2;
buffer2_in_use = true;
}
if (buffer1_in_use || buffer2_in_use) {
success = program_device(src_address, (void *) start_addr, write_package);
start_addr += write_package;
}
if (buffer1_in_use) {
FLASH_LOADER->BUFFER1_STATUS_REGISTER &= ~(BUFFER_ACTIVE | BUFFER_DATA_READY);
buffer1_in_use = false;
} else if (buffer2_in_use) {
FLASH_LOADER->BUFFER2_STATUS_REGISTER &= ~(BUFFER_ACTIVE | BUFFER_DATA_READY);
buffer2_in_use = false;
}
/* Block flash writes */
lock_all_flash_sectors();
if (!success) {
FLASH_LOADER->RETURN_CODE = FLASH_ERROR;
break;
}
}
if (success)
FLASH_LOADER->RETURN_CODE = FLASH_SUCCESS;
}
/* Unlock Main/Info Flash sectors */
void unlock_flash_sectors(void)
{
if (FLASH_LOADER->ERASE_PARAM & ERASE_MAIN)
MAP_FLASH_CTL_A_UNPROTECT_MEMORY(FLASH_BASE, FLASH_BASE +
MAP_SYS_CTL_A_GET_FLASH_SIZE() - 1);
if (FLASH_LOADER->ERASE_PARAM & ERASE_INFO) {
MAP_FLASH_CTL_A_UNPROTECT_MEMORY(INFO_FLASH_START, TLV_BASE - 1);
if (FLASH_LOADER->UNLOCK_BSL == UNLOCK_BSL_KEY)
MAP_FLASH_CTL_A_UNPROTECT_MEMORY(BSL_FLASH_START,
INFO_FLASH_MIDDLE - 1);
MAP_FLASH_CTL_A_UNPROTECT_MEMORY(INFO_FLASH_MIDDLE, INFO_FLASH_MIDDLE +
MAP_SYS_CTL_A_GET_INFO_FLASH_SIZE() - 1);
}
}
/* Unlock All Flash sectors */
void unlock_all_flash_sectors(void)
{
MAP_FLASH_CTL_A_UNPROTECT_MEMORY(FLASH_BASE, FLASH_BASE +
MAP_SYS_CTL_A_GET_FLASH_SIZE() - 1);
MAP_FLASH_CTL_A_UNPROTECT_MEMORY(INFO_FLASH_START, TLV_BASE - 1);
if (FLASH_LOADER->UNLOCK_BSL == UNLOCK_BSL_KEY)
MAP_FLASH_CTL_A_UNPROTECT_MEMORY(BSL_FLASH_START,
INFO_FLASH_MIDDLE - 1);
MAP_FLASH_CTL_A_UNPROTECT_MEMORY(INFO_FLASH_MIDDLE, INFO_FLASH_MIDDLE +
MAP_SYS_CTL_A_GET_INFO_FLASH_SIZE() - 1);
}
/* Lock all Flash sectors */
void lock_all_flash_sectors(void)
{
MAP_FLASH_CTL_A_PROTECT_MEMORY(FLASH_BASE, FLASH_BASE +
MAP_SYS_CTL_A_GET_FLASH_SIZE() - 1);
MAP_FLASH_CTL_A_PROTECT_MEMORY(INFO_FLASH_START, INFO_FLASH_START +
MAP_SYS_CTL_A_GET_INFO_FLASH_SIZE() - 1);
}
/* Force DCO frequency range */
void __cs_set_dco_frequency_range(uint32_t dco_freq)
{
/* Unlocking the CS Module */
CS->KEY = CS_KEY_VAL;
/* Resetting Tuning Parameters and Setting the frequency */
CS->CTL0 = (CS->CTL0 & ~CS_CTL0_DCORSEL_MASK) | dco_freq;
/* Locking the CS Module */
CS->KEY = 0;
}
/* Exit flash programming */
void msp432_flash_exit(void)
{
bool success = false;
/* Restore modified registers, in reverse order */
__cs_set_dco_frequency_range(CS_DCO_FREQUENCY_3);
MAP_FLASH_CTL_A_SET_WAIT_STATE(FLASH_A_BANK0,
BACKUP_PARAMS->BANK0_WAIT_RESTORE);
MAP_FLASH_CTL_A_SET_WAIT_STATE(FLASH_A_BANK1,
BACKUP_PARAMS->BANK1_WAIT_RESTORE);
success = MAP_PCM_SET_POWER_STATE(BACKUP_PARAMS->PCM_VCORE_LEVEL_RESTORE);
success &= MAP_PCM_SET_CORE_VOLTAGE_LEVEL(
BACKUP_PARAMS->VCORE_LEVEL_RESTORE);
__cs_set_dco_frequency_range(BACKUP_PARAMS->CS_DC0_FREQ_RESTORE);
/* Point to vector table in Flash */
SCB->VTOR = (uint32_t)0x00000000;
if (!success)
FLASH_LOADER->RETURN_CODE = FLASH_ERROR;
else
FLASH_LOADER->RETURN_CODE = FLASH_SUCCESS;
}
static bool program_device(void *src, void *dest, uint32_t length)
{
uint32_t dst_address = (uint32_t)dest;
/* Flash main memory first, then information memory */
if ((dst_address < INFO_FLASH_START) && ((dst_address + length) >
INFO_FLASH_START)) {
uint32_t block_length = INFO_FLASH_START - dst_address;
uint32_t src_address = (uint32_t)src;
/* Main memory block */
bool success = MAP_FLASH_CTL_A_PROGRAM_MEMORY(src, dest, block_length);
src_address = src_address + block_length;
block_length = length - block_length;
/* Information memory block */
success &= MAP_FLASH_CTL_A_PROGRAM_MEMORY((void *)src_address,
(void *)INFO_FLASH_START, block_length);
return success;
} else
return MAP_FLASH_CTL_A_PROGRAM_MEMORY(src, dest, length);
}

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@@ -0,0 +1,229 @@
/******************************************************************************
*
* Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#ifndef OPENOCD_LOADERS_FLASH_MSP432_MSP432E4X_H
#define OPENOCD_LOADERS_FLASH_MSP432_MSP432E4X_H
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/* Register map for FLASH_CTRL peripheral (FLASH_CTRL) */
struct flash_ctrl {
volatile uint32_t FMA; /* Flash Memory Address */
volatile uint32_t FMD; /* Flash Memory Data */
volatile uint32_t FMC; /* Flash Memory Control */
volatile uint32_t FCRIS; /* Flash Controller Raw Interrupt Status */
volatile uint32_t FCIM; /* Flash Controller Interrupt Mask */
volatile uint32_t FCMISC; /* Flash Cont. Masked Int. Status and Clear */
volatile uint32_t RESERVED0[2];
volatile uint32_t FMC2; /* Flash Memory Control 2 */
volatile uint32_t RESERVED1[3];
volatile uint32_t FWBVAL; /* Flash Write Buffer Valid */
volatile uint32_t RESERVED2[2];
volatile uint32_t FLPEKEY; /* Flash Program/Erase Key */
volatile uint32_t RESERVED3[48];
volatile uint32_t FWBN[32]; /* Flash Write Buffer n */
};
/* Register map for SYSCTL peripheral (SYSCTL) */
struct sys_ctrl {
volatile uint32_t DID0; /* Device Identification 0 */
volatile uint32_t DID1; /* Device Identification 1 */
volatile uint32_t RESERVED0[12];
volatile uint32_t PTBOCTL; /* Power-Temp Brown Out Control */
volatile uint32_t RESERVED1[5];
volatile uint32_t RIS; /* Raw Interrupt Status */
volatile uint32_t IMC; /* Interrupt Mask Control */
volatile uint32_t MISC; /* Masked Interrupt Status and Clear */
volatile uint32_t RESC; /* Reset Cause */
volatile uint32_t PWRTC; /* Power-Temperature Cause */
volatile uint32_t NMIC; /* NMI Cause Register */
volatile uint32_t RESERVED2[5];
volatile uint32_t MOSCCTL; /* Main Oscillator Control */
volatile uint32_t RESERVED3[12];
volatile uint32_t RSCLKCFG; /* Run and Sleep Mode Configuration Register */
volatile uint32_t RESERVED4[3];
volatile uint32_t MEMTIM0; /* Memory Timing Register 0 for Main Flash */
volatile uint32_t RESERVED5[29];
volatile uint32_t ALTCLKCFG; /* Alternate Clock Configuration */
volatile uint32_t RESERVED6[2];
union {
volatile uint32_t DSLPCLKCFG; /* Deep Sleep Clock Configuration */
volatile uint32_t DSCLKCFG; /* Deep Sleep Clock Register */
};
volatile uint32_t DIVSCLK; /* Divisor and Source Clock Configuration */
volatile uint32_t SYSPROP; /* System Properties */
volatile uint32_t PIOSCCAL; /* Precision Internal Oscillator Calibration */
volatile uint32_t PIOSCSTAT; /* Precision Internal Oscillator Statistics */
volatile uint32_t RESERVED7[2];
volatile uint32_t PLLFREQ0; /* PLL Frequency 0 */
volatile uint32_t PLLFREQ1; /* PLL Frequency 1 */
volatile uint32_t PLLSTAT; /* PLL Status */
volatile uint32_t RESERVED8[7];
volatile uint32_t SLPPWRCFG; /* Sleep Power Configuration */
volatile uint32_t DSLPPWRCFG; /* Deep-Sleep Power Configuration */
volatile uint32_t RESERVED9[4];
volatile uint32_t NVMSTAT; /* Non-Volatile Memory Information */
volatile uint32_t RESERVED10[4];
volatile uint32_t LDOSPCTL; /* LDO Sleep Power Control */
volatile uint32_t RESERVED11;
volatile uint32_t LDODPCTL; /* LDO Deep-Sleep Power Control */
volatile uint32_t RESERVED12[6];
volatile uint32_t RESBEHAVCTL; /* Reset Behavior Control Register */
volatile uint32_t RESERVED13[6];
volatile uint32_t HSSR; /* Hardware System Service Request */
volatile uint32_t RESERVED14[34];
volatile uint32_t USBPDS; /* USB Power Domain Status */
volatile uint32_t USBMPC; /* USB Memory Power Control */
volatile uint32_t EMACPDS; /* Ethernet MAC Power Domain Status */
volatile uint32_t EMACMPC; /* Ethernet MAC Memory Power Control */
volatile uint32_t RESERVED15;
volatile uint32_t LCDMPC; /* LCD Memory Power Control */
volatile uint32_t RESERVED16[26];
volatile uint32_t PPWD; /* Watchdog Timer Peripheral Present */
volatile uint32_t PPTIMER; /* General-Purpose Timer Peripheral Present */
volatile uint32_t PPGPIO; /* General-Purpose I/O Peripheral Present */
volatile uint32_t PPDMA; /* Micro DMA Peripheral Present */
volatile uint32_t PPEPI; /* EPI Peripheral Present */
volatile uint32_t PPHIB; /* Hibernation Peripheral Present */
volatile uint32_t PPUART; /* UART Peripheral Present */
volatile uint32_t PPSSI; /* Synchronous Serial Inter. Periph. Present */
volatile uint32_t PPI2C; /* Inter-Integrated Circuit Periph. Present */
volatile uint32_t RESERVED17;
volatile uint32_t PPUSB; /* Universal Serial Bus Peripheral Present */
volatile uint32_t RESERVED18;
volatile uint32_t PPEPHY; /* Ethernet PHY Peripheral Present */
volatile uint32_t PPCAN; /* Controller Area Network Periph. Present */
volatile uint32_t PPADC; /* Analog-to-Dig. Converter Periph. Present */
volatile uint32_t PPACMP; /* Analog Comparator Peripheral Present */
volatile uint32_t PPPWM; /* Pulse Width Modulator Peripheral Present */
volatile uint32_t PPQEI; /* Quadrature Encoder Inter. Periph. Present */
volatile uint32_t RESERVED19[4];
volatile uint32_t PPEEPROM; /* EEPROM Peripheral Present */
volatile uint32_t RESERVED20[6];
volatile uint32_t PPCCM; /* CRC/Cryptographic Modules Periph. Present */
volatile uint32_t RESERVED21[6];
volatile uint32_t PPLCD; /* LCD Peripheral Present */
volatile uint32_t RESERVED22;
volatile uint32_t PPOWIRE; /* 1-Wire Peripheral Present */
volatile uint32_t PPEMAC; /* Ethernet MAC Peripheral Present */
volatile uint32_t RESERVED23[88];
volatile uint32_t SRWD; /* Watchdog Timer Software Reset */
volatile uint32_t SRTIMER; /* General-Purpose Timer Software Reset */
volatile uint32_t SRGPIO; /* General-Purpose I/O Software Reset */
volatile uint32_t SRDMA; /* Micro Direct Memory Access Software Reset */
volatile uint32_t SREPI; /* EPI Software Reset */
volatile uint32_t SRHIB; /* Hibernation Software Reset */
volatile uint32_t SRUART; /* UART Software Reset */
volatile uint32_t SRSSI; /* Synchronous Serial Inter. Software Reset */
volatile uint32_t SRI2C; /* Inter-Integrated Circuit Software Reset */
volatile uint32_t RESERVED24;
volatile uint32_t SRUSB; /* Universal Serial Bus Software Reset */
volatile uint32_t RESERVED25;
volatile uint32_t SREPHY; /* Ethernet PHY Software Reset */
volatile uint32_t SRCAN; /* Controller Area Network Software Reset */
volatile uint32_t SRADC; /* Analog-to-Dig. Converter Software Reset */
volatile uint32_t SRACMP; /* Analog Comparator Software Reset */
volatile uint32_t SRPWM; /* Pulse Width Modulator Software Reset */
volatile uint32_t SRQEI; /* Quadrature Encoder Inter. Software Reset */
volatile uint32_t RESERVED26[4];
volatile uint32_t SREEPROM; /* EEPROM Software Reset */
volatile uint32_t RESERVED27[6];
volatile uint32_t SRCCM; /* CRC/Cryptographic Modules Software Reset */
volatile uint32_t RESERVED28[6];
volatile uint32_t SRLCD; /* LCD Controller Software Reset */
volatile uint32_t RESERVED29;
volatile uint32_t SROWIRE; /* 1-Wire Software Reset */
volatile uint32_t SREMAC; /* Ethernet MAC Software Reset */
volatile uint32_t RESERVED30[24];
volatile uint32_t RCGCWD; /* Watchdog Run Mode Clock Gating Control */
};
/* Peripheral Memory Map */
#define FLASH_CTRL_BASE 0x400FD000UL
#define SYSCTL_BASE 0x400FE000UL
/* Peripheral Declarations */
#define FLASH_CTRL ((struct flash_ctrl *) FLASH_CTRL_BASE)
#define SYSCTL ((struct sys_ctrl *) SYSCTL_BASE)
/* The following are defines for the bit fields in the FLASH_FMC register. */
#define FLASH_FMC_WRKEY 0xA4420000 /* FLASH write key */
#define FLASH_FMC_COMT 0x00000008 /* Commit Register Value */
#define FLASH_FMC_MERASE 0x00000004 /* Mass Erase Flash Memory */
#define FLASH_FMC_ERASE 0x00000002 /* Erase a Page of Flash Memory */
#define FLASH_FMC_WRITE 0x00000001 /* Write a Word into Flash Memory */
/* The following are defines for the bit fields in the FLASH_FCRIS register. */
#define FLASH_FCRIS_PROGRIS 0x00002000 /* Program Verify Raw Interrupt Status */
#define FLASH_FCRIS_ERRIS 0x00000800 /* Erase Verify Raw Interrupt Status */
#define FLASH_FCRIS_INVDRIS 0x00000400 /* Invalid Data Raw Interrupt Status */
#define FLASH_FCRIS_VOLTRIS 0x00000200 /* Pump Voltage Raw Interrupt Status */
#define FLASH_FCRIS_ERIS 0x00000004 /* EEPROM Raw Interrupt Status */
#define FLASH_FCRIS_PRIS 0x00000002 /* Programming Raw Interrupt Status */
#define FLASH_FCRIS_ARIS 0x00000001 /* Access Raw Interrupt Status */
/* The following are defines for the bit fields in the FLASH_FCIM register. */
#define FLASH_FCIM_PROGMASK 0x00002000 /* PROGVER Interrupt Mask */
#define FLASH_FCIM_ERMASK 0x00000800 /* ERVER Interrupt Mask */
#define FLASH_FCIM_INVDMASK 0x00000400 /* Invalid Data Interrupt Mask */
#define FLASH_FCIM_VOLTMASK 0x00000200 /* VOLT Interrupt Mask */
#define FLASH_FCIM_EMASK 0x00000004 /* EEPROM Interrupt Mask */
#define FLASH_FCIM_PMASK 0x00000002 /* Programming Interrupt Mask */
#define FLASH_FCIM_AMASK 0x00000001 /* Access Interrupt Mask */
/* The following are defines for the bit fields in the FLASH_FCMISC register. */
#define FLASH_FCMISC_PROGMISC 0x00002000 /* PROGVER Interrupt Status/Clear */
#define FLASH_FCMISC_ERMISC 0x00000800 /* ERVER Interrupt Status/Clear */
#define FLASH_FCMISC_INVDMISC 0x00000400 /* Invalid Data Int. Status/Clear */
#define FLASH_FCMISC_VOLTMISC 0x00000200 /* VOLT Interrupt Status/Clear */
#define FLASH_FCMISC_EMISC 0x00000004 /* EEPROM Interrupt Status/Clear */
#define FLASH_FCMISC_PMISC 0x00000002 /* Programming Int. Status/Clear */
#define FLASH_FCMISC_AMISC 0x00000001 /* Access Interrupt Status/Clear */
/* The following are defines for the bit fields in the FLASH_FMC2 register. */
#define FLASH_FMC2_WRBUF 0x00000001 /* Buffered Flash Memory Write */
/* The following are defines for the bit fields in the SYSCTL_RCGCWD reg. */
#define SYSCTL_RCGCWD_R1 0x00000002 /* Watchdog 1 Run Mode Clock Gating Cont. */
#define SYSCTL_RCGCWD_R0 0x00000001 /* Watchdog 0 Run Mode Clock Gating Cont. */
#ifdef __cplusplus
}
#endif
#endif /* OPENOCD_LOADERS_FLASH_MSP432_MSP432E4X_H */

View File

@@ -0,0 +1,149 @@
/******************************************************************************
*
* Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
MEMORY {
MAIN_FLASH (RX) : ORIGIN = 0x00000000, LENGTH = 0x00100000
SRAM_CODE_0(RWX): ORIGIN = 0x20000000, LENGTH = 0x00000110
SRAM_CODE_1(RWX): ORIGIN = 0x20000110, LENGTH = 0x00000030
SRAM_CODE_2(RWX): ORIGIN = 0x20000150, LENGTH = 0x00000040
SRAM_CODE_3(RWX): ORIGIN = 0x20000190, LENGTH = 0x00000F70
SRAM_CODE_4(RWX): ORIGIN = 0x20001170, LENGTH = 0x00000200
SRAM_DATA (RW) : ORIGIN = 0x20002000, LENGTH = 0x00001000
}
REGION_ALIAS("REGION_INTVECT", SRAM_CODE_0);
REGION_ALIAS("REGION_RESET", SRAM_CODE_1);
REGION_ALIAS("REGION_DESCRIPTOR", SRAM_CODE_2);
REGION_ALIAS("REGION_TEXT", SRAM_CODE_3);
REGION_ALIAS("REGION_BSS", SRAM_CODE_3);
REGION_ALIAS("REGION_DATA", SRAM_DATA);
REGION_ALIAS("REGION_STACK", SRAM_CODE_4);
REGION_ALIAS("REGION_HEAP", SRAM_DATA);
REGION_ALIAS("REGION_ARM_EXIDX", SRAM_CODE_3);
REGION_ALIAS("REGION_ARM_EXTAB", SRAM_CODE_3);
SECTIONS {
/* section for the interrupt vector area */
.intvecs : {
KEEP (*(.intvecs))
} > REGION_INTVECT
PROVIDE (_vtable_base_address =
DEFINED(_vtable_base_address) ? _vtable_base_address : 0x20000000);
.vtable (_vtable_base_address) : AT (_vtable_base_address) {
KEEP (*(.vtable))
} > REGION_DATA
.descriptor :{
FILL(0x00000000);
. = ORIGIN(REGION_DESCRIPTOR) + LENGTH(REGION_DESCRIPTOR) - 1;
BYTE(0x00);
__ROM_AT = .;
} > REGION_DESCRIPTOR
.reset : {
KEEP(*(.reset))
} > REGION_RESET AT> REGION_RESET
.text : {
CREATE_OBJECT_SYMBOLS
KEEP (*(.text))
*(.text.*)
. = ALIGN(0x4);
KEEP (*(.ctors))
. = ALIGN(0x4);
KEEP (*(.dtors))
. = ALIGN(0x4);
__init_array_start = .;
KEEP (*(.init_array*))
__init_array_end = .;
KEEP (*(.init))
KEEP (*(.fini*))
} > REGION_TEXT AT> REGION_TEXT
.rodata : {
*(.rodata)
*(.rodata.*)
} > REGION_TEXT AT> REGION_TEXT
.ARM.exidx : {
__exidx_start = .;
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
__exidx_end = .;
} > REGION_ARM_EXIDX AT> REGION_ARM_EXIDX
.ARM.extab : {
KEEP (*(.ARM.extab* .gnu.linkonce.armextab.*))
} > REGION_ARM_EXTAB AT> REGION_ARM_EXTAB
__etext = .;
.data : {
__data_load__ = LOADADDR (.data);
__data_start__ = .;
KEEP (*(.data))
KEEP (*(.data*))
. = ALIGN (4);
__data_end__ = .;
} > REGION_DATA AT> REGION_TEXT
.bss : {
__bss_start__ = .;
*(.shbss)
KEEP (*(.bss))
*(.bss.*)
*(COMMON)
. = ALIGN (4);
__bss_end__ = .;
} > REGION_BSS AT> REGION_BSS
.heap : {
__heap_start__ = .;
end = __heap_start__;
_end = end;
__end = end;
KEEP (*(.heap))
__heap_end__ = .;
__HeapLimit = __heap_end__;
} > REGION_HEAP AT> REGION_HEAP
.stack (NOLOAD) : ALIGN(0x8) {
_stack = .;
KEEP(*(.stack))
} > REGION_STACK AT> REGION_STACK
__stack_top = ORIGIN(REGION_STACK) + LENGTH(REGION_STACK);
PROVIDE(__stack = __stack_top);
}

View File

@@ -0,0 +1,245 @@
/* Autogenerated with ../../../../src/helper/bin2char.sh */
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0x08,0x20,0x00,0x20,

View File

@@ -0,0 +1,102 @@
/******************************************************************************
*
* Copyright (C) 2012-2018 Texas Instruments Incorporated - http://www.ti.com/
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#ifndef OPENOCD_LOADERS_FLASH_MSP432_MSP432P401X_H
#define OPENOCD_LOADERS_FLASH_MSP432_MSP432P401X_H
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
#define __MCU_HAS_FLCTL__ /* Module FLCTL is available */
/* Device and peripheral memory map */
#define FLASH_BASE ((uint32_t)0x00000000) /* Flash memory start address */
#define SRAM_BASE ((uint32_t)0x20000000) /* SRAM memory start address */
#define PERIPH_BASE ((uint32_t)0x40000000) /* Peripherals start address */
#define CS_BASE (PERIPH_BASE + 0x00010400) /* Address of module CS regs. */
#define DIO_BASE (PERIPH_BASE + 0x00004C00) /* Address of module DIO regs. */
/* Register map for Clock Signal peripheral (CS) */
struct cs {
volatile uint32_t KEY; /* Key Register */
volatile uint32_t CTL0; /* Control 0 Register */
volatile uint32_t CTL1; /* Control 1 Register */
volatile uint32_t CTL2; /* Control 2 Register */
volatile uint32_t CTL3; /* Control 3 Register */
};
/* Register map for DIO port (odd interrupt) */
struct dio_port_odd_int {
volatile uint8_t IN; /* Port Input */
uint8_t RESERVED0;
volatile uint8_t OUT; /* Port Output */
};
/* Register map for DIO port (even interrupt) */
struct dio_port_even_int {
uint8_t RESERVED0;
volatile uint8_t IN; /* Port Input */
uint8_t RESERVED1;
volatile uint8_t OUT; /* Port Output */
};
/* Peripheral declarations */
#define CS ((struct cs *) CS_BASE)
#define P3 ((struct dio_port_odd_int *) (DIO_BASE + 0x0020))
#define P6 ((struct dio_port_even_int *) (DIO_BASE + 0x0040))
/* Peripheral bit definitions */
/* DCORSEL Bit Mask */
#define CS_CTL0_DCORSEL_MASK ((uint32_t)0x00070000)
/* Nominal DCO Frequency Range (MHz): 2 to 4 */
#define CS_CTL0_DCORSEL_1 ((uint32_t)0x00010000)
/* Nominal DCO Frequency Range (MHz): 16 to 32 */
#define CS_CTL0_DCORSEL_4 ((uint32_t)0x00040000)
/* CS control key value */
#define CS_KEY_VAL ((uint32_t)0x0000695A)
/* Protects Sector 0 from program or erase */
#define FLCTL_BANK0_MAIN_WEPROT_PROT0 ((uint32_t)0x00000001)
/* Protects Sector 1 from program or erase */
#define FLCTL_BANK0_MAIN_WEPROT_PROT1 ((uint32_t)0x00000002)
#ifdef __cplusplus
}
#endif
#endif /* OPENOCD_LOADERS_FLASH_MSP432_MSP432P401X_H */

View File

@@ -0,0 +1,151 @@
/******************************************************************************
*
* Copyright (C) 2012-2018 Texas Instruments Incorporated - http://www.ti.com/
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
MEMORY {
MAIN_FLASH (RX) : ORIGIN = 0x00000000, LENGTH = 0x00040000
INFO_FLASH (RX) : ORIGIN = 0x00200000, LENGTH = 0x00004000
SRAM_CODE_0(RWX): ORIGIN = 0x01000000, LENGTH = 0x00000110
SRAM_CODE_1(RWX): ORIGIN = 0x01000110, LENGTH = 0x00000030
SRAM_CODE_2(RWX): ORIGIN = 0x01000150, LENGTH = 0x00000040
SRAM_CODE_3(RWX): ORIGIN = 0x01000190, LENGTH = 0x00000F70
SRAM_CODE_4(RWX): ORIGIN = 0x01001170, LENGTH = 0x00000200
SRAM_DATA (RW) : ORIGIN = 0x20002000, LENGTH = 0x00001000
}
REGION_ALIAS("REGION_INTVECT", SRAM_CODE_0);
REGION_ALIAS("REGION_RESET", SRAM_CODE_1);
REGION_ALIAS("REGION_DESCRIPTOR", SRAM_CODE_2);
REGION_ALIAS("REGION_TEXT", SRAM_CODE_3);
REGION_ALIAS("REGION_BSS", SRAM_CODE_3);
REGION_ALIAS("REGION_DATA", SRAM_DATA);
REGION_ALIAS("REGION_STACK", SRAM_CODE_4);
REGION_ALIAS("REGION_HEAP", SRAM_DATA);
REGION_ALIAS("REGION_ARM_EXIDX", SRAM_CODE_3);
REGION_ALIAS("REGION_ARM_EXTAB", SRAM_CODE_3);
SECTIONS {
/* section for the interrupt vector area */
.intvecs : {
KEEP (*(.intvecs))
} > REGION_INTVECT
PROVIDE (_vtable_base_address =
DEFINED(_vtable_base_address) ? _vtable_base_address : 0x20000000);
.vtable (_vtable_base_address) : AT (_vtable_base_address) {
KEEP (*(.vtable))
} > REGION_DATA
.descriptor :{
FILL(0x00000000);
. = ORIGIN(REGION_DESCRIPTOR) + LENGTH(REGION_DESCRIPTOR) - 1;
BYTE(0x00);
__ROM_AT = .;
} > REGION_DESCRIPTOR
.reset : {
KEEP(*(.reset))
} > REGION_RESET AT> REGION_RESET
.text : {
CREATE_OBJECT_SYMBOLS
KEEP (*(.text))
*(.text.*)
. = ALIGN(0x4);
KEEP (*(.ctors))
. = ALIGN(0x4);
KEEP (*(.dtors))
. = ALIGN(0x4);
__init_array_start = .;
KEEP (*(.init_array*))
__init_array_end = .;
KEEP (*(.init))
KEEP (*(.fini*))
} > REGION_TEXT AT> REGION_TEXT
.rodata : {
*(.rodata)
*(.rodata.*)
} > REGION_TEXT AT> REGION_TEXT
.ARM.exidx : {
__exidx_start = .;
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
__exidx_end = .;
} > REGION_ARM_EXIDX AT> REGION_ARM_EXIDX
.ARM.extab : {
KEEP (*(.ARM.extab* .gnu.linkonce.armextab.*))
} > REGION_ARM_EXTAB AT> REGION_ARM_EXTAB
__etext = .;
.data : {
__data_load__ = LOADADDR (.data);
__data_start__ = .;
KEEP (*(.data))
KEEP (*(.data*))
. = ALIGN (4);
__data_end__ = .;
} > REGION_DATA AT> REGION_TEXT
.bss : {
__bss_start__ = .;
*(.shbss)
KEEP (*(.bss))
*(.bss.*)
*(COMMON)
. = ALIGN (4);
__bss_end__ = .;
} > REGION_BSS AT> REGION_BSS
.heap : {
__heap_start__ = .;
end = __heap_start__;
_end = end;
__end = end;
KEEP (*(.heap))
__heap_end__ = .;
__HeapLimit = __heap_end__;
} > REGION_HEAP AT> REGION_HEAP
.stack (NOLOAD) : ALIGN(0x8) {
_stack = .;
KEEP(*(.stack))
} > REGION_STACK AT> REGION_STACK
__stack_top = ORIGIN(REGION_STACK) + LENGTH(REGION_STACK);
PROVIDE(__stack = __stack_top);
}

View File

@@ -0,0 +1,242 @@
/* Autogenerated with ../../../../src/helper/bin2char.sh */
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0x0c,0x0f,0x00,0x01,0x28,0x0f,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x04,0x4b,0x05,0x48,0x1b,0x1a,0x06,0x2b,0x02,0xd9,0x04,0x4b,0x03,0xb1,0x18,0x47,
0x70,0x47,0x00,0xbf,0x37,0x24,0x00,0x20,0x34,0x24,0x00,0x20,0x00,0x00,0x00,0x00,
0x05,0x49,0x06,0x48,0x09,0x1a,0x89,0x10,0x01,0xeb,0xd1,0x71,0x49,0x10,0x02,0xd0,
0x03,0x4b,0x03,0xb1,0x18,0x47,0x70,0x47,0x34,0x24,0x00,0x20,0x34,0x24,0x00,0x20,
0x00,0x00,0x00,0x00,0x10,0xb5,0x06,0x4c,0x23,0x78,0x43,0xb9,0xff,0xf7,0xd8,0xff,
0x04,0x4b,0x13,0xb1,0x04,0x48,0xaf,0xf3,0x00,0x80,0x01,0x23,0x23,0x70,0x10,0xbd,
0x0c,0x0f,0x00,0x01,0x00,0x00,0x00,0x00,0xd0,0x0a,0x00,0x01,0x08,0xb5,0x08,0x4b,
0x1b,0xb1,0x08,0x48,0x08,0x49,0xaf,0xf3,0x00,0x80,0x08,0x48,0x03,0x68,0x13,0xb9,
0xbd,0xe8,0x08,0x40,0xcc,0xe7,0x06,0x4b,0x00,0x2b,0xf9,0xd0,0x98,0x47,0xf7,0xe7,
0x00,0x00,0x00,0x00,0xd0,0x0a,0x00,0x01,0x10,0x0f,0x00,0x01,0x34,0x24,0x00,0x20,
0x00,0x00,0x00,0x00,0x13,0x4b,0x00,0x2b,0x08,0xbf,0x11,0x4b,0x9d,0x46,0xa3,0xf5,
0x80,0x3a,0x00,0x21,0x8b,0x46,0x0f,0x46,0x11,0x48,0x12,0x4a,0x12,0x1a,0x00,0xf0,
0x79,0xf8,0x0d,0x4b,0x00,0x2b,0x00,0xd0,0x98,0x47,0x0c,0x4b,0x00,0x2b,0x00,0xd0,
0x98,0x47,0x00,0x20,0x00,0x21,0x04,0x00,0x0d,0x00,0x0b,0x48,0x00,0xf0,0x16,0xf8,
0x00,0xf0,0x40,0xf8,0x20,0x00,0x29,0x00,0x00,0xf0,0xf0,0xfa,0x00,0xf0,0x14,0xf8,
0x00,0x00,0x08,0x00,0x70,0x13,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x0c,0x0f,0x00,0x01,0x28,0x0f,0x00,0x01,0xc9,0x02,0x00,0x01,0x01,0x46,0x00,0x20,
0x02,0x46,0x03,0x46,0x00,0xf0,0x9c,0xb8,0x08,0xb5,0x00,0x21,0x04,0x46,0x00,0xf0,
0xf3,0xf8,0x04,0x4b,0x18,0x68,0xc3,0x6b,0x03,0xb1,0x98,0x47,0x20,0x46,0x00,0xf0,
0x55,0xf9,0x00,0xbf,0xcc,0x0a,0x00,0x01,0x38,0xb5,0x08,0x4b,0x08,0x4d,0xed,0x1a,
0xac,0x10,0x18,0xbf,0xed,0x18,0x05,0xd0,0x01,0x3c,0x55,0xf8,0x04,0x3d,0x98,0x47,
0x00,0x2c,0xf9,0xd1,0xbd,0xe8,0x38,0x40,0x00,0xf0,0xe6,0xbb,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x70,0xb5,0x0f,0x4e,0x0f,0x4d,0x76,0x1b,0xb6,0x10,0x18,0xbf,
0x00,0x24,0x05,0xd0,0x01,0x34,0x55,0xf8,0x04,0x3b,0x98,0x47,0xa6,0x42,0xf9,0xd1,
0x0a,0x4e,0x0b,0x4d,0x76,0x1b,0x00,0xf0,0xc9,0xfb,0xb6,0x10,0x18,0xbf,0x00,0x24,
0x06,0xd0,0x01,0x34,0x55,0xf8,0x04,0x3b,0x98,0x47,0xa6,0x42,0xf9,0xd1,0x70,0xbd,
0x70,0xbd,0x00,0xbf,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xac,0x0a,0x00,0x01,
0xa4,0x0a,0x00,0x01,0x70,0xb4,0x84,0x07,0x46,0xd0,0x54,0x1e,0x00,0x2a,0x41,0xd0,
0xcd,0xb2,0x03,0x46,0x02,0xe0,0x62,0x1e,0xe4,0xb3,0x14,0x46,0x03,0xf8,0x01,0x5b,
0x9a,0x07,0xf8,0xd1,0x03,0x2c,0x2e,0xd9,0xcd,0xb2,0x45,0xea,0x05,0x25,0x0f,0x2c,
0x45,0xea,0x05,0x45,0x19,0xd9,0x03,0xf1,0x10,0x02,0x26,0x46,0x10,0x3e,0x0f,0x2e,
0x42,0xf8,0x10,0x5c,0x42,0xf8,0x0c,0x5c,0x42,0xf8,0x08,0x5c,0x42,0xf8,0x04,0x5c,
0x02,0xf1,0x10,0x02,0xf2,0xd8,0xa4,0xf1,0x10,0x02,0x22,0xf0,0x0f,0x02,0x04,0xf0,
0x0f,0x04,0x10,0x32,0x03,0x2c,0x13,0x44,0x0d,0xd9,0x1e,0x46,0x22,0x46,0x04,0x3a,
0x03,0x2a,0x46,0xf8,0x04,0x5b,0xfa,0xd8,0x22,0x1f,0x22,0xf0,0x03,0x02,0x04,0x32,
0x13,0x44,0x04,0xf0,0x03,0x04,0x2c,0xb1,0xc9,0xb2,0x1c,0x44,0x03,0xf8,0x01,0x1b,
0xa3,0x42,0xfb,0xd1,0x70,0xbc,0x70,0x47,0x14,0x46,0x03,0x46,0xc2,0xe7,0x00,0xbf,
0x2d,0xe9,0xf0,0x47,0x25,0x4c,0x25,0x68,0xd5,0xf8,0x48,0x41,0x06,0x46,0x88,0x46,
0x92,0x46,0x99,0x46,0xcc,0xb3,0x60,0x68,0x1f,0x28,0x18,0xdc,0x43,0x1c,0x7e,0xb1,
0x04,0xeb,0x80,0x05,0x01,0x21,0xc5,0xf8,0x88,0xa0,0xd4,0xf8,0x88,0x71,0x01,0xfa,
0x00,0xf2,0x17,0x43,0x02,0x2e,0xc4,0xf8,0x88,0x71,0xc5,0xf8,0x08,0x91,0x1e,0xd0,
0x02,0x30,0x63,0x60,0x44,0xf8,0x20,0x80,0x00,0x20,0xbd,0xe8,0xf0,0x87,0x14,0x4b,
0x03,0xb3,0x4f,0xf4,0xc8,0x70,0xaf,0xf3,0x00,0x80,0x04,0x46,0xd0,0xb1,0xd5,0xf8,
0x48,0x31,0x00,0x27,0x80,0xe8,0x88,0x00,0xc5,0xf8,0x48,0x41,0x38,0x46,0x01,0x23,
0xc4,0xf8,0x88,0x71,0xc4,0xf8,0x8c,0x71,0x00,0x2e,0xe1,0xd0,0xd0,0xe7,0xd4,0xf8,
0x8c,0x11,0x0a,0x43,0xc4,0xf8,0x8c,0x21,0xda,0xe7,0x05,0xf5,0xa6,0x74,0xc5,0xf8,
0x48,0x41,0xc0,0xe7,0x4f,0xf0,0xff,0x30,0xbd,0xe8,0xf0,0x87,0xcc,0x0a,0x00,0x01,
0x00,0x00,0x00,0x00,0x02,0x4b,0x13,0xb1,0x02,0x48,0xff,0xf7,0x07,0xbf,0x70,0x47,
0x00,0x00,0x00,0x00,0xc9,0x02,0x00,0x01,0x2d,0xe9,0xf0,0x4f,0x31,0x4b,0x83,0xb0,
0x1b,0x68,0x00,0x93,0x03,0xf5,0xa4,0x73,0x81,0x46,0x0e,0x46,0x01,0x93,0x00,0x9b,
0xd3,0xf8,0x48,0x71,0x27,0xb3,0xdd,0xf8,0x04,0xa0,0x7c,0x68,0x65,0x1e,0x0e,0xd4,
0x01,0x34,0x07,0xeb,0x84,0x04,0x4f,0xf0,0x00,0x08,0xe6,0xb1,0xd4,0xf8,0x00,0x31,
0xb3,0x42,0x18,0xd0,0x01,0x3d,0x6b,0x1c,0xa4,0xf1,0x04,0x04,0xf5,0xd1,0x22,0x4b,
0x73,0xb1,0x7b,0x68,0x00,0x2b,0x36,0xd1,0x3b,0x68,0x00,0x2b,0x34,0xd0,0x38,0x46,
0xca,0xf8,0x00,0x30,0xaf,0xf3,0x00,0x80,0xda,0xf8,0x00,0x70,0x00,0x2f,0xdc,0xd1,
0x03,0xb0,0xbd,0xe8,0xf0,0x8f,0x7b,0x68,0x22,0x68,0x01,0x3b,0xab,0x42,0x0c,0xbf,
0x7d,0x60,0xc4,0xf8,0x00,0x80,0x00,0x2a,0xdc,0xd0,0xd7,0xf8,0x88,0x31,0xd7,0xf8,
0x04,0xb0,0x01,0x21,0xa9,0x40,0x19,0x42,0x08,0xd1,0x90,0x47,0x7b,0x68,0x5b,0x45,
0xbd,0xd1,0xda,0xf8,0x00,0x30,0xbb,0x42,0xcc,0xd0,0xb8,0xe7,0xd7,0xf8,0x8c,0x31,
0x19,0x42,0x04,0xd1,0x48,0x46,0xd4,0xf8,0x80,0x10,0x90,0x47,0xee,0xe7,0xd4,0xf8,
0x80,0x00,0x90,0x47,0xea,0xe7,0x3b,0x68,0xba,0x46,0x1f,0x46,0x00,0x2f,0xac,0xd1,
0xce,0xe7,0x00,0xbf,0xcc,0x0a,0x00,0x01,0x00,0x00,0x00,0x00,0xfe,0xe7,0x00,0xbf,
0xef,0xf3,0x10,0x80,0x72,0xb6,0x70,0x47,0xf8,0xb5,0x20,0x4e,0x20,0x4a,0x33,0x68,
0x20,0x4d,0x21,0x4f,0x21,0x4c,0x4f,0xf0,0x80,0x71,0x91,0x60,0x9b,0x6d,0x00,0x20,
0x98,0x47,0x33,0x68,0x28,0x60,0x9b,0x6d,0x01,0x20,0x98,0x47,0x3b,0x68,0x68,0x60,
0x5b,0x68,0x98,0x47,0x3b,0x68,0x28,0x73,0x1b,0x6a,0x98,0x47,0x63,0x68,0x3a,0x68,
0x68,0x73,0x03,0xf4,0xe0,0x23,0xab,0x60,0x93,0x69,0x00,0x20,0x98,0x47,0x33,0x68,
0x02,0x21,0x5b,0x6d,0x05,0x46,0x00,0x20,0x98,0x47,0x33,0x68,0x01,0x20,0x5b,0x6d,
0x02,0x21,0x98,0x47,0x46,0xf6,0x5a,0x13,0x23,0x60,0x63,0x68,0x23,0xf4,0xe0,0x23,
0x43,0xf4,0x80,0x23,0x00,0x22,0x63,0x60,0x22,0x60,0x09,0x4b,0x1d,0xb1,0x40,0xf6,
0xce,0x22,0x5a,0x60,0xf8,0xbd,0x07,0x4a,0x5a,0x60,0xf8,0xbd,0x1c,0x08,0x00,0x02,
0x00,0xed,0x00,0xe0,0x80,0x01,0x00,0x20,0x34,0x08,0x00,0x02,0x00,0x04,0x01,0x40,
0x50,0x01,0x00,0x20,0x00,0xad,0xde,0x00,0x2d,0xe9,0xf8,0x4f,0x4e,0x4c,0x25,0x69,
0xe7,0x68,0x00,0x2d,0x6d,0xd0,0xdf,0xf8,0x38,0xb1,0xdf,0xf8,0x38,0xa1,0xdf,0xf8,
0x38,0x91,0x4f,0xf0,0x00,0x08,0xdb,0xf8,0x00,0x30,0xb5,0xf5,0x80,0x5f,0x1b,0x69,
0x4f,0xf0,0xff,0x31,0x4f,0xf0,0x01,0x00,0x93,0xbf,0x2e,0x46,0xa5,0xf5,0x80,0x55,
0x4f,0xf4,0x80,0x56,0x00,0x25,0x98,0x47,0xdb,0xf8,0x00,0x30,0x4f,0xf0,0xff,0x31,
0x1b,0x69,0x02,0x20,0x98,0x47,0xdb,0xf8,0x00,0x30,0x03,0x20,0x1b,0x69,0x01,0x46,
0x98,0x47,0x23,0x6a,0x0b,0x2b,0x03,0xd1,0x60,0xe0,0xa3,0x69,0xd9,0x06,0x02,0xd4,
0x63,0x69,0xd8,0x06,0xf9,0xd5,0x63,0x69,0xda,0x06,0x3c,0xd5,0x63,0x69,0xdb,0xf8,
0x00,0x20,0x43,0xf0,0x01,0x03,0x63,0x61,0x93,0x6a,0x39,0x46,0x4f,0xf0,0x20,0x20,
0x32,0x46,0x98,0x47,0x99,0xf8,0x03,0x30,0x03,0xf0,0xef,0x03,0x89,0xf8,0x03,0x30,
0x63,0x69,0x23,0xf0,0x11,0x03,0x80,0x46,0x37,0x44,0x63,0x61,0xdb,0xf8,0x00,0x30,
0x4f,0xf0,0xff,0x31,0x5b,0x69,0x01,0x20,0x98,0x47,0xdb,0xf8,0x00,0x30,0x4f,0xf0,
0xff,0x31,0x5b,0x69,0x02,0x20,0x98,0x47,0xdb,0xf8,0x00,0x30,0x03,0x20,0x5b,0x69,
0x01,0x46,0x98,0x47,0xdb,0xf8,0x00,0x30,0x04,0x20,0x5b,0x69,0x03,0x21,0x98,0x47,
0xb8,0xf1,0x00,0x0f,0x29,0xd0,0x00,0x2d,0x9d,0xd1,0x17,0x4b,0x40,0xf6,0xce,0x22,
0x5a,0x60,0xbd,0xe8,0xf8,0x8f,0xa3,0x69,0xdb,0x06,0xd7,0xd5,0xa3,0x69,0xdb,0xf8,
0x00,0x20,0x12,0x48,0x43,0xf0,0x01,0x03,0xa3,0x61,0x93,0x6a,0x39,0x46,0x32,0x46,
0x98,0x47,0x9a,0xf8,0x02,0x30,0x03,0xf0,0xbf,0x03,0x8a,0xf8,0x02,0x30,0xa3,0x69,
0x23,0xf0,0x11,0x03,0x80,0x46,0x37,0x44,0xa3,0x61,0xbf,0xe7,0xdb,0xf8,0x00,0x30,
0x03,0x21,0x1b,0x69,0x04,0x20,0x98,0x47,0x9a,0xe7,0x03,0x4b,0x4d,0xf6,0xad,0x62,
0x5a,0x60,0xbd,0xe8,0xf8,0x8f,0x00,0xbf,0x50,0x01,0x00,0x20,0x00,0x30,0x00,0x20,
0x1c,0x08,0x00,0x02,0x20,0x4c,0x00,0x40,0x40,0x4c,0x00,0x40,0x13,0x4b,0xdb,0x69,
0xda,0x07,0x70,0xb5,0x14,0xd4,0x11,0x4c,0xe3,0x69,0x9b,0x07,0x00,0xd4,0x70,0xbd,
0x0f,0x4d,0x2b,0x68,0x03,0x20,0x1b,0x69,0x01,0x46,0x98,0x47,0x23,0x6a,0x0b,0x2b,
0xf5,0xd1,0x2b,0x68,0x04,0x20,0x1b,0x69,0x03,0x21,0xbd,0xe8,0x70,0x40,0x18,0x47,
0x07,0x4c,0x23,0x68,0x4f,0xf0,0xff,0x31,0x1b,0x69,0x01,0x20,0x98,0x47,0x23,0x68,
0x4f,0xf0,0xff,0x31,0x1b,0x69,0x02,0x20,0x98,0x47,0xdc,0xe7,0x50,0x01,0x00,0x20,
0x1c,0x08,0x00,0x02,0x2d,0xe9,0xf8,0x43,0x1e,0x4c,0x1f,0x4d,0x1f,0x4f,0x29,0x68,
0x3a,0x68,0xdf,0xf8,0x84,0x90,0x46,0xf6,0x5a,0x18,0xc4,0xf8,0x00,0x80,0x63,0x68,
0x23,0xf4,0xe0,0x23,0x00,0x26,0x43,0xf4,0x80,0x33,0x63,0x60,0x26,0x60,0x53,0x6d,
0x30,0x46,0x98,0x47,0x3b,0x68,0x69,0x68,0x5b,0x6d,0x01,0x20,0x98,0x47,0xd9,0xf8,
0x00,0x30,0x68,0x7b,0x9b,0x69,0x98,0x47,0xd9,0xf8,0x00,0x30,0x07,0x46,0x1b,0x68,
0x28,0x7b,0x98,0x47,0xc4,0xf8,0x00,0x80,0x63,0x68,0xaa,0x68,0x0c,0x49,0x23,0xf4,
0xe0,0x23,0x13,0x43,0x63,0x60,0x26,0x60,0x0a,0x4b,0x8e,0x60,0x28,0xb1,0x27,0xb1,
0x40,0xf6,0xce,0x22,0x5a,0x60,0xbd,0xe8,0xf8,0x83,0x4d,0xf6,0xad,0x62,0x5a,0x60,
0xbd,0xe8,0xf8,0x83,0x00,0x04,0x01,0x40,0x80,0x01,0x00,0x20,0x1c,0x08,0x00,0x02,
0x00,0xed,0x00,0xe0,0x50,0x01,0x00,0x20,0x34,0x08,0x00,0x02,0x8c,0x4b,0x8d,0x4c,
0x1b,0x68,0x8d,0x4d,0x1b,0x68,0x80,0xb5,0x98,0x47,0xff,0xf7,0x81,0xfe,0x27,0x46,
0x23,0x68,0x20,0x2b,0x00,0xf2,0xeb,0x80,0x01,0xa2,0x52,0xf8,0x23,0xf0,0x00,0xbf,
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@@ -0,0 +1,164 @@
/******************************************************************************
*
* Copyright (C) 2012-2018 Texas Instruments Incorporated - http://www.ti.com/
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#ifndef OPENOCD_LOADERS_FLASH_MSP432_MSP432P411X_H
#define OPENOCD_LOADERS_FLASH_MSP432_MSP432P411X_H
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/* Available Peripherals */
#define __MCU_HAS_FLCTL_A__ /* Module FLCTL_A is available */
#define __MCU_HAS_SYSCTL_A__ /* Module SYSCTL_A is available */
/* Device and Peripheral Memory Map */
#define FLASH_BASE ((uint32_t)0x00000000) /* Flash memory address */
#define PERIPH_BASE ((uint32_t)0x40000000) /* Peripherals address */
#define CS_BASE (PERIPH_BASE + 0x00010400) /* Address of CS regs. */
#define PCM_BASE (PERIPH_BASE + 0x00010000) /* Address of PCM regs. */
#define RTC_C_BASE (PERIPH_BASE + 0x00004400) /* Address of RTC_C regs */
#define TLV_BASE ((uint32_t)0x00201000) /* Address of TLV regs. */
#define WDT_A_BASE (PERIPH_BASE + 0x00004800) /* Address of WDT_A regs */
#define BITBAND_PERI_BASE ((uint32_t)(0x42000000))
/*
* Peripherals with 8-bit or 16-bit register access allow only 8-bit or
* 16-bit bit band access, so cast to 8 bit always
*/
#define BITBAND_PERI(x, b) (*((volatile uint8_t *) (BITBAND_PERI_BASE + \
(((uint32_t)(uint32_t *)&(x)) - PERIPH_BASE)*32 + (b)*4)))
/* Register map for CLock Signal peripheral (CS) */
struct cs {
volatile uint32_t KEY; /* Key Register */
volatile uint32_t CTL0; /* Control 0 Register */
volatile uint32_t CTL1; /* Control 1 Register */
volatile uint32_t CTL2; /* Control 2 Register */
volatile uint32_t CTL3; /* Control 3 Register */
};
/* Register map for Power Control Module peripheral (PCM) */
struct pcm {
volatile uint32_t CTL0; /* Control 0 Register */
volatile uint32_t CTL1; /* Control 1 Register */
volatile uint32_t IE; /* Interrupt Enable Register */
volatile uint32_t IFG; /* Interrupt Flag Register */
volatile uint32_t CLRIFG; /* Clear Interrupt Flag Register */
};
/* Register map for Real-Time Clock peripheral (RTC_C) */
struct rtc_c {
volatile uint16_t CTL0; /* RTCCTL0 Register */
volatile uint16_t CTL13; /* RTCCTL13 Register */
volatile uint16_t OCAL; /* RTCOCAL Register */
volatile uint16_t TCMP; /* RTCTCMP Register */
volatile uint16_t PS0CTL; /* RTC Prescale Timer 0 Control Register */
volatile uint16_t PS1CTL; /* RTC Prescale Timer 1 Control Register */
volatile uint16_t PS; /* Real-Time Clock Prescale Timer Register */
volatile uint16_t IV; /* Real-Time Clock Interrupt Vector Register */
volatile uint16_t TIM0; /* RTCTIM0 Register Hexadecimal Format */
volatile uint16_t TIM1; /* Real-Time Clock Hour, Day of Week */
volatile uint16_t DATE; /* RTCDATE - Hexadecimal Format */
volatile uint16_t YEAR; /* RTCYEAR Register - Hexadecimal Format */
volatile uint16_t AMINHR; /* RTCMINHR - Hexadecimal Format */
volatile uint16_t ADOWDAY; /* RTCADOWDAY - Hexadecimal Format */
volatile uint16_t BIN2BCD; /* Binary-to-BCD Conversion Register */
volatile uint16_t BCD2BIN; /* BCD-to-Binary Conversion Register */
};
/* Register map for Watchdog Timer peripheral (WDT_A) */
struct wdt_a {
uint16_t RESERVED0[6];
volatile uint16_t CTL; /* Watchdog Timer Control Register */
};
/* Peripheral Declarations */
#define CS ((struct cs *) CS_BASE)
#define PCM ((struct pcm *) PCM_BASE)
#define RTC_C ((struct rtc_c *) RTC_C_BASE)
#define WDT_A ((struct wdt_a *) WDT_A_BASE)
/* Peripheral Register Bit Definitions */
/* DCORSEL Bit Mask */
#define CS_CTL0_DCORSEL_MASK ((uint32_t)0x00070000)
/* Nominal DCO Frequency Range (MHz): 2 to 4 */
#define CS_CTL0_DCORSEL_1 ((uint32_t)0x00010000)
/* Nominal DCO Frequency Range (MHz): 16 to 32 */
#define CS_CTL0_DCORSEL_4 ((uint32_t)0x00040000)
/* CS control key value */
#define CS_KEY_VAL ((uint32_t)0x0000695A)
/* AMR Bit Mask */
#define PCM_CTL0_AMR_MASK ((uint32_t)0x0000000F)
/* LPMR Bit Mask */
#define PCM_CTL0_LPMR_MASK ((uint32_t)0x000000F0)
/* LPM3.5. Core voltage setting 0. */
#define PCM_CTL0_LPMR_10 ((uint32_t)0x000000A0)
/* LPM4.5 */
#define PCM_CTL0_LPMR_12 ((uint32_t)0x000000C0)
/* CPM Bit Offset */
#define PCM_CTL0_CPM_OFS (8)
/* CPM Bit Mask */
#define PCM_CTL0_CPM_MASK ((uint32_t)0x00003F00)
/* PCMKEY Bit Mask */
#define PCM_CTL0_KEY_MASK ((uint32_t)0xFFFF0000)
/* PMR_BUSY Bit Offset */
#define PCM_CTL1_PMR_BUSY_OFS (8)
/* RTCKEY Bit Offset */
#define RTC_C_CTL0_KEY_OFS (8)
/* RTCKEY Bit Mask */
#define RTC_C_CTL0_KEY_MASK ((uint16_t)0xFF00)
/* RTCHOLD Bit Offset */
#define RTC_C_CTL13_HOLD_OFS (6)
/* RTC_C Key Value for RTC_C write access */
#define RTC_C_KEY ((uint16_t)0xA500)
/* Watchdog timer hold */
#define WDT_A_CTL_HOLD ((uint16_t)0x0080)
/* WDT Key Value for WDT write access */
#define WDT_A_CTL_PW ((uint16_t)0x5A00)
/* Address of BSL API table */
#define BSL_API_TABLE_ADDR ((uint32_t)0x00202000)
#ifdef __cplusplus
}
#endif
#endif /* OPENOCD_LOADERS_FLASH_MSP432_MSP432P411X_H */

View File

@@ -0,0 +1,150 @@
/******************************************************************************
*
* Copyright (C) 2012-2018 Texas Instruments Incorporated - http://www.ti.com/
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
MEMORY {
MAIN_FLASH (RX) : ORIGIN = 0x00000000, LENGTH = 0x00200000
INFO_FLASH (RX) : ORIGIN = 0x00200000, LENGTH = 0x00008000
SRAM_CODE_0(RWX): ORIGIN = 0x01000000, LENGTH = 0x00000110
SRAM_CODE_1(RWX): ORIGIN = 0x01000110, LENGTH = 0x00000030
SRAM_CODE_2(RWX): ORIGIN = 0x01000150, LENGTH = 0x00000040
SRAM_CODE_3(RWX): ORIGIN = 0x01000190, LENGTH = 0x00001E70
SRAM_CODE_4(RWX): ORIGIN = 0x01002000, LENGTH = 0x00000200
SRAM_DATA (RW) : ORIGIN = 0x20002000, LENGTH = 0x00001000
}
REGION_ALIAS("REGION_INTVECT", SRAM_CODE_0);
REGION_ALIAS("REGION_RESET", SRAM_CODE_1);
REGION_ALIAS("REGION_DESCRIPTOR", SRAM_CODE_2);
REGION_ALIAS("REGION_TEXT", SRAM_CODE_3);
REGION_ALIAS("REGION_BSS", SRAM_CODE_3);
REGION_ALIAS("REGION_DATA", SRAM_DATA);
REGION_ALIAS("REGION_STACK", SRAM_CODE_4);
REGION_ALIAS("REGION_HEAP", SRAM_DATA);
REGION_ALIAS("REGION_ARM_EXIDX", SRAM_CODE_3);
REGION_ALIAS("REGION_ARM_EXTAB", SRAM_CODE_3);
SECTIONS {
/* section for the interrupt vector area */
.intvecs : {
KEEP (*(.intvecs))
} > REGION_INTVECT
PROVIDE (_vtable_base_address =
DEFINED(_vtable_base_address) ? _vtable_base_address : 0x20000000);
.vtable (_vtable_base_address) : AT (_vtable_base_address) {
KEEP (*(.vtable))
} > REGION_DATA
.descriptor :{
FILL(0x00000000);
. = ORIGIN(REGION_DESCRIPTOR) + LENGTH(REGION_DESCRIPTOR) - 1;
BYTE(0x00);
__ROM_AT = .;
} > REGION_DESCRIPTOR
.reset : {
KEEP(*(.reset))
} > REGION_RESET AT> REGION_RESET
.text : {
CREATE_OBJECT_SYMBOLS
KEEP (*(.text))
*(.text.*)
. = ALIGN(0x4);
KEEP (*(.ctors))
. = ALIGN(0x4);
KEEP (*(.dtors))
. = ALIGN(0x4);
__init_array_start = .;
KEEP (*(.init_array*))
__init_array_end = .;
KEEP (*(.init))
KEEP (*(.fini*))
} > REGION_TEXT AT> REGION_TEXT
.rodata : {
*(.rodata)
*(.rodata.*)
} > REGION_TEXT AT> REGION_TEXT
.ARM.exidx : {
__exidx_start = .;
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
__exidx_end = .;
} > REGION_ARM_EXIDX AT> REGION_ARM_EXIDX
.ARM.extab : {
KEEP (*(.ARM.extab* .gnu.linkonce.armextab.*))
} > REGION_ARM_EXTAB AT> REGION_ARM_EXTAB
__etext = .;
.data : {
__data_load__ = LOADADDR (.data);
__data_start__ = .;
KEEP (*(.data))
KEEP (*(.data*))
. = ALIGN (4);
__data_end__ = .;
} > REGION_DATA AT> REGION_TEXT
.bss : {
__bss_start__ = .;
*(.shbss)
KEEP (*(.bss))
*(.bss.*)
*(COMMON)
. = ALIGN (4);
__bss_end__ = .;
} > REGION_BSS AT> REGION_BSS
.heap : {
__heap_start__ = .;
end = __heap_start__;
_end = end;
__end = end;
KEEP (*(.heap))
__heap_end__ = .;
__HeapLimit = __heap_end__;
} > REGION_HEAP AT> REGION_HEAP
.stack (NOLOAD) : ALIGN(0x8) {
_stack = .;
KEEP(*(.stack))
} > REGION_STACK AT> REGION_STACK
__stack_top = ORIGIN(REGION_STACK) + LENGTH(REGION_STACK);
PROVIDE(__stack = __stack_top);
}

View File

@@ -0,0 +1,361 @@
/* Autogenerated with ../../../../src/helper/bin2char.sh */
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0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0d,0x12,0x00,0x01,
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0x73,0xb1,0x7b,0x68,0x00,0x2b,0x36,0xd1,0x3b,0x68,0x00,0x2b,0x34,0xd0,0x38,0x46,
0xca,0xf8,0x00,0x30,0xaf,0xf3,0x00,0x80,0xda,0xf8,0x00,0x70,0x00,0x2f,0xdc,0xd1,
0x03,0xb0,0xbd,0xe8,0xf0,0x8f,0x7b,0x68,0x22,0x68,0x01,0x3b,0xab,0x42,0x0c,0xbf,
0x7d,0x60,0xc4,0xf8,0x00,0x80,0x00,0x2a,0xdc,0xd0,0xd7,0xf8,0x88,0x31,0xd7,0xf8,
0x04,0xb0,0x01,0x21,0xa9,0x40,0x19,0x42,0x08,0xd1,0x90,0x47,0x7b,0x68,0x5b,0x45,
0xbd,0xd1,0xda,0xf8,0x00,0x30,0xbb,0x42,0xcc,0xd0,0xb8,0xe7,0xd7,0xf8,0x8c,0x31,
0x19,0x42,0x04,0xd1,0x48,0x46,0xd4,0xf8,0x80,0x10,0x90,0x47,0xee,0xe7,0xd4,0xf8,
0x80,0x00,0x90,0x47,0xea,0xe7,0x3b,0x68,0xba,0x46,0x1f,0x46,0x00,0x2f,0xac,0xd1,
0xce,0xe7,0x00,0xbf,0x38,0x12,0x00,0x01,0x00,0x00,0x00,0x00,0xfe,0xe7,0x00,0xbf,
0x4f,0x4a,0x13,0x68,0xc3,0xf3,0x05,0x23,0x04,0x3b,0xdb,0xb2,0x15,0x2b,0x70,0xb4,
0x00,0xf2,0x8c,0x80,0x01,0x22,0x02,0xfa,0x03,0xf3,0x13,0xf0,0x30,0x1f,0x61,0xd0,
0x02,0x23,0x98,0x42,0x31,0xd0,0x46,0x4b,0x1b,0x68,0xc3,0xf3,0x05,0x23,0x44,0x4c,
0x44,0x49,0x01,0x25,0x22,0x68,0x09,0x2b,0x10,0xd8,0xdf,0xe8,0x03,0xf0,0x05,0x35,
0x0f,0x0f,0x45,0x29,0x0f,0x0f,0x45,0x29,0x01,0x28,0x63,0xd0,0x02,0x28,0x73,0xd1,
0x4f,0xf6,0xf0,0x76,0x3c,0x4b,0x16,0x40,0x33,0x43,0x23,0x60,0x0b,0x78,0x03,0xf0,
0xff,0x02,0x00,0x2b,0xfa,0xd1,0x23,0x68,0xc3,0xf3,0x05,0x23,0x04,0x3b,0xdb,0xb2,
0x15,0x2b,0x05,0xd8,0x05,0xfa,0x03,0xf3,0x13,0xf0,0x30,0x1f,0x38,0xd0,0x02,0x22,
0x23,0x68,0x90,0x42,0xc3,0xf3,0x05,0x23,0xd4,0xd1,0x01,0x20,0x70,0xbc,0x70,0x47,
0x4f,0xf6,0xf0,0x76,0x2d,0x4b,0x16,0x40,0x33,0x43,0x23,0x60,0x0b,0x78,0x03,0xf0,
0xff,0x02,0x00,0x2b,0xda,0xd1,0xde,0xe7,0x01,0x28,0x27,0xd0,0x02,0x28,0x43,0xd1,
0x4f,0xf6,0xf0,0x76,0x26,0x4b,0x16,0x40,0x33,0x43,0x23,0x60,0x0b,0x78,0x03,0xf0,
0xff,0x02,0x00,0x2b,0xca,0xd1,0xce,0xe7,0x4f,0xf6,0xf0,0x73,0x13,0x40,0x43,0xf0,
0xd2,0x43,0x43,0xf4,0xb4,0x03,0x23,0x60,0x0b,0x78,0x03,0xf0,0xff,0x02,0x00,0x2b,
0xbc,0xd1,0xc0,0xe7,0x13,0xf0,0x03,0x1f,0x14,0xbf,0x13,0x46,0x00,0x23,0x98,0xe7,
0x13,0xf0,0x03,0x1f,0x14,0xbf,0x01,0x22,0x00,0x22,0xc1,0xe7,0x4f,0xf6,0xf0,0x76,
0x14,0x4b,0x16,0x40,0x33,0x43,0x23,0x60,0x0b,0x78,0x03,0xf0,0xff,0x02,0x00,0x2b,
0xa4,0xd1,0xa8,0xe7,0x4f,0xf6,0xf0,0x76,0x0f,0x4b,0x16,0x40,0x33,0x43,0x23,0x60,
0x0b,0x78,0x03,0xf0,0xff,0x02,0x00,0x2b,0x98,0xd1,0x9c,0xe7,0x00,0x28,0xac,0xd0,
0x13,0x68,0xc3,0xf3,0x05,0x23,0x7a,0xe7,0x00,0x20,0x70,0xbc,0x70,0x47,0x00,0xbf,
0x00,0x00,0x01,0x40,0xa0,0x00,0x20,0x42,0x08,0x00,0x5a,0x69,0x01,0x00,0x5a,0x69,
0x09,0x00,0x5a,0x69,0x05,0x00,0x5a,0x69,0x04,0x00,0x5a,0x69,0x4a,0x4b,0x1b,0x68,
0xc3,0xf3,0x05,0x23,0x04,0x3b,0xdb,0xb2,0x15,0x2b,0xf0,0xb4,0x7e,0xd8,0x01,0x22,
0x02,0xfa,0x03,0xf3,0x13,0xf0,0x30,0x1f,0x5f,0xd0,0x02,0x26,0x42,0x4b,0x1b,0x68,
0xc3,0xf3,0x05,0x23,0x01,0x3b,0xdb,0xb2,0x1f,0x2b,0x69,0xd8,0x01,0x22,0x02,0xfa,
0x03,0xf3,0x03,0xf0,0x11,0x31,0x21,0xf0,0x10,0x21,0x00,0x29,0x68,0xd1,0x00,0x2b,
0xb4,0xbf,0x02,0x23,0x00,0x23,0x98,0x42,0x5d,0xd0,0x37,0x4c,0x37,0x49,0x01,0x25,
0x22,0x68,0x23,0x68,0xc3,0xf3,0x05,0x23,0x09,0x2b,0x0e,0xd8,0x05,0xfa,0x03,0xf3,
0x13,0xf4,0x89,0x7f,0x41,0xd1,0x40,0xf2,0x21,0x27,0x1f,0x40,0x2f,0xb1,0x4f,0xf6,
0xf0,0x77,0x2f,0x4b,0x17,0x40,0x3b,0x43,0x23,0x60,0x0b,0x78,0x03,0xf0,0xff,0x02,
0x00,0x2b,0xfa,0xd1,0x23,0x68,0xc3,0xf3,0x05,0x23,0x01,0x3b,0xdb,0xb2,0x1f,0x2b,
0x29,0xd8,0x05,0xfa,0x03,0xf3,0x03,0xf0,0x11,0x37,0x27,0xf0,0x10,0x27,0x6f,0xbb,
0x00,0x2b,0xb4,0xbf,0x02,0x23,0x00,0x23,0x98,0x42,0xd1,0xd1,0x1e,0x4b,0x1b,0x68,
0xc3,0xf3,0x05,0x23,0x04,0x3b,0xdb,0xb2,0x15,0x2b,0x06,0xd8,0x01,0x22,0x02,0xfa,
0x03,0xf3,0x13,0xf0,0x30,0x1f,0x25,0xd0,0x02,0x22,0x96,0x42,0x1b,0xd0,0x01,0x2e,
0x25,0xd0,0x02,0x20,0xf0,0xbc,0xff,0xf7,0xe3,0xbe,0x13,0xf0,0x03,0x1f,0x14,0xbf,
0x16,0x46,0x00,0x26,0x9a,0xe7,0x13,0x46,0xde,0xe7,0x4f,0xf6,0xf0,0x73,0x13,0x40,
0x43,0xf0,0xd2,0x43,0x43,0xf4,0xb4,0x03,0x23,0x60,0xbe,0xe7,0x01,0x23,0xd3,0xe7,
0x00,0x23,0x98,0x42,0xa1,0xd1,0x01,0x20,0xf0,0xbc,0x70,0x47,0x00,0x26,0x85,0xe7,
0x13,0x46,0x98,0xe7,0x13,0xf0,0x03,0x1f,0x08,0xbf,0x00,0x22,0xd5,0xe7,0x30,0x46,
0xf0,0xbc,0xff,0xf7,0xbd,0xbe,0x00,0xbf,0x00,0x00,0x01,0x40,0xa0,0x00,0x20,0x42,
0x01,0x00,0x5a,0x69,0xef,0xf3,0x10,0x80,0x72,0xb6,0x70,0x47,0x30,0xbf,0x70,0x47,
0x04,0x4a,0x08,0xb5,0x13,0x69,0x23,0xf0,0x04,0x03,0x13,0x61,0xff,0xf7,0xf6,0xff,
0x01,0x20,0x08,0xbd,0x00,0xed,0x00,0xe0,0xff,0xf7,0x50,0xbf,0x0b,0x4b,0x1b,0x68,
0xc3,0xf3,0x05,0x23,0x01,0x3b,0xdb,0xb2,0x1f,0x2b,0x0c,0xd8,0x01,0x20,0x00,0xfa,
0x03,0xf2,0x02,0xf0,0x11,0x33,0x23,0xf0,0x10,0x23,0x2b,0xb9,0x00,0x2a,0xb4,0xbf,
0x02,0x20,0x00,0x20,0x70,0x47,0x00,0x20,0x70,0x47,0x00,0xbf,0x00,0x00,0x01,0x40,
0x2d,0xe9,0xf8,0x43,0x7b,0x4e,0x7c,0x4c,0xdf,0xf8,0x00,0x82,0x7b,0x4f,0x7c,0x4d,
0x33,0x78,0x00,0x2b,0x43,0xd1,0x23,0x68,0x03,0xf0,0xf0,0x03,0xa0,0x2b,0x3e,0xd0,
0x23,0x68,0x03,0xf0,0xf0,0x03,0xc0,0x2b,0x39,0xd0,0x23,0x68,0xc3,0xf3,0x05,0x23,
0x04,0x3b,0xdb,0xb2,0x15,0x2b,0x08,0xd8,0x01,0x22,0x02,0xfa,0x03,0xf3,0x13,0xf0,
0x30,0x10,0x02,0xd1,0x13,0xf0,0x03,0x1f,0x55,0xd1,0x23,0x68,0xc3,0xf3,0x05,0x29,
0x22,0x68,0x4f,0xf6,0x0f,0x73,0x13,0x40,0x43,0xf0,0xd2,0x43,0x43,0xf4,0xb4,0x03,
0x23,0x60,0x2b,0x69,0x43,0xf0,0x04,0x03,0x2b,0x61,0xff,0xf7,0x9f,0xff,0x2b,0x69,
0x23,0xf0,0x04,0x03,0x2b,0x61,0x23,0x68,0xc3,0xf3,0x05,0x23,0x4b,0x45,0x29,0xd0,
0xb9,0xf1,0x11,0x0f,0x6b,0xd0,0x0d,0xd9,0xb9,0xf1,0x19,0x0f,0x72,0xd0,0x4b,0xd9,
0xb9,0xf1,0x21,0x0f,0x35,0xd0,0x02,0xd8,0xb9,0xf1,0x20,0x0f,0xb8,0xd0,0x00,0x20,
0xbd,0xe8,0xf8,0x83,0xb9,0xf1,0x05,0x0f,0x6f,0xd0,0x16,0xd9,0xb9,0xf1,0x09,0x0f,
0x00,0xf0,0x8c,0x80,0xb9,0xf1,0x10,0x0f,0x00,0xf0,0x81,0x80,0xb9,0xf1,0x08,0x0f,
0xed,0xd1,0x00,0x20,0xff,0xf7,0xd2,0xfe,0x98,0xb1,0x02,0x20,0xbd,0xe8,0xf8,0x43,
0xff,0xf7,0x1e,0xbe,0x01,0x20,0xbd,0xe8,0xf8,0x83,0xb9,0xf1,0x01,0x0f,0x68,0xd0,
0x5d,0xd3,0xb9,0xf1,0x04,0x0f,0xda,0xd1,0x00,0x20,0xff,0xf7,0xbf,0xfe,0x00,0x28,
0x50,0xd1,0xbd,0xe8,0xf8,0x83,0x23,0x68,0xc3,0xf3,0x05,0x29,0xff,0xf7,0x08,0xfe,
0xa6,0xe7,0x40,0x49,0x40,0x4a,0x8b,0x89,0x03,0xf0,0x7f,0x03,0x43,0xf4,0xb5,0x43,
0x8b,0x81,0x13,0x88,0xdb,0xb2,0x43,0xf4,0x25,0x43,0x01,0x20,0x00,0x21,0x13,0x80,
0x88,0xf8,0x00,0x00,0x39,0x70,0x72,0xe7,0xb9,0xf1,0x15,0x0f,0x5b,0xd0,0xb9,0xf1,
0x18,0x0f,0x51,0xd0,0xb9,0xf1,0x14,0x0f,0xb1,0xd1,0x00,0x20,0xff,0xf7,0x96,0xfe,
0x00,0x28,0xac,0xd0,0x01,0x20,0xff,0xf7,0xe3,0xfd,0x00,0x28,0xa7,0xd0,0x29,0x4b,
0x1b,0x78,0x00,0x2b,0xa3,0xd1,0xbd,0xe8,0xf8,0x43,0xff,0xf7,0x29,0xbf,0x01,0x20,
0xff,0xf7,0x84,0xfe,0x00,0x28,0x9a,0xd0,0x00,0x20,0xff,0xf7,0xd1,0xfd,0x00,0x28,
0xed,0xd1,0x94,0xe7,0x01,0x20,0xff,0xf7,0x79,0xfe,0x00,0x28,0x8f,0xd0,0x02,0x20,
0xff,0xf7,0xc6,0xfd,0x00,0x28,0xe2,0xd1,0x89,0xe7,0x01,0x20,0xff,0xf7,0x6e,0xfe,
0x00,0x28,0xae,0xd0,0x01,0x20,0xbd,0xe8,0xf8,0x43,0xff,0xf7,0xb9,0xbd,0x00,0x20,
0xff,0xf7,0x64,0xfe,0x00,0x28,0xa4,0xd0,0x00,0x20,0xbd,0xe8,0xf8,0x43,0xff,0xf7,
0xaf,0xbd,0x48,0x46,0xff,0xf7,0x5a,0xfe,0x00,0x28,0x9a,0xd0,0xf4,0xe7,0x00,0x20,
0xff,0xf7,0x54,0xfe,0x00,0x28,0x3f,0xf4,0x6a,0xaf,0xcd,0xe7,0x01,0x20,0xff,0xf7,
0x4d,0xfe,0x00,0x28,0x8d,0xd0,0x78,0xe7,0x00,0x20,0xff,0xf7,0x47,0xfe,0x00,0x28,
0x3f,0xf4,0x5d,0xaf,0xcb,0xe7,0x01,0x20,0xff,0xf7,0x40,0xfe,0x00,0x28,0x3f,0xf4,
0x56,0xaf,0xa7,0xe7,0xa0,0x00,0x20,0x42,0x00,0x00,0x01,0x40,0x20,0x80,0x08,0x42,
0x00,0xed,0x00,0xe0,0x00,0x48,0x00,0x40,0x00,0x44,0x00,0x40,0x58,0x80,0x08,0x42,
0x6b,0x49,0x30,0xb5,0x0a,0x68,0xc2,0xf3,0x05,0x22,0x90,0x42,0x83,0xb0,0x21,0xd0,
0x11,0x28,0x00,0xf0,0xbf,0x80,0x20,0xd9,0x19,0x28,0x00,0xf0,0x95,0x80,0x3a,0xd9,
0x21,0x28,0x5d,0xd0,0x55,0xd9,0xa0,0x28,0x00,0xf0,0x86,0x80,0xc0,0x28,0x1e,0xd1,
0x60,0x4b,0x1b,0x78,0xdb,0xb9,0x60,0x48,0x5d,0x49,0x02,0x69,0x5f,0x4b,0x42,0xf0,
0x04,0x02,0x02,0x61,0x08,0x68,0x4f,0xf6,0x0f,0x72,0x02,0x40,0x13,0x43,0x0b,0x60,
0xff,0xf7,0xa4,0xfe,0x01,0x20,0x03,0xb0,0x30,0xbd,0x05,0x28,0x00,0xf0,0xa1,0x80,
0x08,0xd9,0x09,0x28,0x62,0xd0,0x10,0x28,0x55,0xd0,0x08,0x28,0x4c,0xd0,0x00,0x20,
0x03,0xb0,0x30,0xbd,0x01,0x28,0x00,0xf0,0x87,0x80,0x7d,0xd3,0x04,0x28,0xf6,0xd1,
0x00,0x20,0xff,0xf7,0xeb,0xfd,0x00,0x28,0xe5,0xd0,0x01,0x20,0x03,0xb0,0xbd,0xe8,
0x30,0x40,0xff,0xf7,0x35,0xbd,0x15,0x28,0x67,0xd0,0x18,0x28,0x5f,0xd0,0x14,0x28,
0xe5,0xd1,0x00,0x20,0xff,0xf7,0xda,0xfd,0x00,0x28,0xe0,0xd0,0x01,0x20,0xff,0xf7,
0x27,0xfd,0x00,0x28,0xdb,0xd0,0x3f,0x4b,0x1b,0x78,0x00,0x2b,0xd7,0xd1,0x3e,0x4a,
0x01,0x90,0x13,0x69,0x23,0xf0,0x04,0x03,0x13,0x61,0xff,0xf7,0x67,0xfe,0x01,0x98,
0xc1,0xe7,0x20,0x28,0xcb,0xd1,0x03,0xb0,0xbd,0xe8,0x30,0x40,0xff,0xf7,0x88,0xbe,
0x37,0x49,0x38,0x4a,0x8b,0x89,0x38,0x4c,0x38,0x48,0x03,0xf0,0x7f,0x03,0x43,0xf4,
0xb5,0x43,0x8b,0x81,0x13,0x88,0xdb,0xb2,0x43,0xf4,0x25,0x43,0x01,0x25,0x00,0x21,
0x13,0x80,0x25,0x70,0x01,0x70,0xe6,0xe7,0x00,0x20,0xff,0xf7,0xa7,0xfd,0x00,0x28,
0xa1,0xd0,0x02,0x20,0xba,0xe7,0x00,0x20,0xff,0xf7,0xa0,0xfd,0x00,0x28,0xa6,0xd0,
0x00,0x20,0xff,0xf7,0xed,0xfc,0x00,0x28,0xc5,0xd1,0xa0,0xe7,0x01,0x20,0xff,0xf7,
0x95,0xfd,0x00,0x28,0x8f,0xd0,0xec,0xe7,0x1e,0x4b,0x1b,0x78,0x00,0x2b,0x96,0xd1,
0x1d,0x48,0x23,0x4b,0x02,0x69,0x7a,0xe7,0x01,0x20,0xff,0xf7,0x87,0xfd,0x00,0x28,
0x8d,0xd0,0x02,0x20,0xff,0xf7,0xd4,0xfc,0x00,0x28,0xac,0xd1,0x87,0xe7,0x00,0x20,
0xff,0xf7,0x7c,0xfd,0x00,0x28,0x82,0xd0,0xf3,0xe7,0x01,0x20,0xff,0xf7,0x76,0xfd,
0x00,0x28,0x3f,0xf4,0x7c,0xaf,0x99,0xe7,0x00,0x20,0xff,0xf7,0x6f,0xfd,0x00,0x28,
0x3f,0xf4,0x69,0xaf,0x00,0x20,0x81,0xe7,0xff,0xf7,0x68,0xfd,0x00,0x28,0x3f,0xf4,
0x62,0xaf,0xf7,0xe7,0x01,0x20,0xff,0xf7,0x61,0xfd,0x00,0x28,0x3f,0xf4,0x67,0xaf,
0xbe,0xe7,0x01,0x20,0xff,0xf7,0x5a,0xfd,0x00,0x28,0x3f,0xf4,0x54,0xaf,0x6c,0xe7,
0x00,0x00,0x01,0x40,0xa0,0x00,0x20,0x42,0x00,0xed,0x00,0xe0,0xa0,0x00,0x5a,0x69,
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0x00,0x00,0x00,0x00,0x08,0x20,0x00,0x20,

View File

@@ -0,0 +1,122 @@
/******************************************************************************
*
* Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include <stdint.h>
/* Entry point for the application. */
extern int main();
/* Reserve space for the system stack. */
extern uint32_t __stack_top;
typedef void(*pFunc)(void);
/* Interrupt handler prototypes */
void default_handler(void);
void reset_handler(void);
/*
* The vector table. Note that the proper constructs must be placed on this to
* ensure that it ends up at physical address 0x0000.0000 or at the start of
* the program if located at a start address other than 0.
*/
void (* const intr_vectors[])(void) __attribute__((section(".intvecs"))) = {
(pFunc)&__stack_top, /* The initial stack pointer */
reset_handler, /* The reset handler */
default_handler, /* The NMI handler */
default_handler, /* The hard fault handler */
default_handler, /* The MPU fault handler */
default_handler, /* The bus fault handler */
default_handler, /* The usage fault handler */
0, /* Reserved */
0, /* Reserved */
0, /* Reserved */
0, /* Reserved */
default_handler, /* SVCall handler */
default_handler, /* Debug monitor handler */
0, /* Reserved */
default_handler, /* The PendSV handler */
default_handler /* The SysTick handler */
};
/*
* The following are constructs created by the linker, indicating where
* the "data" and "bss" segments reside in memory. The initializers for
* the "data" segment resides immediately following the "text" segment.
*/
extern uint32_t __bss_start__;
extern uint32_t __bss_end__;
/*
* This is the code that gets called when the processor first starts execution
* following a reset event. Only the absolutely necessary set is performed,
* after which the application supplied entry() routine is called. Any fancy
* actions (such as making decisions based on the reset cause register, and
* resetting the bits in that register) are left solely in the hands of the
* application.
*/
__attribute__((section(".reset"))) __attribute__((naked))
void reset_handler(void)
{
/* Set stack pointer */
__asm(" MOVW.W r0, #0x1700\n"
" MOVT.W r0, #0x2000\n"
" mov sp, r0\n");
/* Zero fill the bss segment. */
__asm(" ldr r0, =__bss_start__\n"
" ldr r1, =__bss_end__\n"
" mov r2, #0\n"
" .thumb_func\n"
"zero_loop:\n"
" cmp r0, r1\n"
" it lt\n"
" strlt r2, [r0], #4\n"
" blt zero_loop");
/* Call the application's entry point. */
main();
}
/*
* This is the code that gets called when the processor receives an unexpected
* interrupt. This simply enters an infinite loop, preserving the system state
* for examination by a debugger.
*/
void default_handler(void)
{
/* Enter an infinite loop. */
while (1)
;
}

View File

@@ -0,0 +1,122 @@
/******************************************************************************
*
* Copyright (C) 2012-2018 Texas Instruments Incorporated - http://www.ti.com/
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include <stdint.h>
/* Entry point for the application. */
extern int main();
/* Reserve space for the system stack. */
extern uint32_t __stack_top;
typedef void(*pFunc)(void);
/* Interrupt handler prototypes */
void default_handler(void);
void reset_handler(void);
/*
* The vector table. Note that the proper constructs must be placed on this to
* ensure that it ends up at physical address 0x0000.0000 or at the start of
* the program if located at a start address other than 0.
*/
void (* const intr_vectors[])(void) __attribute__((section(".intvecs"))) = {
(pFunc)&__stack_top, /* The initial stack pointer */
reset_handler, /* The reset handler */
default_handler, /* The NMI handler */
default_handler, /* The hard fault handler */
default_handler, /* The MPU fault handler */
default_handler, /* The bus fault handler */
default_handler, /* The usage fault handler */
0, /* Reserved */
0, /* Reserved */
0, /* Reserved */
0, /* Reserved */
default_handler, /* SVCall handler */
default_handler, /* Debug monitor handler */
0, /* Reserved */
default_handler, /* The PendSV handler */
default_handler /* The SysTick handler */
};
/*
* The following are constructs created by the linker, indicating where
* the "data" and "bss" segments reside in memory. The initializers for
* the "data" segment resides immediately following the "text" segment.
*/
extern uint32_t __bss_start__;
extern uint32_t __bss_end__;
/*
* This is the code that gets called when the processor first starts execution
* following a reset event. Only the absolutely necessary set is performed,
* after which the application supplied entry() routine is called. Any fancy
* actions (such as making decisions based on the reset cause register, and
* resetting the bits in that register) are left solely in the hands of the
* application.
*/
__attribute__((section(".reset"))) __attribute__((naked))
void reset_handler(void)
{
/* Set stack pointer */
__asm(" MOVW.W r0, #0x1700\n"
" MOVT.W r0, #0x0100\n"
" mov sp, r0\n");
/* Zero fill the bss segment. */
__asm(" ldr r0, =__bss_start__\n"
" ldr r1, =__bss_end__\n"
" mov r2, #0\n"
" .thumb_func\n"
"zero_loop:\n"
" cmp r0, r1\n"
" it lt\n"
" strlt r2, [r0], #4\n"
" blt zero_loop");
/* Call the application's entry point. */
main();
}
/*
* This is the code that gets called when the processor receives an unexpected
* interrupt. This simply enters an infinite loop, preserving the system state
* for examination by a debugger.
*/
void default_handler(void)
{
/* Enter an infinite loop. */
while (1)
;
}

View File

@@ -0,0 +1,28 @@
BIN2C = ../../../../src/helper/bin2char.sh
CROSS_COMPILE ?= arm-none-eabi-
CC=$(CROSS_COMPILE)gcc
OBJCOPY=$(CROSS_COMPILE)objcopy
OBJDUMP=$(CROSS_COMPILE)objdump
CFLAGS = -static -nostartfiles -mlittle-endian -Wa,-EL
all: nrf5.inc
.PHONY: clean
%.elf: %.S
$(CC) $(CFLAGS) $< -o $@
%.lst: %.elf
$(OBJDUMP) -S $< > $@
%.bin: %.elf
$(OBJCOPY) -Obinary $< $@
%.inc: %.bin
$(BIN2C) < $< > $@
clean:
-rm -f *.elf *.lst *.bin *.inc

View File

@@ -0,0 +1,70 @@
/***************************************************************************
* Copyright (C) 2014 Angus Gratton *
* gus@projectgus.com *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc. *
***************************************************************************/
.text
.syntax unified
.cpu cortex-m0
.thumb
/*
* Params :
* r0 = byte count
* r1 = buffer start
* r2 = buffer end
* r3 = target address
* r6 = watchdog refresh value
* r7 = watchdog refresh register address
*/
.thumb_func
.global _start
_start:
wait_fifo:
// Kick the watchdog
str r6, [r7, #0]
// Load write pointer
ldr r5, [r1, #0]
// Abort if it is NULL
cmp r5, #0
beq.n exit
// Load read pointer
ldr r4, [r1, #4]
// Continue waiting if it equals the write pointer
cmp r4, r5
beq.n wait_fifo
// Copy one word from buffer to target, and increment pointers
ldmia r4!, {r5}
stmia r3!, {r5}
// If at end of buffer, wrap back to buffer start
cmp r4, r2
bcc.n no_wrap
mov r4, r1
adds r4, #8
no_wrap:
// Update read pointer inside the buffer
str r4, [r1, #4]
// Deduce the word transferred from the byte count
subs r0, #4
// Start again
bne.n wait_fifo
exit:
// Wait for OpenOCD
bkpt #0x00
.pool

View File

@@ -0,0 +1,4 @@
/* Autogenerated with ../../../../src/helper/bin2char.sh */
0x3e,0x60,0x0d,0x68,0x00,0x2d,0x0b,0xd0,0x4c,0x68,0xac,0x42,0xf8,0xd0,0x20,0xcc,
0x20,0xc3,0x94,0x42,0x01,0xd3,0x0c,0x46,0x08,0x34,0x4c,0x60,0x04,0x38,0xef,0xd1,
0x00,0xbe,

View File

@@ -0,0 +1,37 @@
CROSS_COMPILE=arm-linux-gnueabihf-
BIN2C = ../../../../src/helper/bin2char.sh
TGT = sh_qspi
ASRC += sh_qspi.S
LDS = sh_qspi.ld
OBJS += $(ASRC:.S=.o)
CC=$(CROSS_COMPILE)gcc
OBJCOPY=$(CROSS_COMPILE)objcopy
OBJDUMP=$(CROSS_COMPILE)objdump
LD=$(CROSS_COMPILE)ld
NM=$(CROSS_COMPILE)nm
SIZE=$(CROSS_COMPILE)size
CFLAGS=-Os -Wall -nostartfiles -marm -nostdinc -ffreestanding -mabi=aapcs-linux -mword-relocations -fno-pic -mno-unaligned-access -ffunction-sections -fdata-sections -fno-common -msoft-float -pipe -march=armv7-a -mtune=generic-armv7-a
LDFLAGS=-T$(LDS) -nostdlib -Map=$(TGT).map
all: $(TGT).inc
%.o: %.S
$(CC) $(CFLAGS) -c $^ -o $@
$(TGT).elf: $(OBJS)
$(LD) $(LDFLAGS) $^ -o $@
$(TGT).bin: $(TGT).elf
$(OBJCOPY) $< -O binary $@
$(NM) -n $(TGT).elf > $(TGT).sym
$(SIZE) $(TGT).elf
$(TGT).inc: $(TGT).bin
$(BIN2C) < $< > $@
clean:
rm -rf *.elf *.hex *.map *.o *.disasm *.sym

View File

@@ -0,0 +1,306 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* SH QSPI (Quad SPI) driver
* Copyright (C) 2019 Marek Vasut <marek.vasut@gmail.com>
*/
#define BIT(n) (1UL << (n))
/* SH QSPI register bit masks <REG>_<BIT> */
#define SPCR_MSTR 0x08
#define SPCR_SPE 0x40
#define SPSR_SPRFF 0x80
#define SPSR_SPTEF 0x20
#define SPPCR_IO3FV 0x04
#define SPPCR_IO2FV 0x02
#define SPPCR_IO1FV 0x01
#define SPBDCR_RXBC0 BIT(0)
#define SPCMD_SCKDEN BIT(15)
#define SPCMD_SLNDEN BIT(14)
#define SPCMD_SPNDEN BIT(13)
#define SPCMD_SSLKP BIT(7)
#define SPCMD_BRDV0 BIT(2)
#define SPCMD_INIT1 SPCMD_SCKDEN | SPCMD_SLNDEN | \
SPCMD_SPNDEN | SPCMD_SSLKP | \
SPCMD_BRDV0
#define SPCMD_INIT2 SPCMD_SPNDEN | SPCMD_SSLKP | \
SPCMD_BRDV0
#define SPBFCR_TXRST BIT(7)
#define SPBFCR_RXRST BIT(6)
#define SPBFCR_TXTRG 0x30
#define SPBFCR_RXTRG 0x07
/* SH QSPI register set */
#define SH_QSPI_SPCR 0x00
#define SH_QSPI_SSLP 0x01
#define SH_QSPI_SPPCR 0x02
#define SH_QSPI_SPSR 0x03
#define SH_QSPI_SPDR 0x04
#define SH_QSPI_SPSCR 0x08
#define SH_QSPI_SPSSR 0x09
#define SH_QSPI_SPBR 0x0a
#define SH_QSPI_SPDCR 0x0b
#define SH_QSPI_SPCKD 0x0c
#define SH_QSPI_SSLND 0x0d
#define SH_QSPI_SPND 0x0e
#define SH_QSPI_DUMMY0 0x0f
#define SH_QSPI_SPCMD0 0x10
#define SH_QSPI_SPCMD1 0x12
#define SH_QSPI_SPCMD2 0x14
#define SH_QSPI_SPCMD3 0x16
#define SH_QSPI_SPBFCR 0x18
#define SH_QSPI_DUMMY1 0x19
#define SH_QSPI_SPBDCR 0x1a
#define SH_QSPI_SPBMUL0 0x1c
#define SH_QSPI_SPBMUL1 0x20
#define SH_QSPI_SPBMUL2 0x24
#define SH_QSPI_SPBMUL3 0x28
.syntax unified
.arm
.text
.macro wait_for_spsr, spsrbit
1: ldrb r12, [r0, #SH_QSPI_SPSR]
tst r12, \spsrbit
beq 1b
.endm
.macro sh_qspi_xfer
bl sh_qspi_cs_activate
str r6, [r0, SH_QSPI_SPBMUL0]
bl sh_qspi_xfer_common
bl sh_qspi_cs_deactivate
.endm
.macro sh_qspi_write_enable
ldr r4, =SPIFLASH_WRITE_ENABLE
adr r5, _start
add r4, r5
mov r5, #0x0
mov r6, #0x1
sh_qspi_xfer
.endm
.macro sh_qspi_wait_till_ready
1: ldr r4, =SPIFLASH_READ_STATUS
adr r5, _start
add r4, r5
mov r5, #0x0
mov r6, #0x2
sh_qspi_xfer
and r13, #0x1
cmp r13, #0x1
beq 1b
.endm
/*
* r0: controller base address
* r1: data buffer base address
* r2: BIT(31) -- page program (not read)
* BIT(30) -- 4-byte address (not 3-byte)
* BIT(29) -- 512-byte page (not 256-byte)
* BIT(27:20) -- SF command
* BIT(19:0) -- amount of data to read/write
* r3: SF target address
*
* r7: data size
* r8: page size
*
* r14: lr, link register
* r15: pc, program counter
*
* Clobber: r4, r5, r6, r7, r8
*/
.global _start
_start:
bic r7, r2, #0xff000000
bic r7, r7, #0x00f00000
and r8, r2, #(1 << 31)
cmp r8, #(1 << 31)
beq do_page_program
/* fast read */
bl sh_qspi_cs_activate
bl sh_qspi_setup_command
add r8, r6, r7
str r8, [r0, SH_QSPI_SPBMUL0]
bl sh_qspi_xfer_common
mov r4, #0x0
mov r5, r1
mov r6, r7
bl sh_qspi_xfer_common
bl sh_qspi_cs_deactivate
b end
do_page_program:
mov r8, #0x100
tst r2, (1 << 29)
movne r8, #0x200
do_pp_next_page:
/* Check if less then page bytes left. */
cmp r7, r8
movlt r8, r7
sh_qspi_write_enable
bl sh_qspi_cs_activate
bl sh_qspi_setup_command
str r6, [r0, SH_QSPI_SPBMUL0]
bl sh_qspi_xfer_common
mov r4, r1
mov r5, #0x0
mov r6, r8
bl sh_qspi_xfer_common
bl sh_qspi_cs_deactivate
sh_qspi_wait_till_ready
add r1, r8
add r3, r8
sub r7, r8
cmp r7, #0
bne do_pp_next_page
end:
bkpt #0
sh_qspi_cs_activate:
/* Set master mode only */
mov r12, #SPCR_MSTR
strb r12, [r0, SH_QSPI_SPCR]
/* Set command */
mov r12, #SPCMD_INIT1
strh r12, [r0, SH_QSPI_SPCMD0]
/* Reset transfer and receive Buffer */
ldrb r12, [r0, SH_QSPI_SPSCR]
orr r12, #(SPBFCR_TXRST | SPBFCR_RXRST)
strb r12, [r0, SH_QSPI_SPBFCR]
/* Clear transfer and receive Buffer control bit */
ldrb r12, [r0, SH_QSPI_SPBFCR]
bic r12, #(SPBFCR_TXRST | SPBFCR_RXRST)
strb r12, [r0, SH_QSPI_SPBFCR]
/* Set sequence control method. Use sequence0 only */
mov r12, #0x00
strb r12, [r0, SH_QSPI_SPSCR]
/* Enable SPI function */
ldrb r12, [r0, SH_QSPI_SPCR]
orr r12, #SPCR_SPE
strb r12, [r0, SH_QSPI_SPCR]
mov pc, lr
sh_qspi_cs_deactivate:
/* Disable SPI function */
ldrb r12, [r0, SH_QSPI_SPCR]
bic r12, #SPCR_SPE
strb r12, [r0, SH_QSPI_SPCR]
mov pc, lr
/*
* r0, controller base address
* r4, tx buffer
* r5, rx buffer
* r6, xfer len, non-zero
*
* Upon exit, r13 contains the last byte in SPDR
*
* Clobber: r11, r12, r13
*/
sh_qspi_xfer_common:
prepcopy:
ldr r13, [r0, #SH_QSPI_SPBFCR]
orr r13, #(SPBFCR_TXTRG | SPBFCR_RXTRG)
mov r11, #32
cmp r6, #32
biclt r13, #(SPBFCR_TXTRG | SPBFCR_RXTRG)
movlt r11, #1
copy:
str r13, [r0, #SH_QSPI_SPBFCR]
wait_for_spsr SPSR_SPTEF
mov r12, r11
mov r13, #0
cmp r4, #0
beq 3f
2: ldrb r13, [r4], #1
strb r13, [r0, #SH_QSPI_SPDR]
subs r12, #1
bne 2b
b 4f
3: strb r13, [r0, #SH_QSPI_SPDR]
subs r12, #1
bne 3b
4: wait_for_spsr SPSR_SPRFF
mov r12, r11
cmp r5, #0
beq 6f
5: ldrb r13, [r0, #SH_QSPI_SPDR]
strb r13, [r5], #1
subs r12, #1
bne 5b
b 7f
6: ldrb r13, [r0, #SH_QSPI_SPDR]
subs r12, #1
bne 6b
7: subs r6, r11
bne prepcopy
mov pc, lr
sh_qspi_setup_command:
ldr r4, =SPIFLASH_SCRATCH_DATA
adr r5, _start
add r4, r5
and r12, r2, #0x0ff00000
lsr r12, #20
strb r12, [r4]
mov r12, r3
strb r12, [r4, #4]
lsr r12, #8
strb r12, [r4, #3]
lsr r12, #8
strb r12, [r4, #2]
lsr r12, #8
strb r12, [r4, #1]
lsr r12, #8
mov r5, #0x0
mov r6, #0x4
tst r2, (1 << 30)
movne r6, #0x5
mov pc, lr
SPIFLASH_READ_STATUS: .byte 0x05 /* Read Status Register */
SPIFLASH_WRITE_ENABLE: .byte 0x06 /* Write Enable */
SPIFLASH_NOOP: .byte 0x00
SPIFLASH_SCRATCH_DATA: .byte 0x00, 0x0, 0x0, 0x0, 0x0

View File

@@ -0,0 +1,37 @@
/* Autogenerated with ../../../../src/helper/bin2char.sh */
0xff,0x74,0xc2,0xe3,0x0f,0x76,0xc7,0xe3,0x02,0x81,0x02,0xe2,0x02,0x01,0x58,0xe3,
0x0a,0x00,0x00,0x0a,0x32,0x00,0x00,0xeb,0x6c,0x00,0x00,0xeb,0x07,0x80,0x86,0xe0,
0x1c,0x80,0x80,0xe5,0x42,0x00,0x00,0xeb,0x00,0x40,0xa0,0xe3,0x01,0x50,0xa0,0xe1,
0x07,0x60,0xa0,0xe1,0x3e,0x00,0x00,0xeb,0x39,0x00,0x00,0xeb,0x27,0x00,0x00,0xea,
0x01,0x8c,0xa0,0xe3,0x02,0x02,0x12,0xe3,0x02,0x8c,0xa0,0x13,0x08,0x00,0x57,0xe1,
0x07,0x80,0xa0,0xb1,0xcc,0x41,0x9f,0xe5,0x60,0x50,0x4f,0xe2,0x05,0x40,0x84,0xe0,
0x00,0x50,0xa0,0xe3,0x01,0x60,0xa0,0xe3,0x1d,0x00,0x00,0xeb,0x1c,0x60,0x80,0xe5,
0x2f,0x00,0x00,0xeb,0x2a,0x00,0x00,0xeb,0x19,0x00,0x00,0xeb,0x53,0x00,0x00,0xeb,
0x1c,0x60,0x80,0xe5,0x2a,0x00,0x00,0xeb,0x01,0x40,0xa0,0xe1,0x00,0x50,0xa0,0xe3,
0x08,0x60,0xa0,0xe1,0x26,0x00,0x00,0xeb,0x21,0x00,0x00,0xeb,0x88,0x41,0x9f,0xe5,
0xa8,0x50,0x4f,0xe2,0x05,0x40,0x84,0xe0,0x00,0x50,0xa0,0xe3,0x02,0x60,0xa0,0xe3,
0x0b,0x00,0x00,0xeb,0x1c,0x60,0x80,0xe5,0x1d,0x00,0x00,0xeb,0x18,0x00,0x00,0xeb,
0x01,0xd0,0x0d,0xe2,0x01,0x00,0x5d,0xe3,0xf3,0xff,0xff,0x0a,0x08,0x10,0x81,0xe0,
0x08,0x30,0x83,0xe0,0x08,0x70,0x47,0xe0,0x00,0x00,0x57,0xe3,0xda,0xff,0xff,0x1a,
0x70,0x00,0x20,0xe1,0x08,0xc0,0xa0,0xe3,0x00,0xc0,0xc0,0xe5,0x84,0xc0,0x0e,0xe3,
0xb0,0xc1,0xc0,0xe1,0x08,0xc0,0xd0,0xe5,0xc0,0xc0,0x8c,0xe3,0x18,0xc0,0xc0,0xe5,
0x18,0xc0,0xd0,0xe5,0xc0,0xc0,0xcc,0xe3,0x18,0xc0,0xc0,0xe5,0x00,0xc0,0xa0,0xe3,
0x08,0xc0,0xc0,0xe5,0x00,0xc0,0xd0,0xe5,0x40,0xc0,0x8c,0xe3,0x00,0xc0,0xc0,0xe5,
0x0e,0xf0,0xa0,0xe1,0x00,0xc0,0xd0,0xe5,0x40,0xc0,0xcc,0xe3,0x00,0xc0,0xc0,0xe5,
0x0e,0xf0,0xa0,0xe1,0x18,0xd0,0x90,0xe5,0x37,0xd0,0x8d,0xe3,0x20,0xb0,0xa0,0xe3,
0x20,0x00,0x56,0xe3,0x37,0xd0,0xcd,0xb3,0x01,0xb0,0xa0,0xb3,0x18,0xd0,0x80,0xe5,
0x03,0xc0,0xd0,0xe5,0x20,0x00,0x1c,0xe3,0xfc,0xff,0xff,0x0a,0x0b,0xc0,0xa0,0xe1,
0x00,0xd0,0xa0,0xe3,0x00,0x00,0x54,0xe3,0x04,0x00,0x00,0x0a,0x01,0xd0,0xd4,0xe4,
0x04,0xd0,0xc0,0xe5,0x01,0xc0,0x5c,0xe2,0xfb,0xff,0xff,0x1a,0x02,0x00,0x00,0xea,
0x04,0xd0,0xc0,0xe5,0x01,0xc0,0x5c,0xe2,0xfc,0xff,0xff,0x1a,0x03,0xc0,0xd0,0xe5,
0x80,0x00,0x1c,0xe3,0xfc,0xff,0xff,0x0a,0x0b,0xc0,0xa0,0xe1,0x00,0x00,0x55,0xe3,
0x04,0x00,0x00,0x0a,0x04,0xd0,0xd0,0xe5,0x01,0xd0,0xc5,0xe4,0x01,0xc0,0x5c,0xe2,
0xfb,0xff,0xff,0x1a,0x02,0x00,0x00,0xea,0x04,0xd0,0xd0,0xe5,0x01,0xc0,0x5c,0xe2,
0xfc,0xff,0xff,0x1a,0x0b,0x60,0x56,0xe0,0xd9,0xff,0xff,0x1a,0x0e,0xf0,0xa0,0xe1,
0x58,0x40,0x9f,0xe5,0x77,0x5f,0x4f,0xe2,0x05,0x40,0x84,0xe0,0xff,0xc6,0x02,0xe2,
0x2c,0xca,0xa0,0xe1,0x00,0xc0,0xc4,0xe5,0x03,0xc0,0xa0,0xe1,0x04,0xc0,0xc4,0xe5,
0x2c,0xc4,0xa0,0xe1,0x03,0xc0,0xc4,0xe5,0x2c,0xc4,0xa0,0xe1,0x02,0xc0,0xc4,0xe5,
0x2c,0xc4,0xa0,0xe1,0x01,0xc0,0xc4,0xe5,0x2c,0xc4,0xa0,0xe1,0x00,0x50,0xa0,0xe3,
0x04,0x60,0xa0,0xe3,0x01,0x01,0x12,0xe3,0x05,0x60,0xa0,0x13,0x0e,0xf0,0xa0,0xe1,
0x05,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x21,0x02,0x00,0x00,0x20,0x02,0x00,0x00,
0x23,0x02,0x00,0x00,

View File

@@ -0,0 +1,13 @@
/* SPDX-License-Identifier: GPL-2.0+ */
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x0;
. = ALIGN(4);
.text : {
sh_qspi.o (.text*)
*(.text*)
}
}

View File

@@ -0,0 +1,28 @@
BIN2C = ../../../../src/helper/bin2char.sh
CROSS_COMPILE ?= arm-none-eabi-
CC=$(CROSS_COMPILE)gcc
OBJCOPY=$(CROSS_COMPILE)objcopy
OBJDUMP=$(CROSS_COMPILE)objdump
CFLAGS = -static -nostartfiles -mlittle-endian -Wa,-EL
all: stm32f1x.inc stm32f2x.inc stm32h7x.inc stm32l4x.inc stm32lx.inc
.PHONY: clean
%.elf: %.S
$(CC) $(CFLAGS) $< -o $@
%.lst: %.elf
$(OBJDUMP) -S $< > $@
%.bin: %.elf
$(OBJCOPY) -Obinary $< $@
%.inc: %.bin
$(BIN2C) < $< > $@
clean:
-rm -f *.elf *.lst *.bin *.inc

View File

@@ -22,8 +22,6 @@
.syntax unified
.cpu cortex-m0
.thumb
.thumb_func
.global write
/* Params:
* r0 - flash base (in), status (out)
@@ -39,6 +37,9 @@
#define STM32_FLASH_SR_OFFSET 0x0c /* offset of SR register from flash reg base */
.thumb_func
.global _start
_start:
wait_fifo:
ldr r6, [r2, #0] /* read wp */
cmp r6, #0 /* abort if wp == 0 */

View File

@@ -0,0 +1,5 @@
/* Autogenerated with ../../../../src/helper/bin2char.sh */
0x16,0x68,0x00,0x2e,0x18,0xd0,0x55,0x68,0xb5,0x42,0xf9,0xd0,0x2e,0x88,0x26,0x80,
0x02,0x35,0x02,0x34,0xc6,0x68,0x01,0x27,0x3e,0x42,0xfb,0xd1,0x14,0x27,0x3e,0x42,
0x08,0xd1,0x9d,0x42,0x01,0xd3,0x15,0x46,0x08,0x35,0x55,0x60,0x01,0x39,0x00,0x29,
0x02,0xd0,0xe5,0xe7,0x00,0x20,0x50,0x60,0x30,0x46,0x00,0xbe,

View File

@@ -25,7 +25,6 @@
.syntax unified
.cpu cortex-m3
.thumb
.thumb_func
/*
* Params :
@@ -44,6 +43,11 @@
#define STM32_FLASH_CR_OFFSET 0x10 /* offset of CR register in FLASH struct */
#define STM32_FLASH_SR_OFFSET 0x0c /* offset of SR register in FLASH struct */
#define STM32_PROG16 0x101 /* PG | PSIZE_16*/
.thumb_func
.global _start
_start:
wait_fifo:
ldr r8, [r0, #0] /* read wp */
cmp r8, #0 /* abort if wp == 0 */
@@ -52,7 +56,7 @@ wait_fifo:
cmp r7, r8 /* wait until rp != wp */
beq wait_fifo
ldr r6, STM32_PROG16
ldr r6, =STM32_PROG16
str r6, [r4, #STM32_FLASH_CR_OFFSET]
ldrh r6, [r7], #0x02 /* read one half-word from src, increment ptr */
strh r6, [r2], #0x02 /* write one half-word from src, increment ptr */
@@ -78,4 +82,4 @@ exit:
mov r0, r6 /* return status in r0 */
bkpt #0x00
STM32_PROG16: .word 0x101 /* PG | PSIZE_16*/
.pool

View File

@@ -0,0 +1,6 @@
/* Autogenerated with ../../../../src/helper/bin2char.sh */
0xd0,0xf8,0x00,0x80,0xb8,0xf1,0x00,0x0f,0x1b,0xd0,0x47,0x68,0x47,0x45,0xf7,0xd0,
0x0d,0x4e,0x26,0x61,0x37,0xf8,0x02,0x6b,0x22,0xf8,0x02,0x6b,0xbf,0xf3,0x4f,0x8f,
0xe6,0x68,0x16,0xf4,0x80,0x3f,0xfb,0xd1,0x16,0xf0,0xf0,0x0f,0x07,0xd1,0x8f,0x42,
0x28,0xbf,0x00,0xf1,0x08,0x07,0x47,0x60,0x01,0x3b,0x13,0xb1,0xe0,0xe7,0x00,0x21,
0x41,0x60,0x30,0x46,0x00,0xbe,0x00,0x00,0x01,0x01,0x00,0x00,

View File

@@ -0,0 +1,115 @@
/***************************************************************************
* Copyright (C) 2017 by STMicroelectronics *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc. *
***************************************************************************/
.text
.syntax unified
.cpu cortex-m4
.thumb
/*
* Code limitations:
* The workarea must have size multiple of 4 bytes, since R/W
* operations are all at 32 bits.
* The workarea must be big enough to contain rp, wp and data, thus the minimum
* workarea size is: min_wa_size = sizeof(rp, wp, data) = 4 + 4 + sizeof(data).
* - for 0x450 devices: sizeof(data) = 32 bytes, thus min_wa_size = 40 bytes.
* - for 0x480 devices: sizeof(data) = 16 bytes, thus min_wa_size = 24 bytes.
* To benefit from concurrent host write-to-buffer and target
* write-to-flash, the workarea must be way bigger than the minimum.
*
* To avoid confusions the write word size is got from .block_size member of
* struct stm32h7x_part_info defined in stm32h7x.c
*/
/*
* Params :
* r0 = workarea start, status (out)
* r1 = workarea end
* r2 = target address
* r3 = count (of write words)
* r4 = size of write word
* r5 = flash reg base
*
* Clobbered:
* r6 - rp
* r7 - wp, status, tmp
* r8 - loop index, tmp
*/
#define STM32_FLASH_CR_OFFSET 0x0C /* offset of CR register in FLASH struct */
#define STM32_FLASH_SR_OFFSET 0x10 /* offset of SR register in FLASH struct */
#define STM32_CR_PROG 0x00000002 /* PG */
#define STM32_SR_QW_MASK 0x00000004 /* QW */
#define STM32_SR_ERROR_MASK 0x07ee0000 /* DBECCERR | SNECCERR | RDSERR | RDPERR | OPERR
| INCERR | STRBERR | PGSERR | WRPERR */
.thumb_func
.global _start
_start:
ldr r6, [r0, #4] /* read rp */
wait_fifo:
ldr r7, [r0, #0] /* read wp */
cbz r7, exit /* abort if wp == 0, status = 0 */
subs r7, r7, r6 /* number of bytes available for read in r7 */
ittt mi /* if wrapped around */
addmi r7, r1 /* add size of buffer */
submi r7, r0
submi r7, #8
cmp r7, r4 /* wait until data buffer is full */
bcc wait_fifo
mov r7, #STM32_CR_PROG
str r7, [r5, #STM32_FLASH_CR_OFFSET]
mov r8, #4
udiv r8, r4, r8 /* number of words is size of write word divided by 4*/
write_flash:
dsb
ldr r7, [r6], #0x04 /* read one word from src, increment ptr */
str r7, [r2], #0x04 /* write one word to dst, increment ptr */
dsb
cmp r6, r1 /* if rp >= end of buffer ... */
it cs
addcs r6, r0, #8 /* ... then wrap at buffer start */
subs r8, r8, #1 /* decrement loop index */
bne write_flash /* loop if not done */
busy:
ldr r7, [r5, #STM32_FLASH_SR_OFFSET]
tst r7, #STM32_SR_QW_MASK
bne busy /* operation in progress, wait ... */
ldr r8, =STM32_SR_ERROR_MASK
tst r7, r8
bne error /* fail... */
str r6, [r0, #4] /* store rp */
subs r3, r3, #1 /* decrement count */
bne wait_fifo /* loop if not done */
b exit
error:
movs r8, #0
str r8, [r0, #4] /* set rp = 0 on error */
exit:
mov r0, r7 /* return status in r0 */
bkpt #0x00
.pool

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